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e1000e: 82579 PHY incorrectly identified during init
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
451152d9 4 Copyright(c) 1999 - 2010 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
c14c643b
BA		 55#define DRV_EXTRAVERSION "-k2"
56
57#define DRV_VERSION "1.2.7" DRV_EXTRAVERSION
bc7f75fa
AK		 58char e1000e_driver_name[] = "e1000e";
59const char e1000e_driver_version[] = DRV_VERSION;
60
61static const struct e1000_info *e1000_info_tbl[] = {
62 [board_82571] = &e1000_82571_info,
63 [board_82572] = &e1000_82572_info,
64 [board_82573] = &e1000_82573_info,
4662e82b 65 [board_82574] = &e1000_82574_info,
8c81c9c3 66 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 67 [board_80003es2lan] = &e1000_es2_info,
68 [board_ich8lan] = &e1000_ich8_info,
69 [board_ich9lan] = &e1000_ich9_info,
f4187b56 70 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 71 [board_pchlan] = &e1000_pch_info,
d3738bb8 72 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 73};
74
84f4ee90
TI		 75struct e1000_reg_info {
76 u32 ofs;
77 char *name;
78};
79
80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
85
86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
91
92static const struct e1000_reg_info e1000_reg_info_tbl[] = {
93
94 /* General Registers */
95 {E1000_CTRL, "CTRL"},
96 {E1000_STATUS, "STATUS"},
97 {E1000_CTRL_EXT, "CTRL_EXT"},
98
99 /* Interrupt Registers */
100 {E1000_ICR, "ICR"},
101
102 /* RX Registers */
103 {E1000_RCTL, "RCTL"},
104 {E1000_RDLEN, "RDLEN"},
105 {E1000_RDH, "RDH"},
106 {E1000_RDT, "RDT"},
107 {E1000_RDTR, "RDTR"},
108 {E1000_RXDCTL(0), "RXDCTL"},
109 {E1000_ERT, "ERT"},
110 {E1000_RDBAL, "RDBAL"},
111 {E1000_RDBAH, "RDBAH"},
112 {E1000_RDFH, "RDFH"},
113 {E1000_RDFT, "RDFT"},
114 {E1000_RDFHS, "RDFHS"},
115 {E1000_RDFTS, "RDFTS"},
116 {E1000_RDFPC, "RDFPC"},
117
118 /* TX Registers */
119 {E1000_TCTL, "TCTL"},
120 {E1000_TDBAL, "TDBAL"},
121 {E1000_TDBAH, "TDBAH"},
122 {E1000_TDLEN, "TDLEN"},
123 {E1000_TDH, "TDH"},
124 {E1000_TDT, "TDT"},
125 {E1000_TIDV, "TIDV"},
126 {E1000_TXDCTL(0), "TXDCTL"},
127 {E1000_TADV, "TADV"},
128 {E1000_TARC(0), "TARC"},
129 {E1000_TDFH, "TDFH"},
130 {E1000_TDFT, "TDFT"},
131 {E1000_TDFHS, "TDFHS"},
132 {E1000_TDFTS, "TDFTS"},
133 {E1000_TDFPC, "TDFPC"},
134
135 /* List Terminator */
136 {}
137};
138
139/*
140 * e1000_regdump - register printout routine
141 */
142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
143{
144 int n = 0;
145 char rname[16];
146 u32 regs[8];
147
148 switch (reginfo->ofs) {
149 case E1000_RXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_RXDCTL(n));
152 break;
153 case E1000_TXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TXDCTL(n));
156 break;
157 case E1000_TARC(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TARC(n));
160 break;
161 default:
162 printk(KERN_INFO "%-15s %08x\n",
163 reginfo->name, __er32(hw, reginfo->ofs));
164 return;
165 }
166
167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
168 printk(KERN_INFO "%-15s ", rname);
169 for (n = 0; n < 2; n++)
170 printk(KERN_CONT "%08x ", regs[n]);
171 printk(KERN_CONT "\n");
172}
173
174
175/*
176 * e1000e_dump - Print registers, tx-ring and rx-ring
177 */
178static void e1000e_dump(struct e1000_adapter *adapter)
179{
180 struct net_device *netdev = adapter->netdev;
181 struct e1000_hw *hw = &adapter->hw;
182 struct e1000_reg_info *reginfo;
183 struct e1000_ring *tx_ring = adapter->tx_ring;
184 struct e1000_tx_desc *tx_desc;
185 struct my_u0 { u64 a; u64 b; } *u0;
186 struct e1000_buffer *buffer_info;
187 struct e1000_ring *rx_ring = adapter->rx_ring;
188 union e1000_rx_desc_packet_split *rx_desc_ps;
189 struct e1000_rx_desc *rx_desc;
190 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
191 u32 staterr;
192 int i = 0;
193
194 if (!netif_msg_hw(adapter))
195 return;
196
197 /* Print netdevice Info */
198 if (netdev) {
199 dev_info(&adapter->pdev->dev, "Net device Info\n");
200 printk(KERN_INFO "Device Name state "
201 "trans_start last_rx\n");
202 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
203 netdev->name,
204 netdev->state,
205 netdev->trans_start,
206 netdev->last_rx);
207 }
208
209 /* Print Registers */
210 dev_info(&adapter->pdev->dev, "Register Dump\n");
211 printk(KERN_INFO " Register Name Value\n");
212 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
213 reginfo->name; reginfo++) {
214 e1000_regdump(hw, reginfo);
215 }
216
217 /* Print TX Ring Summary */
218 if (!netdev || !netif_running(netdev))
219 goto exit;
220
221 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
222 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
223 " leng ntw timestamp\n");
224 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
225 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
226 0, tx_ring->next_to_use, tx_ring->next_to_clean,
8eb64e6b 227 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 228 buffer_info->length,
229 buffer_info->next_to_watch,
8eb64e6b 230 (unsigned long long)buffer_info->time_stamp);
84f4ee90
TI		 231
232 /* Print TX Rings */
233 if (!netif_msg_tx_done(adapter))
234 goto rx_ring_summary;
235
236 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
237
238 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
239 *
240 * Legacy Transmit Descriptor
241 * +--------------------------------------------------------------+
242 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
243 * +--------------------------------------------------------------+
244 * 8 | Special | CSS | Status | CMD | CSO | Length |
245 * +--------------------------------------------------------------+
246 * 63 48 47 36 35 32 31 24 23 16 15 0
247 *
248 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
249 * 63 48 47 40 39 32 31 16 15 8 7 0
250 * +----------------------------------------------------------------+
251 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
252 * +----------------------------------------------------------------+
253 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
254 * +----------------------------------------------------------------+
255 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
256 *
257 * Extended Data Descriptor (DTYP=0x1)
258 * +----------------------------------------------------------------+
259 * 0 | Buffer Address [63:0] |
260 * +----------------------------------------------------------------+
261 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
262 * +----------------------------------------------------------------+
263 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
264 */
265 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Legacy format\n");
268 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Context format\n");
271 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
272 " [bi->dma ] leng ntw timestamp bi->skb "
273 "<-- Ext Data format\n");
274 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
275 tx_desc = E1000_TX_DESC(*tx_ring, i);
276 buffer_info = &tx_ring->buffer_info[i];
277 u0 = (struct my_u0 *)tx_desc;
278 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
279 "%04X %3X %016llX %p",
280 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
281 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
8eb64e6b
BA		 282 (unsigned long long)le64_to_cpu(u0->a),
283 (unsigned long long)le64_to_cpu(u0->b),
284 (unsigned long long)buffer_info->dma,
285 buffer_info->length, buffer_info->next_to_watch,
286 (unsigned long long)buffer_info->time_stamp,
84f4ee90
TI		 287 buffer_info->skb);
288 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
289 printk(KERN_CONT " NTC/U\n");
290 else if (i == tx_ring->next_to_use)
291 printk(KERN_CONT " NTU\n");
292 else if (i == tx_ring->next_to_clean)
293 printk(KERN_CONT " NTC\n");
294 else
295 printk(KERN_CONT "\n");
296
297 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
298 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
299 16, 1, phys_to_virt(buffer_info->dma),
300 buffer_info->length, true);
301 }
302
303 /* Print RX Rings Summary */
304rx_ring_summary:
305 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
306 printk(KERN_INFO "Queue [NTU] [NTC]\n");
307 printk(KERN_INFO " %5d %5X %5X\n", 0,
308 rx_ring->next_to_use, rx_ring->next_to_clean);
309
310 /* Print RX Rings */
311 if (!netif_msg_rx_status(adapter))
312 goto exit;
313
314 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
315 switch (adapter->rx_ps_pages) {
316 case 1:
317 case 2:
318 case 3:
319 /* [Extended] Packet Split Receive Descriptor Format
320 *
321 * +-----------------------------------------------------+
322 * 0 | Buffer Address 0 [63:0] |
323 * +-----------------------------------------------------+
324 * 8 | Buffer Address 1 [63:0] |
325 * +-----------------------------------------------------+
326 * 16 | Buffer Address 2 [63:0] |
327 * +-----------------------------------------------------+
328 * 24 | Buffer Address 3 [63:0] |
329 * +-----------------------------------------------------+
330 */
331 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
332 "[buffer 1 63:0 ] "
333 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
334 "[bi->skb] <-- Ext Pkt Split format\n");
335 /* [Extended] Receive Descriptor (Write-Back) Format
336 *
337 * 63 48 47 32 31 13 12 8 7 4 3 0
338 * +------------------------------------------------------+
339 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
340 * | Checksum | Ident | | Queue | | Type |
341 * +------------------------------------------------------+
342 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
343 * +------------------------------------------------------+
344 * 63 48 47 32 31 20 19 0
345 */
346 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
347 "[vl l0 ee es] "
348 "[ l3 l2 l1 hs] [reserved ] ---------------- "
349 "[bi->skb] <-- Ext Rx Write-Back format\n");
350 for (i = 0; i < rx_ring->count; i++) {
351 buffer_info = &rx_ring->buffer_info[i];
352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
353 u1 = (struct my_u1 *)rx_desc_ps;
354 staterr =
355 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
356 if (staterr & E1000_RXD_STAT_DD) {
357 /* Descriptor Done */
358 printk(KERN_INFO "RWB[0x%03X] %016llX "
359 "%016llX %016llX %016llX "
360 "---------------- %p", i,
8eb64e6b
BA		 361 (unsigned long long)le64_to_cpu(u1->a),
362 (unsigned long long)le64_to_cpu(u1->b),
363 (unsigned long long)le64_to_cpu(u1->c),
364 (unsigned long long)le64_to_cpu(u1->d),
84f4ee90
TI		 365 buffer_info->skb);
366 } else {
367 printk(KERN_INFO "R [0x%03X] %016llX "
368 "%016llX %016llX %016llX %016llX %p", i,
8eb64e6b
BA		 369 (unsigned long long)le64_to_cpu(u1->a),
370 (unsigned long long)le64_to_cpu(u1->b),
371 (unsigned long long)le64_to_cpu(u1->c),
372 (unsigned long long)le64_to_cpu(u1->d),
373 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 374 buffer_info->skb);
375
376 if (netif_msg_pktdata(adapter))
377 print_hex_dump(KERN_INFO, "",
378 DUMP_PREFIX_ADDRESS, 16, 1,
379 phys_to_virt(buffer_info->dma),
380 adapter->rx_ps_bsize0, true);
381 }
382
383 if (i == rx_ring->next_to_use)
384 printk(KERN_CONT " NTU\n");
385 else if (i == rx_ring->next_to_clean)
386 printk(KERN_CONT " NTC\n");
387 else
388 printk(KERN_CONT "\n");
389 }
390 break;
391 default:
392 case 0:
393 /* Legacy Receive Descriptor Format
394 *
395 * +-----------------------------------------------------+
396 * | Buffer Address [63:0] |
397 * +-----------------------------------------------------+
398 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
399 * +-----------------------------------------------------+
400 * 63 48 47 40 39 32 31 16 15 0
401 */
402 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
403 "[vl er S cks ln] [bi->dma ] [bi->skb] "
404 "<-- Legacy format\n");
405 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
406 rx_desc = E1000_RX_DESC(*rx_ring, i);
407 buffer_info = &rx_ring->buffer_info[i];
408 u0 = (struct my_u0 *)rx_desc;
409 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
8eb64e6b
BA		 410 "%016llX %p", i,
411 (unsigned long long)le64_to_cpu(u0->a),
412 (unsigned long long)le64_to_cpu(u0->b),
413 (unsigned long long)buffer_info->dma,
414 buffer_info->skb);
84f4ee90
TI		 415 if (i == rx_ring->next_to_use)
416 printk(KERN_CONT " NTU\n");
417 else if (i == rx_ring->next_to_clean)
418 printk(KERN_CONT " NTC\n");
419 else
420 printk(KERN_CONT "\n");
421
422 if (netif_msg_pktdata(adapter))
423 print_hex_dump(KERN_INFO, "",
424 DUMP_PREFIX_ADDRESS,
425 16, 1, phys_to_virt(buffer_info->dma),
426 adapter->rx_buffer_len, true);
427 }
428 }
429
430exit:
431 return;
432}
433
bc7f75fa
AK		 434/**
435 * e1000_desc_unused - calculate if we have unused descriptors
436 **/
437static int e1000_desc_unused(struct e1000_ring *ring)
438{
439 if (ring->next_to_clean > ring->next_to_use)
440 return ring->next_to_clean - ring->next_to_use - 1;
441
442 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
443}
444
445/**
ad68076e 446 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 447 * @adapter: board private structure
448 * @status: descriptor status field as written by hardware
449 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
450 * @skb: pointer to sk_buff to be indicated to stack
451 **/
452static void e1000_receive_skb(struct e1000_adapter *adapter,
453 struct net_device *netdev,
454 struct sk_buff *skb,
a39fe742 455 u8 status, __le16 vlan)
bc7f75fa
AK		 456{
457 skb->protocol = eth_type_trans(skb, netdev);
458
459 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 460 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
461 le16_to_cpu(vlan), skb);
bc7f75fa 462 else
89c88b16 463 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 464}
465
466/**
467 * e1000_rx_checksum - Receive Checksum Offload for 82543
468 * @adapter: board private structure
469 * @status_err: receive descriptor status and error fields
470 * @csum: receive descriptor csum field
471 * @sk_buff: socket buffer with received data
472 **/
473static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
474 u32 csum, struct sk_buff *skb)
475{
476 u16 status = (u16)status_err;
477 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 478
479 skb_checksum_none_assert(skb);
bc7f75fa
AK		 480
481 /* Ignore Checksum bit is set */
482 if (status & E1000_RXD_STAT_IXSM)
483 return;
484 /* TCP/UDP checksum error bit is set */
485 if (errors & E1000_RXD_ERR_TCPE) {
486 /* let the stack verify checksum errors */
487 adapter->hw_csum_err++;
488 return;
489 }
490
491 /* TCP/UDP Checksum has not been calculated */
492 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
493 return;
494
495 /* It must be a TCP or UDP packet with a valid checksum */
496 if (status & E1000_RXD_STAT_TCPCS) {
497 /* TCP checksum is good */
498 skb->ip_summed = CHECKSUM_UNNECESSARY;
499 } else {
ad68076e
BA		 500 /*
501 * IP fragment with UDP payload
502 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 503 * and then put the value in host order for further stack use.
504 */
a39fe742
AV		 505 __sum16 sum = (__force __sum16)htons(csum);
506 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 507 skb->ip_summed = CHECKSUM_COMPLETE;
508 }
509 adapter->hw_csum_good++;
510}
511
512/**
513 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
514 * @adapter: address of board private structure
515 **/
516static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
517 int cleaned_count)
518{
519 struct net_device *netdev = adapter->netdev;
520 struct pci_dev *pdev = adapter->pdev;
521 struct e1000_ring *rx_ring = adapter->rx_ring;
522 struct e1000_rx_desc *rx_desc;
523 struct e1000_buffer *buffer_info;
524 struct sk_buff *skb;
525 unsigned int i;
89d71a66 526 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 527
528 i = rx_ring->next_to_use;
529 buffer_info = &rx_ring->buffer_info[i];
530
531 while (cleaned_count--) {
532 skb = buffer_info->skb;
533 if (skb) {
534 skb_trim(skb, 0);
535 goto map_skb;
536 }
537
89d71a66 538 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 539 if (!skb) {
540 /* Better luck next round */
541 adapter->alloc_rx_buff_failed++;
542 break;
543 }
544
bc7f75fa
AK		 545 buffer_info->skb = skb;
546map_skb:
0be3f55f 547 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 548 adapter->rx_buffer_len,
0be3f55f
NN		 549 DMA_FROM_DEVICE);
550 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 551 dev_err(&pdev->dev, "RX DMA map failed\n");
552 adapter->rx_dma_failed++;
553 break;
554 }
555
556 rx_desc = E1000_RX_DESC(*rx_ring, i);
557 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
558
50849d79
TH		 559 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
560 /*
561 * Force memory writes to complete before letting h/w
562 * know there are new descriptors to fetch. (Only
563 * applicable for weak-ordered memory model archs,
564 * such as IA-64).
565 */
566 wmb();
567 writel(i, adapter->hw.hw_addr + rx_ring->tail);
568 }
bc7f75fa
AK		 569 i++;
570 if (i == rx_ring->count)
571 i = 0;
572 buffer_info = &rx_ring->buffer_info[i];
573 }
574
50849d79 575 rx_ring->next_to_use = i;
bc7f75fa
AK		 576}
577
578/**
579 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
580 * @adapter: address of board private structure
581 **/
582static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
583 int cleaned_count)
584{
585 struct net_device *netdev = adapter->netdev;
586 struct pci_dev *pdev = adapter->pdev;
587 union e1000_rx_desc_packet_split *rx_desc;
588 struct e1000_ring *rx_ring = adapter->rx_ring;
589 struct e1000_buffer *buffer_info;
590 struct e1000_ps_page *ps_page;
591 struct sk_buff *skb;
592 unsigned int i, j;
593
594 i = rx_ring->next_to_use;
595 buffer_info = &rx_ring->buffer_info[i];
596
597 while (cleaned_count--) {
598 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
599
600 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 601 ps_page = &buffer_info->ps_pages[j];
602 if (j >= adapter->rx_ps_pages) {
603 /* all unused desc entries get hw null ptr */
a39fe742 604 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 605 continue;
606 }
607 if (!ps_page->page) {
608 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 609 if (!ps_page->page) {
47f44e40
AK		 610 adapter->alloc_rx_buff_failed++;
611 goto no_buffers;
612 }
0be3f55f
NN		 613 ps_page->dma = dma_map_page(&pdev->dev,
614 ps_page->page,
615 0, PAGE_SIZE,
616 DMA_FROM_DEVICE);
617 if (dma_mapping_error(&pdev->dev,
618 ps_page->dma)) {
47f44e40
AK		 619 dev_err(&adapter->pdev->dev,
620 "RX DMA page map failed\n");
621 adapter->rx_dma_failed++;
622 goto no_buffers;
bc7f75fa 623 }
bc7f75fa 624 }
47f44e40
AK		 625 /*
626 * Refresh the desc even if buffer_addrs
627 * didn't change because each write-back
628 * erases this info.
629 */
630 rx_desc->read.buffer_addr[j+1] =
631 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 632 }
633
89d71a66
ED		 634 skb = netdev_alloc_skb_ip_align(netdev,
635 adapter->rx_ps_bsize0);
bc7f75fa
AK		 636
637 if (!skb) {
638 adapter->alloc_rx_buff_failed++;
639 break;
640 }
641
bc7f75fa 642 buffer_info->skb = skb;
0be3f55f 643 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 644 adapter->rx_ps_bsize0,
0be3f55f
NN		 645 DMA_FROM_DEVICE);
646 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 647 dev_err(&pdev->dev, "RX DMA map failed\n");
648 adapter->rx_dma_failed++;
649 /* cleanup skb */
650 dev_kfree_skb_any(skb);
651 buffer_info->skb = NULL;
652 break;
653 }
654
655 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
656
50849d79
TH		 657 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
658 /*
659 * Force memory writes to complete before letting h/w
660 * know there are new descriptors to fetch. (Only
661 * applicable for weak-ordered memory model archs,
662 * such as IA-64).
663 */
664 wmb();
665 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
666 }
667
bc7f75fa
AK		 668 i++;
669 if (i == rx_ring->count)
670 i = 0;
671 buffer_info = &rx_ring->buffer_info[i];
672 }
673
674no_buffers:
50849d79 675 rx_ring->next_to_use = i;
bc7f75fa
AK		 676}
677
97ac8cae
BA		 678/**
679 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
680 * @adapter: address of board private structure
97ac8cae
BA		 681 * @cleaned_count: number of buffers to allocate this pass
682 **/
683
684static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
685 int cleaned_count)
686{
687 struct net_device *netdev = adapter->netdev;
688 struct pci_dev *pdev = adapter->pdev;
689 struct e1000_rx_desc *rx_desc;
690 struct e1000_ring *rx_ring = adapter->rx_ring;
691 struct e1000_buffer *buffer_info;
692 struct sk_buff *skb;
693 unsigned int i;
89d71a66 694 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 695
696 i = rx_ring->next_to_use;
697 buffer_info = &rx_ring->buffer_info[i];
698
699 while (cleaned_count--) {
700 skb = buffer_info->skb;
701 if (skb) {
702 skb_trim(skb, 0);
703 goto check_page;
704 }
705
89d71a66 706 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 707 if (unlikely(!skb)) {
708 /* Better luck next round */
709 adapter->alloc_rx_buff_failed++;
710 break;
711 }
712
97ac8cae
BA		 713 buffer_info->skb = skb;
714check_page:
715 /* allocate a new page if necessary */
716 if (!buffer_info->page) {
717 buffer_info->page = alloc_page(GFP_ATOMIC);
718 if (unlikely(!buffer_info->page)) {
719 adapter->alloc_rx_buff_failed++;
720 break;
721 }
722 }
723
724 if (!buffer_info->dma)
0be3f55f 725 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 726 buffer_info->page, 0,
727 PAGE_SIZE,
0be3f55f 728 DMA_FROM_DEVICE);
97ac8cae
BA		 729
730 rx_desc = E1000_RX_DESC(*rx_ring, i);
731 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
732
733 if (unlikely(++i == rx_ring->count))
734 i = 0;
735 buffer_info = &rx_ring->buffer_info[i];
736 }
737
738 if (likely(rx_ring->next_to_use != i)) {
739 rx_ring->next_to_use = i;
740 if (unlikely(i-- == 0))
741 i = (rx_ring->count - 1);
742
743 /* Force memory writes to complete before letting h/w
744 * know there are new descriptors to fetch. (Only
745 * applicable for weak-ordered memory model archs,
746 * such as IA-64). */
747 wmb();
748 writel(i, adapter->hw.hw_addr + rx_ring->tail);
749 }
750}
751
bc7f75fa
AK		 752/**
753 * e1000_clean_rx_irq - Send received data up the network stack; legacy
754 * @adapter: board private structure
755 *
756 * the return value indicates whether actual cleaning was done, there
757 * is no guarantee that everything was cleaned
758 **/
759static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
760 int *work_done, int work_to_do)
761{
762 struct net_device *netdev = adapter->netdev;
763 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 764 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 765 struct e1000_ring *rx_ring = adapter->rx_ring;
766 struct e1000_rx_desc *rx_desc, *next_rxd;
767 struct e1000_buffer *buffer_info, *next_buffer;
768 u32 length;
769 unsigned int i;
770 int cleaned_count = 0;
771 bool cleaned = 0;
772 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
773
774 i = rx_ring->next_to_clean;
775 rx_desc = E1000_RX_DESC(*rx_ring, i);
776 buffer_info = &rx_ring->buffer_info[i];
777
778 while (rx_desc->status & E1000_RXD_STAT_DD) {
779 struct sk_buff *skb;
780 u8 status;
781
782 if (*work_done >= work_to_do)
783 break;
784 (*work_done)++;
2d0bb1c1 785 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 786
787 status = rx_desc->status;
788 skb = buffer_info->skb;
789 buffer_info->skb = NULL;
790
791 prefetch(skb->data - NET_IP_ALIGN);
792
793 i++;
794 if (i == rx_ring->count)
795 i = 0;
796 next_rxd = E1000_RX_DESC(*rx_ring, i);
797 prefetch(next_rxd);
798
799 next_buffer = &rx_ring->buffer_info[i];
800
801 cleaned = 1;
802 cleaned_count++;
0be3f55f 803 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 804 buffer_info->dma,
805 adapter->rx_buffer_len,
0be3f55f 806 DMA_FROM_DEVICE);
bc7f75fa
AK		 807 buffer_info->dma = 0;
808
809 length = le16_to_cpu(rx_desc->length);
810
b94b5028
JB		 811 /*
812 * !EOP means multiple descriptors were used to store a single
813 * packet, if that's the case we need to toss it. In fact, we
814 * need to toss every packet with the EOP bit clear and the
815 * next frame that _does_ have the EOP bit set, as it is by
816 * definition only a frame fragment
817 */
818 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
819 adapter->flags2 |= FLAG2_IS_DISCARDING;
820
821 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 822 /* All receives must fit into a single buffer */
3bb99fe2 823 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 824 /* recycle */
825 buffer_info->skb = skb;
b94b5028
JB		 826 if (status & E1000_RXD_STAT_EOP)
827 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 828 goto next_desc;
829 }
830
831 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
832 /* recycle */
833 buffer_info->skb = skb;
834 goto next_desc;
835 }
836
eb7c3adb
JK		 837 /* adjust length to remove Ethernet CRC */
838 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
839 length -= 4;
840
bc7f75fa
AK		 841 total_rx_bytes += length;
842 total_rx_packets++;
843
ad68076e
BA		 844 /*
845 * code added for copybreak, this should improve
bc7f75fa 846 * performance for small packets with large amounts
ad68076e
BA		 847 * of reassembly being done in the stack
848 */
bc7f75fa
AK		 849 if (length < copybreak) {
850 struct sk_buff *new_skb =
89d71a66 851 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 852 if (new_skb) {
808ff676
BA		 853 skb_copy_to_linear_data_offset(new_skb,
854 -NET_IP_ALIGN,
855 (skb->data -
856 NET_IP_ALIGN),
857 (length +
858 NET_IP_ALIGN));
bc7f75fa
AK		 859 /* save the skb in buffer_info as good */
860 buffer_info->skb = skb;
861 skb = new_skb;
862 }
863 /* else just continue with the old one */
864 }
865 /* end copybreak code */
866 skb_put(skb, length);
867
868 /* Receive Checksum Offload */
869 e1000_rx_checksum(adapter,
870 (u32)(status) |
871 ((u32)(rx_desc->errors) << 24),
872 le16_to_cpu(rx_desc->csum), skb);
873
874 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
875
876next_desc:
877 rx_desc->status = 0;
878
879 /* return some buffers to hardware, one at a time is too slow */
880 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
881 adapter->alloc_rx_buf(adapter, cleaned_count);
882 cleaned_count = 0;
883 }
884
885 /* use prefetched values */
886 rx_desc = next_rxd;
887 buffer_info = next_buffer;
888 }
889 rx_ring->next_to_clean = i;
890
891 cleaned_count = e1000_desc_unused(rx_ring);
892 if (cleaned_count)
893 adapter->alloc_rx_buf(adapter, cleaned_count);
894
bc7f75fa 895 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 896 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 897 netdev->stats.rx_bytes += total_rx_bytes;
898 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 899 return cleaned;
900}
901
bc7f75fa
AK		 902static void e1000_put_txbuf(struct e1000_adapter *adapter,
903 struct e1000_buffer *buffer_info)
904{
03b1320d
AD		 905 if (buffer_info->dma) {
906 if (buffer_info->mapped_as_page)
0be3f55f
NN		 907 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
908 buffer_info->length, DMA_TO_DEVICE);
03b1320d 909 else
0be3f55f
NN		 910 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
911 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 912 buffer_info->dma = 0;
913 }
bc7f75fa
AK		 914 if (buffer_info->skb) {
915 dev_kfree_skb_any(buffer_info->skb);
916 buffer_info->skb = NULL;
917 }
1b7719c4 918 buffer_info->time_stamp = 0;
bc7f75fa
AK		 919}
920
41cec6f1 921static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 922{
41cec6f1
BA		 923 struct e1000_adapter *adapter = container_of(work,
924 struct e1000_adapter,
925 print_hang_task);
bc7f75fa
AK		 926 struct e1000_ring *tx_ring = adapter->tx_ring;
927 unsigned int i = tx_ring->next_to_clean;
928 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
929 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 930 struct e1000_hw *hw = &adapter->hw;
931 u16 phy_status, phy_1000t_status, phy_ext_status;
932 u16 pci_status;
933
934 e1e_rphy(hw, PHY_STATUS, &phy_status);
935 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
936 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 937
41cec6f1
BA		 938 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
939
940 /* detected Hardware unit hang */
941 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 942 " TDH <%x>\n"
943 " TDT <%x>\n"
944 " next_to_use <%x>\n"
945 " next_to_clean <%x>\n"
946 "buffer_info[next_to_clean]:\n"
947 " time_stamp <%lx>\n"
948 " next_to_watch <%x>\n"
949 " jiffies <%lx>\n"
41cec6f1
BA		 950 " next_to_watch.status <%x>\n"
951 "MAC Status <%x>\n"
952 "PHY Status <%x>\n"
953 "PHY 1000BASE-T Status <%x>\n"
954 "PHY Extended Status <%x>\n"
955 "PCI Status <%x>\n",
44defeb3
JK		 956 readl(adapter->hw.hw_addr + tx_ring->head),
957 readl(adapter->hw.hw_addr + tx_ring->tail),
958 tx_ring->next_to_use,
959 tx_ring->next_to_clean,
960 tx_ring->buffer_info[eop].time_stamp,
961 eop,
962 jiffies,
41cec6f1
BA		 963 eop_desc->upper.fields.status,
964 er32(STATUS),
965 phy_status,
966 phy_1000t_status,
967 phy_ext_status,
968 pci_status);
bc7f75fa
AK		 969}
970
971/**
972 * e1000_clean_tx_irq - Reclaim resources after transmit completes
973 * @adapter: board private structure
974 *
975 * the return value indicates whether actual cleaning was done, there
976 * is no guarantee that everything was cleaned
977 **/
978static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
979{
980 struct net_device *netdev = adapter->netdev;
981 struct e1000_hw *hw = &adapter->hw;
982 struct e1000_ring *tx_ring = adapter->tx_ring;
983 struct e1000_tx_desc *tx_desc, *eop_desc;
984 struct e1000_buffer *buffer_info;
985 unsigned int i, eop;
986 unsigned int count = 0;
bc7f75fa
AK		 987 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
988
989 i = tx_ring->next_to_clean;
990 eop = tx_ring->buffer_info[i].next_to_watch;
991 eop_desc = E1000_TX_DESC(*tx_ring, eop);
992
12d04a3c
AD		 993 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
994 (count < tx_ring->count)) {
a86043c2 995 bool cleaned = false;
2d0bb1c1 996 rmb(); /* read buffer_info after eop_desc */
a86043c2 997 for (; !cleaned; count++) {
bc7f75fa
AK		 998 tx_desc = E1000_TX_DESC(*tx_ring, i);
999 buffer_info = &tx_ring->buffer_info[i];
1000 cleaned = (i == eop);
1001
1002 if (cleaned) {
9ed318d5
TH		 1003 total_tx_packets += buffer_info->segs;
1004 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 1005 }
1006
1007 e1000_put_txbuf(adapter, buffer_info);
1008 tx_desc->upper.data = 0;
1009
1010 i++;
1011 if (i == tx_ring->count)
1012 i = 0;
1013 }
1014
dac87619
TL		 1015 if (i == tx_ring->next_to_use)
1016 break;
bc7f75fa
AK		 1017 eop = tx_ring->buffer_info[i].next_to_watch;
1018 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1019 }
1020
1021 tx_ring->next_to_clean = i;
1022
1023#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1024 if (count && netif_carrier_ok(netdev) &&
1025 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1026 /* Make sure that anybody stopping the queue after this
1027 * sees the new next_to_clean.
1028 */
1029 smp_mb();
1030
1031 if (netif_queue_stopped(netdev) &&
1032 !(test_bit(__E1000_DOWN, &adapter->state))) {
1033 netif_wake_queue(netdev);
1034 ++adapter->restart_queue;
1035 }
1036 }
1037
1038 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1039 /*
1040 * Detect a transmit hang in hardware, this serializes the
1041 * check with the clearing of time_stamp and movement of i
1042 */
bc7f75fa 1043 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1044 if (tx_ring->buffer_info[i].time_stamp &&
1045 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1046 + (adapter->tx_timeout_factor * HZ)) &&
1047 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1048 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1049 netif_stop_queue(netdev);
1050 }
1051 }
1052 adapter->total_tx_bytes += total_tx_bytes;
1053 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 1054 netdev->stats.tx_bytes += total_tx_bytes;
1055 netdev->stats.tx_packets += total_tx_packets;
807540ba 1056 return count < tx_ring->count;
bc7f75fa
AK		 1057}
1058
bc7f75fa
AK		 1059/**
1060 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1061 * @adapter: board private structure
1062 *
1063 * the return value indicates whether actual cleaning was done, there
1064 * is no guarantee that everything was cleaned
1065 **/
1066static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1067 int *work_done, int work_to_do)
1068{
3bb99fe2 1069 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1070 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1071 struct net_device *netdev = adapter->netdev;
1072 struct pci_dev *pdev = adapter->pdev;
1073 struct e1000_ring *rx_ring = adapter->rx_ring;
1074 struct e1000_buffer *buffer_info, *next_buffer;
1075 struct e1000_ps_page *ps_page;
1076 struct sk_buff *skb;
1077 unsigned int i, j;
1078 u32 length, staterr;
1079 int cleaned_count = 0;
1080 bool cleaned = 0;
1081 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1082
1083 i = rx_ring->next_to_clean;
1084 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1085 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1086 buffer_info = &rx_ring->buffer_info[i];
1087
1088 while (staterr & E1000_RXD_STAT_DD) {
1089 if (*work_done >= work_to_do)
1090 break;
1091 (*work_done)++;
1092 skb = buffer_info->skb;
2d0bb1c1 1093 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 1094
1095 /* in the packet split case this is header only */
1096 prefetch(skb->data - NET_IP_ALIGN);
1097
1098 i++;
1099 if (i == rx_ring->count)
1100 i = 0;
1101 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1102 prefetch(next_rxd);
1103
1104 next_buffer = &rx_ring->buffer_info[i];
1105
1106 cleaned = 1;
1107 cleaned_count++;
0be3f55f 1108 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1109 adapter->rx_ps_bsize0,
0be3f55f 1110 DMA_FROM_DEVICE);
bc7f75fa
AK		 1111 buffer_info->dma = 0;
1112
b94b5028
JB		 1113 /* see !EOP comment in other rx routine */
1114 if (!(staterr & E1000_RXD_STAT_EOP))
1115 adapter->flags2 |= FLAG2_IS_DISCARDING;
1116
1117 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1118 e_dbg("Packet Split buffers didn't pick up the full "
1119 "packet\n");
bc7f75fa 1120 dev_kfree_skb_irq(skb);
b94b5028
JB		 1121 if (staterr & E1000_RXD_STAT_EOP)
1122 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1123 goto next_desc;
1124 }
1125
1126 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1127 dev_kfree_skb_irq(skb);
1128 goto next_desc;
1129 }
1130
1131 length = le16_to_cpu(rx_desc->wb.middle.length0);
1132
1133 if (!length) {
3bb99fe2
BA		 1134 e_dbg("Last part of the packet spanning multiple "
1135 "descriptors\n");
bc7f75fa
AK		 1136 dev_kfree_skb_irq(skb);
1137 goto next_desc;
1138 }
1139
1140 /* Good Receive */
1141 skb_put(skb, length);
1142
1143 {
ad68076e
BA		 1144 /*
1145 * this looks ugly, but it seems compiler issues make it
1146 * more efficient than reusing j
1147 */
bc7f75fa
AK		 1148 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1149
ad68076e
BA		 1150 /*
1151 * page alloc/put takes too long and effects small packet
1152 * throughput, so unsplit small packets and save the alloc/put
1153 * only valid in softirq (napi) context to call kmap_*
1154 */
bc7f75fa
AK		 1155 if (l1 && (l1 <= copybreak) &&
1156 ((length + l1) <= adapter->rx_ps_bsize0)) {
1157 u8 *vaddr;
1158
47f44e40 1159 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1160
ad68076e
BA		 1161 /*
1162 * there is no documentation about how to call
bc7f75fa 1163 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1164 * very long
1165 */
0be3f55f
NN		 1166 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1167 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1168 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1169 memcpy(skb_tail_pointer(skb), vaddr, l1);
1170 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1171 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1172 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1173
eb7c3adb
JK		 1174 /* remove the CRC */
1175 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1176 l1 -= 4;
1177
bc7f75fa
AK		 1178 skb_put(skb, l1);
1179 goto copydone;
1180 } /* if */
1181 }
1182
1183 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1184 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1185 if (!length)
1186 break;
1187
47f44e40 1188 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1189 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1190 DMA_FROM_DEVICE);
bc7f75fa
AK		 1191 ps_page->dma = 0;
1192 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1193 ps_page->page = NULL;
1194 skb->len += length;
1195 skb->data_len += length;
1196 skb->truesize += length;
1197 }
1198
eb7c3adb
JK		 1199 /* strip the ethernet crc, problem is we're using pages now so
1200 * this whole operation can get a little cpu intensive
1201 */
1202 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1203 pskb_trim(skb, skb->len - 4);
1204
bc7f75fa
AK		 1205copydone:
1206 total_rx_bytes += skb->len;
1207 total_rx_packets++;
1208
1209 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1210 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1211
1212 if (rx_desc->wb.upper.header_status &
1213 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1214 adapter->rx_hdr_split++;
1215
1216 e1000_receive_skb(adapter, netdev, skb,
1217 staterr, rx_desc->wb.middle.vlan);
1218
1219next_desc:
1220 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1221 buffer_info->skb = NULL;
1222
1223 /* return some buffers to hardware, one at a time is too slow */
1224 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1225 adapter->alloc_rx_buf(adapter, cleaned_count);
1226 cleaned_count = 0;
1227 }
1228
1229 /* use prefetched values */
1230 rx_desc = next_rxd;
1231 buffer_info = next_buffer;
1232
1233 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1234 }
1235 rx_ring->next_to_clean = i;
1236
1237 cleaned_count = e1000_desc_unused(rx_ring);
1238 if (cleaned_count)
1239 adapter->alloc_rx_buf(adapter, cleaned_count);
1240
bc7f75fa 1241 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1242 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1243 netdev->stats.rx_bytes += total_rx_bytes;
1244 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 1245 return cleaned;
1246}
1247
97ac8cae
BA		 1248/**
1249 * e1000_consume_page - helper function
1250 **/
1251static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1252 u16 length)
1253{
1254 bi->page = NULL;
1255 skb->len += length;
1256 skb->data_len += length;
1257 skb->truesize += length;
1258}
1259
1260/**
1261 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1262 * @adapter: board private structure
1263 *
1264 * the return value indicates whether actual cleaning was done, there
1265 * is no guarantee that everything was cleaned
1266 **/
1267
1268static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1269 int *work_done, int work_to_do)
1270{
1271 struct net_device *netdev = adapter->netdev;
1272 struct pci_dev *pdev = adapter->pdev;
1273 struct e1000_ring *rx_ring = adapter->rx_ring;
1274 struct e1000_rx_desc *rx_desc, *next_rxd;
1275 struct e1000_buffer *buffer_info, *next_buffer;
1276 u32 length;
1277 unsigned int i;
1278 int cleaned_count = 0;
1279 bool cleaned = false;
1280 unsigned int total_rx_bytes=0, total_rx_packets=0;
1281
1282 i = rx_ring->next_to_clean;
1283 rx_desc = E1000_RX_DESC(*rx_ring, i);
1284 buffer_info = &rx_ring->buffer_info[i];
1285
1286 while (rx_desc->status & E1000_RXD_STAT_DD) {
1287 struct sk_buff *skb;
1288 u8 status;
1289
1290 if (*work_done >= work_to_do)
1291 break;
1292 (*work_done)++;
2d0bb1c1 1293 rmb(); /* read descriptor and rx_buffer_info after status DD */
97ac8cae
BA		 1294
1295 status = rx_desc->status;
1296 skb = buffer_info->skb;
1297 buffer_info->skb = NULL;
1298
1299 ++i;
1300 if (i == rx_ring->count)
1301 i = 0;
1302 next_rxd = E1000_RX_DESC(*rx_ring, i);
1303 prefetch(next_rxd);
1304
1305 next_buffer = &rx_ring->buffer_info[i];
1306
1307 cleaned = true;
1308 cleaned_count++;
0be3f55f
NN		 1309 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1310 DMA_FROM_DEVICE);
97ac8cae
BA		 1311 buffer_info->dma = 0;
1312
1313 length = le16_to_cpu(rx_desc->length);
1314
1315 /* errors is only valid for DD + EOP descriptors */
1316 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1317 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1318 /* recycle both page and skb */
1319 buffer_info->skb = skb;
1320 /* an error means any chain goes out the window
1321 * too */
1322 if (rx_ring->rx_skb_top)
1323 dev_kfree_skb(rx_ring->rx_skb_top);
1324 rx_ring->rx_skb_top = NULL;
1325 goto next_desc;
1326 }
1327
1328#define rxtop rx_ring->rx_skb_top
1329 if (!(status & E1000_RXD_STAT_EOP)) {
1330 /* this descriptor is only the beginning (or middle) */
1331 if (!rxtop) {
1332 /* this is the beginning of a chain */
1333 rxtop = skb;
1334 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1335 0, length);
1336 } else {
1337 /* this is the middle of a chain */
1338 skb_fill_page_desc(rxtop,
1339 skb_shinfo(rxtop)->nr_frags,
1340 buffer_info->page, 0, length);
1341 /* re-use the skb, only consumed the page */
1342 buffer_info->skb = skb;
1343 }
1344 e1000_consume_page(buffer_info, rxtop, length);
1345 goto next_desc;
1346 } else {
1347 if (rxtop) {
1348 /* end of the chain */
1349 skb_fill_page_desc(rxtop,
1350 skb_shinfo(rxtop)->nr_frags,
1351 buffer_info->page, 0, length);
1352 /* re-use the current skb, we only consumed the
1353 * page */
1354 buffer_info->skb = skb;
1355 skb = rxtop;
1356 rxtop = NULL;
1357 e1000_consume_page(buffer_info, skb, length);
1358 } else {
1359 /* no chain, got EOP, this buf is the packet
1360 * copybreak to save the put_page/alloc_page */
1361 if (length <= copybreak &&
1362 skb_tailroom(skb) >= length) {
1363 u8 *vaddr;
1364 vaddr = kmap_atomic(buffer_info->page,
1365 KM_SKB_DATA_SOFTIRQ);
1366 memcpy(skb_tail_pointer(skb), vaddr,
1367 length);
1368 kunmap_atomic(vaddr,
1369 KM_SKB_DATA_SOFTIRQ);
1370 /* re-use the page, so don't erase
1371 * buffer_info->page */
1372 skb_put(skb, length);
1373 } else {
1374 skb_fill_page_desc(skb, 0,
1375 buffer_info->page, 0,
1376 length);
1377 e1000_consume_page(buffer_info, skb,
1378 length);
1379 }
1380 }
1381 }
1382
1383 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1384 e1000_rx_checksum(adapter,
1385 (u32)(status) |
1386 ((u32)(rx_desc->errors) << 24),
1387 le16_to_cpu(rx_desc->csum), skb);
1388
1389 /* probably a little skewed due to removing CRC */
1390 total_rx_bytes += skb->len;
1391 total_rx_packets++;
1392
1393 /* eth type trans needs skb->data to point to something */
1394 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1395 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1396 dev_kfree_skb(skb);
1397 goto next_desc;
1398 }
1399
1400 e1000_receive_skb(adapter, netdev, skb, status,
1401 rx_desc->special);
1402
1403next_desc:
1404 rx_desc->status = 0;
1405
1406 /* return some buffers to hardware, one at a time is too slow */
1407 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1408 adapter->alloc_rx_buf(adapter, cleaned_count);
1409 cleaned_count = 0;
1410 }
1411
1412 /* use prefetched values */
1413 rx_desc = next_rxd;
1414 buffer_info = next_buffer;
1415 }
1416 rx_ring->next_to_clean = i;
1417
1418 cleaned_count = e1000_desc_unused(rx_ring);
1419 if (cleaned_count)
1420 adapter->alloc_rx_buf(adapter, cleaned_count);
1421
1422 adapter->total_rx_bytes += total_rx_bytes;
1423 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1424 netdev->stats.rx_bytes += total_rx_bytes;
1425 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1426 return cleaned;
1427}
1428
bc7f75fa
AK		 1429/**
1430 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1431 * @adapter: board private structure
1432 **/
1433static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1434{
1435 struct e1000_ring *rx_ring = adapter->rx_ring;
1436 struct e1000_buffer *buffer_info;
1437 struct e1000_ps_page *ps_page;
1438 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1439 unsigned int i, j;
1440
1441 /* Free all the Rx ring sk_buffs */
1442 for (i = 0; i < rx_ring->count; i++) {
1443 buffer_info = &rx_ring->buffer_info[i];
1444 if (buffer_info->dma) {
1445 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1446 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1447 adapter->rx_buffer_len,
0be3f55f 1448 DMA_FROM_DEVICE);
97ac8cae 1449 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1450 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1451 PAGE_SIZE,
0be3f55f 1452 DMA_FROM_DEVICE);
bc7f75fa 1453 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1454 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1455 adapter->rx_ps_bsize0,
0be3f55f 1456 DMA_FROM_DEVICE);
bc7f75fa
AK		 1457 buffer_info->dma = 0;
1458 }
1459
97ac8cae
BA		 1460 if (buffer_info->page) {
1461 put_page(buffer_info->page);
1462 buffer_info->page = NULL;
1463 }
1464
bc7f75fa
AK		 1465 if (buffer_info->skb) {
1466 dev_kfree_skb(buffer_info->skb);
1467 buffer_info->skb = NULL;
1468 }
1469
1470 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1471 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1472 if (!ps_page->page)
1473 break;
0be3f55f
NN		 1474 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1475 DMA_FROM_DEVICE);
bc7f75fa
AK		 1476 ps_page->dma = 0;
1477 put_page(ps_page->page);
1478 ps_page->page = NULL;
1479 }
1480 }
1481
1482 /* there also may be some cached data from a chained receive */
1483 if (rx_ring->rx_skb_top) {
1484 dev_kfree_skb(rx_ring->rx_skb_top);
1485 rx_ring->rx_skb_top = NULL;
1486 }
1487
bc7f75fa
AK		 1488 /* Zero out the descriptor ring */
1489 memset(rx_ring->desc, 0, rx_ring->size);
1490
1491 rx_ring->next_to_clean = 0;
1492 rx_ring->next_to_use = 0;
b94b5028 1493 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1494
1495 writel(0, adapter->hw.hw_addr + rx_ring->head);
1496 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1497}
1498
a8f88ff5
JB		 1499static void e1000e_downshift_workaround(struct work_struct *work)
1500{
1501 struct e1000_adapter *adapter = container_of(work,
1502 struct e1000_adapter, downshift_task);
1503
1504 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1505}
1506
bc7f75fa
AK		 1507/**
1508 * e1000_intr_msi - Interrupt Handler
1509 * @irq: interrupt number
1510 * @data: pointer to a network interface device structure
1511 **/
1512static irqreturn_t e1000_intr_msi(int irq, void *data)
1513{
1514 struct net_device *netdev = data;
1515 struct e1000_adapter *adapter = netdev_priv(netdev);
1516 struct e1000_hw *hw = &adapter->hw;
1517 u32 icr = er32(ICR);
1518
ad68076e
BA		 1519 /*
1520 * read ICR disables interrupts using IAM
1521 */
bc7f75fa 1522
573cca8c 1523 if (icr & E1000_ICR_LSC) {
bc7f75fa 1524 hw->mac.get_link_status = 1;
ad68076e
BA		 1525 /*
1526 * ICH8 workaround-- Call gig speed drop workaround on cable
1527 * disconnect (LSC) before accessing any PHY registers
1528 */
bc7f75fa
AK		 1529 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1530 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1531 schedule_work(&adapter->downshift_task);
bc7f75fa 1532
ad68076e
BA		 1533 /*
1534 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1535 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1536 * adapter in watchdog
1537 */
bc7f75fa
AK		 1538 if (netif_carrier_ok(netdev) &&
1539 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1540 /* disable receives */
1541 u32 rctl = er32(RCTL);
1542 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1543 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1544 }
1545 /* guard against interrupt when we're going down */
1546 if (!test_bit(__E1000_DOWN, &adapter->state))
1547 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1548 }
1549
288379f0 1550 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1551 adapter->total_tx_bytes = 0;
1552 adapter->total_tx_packets = 0;
1553 adapter->total_rx_bytes = 0;
1554 adapter->total_rx_packets = 0;
288379f0 1555 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1556 }
1557
1558 return IRQ_HANDLED;
1559}
1560
1561/**
1562 * e1000_intr - Interrupt Handler
1563 * @irq: interrupt number
1564 * @data: pointer to a network interface device structure
1565 **/
1566static irqreturn_t e1000_intr(int irq, void *data)
1567{
1568 struct net_device *netdev = data;
1569 struct e1000_adapter *adapter = netdev_priv(netdev);
1570 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1571 u32 rctl, icr = er32(ICR);
4662e82b 1572
a68ea775 1573 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1574 return IRQ_NONE; /* Not our interrupt */
1575
ad68076e
BA		 1576 /*
1577 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1578 * not set, then the adapter didn't send an interrupt
1579 */
bc7f75fa
AK		 1580 if (!(icr & E1000_ICR_INT_ASSERTED))
1581 return IRQ_NONE;
1582
ad68076e
BA		 1583 /*
1584 * Interrupt Auto-Mask...upon reading ICR,
1585 * interrupts are masked. No need for the
1586 * IMC write
1587 */
bc7f75fa 1588
573cca8c 1589 if (icr & E1000_ICR_LSC) {
bc7f75fa 1590 hw->mac.get_link_status = 1;
ad68076e
BA		 1591 /*
1592 * ICH8 workaround-- Call gig speed drop workaround on cable
1593 * disconnect (LSC) before accessing any PHY registers
1594 */
bc7f75fa
AK		 1595 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1596 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1597 schedule_work(&adapter->downshift_task);
bc7f75fa 1598
ad68076e
BA		 1599 /*
1600 * 80003ES2LAN workaround--
bc7f75fa
AK		 1601 * For packet buffer work-around on link down event;
1602 * disable receives here in the ISR and
1603 * reset adapter in watchdog
1604 */
1605 if (netif_carrier_ok(netdev) &&
1606 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1607 /* disable receives */
1608 rctl = er32(RCTL);
1609 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1610 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1611 }
1612 /* guard against interrupt when we're going down */
1613 if (!test_bit(__E1000_DOWN, &adapter->state))
1614 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1615 }
1616
288379f0 1617 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1618 adapter->total_tx_bytes = 0;
1619 adapter->total_tx_packets = 0;
1620 adapter->total_rx_bytes = 0;
1621 adapter->total_rx_packets = 0;
288379f0 1622 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1623 }
1624
1625 return IRQ_HANDLED;
1626}
1627
4662e82b
BA		 1628static irqreturn_t e1000_msix_other(int irq, void *data)
1629{
1630 struct net_device *netdev = data;
1631 struct e1000_adapter *adapter = netdev_priv(netdev);
1632 struct e1000_hw *hw = &adapter->hw;
1633 u32 icr = er32(ICR);
1634
1635 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1636 if (!test_bit(__E1000_DOWN, &adapter->state))
1637 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1638 return IRQ_NONE;
1639 }
1640
1641 if (icr & adapter->eiac_mask)
1642 ew32(ICS, (icr & adapter->eiac_mask));
1643
1644 if (icr & E1000_ICR_OTHER) {
1645 if (!(icr & E1000_ICR_LSC))
1646 goto no_link_interrupt;
1647 hw->mac.get_link_status = 1;
1648 /* guard against interrupt when we're going down */
1649 if (!test_bit(__E1000_DOWN, &adapter->state))
1650 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1651 }
1652
1653no_link_interrupt:
a3c69fef
JB		 1654 if (!test_bit(__E1000_DOWN, &adapter->state))
1655 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1656
1657 return IRQ_HANDLED;
1658}
1659
1660
1661static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1662{
1663 struct net_device *netdev = data;
1664 struct e1000_adapter *adapter = netdev_priv(netdev);
1665 struct e1000_hw *hw = &adapter->hw;
1666 struct e1000_ring *tx_ring = adapter->tx_ring;
1667
1668
1669 adapter->total_tx_bytes = 0;
1670 adapter->total_tx_packets = 0;
1671
1672 if (!e1000_clean_tx_irq(adapter))
1673 /* Ring was not completely cleaned, so fire another interrupt */
1674 ew32(ICS, tx_ring->ims_val);
1675
1676 return IRQ_HANDLED;
1677}
1678
1679static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1680{
1681 struct net_device *netdev = data;
1682 struct e1000_adapter *adapter = netdev_priv(netdev);
1683
1684 /* Write the ITR value calculated at the end of the
1685 * previous interrupt.
1686 */
1687 if (adapter->rx_ring->set_itr) {
1688 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1689 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1690 adapter->rx_ring->set_itr = 0;
1691 }
1692
288379f0 1693 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1694 adapter->total_rx_bytes = 0;
1695 adapter->total_rx_packets = 0;
288379f0 1696 __napi_schedule(&adapter->napi);
4662e82b
BA		 1697 }
1698 return IRQ_HANDLED;
1699}
1700
1701/**
1702 * e1000_configure_msix - Configure MSI-X hardware
1703 *
1704 * e1000_configure_msix sets up the hardware to properly
1705 * generate MSI-X interrupts.
1706 **/
1707static void e1000_configure_msix(struct e1000_adapter *adapter)
1708{
1709 struct e1000_hw *hw = &adapter->hw;
1710 struct e1000_ring *rx_ring = adapter->rx_ring;
1711 struct e1000_ring *tx_ring = adapter->tx_ring;
1712 int vector = 0;
1713 u32 ctrl_ext, ivar = 0;
1714
1715 adapter->eiac_mask = 0;
1716
1717 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1718 if (hw->mac.type == e1000_82574) {
1719 u32 rfctl = er32(RFCTL);
1720 rfctl |= E1000_RFCTL_ACK_DIS;
1721 ew32(RFCTL, rfctl);
1722 }
1723
1724#define E1000_IVAR_INT_ALLOC_VALID 0x8
1725 /* Configure Rx vector */
1726 rx_ring->ims_val = E1000_IMS_RXQ0;
1727 adapter->eiac_mask |= rx_ring->ims_val;
1728 if (rx_ring->itr_val)
1729 writel(1000000000 / (rx_ring->itr_val * 256),
1730 hw->hw_addr + rx_ring->itr_register);
1731 else
1732 writel(1, hw->hw_addr + rx_ring->itr_register);
1733 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1734
1735 /* Configure Tx vector */
1736 tx_ring->ims_val = E1000_IMS_TXQ0;
1737 vector++;
1738 if (tx_ring->itr_val)
1739 writel(1000000000 / (tx_ring->itr_val * 256),
1740 hw->hw_addr + tx_ring->itr_register);
1741 else
1742 writel(1, hw->hw_addr + tx_ring->itr_register);
1743 adapter->eiac_mask |= tx_ring->ims_val;
1744 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1745
1746 /* set vector for Other Causes, e.g. link changes */
1747 vector++;
1748 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1749 if (rx_ring->itr_val)
1750 writel(1000000000 / (rx_ring->itr_val * 256),
1751 hw->hw_addr + E1000_EITR_82574(vector));
1752 else
1753 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1754
1755 /* Cause Tx interrupts on every write back */
1756 ivar |= (1 << 31);
1757
1758 ew32(IVAR, ivar);
1759
1760 /* enable MSI-X PBA support */
1761 ctrl_ext = er32(CTRL_EXT);
1762 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1763
1764 /* Auto-Mask Other interrupts upon ICR read */
1765#define E1000_EIAC_MASK_82574 0x01F00000
1766 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1767 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1768 ew32(CTRL_EXT, ctrl_ext);
1769 e1e_flush();
1770}
1771
1772void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1773{
1774 if (adapter->msix_entries) {
1775 pci_disable_msix(adapter->pdev);
1776 kfree(adapter->msix_entries);
1777 adapter->msix_entries = NULL;
1778 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1779 pci_disable_msi(adapter->pdev);
1780 adapter->flags &= ~FLAG_MSI_ENABLED;
1781 }
4662e82b
BA		 1782}
1783
1784/**
1785 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1786 *
1787 * Attempt to configure interrupts using the best available
1788 * capabilities of the hardware and kernel.
1789 **/
1790void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1791{
1792 int err;
8e86acd7 1793 int i;
4662e82b
BA		 1794
1795 switch (adapter->int_mode) {
1796 case E1000E_INT_MODE_MSIX:
1797 if (adapter->flags & FLAG_HAS_MSIX) {
8e86acd7
JK		 1798 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1799 adapter->msix_entries = kcalloc(adapter->num_vectors,
4662e82b
BA		 1800 sizeof(struct msix_entry),
1801 GFP_KERNEL);
1802 if (adapter->msix_entries) {
8e86acd7 1803 for (i = 0; i < adapter->num_vectors; i++)
4662e82b
BA		 1804 adapter->msix_entries[i].entry = i;
1805
1806 err = pci_enable_msix(adapter->pdev,
1807 adapter->msix_entries,
8e86acd7
JK		 1808 adapter->num_vectors);
1809 if (err == 0) {
4662e82b 1810 return;
8e86acd7 1811 }
4662e82b
BA		 1812 }
1813 /* MSI-X failed, so fall through and try MSI */
1814 e_err("Failed to initialize MSI-X interrupts. "
1815 "Falling back to MSI interrupts.\n");
1816 e1000e_reset_interrupt_capability(adapter);
1817 }
1818 adapter->int_mode = E1000E_INT_MODE_MSI;
1819 /* Fall through */
1820 case E1000E_INT_MODE_MSI:
1821 if (!pci_enable_msi(adapter->pdev)) {
1822 adapter->flags |= FLAG_MSI_ENABLED;
1823 } else {
1824 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1825 e_err("Failed to initialize MSI interrupts. Falling "
1826 "back to legacy interrupts.\n");
1827 }
1828 /* Fall through */
1829 case E1000E_INT_MODE_LEGACY:
1830 /* Don't do anything; this is the system default */
1831 break;
1832 }
8e86acd7
JK		 1833
1834 /* store the number of vectors being used */
1835 adapter->num_vectors = 1;
4662e82b
BA		 1836}
1837
1838/**
1839 * e1000_request_msix - Initialize MSI-X interrupts
1840 *
1841 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1842 * kernel.
1843 **/
1844static int e1000_request_msix(struct e1000_adapter *adapter)
1845{
1846 struct net_device *netdev = adapter->netdev;
1847 int err = 0, vector = 0;
1848
1849 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1850 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1851 else
1852 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1853 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1854 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1855 netdev);
1856 if (err)
1857 goto out;
1858 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1859 adapter->rx_ring->itr_val = adapter->itr;
1860 vector++;
1861
1862 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1863 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1864 else
1865 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1866 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1867 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1868 netdev);
1869 if (err)
1870 goto out;
1871 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1872 adapter->tx_ring->itr_val = adapter->itr;
1873 vector++;
1874
1875 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1876 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1877 if (err)
1878 goto out;
1879
1880 e1000_configure_msix(adapter);
1881 return 0;
1882out:
1883 return err;
1884}
1885
f8d59f78
BA		 1886/**
1887 * e1000_request_irq - initialize interrupts
1888 *
1889 * Attempts to configure interrupts using the best available
1890 * capabilities of the hardware and kernel.
1891 **/
bc7f75fa
AK		 1892static int e1000_request_irq(struct e1000_adapter *adapter)
1893{
1894 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1895 int err;
1896
4662e82b
BA		 1897 if (adapter->msix_entries) {
1898 err = e1000_request_msix(adapter);
1899 if (!err)
1900 return err;
1901 /* fall back to MSI */
1902 e1000e_reset_interrupt_capability(adapter);
1903 adapter->int_mode = E1000E_INT_MODE_MSI;
1904 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1905 }
4662e82b 1906 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1907 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1908 netdev->name, netdev);
1909 if (!err)
1910 return err;
bc7f75fa 1911
4662e82b
BA		 1912 /* fall back to legacy interrupt */
1913 e1000e_reset_interrupt_capability(adapter);
1914 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1915 }
1916
a0607fd3 1917 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1918 netdev->name, netdev);
1919 if (err)
1920 e_err("Unable to allocate interrupt, Error: %d\n", err);
1921
bc7f75fa
AK		 1922 return err;
1923}
1924
1925static void e1000_free_irq(struct e1000_adapter *adapter)
1926{
1927 struct net_device *netdev = adapter->netdev;
1928
4662e82b
BA		 1929 if (adapter->msix_entries) {
1930 int vector = 0;
1931
1932 free_irq(adapter->msix_entries[vector].vector, netdev);
1933 vector++;
1934
1935 free_irq(adapter->msix_entries[vector].vector, netdev);
1936 vector++;
1937
1938 /* Other Causes interrupt vector */
1939 free_irq(adapter->msix_entries[vector].vector, netdev);
1940 return;
bc7f75fa 1941 }
4662e82b
BA		 1942
1943 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1944}
1945
1946/**
1947 * e1000_irq_disable - Mask off interrupt generation on the NIC
1948 **/
1949static void e1000_irq_disable(struct e1000_adapter *adapter)
1950{
1951 struct e1000_hw *hw = &adapter->hw;
1952
bc7f75fa 1953 ew32(IMC, ~0);
4662e82b
BA		 1954 if (adapter->msix_entries)
1955 ew32(EIAC_82574, 0);
bc7f75fa 1956 e1e_flush();
8e86acd7
JK		 1957
1958 if (adapter->msix_entries) {
1959 int i;
1960 for (i = 0; i < adapter->num_vectors; i++)
1961 synchronize_irq(adapter->msix_entries[i].vector);
1962 } else {
1963 synchronize_irq(adapter->pdev->irq);
1964 }
bc7f75fa
AK		 1965}
1966
1967/**
1968 * e1000_irq_enable - Enable default interrupt generation settings
1969 **/
1970static void e1000_irq_enable(struct e1000_adapter *adapter)
1971{
1972 struct e1000_hw *hw = &adapter->hw;
1973
4662e82b
BA		 1974 if (adapter->msix_entries) {
1975 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1976 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1977 } else {
1978 ew32(IMS, IMS_ENABLE_MASK);
1979 }
74ef9c39 1980 e1e_flush();
bc7f75fa
AK		 1981}
1982
1983/**
1984 * e1000_get_hw_control - get control of the h/w from f/w
1985 * @adapter: address of board private structure
1986 *
489815ce 1987 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1988 * For ASF and Pass Through versions of f/w this means that
1989 * the driver is loaded. For AMT version (only with 82573)
1990 * of the f/w this means that the network i/f is open.
1991 **/
1992static void e1000_get_hw_control(struct e1000_adapter *adapter)
1993{
1994 struct e1000_hw *hw = &adapter->hw;
1995 u32 ctrl_ext;
1996 u32 swsm;
1997
1998 /* Let firmware know the driver has taken over */
1999 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2000 swsm = er32(SWSM);
2001 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2002 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2003 ctrl_ext = er32(CTRL_EXT);
ad68076e 2004 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2005 }
2006}
2007
2008/**
2009 * e1000_release_hw_control - release control of the h/w to f/w
2010 * @adapter: address of board private structure
2011 *
489815ce 2012 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2013 * For ASF and Pass Through versions of f/w this means that the
2014 * driver is no longer loaded. For AMT version (only with 82573) i
2015 * of the f/w this means that the network i/f is closed.
2016 *
2017 **/
2018static void e1000_release_hw_control(struct e1000_adapter *adapter)
2019{
2020 struct e1000_hw *hw = &adapter->hw;
2021 u32 ctrl_ext;
2022 u32 swsm;
2023
2024 /* Let firmware taken over control of h/w */
2025 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2026 swsm = er32(SWSM);
2027 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2028 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2029 ctrl_ext = er32(CTRL_EXT);
ad68076e 2030 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2031 }
2032}
2033
bc7f75fa
AK		 2034/**
2035 * @e1000_alloc_ring - allocate memory for a ring structure
2036 **/
2037static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2038 struct e1000_ring *ring)
2039{
2040 struct pci_dev *pdev = adapter->pdev;
2041
2042 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2043 GFP_KERNEL);
2044 if (!ring->desc)
2045 return -ENOMEM;
2046
2047 return 0;
2048}
2049
2050/**
2051 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2052 * @adapter: board private structure
2053 *
2054 * Return 0 on success, negative on failure
2055 **/
2056int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2057{
2058 struct e1000_ring *tx_ring = adapter->tx_ring;
2059 int err = -ENOMEM, size;
2060
2061 size = sizeof(struct e1000_buffer) * tx_ring->count;
89bf67f1 2062 tx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2063 if (!tx_ring->buffer_info)
2064 goto err;
bc7f75fa
AK		 2065
2066 /* round up to nearest 4K */
2067 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2068 tx_ring->size = ALIGN(tx_ring->size, 4096);
2069
2070 err = e1000_alloc_ring_dma(adapter, tx_ring);
2071 if (err)
2072 goto err;
2073
2074 tx_ring->next_to_use = 0;
2075 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2076
2077 return 0;
2078err:
2079 vfree(tx_ring->buffer_info);
44defeb3 2080 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2081 return err;
2082}
2083
2084/**
2085 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2086 * @adapter: board private structure
2087 *
2088 * Returns 0 on success, negative on failure
2089 **/
2090int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2091{
2092 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2093 struct e1000_buffer *buffer_info;
2094 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2095
2096 size = sizeof(struct e1000_buffer) * rx_ring->count;
89bf67f1 2097 rx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2098 if (!rx_ring->buffer_info)
2099 goto err;
bc7f75fa 2100
47f44e40
AK		 2101 for (i = 0; i < rx_ring->count; i++) {
2102 buffer_info = &rx_ring->buffer_info[i];
2103 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2104 sizeof(struct e1000_ps_page),
2105 GFP_KERNEL);
2106 if (!buffer_info->ps_pages)
2107 goto err_pages;
2108 }
bc7f75fa
AK		 2109
2110 desc_len = sizeof(union e1000_rx_desc_packet_split);
2111
2112 /* Round up to nearest 4K */
2113 rx_ring->size = rx_ring->count * desc_len;
2114 rx_ring->size = ALIGN(rx_ring->size, 4096);
2115
2116 err = e1000_alloc_ring_dma(adapter, rx_ring);
2117 if (err)
47f44e40 2118 goto err_pages;
bc7f75fa
AK		 2119
2120 rx_ring->next_to_clean = 0;
2121 rx_ring->next_to_use = 0;
2122 rx_ring->rx_skb_top = NULL;
2123
2124 return 0;
47f44e40
AK		 2125
2126err_pages:
2127 for (i = 0; i < rx_ring->count; i++) {
2128 buffer_info = &rx_ring->buffer_info[i];
2129 kfree(buffer_info->ps_pages);
2130 }
bc7f75fa
AK		 2131err:
2132 vfree(rx_ring->buffer_info);
44defeb3 2133 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2134 return err;
2135}
2136
2137/**
2138 * e1000_clean_tx_ring - Free Tx Buffers
2139 * @adapter: board private structure
2140 **/
2141static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2142{
2143 struct e1000_ring *tx_ring = adapter->tx_ring;
2144 struct e1000_buffer *buffer_info;
2145 unsigned long size;
2146 unsigned int i;
2147
2148 for (i = 0; i < tx_ring->count; i++) {
2149 buffer_info = &tx_ring->buffer_info[i];
2150 e1000_put_txbuf(adapter, buffer_info);
2151 }
2152
2153 size = sizeof(struct e1000_buffer) * tx_ring->count;
2154 memset(tx_ring->buffer_info, 0, size);
2155
2156 memset(tx_ring->desc, 0, tx_ring->size);
2157
2158 tx_ring->next_to_use = 0;
2159 tx_ring->next_to_clean = 0;
2160
2161 writel(0, adapter->hw.hw_addr + tx_ring->head);
2162 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2163}
2164
2165/**
2166 * e1000e_free_tx_resources - Free Tx Resources per Queue
2167 * @adapter: board private structure
2168 *
2169 * Free all transmit software resources
2170 **/
2171void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2172{
2173 struct pci_dev *pdev = adapter->pdev;
2174 struct e1000_ring *tx_ring = adapter->tx_ring;
2175
2176 e1000_clean_tx_ring(adapter);
2177
2178 vfree(tx_ring->buffer_info);
2179 tx_ring->buffer_info = NULL;
2180
2181 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2182 tx_ring->dma);
2183 tx_ring->desc = NULL;
2184}
2185
2186/**
2187 * e1000e_free_rx_resources - Free Rx Resources
2188 * @adapter: board private structure
2189 *
2190 * Free all receive software resources
2191 **/
2192
2193void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2194{
2195 struct pci_dev *pdev = adapter->pdev;
2196 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2197 int i;
bc7f75fa
AK		 2198
2199 e1000_clean_rx_ring(adapter);
2200
47f44e40
AK		 2201 for (i = 0; i < rx_ring->count; i++) {
2202 kfree(rx_ring->buffer_info[i].ps_pages);
2203 }
2204
bc7f75fa
AK		 2205 vfree(rx_ring->buffer_info);
2206 rx_ring->buffer_info = NULL;
2207
bc7f75fa
AK		 2208 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2209 rx_ring->dma);
2210 rx_ring->desc = NULL;
2211}
2212
2213/**
2214 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2215 * @adapter: pointer to adapter
2216 * @itr_setting: current adapter->itr
2217 * @packets: the number of packets during this measurement interval
2218 * @bytes: the number of bytes during this measurement interval
2219 *
bc7f75fa
AK		 2220 * Stores a new ITR value based on packets and byte
2221 * counts during the last interrupt. The advantage of per interrupt
2222 * computation is faster updates and more accurate ITR for the current
2223 * traffic pattern. Constants in this function were computed
2224 * based on theoretical maximum wire speed and thresholds were set based
2225 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2226 * while increasing bulk throughput. This functionality is controlled
2227 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2228 **/
2229static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2230 u16 itr_setting, int packets,
2231 int bytes)
2232{
2233 unsigned int retval = itr_setting;
2234
2235 if (packets == 0)
2236 goto update_itr_done;
2237
2238 switch (itr_setting) {
2239 case lowest_latency:
2240 /* handle TSO and jumbo frames */
2241 if (bytes/packets > 8000)
2242 retval = bulk_latency;
2243 else if ((packets < 5) && (bytes > 512)) {
2244 retval = low_latency;
2245 }
2246 break;
2247 case low_latency: /* 50 usec aka 20000 ints/s */
2248 if (bytes > 10000) {
2249 /* this if handles the TSO accounting */
2250 if (bytes/packets > 8000) {
2251 retval = bulk_latency;
2252 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2253 retval = bulk_latency;
2254 } else if ((packets > 35)) {
2255 retval = lowest_latency;
2256 }
2257 } else if (bytes/packets > 2000) {
2258 retval = bulk_latency;
2259 } else if (packets <= 2 && bytes < 512) {
2260 retval = lowest_latency;
2261 }
2262 break;
2263 case bulk_latency: /* 250 usec aka 4000 ints/s */
2264 if (bytes > 25000) {
2265 if (packets > 35) {
2266 retval = low_latency;
2267 }
2268 } else if (bytes < 6000) {
2269 retval = low_latency;
2270 }
2271 break;
2272 }
2273
2274update_itr_done:
2275 return retval;
2276}
2277
2278static void e1000_set_itr(struct e1000_adapter *adapter)
2279{
2280 struct e1000_hw *hw = &adapter->hw;
2281 u16 current_itr;
2282 u32 new_itr = adapter->itr;
2283
2284 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2285 if (adapter->link_speed != SPEED_1000) {
2286 current_itr = 0;
2287 new_itr = 4000;
2288 goto set_itr_now;
2289 }
2290
828bac87
BA		 2291 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2292 new_itr = 0;
2293 goto set_itr_now;
2294 }
2295
bc7f75fa
AK		 2296 adapter->tx_itr = e1000_update_itr(adapter,
2297 adapter->tx_itr,
2298 adapter->total_tx_packets,
2299 adapter->total_tx_bytes);
2300 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2301 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2302 adapter->tx_itr = low_latency;
2303
2304 adapter->rx_itr = e1000_update_itr(adapter,
2305 adapter->rx_itr,
2306 adapter->total_rx_packets,
2307 adapter->total_rx_bytes);
2308 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2309 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2310 adapter->rx_itr = low_latency;
2311
2312 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2313
2314 switch (current_itr) {
2315 /* counts and packets in update_itr are dependent on these numbers */
2316 case lowest_latency:
2317 new_itr = 70000;
2318 break;
2319 case low_latency:
2320 new_itr = 20000; /* aka hwitr = ~200 */
2321 break;
2322 case bulk_latency:
2323 new_itr = 4000;
2324 break;
2325 default:
2326 break;
2327 }
2328
2329set_itr_now:
2330 if (new_itr != adapter->itr) {
ad68076e
BA		 2331 /*
2332 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2333 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2334 * increasing
2335 */
bc7f75fa
AK		 2336 new_itr = new_itr > adapter->itr ?
2337 min(adapter->itr + (new_itr >> 2), new_itr) :
2338 new_itr;
2339 adapter->itr = new_itr;
4662e82b
BA		 2340 adapter->rx_ring->itr_val = new_itr;
2341 if (adapter->msix_entries)
2342 adapter->rx_ring->set_itr = 1;
2343 else
828bac87
BA		 2344 if (new_itr)
2345 ew32(ITR, 1000000000 / (new_itr * 256));
2346 else
2347 ew32(ITR, 0);
bc7f75fa
AK		 2348 }
2349}
2350
4662e82b
BA		 2351/**
2352 * e1000_alloc_queues - Allocate memory for all rings
2353 * @adapter: board private structure to initialize
2354 **/
2355static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2356{
2357 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2358 if (!adapter->tx_ring)
2359 goto err;
2360
2361 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2362 if (!adapter->rx_ring)
2363 goto err;
2364
2365 return 0;
2366err:
2367 e_err("Unable to allocate memory for queues\n");
2368 kfree(adapter->rx_ring);
2369 kfree(adapter->tx_ring);
2370 return -ENOMEM;
2371}
2372
bc7f75fa
AK		 2373/**
2374 * e1000_clean - NAPI Rx polling callback
ad68076e 2375 * @napi: struct associated with this polling callback
489815ce 2376 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2377 **/
2378static int e1000_clean(struct napi_struct *napi, int budget)
2379{
2380 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2381 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2382 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2383 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2384
4cf1653a 2385 adapter = netdev_priv(poll_dev);
bc7f75fa 2386
4662e82b
BA		 2387 if (adapter->msix_entries &&
2388 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2389 goto clean_rx;
2390
92af3e95 2391 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2392
4662e82b 2393clean_rx:
bc7f75fa 2394 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2395
12d04a3c 2396 if (!tx_cleaned)
d2c7ddd6 2397 work_done = budget;
bc7f75fa 2398
53e52c72
DM		 2399 /* If budget not fully consumed, exit the polling mode */
2400 if (work_done < budget) {
bc7f75fa
AK		 2401 if (adapter->itr_setting & 3)
2402 e1000_set_itr(adapter);
288379f0 2403 napi_complete(napi);
a3c69fef
JB		 2404 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2405 if (adapter->msix_entries)
2406 ew32(IMS, adapter->rx_ring->ims_val);
2407 else
2408 e1000_irq_enable(adapter);
2409 }
bc7f75fa
AK		 2410 }
2411
2412 return work_done;
2413}
2414
2415static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2416{
2417 struct e1000_adapter *adapter = netdev_priv(netdev);
2418 struct e1000_hw *hw = &adapter->hw;
2419 u32 vfta, index;
2420
2421 /* don't update vlan cookie if already programmed */
2422 if ((adapter->hw.mng_cookie.status &
2423 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2424 (vid == adapter->mng_vlan_id))
2425 return;
caaddaf8 2426
bc7f75fa 2427 /* add VID to filter table */
caaddaf8
BA		 2428 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2429 index = (vid >> 5) & 0x7F;
2430 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2431 vfta |= (1 << (vid & 0x1F));
2432 hw->mac.ops.write_vfta(hw, index, vfta);
2433 }
bc7f75fa
AK		 2434}
2435
2436static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2437{
2438 struct e1000_adapter *adapter = netdev_priv(netdev);
2439 struct e1000_hw *hw = &adapter->hw;
2440 u32 vfta, index;
2441
74ef9c39
JB		 2442 if (!test_bit(__E1000_DOWN, &adapter->state))
2443 e1000_irq_disable(adapter);
bc7f75fa 2444 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2445
2446 if (!test_bit(__E1000_DOWN, &adapter->state))
2447 e1000_irq_enable(adapter);
bc7f75fa
AK		 2448
2449 if ((adapter->hw.mng_cookie.status &
2450 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2451 (vid == adapter->mng_vlan_id)) {
2452 /* release control to f/w */
2453 e1000_release_hw_control(adapter);
2454 return;
2455 }
2456
2457 /* remove VID from filter table */
caaddaf8
BA		 2458 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2459 index = (vid >> 5) & 0x7F;
2460 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2461 vfta &= ~(1 << (vid & 0x1F));
2462 hw->mac.ops.write_vfta(hw, index, vfta);
2463 }
bc7f75fa
AK		 2464}
2465
2466static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2467{
2468 struct net_device *netdev = adapter->netdev;
2469 u16 vid = adapter->hw.mng_cookie.vlan_id;
2470 u16 old_vid = adapter->mng_vlan_id;
2471
2472 if (!adapter->vlgrp)
2473 return;
2474
2475 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2476 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2477 if (adapter->hw.mng_cookie.status &
2478 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2479 e1000_vlan_rx_add_vid(netdev, vid);
2480 adapter->mng_vlan_id = vid;
2481 }
2482
2483 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2484 (vid != old_vid) &&
2485 !vlan_group_get_device(adapter->vlgrp, old_vid))
2486 e1000_vlan_rx_kill_vid(netdev, old_vid);
2487 } else {
2488 adapter->mng_vlan_id = vid;
2489 }
2490}
2491
2492
2493static void e1000_vlan_rx_register(struct net_device *netdev,
2494 struct vlan_group *grp)
2495{
2496 struct e1000_adapter *adapter = netdev_priv(netdev);
2497 struct e1000_hw *hw = &adapter->hw;
2498 u32 ctrl, rctl;
2499
74ef9c39
JB		 2500 if (!test_bit(__E1000_DOWN, &adapter->state))
2501 e1000_irq_disable(adapter);
bc7f75fa
AK		 2502 adapter->vlgrp = grp;
2503
2504 if (grp) {
2505 /* enable VLAN tag insert/strip */
2506 ctrl = er32(CTRL);
2507 ctrl |= E1000_CTRL_VME;
2508 ew32(CTRL, ctrl);
2509
2510 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2511 /* enable VLAN receive filtering */
2512 rctl = er32(RCTL);
bc7f75fa
AK		 2513 rctl &= ~E1000_RCTL_CFIEN;
2514 ew32(RCTL, rctl);
2515 e1000_update_mng_vlan(adapter);
2516 }
2517 } else {
2518 /* disable VLAN tag insert/strip */
2519 ctrl = er32(CTRL);
2520 ctrl &= ~E1000_CTRL_VME;
2521 ew32(CTRL, ctrl);
2522
2523 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2524 if (adapter->mng_vlan_id !=
2525 (u16)E1000_MNG_VLAN_NONE) {
2526 e1000_vlan_rx_kill_vid(netdev,
2527 adapter->mng_vlan_id);
2528 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2529 }
2530 }
2531 }
2532
74ef9c39
JB		 2533 if (!test_bit(__E1000_DOWN, &adapter->state))
2534 e1000_irq_enable(adapter);
bc7f75fa
AK		 2535}
2536
2537static void e1000_restore_vlan(struct e1000_adapter *adapter)
2538{
2539 u16 vid;
2540
2541 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2542
2543 if (!adapter->vlgrp)
2544 return;
2545
b738127d 2546 for (vid = 0; vid < VLAN_N_VID; vid++) {
bc7f75fa
AK		 2547 if (!vlan_group_get_device(adapter->vlgrp, vid))
2548 continue;
2549 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2550 }
2551}
2552
cd791618 2553static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2554{
2555 struct e1000_hw *hw = &adapter->hw;
cd791618 2556 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2557
2558 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2559 return;
2560
2561 manc = er32(MANC);
2562
ad68076e
BA		 2563 /*
2564 * enable receiving management packets to the host. this will probably
bc7f75fa 2565 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2566 * the packets will be handled on SMBUS
2567 */
bc7f75fa
AK		 2568 manc |= E1000_MANC_EN_MNG2HOST;
2569 manc2h = er32(MANC2H);
cd791618
BA		 2570
2571 switch (hw->mac.type) {
2572 default:
2573 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2574 break;
2575 case e1000_82574:
2576 case e1000_82583:
2577 /*
2578 * Check if IPMI pass-through decision filter already exists;
2579 * if so, enable it.
2580 */
2581 for (i = 0, j = 0; i < 8; i++) {
2582 mdef = er32(MDEF(i));
2583
2584 /* Ignore filters with anything other than IPMI ports */
3b21b508 2585 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2586 continue;
2587
2588 /* Enable this decision filter in MANC2H */
2589 if (mdef)
2590 manc2h |= (1 << i);
2591
2592 j |= mdef;
2593 }
2594
2595 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2596 break;
2597
2598 /* Create new decision filter in an empty filter */
2599 for (i = 0, j = 0; i < 8; i++)
2600 if (er32(MDEF(i)) == 0) {
2601 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2602 E1000_MDEF_PORT_664));
2603 manc2h |= (1 << 1);
2604 j++;
2605 break;
2606 }
2607
2608 if (!j)
2609 e_warn("Unable to create IPMI pass-through filter\n");
2610 break;
2611 }
2612
bc7f75fa
AK		 2613 ew32(MANC2H, manc2h);
2614 ew32(MANC, manc);
2615}
2616
2617/**
2618 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2619 * @adapter: board private structure
2620 *
2621 * Configure the Tx unit of the MAC after a reset.
2622 **/
2623static void e1000_configure_tx(struct e1000_adapter *adapter)
2624{
2625 struct e1000_hw *hw = &adapter->hw;
2626 struct e1000_ring *tx_ring = adapter->tx_ring;
2627 u64 tdba;
2628 u32 tdlen, tctl, tipg, tarc;
2629 u32 ipgr1, ipgr2;
2630
2631 /* Setup the HW Tx Head and Tail descriptor pointers */
2632 tdba = tx_ring->dma;
2633 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2634 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2635 ew32(TDBAH, (tdba >> 32));
2636 ew32(TDLEN, tdlen);
2637 ew32(TDH, 0);
2638 ew32(TDT, 0);
2639 tx_ring->head = E1000_TDH;
2640 tx_ring->tail = E1000_TDT;
2641
2642 /* Set the default values for the Tx Inter Packet Gap timer */
2643 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2644 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2645 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2646
2647 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2648 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2649
2650 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2651 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2652 ew32(TIPG, tipg);
2653
2654 /* Set the Tx Interrupt Delay register */
2655 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2656 /* Tx irq moderation */
bc7f75fa
AK		 2657 ew32(TADV, adapter->tx_abs_int_delay);
2658
3a3b7586
JB		 2659 if (adapter->flags2 & FLAG2_DMA_BURST) {
2660 u32 txdctl = er32(TXDCTL(0));
2661 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2662 E1000_TXDCTL_WTHRESH);
2663 /*
2664 * set up some performance related parameters to encourage the
2665 * hardware to use the bus more efficiently in bursts, depends
2666 * on the tx_int_delay to be enabled,
2667 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2668 * hthresh = 1 ==> prefetch when one or more available
2669 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2670 * BEWARE: this seems to work but should be considered first if
2671 * there are tx hangs or other tx related bugs
2672 */
2673 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2674 ew32(TXDCTL(0), txdctl);
2675 /* erratum work around: set txdctl the same for both queues */
2676 ew32(TXDCTL(1), txdctl);
2677 }
2678
bc7f75fa
AK		 2679 /* Program the Transmit Control Register */
2680 tctl = er32(TCTL);
2681 tctl &= ~E1000_TCTL_CT;
2682 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2683 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2684
2685 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2686 tarc = er32(TARC(0));
ad68076e
BA		 2687 /*
2688 * set the speed mode bit, we'll clear it if we're not at
2689 * gigabit link later
2690 */
bc7f75fa
AK		 2691#define SPEED_MODE_BIT (1 << 21)
2692 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2693 ew32(TARC(0), tarc);
bc7f75fa
AK		 2694 }
2695
2696 /* errata: program both queues to unweighted RR */
2697 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2698 tarc = er32(TARC(0));
bc7f75fa 2699 tarc |= 1;
e9ec2c0f
JK		 2700 ew32(TARC(0), tarc);
2701 tarc = er32(TARC(1));
bc7f75fa 2702 tarc |= 1;
e9ec2c0f 2703 ew32(TARC(1), tarc);
bc7f75fa
AK		 2704 }
2705
bc7f75fa
AK		 2706 /* Setup Transmit Descriptor Settings for eop descriptor */
2707 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2708
2709 /* only set IDE if we are delaying interrupts using the timers */
2710 if (adapter->tx_int_delay)
2711 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2712
2713 /* enable Report Status bit */
2714 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2715
2716 ew32(TCTL, tctl);
2717
edfea6e6 2718 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2719}
2720
2721/**
2722 * e1000_setup_rctl - configure the receive control registers
2723 * @adapter: Board private structure
2724 **/
2725#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2726 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2727static void e1000_setup_rctl(struct e1000_adapter *adapter)
2728{
2729 struct e1000_hw *hw = &adapter->hw;
2730 u32 rctl, rfctl;
2731 u32 psrctl = 0;
2732 u32 pages = 0;
2733
a1ce6473
BA		 2734 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2735 if (hw->mac.type == e1000_pch2lan) {
2736 s32 ret_val;
2737
2738 if (adapter->netdev->mtu > ETH_DATA_LEN)
2739 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2740 else
2741 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2742 }
2743
bc7f75fa
AK		 2744 /* Program MC offset vector base */
2745 rctl = er32(RCTL);
2746 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2747 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2748 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2749 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2750
2751 /* Do not Store bad packets */
2752 rctl &= ~E1000_RCTL_SBP;
2753
2754 /* Enable Long Packet receive */
2755 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2756 rctl &= ~E1000_RCTL_LPE;
2757 else
2758 rctl |= E1000_RCTL_LPE;
2759
eb7c3adb
JK		 2760 /* Some systems expect that the CRC is included in SMBUS traffic. The
2761 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2762 * host memory when this is enabled
2763 */
2764 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2765 rctl |= E1000_RCTL_SECRC;
5918bd88 2766
a4f58f54
BA		 2767 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2768 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2769 u16 phy_data;
2770
2771 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2772 phy_data &= 0xfff8;
2773 phy_data |= (1 << 2);
2774 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2775
2776 e1e_rphy(hw, 22, &phy_data);
2777 phy_data &= 0x0fff;
2778 phy_data |= (1 << 14);
2779 e1e_wphy(hw, 0x10, 0x2823);
2780 e1e_wphy(hw, 0x11, 0x0003);
2781 e1e_wphy(hw, 22, phy_data);
2782 }
2783
bc7f75fa
AK		 2784 /* Setup buffer sizes */
2785 rctl &= ~E1000_RCTL_SZ_4096;
2786 rctl |= E1000_RCTL_BSEX;
2787 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2788 case 2048:
2789 default:
2790 rctl |= E1000_RCTL_SZ_2048;
2791 rctl &= ~E1000_RCTL_BSEX;
2792 break;
2793 case 4096:
2794 rctl |= E1000_RCTL_SZ_4096;
2795 break;
2796 case 8192:
2797 rctl |= E1000_RCTL_SZ_8192;
2798 break;
2799 case 16384:
2800 rctl |= E1000_RCTL_SZ_16384;
2801 break;
2802 }
2803
2804 /*
2805 * 82571 and greater support packet-split where the protocol
2806 * header is placed in skb->data and the packet data is
2807 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2808 * In the case of a non-split, skb->data is linearly filled,
2809 * followed by the page buffers. Therefore, skb->data is
2810 * sized to hold the largest protocol header.
2811 *
2812 * allocations using alloc_page take too long for regular MTU
2813 * so only enable packet split for jumbo frames
2814 *
2815 * Using pages when the page size is greater than 16k wastes
2816 * a lot of memory, since we allocate 3 pages at all times
2817 * per packet.
2818 */
bc7f75fa 2819 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2820 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2821 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2822 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2823 else
2824 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2825
2826 if (adapter->rx_ps_pages) {
2827 /* Configure extra packet-split registers */
2828 rfctl = er32(RFCTL);
2829 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2830 /*
2831 * disable packet split support for IPv6 extension headers,
2832 * because some malformed IPv6 headers can hang the Rx
2833 */
bc7f75fa
AK		 2834 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2835 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2836
2837 ew32(RFCTL, rfctl);
2838
140a7480
AK		 2839 /* Enable Packet split descriptors */
2840 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2841
2842 psrctl |= adapter->rx_ps_bsize0 >>
2843 E1000_PSRCTL_BSIZE0_SHIFT;
2844
2845 switch (adapter->rx_ps_pages) {
2846 case 3:
2847 psrctl |= PAGE_SIZE <<
2848 E1000_PSRCTL_BSIZE3_SHIFT;
2849 case 2:
2850 psrctl |= PAGE_SIZE <<
2851 E1000_PSRCTL_BSIZE2_SHIFT;
2852 case 1:
2853 psrctl |= PAGE_SIZE >>
2854 E1000_PSRCTL_BSIZE1_SHIFT;
2855 break;
2856 }
2857
2858 ew32(PSRCTL, psrctl);
2859 }
2860
2861 ew32(RCTL, rctl);
318a94d6
JK		 2862 /* just started the receive unit, no need to restart */
2863 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2864}
2865
2866/**
2867 * e1000_configure_rx - Configure Receive Unit after Reset
2868 * @adapter: board private structure
2869 *
2870 * Configure the Rx unit of the MAC after a reset.
2871 **/
2872static void e1000_configure_rx(struct e1000_adapter *adapter)
2873{
2874 struct e1000_hw *hw = &adapter->hw;
2875 struct e1000_ring *rx_ring = adapter->rx_ring;
2876 u64 rdba;
2877 u32 rdlen, rctl, rxcsum, ctrl_ext;
2878
2879 if (adapter->rx_ps_pages) {
2880 /* this is a 32 byte descriptor */
2881 rdlen = rx_ring->count *
2882 sizeof(union e1000_rx_desc_packet_split);
2883 adapter->clean_rx = e1000_clean_rx_irq_ps;
2884 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2885 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2886 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2887 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2888 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2889 } else {
97ac8cae 2890 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2891 adapter->clean_rx = e1000_clean_rx_irq;
2892 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2893 }
2894
2895 /* disable receives while setting up the descriptors */
2896 rctl = er32(RCTL);
2897 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2898 e1e_flush();
2899 msleep(10);
2900
3a3b7586
JB		 2901 if (adapter->flags2 & FLAG2_DMA_BURST) {
2902 /*
2903 * set the writeback threshold (only takes effect if the RDTR
2904 * is set). set GRAN=1 and write back up to 0x4 worth, and
2905 * enable prefetching of 0x20 rx descriptors
2906 * granularity = 01
2907 * wthresh = 04,
2908 * hthresh = 04,
2909 * pthresh = 0x20
2910 */
2911 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
2912 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
2913
2914 /*
2915 * override the delay timers for enabling bursting, only if
2916 * the value was not set by the user via module options
2917 */
2918 if (adapter->rx_int_delay == DEFAULT_RDTR)
2919 adapter->rx_int_delay = BURST_RDTR;
2920 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
2921 adapter->rx_abs_int_delay = BURST_RADV;
2922 }
2923
bc7f75fa
AK		 2924 /* set the Receive Delay Timer Register */
2925 ew32(RDTR, adapter->rx_int_delay);
2926
2927 /* irq moderation */
2928 ew32(RADV, adapter->rx_abs_int_delay);
828bac87 2929 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
ad68076e 2930 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2931
2932 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2933 /* Auto-Mask interrupts upon ICR access */
2934 ctrl_ext |= E1000_CTRL_EXT_IAME;
2935 ew32(IAM, 0xffffffff);
2936 ew32(CTRL_EXT, ctrl_ext);
2937 e1e_flush();
2938
ad68076e
BA		 2939 /*
2940 * Setup the HW Rx Head and Tail Descriptor Pointers and
2941 * the Base and Length of the Rx Descriptor Ring
2942 */
bc7f75fa 2943 rdba = rx_ring->dma;
284901a9 2944 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2945 ew32(RDBAH, (rdba >> 32));
2946 ew32(RDLEN, rdlen);
2947 ew32(RDH, 0);
2948 ew32(RDT, 0);
2949 rx_ring->head = E1000_RDH;
2950 rx_ring->tail = E1000_RDT;
2951
2952 /* Enable Receive Checksum Offload for TCP and UDP */
2953 rxcsum = er32(RXCSUM);
2954 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2955 rxcsum |= E1000_RXCSUM_TUOFL;
2956
ad68076e
BA		 2957 /*
2958 * IPv4 payload checksum for UDP fragments must be
2959 * used in conjunction with packet-split.
2960 */
bc7f75fa
AK		 2961 if (adapter->rx_ps_pages)
2962 rxcsum |= E1000_RXCSUM_IPPCSE;
2963 } else {
2964 rxcsum &= ~E1000_RXCSUM_TUOFL;
2965 /* no need to clear IPPCSE as it defaults to 0 */
2966 }
2967 ew32(RXCSUM, rxcsum);
2968
ad68076e
BA		 2969 /*
2970 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2971 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2972 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2973 */
828bac87
BA		 2974 if ((adapter->flags & FLAG_HAS_ERT) ||
2975 (adapter->hw.mac.type == e1000_pch2lan)) {
53ec5498
BA		 2976 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2977 u32 rxdctl = er32(RXDCTL(0));
2978 ew32(RXDCTL(0), rxdctl | 0x3);
828bac87
BA		 2979 if (adapter->flags & FLAG_HAS_ERT)
2980 ew32(ERT, E1000_ERT_2048 | (1 << 13));
53ec5498
BA		 2981 /*
2982 * With jumbo frames and early-receive enabled,
2983 * excessive C-state transition latencies result in
2984 * dropped transactions.
2985 */
ed77134b 2986 pm_qos_update_request(
82f68251 2987 &adapter->netdev->pm_qos_req, 55);
53ec5498 2988 } else {
ed77134b 2989 pm_qos_update_request(
82f68251 2990 &adapter->netdev->pm_qos_req,
ed77134b 2991 PM_QOS_DEFAULT_VALUE);
53ec5498 2992 }
97ac8cae 2993 }
bc7f75fa
AK		 2994
2995 /* Enable Receives */
2996 ew32(RCTL, rctl);
2997}
2998
2999/**
e2de3eb6 3000 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 3001 * @hw: pointer to the HW structure
3002 * @mc_addr_list: array of multicast addresses to program
3003 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 3004 *
ab8932f3 3005 * Updates the Multicast Table Array.
bc7f75fa 3006 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 3007 **/
e2de3eb6 3008static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 3009 u32 mc_addr_count)
bc7f75fa 3010{
ab8932f3 3011 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 3012}
3013
3014/**
3015 * e1000_set_multi - Multicast and Promiscuous mode set
3016 * @netdev: network interface device structure
3017 *
3018 * The set_multi entry point is called whenever the multicast address
3019 * list or the network interface flags are updated. This routine is
3020 * responsible for configuring the hardware for proper multicast,
3021 * promiscuous mode, and all-multi behavior.
3022 **/
3023static void e1000_set_multi(struct net_device *netdev)
3024{
3025 struct e1000_adapter *adapter = netdev_priv(netdev);
3026 struct e1000_hw *hw = &adapter->hw;
22bedad3 3027 struct netdev_hw_addr *ha;
bc7f75fa
AK		 3028 u8 *mta_list;
3029 u32 rctl;
3030 int i;
3031
3032 /* Check for Promiscuous and All Multicast modes */
3033
3034 rctl = er32(RCTL);
3035
3036 if (netdev->flags & IFF_PROMISC) {
3037 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 3038 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 3039 } else {
746b9f02
PM		 3040 if (netdev->flags & IFF_ALLMULTI) {
3041 rctl |= E1000_RCTL_MPE;
3042 rctl &= ~E1000_RCTL_UPE;
3043 } else {
3044 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3045 }
78ed11a5 3046 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 3047 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 3048 }
3049
3050 ew32(RCTL, rctl);
3051
7aeef972
JP		 3052 if (!netdev_mc_empty(netdev)) {
3053 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 3054 if (!mta_list)
3055 return;
3056
3057 /* prepare a packed array of only addresses. */
7aeef972 3058 i = 0;
22bedad3
JP		 3059 netdev_for_each_mc_addr(ha, netdev)
3060 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 3061
ab8932f3 3062 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 3063 kfree(mta_list);
3064 } else {
3065 /*
3066 * if we're called from probe, we might not have
3067 * anything to do here, so clear out the list
3068 */
ab8932f3 3069 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 3070 }
3071}
3072
3073/**
ad68076e 3074 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3075 * @adapter: private board structure
3076 **/
3077static void e1000_configure(struct e1000_adapter *adapter)
3078{
3079 e1000_set_multi(adapter->netdev);
3080
3081 e1000_restore_vlan(adapter);
cd791618 3082 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3083
3084 e1000_configure_tx(adapter);
3085 e1000_setup_rctl(adapter);
3086 e1000_configure_rx(adapter);
ad68076e 3087 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3088}
3089
3090/**
3091 * e1000e_power_up_phy - restore link in case the phy was powered down
3092 * @adapter: address of board private structure
3093 *
3094 * The phy may be powered down to save power and turn off link when the
3095 * driver is unloaded and wake on lan is not enabled (among others)
3096 * *** this routine MUST be followed by a call to e1000e_reset ***
3097 **/
3098void e1000e_power_up_phy(struct e1000_adapter *adapter)
3099{
17f208de
BA		 3100 if (adapter->hw.phy.ops.power_up)
3101 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3102
3103 adapter->hw.mac.ops.setup_link(&adapter->hw);
3104}
3105
3106/**
3107 * e1000_power_down_phy - Power down the PHY
3108 *
17f208de
BA		 3109 * Power down the PHY so no link is implied when interface is down.
3110 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3111 */
3112static void e1000_power_down_phy(struct e1000_adapter *adapter)
3113{
bc7f75fa 3114 /* WoL is enabled */
23b66e2b 3115 if (adapter->wol)
bc7f75fa
AK		 3116 return;
3117
17f208de
BA		 3118 if (adapter->hw.phy.ops.power_down)
3119 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3120}
3121
3122/**
3123 * e1000e_reset - bring the hardware into a known good state
3124 *
3125 * This function boots the hardware and enables some settings that
3126 * require a configuration cycle of the hardware - those cannot be
3127 * set/changed during runtime. After reset the device needs to be
ad68076e 3128 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3129 */
3130void e1000e_reset(struct e1000_adapter *adapter)
3131{
3132 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3133 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3134 struct e1000_hw *hw = &adapter->hw;
3135 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3136 u32 pba = adapter->pba;
bc7f75fa
AK		 3137 u16 hwm;
3138
ad68076e 3139 /* reset Packet Buffer Allocation to default */
318a94d6 3140 ew32(PBA, pba);
df762464 3141
318a94d6 3142 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3143 /*
3144 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3145 * large enough to accommodate two full transmit packets,
3146 * rounded up to the next 1KB and expressed in KB. Likewise,
3147 * the Rx FIFO should be large enough to accommodate at least
3148 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3149 * expressed in KB.
3150 */
df762464 3151 pba = er32(PBA);
bc7f75fa 3152 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3153 tx_space = pba >> 16;
bc7f75fa 3154 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3155 pba &= 0xffff;
ad68076e
BA		 3156 /*
3157 * the Tx fifo also stores 16 bytes of information about the tx
3158 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3159 */
3160 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3161 sizeof(struct e1000_tx_desc) -
3162 ETH_FCS_LEN) * 2;
3163 min_tx_space = ALIGN(min_tx_space, 1024);
3164 min_tx_space >>= 10;
3165 /* software strips receive CRC, so leave room for it */
318a94d6 3166 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3167 min_rx_space = ALIGN(min_rx_space, 1024);
3168 min_rx_space >>= 10;
3169
ad68076e
BA		 3170 /*
3171 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3172 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3173 * allocation, take space away from current Rx allocation
3174 */
df762464
AK		 3175 if ((tx_space < min_tx_space) &&
3176 ((min_tx_space - tx_space) < pba)) {
3177 pba -= min_tx_space - tx_space;
bc7f75fa 3178
ad68076e
BA		 3179 /*
3180 * if short on Rx space, Rx wins and must trump tx
3181 * adjustment or use Early Receive if available
3182 */
df762464 3183 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3184 (!(adapter->flags & FLAG_HAS_ERT)))
3185 /* ERT enabled in e1000_configure_rx */
df762464 3186 pba = min_rx_space;
bc7f75fa 3187 }
df762464
AK		 3188
3189 ew32(PBA, pba);
bc7f75fa
AK		 3190 }
3191
bc7f75fa 3192
ad68076e
BA		 3193 /*
3194 * flow control settings
3195 *
38eb394e 3196 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3197 * (or the size used for early receive) above it in the Rx FIFO.
3198 * Set it to the lower of:
3199 * - 90% of the Rx FIFO size, and
3200 * - the full Rx FIFO size minus the early receive size (for parts
3201 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3202 * - the full Rx FIFO size minus one full frame
ad68076e 3203 */
d3738bb8
BA		 3204 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3205 fc->pause_time = 0xFFFF;
3206 else
3207 fc->pause_time = E1000_FC_PAUSE_TIME;
3208 fc->send_xon = 1;
3209 fc->current_mode = fc->requested_mode;
3210
3211 switch (hw->mac.type) {
3212 default:
3213 if ((adapter->flags & FLAG_HAS_ERT) &&
3214 (adapter->netdev->mtu > ETH_DATA_LEN))
3215 hwm = min(((pba << 10) * 9 / 10),
3216 ((pba << 10) - (E1000_ERT_2048 << 3)));
3217 else
3218 hwm = min(((pba << 10) * 9 / 10),
3219 ((pba << 10) - adapter->max_frame_size));
3220
3221 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3222 fc->low_water = fc->high_water - 8;
3223 break;
3224 case e1000_pchlan:
38eb394e
BA		 3225 /*
3226 * Workaround PCH LOM adapter hangs with certain network
3227 * loads. If hangs persist, try disabling Tx flow control.
3228 */
3229 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3230 fc->high_water = 0x3500;
3231 fc->low_water = 0x1500;
3232 } else {
3233 fc->high_water = 0x5000;
3234 fc->low_water = 0x3000;
3235 }
a305595b 3236 fc->refresh_time = 0x1000;
d3738bb8
BA		 3237 break;
3238 case e1000_pch2lan:
3239 fc->high_water = 0x05C20;
3240 fc->low_water = 0x05048;
3241 fc->pause_time = 0x0650;
3242 fc->refresh_time = 0x0400;
828bac87
BA		 3243 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3244 pba = 14;
3245 ew32(PBA, pba);
3246 }
d3738bb8 3247 break;
38eb394e 3248 }
bc7f75fa 3249
828bac87
BA		 3250 /*
3251 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3252 * fit in receive buffer and early-receive not supported.
3253 */
3254 if (adapter->itr_setting & 0x3) {
3255 if (((adapter->max_frame_size * 2) > (pba << 10)) &&
3256 !(adapter->flags & FLAG_HAS_ERT)) {
3257 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3258 dev_info(&adapter->pdev->dev,
3259 "Interrupt Throttle Rate turned off\n");
3260 adapter->flags2 |= FLAG2_DISABLE_AIM;
3261 ew32(ITR, 0);
3262 }
3263 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3264 dev_info(&adapter->pdev->dev,
3265 "Interrupt Throttle Rate turned on\n");
3266 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3267 adapter->itr = 20000;
3268 ew32(ITR, 1000000000 / (adapter->itr * 256));
3269 }
3270 }
3271
bc7f75fa
AK		 3272 /* Allow time for pending master requests to run */
3273 mac->ops.reset_hw(hw);
97ac8cae
BA		 3274
3275 /*
3276 * For parts with AMT enabled, let the firmware know
3277 * that the network interface is in control
3278 */
c43bc57e 3279 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 3280 e1000_get_hw_control(adapter);
3281
bc7f75fa
AK		 3282 ew32(WUC, 0);
3283
3284 if (mac->ops.init_hw(hw))
44defeb3 3285 e_err("Hardware Error\n");
bc7f75fa
AK		 3286
3287 e1000_update_mng_vlan(adapter);
3288
3289 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3290 ew32(VET, ETH_P_8021Q);
3291
3292 e1000e_reset_adaptive(hw);
3293 e1000_get_phy_info(hw);
3294
918d7197
BA		 3295 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3296 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3297 u16 phy_data = 0;
ad68076e
BA		 3298 /*
3299 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3300 * the return value of this function because there is nothing
ad68076e
BA		 3301 * different we would do if it failed
3302 */
bc7f75fa
AK		 3303 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3304 phy_data &= ~IGP02E1000_PM_SPD;
3305 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3306 }
bc7f75fa
AK		 3307}
3308
3309int e1000e_up(struct e1000_adapter *adapter)
3310{
3311 struct e1000_hw *hw = &adapter->hw;
3312
3313 /* hardware has been reset, we need to reload some things */
3314 e1000_configure(adapter);
3315
3316 clear_bit(__E1000_DOWN, &adapter->state);
3317
3318 napi_enable(&adapter->napi);
4662e82b
BA		 3319 if (adapter->msix_entries)
3320 e1000_configure_msix(adapter);
bc7f75fa
AK		 3321 e1000_irq_enable(adapter);
3322
4cb9be7a
JB		 3323 netif_wake_queue(adapter->netdev);
3324
bc7f75fa 3325 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3326 if (adapter->msix_entries)
3327 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3328 else
3329 ew32(ICS, E1000_ICS_LSC);
3330
bc7f75fa
AK		 3331 return 0;
3332}
3333
3334void e1000e_down(struct e1000_adapter *adapter)
3335{
3336 struct net_device *netdev = adapter->netdev;
3337 struct e1000_hw *hw = &adapter->hw;
3338 u32 tctl, rctl;
3339
ad68076e
BA		 3340 /*
3341 * signal that we're down so the interrupt handler does not
3342 * reschedule our watchdog timer
3343 */
bc7f75fa
AK		 3344 set_bit(__E1000_DOWN, &adapter->state);
3345
3346 /* disable receives in the hardware */
3347 rctl = er32(RCTL);
3348 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3349 /* flush and sleep below */
3350
4cb9be7a 3351 netif_stop_queue(netdev);
bc7f75fa
AK		 3352
3353 /* disable transmits in the hardware */
3354 tctl = er32(TCTL);
3355 tctl &= ~E1000_TCTL_EN;
3356 ew32(TCTL, tctl);
3357 /* flush both disables and wait for them to finish */
3358 e1e_flush();
3359 msleep(10);
3360
3361 napi_disable(&adapter->napi);
3362 e1000_irq_disable(adapter);
3363
3364 del_timer_sync(&adapter->watchdog_timer);
3365 del_timer_sync(&adapter->phy_info_timer);
3366
bc7f75fa
AK		 3367 netif_carrier_off(netdev);
3368 adapter->link_speed = 0;
3369 adapter->link_duplex = 0;
3370
52cc3086
JK		 3371 if (!pci_channel_offline(adapter->pdev))
3372 e1000e_reset(adapter);
bc7f75fa
AK		 3373 e1000_clean_tx_ring(adapter);
3374 e1000_clean_rx_ring(adapter);
3375
3376 /*
3377 * TODO: for power management, we could drop the link and
3378 * pci_disable_device here.
3379 */
3380}
3381
3382void e1000e_reinit_locked(struct e1000_adapter *adapter)
3383{
3384 might_sleep();
3385 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3386 msleep(1);
3387 e1000e_down(adapter);
3388 e1000e_up(adapter);
3389 clear_bit(__E1000_RESETTING, &adapter->state);
3390}
3391
3392/**
3393 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3394 * @adapter: board private structure to initialize
3395 *
3396 * e1000_sw_init initializes the Adapter private data structure.
3397 * Fields are initialized based on PCI device information and
3398 * OS network device settings (MTU size).
3399 **/
3400static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3401{
bc7f75fa
AK		 3402 struct net_device *netdev = adapter->netdev;
3403
3404 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3405 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3406 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3407 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3408
4662e82b 3409 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3410
4662e82b
BA		 3411 if (e1000_alloc_queues(adapter))
3412 return -ENOMEM;
bc7f75fa 3413
bc7f75fa 3414 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3415 e1000_irq_disable(adapter);
3416
bc7f75fa
AK		 3417 set_bit(__E1000_DOWN, &adapter->state);
3418 return 0;
bc7f75fa
AK		 3419}
3420
f8d59f78
BA		 3421/**
3422 * e1000_intr_msi_test - Interrupt Handler
3423 * @irq: interrupt number
3424 * @data: pointer to a network interface device structure
3425 **/
3426static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3427{
3428 struct net_device *netdev = data;
3429 struct e1000_adapter *adapter = netdev_priv(netdev);
3430 struct e1000_hw *hw = &adapter->hw;
3431 u32 icr = er32(ICR);
3432
3bb99fe2 3433 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3434 if (icr & E1000_ICR_RXSEQ) {
3435 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3436 wmb();
3437 }
3438
3439 return IRQ_HANDLED;
3440}
3441
3442/**
3443 * e1000_test_msi_interrupt - Returns 0 for successful test
3444 * @adapter: board private struct
3445 *
3446 * code flow taken from tg3.c
3447 **/
3448static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3449{
3450 struct net_device *netdev = adapter->netdev;
3451 struct e1000_hw *hw = &adapter->hw;
3452 int err;
3453
3454 /* poll_enable hasn't been called yet, so don't need disable */
3455 /* clear any pending events */
3456 er32(ICR);
3457
3458 /* free the real vector and request a test handler */
3459 e1000_free_irq(adapter);
4662e82b 3460 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3461
3462 /* Assume that the test fails, if it succeeds then the test
3463 * MSI irq handler will unset this flag */
3464 adapter->flags |= FLAG_MSI_TEST_FAILED;
3465
3466 err = pci_enable_msi(adapter->pdev);
3467 if (err)
3468 goto msi_test_failed;
3469
a0607fd3 3470 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3471 netdev->name, netdev);
3472 if (err) {
3473 pci_disable_msi(adapter->pdev);
3474 goto msi_test_failed;
3475 }
3476
3477 wmb();
3478
3479 e1000_irq_enable(adapter);
3480
3481 /* fire an unusual interrupt on the test handler */
3482 ew32(ICS, E1000_ICS_RXSEQ);
3483 e1e_flush();
3484 msleep(50);
3485
3486 e1000_irq_disable(adapter);
3487
3488 rmb();
3489
3490 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3491 adapter->int_mode = E1000E_INT_MODE_LEGACY;
068e8a30
JD		 3492 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3493 } else
3494 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78
BA		 3495
3496 free_irq(adapter->pdev->irq, netdev);
3497 pci_disable_msi(adapter->pdev);
3498
f8d59f78 3499msi_test_failed:
4662e82b 3500 e1000e_set_interrupt_capability(adapter);
068e8a30 3501 return e1000_request_irq(adapter);
f8d59f78
BA		 3502}
3503
3504/**
3505 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3506 * @adapter: board private struct
3507 *
3508 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3509 **/
3510static int e1000_test_msi(struct e1000_adapter *adapter)
3511{
3512 int err;
3513 u16 pci_cmd;
3514
3515 if (!(adapter->flags & FLAG_MSI_ENABLED))
3516 return 0;
3517
3518 /* disable SERR in case the MSI write causes a master abort */
3519 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3520 if (pci_cmd & PCI_COMMAND_SERR)
3521 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3522 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3523
3524 err = e1000_test_msi_interrupt(adapter);
3525
36f2407f
DN		 3526 /* re-enable SERR */
3527 if (pci_cmd & PCI_COMMAND_SERR) {
3528 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3529 pci_cmd |= PCI_COMMAND_SERR;
3530 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3531 }
f8d59f78 3532
f8d59f78
BA		 3533 return err;
3534}
3535
bc7f75fa
AK		 3536/**
3537 * e1000_open - Called when a network interface is made active
3538 * @netdev: network interface device structure
3539 *
3540 * Returns 0 on success, negative value on failure
3541 *
3542 * The open entry point is called when a network interface is made
3543 * active by the system (IFF_UP). At this point all resources needed
3544 * for transmit and receive operations are allocated, the interrupt
3545 * handler is registered with the OS, the watchdog timer is started,
3546 * and the stack is notified that the interface is ready.
3547 **/
3548static int e1000_open(struct net_device *netdev)
3549{
3550 struct e1000_adapter *adapter = netdev_priv(netdev);
3551 struct e1000_hw *hw = &adapter->hw;
23606cf5 3552 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3553 int err;
3554
3555 /* disallow open during test */
3556 if (test_bit(__E1000_TESTING, &adapter->state))
3557 return -EBUSY;
3558
23606cf5
RW		 3559 pm_runtime_get_sync(&pdev->dev);
3560
9c563d20
JB		 3561 netif_carrier_off(netdev);
3562
bc7f75fa
AK		 3563 /* allocate transmit descriptors */
3564 err = e1000e_setup_tx_resources(adapter);
3565 if (err)
3566 goto err_setup_tx;
3567
3568 /* allocate receive descriptors */
3569 err = e1000e_setup_rx_resources(adapter);
3570 if (err)
3571 goto err_setup_rx;
3572
11b08be8
BA		 3573 /*
3574 * If AMT is enabled, let the firmware know that the network
3575 * interface is now open and reset the part to a known state.
3576 */
3577 if (adapter->flags & FLAG_HAS_AMT) {
3578 e1000_get_hw_control(adapter);
3579 e1000e_reset(adapter);
3580 }
3581
bc7f75fa
AK		 3582 e1000e_power_up_phy(adapter);
3583
3584 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3585 if ((adapter->hw.mng_cookie.status &
3586 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3587 e1000_update_mng_vlan(adapter);
3588
c128ec29 3589 /* DMA latency requirement to workaround early-receive/jumbo issue */
828bac87
BA		 3590 if ((adapter->flags & FLAG_HAS_ERT) ||
3591 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014
LT		 3592 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3593 PM_QOS_CPU_DMA_LATENCY,
3594 PM_QOS_DEFAULT_VALUE);
c128ec29 3595
ad68076e
BA		 3596 /*
3597 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3598 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3599 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3600 * clean_rx handler before we do so.
3601 */
bc7f75fa
AK		 3602 e1000_configure(adapter);
3603
3604 err = e1000_request_irq(adapter);
3605 if (err)
3606 goto err_req_irq;
3607
f8d59f78
BA		 3608 /*
3609 * Work around PCIe errata with MSI interrupts causing some chipsets to
3610 * ignore e1000e MSI messages, which means we need to test our MSI
3611 * interrupt now
3612 */
4662e82b 3613 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3614 err = e1000_test_msi(adapter);
3615 if (err) {
3616 e_err("Interrupt allocation failed\n");
3617 goto err_req_irq;
3618 }
3619 }
3620
bc7f75fa
AK		 3621 /* From here on the code is the same as e1000e_up() */
3622 clear_bit(__E1000_DOWN, &adapter->state);
3623
3624 napi_enable(&adapter->napi);
3625
3626 e1000_irq_enable(adapter);
3627
4cb9be7a 3628 netif_start_queue(netdev);
d55b53ff 3629
23606cf5
RW		 3630 adapter->idle_check = true;
3631 pm_runtime_put(&pdev->dev);
3632
bc7f75fa 3633 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3634 if (adapter->msix_entries)
3635 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3636 else
3637 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3638
3639 return 0;
3640
3641err_req_irq:
3642 e1000_release_hw_control(adapter);
3643 e1000_power_down_phy(adapter);
3644 e1000e_free_rx_resources(adapter);
3645err_setup_rx:
3646 e1000e_free_tx_resources(adapter);
3647err_setup_tx:
3648 e1000e_reset(adapter);
23606cf5 3649 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3650
3651 return err;
3652}
3653
3654/**
3655 * e1000_close - Disables a network interface
3656 * @netdev: network interface device structure
3657 *
3658 * Returns 0, this is not allowed to fail
3659 *
3660 * The close entry point is called when an interface is de-activated
3661 * by the OS. The hardware is still under the drivers control, but
3662 * needs to be disabled. A global MAC reset is issued to stop the
3663 * hardware, and all transmit and receive resources are freed.
3664 **/
3665static int e1000_close(struct net_device *netdev)
3666{
3667 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3668 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3669
3670 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3671
3672 pm_runtime_get_sync(&pdev->dev);
3673
3674 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3675 e1000e_down(adapter);
3676 e1000_free_irq(adapter);
3677 }
bc7f75fa 3678 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3679
3680 e1000e_free_tx_resources(adapter);
3681 e1000e_free_rx_resources(adapter);
3682
ad68076e
BA		 3683 /*
3684 * kill manageability vlan ID if supported, but not if a vlan with
3685 * the same ID is registered on the host OS (let 8021q kill it)
3686 */
bc7f75fa
AK		 3687 if ((adapter->hw.mng_cookie.status &
3688 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3689 !(adapter->vlgrp &&
3690 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3691 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3692
ad68076e
BA		 3693 /*
3694 * If AMT is enabled, let the firmware know that the network
3695 * interface is now closed
3696 */
c43bc57e 3697 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3698 e1000_release_hw_control(adapter);
3699
828bac87
BA		 3700 if ((adapter->flags & FLAG_HAS_ERT) ||
3701 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014 3702 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
c128ec29 3703
23606cf5
RW		 3704 pm_runtime_put_sync(&pdev->dev);
3705
bc7f75fa
AK		 3706 return 0;
3707}
3708/**
3709 * e1000_set_mac - Change the Ethernet Address of the NIC
3710 * @netdev: network interface device structure
3711 * @p: pointer to an address structure
3712 *
3713 * Returns 0 on success, negative on failure
3714 **/
3715static int e1000_set_mac(struct net_device *netdev, void *p)
3716{
3717 struct e1000_adapter *adapter = netdev_priv(netdev);
3718 struct sockaddr *addr = p;
3719
3720 if (!is_valid_ether_addr(addr->sa_data))
3721 return -EADDRNOTAVAIL;
3722
3723 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3724 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3725
3726 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3727
3728 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3729 /* activate the work around */
3730 e1000e_set_laa_state_82571(&adapter->hw, 1);
3731
ad68076e
BA		 3732 /*
3733 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3734 * between the time RAR[0] gets clobbered and the time it
3735 * gets fixed (in e1000_watchdog), the actual LAA is in one
3736 * of the RARs and no incoming packets directed to this port
3737 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3738 * RAR[14]
3739 */
bc7f75fa
AK		 3740 e1000e_rar_set(&adapter->hw,
3741 adapter->hw.mac.addr,
3742 adapter->hw.mac.rar_entry_count - 1);
3743 }
3744
3745 return 0;
3746}
3747
a8f88ff5
JB		 3748/**
3749 * e1000e_update_phy_task - work thread to update phy
3750 * @work: pointer to our work struct
3751 *
3752 * this worker thread exists because we must acquire a
3753 * semaphore to read the phy, which we could msleep while
3754 * waiting for it, and we can't msleep in a timer.
3755 **/
3756static void e1000e_update_phy_task(struct work_struct *work)
3757{
3758 struct e1000_adapter *adapter = container_of(work,
3759 struct e1000_adapter, update_phy_task);
3760 e1000_get_phy_info(&adapter->hw);
3761}
3762
ad68076e
BA		 3763/*
3764 * Need to wait a few seconds after link up to get diagnostic information from
3765 * the phy
3766 */
bc7f75fa
AK		 3767static void e1000_update_phy_info(unsigned long data)
3768{
3769 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3770 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3771}
3772
8c7bbb92
BA		 3773/**
3774 * e1000e_update_phy_stats - Update the PHY statistics counters
3775 * @adapter: board private structure
3776 **/
3777static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3778{
3779 struct e1000_hw *hw = &adapter->hw;
3780 s32 ret_val;
3781 u16 phy_data;
3782
3783 ret_val = hw->phy.ops.acquire(hw);
3784 if (ret_val)
3785 return;
3786
3787 hw->phy.addr = 1;
3788
3789#define HV_PHY_STATS_PAGE 778
3790 /*
3791 * A page set is expensive so check if already on desired page.
3792 * If not, set to the page with the PHY status registers.
3793 */
3794 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3795 &phy_data);
3796 if (ret_val)
3797 goto release;
3798 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3799 ret_val = e1000e_write_phy_reg_mdic(hw,
3800 IGP01E1000_PHY_PAGE_SELECT,
3801 (HV_PHY_STATS_PAGE <<
3802 IGP_PAGE_SHIFT));
3803 if (ret_val)
3804 goto release;
3805 }
3806
3807 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3808
3809 /* Single Collision Count */
3810 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3811 &phy_data);
3812 ret_val = e1000e_read_phy_reg_mdic(hw,
3813 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3814 &phy_data);
3815 if (!ret_val)
3816 adapter->stats.scc += phy_data;
3817
3818 /* Excessive Collision Count */
3819 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3820 &phy_data);
3821 ret_val = e1000e_read_phy_reg_mdic(hw,
3822 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3823 &phy_data);
3824 if (!ret_val)
3825 adapter->stats.ecol += phy_data;
3826
3827 /* Multiple Collision Count */
3828 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3829 &phy_data);
3830 ret_val = e1000e_read_phy_reg_mdic(hw,
3831 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3832 &phy_data);
3833 if (!ret_val)
3834 adapter->stats.mcc += phy_data;
3835
3836 /* Late Collision Count */
3837 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3838 &phy_data);
3839 ret_val = e1000e_read_phy_reg_mdic(hw,
3840 HV_LATECOL_LOWER &
3841 MAX_PHY_REG_ADDRESS,
3842 &phy_data);
3843 if (!ret_val)
3844 adapter->stats.latecol += phy_data;
3845
3846 /* Collision Count - also used for adaptive IFS */
3847 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3848 &phy_data);
3849 ret_val = e1000e_read_phy_reg_mdic(hw,
3850 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3851 &phy_data);
3852 if (!ret_val)
3853 hw->mac.collision_delta = phy_data;
3854
3855 /* Defer Count */
3856 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3857 &phy_data);
3858 ret_val = e1000e_read_phy_reg_mdic(hw,
3859 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3860 &phy_data);
3861 if (!ret_val)
3862 adapter->stats.dc += phy_data;
3863
3864 /* Transmit with no CRS */
3865 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3866 &phy_data);
3867 ret_val = e1000e_read_phy_reg_mdic(hw,
3868 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3869 &phy_data);
3870 if (!ret_val)
3871 adapter->stats.tncrs += phy_data;
3872
3873release:
3874 hw->phy.ops.release(hw);
3875}
3876
bc7f75fa
AK		 3877/**
3878 * e1000e_update_stats - Update the board statistics counters
3879 * @adapter: board private structure
3880 **/
3881void e1000e_update_stats(struct e1000_adapter *adapter)
3882{
7274c20f 3883 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3884 struct e1000_hw *hw = &adapter->hw;
3885 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3886
3887 /*
3888 * Prevent stats update while adapter is being reset, or if the pci
3889 * connection is down.
3890 */
3891 if (adapter->link_speed == 0)
3892 return;
3893 if (pci_channel_offline(pdev))
3894 return;
3895
bc7f75fa
AK		 3896 adapter->stats.crcerrs += er32(CRCERRS);
3897 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3898 adapter->stats.gorc += er32(GORCL);
3899 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3900 adapter->stats.bprc += er32(BPRC);
3901 adapter->stats.mprc += er32(MPRC);
3902 adapter->stats.roc += er32(ROC);
3903
bc7f75fa 3904 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3905
3906 /* Half-duplex statistics */
3907 if (adapter->link_duplex == HALF_DUPLEX) {
3908 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3909 e1000e_update_phy_stats(adapter);
3910 } else {
3911 adapter->stats.scc += er32(SCC);
3912 adapter->stats.ecol += er32(ECOL);
3913 adapter->stats.mcc += er32(MCC);
3914 adapter->stats.latecol += er32(LATECOL);
3915 adapter->stats.dc += er32(DC);
3916
3917 hw->mac.collision_delta = er32(COLC);
3918
3919 if ((hw->mac.type != e1000_82574) &&
3920 (hw->mac.type != e1000_82583))
3921 adapter->stats.tncrs += er32(TNCRS);
3922 }
3923 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3924 }
8c7bbb92 3925
bc7f75fa
AK		 3926 adapter->stats.xonrxc += er32(XONRXC);
3927 adapter->stats.xontxc += er32(XONTXC);
3928 adapter->stats.xoffrxc += er32(XOFFRXC);
3929 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3930 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3931 adapter->stats.gotc += er32(GOTCL);
3932 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3933 adapter->stats.rnbc += er32(RNBC);
3934 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3935
3936 adapter->stats.mptc += er32(MPTC);
3937 adapter->stats.bptc += er32(BPTC);
3938
3939 /* used for adaptive IFS */
3940
3941 hw->mac.tx_packet_delta = er32(TPT);
3942 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3943
3944 adapter->stats.algnerrc += er32(ALGNERRC);
3945 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3946 adapter->stats.cexterr += er32(CEXTERR);
3947 adapter->stats.tsctc += er32(TSCTC);
3948 adapter->stats.tsctfc += er32(TSCTFC);
3949
bc7f75fa 3950 /* Fill out the OS statistics structure */
7274c20f
AK		 3951 netdev->stats.multicast = adapter->stats.mprc;
3952 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3953
3954 /* Rx Errors */
3955
ad68076e
BA		 3956 /*
3957 * RLEC on some newer hardware can be incorrect so build
3958 * our own version based on RUC and ROC
3959 */
7274c20f 3960 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3961 adapter->stats.crcerrs + adapter->stats.algnerrc +
3962 adapter->stats.ruc + adapter->stats.roc +
3963 adapter->stats.cexterr;
7274c20f 3964 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3965 adapter->stats.roc;
7274c20f
AK		 3966 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3967 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3968 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3969
3970 /* Tx Errors */
7274c20f 3971 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3972 adapter->stats.latecol;
7274c20f
AK		 3973 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3974 netdev->stats.tx_window_errors = adapter->stats.latecol;
3975 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3976
3977 /* Tx Dropped needs to be maintained elsewhere */
3978
bc7f75fa
AK		 3979 /* Management Stats */
3980 adapter->stats.mgptc += er32(MGTPTC);
3981 adapter->stats.mgprc += er32(MGTPRC);
3982 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3983}
3984
7c25769f
BA		 3985/**
3986 * e1000_phy_read_status - Update the PHY register status snapshot
3987 * @adapter: board private structure
3988 **/
3989static void e1000_phy_read_status(struct e1000_adapter *adapter)
3990{
3991 struct e1000_hw *hw = &adapter->hw;
3992 struct e1000_phy_regs *phy = &adapter->phy_regs;
3993 int ret_val;
7c25769f
BA		 3994
3995 if ((er32(STATUS) & E1000_STATUS_LU) &&
3996 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3997 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3998 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3999 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4000 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4001 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4002 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4003 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4004 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4005 if (ret_val)
44defeb3 4006 e_warn("Error reading PHY register\n");
7c25769f
BA		 4007 } else {
4008 /*
4009 * Do not read PHY registers if link is not up
4010 * Set values to typical power-on defaults
4011 */
4012 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4013 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4014 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4015 BMSR_ERCAP);
4016 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4017 ADVERTISE_ALL | ADVERTISE_CSMA);
4018 phy->lpa = 0;
4019 phy->expansion = EXPANSION_ENABLENPAGE;
4020 phy->ctrl1000 = ADVERTISE_1000FULL;
4021 phy->stat1000 = 0;
4022 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4023 }
7c25769f
BA		 4024}
4025
bc7f75fa
AK		 4026static void e1000_print_link_info(struct e1000_adapter *adapter)
4027{
bc7f75fa
AK		 4028 struct e1000_hw *hw = &adapter->hw;
4029 u32 ctrl = er32(CTRL);
4030
8f12fe86
BA		 4031 /* Link status message must follow this format for user tools */
4032 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
4033 "Flow Control: %s\n",
4034 adapter->netdev->name,
44defeb3
JK		 4035 adapter->link_speed,
4036 (adapter->link_duplex == FULL_DUPLEX) ?
4037 "Full Duplex" : "Half Duplex",
4038 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
4039 "RX/TX" :
4040 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
4041 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 4042}
4043
0c6bdb30 4044static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 4045{
4046 struct e1000_hw *hw = &adapter->hw;
4047 bool link_active = 0;
4048 s32 ret_val = 0;
4049
4050 /*
4051 * get_link_status is set on LSC (link status) interrupt or
4052 * Rx sequence error interrupt. get_link_status will stay
4053 * false until the check_for_link establishes link
4054 * for copper adapters ONLY
4055 */
4056 switch (hw->phy.media_type) {
4057 case e1000_media_type_copper:
4058 if (hw->mac.get_link_status) {
4059 ret_val = hw->mac.ops.check_for_link(hw);
4060 link_active = !hw->mac.get_link_status;
4061 } else {
4062 link_active = 1;
4063 }
4064 break;
4065 case e1000_media_type_fiber:
4066 ret_val = hw->mac.ops.check_for_link(hw);
4067 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4068 break;
4069 case e1000_media_type_internal_serdes:
4070 ret_val = hw->mac.ops.check_for_link(hw);
4071 link_active = adapter->hw.mac.serdes_has_link;
4072 break;
4073 default:
4074 case e1000_media_type_unknown:
4075 break;
4076 }
4077
4078 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4079 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4080 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4081 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4082 }
4083
4084 return link_active;
4085}
4086
4087static void e1000e_enable_receives(struct e1000_adapter *adapter)
4088{
4089 /* make sure the receive unit is started */
4090 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4091 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4092 struct e1000_hw *hw = &adapter->hw;
4093 u32 rctl = er32(RCTL);
4094 ew32(RCTL, rctl | E1000_RCTL_EN);
4095 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4096 }
4097}
4098
ff10e13c
CW		 4099static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4100{
4101 struct e1000_hw *hw = &adapter->hw;
4102
4103 /*
4104 * With 82574 controllers, PHY needs to be checked periodically
4105 * for hung state and reset, if two calls return true
4106 */
4107 if (e1000_check_phy_82574(hw))
4108 adapter->phy_hang_count++;
4109 else
4110 adapter->phy_hang_count = 0;
4111
4112 if (adapter->phy_hang_count > 1) {
4113 adapter->phy_hang_count = 0;
4114 schedule_work(&adapter->reset_task);
4115 }
4116}
4117
bc7f75fa
AK		 4118/**
4119 * e1000_watchdog - Timer Call-back
4120 * @data: pointer to adapter cast into an unsigned long
4121 **/
4122static void e1000_watchdog(unsigned long data)
4123{
4124 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4125
4126 /* Do the rest outside of interrupt context */
4127 schedule_work(&adapter->watchdog_task);
4128
4129 /* TODO: make this use queue_delayed_work() */
4130}
4131
4132static void e1000_watchdog_task(struct work_struct *work)
4133{
4134 struct e1000_adapter *adapter = container_of(work,
4135 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4136 struct net_device *netdev = adapter->netdev;
4137 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4138 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4139 struct e1000_ring *tx_ring = adapter->tx_ring;
4140 struct e1000_hw *hw = &adapter->hw;
4141 u32 link, tctl;
bc7f75fa
AK		 4142 int tx_pending = 0;
4143
b405e8df 4144 link = e1000e_has_link(adapter);
318a94d6 4145 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4146 /* Cancel scheduled suspend requests. */
4147 pm_runtime_resume(netdev->dev.parent);
4148
318a94d6 4149 e1000e_enable_receives(adapter);
bc7f75fa 4150 goto link_up;
bc7f75fa
AK		 4151 }
4152
4153 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4154 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4155 e1000_update_mng_vlan(adapter);
4156
bc7f75fa
AK		 4157 if (link) {
4158 if (!netif_carrier_ok(netdev)) {
4159 bool txb2b = 1;
23606cf5
RW		 4160
4161 /* Cancel scheduled suspend requests. */
4162 pm_runtime_resume(netdev->dev.parent);
4163
318a94d6 4164 /* update snapshot of PHY registers on LSC */
7c25769f 4165 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4166 mac->ops.get_link_up_info(&adapter->hw,
4167 &adapter->link_speed,
4168 &adapter->link_duplex);
4169 e1000_print_link_info(adapter);
f4187b56
BA		 4170 /*
4171 * On supported PHYs, check for duplex mismatch only
4172 * if link has autonegotiated at 10/100 half
4173 */
4174 if ((hw->phy.type == e1000_phy_igp_3 ||
4175 hw->phy.type == e1000_phy_bm) &&
4176 (hw->mac.autoneg == true) &&
4177 (adapter->link_speed == SPEED_10 ||
4178 adapter->link_speed == SPEED_100) &&
4179 (adapter->link_duplex == HALF_DUPLEX)) {
4180 u16 autoneg_exp;
4181
4182 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4183
4184 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4185 e_info("Autonegotiated half duplex but"
4186 " link partner cannot autoneg. "
4187 " Try forcing full duplex if "
4188 "link gets many collisions.\n");
4189 }
4190
f49c57e1 4191 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4192 adapter->tx_timeout_factor = 1;
4193 switch (adapter->link_speed) {
4194 case SPEED_10:
4195 txb2b = 0;
10f1b492 4196 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4197 break;
4198 case SPEED_100:
4199 txb2b = 0;
4c86e0b9 4200 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4201 break;
4202 }
4203
ad68076e
BA		 4204 /*
4205 * workaround: re-program speed mode bit after
4206 * link-up event
4207 */
bc7f75fa
AK		 4208 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4209 !txb2b) {
4210 u32 tarc0;
e9ec2c0f 4211 tarc0 = er32(TARC(0));
bc7f75fa 4212 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4213 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4214 }
4215
ad68076e
BA		 4216 /*
4217 * disable TSO for pcie and 10/100 speeds, to avoid
4218 * some hardware issues
4219 */
bc7f75fa
AK		 4220 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4221 switch (adapter->link_speed) {
4222 case SPEED_10:
4223 case SPEED_100:
44defeb3 4224 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4225 netdev->features &= ~NETIF_F_TSO;
4226 netdev->features &= ~NETIF_F_TSO6;
4227 break;
4228 case SPEED_1000:
4229 netdev->features |= NETIF_F_TSO;
4230 netdev->features |= NETIF_F_TSO6;
4231 break;
4232 default:
4233 /* oops */
4234 break;
4235 }
4236 }
4237
ad68076e
BA		 4238 /*
4239 * enable transmits in the hardware, need to do this
4240 * after setting TARC(0)
4241 */
bc7f75fa
AK		 4242 tctl = er32(TCTL);
4243 tctl |= E1000_TCTL_EN;
4244 ew32(TCTL, tctl);
4245
75eb0fad
BA		 4246 /*
4247 * Perform any post-link-up configuration before
4248 * reporting link up.
4249 */
4250 if (phy->ops.cfg_on_link_up)
4251 phy->ops.cfg_on_link_up(hw);
4252
bc7f75fa 4253 netif_carrier_on(netdev);
bc7f75fa
AK		 4254
4255 if (!test_bit(__E1000_DOWN, &adapter->state))
4256 mod_timer(&adapter->phy_info_timer,
4257 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4258 }
4259 } else {
4260 if (netif_carrier_ok(netdev)) {
4261 adapter->link_speed = 0;
4262 adapter->link_duplex = 0;
8f12fe86
BA		 4263 /* Link status message must follow this format */
4264 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4265 adapter->netdev->name);
bc7f75fa 4266 netif_carrier_off(netdev);
bc7f75fa
AK		 4267 if (!test_bit(__E1000_DOWN, &adapter->state))
4268 mod_timer(&adapter->phy_info_timer,
4269 round_jiffies(jiffies + 2 * HZ));
4270
4271 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4272 schedule_work(&adapter->reset_task);
23606cf5
RW		 4273 else
4274 pm_schedule_suspend(netdev->dev.parent,
4275 LINK_TIMEOUT);
bc7f75fa
AK		 4276 }
4277 }
4278
4279link_up:
4280 e1000e_update_stats(adapter);
4281
4282 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4283 adapter->tpt_old = adapter->stats.tpt;
4284 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4285 adapter->colc_old = adapter->stats.colc;
4286
7c25769f
BA		 4287 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4288 adapter->gorc_old = adapter->stats.gorc;
4289 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4290 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4291
4292 e1000e_update_adaptive(&adapter->hw);
4293
4294 if (!netif_carrier_ok(netdev)) {
4295 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4296 tx_ring->count);
4297 if (tx_pending) {
ad68076e
BA		 4298 /*
4299 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4300 * but we've got queued Tx work that's never going
4301 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4302 * (Do the reset outside of interrupt context).
4303 */
bc7f75fa
AK		 4304 adapter->tx_timeout_count++;
4305 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4306 /* return immediately since reset is imminent */
4307 return;
bc7f75fa
AK		 4308 }
4309 }
4310
eab2abf5
JB		 4311 /* Simple mode for Interrupt Throttle Rate (ITR) */
4312 if (adapter->itr_setting == 4) {
4313 /*
4314 * Symmetric Tx/Rx gets a reduced ITR=2000;
4315 * Total asymmetrical Tx or Rx gets ITR=8000;
4316 * everyone else is between 2000-8000.
4317 */
4318 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4319 u32 dif = (adapter->gotc > adapter->gorc ?
4320 adapter->gotc - adapter->gorc :
4321 adapter->gorc - adapter->gotc) / 10000;
4322 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4323
4324 ew32(ITR, 1000000000 / (itr * 256));
4325 }
4326
ad68076e 4327 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4328 if (adapter->msix_entries)
4329 ew32(ICS, adapter->rx_ring->ims_val);
4330 else
4331 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4332
4333 /* Force detection of hung controller every watchdog period */
4334 adapter->detect_tx_hung = 1;
4335
3a3b7586
JB		 4336 /* flush partial descriptors to memory before detecting tx hang */
4337 if (adapter->flags2 & FLAG2_DMA_BURST) {
4338 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4339 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4340 /*
4341 * no need to flush the writes because the timeout code does
4342 * an er32 first thing
4343 */
4344 }
4345
ad68076e
BA		 4346 /*
4347 * With 82571 controllers, LAA may be overwritten due to controller
4348 * reset from the other port. Set the appropriate LAA in RAR[0]
4349 */
bc7f75fa
AK		 4350 if (e1000e_get_laa_state_82571(hw))
4351 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4352
ff10e13c
CW		 4353 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4354 e1000e_check_82574_phy_workaround(adapter);
4355
bc7f75fa
AK		 4356 /* Reset the timer */
4357 if (!test_bit(__E1000_DOWN, &adapter->state))
4358 mod_timer(&adapter->watchdog_timer,
4359 round_jiffies(jiffies + 2 * HZ));
4360}
4361
4362#define E1000_TX_FLAGS_CSUM 0x00000001
4363#define E1000_TX_FLAGS_VLAN 0x00000002
4364#define E1000_TX_FLAGS_TSO 0x00000004
4365#define E1000_TX_FLAGS_IPV4 0x00000008
4366#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4367#define E1000_TX_FLAGS_VLAN_SHIFT 16
4368
4369static int e1000_tso(struct e1000_adapter *adapter,
4370 struct sk_buff *skb)
4371{
4372 struct e1000_ring *tx_ring = adapter->tx_ring;
4373 struct e1000_context_desc *context_desc;
4374 struct e1000_buffer *buffer_info;
4375 unsigned int i;
4376 u32 cmd_length = 0;
4377 u16 ipcse = 0, tucse, mss;
4378 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4379 int err;
4380
3d5e33c9
BA		 4381 if (!skb_is_gso(skb))
4382 return 0;
bc7f75fa 4383
3d5e33c9
BA		 4384 if (skb_header_cloned(skb)) {
4385 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4386 if (err)
4387 return err;
bc7f75fa
AK		 4388 }
4389
3d5e33c9
BA		 4390 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4391 mss = skb_shinfo(skb)->gso_size;
4392 if (skb->protocol == htons(ETH_P_IP)) {
4393 struct iphdr *iph = ip_hdr(skb);
4394 iph->tot_len = 0;
4395 iph->check = 0;
4396 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4397 0, IPPROTO_TCP, 0);
4398 cmd_length = E1000_TXD_CMD_IP;
4399 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4400 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4401 ipv6_hdr(skb)->payload_len = 0;
4402 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4403 &ipv6_hdr(skb)->daddr,
4404 0, IPPROTO_TCP, 0);
4405 ipcse = 0;
4406 }
4407 ipcss = skb_network_offset(skb);
4408 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4409 tucss = skb_transport_offset(skb);
4410 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4411 tucse = 0;
4412
4413 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4414 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4415
4416 i = tx_ring->next_to_use;
4417 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4418 buffer_info = &tx_ring->buffer_info[i];
4419
4420 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4421 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4422 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4423 context_desc->upper_setup.tcp_fields.tucss = tucss;
4424 context_desc->upper_setup.tcp_fields.tucso = tucso;
4425 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4426 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4427 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4428 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4429
4430 buffer_info->time_stamp = jiffies;
4431 buffer_info->next_to_watch = i;
4432
4433 i++;
4434 if (i == tx_ring->count)
4435 i = 0;
4436 tx_ring->next_to_use = i;
4437
4438 return 1;
bc7f75fa
AK		 4439}
4440
4441static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4442{
4443 struct e1000_ring *tx_ring = adapter->tx_ring;
4444 struct e1000_context_desc *context_desc;
4445 struct e1000_buffer *buffer_info;
4446 unsigned int i;
4447 u8 css;
af807c82 4448 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4449 __be16 protocol;
bc7f75fa 4450
af807c82
DG		 4451 if (skb->ip_summed != CHECKSUM_PARTIAL)
4452 return 0;
bc7f75fa 4453
5f66f208
AJ		 4454 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4455 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4456 else
4457 protocol = skb->protocol;
4458
3f518390 4459 switch (protocol) {
09640e63 4460 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4461 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4462 cmd_len |= E1000_TXD_CMD_TCP;
4463 break;
09640e63 4464 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4465 /* XXX not handling all IPV6 headers */
4466 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4467 cmd_len |= E1000_TXD_CMD_TCP;
4468 break;
4469 default:
4470 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4471 e_warn("checksum_partial proto=%x!\n",
4472 be16_to_cpu(protocol));
af807c82 4473 break;
bc7f75fa
AK		 4474 }
4475
af807c82
DG		 4476 css = skb_transport_offset(skb);
4477
4478 i = tx_ring->next_to_use;
4479 buffer_info = &tx_ring->buffer_info[i];
4480 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4481
4482 context_desc->lower_setup.ip_config = 0;
4483 context_desc->upper_setup.tcp_fields.tucss = css;
4484 context_desc->upper_setup.tcp_fields.tucso =
4485 css + skb->csum_offset;
4486 context_desc->upper_setup.tcp_fields.tucse = 0;
4487 context_desc->tcp_seg_setup.data = 0;
4488 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4489
4490 buffer_info->time_stamp = jiffies;
4491 buffer_info->next_to_watch = i;
4492
4493 i++;
4494 if (i == tx_ring->count)
4495 i = 0;
4496 tx_ring->next_to_use = i;
4497
4498 return 1;
bc7f75fa
AK		 4499}
4500
4501#define E1000_MAX_PER_TXD 8192
4502#define E1000_MAX_TXD_PWR 12
4503
4504static int e1000_tx_map(struct e1000_adapter *adapter,
4505 struct sk_buff *skb, unsigned int first,
4506 unsigned int max_per_txd, unsigned int nr_frags,
4507 unsigned int mss)
4508{
4509 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4510 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4511 struct e1000_buffer *buffer_info;
8ddc951c 4512 unsigned int len = skb_headlen(skb);
03b1320d 4513 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4514 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4515
4516 i = tx_ring->next_to_use;
4517
4518 while (len) {
1b7719c4 4519 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4520 size = min(len, max_per_txd);
4521
bc7f75fa 4522 buffer_info->length = size;
bc7f75fa 4523 buffer_info->time_stamp = jiffies;
bc7f75fa 4524 buffer_info->next_to_watch = i;
0be3f55f
NN		 4525 buffer_info->dma = dma_map_single(&pdev->dev,
4526 skb->data + offset,
4527 size, DMA_TO_DEVICE);
03b1320d 4528 buffer_info->mapped_as_page = false;
0be3f55f 4529 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4530 goto dma_error;
bc7f75fa
AK		 4531
4532 len -= size;
4533 offset += size;
03b1320d 4534 count++;
1b7719c4
AD		 4535
4536 if (len) {
4537 i++;
4538 if (i == tx_ring->count)
4539 i = 0;
4540 }
bc7f75fa
AK		 4541 }
4542
4543 for (f = 0; f < nr_frags; f++) {
4544 struct skb_frag_struct *frag;
4545
4546 frag = &skb_shinfo(skb)->frags[f];
4547 len = frag->size;
03b1320d 4548 offset = frag->page_offset;
bc7f75fa
AK		 4549
4550 while (len) {
1b7719c4
AD		 4551 i++;
4552 if (i == tx_ring->count)
4553 i = 0;
4554
bc7f75fa
AK		 4555 buffer_info = &tx_ring->buffer_info[i];
4556 size = min(len, max_per_txd);
bc7f75fa
AK		 4557
4558 buffer_info->length = size;
4559 buffer_info->time_stamp = jiffies;
bc7f75fa 4560 buffer_info->next_to_watch = i;
0be3f55f 4561 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4562 offset, size,
0be3f55f 4563 DMA_TO_DEVICE);
03b1320d 4564 buffer_info->mapped_as_page = true;
0be3f55f 4565 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4566 goto dma_error;
bc7f75fa
AK		 4567
4568 len -= size;
4569 offset += size;
4570 count++;
bc7f75fa
AK		 4571 }
4572 }
4573
9ed318d5
TH		 4574 segs = skb_shinfo(skb)->gso_segs ?: 1;
4575 /* multiply data chunks by size of headers */
4576 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4577
bc7f75fa 4578 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4579 tx_ring->buffer_info[i].segs = segs;
4580 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4581 tx_ring->buffer_info[first].next_to_watch = i;
4582
4583 return count;
03b1320d
AD		 4584
4585dma_error:
4586 dev_err(&pdev->dev, "TX DMA map failed\n");
4587 buffer_info->dma = 0;
c1fa347f 4588 if (count)
03b1320d 4589 count--;
c1fa347f
RK		 4590
4591 while (count--) {
4592 if (i==0)
03b1320d 4593 i += tx_ring->count;
c1fa347f 4594 i--;
03b1320d 4595 buffer_info = &tx_ring->buffer_info[i];
1d51c418 4596 e1000_put_txbuf(adapter, buffer_info);
03b1320d
AD		 4597 }
4598
4599 return 0;
bc7f75fa
AK		 4600}
4601
4602static void e1000_tx_queue(struct e1000_adapter *adapter,
4603 int tx_flags, int count)
4604{
4605 struct e1000_ring *tx_ring = adapter->tx_ring;
4606 struct e1000_tx_desc *tx_desc = NULL;
4607 struct e1000_buffer *buffer_info;
4608 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4609 unsigned int i;
4610
4611 if (tx_flags & E1000_TX_FLAGS_TSO) {
4612 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4613 E1000_TXD_CMD_TSE;
4614 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4615
4616 if (tx_flags & E1000_TX_FLAGS_IPV4)
4617 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4618 }
4619
4620 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4621 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4622 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4623 }
4624
4625 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4626 txd_lower |= E1000_TXD_CMD_VLE;
4627 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4628 }
4629
4630 i = tx_ring->next_to_use;
4631
4632 while (count--) {
4633 buffer_info = &tx_ring->buffer_info[i];
4634 tx_desc = E1000_TX_DESC(*tx_ring, i);
4635 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4636 tx_desc->lower.data =
4637 cpu_to_le32(txd_lower | buffer_info->length);
4638 tx_desc->upper.data = cpu_to_le32(txd_upper);
4639
4640 i++;
4641 if (i == tx_ring->count)
4642 i = 0;
4643 }
4644
4645 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4646
ad68076e
BA		 4647 /*
4648 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4649 * know there are new descriptors to fetch. (Only
4650 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4651 * such as IA-64).
4652 */
bc7f75fa
AK		 4653 wmb();
4654
4655 tx_ring->next_to_use = i;
4656 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4657 /*
4658 * we need this if more than one processor can write to our tail
4659 * at a time, it synchronizes IO on IA64/Altix systems
4660 */
bc7f75fa
AK		 4661 mmiowb();
4662}
4663
4664#define MINIMUM_DHCP_PACKET_SIZE 282
4665static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4666 struct sk_buff *skb)
4667{
4668 struct e1000_hw *hw = &adapter->hw;
4669 u16 length, offset;
4670
4671 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4672 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4673 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4674 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4675 return 0;
4676 }
4677
4678 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4679 return 0;
4680
4681 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4682 return 0;
4683
4684 {
4685 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4686 struct udphdr *udp;
4687
4688 if (ip->protocol != IPPROTO_UDP)
4689 return 0;
4690
4691 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4692 if (ntohs(udp->dest) != 67)
4693 return 0;
4694
4695 offset = (u8 *)udp + 8 - skb->data;
4696 length = skb->len - offset;
4697 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4698 }
4699
4700 return 0;
4701}
4702
4703static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4704{
4705 struct e1000_adapter *adapter = netdev_priv(netdev);
4706
4707 netif_stop_queue(netdev);
ad68076e
BA		 4708 /*
4709 * Herbert's original patch had:
bc7f75fa 4710 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4711 * but since that doesn't exist yet, just open code it.
4712 */
bc7f75fa
AK		 4713 smp_mb();
4714
ad68076e
BA		 4715 /*
4716 * We need to check again in a case another CPU has just
4717 * made room available.
4718 */
bc7f75fa
AK		 4719 if (e1000_desc_unused(adapter->tx_ring) < size)
4720 return -EBUSY;
4721
4722 /* A reprieve! */
4723 netif_start_queue(netdev);
4724 ++adapter->restart_queue;
4725 return 0;
4726}
4727
4728static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4729{
4730 struct e1000_adapter *adapter = netdev_priv(netdev);
4731
4732 if (e1000_desc_unused(adapter->tx_ring) >= size)
4733 return 0;
4734 return __e1000_maybe_stop_tx(netdev, size);
4735}
4736
4737#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4738static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4739 struct net_device *netdev)
bc7f75fa
AK		 4740{
4741 struct e1000_adapter *adapter = netdev_priv(netdev);
4742 struct e1000_ring *tx_ring = adapter->tx_ring;
4743 unsigned int first;
4744 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4745 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4746 unsigned int tx_flags = 0;
e743d313 4747 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4748 unsigned int nr_frags;
4749 unsigned int mss;
bc7f75fa
AK		 4750 int count = 0;
4751 int tso;
4752 unsigned int f;
bc7f75fa
AK		 4753
4754 if (test_bit(__E1000_DOWN, &adapter->state)) {
4755 dev_kfree_skb_any(skb);
4756 return NETDEV_TX_OK;
4757 }
4758
4759 if (skb->len <= 0) {
4760 dev_kfree_skb_any(skb);
4761 return NETDEV_TX_OK;
4762 }
4763
4764 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4765 /*
4766 * The controller does a simple calculation to
bc7f75fa
AK		 4767 * make sure there is enough room in the FIFO before
4768 * initiating the DMA for each buffer. The calc is:
4769 * 4 = ceil(buffer len/mss). To make sure we don't
4770 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4771 * drops.
4772 */
bc7f75fa
AK		 4773 if (mss) {
4774 u8 hdr_len;
4775 max_per_txd = min(mss << 2, max_per_txd);
4776 max_txd_pwr = fls(max_per_txd) - 1;
4777
ad68076e
BA		 4778 /*
4779 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4780 * points to just header, pull a few bytes of payload from
4781 * frags into skb->data
4782 */
bc7f75fa 4783 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4784 /*
4785 * we do this workaround for ES2LAN, but it is un-necessary,
4786 * avoiding it could save a lot of cycles
4787 */
4e6c709c 4788 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4789 unsigned int pull_size;
4790
4791 pull_size = min((unsigned int)4, skb->data_len);
4792 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4793 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4794 dev_kfree_skb_any(skb);
4795 return NETDEV_TX_OK;
4796 }
e743d313 4797 len = skb_headlen(skb);
bc7f75fa
AK		 4798 }
4799 }
4800
4801 /* reserve a descriptor for the offload context */
4802 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4803 count++;
4804 count++;
4805
4806 count += TXD_USE_COUNT(len, max_txd_pwr);
4807
4808 nr_frags = skb_shinfo(skb)->nr_frags;
4809 for (f = 0; f < nr_frags; f++)
4810 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4811 max_txd_pwr);
4812
4813 if (adapter->hw.mac.tx_pkt_filtering)
4814 e1000_transfer_dhcp_info(adapter, skb);
4815
ad68076e
BA		 4816 /*
4817 * need: count + 2 desc gap to keep tail from touching
4818 * head, otherwise try next time
4819 */
92af3e95 4820 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4821 return NETDEV_TX_BUSY;
bc7f75fa 4822
eab6d18d 4823 if (vlan_tx_tag_present(skb)) {
bc7f75fa
AK		 4824 tx_flags |= E1000_TX_FLAGS_VLAN;
4825 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4826 }
4827
4828 first = tx_ring->next_to_use;
4829
4830 tso = e1000_tso(adapter, skb);
4831 if (tso < 0) {
4832 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4833 return NETDEV_TX_OK;
4834 }
4835
4836 if (tso)
4837 tx_flags |= E1000_TX_FLAGS_TSO;
4838 else if (e1000_tx_csum(adapter, skb))
4839 tx_flags |= E1000_TX_FLAGS_CSUM;
4840
ad68076e
BA		 4841 /*
4842 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4843 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4844 * no longer assume, we must.
4845 */
bc7f75fa
AK		 4846 if (skb->protocol == htons(ETH_P_IP))
4847 tx_flags |= E1000_TX_FLAGS_IPV4;
4848
1b7719c4 4849 /* if count is 0 then mapping error has occured */
bc7f75fa 4850 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4851 if (count) {
4852 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4853 /* Make sure there is space in the ring for the next send. */
4854 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4855
4856 } else {
bc7f75fa 4857 dev_kfree_skb_any(skb);
1b7719c4
AD		 4858 tx_ring->buffer_info[first].time_stamp = 0;
4859 tx_ring->next_to_use = first;
bc7f75fa
AK		 4860 }
4861
bc7f75fa
AK		 4862 return NETDEV_TX_OK;
4863}
4864
4865/**
4866 * e1000_tx_timeout - Respond to a Tx Hang
4867 * @netdev: network interface device structure
4868 **/
4869static void e1000_tx_timeout(struct net_device *netdev)
4870{
4871 struct e1000_adapter *adapter = netdev_priv(netdev);
4872
4873 /* Do the reset outside of interrupt context */
4874 adapter->tx_timeout_count++;
4875 schedule_work(&adapter->reset_task);
4876}
4877
4878static void e1000_reset_task(struct work_struct *work)
4879{
4880 struct e1000_adapter *adapter;
4881 adapter = container_of(work, struct e1000_adapter, reset_task);
4882
affa9dfb
CW		 4883 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4884 (adapter->flags & FLAG_RX_RESTART_NOW))) {
4885 e1000e_dump(adapter);
4886 e_err("Reset adapter\n");
4887 }
bc7f75fa
AK		 4888 e1000e_reinit_locked(adapter);
4889}
4890
4891/**
4892 * e1000_get_stats - Get System Network Statistics
4893 * @netdev: network interface device structure
4894 *
4895 * Returns the address of the device statistics structure.
4896 * The statistics are actually updated from the timer callback.
4897 **/
4898static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4899{
bc7f75fa 4900 /* only return the current stats */
7274c20f 4901 return &netdev->stats;
bc7f75fa
AK		 4902}
4903
4904/**
4905 * e1000_change_mtu - Change the Maximum Transfer Unit
4906 * @netdev: network interface device structure
4907 * @new_mtu: new value for maximum frame size
4908 *
4909 * Returns 0 on success, negative on failure
4910 **/
4911static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4912{
4913 struct e1000_adapter *adapter = netdev_priv(netdev);
4914 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4915
2adc55c9
BA		 4916 /* Jumbo frame support */
4917 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4918 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4919 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4920 return -EINVAL;
4921 }
4922
2adc55c9
BA		 4923 /* Supported frame sizes */
4924 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4925 (max_frame > adapter->max_hw_frame_size)) {
4926 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4927 return -EINVAL;
4928 }
4929
a1ce6473
BA		 4930 /* Jumbo frame workaround on 82579 requires CRC be stripped */
4931 if ((adapter->hw.mac.type == e1000_pch2lan) &&
4932 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
4933 (new_mtu > ETH_DATA_LEN)) {
4934 e_err("Jumbo Frames not supported on 82579 when CRC "
4935 "stripping is disabled.\n");
4936 return -EINVAL;
4937 }
4938
6f461f6c
BA		 4939 /* 82573 Errata 17 */
4940 if (((adapter->hw.mac.type == e1000_82573) ||
4941 (adapter->hw.mac.type == e1000_82574)) &&
4942 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4943 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4944 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4945 }
4946
bc7f75fa
AK		 4947 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4948 msleep(1);
610c9928 4949 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4950 adapter->max_frame_size = max_frame;
610c9928
BA		 4951 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4952 netdev->mtu = new_mtu;
bc7f75fa
AK		 4953 if (netif_running(netdev))
4954 e1000e_down(adapter);
4955
ad68076e
BA		 4956 /*
4957 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4958 * means we reserve 2 more, this pushes us to allocate from the next
4959 * larger slab size.
ad68076e 4960 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4961 * However with the new *_jumbo_rx* routines, jumbo receives will use
4962 * fragmented skbs
ad68076e 4963 */
bc7f75fa 4964
9926146b 4965 if (max_frame <= 2048)
bc7f75fa
AK		 4966 adapter->rx_buffer_len = 2048;
4967 else
4968 adapter->rx_buffer_len = 4096;
4969
4970 /* adjust allocation if LPE protects us, and we aren't using SBP */
4971 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4972 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4973 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4974 + ETH_FCS_LEN;
bc7f75fa 4975
bc7f75fa
AK		 4976 if (netif_running(netdev))
4977 e1000e_up(adapter);
4978 else
4979 e1000e_reset(adapter);
4980
4981 clear_bit(__E1000_RESETTING, &adapter->state);
4982
4983 return 0;
4984}
4985
4986static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4987 int cmd)
4988{
4989 struct e1000_adapter *adapter = netdev_priv(netdev);
4990 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4991
318a94d6 4992 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4993 return -EOPNOTSUPP;
4994
4995 switch (cmd) {
4996 case SIOCGMIIPHY:
4997 data->phy_id = adapter->hw.phy.addr;
4998 break;
4999 case SIOCGMIIREG:
b16a002e
BA		 5000 e1000_phy_read_status(adapter);
5001
7c25769f
BA		 5002 switch (data->reg_num & 0x1F) {
5003 case MII_BMCR:
5004 data->val_out = adapter->phy_regs.bmcr;
5005 break;
5006 case MII_BMSR:
5007 data->val_out = adapter->phy_regs.bmsr;
5008 break;
5009 case MII_PHYSID1:
5010 data->val_out = (adapter->hw.phy.id >> 16);
5011 break;
5012 case MII_PHYSID2:
5013 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5014 break;
5015 case MII_ADVERTISE:
5016 data->val_out = adapter->phy_regs.advertise;
5017 break;
5018 case MII_LPA:
5019 data->val_out = adapter->phy_regs.lpa;
5020 break;
5021 case MII_EXPANSION:
5022 data->val_out = adapter->phy_regs.expansion;
5023 break;
5024 case MII_CTRL1000:
5025 data->val_out = adapter->phy_regs.ctrl1000;
5026 break;
5027 case MII_STAT1000:
5028 data->val_out = adapter->phy_regs.stat1000;
5029 break;
5030 case MII_ESTATUS:
5031 data->val_out = adapter->phy_regs.estatus;
5032 break;
5033 default:
bc7f75fa
AK		 5034 return -EIO;
5035 }
bc7f75fa
AK		 5036 break;
5037 case SIOCSMIIREG:
5038 default:
5039 return -EOPNOTSUPP;
5040 }
5041 return 0;
5042}
5043
5044static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5045{
5046 switch (cmd) {
5047 case SIOCGMIIPHY:
5048 case SIOCGMIIREG:
5049 case SIOCSMIIREG:
5050 return e1000_mii_ioctl(netdev, ifr, cmd);
5051 default:
5052 return -EOPNOTSUPP;
5053 }
5054}
5055
a4f58f54
BA		 5056static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5057{
5058 struct e1000_hw *hw = &adapter->hw;
5059 u32 i, mac_reg;
5060 u16 phy_reg;
5061 int retval = 0;
5062
5063 /* copy MAC RARs to PHY RARs */
d3738bb8 5064 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54
BA		 5065
5066 /* copy MAC MTA to PHY MTA */
5067 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5068 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5069 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
5070 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
5071 }
5072
5073 /* configure PHY Rx Control register */
5074 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
5075 mac_reg = er32(RCTL);
5076 if (mac_reg & E1000_RCTL_UPE)
5077 phy_reg |= BM_RCTL_UPE;
5078 if (mac_reg & E1000_RCTL_MPE)
5079 phy_reg |= BM_RCTL_MPE;
5080 phy_reg &= ~(BM_RCTL_MO_MASK);
5081 if (mac_reg & E1000_RCTL_MO_3)
5082 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5083 << BM_RCTL_MO_SHIFT);
5084 if (mac_reg & E1000_RCTL_BAM)
5085 phy_reg |= BM_RCTL_BAM;
5086 if (mac_reg & E1000_RCTL_PMCF)
5087 phy_reg |= BM_RCTL_PMCF;
5088 mac_reg = er32(CTRL);
5089 if (mac_reg & E1000_CTRL_RFCE)
5090 phy_reg |= BM_RCTL_RFCE;
5091 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
5092
5093 /* enable PHY wakeup in MAC register */
5094 ew32(WUFC, wufc);
5095 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5096
5097 /* configure and enable PHY wakeup in PHY registers */
5098 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
5099 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5100
5101 /* activate PHY wakeup */
94d8186a 5102 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 5103 if (retval) {
5104 e_err("Could not acquire PHY\n");
5105 return retval;
5106 }
5107 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
5108 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
5109 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
5110 if (retval) {
5111 e_err("Could not read PHY page 769\n");
5112 goto out;
5113 }
5114 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5115 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
5116 if (retval)
5117 e_err("Could not set PHY Host Wakeup bit\n");
5118out:
94d8186a 5119 hw->phy.ops.release(hw);
a4f58f54
BA		 5120
5121 return retval;
5122}
5123
23606cf5
RW		 5124static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5125 bool runtime)
bc7f75fa
AK		 5126{
5127 struct net_device *netdev = pci_get_drvdata(pdev);
5128 struct e1000_adapter *adapter = netdev_priv(netdev);
5129 struct e1000_hw *hw = &adapter->hw;
5130 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5131 /* Runtime suspend should only enable wakeup for link changes */
5132 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5133 int retval = 0;
5134
5135 netif_device_detach(netdev);
5136
5137 if (netif_running(netdev)) {
5138 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5139 e1000e_down(adapter);
5140 e1000_free_irq(adapter);
5141 }
4662e82b 5142 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5143
5144 retval = pci_save_state(pdev);
5145 if (retval)
5146 return retval;
5147
5148 status = er32(STATUS);
5149 if (status & E1000_STATUS_LU)
5150 wufc &= ~E1000_WUFC_LNKC;
5151
5152 if (wufc) {
5153 e1000_setup_rctl(adapter);
5154 e1000_set_multi(netdev);
5155
5156 /* turn on all-multi mode if wake on multicast is enabled */
5157 if (wufc & E1000_WUFC_MC) {
5158 rctl = er32(RCTL);
5159 rctl |= E1000_RCTL_MPE;
5160 ew32(RCTL, rctl);
5161 }
5162
5163 ctrl = er32(CTRL);
5164 /* advertise wake from D3Cold */
5165 #define E1000_CTRL_ADVD3WUC 0x00100000
5166 /* phy power management enable */
5167 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5168 ctrl |= E1000_CTRL_ADVD3WUC;
5169 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5170 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5171 ew32(CTRL, ctrl);
5172
318a94d6
JK		 5173 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5174 adapter->hw.phy.media_type ==
5175 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5176 /* keep the laser running in D3 */
5177 ctrl_ext = er32(CTRL_EXT);
93a23f48 5178 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5179 ew32(CTRL_EXT, ctrl_ext);
5180 }
5181
97ac8cae
BA		 5182 if (adapter->flags & FLAG_IS_ICH)
5183 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5184
bc7f75fa
AK		 5185 /* Allow time for pending master requests to run */
5186 e1000e_disable_pcie_master(&adapter->hw);
5187
82776a4b 5188 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5189 /* enable wakeup by the PHY */
5190 retval = e1000_init_phy_wakeup(adapter, wufc);
5191 if (retval)
5192 return retval;
5193 } else {
5194 /* enable wakeup by the MAC */
5195 ew32(WUFC, wufc);
5196 ew32(WUC, E1000_WUC_PME_EN);
5197 }
bc7f75fa
AK		 5198 } else {
5199 ew32(WUC, 0);
5200 ew32(WUFC, 0);
bc7f75fa
AK		 5201 }
5202
4f9de721
RW		 5203 *enable_wake = !!wufc;
5204
bc7f75fa 5205 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5206 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5207 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5208 *enable_wake = true;
bc7f75fa
AK		 5209
5210 if (adapter->hw.phy.type == e1000_phy_igp_3)
5211 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5212
ad68076e
BA		 5213 /*
5214 * Release control of h/w to f/w. If f/w is AMT enabled, this
5215 * would have already happened in close and is redundant.
5216 */
bc7f75fa
AK		 5217 e1000_release_hw_control(adapter);
5218
5219 pci_disable_device(pdev);
5220
4f9de721
RW		 5221 return 0;
5222}
5223
5224static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5225{
5226 if (sleep && wake) {
5227 pci_prepare_to_sleep(pdev);
5228 return;
5229 }
5230
5231 pci_wake_from_d3(pdev, wake);
5232 pci_set_power_state(pdev, PCI_D3hot);
5233}
5234
5235static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5236 bool wake)
5237{
5238 struct net_device *netdev = pci_get_drvdata(pdev);
5239 struct e1000_adapter *adapter = netdev_priv(netdev);
5240
005cbdfc
AD		 5241 /*
5242 * The pci-e switch on some quad port adapters will report a
5243 * correctable error when the MAC transitions from D0 to D3. To
5244 * prevent this we need to mask off the correctable errors on the
5245 * downstream port of the pci-e switch.
5246 */
5247 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5248 struct pci_dev *us_dev = pdev->bus->self;
5249 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5250 u16 devctl;
5251
5252 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5253 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5254 (devctl & ~PCI_EXP_DEVCTL_CERE));
5255
4f9de721 5256 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5257
5258 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5259 } else {
4f9de721 5260 e1000_power_off(pdev, sleep, wake);
005cbdfc 5261 }
bc7f75fa
AK		 5262}
5263
6f461f6c
BA		 5264#ifdef CONFIG_PCIEASPM
5265static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5266{
5267 pci_disable_link_state(pdev, state);
5268}
5269#else
5270static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5271{
5272 int pos;
6f461f6c 5273 u16 reg16;
1eae4eb2
AK		 5274
5275 /*
6f461f6c
BA		 5276 * Both device and parent should have the same ASPM setting.
5277 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5278 */
6f461f6c
BA		 5279 pos = pci_pcie_cap(pdev);
5280 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5281 reg16 &= ~state;
5282 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5283
0c75ba22
AB		 5284 if (!pdev->bus->self)
5285 return;
5286
6f461f6c
BA		 5287 pos = pci_pcie_cap(pdev->bus->self);
5288 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5289 reg16 &= ~state;
5290 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5291}
5292#endif
5293void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5294{
5295 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5296 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5297 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5298
5299 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5300}
5301
a0340162 5302#ifdef CONFIG_PM_OPS
23606cf5 5303static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5304{
23606cf5 5305 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5306}
5307
23606cf5 5308static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5309{
5310 struct net_device *netdev = pci_get_drvdata(pdev);
5311 struct e1000_adapter *adapter = netdev_priv(netdev);
5312 struct e1000_hw *hw = &adapter->hw;
5313 u32 err;
5314
5315 pci_set_power_state(pdev, PCI_D0);
5316 pci_restore_state(pdev);
28b8f04a 5317 pci_save_state(pdev);
6f461f6c
BA		 5318 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5319 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5320
4662e82b 5321 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5322 if (netif_running(netdev)) {
5323 err = e1000_request_irq(adapter);
5324 if (err)
5325 return err;
5326 }
5327
5328 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5329
5330 /* report the system wakeup cause from S3/S4 */
5331 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5332 u16 phy_data;
5333
5334 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5335 if (phy_data) {
5336 e_info("PHY Wakeup cause - %s\n",
5337 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5338 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5339 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5340 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5341 phy_data & E1000_WUS_LNKC ? "Link Status "
5342 " Change" : "other");
5343 }
5344 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5345 } else {
5346 u32 wus = er32(WUS);
5347 if (wus) {
5348 e_info("MAC Wakeup cause - %s\n",
5349 wus & E1000_WUS_EX ? "Unicast Packet" :
5350 wus & E1000_WUS_MC ? "Multicast Packet" :
5351 wus & E1000_WUS_BC ? "Broadcast Packet" :
5352 wus & E1000_WUS_MAG ? "Magic Packet" :
5353 wus & E1000_WUS_LNKC ? "Link Status Change" :
5354 "other");
5355 }
5356 ew32(WUS, ~0);
5357 }
5358
bc7f75fa 5359 e1000e_reset(adapter);
bc7f75fa 5360
cd791618 5361 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5362
5363 if (netif_running(netdev))
5364 e1000e_up(adapter);
5365
5366 netif_device_attach(netdev);
5367
ad68076e
BA		 5368 /*
5369 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5370 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5371 * under the control of the driver.
5372 */
c43bc57e 5373 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5374 e1000_get_hw_control(adapter);
5375
5376 return 0;
5377}
23606cf5 5378
a0340162
RW		 5379#ifdef CONFIG_PM_SLEEP
5380static int e1000_suspend(struct device *dev)
5381{
5382 struct pci_dev *pdev = to_pci_dev(dev);
5383 int retval;
5384 bool wake;
5385
5386 retval = __e1000_shutdown(pdev, &wake, false);
5387 if (!retval)
5388 e1000_complete_shutdown(pdev, true, wake);
5389
5390 return retval;
5391}
5392
23606cf5
RW		 5393static int e1000_resume(struct device *dev)
5394{
5395 struct pci_dev *pdev = to_pci_dev(dev);
5396 struct net_device *netdev = pci_get_drvdata(pdev);
5397 struct e1000_adapter *adapter = netdev_priv(netdev);
5398
5399 if (e1000e_pm_ready(adapter))
5400 adapter->idle_check = true;
5401
5402 return __e1000_resume(pdev);
5403}
a0340162
RW		 5404#endif /* CONFIG_PM_SLEEP */
5405
5406#ifdef CONFIG_PM_RUNTIME
5407static int e1000_runtime_suspend(struct device *dev)
5408{
5409 struct pci_dev *pdev = to_pci_dev(dev);
5410 struct net_device *netdev = pci_get_drvdata(pdev);
5411 struct e1000_adapter *adapter = netdev_priv(netdev);
5412
5413 if (e1000e_pm_ready(adapter)) {
5414 bool wake;
5415
5416 __e1000_shutdown(pdev, &wake, true);
5417 }
5418
5419 return 0;
5420}
5421
5422static int e1000_idle(struct device *dev)
5423{
5424 struct pci_dev *pdev = to_pci_dev(dev);
5425 struct net_device *netdev = pci_get_drvdata(pdev);
5426 struct e1000_adapter *adapter = netdev_priv(netdev);
5427
5428 if (!e1000e_pm_ready(adapter))
5429 return 0;
5430
5431 if (adapter->idle_check) {
5432 adapter->idle_check = false;
5433 if (!e1000e_has_link(adapter))
5434 pm_schedule_suspend(dev, MSEC_PER_SEC);
5435 }
5436
5437 return -EBUSY;
5438}
23606cf5
RW		 5439
5440static int e1000_runtime_resume(struct device *dev)
5441{
5442 struct pci_dev *pdev = to_pci_dev(dev);
5443 struct net_device *netdev = pci_get_drvdata(pdev);
5444 struct e1000_adapter *adapter = netdev_priv(netdev);
5445
5446 if (!e1000e_pm_ready(adapter))
5447 return 0;
5448
5449 adapter->idle_check = !dev->power.runtime_auto;
5450 return __e1000_resume(pdev);
5451}
a0340162
RW		 5452#endif /* CONFIG_PM_RUNTIME */
5453#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5454
5455static void e1000_shutdown(struct pci_dev *pdev)
5456{
4f9de721
RW		 5457 bool wake = false;
5458
23606cf5 5459 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5460
5461 if (system_state == SYSTEM_POWER_OFF)
5462 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5463}
5464
5465#ifdef CONFIG_NET_POLL_CONTROLLER
147b2c8c
DD		 5466
5467static irqreturn_t e1000_intr_msix(int irq, void *data)
5468{
5469 struct net_device *netdev = data;
5470 struct e1000_adapter *adapter = netdev_priv(netdev);
5471 int vector, msix_irq;
5472
5473 if (adapter->msix_entries) {
5474 vector = 0;
5475 msix_irq = adapter->msix_entries[vector].vector;
5476 disable_irq(msix_irq);
5477 e1000_intr_msix_rx(msix_irq, netdev);
5478 enable_irq(msix_irq);
5479
5480 vector++;
5481 msix_irq = adapter->msix_entries[vector].vector;
5482 disable_irq(msix_irq);
5483 e1000_intr_msix_tx(msix_irq, netdev);
5484 enable_irq(msix_irq);
5485
5486 vector++;
5487 msix_irq = adapter->msix_entries[vector].vector;
5488 disable_irq(msix_irq);
5489 e1000_msix_other(msix_irq, netdev);
5490 enable_irq(msix_irq);
5491 }
5492
5493 return IRQ_HANDLED;
5494}
5495
bc7f75fa
AK		 5496/*
5497 * Polling 'interrupt' - used by things like netconsole to send skbs
5498 * without having to re-enable interrupts. It's not called while
5499 * the interrupt routine is executing.
5500 */
5501static void e1000_netpoll(struct net_device *netdev)
5502{
5503 struct e1000_adapter *adapter = netdev_priv(netdev);
5504
147b2c8c
DD		 5505 switch (adapter->int_mode) {
5506 case E1000E_INT_MODE_MSIX:
5507 e1000_intr_msix(adapter->pdev->irq, netdev);
5508 break;
5509 case E1000E_INT_MODE_MSI:
5510 disable_irq(adapter->pdev->irq);
5511 e1000_intr_msi(adapter->pdev->irq, netdev);
5512 enable_irq(adapter->pdev->irq);
5513 break;
5514 default: /* E1000E_INT_MODE_LEGACY */
5515 disable_irq(adapter->pdev->irq);
5516 e1000_intr(adapter->pdev->irq, netdev);
5517 enable_irq(adapter->pdev->irq);
5518 break;
5519 }
bc7f75fa
AK		 5520}
5521#endif
5522
5523/**
5524 * e1000_io_error_detected - called when PCI error is detected
5525 * @pdev: Pointer to PCI device
5526 * @state: The current pci connection state
5527 *
5528 * This function is called after a PCI bus error affecting
5529 * this device has been detected.
5530 */
5531static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5532 pci_channel_state_t state)
5533{
5534 struct net_device *netdev = pci_get_drvdata(pdev);
5535 struct e1000_adapter *adapter = netdev_priv(netdev);
5536
5537 netif_device_detach(netdev);
5538
c93b5a76
MM		 5539 if (state == pci_channel_io_perm_failure)
5540 return PCI_ERS_RESULT_DISCONNECT;
5541
bc7f75fa
AK		 5542 if (netif_running(netdev))
5543 e1000e_down(adapter);
5544 pci_disable_device(pdev);
5545
5546 /* Request a slot slot reset. */
5547 return PCI_ERS_RESULT_NEED_RESET;
5548}
5549
5550/**
5551 * e1000_io_slot_reset - called after the pci bus has been reset.
5552 * @pdev: Pointer to PCI device
5553 *
5554 * Restart the card from scratch, as if from a cold-boot. Implementation
5555 * resembles the first-half of the e1000_resume routine.
5556 */
5557static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5558{
5559 struct net_device *netdev = pci_get_drvdata(pdev);
5560 struct e1000_adapter *adapter = netdev_priv(netdev);
5561 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5562 int err;
111b9dc5 5563 pci_ers_result_t result;
bc7f75fa 5564
6f461f6c
BA		 5565 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5566 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5567 err = pci_enable_device_mem(pdev);
6e4f6f6b 5568 if (err) {
bc7f75fa
AK		 5569 dev_err(&pdev->dev,
5570 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5571 result = PCI_ERS_RESULT_DISCONNECT;
5572 } else {
5573 pci_set_master(pdev);
23606cf5 5574 pdev->state_saved = true;
111b9dc5 5575 pci_restore_state(pdev);
bc7f75fa 5576
111b9dc5
JB		 5577 pci_enable_wake(pdev, PCI_D3hot, 0);
5578 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5579
111b9dc5
JB		 5580 e1000e_reset(adapter);
5581 ew32(WUS, ~0);
5582 result = PCI_ERS_RESULT_RECOVERED;
5583 }
bc7f75fa 5584
111b9dc5
JB		 5585 pci_cleanup_aer_uncorrect_error_status(pdev);
5586
5587 return result;
bc7f75fa
AK		 5588}
5589
5590/**
5591 * e1000_io_resume - called when traffic can start flowing again.
5592 * @pdev: Pointer to PCI device
5593 *
5594 * This callback is called when the error recovery driver tells us that
5595 * its OK to resume normal operation. Implementation resembles the
5596 * second-half of the e1000_resume routine.
5597 */
5598static void e1000_io_resume(struct pci_dev *pdev)
5599{
5600 struct net_device *netdev = pci_get_drvdata(pdev);
5601 struct e1000_adapter *adapter = netdev_priv(netdev);
5602
cd791618 5603 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5604
5605 if (netif_running(netdev)) {
5606 if (e1000e_up(adapter)) {
5607 dev_err(&pdev->dev,
5608 "can't bring device back up after reset\n");
5609 return;
5610 }
5611 }
5612
5613 netif_device_attach(netdev);
5614
ad68076e
BA		 5615 /*
5616 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5617 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5618 * under the control of the driver.
5619 */
c43bc57e 5620 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5621 e1000_get_hw_control(adapter);
5622
5623}
5624
5625static void e1000_print_device_info(struct e1000_adapter *adapter)
5626{
5627 struct e1000_hw *hw = &adapter->hw;
5628 struct net_device *netdev = adapter->netdev;
69e3fd8c 5629 u32 pba_num;
bc7f75fa
AK		 5630
5631 /* print bus type/speed/width info */
7c510e4b 5632 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5633 /* bus width */
5634 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5635 "Width x1"),
5636 /* MAC address */
7c510e4b 5637 netdev->dev_addr);
44defeb3
JK		 5638 e_info("Intel(R) PRO/%s Network Connection\n",
5639 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 5640 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 5641 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5642 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 5643}
5644
10aa4c04
AK		 5645static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5646{
5647 struct e1000_hw *hw = &adapter->hw;
5648 int ret_val;
5649 u16 buf = 0;
5650
5651 if (hw->mac.type != e1000_82573)
5652 return;
5653
5654 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5655 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5656 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5657 dev_warn(&adapter->pdev->dev,
5658 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5659 }
10aa4c04
AK		 5660}
5661
651c2466
SH		 5662static const struct net_device_ops e1000e_netdev_ops = {
5663 .ndo_open = e1000_open,
5664 .ndo_stop = e1000_close,
00829823 5665 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 5666 .ndo_get_stats = e1000_get_stats,
5667 .ndo_set_multicast_list = e1000_set_multi,
5668 .ndo_set_mac_address = e1000_set_mac,
5669 .ndo_change_mtu = e1000_change_mtu,
5670 .ndo_do_ioctl = e1000_ioctl,
5671 .ndo_tx_timeout = e1000_tx_timeout,
5672 .ndo_validate_addr = eth_validate_addr,
5673
5674 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5675 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5676 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5677#ifdef CONFIG_NET_POLL_CONTROLLER
5678 .ndo_poll_controller = e1000_netpoll,
5679#endif
5680};
5681
bc7f75fa
AK		 5682/**
5683 * e1000_probe - Device Initialization Routine
5684 * @pdev: PCI device information struct
5685 * @ent: entry in e1000_pci_tbl
5686 *
5687 * Returns 0 on success, negative on failure
5688 *
5689 * e1000_probe initializes an adapter identified by a pci_dev structure.
5690 * The OS initialization, configuring of the adapter private structure,
5691 * and a hardware reset occur.
5692 **/
5693static int __devinit e1000_probe(struct pci_dev *pdev,
5694 const struct pci_device_id *ent)
5695{
5696 struct net_device *netdev;
5697 struct e1000_adapter *adapter;
5698 struct e1000_hw *hw;
5699 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5700 resource_size_t mmio_start, mmio_len;
5701 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5702
5703 static int cards_found;
5704 int i, err, pci_using_dac;
5705 u16 eeprom_data = 0;
5706 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5707
6f461f6c
BA		 5708 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5709 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5710
f0f422e5 5711 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5712 if (err)
5713 return err;
5714
5715 pci_using_dac = 0;
0be3f55f 5716 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5717 if (!err) {
0be3f55f 5718 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5719 if (!err)
5720 pci_using_dac = 1;
5721 } else {
0be3f55f 5722 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5723 if (err) {
0be3f55f
NN		 5724 err = dma_set_coherent_mask(&pdev->dev,
5725 DMA_BIT_MASK(32));
bc7f75fa
AK		 5726 if (err) {
5727 dev_err(&pdev->dev, "No usable DMA "
5728 "configuration, aborting\n");
5729 goto err_dma;
5730 }
5731 }
5732 }
5733
e8de1481 5734 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5735 pci_select_bars(pdev, IORESOURCE_MEM),
5736 e1000e_driver_name);
bc7f75fa
AK		 5737 if (err)
5738 goto err_pci_reg;
5739
68eac460 5740 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5741 pci_enable_pcie_error_reporting(pdev);
68eac460 5742
bc7f75fa 5743 pci_set_master(pdev);
438b365a
BA		 5744 /* PCI config space info */
5745 err = pci_save_state(pdev);
5746 if (err)
5747 goto err_alloc_etherdev;
bc7f75fa
AK		 5748
5749 err = -ENOMEM;
5750 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5751 if (!netdev)
5752 goto err_alloc_etherdev;
5753
bc7f75fa
AK		 5754 SET_NETDEV_DEV(netdev, &pdev->dev);
5755
f85e4dfa
TH		 5756 netdev->irq = pdev->irq;
5757
bc7f75fa
AK		 5758 pci_set_drvdata(pdev, netdev);
5759 adapter = netdev_priv(netdev);
5760 hw = &adapter->hw;
5761 adapter->netdev = netdev;
5762 adapter->pdev = pdev;
5763 adapter->ei = ei;
5764 adapter->pba = ei->pba;
5765 adapter->flags = ei->flags;
eb7c3adb 5766 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5767 adapter->hw.adapter = adapter;
5768 adapter->hw.mac.type = ei->mac;
2adc55c9 5769 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5770 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5771
5772 mmio_start = pci_resource_start(pdev, 0);
5773 mmio_len = pci_resource_len(pdev, 0);
5774
5775 err = -EIO;
5776 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5777 if (!adapter->hw.hw_addr)
5778 goto err_ioremap;
5779
5780 if ((adapter->flags & FLAG_HAS_FLASH) &&
5781 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5782 flash_start = pci_resource_start(pdev, 1);
5783 flash_len = pci_resource_len(pdev, 1);
5784 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5785 if (!adapter->hw.flash_address)
5786 goto err_flashmap;
5787 }
5788
5789 /* construct the net_device struct */
651c2466 5790 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5791 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5792 netdev->watchdog_timeo = 5 * HZ;
5793 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5794 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5795
5796 netdev->mem_start = mmio_start;
5797 netdev->mem_end = mmio_start + mmio_len;
5798
5799 adapter->bd_number = cards_found++;
5800
4662e82b
BA		 5801 e1000e_check_options(adapter);
5802
bc7f75fa
AK		 5803 /* setup adapter struct */
5804 err = e1000_sw_init(adapter);
5805 if (err)
5806 goto err_sw_init;
5807
bc7f75fa
AK		 5808 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5809 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5810 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5811
69e3fd8c 5812 err = ei->get_variants(adapter);
bc7f75fa
AK		 5813 if (err)
5814 goto err_hw_init;
5815
4a770358
BA		 5816 if ((adapter->flags & FLAG_IS_ICH) &&
5817 (adapter->flags & FLAG_READ_ONLY_NVM))
5818 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5819
bc7f75fa
AK		 5820 hw->mac.ops.get_bus_info(&adapter->hw);
5821
318a94d6 5822 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5823
5824 /* Copper options */
318a94d6 5825 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5826 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5827 adapter->hw.phy.disable_polarity_correction = 0;
5828 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5829 }
5830
5831 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5832 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5833
5834 netdev->features = NETIF_F_SG |
5835 NETIF_F_HW_CSUM |
5836 NETIF_F_HW_VLAN_TX |
5837 NETIF_F_HW_VLAN_RX;
5838
5839 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5840 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5841
5842 netdev->features |= NETIF_F_TSO;
5843 netdev->features |= NETIF_F_TSO6;
5844
a5136e23
JK		 5845 netdev->vlan_features |= NETIF_F_TSO;
5846 netdev->vlan_features |= NETIF_F_TSO6;
5847 netdev->vlan_features |= NETIF_F_HW_CSUM;
5848 netdev->vlan_features |= NETIF_F_SG;
5849
7b872a55 5850 if (pci_using_dac) {
bc7f75fa 5851 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 5852 netdev->vlan_features |= NETIF_F_HIGHDMA;
5853 }
bc7f75fa 5854
bc7f75fa
AK		 5855 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5856 adapter->flags |= FLAG_MNG_PT_ENABLED;
5857
ad68076e
BA		 5858 /*
5859 * before reading the NVM, reset the controller to
5860 * put the device in a known good starting state
5861 */
bc7f75fa
AK		 5862 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5863
5864 /*
5865 * systems with ASPM and others may see the checksum fail on the first
5866 * attempt. Let's give it a few tries
5867 */
5868 for (i = 0;; i++) {
5869 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5870 break;
5871 if (i == 2) {
44defeb3 5872 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5873 err = -EIO;
5874 goto err_eeprom;
5875 }
5876 }
5877
10aa4c04
AK		 5878 e1000_eeprom_checks(adapter);
5879
608f8a0d 5880 /* copy the MAC address */
bc7f75fa 5881 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5882 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5883
5884 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5885 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5886
5887 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5888 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5889 err = -EIO;
5890 goto err_eeprom;
5891 }
5892
5893 init_timer(&adapter->watchdog_timer);
c061b18d 5894 adapter->watchdog_timer.function = e1000_watchdog;
bc7f75fa
AK		 5895 adapter->watchdog_timer.data = (unsigned long) adapter;
5896
5897 init_timer(&adapter->phy_info_timer);
c061b18d 5898 adapter->phy_info_timer.function = e1000_update_phy_info;
bc7f75fa
AK		 5899 adapter->phy_info_timer.data = (unsigned long) adapter;
5900
5901 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5902 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5903 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5904 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5905 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
9633e63b 5906 INIT_WORK(&adapter->led_blink_task, e1000e_led_blink_task);
bc7f75fa 5907
bc7f75fa
AK		 5908 /* Initialize link parameters. User can change them with ethtool */
5909 adapter->hw.mac.autoneg = 1;
309af40b 5910 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5911 adapter->hw.fc.requested_mode = e1000_fc_default;
5912 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5913 adapter->hw.phy.autoneg_advertised = 0x2f;
5914
5915 /* ring size defaults */
5916 adapter->rx_ring->count = 256;
5917 adapter->tx_ring->count = 256;
5918
5919 /*
5920 * Initial Wake on LAN setting - If APM wake is enabled in
5921 * the EEPROM, enable the ACPI Magic Packet filter
5922 */
5923 if (adapter->flags & FLAG_APME_IN_WUC) {
5924 /* APME bit in EEPROM is mapped to WUC.APME */
5925 eeprom_data = er32(WUC);
5926 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5927 if (eeprom_data & E1000_WUC_PHY_WAKE)
5928 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5929 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5930 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5931 (adapter->hw.bus.func == 1))
5932 e1000_read_nvm(&adapter->hw,
5933 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5934 else
5935 e1000_read_nvm(&adapter->hw,
5936 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5937 }
5938
5939 /* fetch WoL from EEPROM */
5940 if (eeprom_data & eeprom_apme_mask)
5941 adapter->eeprom_wol |= E1000_WUFC_MAG;
5942
5943 /*
5944 * now that we have the eeprom settings, apply the special cases
5945 * where the eeprom may be wrong or the board simply won't support
5946 * wake on lan on a particular port
5947 */
5948 if (!(adapter->flags & FLAG_HAS_WOL))
5949 adapter->eeprom_wol = 0;
5950
5951 /* initialize the wol settings based on the eeprom settings */
5952 adapter->wol = adapter->eeprom_wol;
6ff68026 5953 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5954
84527590
BA		 5955 /* save off EEPROM version number */
5956 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5957
bc7f75fa
AK		 5958 /* reset the hardware with the new settings */
5959 e1000e_reset(adapter);
5960
ad68076e
BA		 5961 /*
5962 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5963 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5964 * under the control of the driver.
5965 */
c43bc57e 5966 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5967 e1000_get_hw_control(adapter);
5968
bc7f75fa
AK		 5969 strcpy(netdev->name, "eth%d");
5970 err = register_netdev(netdev);
5971 if (err)
5972 goto err_register;
5973
9c563d20
JB		 5974 /* carrier off reporting is important to ethtool even BEFORE open */
5975 netif_carrier_off(netdev);
5976
bc7f75fa
AK		 5977 e1000_print_device_info(adapter);
5978
f3ec4f87
AS		 5979 if (pci_dev_run_wake(pdev))
5980 pm_runtime_put_noidle(&pdev->dev);
23606cf5 5981
bc7f75fa
AK		 5982 return 0;
5983
5984err_register:
c43bc57e
JB		 5985 if (!(adapter->flags & FLAG_HAS_AMT))
5986 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5987err_eeprom:
5988 if (!e1000_check_reset_block(&adapter->hw))
5989 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5990err_hw_init:
bc7f75fa 5991
bc7f75fa
AK		 5992 kfree(adapter->tx_ring);
5993 kfree(adapter->rx_ring);
5994err_sw_init:
c43bc57e
JB		 5995 if (adapter->hw.flash_address)
5996 iounmap(adapter->hw.flash_address);
e82f54ba 5997 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5998err_flashmap:
bc7f75fa
AK		 5999 iounmap(adapter->hw.hw_addr);
6000err_ioremap:
6001 free_netdev(netdev);
6002err_alloc_etherdev:
f0f422e5
BA		 6003 pci_release_selected_regions(pdev,
6004 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6005err_pci_reg:
6006err_dma:
6007 pci_disable_device(pdev);
6008 return err;
6009}
6010
6011/**
6012 * e1000_remove - Device Removal Routine
6013 * @pdev: PCI device information struct
6014 *
6015 * e1000_remove is called by the PCI subsystem to alert the driver
6016 * that it should release a PCI device. The could be caused by a
6017 * Hot-Plug event, or because the driver is going to be removed from
6018 * memory.
6019 **/
6020static void __devexit e1000_remove(struct pci_dev *pdev)
6021{
6022 struct net_device *netdev = pci_get_drvdata(pdev);
6023 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 6024 bool down = test_bit(__E1000_DOWN, &adapter->state);
6025
ad68076e
BA		 6026 /*
6027 * flush_scheduled work may reschedule our watchdog task, so
6028 * explicitly disable watchdog tasks from being rescheduled
6029 */
23606cf5
RW		 6030 if (!down)
6031 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 6032 del_timer_sync(&adapter->watchdog_timer);
6033 del_timer_sync(&adapter->phy_info_timer);
6034
41cec6f1
BA		 6035 cancel_work_sync(&adapter->reset_task);
6036 cancel_work_sync(&adapter->watchdog_task);
6037 cancel_work_sync(&adapter->downshift_task);
6038 cancel_work_sync(&adapter->update_phy_task);
6039 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 6040 flush_scheduled_work();
6041
17f208de
BA		 6042 if (!(netdev->flags & IFF_UP))
6043 e1000_power_down_phy(adapter);
6044
23606cf5
RW		 6045 /* Don't lie to e1000_close() down the road. */
6046 if (!down)
6047 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 6048 unregister_netdev(netdev);
6049
f3ec4f87
AS		 6050 if (pci_dev_run_wake(pdev))
6051 pm_runtime_get_noresume(&pdev->dev);
23606cf5 6052
ad68076e
BA		 6053 /*
6054 * Release control of h/w to f/w. If f/w is AMT enabled, this
6055 * would have already happened in close and is redundant.
6056 */
bc7f75fa
AK		 6057 e1000_release_hw_control(adapter);
6058
4662e82b 6059 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 6060 kfree(adapter->tx_ring);
6061 kfree(adapter->rx_ring);
6062
6063 iounmap(adapter->hw.hw_addr);
6064 if (adapter->hw.flash_address)
6065 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 6066 pci_release_selected_regions(pdev,
6067 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6068
6069 free_netdev(netdev);
6070
111b9dc5 6071 /* AER disable */
19d5afd4 6072 pci_disable_pcie_error_reporting(pdev);
111b9dc5 6073
bc7f75fa
AK		 6074 pci_disable_device(pdev);
6075}
6076
6077/* PCI Error Recovery (ERS) */
6078static struct pci_error_handlers e1000_err_handler = {
6079 .error_detected = e1000_io_error_detected,
6080 .slot_reset = e1000_io_slot_reset,
6081 .resume = e1000_io_resume,
6082};
6083
a3aa1884 6084static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 6085 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6086 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6087 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6088 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6089 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6090 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 6091 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6092 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6093 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 6094
bc7f75fa
AK		 6095 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6096 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6097 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6098 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 6099
bc7f75fa
AK		 6100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 6103
4662e82b 6104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 6105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 6106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 6107
bc7f75fa
AK		 6108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6109 board_80003es2lan },
6110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6111 board_80003es2lan },
6112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6113 board_80003es2lan },
6114 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6115 board_80003es2lan },
ad68076e 6116
bc7f75fa
AK		 6117 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6118 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6119 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6120 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6121 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6122 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6123 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 6124 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 6125
bc7f75fa
AK		 6126 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6127 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6128 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6129 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6130 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 6131 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 6132 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6133 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6134 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6135
6136 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6137 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6138 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 6139
f4187b56
BA		 6140 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6141 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 6142 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 6143
a4f58f54
BA		 6144 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6145 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6146 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6147 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6148
d3738bb8
BA		 6149 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6150 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6151
bc7f75fa
AK		 6152 { } /* terminate list */
6153};
6154MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6155
a0340162 6156#ifdef CONFIG_PM_OPS
23606cf5 6157static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6158 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6159 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6160 e1000_runtime_resume, e1000_idle)
23606cf5 6161};
e50208a0 6162#endif
23606cf5 6163
bc7f75fa
AK		 6164/* PCI Device API Driver */
6165static struct pci_driver e1000_driver = {
6166 .name = e1000e_driver_name,
6167 .id_table = e1000_pci_tbl,
6168 .probe = e1000_probe,
6169 .remove = __devexit_p(e1000_remove),
a0340162 6170#ifdef CONFIG_PM_OPS
23606cf5 6171 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6172#endif
6173 .shutdown = e1000_shutdown,
6174 .err_handler = &e1000_err_handler
6175};
6176
6177/**
6178 * e1000_init_module - Driver Registration Routine
6179 *
6180 * e1000_init_module is the first routine called when the driver is
6181 * loaded. All it does is register with the PCI subsystem.
6182 **/
6183static int __init e1000_init_module(void)
6184{
6185 int ret;
8544b9f7
BA		 6186 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6187 e1000e_driver_version);
451152d9 6188 pr_info("Copyright (c) 1999 - 2010 Intel Corporation.\n");
bc7f75fa 6189 ret = pci_register_driver(&e1000_driver);
53ec5498 6190
bc7f75fa
AK		 6191 return ret;
6192}
6193module_init(e1000_init_module);
6194
6195/**
6196 * e1000_exit_module - Driver Exit Cleanup Routine
6197 *
6198 * e1000_exit_module is called just before the driver is removed
6199 * from memory.
6200 **/
6201static void __exit e1000_exit_module(void)
6202{
6203 pci_unregister_driver(&e1000_driver);
6204}
6205module_exit(e1000_exit_module);
6206
6207
6208MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6209MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6210MODULE_LICENSE("GPL");
6211MODULE_VERSION(DRV_VERSION);
6212
6213/* e1000_main.c */
kernel source for telekom puls (alcatel/mediatek)