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e1000e: alternate MAC address update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
0d6057e4 4 Copyright(c) 1999 - 2011 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
9fb7a5f7 39#include <linux/interrupt.h>
bc7f75fa
AK		 40#include <linux/tcp.h>
41#include <linux/ipv6.h>
5a0e3ad6 42#include <linux/slab.h>
bc7f75fa
AK		 43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/mii.h>
46#include <linux/ethtool.h>
47#include <linux/if_vlan.h>
48#include <linux/cpu.h>
49#include <linux/smp.h>
97ac8cae 50#include <linux/pm_qos_params.h>
23606cf5 51#include <linux/pm_runtime.h>
111b9dc5 52#include <linux/aer.h>
70c71606 53#include <linux/prefetch.h>
bc7f75fa
AK		 54
55#include "e1000.h"
56
b3ccf267 57#define DRV_EXTRAVERSION "-k"
c14c643b 58
b3ccf267 59#define DRV_VERSION "1.3.16" DRV_EXTRAVERSION
bc7f75fa
AK		 60char e1000e_driver_name[] = "e1000e";
61const char e1000e_driver_version[] = DRV_VERSION;
62
78cd29d5
BA		 63static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state);
64
bc7f75fa
AK		 65static const struct e1000_info *e1000_info_tbl[] = {
66 [board_82571] = &e1000_82571_info,
67 [board_82572] = &e1000_82572_info,
68 [board_82573] = &e1000_82573_info,
4662e82b 69 [board_82574] = &e1000_82574_info,
8c81c9c3 70 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 71 [board_80003es2lan] = &e1000_es2_info,
72 [board_ich8lan] = &e1000_ich8_info,
73 [board_ich9lan] = &e1000_ich9_info,
f4187b56 74 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 75 [board_pchlan] = &e1000_pch_info,
d3738bb8 76 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 77};
78
84f4ee90
TI		 79struct e1000_reg_info {
80 u32 ofs;
81 char *name;
82};
83
af667a29
BA		 84#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
85#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
86#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
87#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
88#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
89
90#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
91#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
92#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
93#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
94#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
84f4ee90
TI		 95
96static const struct e1000_reg_info e1000_reg_info_tbl[] = {
97
98 /* General Registers */
99 {E1000_CTRL, "CTRL"},
100 {E1000_STATUS, "STATUS"},
101 {E1000_CTRL_EXT, "CTRL_EXT"},
102
103 /* Interrupt Registers */
104 {E1000_ICR, "ICR"},
105
af667a29 106 /* Rx Registers */
84f4ee90
TI		 107 {E1000_RCTL, "RCTL"},
108 {E1000_RDLEN, "RDLEN"},
109 {E1000_RDH, "RDH"},
110 {E1000_RDT, "RDT"},
111 {E1000_RDTR, "RDTR"},
112 {E1000_RXDCTL(0), "RXDCTL"},
113 {E1000_ERT, "ERT"},
114 {E1000_RDBAL, "RDBAL"},
115 {E1000_RDBAH, "RDBAH"},
116 {E1000_RDFH, "RDFH"},
117 {E1000_RDFT, "RDFT"},
118 {E1000_RDFHS, "RDFHS"},
119 {E1000_RDFTS, "RDFTS"},
120 {E1000_RDFPC, "RDFPC"},
121
af667a29 122 /* Tx Registers */
84f4ee90
TI		 123 {E1000_TCTL, "TCTL"},
124 {E1000_TDBAL, "TDBAL"},
125 {E1000_TDBAH, "TDBAH"},
126 {E1000_TDLEN, "TDLEN"},
127 {E1000_TDH, "TDH"},
128 {E1000_TDT, "TDT"},
129 {E1000_TIDV, "TIDV"},
130 {E1000_TXDCTL(0), "TXDCTL"},
131 {E1000_TADV, "TADV"},
132 {E1000_TARC(0), "TARC"},
133 {E1000_TDFH, "TDFH"},
134 {E1000_TDFT, "TDFT"},
135 {E1000_TDFHS, "TDFHS"},
136 {E1000_TDFTS, "TDFTS"},
137 {E1000_TDFPC, "TDFPC"},
138
139 /* List Terminator */
140 {}
141};
142
143/*
144 * e1000_regdump - register printout routine
145 */
146static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
147{
148 int n = 0;
149 char rname[16];
150 u32 regs[8];
151
152 switch (reginfo->ofs) {
153 case E1000_RXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_RXDCTL(n));
156 break;
157 case E1000_TXDCTL(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TXDCTL(n));
160 break;
161 case E1000_TARC(0):
162 for (n = 0; n < 2; n++)
163 regs[n] = __er32(hw, E1000_TARC(n));
164 break;
165 default:
166 printk(KERN_INFO "%-15s %08x\n",
af667a29 167 reginfo->name, __er32(hw, reginfo->ofs));
84f4ee90
TI		 168 return;
169 }
170
171 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
172 printk(KERN_INFO "%-15s ", rname);
173 for (n = 0; n < 2; n++)
174 printk(KERN_CONT "%08x ", regs[n]);
175 printk(KERN_CONT "\n");
176}
177
84f4ee90 178/*
af667a29 179 * e1000e_dump - Print registers, Tx-ring and Rx-ring
84f4ee90
TI		 180 */
181static void e1000e_dump(struct e1000_adapter *adapter)
182{
183 struct net_device *netdev = adapter->netdev;
184 struct e1000_hw *hw = &adapter->hw;
185 struct e1000_reg_info *reginfo;
186 struct e1000_ring *tx_ring = adapter->tx_ring;
187 struct e1000_tx_desc *tx_desc;
af667a29
BA		 188 struct my_u0 {
189 u64 a;
190 u64 b;
191 } *u0;
84f4ee90
TI		 192 struct e1000_buffer *buffer_info;
193 struct e1000_ring *rx_ring = adapter->rx_ring;
194 union e1000_rx_desc_packet_split *rx_desc_ps;
195 struct e1000_rx_desc *rx_desc;
af667a29
BA		 196 struct my_u1 {
197 u64 a;
198 u64 b;
199 u64 c;
200 u64 d;
201 } *u1;
84f4ee90
TI		 202 u32 staterr;
203 int i = 0;
204
205 if (!netif_msg_hw(adapter))
206 return;
207
208 /* Print netdevice Info */
209 if (netdev) {
210 dev_info(&adapter->pdev->dev, "Net device Info\n");
211 printk(KERN_INFO "Device Name state "
af667a29 212 "trans_start last_rx\n");
84f4ee90 213 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
af667a29
BA		 214 netdev->name, netdev->state, netdev->trans_start,
215 netdev->last_rx);
84f4ee90
TI		 216 }
217
218 /* Print Registers */
219 dev_info(&adapter->pdev->dev, "Register Dump\n");
220 printk(KERN_INFO " Register Name Value\n");
221 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
222 reginfo->name; reginfo++) {
223 e1000_regdump(hw, reginfo);
224 }
225
af667a29 226 /* Print Tx Ring Summary */
84f4ee90
TI		 227 if (!netdev || !netif_running(netdev))
228 goto exit;
229
af667a29 230 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
84f4ee90 231 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
af667a29 232 " leng ntw timestamp\n");
84f4ee90
TI		 233 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
234 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
af667a29
BA		 235 0, tx_ring->next_to_use, tx_ring->next_to_clean,
236 (unsigned long long)buffer_info->dma,
237 buffer_info->length,
238 buffer_info->next_to_watch,
239 (unsigned long long)buffer_info->time_stamp);
84f4ee90 240
af667a29 241 /* Print Tx Ring */
84f4ee90
TI		 242 if (!netif_msg_tx_done(adapter))
243 goto rx_ring_summary;
244
af667a29 245 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
84f4ee90
TI		 246
247 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
248 *
249 * Legacy Transmit Descriptor
250 * +--------------------------------------------------------------+
251 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
252 * +--------------------------------------------------------------+
253 * 8 | Special | CSS | Status | CMD | CSO | Length |
254 * +--------------------------------------------------------------+
255 * 63 48 47 36 35 32 31 24 23 16 15 0
256 *
257 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
258 * 63 48 47 40 39 32 31 16 15 8 7 0
259 * +----------------------------------------------------------------+
260 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
261 * +----------------------------------------------------------------+
262 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
263 * +----------------------------------------------------------------+
264 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
265 *
266 * Extended Data Descriptor (DTYP=0x1)
267 * +----------------------------------------------------------------+
268 * 0 | Buffer Address [63:0] |
269 * +----------------------------------------------------------------+
270 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
271 * +----------------------------------------------------------------+
272 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
273 */
274 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
af667a29
BA		 275 " [bi->dma ] leng ntw timestamp bi->skb "
276 "<-- Legacy format\n");
84f4ee90 277 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
af667a29
BA		 278 " [bi->dma ] leng ntw timestamp bi->skb "
279 "<-- Ext Context format\n");
84f4ee90 280 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
af667a29
BA		 281 " [bi->dma ] leng ntw timestamp bi->skb "
282 "<-- Ext Data format\n");
84f4ee90
TI		 283 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
284 tx_desc = E1000_TX_DESC(*tx_ring, i);
285 buffer_info = &tx_ring->buffer_info[i];
286 u0 = (struct my_u0 *)tx_desc;
287 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
af667a29
BA		 288 "%04X %3X %016llX %p",
289 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
290 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), i,
8eb64e6b
BA		 291 (unsigned long long)le64_to_cpu(u0->a),
292 (unsigned long long)le64_to_cpu(u0->b),
293 (unsigned long long)buffer_info->dma,
294 buffer_info->length, buffer_info->next_to_watch,
295 (unsigned long long)buffer_info->time_stamp,
84f4ee90
TI		 296 buffer_info->skb);
297 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
298 printk(KERN_CONT " NTC/U\n");
299 else if (i == tx_ring->next_to_use)
300 printk(KERN_CONT " NTU\n");
301 else if (i == tx_ring->next_to_clean)
302 printk(KERN_CONT " NTC\n");
303 else
304 printk(KERN_CONT "\n");
305
306 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
307 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
af667a29
BA		 308 16, 1, phys_to_virt(buffer_info->dma),
309 buffer_info->length, true);
84f4ee90
TI		 310 }
311
af667a29 312 /* Print Rx Ring Summary */
84f4ee90 313rx_ring_summary:
af667a29 314 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
84f4ee90
TI		 315 printk(KERN_INFO "Queue [NTU] [NTC]\n");
316 printk(KERN_INFO " %5d %5X %5X\n", 0,
af667a29 317 rx_ring->next_to_use, rx_ring->next_to_clean);
84f4ee90 318
af667a29 319 /* Print Rx Ring */
84f4ee90
TI		 320 if (!netif_msg_rx_status(adapter))
321 goto exit;
322
af667a29 323 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
84f4ee90
TI		 324 switch (adapter->rx_ps_pages) {
325 case 1:
326 case 2:
327 case 3:
328 /* [Extended] Packet Split Receive Descriptor Format
329 *
330 * +-----------------------------------------------------+
331 * 0 | Buffer Address 0 [63:0] |
332 * +-----------------------------------------------------+
333 * 8 | Buffer Address 1 [63:0] |
334 * +-----------------------------------------------------+
335 * 16 | Buffer Address 2 [63:0] |
336 * +-----------------------------------------------------+
337 * 24 | Buffer Address 3 [63:0] |
338 * +-----------------------------------------------------+
339 */
340 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
af667a29 341 "[buffer 1 63:0 ] "
84f4ee90
TI		 342 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
343 "[bi->skb] <-- Ext Pkt Split format\n");
344 /* [Extended] Receive Descriptor (Write-Back) Format
345 *
346 * 63 48 47 32 31 13 12 8 7 4 3 0
347 * +------------------------------------------------------+
348 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
349 * | Checksum | Ident | | Queue | | Type |
350 * +------------------------------------------------------+
351 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
352 * +------------------------------------------------------+
353 * 63 48 47 32 31 20 19 0
354 */
355 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
af667a29 356 "[vl l0 ee es] "
84f4ee90
TI		 357 "[ l3 l2 l1 hs] [reserved ] ---------------- "
358 "[bi->skb] <-- Ext Rx Write-Back format\n");
359 for (i = 0; i < rx_ring->count; i++) {
360 buffer_info = &rx_ring->buffer_info[i];
361 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
362 u1 = (struct my_u1 *)rx_desc_ps;
363 staterr =
af667a29 364 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
84f4ee90
TI		 365 if (staterr & E1000_RXD_STAT_DD) {
366 /* Descriptor Done */
367 printk(KERN_INFO "RWB[0x%03X] %016llX "
af667a29
BA		 368 "%016llX %016llX %016llX "
369 "---------------- %p", i,
370 (unsigned long long)le64_to_cpu(u1->a),
371 (unsigned long long)le64_to_cpu(u1->b),
372 (unsigned long long)le64_to_cpu(u1->c),
373 (unsigned long long)le64_to_cpu(u1->d),
374 buffer_info->skb);
84f4ee90
TI		 375 } else {
376 printk(KERN_INFO "R [0x%03X] %016llX "
af667a29
BA		 377 "%016llX %016llX %016llX %016llX %p", i,
378 (unsigned long long)le64_to_cpu(u1->a),
379 (unsigned long long)le64_to_cpu(u1->b),
380 (unsigned long long)le64_to_cpu(u1->c),
381 (unsigned long long)le64_to_cpu(u1->d),
382 (unsigned long long)buffer_info->dma,
383 buffer_info->skb);
84f4ee90
TI		 384
385 if (netif_msg_pktdata(adapter))
386 print_hex_dump(KERN_INFO, "",
387 DUMP_PREFIX_ADDRESS, 16, 1,
388 phys_to_virt(buffer_info->dma),
389 adapter->rx_ps_bsize0, true);
390 }
391
392 if (i == rx_ring->next_to_use)
393 printk(KERN_CONT " NTU\n");
394 else if (i == rx_ring->next_to_clean)
395 printk(KERN_CONT " NTC\n");
396 else
397 printk(KERN_CONT "\n");
398 }
399 break;
400 default:
401 case 0:
402 /* Legacy Receive Descriptor Format
403 *
404 * +-----------------------------------------------------+
405 * | Buffer Address [63:0] |
406 * +-----------------------------------------------------+
407 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
408 * +-----------------------------------------------------+
409 * 63 48 47 40 39 32 31 16 15 0
410 */
411 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
af667a29
BA		 412 "[vl er S cks ln] [bi->dma ] [bi->skb] "
413 "<-- Legacy format\n");
84f4ee90
TI		 414 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
415 rx_desc = E1000_RX_DESC(*rx_ring, i);
416 buffer_info = &rx_ring->buffer_info[i];
417 u0 = (struct my_u0 *)rx_desc;
418 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
af667a29
BA		 419 "%016llX %p", i,
420 (unsigned long long)le64_to_cpu(u0->a),
421 (unsigned long long)le64_to_cpu(u0->b),
422 (unsigned long long)buffer_info->dma,
423 buffer_info->skb);
84f4ee90
TI		 424 if (i == rx_ring->next_to_use)
425 printk(KERN_CONT " NTU\n");
426 else if (i == rx_ring->next_to_clean)
427 printk(KERN_CONT " NTC\n");
428 else
429 printk(KERN_CONT "\n");
430
431 if (netif_msg_pktdata(adapter))
432 print_hex_dump(KERN_INFO, "",
af667a29
BA		 433 DUMP_PREFIX_ADDRESS,
434 16, 1,
435 phys_to_virt(buffer_info->dma),
436 adapter->rx_buffer_len, true);
84f4ee90
TI		 437 }
438 }
439
440exit:
441 return;
442}
443
bc7f75fa
AK		 444/**
445 * e1000_desc_unused - calculate if we have unused descriptors
446 **/
447static int e1000_desc_unused(struct e1000_ring *ring)
448{
449 if (ring->next_to_clean > ring->next_to_use)
450 return ring->next_to_clean - ring->next_to_use - 1;
451
452 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
453}
454
455/**
ad68076e 456 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 457 * @adapter: board private structure
458 * @status: descriptor status field as written by hardware
459 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
460 * @skb: pointer to sk_buff to be indicated to stack
461 **/
462static void e1000_receive_skb(struct e1000_adapter *adapter,
af667a29 463 struct net_device *netdev, struct sk_buff *skb,
a39fe742 464 u8 status, __le16 vlan)
bc7f75fa 465{
86d70e53 466 u16 tag = le16_to_cpu(vlan);
bc7f75fa
AK		 467 skb->protocol = eth_type_trans(skb, netdev);
468
86d70e53
JK		 469 if (status & E1000_RXD_STAT_VP)
470 __vlan_hwaccel_put_tag(skb, tag);
471
472 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 473}
474
475/**
af667a29 476 * e1000_rx_checksum - Receive Checksum Offload
bc7f75fa
AK		 477 * @adapter: board private structure
478 * @status_err: receive descriptor status and error fields
479 * @csum: receive descriptor csum field
480 * @sk_buff: socket buffer with received data
481 **/
482static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
483 u32 csum, struct sk_buff *skb)
484{
485 u16 status = (u16)status_err;
486 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 487
488 skb_checksum_none_assert(skb);
bc7f75fa
AK		 489
490 /* Ignore Checksum bit is set */
491 if (status & E1000_RXD_STAT_IXSM)
492 return;
493 /* TCP/UDP checksum error bit is set */
494 if (errors & E1000_RXD_ERR_TCPE) {
495 /* let the stack verify checksum errors */
496 adapter->hw_csum_err++;
497 return;
498 }
499
500 /* TCP/UDP Checksum has not been calculated */
501 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
502 return;
503
504 /* It must be a TCP or UDP packet with a valid checksum */
505 if (status & E1000_RXD_STAT_TCPCS) {
506 /* TCP checksum is good */
507 skb->ip_summed = CHECKSUM_UNNECESSARY;
508 } else {
ad68076e
BA		 509 /*
510 * IP fragment with UDP payload
511 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 512 * and then put the value in host order for further stack use.
513 */
a39fe742
AV		 514 __sum16 sum = (__force __sum16)htons(csum);
515 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 516 skb->ip_summed = CHECKSUM_COMPLETE;
517 }
518 adapter->hw_csum_good++;
519}
520
521/**
522 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
523 * @adapter: address of board private structure
524 **/
525static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
c2fed996 526 int cleaned_count, gfp_t gfp)
bc7f75fa
AK		 527{
528 struct net_device *netdev = adapter->netdev;
529 struct pci_dev *pdev = adapter->pdev;
530 struct e1000_ring *rx_ring = adapter->rx_ring;
531 struct e1000_rx_desc *rx_desc;
532 struct e1000_buffer *buffer_info;
533 struct sk_buff *skb;
534 unsigned int i;
89d71a66 535 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 536
537 i = rx_ring->next_to_use;
538 buffer_info = &rx_ring->buffer_info[i];
539
540 while (cleaned_count--) {
541 skb = buffer_info->skb;
542 if (skb) {
543 skb_trim(skb, 0);
544 goto map_skb;
545 }
546
c2fed996 547 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
bc7f75fa
AK		 548 if (!skb) {
549 /* Better luck next round */
550 adapter->alloc_rx_buff_failed++;
551 break;
552 }
553
bc7f75fa
AK		 554 buffer_info->skb = skb;
555map_skb:
0be3f55f 556 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 557 adapter->rx_buffer_len,
0be3f55f
NN		 558 DMA_FROM_DEVICE);
559 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
af667a29 560 dev_err(&pdev->dev, "Rx DMA map failed\n");
bc7f75fa
AK		 561 adapter->rx_dma_failed++;
562 break;
563 }
564
565 rx_desc = E1000_RX_DESC(*rx_ring, i);
566 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
567
50849d79
TH		 568 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
569 /*
570 * Force memory writes to complete before letting h/w
571 * know there are new descriptors to fetch. (Only
572 * applicable for weak-ordered memory model archs,
573 * such as IA-64).
574 */
575 wmb();
576 writel(i, adapter->hw.hw_addr + rx_ring->tail);
577 }
bc7f75fa
AK		 578 i++;
579 if (i == rx_ring->count)
580 i = 0;
581 buffer_info = &rx_ring->buffer_info[i];
582 }
583
50849d79 584 rx_ring->next_to_use = i;
bc7f75fa
AK		 585}
586
587/**
588 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
589 * @adapter: address of board private structure
590 **/
591static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
c2fed996 592 int cleaned_count, gfp_t gfp)
bc7f75fa
AK		 593{
594 struct net_device *netdev = adapter->netdev;
595 struct pci_dev *pdev = adapter->pdev;
596 union e1000_rx_desc_packet_split *rx_desc;
597 struct e1000_ring *rx_ring = adapter->rx_ring;
598 struct e1000_buffer *buffer_info;
599 struct e1000_ps_page *ps_page;
600 struct sk_buff *skb;
601 unsigned int i, j;
602
603 i = rx_ring->next_to_use;
604 buffer_info = &rx_ring->buffer_info[i];
605
606 while (cleaned_count--) {
607 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
608
609 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 610 ps_page = &buffer_info->ps_pages[j];
611 if (j >= adapter->rx_ps_pages) {
612 /* all unused desc entries get hw null ptr */
af667a29
BA		 613 rx_desc->read.buffer_addr[j + 1] =
614 ~cpu_to_le64(0);
47f44e40
AK		 615 continue;
616 }
617 if (!ps_page->page) {
c2fed996 618 ps_page->page = alloc_page(gfp);
bc7f75fa 619 if (!ps_page->page) {
47f44e40
AK		 620 adapter->alloc_rx_buff_failed++;
621 goto no_buffers;
622 }
0be3f55f
NN		 623 ps_page->dma = dma_map_page(&pdev->dev,
624 ps_page->page,
625 0, PAGE_SIZE,
626 DMA_FROM_DEVICE);
627 if (dma_mapping_error(&pdev->dev,
628 ps_page->dma)) {
47f44e40 629 dev_err(&adapter->pdev->dev,
af667a29 630 "Rx DMA page map failed\n");
47f44e40
AK		 631 adapter->rx_dma_failed++;
632 goto no_buffers;
bc7f75fa 633 }
bc7f75fa 634 }
47f44e40
AK		 635 /*
636 * Refresh the desc even if buffer_addrs
637 * didn't change because each write-back
638 * erases this info.
639 */
af667a29
BA		 640 rx_desc->read.buffer_addr[j + 1] =
641 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 642 }
643
c2fed996
JK		 644 skb = __netdev_alloc_skb_ip_align(netdev,
645 adapter->rx_ps_bsize0,
646 gfp);
bc7f75fa
AK		 647
648 if (!skb) {
649 adapter->alloc_rx_buff_failed++;
650 break;
651 }
652
bc7f75fa 653 buffer_info->skb = skb;
0be3f55f 654 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 655 adapter->rx_ps_bsize0,
0be3f55f
NN		 656 DMA_FROM_DEVICE);
657 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
af667a29 658 dev_err(&pdev->dev, "Rx DMA map failed\n");
bc7f75fa
AK		 659 adapter->rx_dma_failed++;
660 /* cleanup skb */
661 dev_kfree_skb_any(skb);
662 buffer_info->skb = NULL;
663 break;
664 }
665
666 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
667
50849d79
TH		 668 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
669 /*
670 * Force memory writes to complete before letting h/w
671 * know there are new descriptors to fetch. (Only
672 * applicable for weak-ordered memory model archs,
673 * such as IA-64).
674 */
675 wmb();
af667a29 676 writel(i << 1, adapter->hw.hw_addr + rx_ring->tail);
50849d79
TH		 677 }
678
bc7f75fa
AK		 679 i++;
680 if (i == rx_ring->count)
681 i = 0;
682 buffer_info = &rx_ring->buffer_info[i];
683 }
684
685no_buffers:
50849d79 686 rx_ring->next_to_use = i;
bc7f75fa
AK		 687}
688
97ac8cae
BA		 689/**
690 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
691 * @adapter: address of board private structure
97ac8cae
BA		 692 * @cleaned_count: number of buffers to allocate this pass
693 **/
694
695static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
c2fed996 696 int cleaned_count, gfp_t gfp)
97ac8cae
BA		 697{
698 struct net_device *netdev = adapter->netdev;
699 struct pci_dev *pdev = adapter->pdev;
700 struct e1000_rx_desc *rx_desc;
701 struct e1000_ring *rx_ring = adapter->rx_ring;
702 struct e1000_buffer *buffer_info;
703 struct sk_buff *skb;
704 unsigned int i;
89d71a66 705 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 706
707 i = rx_ring->next_to_use;
708 buffer_info = &rx_ring->buffer_info[i];
709
710 while (cleaned_count--) {
711 skb = buffer_info->skb;
712 if (skb) {
713 skb_trim(skb, 0);
714 goto check_page;
715 }
716
c2fed996 717 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
97ac8cae
BA		 718 if (unlikely(!skb)) {
719 /* Better luck next round */
720 adapter->alloc_rx_buff_failed++;
721 break;
722 }
723
97ac8cae
BA		 724 buffer_info->skb = skb;
725check_page:
726 /* allocate a new page if necessary */
727 if (!buffer_info->page) {
c2fed996 728 buffer_info->page = alloc_page(gfp);
97ac8cae
BA		 729 if (unlikely(!buffer_info->page)) {
730 adapter->alloc_rx_buff_failed++;
731 break;
732 }
733 }
734
735 if (!buffer_info->dma)
0be3f55f 736 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 737 buffer_info->page, 0,
738 PAGE_SIZE,
0be3f55f 739 DMA_FROM_DEVICE);
97ac8cae
BA		 740
741 rx_desc = E1000_RX_DESC(*rx_ring, i);
742 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
743
744 if (unlikely(++i == rx_ring->count))
745 i = 0;
746 buffer_info = &rx_ring->buffer_info[i];
747 }
748
749 if (likely(rx_ring->next_to_use != i)) {
750 rx_ring->next_to_use = i;
751 if (unlikely(i-- == 0))
752 i = (rx_ring->count - 1);
753
754 /* Force memory writes to complete before letting h/w
755 * know there are new descriptors to fetch. (Only
756 * applicable for weak-ordered memory model archs,
757 * such as IA-64). */
758 wmb();
759 writel(i, adapter->hw.hw_addr + rx_ring->tail);
760 }
761}
762
bc7f75fa
AK		 763/**
764 * e1000_clean_rx_irq - Send received data up the network stack; legacy
765 * @adapter: board private structure
766 *
767 * the return value indicates whether actual cleaning was done, there
768 * is no guarantee that everything was cleaned
769 **/
770static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
771 int *work_done, int work_to_do)
772{
773 struct net_device *netdev = adapter->netdev;
774 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 775 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 776 struct e1000_ring *rx_ring = adapter->rx_ring;
777 struct e1000_rx_desc *rx_desc, *next_rxd;
778 struct e1000_buffer *buffer_info, *next_buffer;
779 u32 length;
780 unsigned int i;
781 int cleaned_count = 0;
782 bool cleaned = 0;
783 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
784
785 i = rx_ring->next_to_clean;
786 rx_desc = E1000_RX_DESC(*rx_ring, i);
787 buffer_info = &rx_ring->buffer_info[i];
788
789 while (rx_desc->status & E1000_RXD_STAT_DD) {
790 struct sk_buff *skb;
791 u8 status;
792
793 if (*work_done >= work_to_do)
794 break;
795 (*work_done)++;
2d0bb1c1 796 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 797
798 status = rx_desc->status;
799 skb = buffer_info->skb;
800 buffer_info->skb = NULL;
801
802 prefetch(skb->data - NET_IP_ALIGN);
803
804 i++;
805 if (i == rx_ring->count)
806 i = 0;
807 next_rxd = E1000_RX_DESC(*rx_ring, i);
808 prefetch(next_rxd);
809
810 next_buffer = &rx_ring->buffer_info[i];
811
812 cleaned = 1;
813 cleaned_count++;
0be3f55f 814 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 815 buffer_info->dma,
816 adapter->rx_buffer_len,
0be3f55f 817 DMA_FROM_DEVICE);
bc7f75fa
AK		 818 buffer_info->dma = 0;
819
820 length = le16_to_cpu(rx_desc->length);
821
b94b5028
JB		 822 /*
823 * !EOP means multiple descriptors were used to store a single
824 * packet, if that's the case we need to toss it. In fact, we
825 * need to toss every packet with the EOP bit clear and the
826 * next frame that _does_ have the EOP bit set, as it is by
827 * definition only a frame fragment
828 */
829 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
830 adapter->flags2 |= FLAG2_IS_DISCARDING;
831
832 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 833 /* All receives must fit into a single buffer */
3bb99fe2 834 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 835 /* recycle */
836 buffer_info->skb = skb;
b94b5028
JB		 837 if (status & E1000_RXD_STAT_EOP)
838 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 839 goto next_desc;
840 }
841
842 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
843 /* recycle */
844 buffer_info->skb = skb;
845 goto next_desc;
846 }
847
eb7c3adb
JK		 848 /* adjust length to remove Ethernet CRC */
849 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
850 length -= 4;
851
bc7f75fa
AK		 852 total_rx_bytes += length;
853 total_rx_packets++;
854
ad68076e
BA		 855 /*
856 * code added for copybreak, this should improve
bc7f75fa 857 * performance for small packets with large amounts
ad68076e
BA		 858 * of reassembly being done in the stack
859 */
bc7f75fa
AK		 860 if (length < copybreak) {
861 struct sk_buff *new_skb =
89d71a66 862 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 863 if (new_skb) {
808ff676
BA		 864 skb_copy_to_linear_data_offset(new_skb,
865 -NET_IP_ALIGN,
866 (skb->data -
867 NET_IP_ALIGN),
868 (length +
869 NET_IP_ALIGN));
bc7f75fa
AK		 870 /* save the skb in buffer_info as good */
871 buffer_info->skb = skb;
872 skb = new_skb;
873 }
874 /* else just continue with the old one */
875 }
876 /* end copybreak code */
877 skb_put(skb, length);
878
879 /* Receive Checksum Offload */
880 e1000_rx_checksum(adapter,
881 (u32)(status) |
882 ((u32)(rx_desc->errors) << 24),
883 le16_to_cpu(rx_desc->csum), skb);
884
885 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
886
887next_desc:
888 rx_desc->status = 0;
889
890 /* return some buffers to hardware, one at a time is too slow */
891 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
c2fed996
JK		 892 adapter->alloc_rx_buf(adapter, cleaned_count,
893 GFP_ATOMIC);
bc7f75fa
AK		 894 cleaned_count = 0;
895 }
896
897 /* use prefetched values */
898 rx_desc = next_rxd;
899 buffer_info = next_buffer;
900 }
901 rx_ring->next_to_clean = i;
902
903 cleaned_count = e1000_desc_unused(rx_ring);
904 if (cleaned_count)
c2fed996 905 adapter->alloc_rx_buf(adapter, cleaned_count, GFP_ATOMIC);
bc7f75fa 906
bc7f75fa 907 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 908 adapter->total_rx_packets += total_rx_packets;
bc7f75fa
AK		 909 return cleaned;
910}
911
bc7f75fa
AK		 912static void e1000_put_txbuf(struct e1000_adapter *adapter,
913 struct e1000_buffer *buffer_info)
914{
03b1320d
AD		 915 if (buffer_info->dma) {
916 if (buffer_info->mapped_as_page)
0be3f55f
NN		 917 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
918 buffer_info->length, DMA_TO_DEVICE);
03b1320d 919 else
0be3f55f
NN		 920 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
921 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 922 buffer_info->dma = 0;
923 }
bc7f75fa
AK		 924 if (buffer_info->skb) {
925 dev_kfree_skb_any(buffer_info->skb);
926 buffer_info->skb = NULL;
927 }
1b7719c4 928 buffer_info->time_stamp = 0;
bc7f75fa
AK		 929}
930
41cec6f1 931static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 932{
41cec6f1
BA		 933 struct e1000_adapter *adapter = container_of(work,
934 struct e1000_adapter,
935 print_hang_task);
bc7f75fa
AK		 936 struct e1000_ring *tx_ring = adapter->tx_ring;
937 unsigned int i = tx_ring->next_to_clean;
938 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
939 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 940 struct e1000_hw *hw = &adapter->hw;
941 u16 phy_status, phy_1000t_status, phy_ext_status;
942 u16 pci_status;
943
615b32af
JB		 944 if (test_bit(__E1000_DOWN, &adapter->state))
945 return;
946
41cec6f1
BA		 947 e1e_rphy(hw, PHY_STATUS, &phy_status);
948 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
949 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 950
41cec6f1
BA		 951 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
952
953 /* detected Hardware unit hang */
954 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 955 " TDH <%x>\n"
956 " TDT <%x>\n"
957 " next_to_use <%x>\n"
958 " next_to_clean <%x>\n"
959 "buffer_info[next_to_clean]:\n"
960 " time_stamp <%lx>\n"
961 " next_to_watch <%x>\n"
962 " jiffies <%lx>\n"
41cec6f1
BA		 963 " next_to_watch.status <%x>\n"
964 "MAC Status <%x>\n"
965 "PHY Status <%x>\n"
966 "PHY 1000BASE-T Status <%x>\n"
967 "PHY Extended Status <%x>\n"
968 "PCI Status <%x>\n",
44defeb3
JK		 969 readl(adapter->hw.hw_addr + tx_ring->head),
970 readl(adapter->hw.hw_addr + tx_ring->tail),
971 tx_ring->next_to_use,
972 tx_ring->next_to_clean,
973 tx_ring->buffer_info[eop].time_stamp,
974 eop,
975 jiffies,
41cec6f1
BA		 976 eop_desc->upper.fields.status,
977 er32(STATUS),
978 phy_status,
979 phy_1000t_status,
980 phy_ext_status,
981 pci_status);
bc7f75fa
AK		 982}
983
984/**
985 * e1000_clean_tx_irq - Reclaim resources after transmit completes
986 * @adapter: board private structure
987 *
988 * the return value indicates whether actual cleaning was done, there
989 * is no guarantee that everything was cleaned
990 **/
991static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
992{
993 struct net_device *netdev = adapter->netdev;
994 struct e1000_hw *hw = &adapter->hw;
995 struct e1000_ring *tx_ring = adapter->tx_ring;
996 struct e1000_tx_desc *tx_desc, *eop_desc;
997 struct e1000_buffer *buffer_info;
998 unsigned int i, eop;
999 unsigned int count = 0;
bc7f75fa
AK		 1000 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1001
1002 i = tx_ring->next_to_clean;
1003 eop = tx_ring->buffer_info[i].next_to_watch;
1004 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1005
12d04a3c
AD		 1006 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1007 (count < tx_ring->count)) {
a86043c2 1008 bool cleaned = false;
2d0bb1c1 1009 rmb(); /* read buffer_info after eop_desc */
a86043c2 1010 for (; !cleaned; count++) {
bc7f75fa
AK		 1011 tx_desc = E1000_TX_DESC(*tx_ring, i);
1012 buffer_info = &tx_ring->buffer_info[i];
1013 cleaned = (i == eop);
1014
1015 if (cleaned) {
9ed318d5
TH		 1016 total_tx_packets += buffer_info->segs;
1017 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 1018 }
1019
1020 e1000_put_txbuf(adapter, buffer_info);
1021 tx_desc->upper.data = 0;
1022
1023 i++;
1024 if (i == tx_ring->count)
1025 i = 0;
1026 }
1027
dac87619
TL		 1028 if (i == tx_ring->next_to_use)
1029 break;
bc7f75fa
AK		 1030 eop = tx_ring->buffer_info[i].next_to_watch;
1031 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1032 }
1033
1034 tx_ring->next_to_clean = i;
1035
1036#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1037 if (count && netif_carrier_ok(netdev) &&
1038 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1039 /* Make sure that anybody stopping the queue after this
1040 * sees the new next_to_clean.
1041 */
1042 smp_mb();
1043
1044 if (netif_queue_stopped(netdev) &&
1045 !(test_bit(__E1000_DOWN, &adapter->state))) {
1046 netif_wake_queue(netdev);
1047 ++adapter->restart_queue;
1048 }
1049 }
1050
1051 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1052 /*
1053 * Detect a transmit hang in hardware, this serializes the
1054 * check with the clearing of time_stamp and movement of i
1055 */
bc7f75fa 1056 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1057 if (tx_ring->buffer_info[i].time_stamp &&
1058 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1059 + (adapter->tx_timeout_factor * HZ)) &&
1060 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1061 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1062 netif_stop_queue(netdev);
1063 }
1064 }
1065 adapter->total_tx_bytes += total_tx_bytes;
1066 adapter->total_tx_packets += total_tx_packets;
807540ba 1067 return count < tx_ring->count;
bc7f75fa
AK		 1068}
1069
bc7f75fa
AK		 1070/**
1071 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1072 * @adapter: board private structure
1073 *
1074 * the return value indicates whether actual cleaning was done, there
1075 * is no guarantee that everything was cleaned
1076 **/
1077static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1078 int *work_done, int work_to_do)
1079{
3bb99fe2 1080 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1081 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1082 struct net_device *netdev = adapter->netdev;
1083 struct pci_dev *pdev = adapter->pdev;
1084 struct e1000_ring *rx_ring = adapter->rx_ring;
1085 struct e1000_buffer *buffer_info, *next_buffer;
1086 struct e1000_ps_page *ps_page;
1087 struct sk_buff *skb;
1088 unsigned int i, j;
1089 u32 length, staterr;
1090 int cleaned_count = 0;
1091 bool cleaned = 0;
1092 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1093
1094 i = rx_ring->next_to_clean;
1095 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1096 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1097 buffer_info = &rx_ring->buffer_info[i];
1098
1099 while (staterr & E1000_RXD_STAT_DD) {
1100 if (*work_done >= work_to_do)
1101 break;
1102 (*work_done)++;
1103 skb = buffer_info->skb;
2d0bb1c1 1104 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 1105
1106 /* in the packet split case this is header only */
1107 prefetch(skb->data - NET_IP_ALIGN);
1108
1109 i++;
1110 if (i == rx_ring->count)
1111 i = 0;
1112 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1113 prefetch(next_rxd);
1114
1115 next_buffer = &rx_ring->buffer_info[i];
1116
1117 cleaned = 1;
1118 cleaned_count++;
0be3f55f 1119 dma_unmap_single(&pdev->dev, buffer_info->dma,
af667a29 1120 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
bc7f75fa
AK		 1121 buffer_info->dma = 0;
1122
af667a29 1123 /* see !EOP comment in other Rx routine */
b94b5028
JB		 1124 if (!(staterr & E1000_RXD_STAT_EOP))
1125 adapter->flags2 |= FLAG2_IS_DISCARDING;
1126
1127 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1128 e_dbg("Packet Split buffers didn't pick up the full "
1129 "packet\n");
bc7f75fa 1130 dev_kfree_skb_irq(skb);
b94b5028
JB		 1131 if (staterr & E1000_RXD_STAT_EOP)
1132 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1133 goto next_desc;
1134 }
1135
1136 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1137 dev_kfree_skb_irq(skb);
1138 goto next_desc;
1139 }
1140
1141 length = le16_to_cpu(rx_desc->wb.middle.length0);
1142
1143 if (!length) {
3bb99fe2
BA		 1144 e_dbg("Last part of the packet spanning multiple "
1145 "descriptors\n");
bc7f75fa
AK		 1146 dev_kfree_skb_irq(skb);
1147 goto next_desc;
1148 }
1149
1150 /* Good Receive */
1151 skb_put(skb, length);
1152
1153 {
ad68076e
BA		 1154 /*
1155 * this looks ugly, but it seems compiler issues make it
1156 * more efficient than reusing j
1157 */
bc7f75fa
AK		 1158 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1159
ad68076e
BA		 1160 /*
1161 * page alloc/put takes too long and effects small packet
1162 * throughput, so unsplit small packets and save the alloc/put
1163 * only valid in softirq (napi) context to call kmap_*
1164 */
bc7f75fa
AK		 1165 if (l1 && (l1 <= copybreak) &&
1166 ((length + l1) <= adapter->rx_ps_bsize0)) {
1167 u8 *vaddr;
1168
47f44e40 1169 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1170
ad68076e
BA		 1171 /*
1172 * there is no documentation about how to call
bc7f75fa 1173 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1174 * very long
1175 */
0be3f55f
NN		 1176 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1177 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1178 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1179 memcpy(skb_tail_pointer(skb), vaddr, l1);
1180 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1181 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1182 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1183
eb7c3adb
JK		 1184 /* remove the CRC */
1185 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1186 l1 -= 4;
1187
bc7f75fa
AK		 1188 skb_put(skb, l1);
1189 goto copydone;
1190 } /* if */
1191 }
1192
1193 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1194 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1195 if (!length)
1196 break;
1197
47f44e40 1198 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1199 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1200 DMA_FROM_DEVICE);
bc7f75fa
AK		 1201 ps_page->dma = 0;
1202 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1203 ps_page->page = NULL;
1204 skb->len += length;
1205 skb->data_len += length;
1206 skb->truesize += length;
1207 }
1208
eb7c3adb
JK		 1209 /* strip the ethernet crc, problem is we're using pages now so
1210 * this whole operation can get a little cpu intensive
1211 */
1212 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1213 pskb_trim(skb, skb->len - 4);
1214
bc7f75fa
AK		 1215copydone:
1216 total_rx_bytes += skb->len;
1217 total_rx_packets++;
1218
1219 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1220 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1221
1222 if (rx_desc->wb.upper.header_status &
1223 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1224 adapter->rx_hdr_split++;
1225
1226 e1000_receive_skb(adapter, netdev, skb,
1227 staterr, rx_desc->wb.middle.vlan);
1228
1229next_desc:
1230 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1231 buffer_info->skb = NULL;
1232
1233 /* return some buffers to hardware, one at a time is too slow */
1234 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
c2fed996
JK		 1235 adapter->alloc_rx_buf(adapter, cleaned_count,
1236 GFP_ATOMIC);
bc7f75fa
AK		 1237 cleaned_count = 0;
1238 }
1239
1240 /* use prefetched values */
1241 rx_desc = next_rxd;
1242 buffer_info = next_buffer;
1243
1244 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1245 }
1246 rx_ring->next_to_clean = i;
1247
1248 cleaned_count = e1000_desc_unused(rx_ring);
1249 if (cleaned_count)
c2fed996 1250 adapter->alloc_rx_buf(adapter, cleaned_count, GFP_ATOMIC);
bc7f75fa 1251
bc7f75fa 1252 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1253 adapter->total_rx_packets += total_rx_packets;
bc7f75fa
AK		 1254 return cleaned;
1255}
1256
97ac8cae
BA		 1257/**
1258 * e1000_consume_page - helper function
1259 **/
1260static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1261 u16 length)
1262{
1263 bi->page = NULL;
1264 skb->len += length;
1265 skb->data_len += length;
1266 skb->truesize += length;
1267}
1268
1269/**
1270 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1271 * @adapter: board private structure
1272 *
1273 * the return value indicates whether actual cleaning was done, there
1274 * is no guarantee that everything was cleaned
1275 **/
1276
1277static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1278 int *work_done, int work_to_do)
1279{
1280 struct net_device *netdev = adapter->netdev;
1281 struct pci_dev *pdev = adapter->pdev;
1282 struct e1000_ring *rx_ring = adapter->rx_ring;
1283 struct e1000_rx_desc *rx_desc, *next_rxd;
1284 struct e1000_buffer *buffer_info, *next_buffer;
1285 u32 length;
1286 unsigned int i;
1287 int cleaned_count = 0;
1288 bool cleaned = false;
1289 unsigned int total_rx_bytes=0, total_rx_packets=0;
1290
1291 i = rx_ring->next_to_clean;
1292 rx_desc = E1000_RX_DESC(*rx_ring, i);
1293 buffer_info = &rx_ring->buffer_info[i];
1294
1295 while (rx_desc->status & E1000_RXD_STAT_DD) {
1296 struct sk_buff *skb;
1297 u8 status;
1298
1299 if (*work_done >= work_to_do)
1300 break;
1301 (*work_done)++;
2d0bb1c1 1302 rmb(); /* read descriptor and rx_buffer_info after status DD */
97ac8cae
BA		 1303
1304 status = rx_desc->status;
1305 skb = buffer_info->skb;
1306 buffer_info->skb = NULL;
1307
1308 ++i;
1309 if (i == rx_ring->count)
1310 i = 0;
1311 next_rxd = E1000_RX_DESC(*rx_ring, i);
1312 prefetch(next_rxd);
1313
1314 next_buffer = &rx_ring->buffer_info[i];
1315
1316 cleaned = true;
1317 cleaned_count++;
0be3f55f
NN		 1318 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1319 DMA_FROM_DEVICE);
97ac8cae
BA		 1320 buffer_info->dma = 0;
1321
1322 length = le16_to_cpu(rx_desc->length);
1323
1324 /* errors is only valid for DD + EOP descriptors */
1325 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1326 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1327 /* recycle both page and skb */
1328 buffer_info->skb = skb;
1329 /* an error means any chain goes out the window
1330 * too */
1331 if (rx_ring->rx_skb_top)
ef5ab89c 1332 dev_kfree_skb_irq(rx_ring->rx_skb_top);
97ac8cae
BA		 1333 rx_ring->rx_skb_top = NULL;
1334 goto next_desc;
1335 }
1336
f0f1a172 1337#define rxtop (rx_ring->rx_skb_top)
97ac8cae
BA		 1338 if (!(status & E1000_RXD_STAT_EOP)) {
1339 /* this descriptor is only the beginning (or middle) */
1340 if (!rxtop) {
1341 /* this is the beginning of a chain */
1342 rxtop = skb;
1343 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1344 0, length);
1345 } else {
1346 /* this is the middle of a chain */
1347 skb_fill_page_desc(rxtop,
1348 skb_shinfo(rxtop)->nr_frags,
1349 buffer_info->page, 0, length);
1350 /* re-use the skb, only consumed the page */
1351 buffer_info->skb = skb;
1352 }
1353 e1000_consume_page(buffer_info, rxtop, length);
1354 goto next_desc;
1355 } else {
1356 if (rxtop) {
1357 /* end of the chain */
1358 skb_fill_page_desc(rxtop,
1359 skb_shinfo(rxtop)->nr_frags,
1360 buffer_info->page, 0, length);
1361 /* re-use the current skb, we only consumed the
1362 * page */
1363 buffer_info->skb = skb;
1364 skb = rxtop;
1365 rxtop = NULL;
1366 e1000_consume_page(buffer_info, skb, length);
1367 } else {
1368 /* no chain, got EOP, this buf is the packet
1369 * copybreak to save the put_page/alloc_page */
1370 if (length <= copybreak &&
1371 skb_tailroom(skb) >= length) {
1372 u8 *vaddr;
1373 vaddr = kmap_atomic(buffer_info->page,
1374 KM_SKB_DATA_SOFTIRQ);
1375 memcpy(skb_tail_pointer(skb), vaddr,
1376 length);
1377 kunmap_atomic(vaddr,
1378 KM_SKB_DATA_SOFTIRQ);
1379 /* re-use the page, so don't erase
1380 * buffer_info->page */
1381 skb_put(skb, length);
1382 } else {
1383 skb_fill_page_desc(skb, 0,
1384 buffer_info->page, 0,
1385 length);
1386 e1000_consume_page(buffer_info, skb,
1387 length);
1388 }
1389 }
1390 }
1391
1392 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1393 e1000_rx_checksum(adapter,
1394 (u32)(status) |
1395 ((u32)(rx_desc->errors) << 24),
1396 le16_to_cpu(rx_desc->csum), skb);
1397
1398 /* probably a little skewed due to removing CRC */
1399 total_rx_bytes += skb->len;
1400 total_rx_packets++;
1401
1402 /* eth type trans needs skb->data to point to something */
1403 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1404 e_err("pskb_may_pull failed.\n");
ef5ab89c 1405 dev_kfree_skb_irq(skb);
97ac8cae
BA		 1406 goto next_desc;
1407 }
1408
1409 e1000_receive_skb(adapter, netdev, skb, status,
1410 rx_desc->special);
1411
1412next_desc:
1413 rx_desc->status = 0;
1414
1415 /* return some buffers to hardware, one at a time is too slow */
1416 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
c2fed996
JK		 1417 adapter->alloc_rx_buf(adapter, cleaned_count,
1418 GFP_ATOMIC);
97ac8cae
BA		 1419 cleaned_count = 0;
1420 }
1421
1422 /* use prefetched values */
1423 rx_desc = next_rxd;
1424 buffer_info = next_buffer;
1425 }
1426 rx_ring->next_to_clean = i;
1427
1428 cleaned_count = e1000_desc_unused(rx_ring);
1429 if (cleaned_count)
c2fed996 1430 adapter->alloc_rx_buf(adapter, cleaned_count, GFP_ATOMIC);
97ac8cae
BA		 1431
1432 adapter->total_rx_bytes += total_rx_bytes;
1433 adapter->total_rx_packets += total_rx_packets;
97ac8cae
BA		 1434 return cleaned;
1435}
1436
bc7f75fa
AK		 1437/**
1438 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1439 * @adapter: board private structure
1440 **/
1441static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1442{
1443 struct e1000_ring *rx_ring = adapter->rx_ring;
1444 struct e1000_buffer *buffer_info;
1445 struct e1000_ps_page *ps_page;
1446 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1447 unsigned int i, j;
1448
1449 /* Free all the Rx ring sk_buffs */
1450 for (i = 0; i < rx_ring->count; i++) {
1451 buffer_info = &rx_ring->buffer_info[i];
1452 if (buffer_info->dma) {
1453 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1454 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1455 adapter->rx_buffer_len,
0be3f55f 1456 DMA_FROM_DEVICE);
97ac8cae 1457 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1458 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1459 PAGE_SIZE,
0be3f55f 1460 DMA_FROM_DEVICE);
bc7f75fa 1461 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1462 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1463 adapter->rx_ps_bsize0,
0be3f55f 1464 DMA_FROM_DEVICE);
bc7f75fa
AK		 1465 buffer_info->dma = 0;
1466 }
1467
97ac8cae
BA		 1468 if (buffer_info->page) {
1469 put_page(buffer_info->page);
1470 buffer_info->page = NULL;
1471 }
1472
bc7f75fa
AK		 1473 if (buffer_info->skb) {
1474 dev_kfree_skb(buffer_info->skb);
1475 buffer_info->skb = NULL;
1476 }
1477
1478 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1479 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1480 if (!ps_page->page)
1481 break;
0be3f55f
NN		 1482 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1483 DMA_FROM_DEVICE);
bc7f75fa
AK		 1484 ps_page->dma = 0;
1485 put_page(ps_page->page);
1486 ps_page->page = NULL;
1487 }
1488 }
1489
1490 /* there also may be some cached data from a chained receive */
1491 if (rx_ring->rx_skb_top) {
1492 dev_kfree_skb(rx_ring->rx_skb_top);
1493 rx_ring->rx_skb_top = NULL;
1494 }
1495
bc7f75fa
AK		 1496 /* Zero out the descriptor ring */
1497 memset(rx_ring->desc, 0, rx_ring->size);
1498
1499 rx_ring->next_to_clean = 0;
1500 rx_ring->next_to_use = 0;
b94b5028 1501 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1502
1503 writel(0, adapter->hw.hw_addr + rx_ring->head);
1504 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1505}
1506
a8f88ff5
JB		 1507static void e1000e_downshift_workaround(struct work_struct *work)
1508{
1509 struct e1000_adapter *adapter = container_of(work,
1510 struct e1000_adapter, downshift_task);
1511
615b32af
JB		 1512 if (test_bit(__E1000_DOWN, &adapter->state))
1513 return;
1514
a8f88ff5
JB		 1515 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1516}
1517
bc7f75fa
AK		 1518/**
1519 * e1000_intr_msi - Interrupt Handler
1520 * @irq: interrupt number
1521 * @data: pointer to a network interface device structure
1522 **/
1523static irqreturn_t e1000_intr_msi(int irq, void *data)
1524{
1525 struct net_device *netdev = data;
1526 struct e1000_adapter *adapter = netdev_priv(netdev);
1527 struct e1000_hw *hw = &adapter->hw;
1528 u32 icr = er32(ICR);
1529
ad68076e
BA		 1530 /*
1531 * read ICR disables interrupts using IAM
1532 */
bc7f75fa 1533
573cca8c 1534 if (icr & E1000_ICR_LSC) {
bc7f75fa 1535 hw->mac.get_link_status = 1;
ad68076e
BA		 1536 /*
1537 * ICH8 workaround-- Call gig speed drop workaround on cable
1538 * disconnect (LSC) before accessing any PHY registers
1539 */
bc7f75fa
AK		 1540 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1541 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1542 schedule_work(&adapter->downshift_task);
bc7f75fa 1543
ad68076e
BA		 1544 /*
1545 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1546 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1547 * adapter in watchdog
1548 */
bc7f75fa
AK		 1549 if (netif_carrier_ok(netdev) &&
1550 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1551 /* disable receives */
1552 u32 rctl = er32(RCTL);
1553 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1554 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1555 }
1556 /* guard against interrupt when we're going down */
1557 if (!test_bit(__E1000_DOWN, &adapter->state))
1558 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1559 }
1560
288379f0 1561 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1562 adapter->total_tx_bytes = 0;
1563 adapter->total_tx_packets = 0;
1564 adapter->total_rx_bytes = 0;
1565 adapter->total_rx_packets = 0;
288379f0 1566 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1567 }
1568
1569 return IRQ_HANDLED;
1570}
1571
1572/**
1573 * e1000_intr - Interrupt Handler
1574 * @irq: interrupt number
1575 * @data: pointer to a network interface device structure
1576 **/
1577static irqreturn_t e1000_intr(int irq, void *data)
1578{
1579 struct net_device *netdev = data;
1580 struct e1000_adapter *adapter = netdev_priv(netdev);
1581 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1582 u32 rctl, icr = er32(ICR);
4662e82b 1583
a68ea775 1584 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1585 return IRQ_NONE; /* Not our interrupt */
1586
ad68076e
BA		 1587 /*
1588 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1589 * not set, then the adapter didn't send an interrupt
1590 */
bc7f75fa
AK		 1591 if (!(icr & E1000_ICR_INT_ASSERTED))
1592 return IRQ_NONE;
1593
ad68076e
BA		 1594 /*
1595 * Interrupt Auto-Mask...upon reading ICR,
1596 * interrupts are masked. No need for the
1597 * IMC write
1598 */
bc7f75fa 1599
573cca8c 1600 if (icr & E1000_ICR_LSC) {
bc7f75fa 1601 hw->mac.get_link_status = 1;
ad68076e
BA		 1602 /*
1603 * ICH8 workaround-- Call gig speed drop workaround on cable
1604 * disconnect (LSC) before accessing any PHY registers
1605 */
bc7f75fa
AK		 1606 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1607 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1608 schedule_work(&adapter->downshift_task);
bc7f75fa 1609
ad68076e
BA		 1610 /*
1611 * 80003ES2LAN workaround--
bc7f75fa
AK		 1612 * For packet buffer work-around on link down event;
1613 * disable receives here in the ISR and
1614 * reset adapter in watchdog
1615 */
1616 if (netif_carrier_ok(netdev) &&
1617 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1618 /* disable receives */
1619 rctl = er32(RCTL);
1620 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1621 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1622 }
1623 /* guard against interrupt when we're going down */
1624 if (!test_bit(__E1000_DOWN, &adapter->state))
1625 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1626 }
1627
288379f0 1628 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1629 adapter->total_tx_bytes = 0;
1630 adapter->total_tx_packets = 0;
1631 adapter->total_rx_bytes = 0;
1632 adapter->total_rx_packets = 0;
288379f0 1633 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1634 }
1635
1636 return IRQ_HANDLED;
1637}
1638
4662e82b
BA		 1639static irqreturn_t e1000_msix_other(int irq, void *data)
1640{
1641 struct net_device *netdev = data;
1642 struct e1000_adapter *adapter = netdev_priv(netdev);
1643 struct e1000_hw *hw = &adapter->hw;
1644 u32 icr = er32(ICR);
1645
1646 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1647 if (!test_bit(__E1000_DOWN, &adapter->state))
1648 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1649 return IRQ_NONE;
1650 }
1651
1652 if (icr & adapter->eiac_mask)
1653 ew32(ICS, (icr & adapter->eiac_mask));
1654
1655 if (icr & E1000_ICR_OTHER) {
1656 if (!(icr & E1000_ICR_LSC))
1657 goto no_link_interrupt;
1658 hw->mac.get_link_status = 1;
1659 /* guard against interrupt when we're going down */
1660 if (!test_bit(__E1000_DOWN, &adapter->state))
1661 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1662 }
1663
1664no_link_interrupt:
a3c69fef
JB		 1665 if (!test_bit(__E1000_DOWN, &adapter->state))
1666 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1667
1668 return IRQ_HANDLED;
1669}
1670
1671
1672static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1673{
1674 struct net_device *netdev = data;
1675 struct e1000_adapter *adapter = netdev_priv(netdev);
1676 struct e1000_hw *hw = &adapter->hw;
1677 struct e1000_ring *tx_ring = adapter->tx_ring;
1678
1679
1680 adapter->total_tx_bytes = 0;
1681 adapter->total_tx_packets = 0;
1682
1683 if (!e1000_clean_tx_irq(adapter))
1684 /* Ring was not completely cleaned, so fire another interrupt */
1685 ew32(ICS, tx_ring->ims_val);
1686
1687 return IRQ_HANDLED;
1688}
1689
1690static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1691{
1692 struct net_device *netdev = data;
1693 struct e1000_adapter *adapter = netdev_priv(netdev);
1694
1695 /* Write the ITR value calculated at the end of the
1696 * previous interrupt.
1697 */
1698 if (adapter->rx_ring->set_itr) {
1699 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1700 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1701 adapter->rx_ring->set_itr = 0;
1702 }
1703
288379f0 1704 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1705 adapter->total_rx_bytes = 0;
1706 adapter->total_rx_packets = 0;
288379f0 1707 __napi_schedule(&adapter->napi);
4662e82b
BA		 1708 }
1709 return IRQ_HANDLED;
1710}
1711
1712/**
1713 * e1000_configure_msix - Configure MSI-X hardware
1714 *
1715 * e1000_configure_msix sets up the hardware to properly
1716 * generate MSI-X interrupts.
1717 **/
1718static void e1000_configure_msix(struct e1000_adapter *adapter)
1719{
1720 struct e1000_hw *hw = &adapter->hw;
1721 struct e1000_ring *rx_ring = adapter->rx_ring;
1722 struct e1000_ring *tx_ring = adapter->tx_ring;
1723 int vector = 0;
1724 u32 ctrl_ext, ivar = 0;
1725
1726 adapter->eiac_mask = 0;
1727
1728 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1729 if (hw->mac.type == e1000_82574) {
1730 u32 rfctl = er32(RFCTL);
1731 rfctl |= E1000_RFCTL_ACK_DIS;
1732 ew32(RFCTL, rfctl);
1733 }
1734
1735#define E1000_IVAR_INT_ALLOC_VALID 0x8
1736 /* Configure Rx vector */
1737 rx_ring->ims_val = E1000_IMS_RXQ0;
1738 adapter->eiac_mask |= rx_ring->ims_val;
1739 if (rx_ring->itr_val)
1740 writel(1000000000 / (rx_ring->itr_val * 256),
1741 hw->hw_addr + rx_ring->itr_register);
1742 else
1743 writel(1, hw->hw_addr + rx_ring->itr_register);
1744 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1745
1746 /* Configure Tx vector */
1747 tx_ring->ims_val = E1000_IMS_TXQ0;
1748 vector++;
1749 if (tx_ring->itr_val)
1750 writel(1000000000 / (tx_ring->itr_val * 256),
1751 hw->hw_addr + tx_ring->itr_register);
1752 else
1753 writel(1, hw->hw_addr + tx_ring->itr_register);
1754 adapter->eiac_mask |= tx_ring->ims_val;
1755 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1756
1757 /* set vector for Other Causes, e.g. link changes */
1758 vector++;
1759 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1760 if (rx_ring->itr_val)
1761 writel(1000000000 / (rx_ring->itr_val * 256),
1762 hw->hw_addr + E1000_EITR_82574(vector));
1763 else
1764 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1765
1766 /* Cause Tx interrupts on every write back */
1767 ivar |= (1 << 31);
1768
1769 ew32(IVAR, ivar);
1770
1771 /* enable MSI-X PBA support */
1772 ctrl_ext = er32(CTRL_EXT);
1773 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1774
1775 /* Auto-Mask Other interrupts upon ICR read */
1776#define E1000_EIAC_MASK_82574 0x01F00000
1777 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1778 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1779 ew32(CTRL_EXT, ctrl_ext);
1780 e1e_flush();
1781}
1782
1783void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1784{
1785 if (adapter->msix_entries) {
1786 pci_disable_msix(adapter->pdev);
1787 kfree(adapter->msix_entries);
1788 adapter->msix_entries = NULL;
1789 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1790 pci_disable_msi(adapter->pdev);
1791 adapter->flags &= ~FLAG_MSI_ENABLED;
1792 }
4662e82b
BA		 1793}
1794
1795/**
1796 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1797 *
1798 * Attempt to configure interrupts using the best available
1799 * capabilities of the hardware and kernel.
1800 **/
1801void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1802{
1803 int err;
8e86acd7 1804 int i;
4662e82b
BA		 1805
1806 switch (adapter->int_mode) {
1807 case E1000E_INT_MODE_MSIX:
1808 if (adapter->flags & FLAG_HAS_MSIX) {
8e86acd7
JK		 1809 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1810 adapter->msix_entries = kcalloc(adapter->num_vectors,
4662e82b
BA		 1811 sizeof(struct msix_entry),
1812 GFP_KERNEL);
1813 if (adapter->msix_entries) {
8e86acd7 1814 for (i = 0; i < adapter->num_vectors; i++)
4662e82b
BA		 1815 adapter->msix_entries[i].entry = i;
1816
1817 err = pci_enable_msix(adapter->pdev,
1818 adapter->msix_entries,
8e86acd7 1819 adapter->num_vectors);
b1cdfead 1820 if (err == 0)
4662e82b
BA		 1821 return;
1822 }
1823 /* MSI-X failed, so fall through and try MSI */
1824 e_err("Failed to initialize MSI-X interrupts. "
1825 "Falling back to MSI interrupts.\n");
1826 e1000e_reset_interrupt_capability(adapter);
1827 }
1828 adapter->int_mode = E1000E_INT_MODE_MSI;
1829 /* Fall through */
1830 case E1000E_INT_MODE_MSI:
1831 if (!pci_enable_msi(adapter->pdev)) {
1832 adapter->flags |= FLAG_MSI_ENABLED;
1833 } else {
1834 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1835 e_err("Failed to initialize MSI interrupts. Falling "
1836 "back to legacy interrupts.\n");
1837 }
1838 /* Fall through */
1839 case E1000E_INT_MODE_LEGACY:
1840 /* Don't do anything; this is the system default */
1841 break;
1842 }
8e86acd7
JK		 1843
1844 /* store the number of vectors being used */
1845 adapter->num_vectors = 1;
4662e82b
BA		 1846}
1847
1848/**
1849 * e1000_request_msix - Initialize MSI-X interrupts
1850 *
1851 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1852 * kernel.
1853 **/
1854static int e1000_request_msix(struct e1000_adapter *adapter)
1855{
1856 struct net_device *netdev = adapter->netdev;
1857 int err = 0, vector = 0;
1858
1859 if (strlen(netdev->name) < (IFNAMSIZ - 5))
79f5e840
BA		 1860 snprintf(adapter->rx_ring->name,
1861 sizeof(adapter->rx_ring->name) - 1,
1862 "%s-rx-0", netdev->name);
4662e82b
BA		 1863 else
1864 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1865 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1866 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1867 netdev);
1868 if (err)
1869 goto out;
1870 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1871 adapter->rx_ring->itr_val = adapter->itr;
1872 vector++;
1873
1874 if (strlen(netdev->name) < (IFNAMSIZ - 5))
79f5e840
BA		 1875 snprintf(adapter->tx_ring->name,
1876 sizeof(adapter->tx_ring->name) - 1,
1877 "%s-tx-0", netdev->name);
4662e82b
BA		 1878 else
1879 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1880 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1881 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1882 netdev);
1883 if (err)
1884 goto out;
1885 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1886 adapter->tx_ring->itr_val = adapter->itr;
1887 vector++;
1888
1889 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1890 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1891 if (err)
1892 goto out;
1893
1894 e1000_configure_msix(adapter);
1895 return 0;
1896out:
1897 return err;
1898}
1899
f8d59f78
BA		 1900/**
1901 * e1000_request_irq - initialize interrupts
1902 *
1903 * Attempts to configure interrupts using the best available
1904 * capabilities of the hardware and kernel.
1905 **/
bc7f75fa
AK		 1906static int e1000_request_irq(struct e1000_adapter *adapter)
1907{
1908 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1909 int err;
1910
4662e82b
BA		 1911 if (adapter->msix_entries) {
1912 err = e1000_request_msix(adapter);
1913 if (!err)
1914 return err;
1915 /* fall back to MSI */
1916 e1000e_reset_interrupt_capability(adapter);
1917 adapter->int_mode = E1000E_INT_MODE_MSI;
1918 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1919 }
4662e82b 1920 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1921 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1922 netdev->name, netdev);
1923 if (!err)
1924 return err;
bc7f75fa 1925
4662e82b
BA		 1926 /* fall back to legacy interrupt */
1927 e1000e_reset_interrupt_capability(adapter);
1928 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1929 }
1930
a0607fd3 1931 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1932 netdev->name, netdev);
1933 if (err)
1934 e_err("Unable to allocate interrupt, Error: %d\n", err);
1935
bc7f75fa
AK		 1936 return err;
1937}
1938
1939static void e1000_free_irq(struct e1000_adapter *adapter)
1940{
1941 struct net_device *netdev = adapter->netdev;
1942
4662e82b
BA		 1943 if (adapter->msix_entries) {
1944 int vector = 0;
1945
1946 free_irq(adapter->msix_entries[vector].vector, netdev);
1947 vector++;
1948
1949 free_irq(adapter->msix_entries[vector].vector, netdev);
1950 vector++;
1951
1952 /* Other Causes interrupt vector */
1953 free_irq(adapter->msix_entries[vector].vector, netdev);
1954 return;
bc7f75fa 1955 }
4662e82b
BA		 1956
1957 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1958}
1959
1960/**
1961 * e1000_irq_disable - Mask off interrupt generation on the NIC
1962 **/
1963static void e1000_irq_disable(struct e1000_adapter *adapter)
1964{
1965 struct e1000_hw *hw = &adapter->hw;
1966
bc7f75fa 1967 ew32(IMC, ~0);
4662e82b
BA		 1968 if (adapter->msix_entries)
1969 ew32(EIAC_82574, 0);
bc7f75fa 1970 e1e_flush();
8e86acd7
JK		 1971
1972 if (adapter->msix_entries) {
1973 int i;
1974 for (i = 0; i < adapter->num_vectors; i++)
1975 synchronize_irq(adapter->msix_entries[i].vector);
1976 } else {
1977 synchronize_irq(adapter->pdev->irq);
1978 }
bc7f75fa
AK		 1979}
1980
1981/**
1982 * e1000_irq_enable - Enable default interrupt generation settings
1983 **/
1984static void e1000_irq_enable(struct e1000_adapter *adapter)
1985{
1986 struct e1000_hw *hw = &adapter->hw;
1987
4662e82b
BA		 1988 if (adapter->msix_entries) {
1989 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1990 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1991 } else {
1992 ew32(IMS, IMS_ENABLE_MASK);
1993 }
74ef9c39 1994 e1e_flush();
bc7f75fa
AK		 1995}
1996
1997/**
31dbe5b4 1998 * e1000e_get_hw_control - get control of the h/w from f/w
bc7f75fa
AK		 1999 * @adapter: address of board private structure
2000 *
31dbe5b4 2001 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2002 * For ASF and Pass Through versions of f/w this means that
2003 * the driver is loaded. For AMT version (only with 82573)
2004 * of the f/w this means that the network i/f is open.
2005 **/
31dbe5b4 2006void e1000e_get_hw_control(struct e1000_adapter *adapter)
bc7f75fa
AK		 2007{
2008 struct e1000_hw *hw = &adapter->hw;
2009 u32 ctrl_ext;
2010 u32 swsm;
2011
2012 /* Let firmware know the driver has taken over */
2013 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2014 swsm = er32(SWSM);
2015 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2016 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2017 ctrl_ext = er32(CTRL_EXT);
ad68076e 2018 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2019 }
2020}
2021
2022/**
31dbe5b4 2023 * e1000e_release_hw_control - release control of the h/w to f/w
bc7f75fa
AK		 2024 * @adapter: address of board private structure
2025 *
31dbe5b4 2026 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2027 * For ASF and Pass Through versions of f/w this means that the
2028 * driver is no longer loaded. For AMT version (only with 82573) i
2029 * of the f/w this means that the network i/f is closed.
2030 *
2031 **/
31dbe5b4 2032void e1000e_release_hw_control(struct e1000_adapter *adapter)
bc7f75fa
AK		 2033{
2034 struct e1000_hw *hw = &adapter->hw;
2035 u32 ctrl_ext;
2036 u32 swsm;
2037
2038 /* Let firmware taken over control of h/w */
2039 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2040 swsm = er32(SWSM);
2041 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2042 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2043 ctrl_ext = er32(CTRL_EXT);
ad68076e 2044 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2045 }
2046}
2047
bc7f75fa
AK		 2048/**
2049 * @e1000_alloc_ring - allocate memory for a ring structure
2050 **/
2051static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2052 struct e1000_ring *ring)
2053{
2054 struct pci_dev *pdev = adapter->pdev;
2055
2056 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2057 GFP_KERNEL);
2058 if (!ring->desc)
2059 return -ENOMEM;
2060
2061 return 0;
2062}
2063
2064/**
2065 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2066 * @adapter: board private structure
2067 *
2068 * Return 0 on success, negative on failure
2069 **/
2070int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2071{
2072 struct e1000_ring *tx_ring = adapter->tx_ring;
2073 int err = -ENOMEM, size;
2074
2075 size = sizeof(struct e1000_buffer) * tx_ring->count;
89bf67f1 2076 tx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2077 if (!tx_ring->buffer_info)
2078 goto err;
bc7f75fa
AK		 2079
2080 /* round up to nearest 4K */
2081 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2082 tx_ring->size = ALIGN(tx_ring->size, 4096);
2083
2084 err = e1000_alloc_ring_dma(adapter, tx_ring);
2085 if (err)
2086 goto err;
2087
2088 tx_ring->next_to_use = 0;
2089 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2090
2091 return 0;
2092err:
2093 vfree(tx_ring->buffer_info);
44defeb3 2094 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2095 return err;
2096}
2097
2098/**
2099 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2100 * @adapter: board private structure
2101 *
2102 * Returns 0 on success, negative on failure
2103 **/
2104int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2105{
2106 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2107 struct e1000_buffer *buffer_info;
2108 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2109
2110 size = sizeof(struct e1000_buffer) * rx_ring->count;
89bf67f1 2111 rx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2112 if (!rx_ring->buffer_info)
2113 goto err;
bc7f75fa 2114
47f44e40
AK		 2115 for (i = 0; i < rx_ring->count; i++) {
2116 buffer_info = &rx_ring->buffer_info[i];
2117 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2118 sizeof(struct e1000_ps_page),
2119 GFP_KERNEL);
2120 if (!buffer_info->ps_pages)
2121 goto err_pages;
2122 }
bc7f75fa
AK		 2123
2124 desc_len = sizeof(union e1000_rx_desc_packet_split);
2125
2126 /* Round up to nearest 4K */
2127 rx_ring->size = rx_ring->count * desc_len;
2128 rx_ring->size = ALIGN(rx_ring->size, 4096);
2129
2130 err = e1000_alloc_ring_dma(adapter, rx_ring);
2131 if (err)
47f44e40 2132 goto err_pages;
bc7f75fa
AK		 2133
2134 rx_ring->next_to_clean = 0;
2135 rx_ring->next_to_use = 0;
2136 rx_ring->rx_skb_top = NULL;
2137
2138 return 0;
47f44e40
AK		 2139
2140err_pages:
2141 for (i = 0; i < rx_ring->count; i++) {
2142 buffer_info = &rx_ring->buffer_info[i];
2143 kfree(buffer_info->ps_pages);
2144 }
bc7f75fa
AK		 2145err:
2146 vfree(rx_ring->buffer_info);
e9262447 2147 e_err("Unable to allocate memory for the receive descriptor ring\n");
bc7f75fa
AK		 2148 return err;
2149}
2150
2151/**
2152 * e1000_clean_tx_ring - Free Tx Buffers
2153 * @adapter: board private structure
2154 **/
2155static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2156{
2157 struct e1000_ring *tx_ring = adapter->tx_ring;
2158 struct e1000_buffer *buffer_info;
2159 unsigned long size;
2160 unsigned int i;
2161
2162 for (i = 0; i < tx_ring->count; i++) {
2163 buffer_info = &tx_ring->buffer_info[i];
2164 e1000_put_txbuf(adapter, buffer_info);
2165 }
2166
2167 size = sizeof(struct e1000_buffer) * tx_ring->count;
2168 memset(tx_ring->buffer_info, 0, size);
2169
2170 memset(tx_ring->desc, 0, tx_ring->size);
2171
2172 tx_ring->next_to_use = 0;
2173 tx_ring->next_to_clean = 0;
2174
2175 writel(0, adapter->hw.hw_addr + tx_ring->head);
2176 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2177}
2178
2179/**
2180 * e1000e_free_tx_resources - Free Tx Resources per Queue
2181 * @adapter: board private structure
2182 *
2183 * Free all transmit software resources
2184 **/
2185void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2186{
2187 struct pci_dev *pdev = adapter->pdev;
2188 struct e1000_ring *tx_ring = adapter->tx_ring;
2189
2190 e1000_clean_tx_ring(adapter);
2191
2192 vfree(tx_ring->buffer_info);
2193 tx_ring->buffer_info = NULL;
2194
2195 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2196 tx_ring->dma);
2197 tx_ring->desc = NULL;
2198}
2199
2200/**
2201 * e1000e_free_rx_resources - Free Rx Resources
2202 * @adapter: board private structure
2203 *
2204 * Free all receive software resources
2205 **/
2206
2207void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2208{
2209 struct pci_dev *pdev = adapter->pdev;
2210 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2211 int i;
bc7f75fa
AK		 2212
2213 e1000_clean_rx_ring(adapter);
2214
b1cdfead 2215 for (i = 0; i < rx_ring->count; i++)
47f44e40 2216 kfree(rx_ring->buffer_info[i].ps_pages);
47f44e40 2217
bc7f75fa
AK		 2218 vfree(rx_ring->buffer_info);
2219 rx_ring->buffer_info = NULL;
2220
bc7f75fa
AK		 2221 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2222 rx_ring->dma);
2223 rx_ring->desc = NULL;
2224}
2225
2226/**
2227 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2228 * @adapter: pointer to adapter
2229 * @itr_setting: current adapter->itr
2230 * @packets: the number of packets during this measurement interval
2231 * @bytes: the number of bytes during this measurement interval
2232 *
bc7f75fa
AK		 2233 * Stores a new ITR value based on packets and byte
2234 * counts during the last interrupt. The advantage of per interrupt
2235 * computation is faster updates and more accurate ITR for the current
2236 * traffic pattern. Constants in this function were computed
2237 * based on theoretical maximum wire speed and thresholds were set based
2238 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2239 * while increasing bulk throughput. This functionality is controlled
2240 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2241 **/
2242static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2243 u16 itr_setting, int packets,
2244 int bytes)
2245{
2246 unsigned int retval = itr_setting;
2247
2248 if (packets == 0)
2249 goto update_itr_done;
2250
2251 switch (itr_setting) {
2252 case lowest_latency:
2253 /* handle TSO and jumbo frames */
2254 if (bytes/packets > 8000)
2255 retval = bulk_latency;
b1cdfead 2256 else if ((packets < 5) && (bytes > 512))
bc7f75fa 2257 retval = low_latency;
bc7f75fa
AK		 2258 break;
2259 case low_latency: /* 50 usec aka 20000 ints/s */
2260 if (bytes > 10000) {
2261 /* this if handles the TSO accounting */
b1cdfead 2262 if (bytes/packets > 8000)
bc7f75fa 2263 retval = bulk_latency;
b1cdfead 2264 else if ((packets < 10) || ((bytes/packets) > 1200))
bc7f75fa 2265 retval = bulk_latency;
b1cdfead 2266 else if ((packets > 35))
bc7f75fa 2267 retval = lowest_latency;
bc7f75fa
AK		 2268 } else if (bytes/packets > 2000) {
2269 retval = bulk_latency;
2270 } else if (packets <= 2 && bytes < 512) {
2271 retval = lowest_latency;
2272 }
2273 break;
2274 case bulk_latency: /* 250 usec aka 4000 ints/s */
2275 if (bytes > 25000) {
b1cdfead 2276 if (packets > 35)
bc7f75fa 2277 retval = low_latency;
bc7f75fa
AK		 2278 } else if (bytes < 6000) {
2279 retval = low_latency;
2280 }
2281 break;
2282 }
2283
2284update_itr_done:
2285 return retval;
2286}
2287
2288static void e1000_set_itr(struct e1000_adapter *adapter)
2289{
2290 struct e1000_hw *hw = &adapter->hw;
2291 u16 current_itr;
2292 u32 new_itr = adapter->itr;
2293
2294 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2295 if (adapter->link_speed != SPEED_1000) {
2296 current_itr = 0;
2297 new_itr = 4000;
2298 goto set_itr_now;
2299 }
2300
828bac87
BA		 2301 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2302 new_itr = 0;
2303 goto set_itr_now;
2304 }
2305
bc7f75fa
AK		 2306 adapter->tx_itr = e1000_update_itr(adapter,
2307 adapter->tx_itr,
2308 adapter->total_tx_packets,
2309 adapter->total_tx_bytes);
2310 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2311 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2312 adapter->tx_itr = low_latency;
2313
2314 adapter->rx_itr = e1000_update_itr(adapter,
2315 adapter->rx_itr,
2316 adapter->total_rx_packets,
2317 adapter->total_rx_bytes);
2318 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2319 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2320 adapter->rx_itr = low_latency;
2321
2322 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2323
2324 switch (current_itr) {
2325 /* counts and packets in update_itr are dependent on these numbers */
2326 case lowest_latency:
2327 new_itr = 70000;
2328 break;
2329 case low_latency:
2330 new_itr = 20000; /* aka hwitr = ~200 */
2331 break;
2332 case bulk_latency:
2333 new_itr = 4000;
2334 break;
2335 default:
2336 break;
2337 }
2338
2339set_itr_now:
2340 if (new_itr != adapter->itr) {
ad68076e
BA		 2341 /*
2342 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2343 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2344 * increasing
2345 */
bc7f75fa
AK		 2346 new_itr = new_itr > adapter->itr ?
2347 min(adapter->itr + (new_itr >> 2), new_itr) :
2348 new_itr;
2349 adapter->itr = new_itr;
4662e82b
BA		 2350 adapter->rx_ring->itr_val = new_itr;
2351 if (adapter->msix_entries)
2352 adapter->rx_ring->set_itr = 1;
2353 else
828bac87
BA		 2354 if (new_itr)
2355 ew32(ITR, 1000000000 / (new_itr * 256));
2356 else
2357 ew32(ITR, 0);
bc7f75fa
AK		 2358 }
2359}
2360
4662e82b
BA		 2361/**
2362 * e1000_alloc_queues - Allocate memory for all rings
2363 * @adapter: board private structure to initialize
2364 **/
2365static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2366{
2367 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2368 if (!adapter->tx_ring)
2369 goto err;
2370
2371 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2372 if (!adapter->rx_ring)
2373 goto err;
2374
2375 return 0;
2376err:
2377 e_err("Unable to allocate memory for queues\n");
2378 kfree(adapter->rx_ring);
2379 kfree(adapter->tx_ring);
2380 return -ENOMEM;
2381}
2382
bc7f75fa
AK		 2383/**
2384 * e1000_clean - NAPI Rx polling callback
ad68076e 2385 * @napi: struct associated with this polling callback
489815ce 2386 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2387 **/
2388static int e1000_clean(struct napi_struct *napi, int budget)
2389{
2390 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2391 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2392 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2393 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2394
4cf1653a 2395 adapter = netdev_priv(poll_dev);
bc7f75fa 2396
4662e82b
BA		 2397 if (adapter->msix_entries &&
2398 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2399 goto clean_rx;
2400
92af3e95 2401 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2402
4662e82b 2403clean_rx:
bc7f75fa 2404 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2405
12d04a3c 2406 if (!tx_cleaned)
d2c7ddd6 2407 work_done = budget;
bc7f75fa 2408
53e52c72
DM		 2409 /* If budget not fully consumed, exit the polling mode */
2410 if (work_done < budget) {
bc7f75fa
AK		 2411 if (adapter->itr_setting & 3)
2412 e1000_set_itr(adapter);
288379f0 2413 napi_complete(napi);
a3c69fef
JB		 2414 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2415 if (adapter->msix_entries)
2416 ew32(IMS, adapter->rx_ring->ims_val);
2417 else
2418 e1000_irq_enable(adapter);
2419 }
bc7f75fa
AK		 2420 }
2421
2422 return work_done;
2423}
2424
2425static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2426{
2427 struct e1000_adapter *adapter = netdev_priv(netdev);
2428 struct e1000_hw *hw = &adapter->hw;
2429 u32 vfta, index;
2430
2431 /* don't update vlan cookie if already programmed */
2432 if ((adapter->hw.mng_cookie.status &
2433 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2434 (vid == adapter->mng_vlan_id))
2435 return;
caaddaf8 2436
bc7f75fa 2437 /* add VID to filter table */
caaddaf8
BA		 2438 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2439 index = (vid >> 5) & 0x7F;
2440 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2441 vfta |= (1 << (vid & 0x1F));
2442 hw->mac.ops.write_vfta(hw, index, vfta);
2443 }
86d70e53
JK		 2444
2445 set_bit(vid, adapter->active_vlans);
bc7f75fa
AK		 2446}
2447
2448static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2449{
2450 struct e1000_adapter *adapter = netdev_priv(netdev);
2451 struct e1000_hw *hw = &adapter->hw;
2452 u32 vfta, index;
2453
bc7f75fa
AK		 2454 if ((adapter->hw.mng_cookie.status &
2455 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2456 (vid == adapter->mng_vlan_id)) {
2457 /* release control to f/w */
31dbe5b4 2458 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 2459 return;
2460 }
2461
2462 /* remove VID from filter table */
caaddaf8
BA		 2463 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2464 index = (vid >> 5) & 0x7F;
2465 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2466 vfta &= ~(1 << (vid & 0x1F));
2467 hw->mac.ops.write_vfta(hw, index, vfta);
2468 }
86d70e53
JK		 2469
2470 clear_bit(vid, adapter->active_vlans);
bc7f75fa
AK		 2471}
2472
86d70e53
JK		 2473/**
2474 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2475 * @adapter: board private structure to initialize
2476 **/
2477static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
bc7f75fa
AK		 2478{
2479 struct net_device *netdev = adapter->netdev;
86d70e53
JK		 2480 struct e1000_hw *hw = &adapter->hw;
2481 u32 rctl;
bc7f75fa 2482
86d70e53
JK		 2483 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2484 /* disable VLAN receive filtering */
2485 rctl = er32(RCTL);
2486 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2487 ew32(RCTL, rctl);
2488
2489 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2490 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
2491 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
bc7f75fa 2492 }
bc7f75fa
AK		 2493 }
2494}
2495
86d70e53
JK		 2496/**
2497 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2498 * @adapter: board private structure to initialize
2499 **/
2500static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2501{
2502 struct e1000_hw *hw = &adapter->hw;
2503 u32 rctl;
2504
2505 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2506 /* enable VLAN receive filtering */
2507 rctl = er32(RCTL);
2508 rctl |= E1000_RCTL_VFE;
2509 rctl &= ~E1000_RCTL_CFIEN;
2510 ew32(RCTL, rctl);
2511 }
2512}
bc7f75fa 2513
86d70e53
JK		 2514/**
2515 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2516 * @adapter: board private structure to initialize
2517 **/
2518static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
bc7f75fa 2519{
bc7f75fa 2520 struct e1000_hw *hw = &adapter->hw;
86d70e53 2521 u32 ctrl;
bc7f75fa 2522
86d70e53
JK		 2523 /* disable VLAN tag insert/strip */
2524 ctrl = er32(CTRL);
2525 ctrl &= ~E1000_CTRL_VME;
2526 ew32(CTRL, ctrl);
2527}
bc7f75fa 2528
86d70e53
JK		 2529/**
2530 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2531 * @adapter: board private structure to initialize
2532 **/
2533static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2534{
2535 struct e1000_hw *hw = &adapter->hw;
2536 u32 ctrl;
bc7f75fa 2537
86d70e53
JK		 2538 /* enable VLAN tag insert/strip */
2539 ctrl = er32(CTRL);
2540 ctrl |= E1000_CTRL_VME;
2541 ew32(CTRL, ctrl);
2542}
bc7f75fa 2543
86d70e53
JK		 2544static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2545{
2546 struct net_device *netdev = adapter->netdev;
2547 u16 vid = adapter->hw.mng_cookie.vlan_id;
2548 u16 old_vid = adapter->mng_vlan_id;
2549
2550 if (adapter->hw.mng_cookie.status &
2551 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2552 e1000_vlan_rx_add_vid(netdev, vid);
2553 adapter->mng_vlan_id = vid;
bc7f75fa
AK		 2554 }
2555
86d70e53
JK		 2556 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2557 e1000_vlan_rx_kill_vid(netdev, old_vid);
bc7f75fa
AK		 2558}
2559
2560static void e1000_restore_vlan(struct e1000_adapter *adapter)
2561{
2562 u16 vid;
2563
86d70e53 2564 e1000_vlan_rx_add_vid(adapter->netdev, 0);
bc7f75fa 2565
86d70e53 2566 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
bc7f75fa 2567 e1000_vlan_rx_add_vid(adapter->netdev, vid);
bc7f75fa
AK		 2568}
2569
cd791618 2570static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2571{
2572 struct e1000_hw *hw = &adapter->hw;
cd791618 2573 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2574
2575 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2576 return;
2577
2578 manc = er32(MANC);
2579
ad68076e
BA		 2580 /*
2581 * enable receiving management packets to the host. this will probably
bc7f75fa 2582 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2583 * the packets will be handled on SMBUS
2584 */
bc7f75fa
AK		 2585 manc |= E1000_MANC_EN_MNG2HOST;
2586 manc2h = er32(MANC2H);
cd791618
BA		 2587
2588 switch (hw->mac.type) {
2589 default:
2590 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2591 break;
2592 case e1000_82574:
2593 case e1000_82583:
2594 /*
2595 * Check if IPMI pass-through decision filter already exists;
2596 * if so, enable it.
2597 */
2598 for (i = 0, j = 0; i < 8; i++) {
2599 mdef = er32(MDEF(i));
2600
2601 /* Ignore filters with anything other than IPMI ports */
3b21b508 2602 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2603 continue;
2604
2605 /* Enable this decision filter in MANC2H */
2606 if (mdef)
2607 manc2h |= (1 << i);
2608
2609 j |= mdef;
2610 }
2611
2612 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2613 break;
2614
2615 /* Create new decision filter in an empty filter */
2616 for (i = 0, j = 0; i < 8; i++)
2617 if (er32(MDEF(i)) == 0) {
2618 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2619 E1000_MDEF_PORT_664));
2620 manc2h |= (1 << 1);
2621 j++;
2622 break;
2623 }
2624
2625 if (!j)
2626 e_warn("Unable to create IPMI pass-through filter\n");
2627 break;
2628 }
2629
bc7f75fa
AK		 2630 ew32(MANC2H, manc2h);
2631 ew32(MANC, manc);
2632}
2633
2634/**
af667a29 2635 * e1000_configure_tx - Configure Transmit Unit after Reset
bc7f75fa
AK		 2636 * @adapter: board private structure
2637 *
2638 * Configure the Tx unit of the MAC after a reset.
2639 **/
2640static void e1000_configure_tx(struct e1000_adapter *adapter)
2641{
2642 struct e1000_hw *hw = &adapter->hw;
2643 struct e1000_ring *tx_ring = adapter->tx_ring;
2644 u64 tdba;
2645 u32 tdlen, tctl, tipg, tarc;
2646 u32 ipgr1, ipgr2;
2647
2648 /* Setup the HW Tx Head and Tail descriptor pointers */
2649 tdba = tx_ring->dma;
2650 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2651 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2652 ew32(TDBAH, (tdba >> 32));
2653 ew32(TDLEN, tdlen);
2654 ew32(TDH, 0);
2655 ew32(TDT, 0);
2656 tx_ring->head = E1000_TDH;
2657 tx_ring->tail = E1000_TDT;
2658
2659 /* Set the default values for the Tx Inter Packet Gap timer */
2660 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2661 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2662 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2663
2664 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2665 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2666
2667 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2668 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2669 ew32(TIPG, tipg);
2670
2671 /* Set the Tx Interrupt Delay register */
2672 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2673 /* Tx irq moderation */
bc7f75fa
AK		 2674 ew32(TADV, adapter->tx_abs_int_delay);
2675
3a3b7586
JB		 2676 if (adapter->flags2 & FLAG2_DMA_BURST) {
2677 u32 txdctl = er32(TXDCTL(0));
2678 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2679 E1000_TXDCTL_WTHRESH);
2680 /*
2681 * set up some performance related parameters to encourage the
2682 * hardware to use the bus more efficiently in bursts, depends
2683 * on the tx_int_delay to be enabled,
2684 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2685 * hthresh = 1 ==> prefetch when one or more available
2686 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2687 * BEWARE: this seems to work but should be considered first if
af667a29 2688 * there are Tx hangs or other Tx related bugs
3a3b7586
JB		 2689 */
2690 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2691 ew32(TXDCTL(0), txdctl);
2692 /* erratum work around: set txdctl the same for both queues */
2693 ew32(TXDCTL(1), txdctl);
2694 }
2695
bc7f75fa
AK		 2696 /* Program the Transmit Control Register */
2697 tctl = er32(TCTL);
2698 tctl &= ~E1000_TCTL_CT;
2699 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2700 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2701
2702 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2703 tarc = er32(TARC(0));
ad68076e
BA		 2704 /*
2705 * set the speed mode bit, we'll clear it if we're not at
2706 * gigabit link later
2707 */
bc7f75fa
AK		 2708#define SPEED_MODE_BIT (1 << 21)
2709 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2710 ew32(TARC(0), tarc);
bc7f75fa
AK		 2711 }
2712
2713 /* errata: program both queues to unweighted RR */
2714 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2715 tarc = er32(TARC(0));
bc7f75fa 2716 tarc |= 1;
e9ec2c0f
JK		 2717 ew32(TARC(0), tarc);
2718 tarc = er32(TARC(1));
bc7f75fa 2719 tarc |= 1;
e9ec2c0f 2720 ew32(TARC(1), tarc);
bc7f75fa
AK		 2721 }
2722
bc7f75fa
AK		 2723 /* Setup Transmit Descriptor Settings for eop descriptor */
2724 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2725
2726 /* only set IDE if we are delaying interrupts using the timers */
2727 if (adapter->tx_int_delay)
2728 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2729
2730 /* enable Report Status bit */
2731 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2732
2733 ew32(TCTL, tctl);
2734
edfea6e6 2735 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2736}
2737
2738/**
2739 * e1000_setup_rctl - configure the receive control registers
2740 * @adapter: Board private structure
2741 **/
2742#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2743 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2744static void e1000_setup_rctl(struct e1000_adapter *adapter)
2745{
2746 struct e1000_hw *hw = &adapter->hw;
2747 u32 rctl, rfctl;
bc7f75fa
AK		 2748 u32 pages = 0;
2749
a1ce6473
BA		 2750 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2751 if (hw->mac.type == e1000_pch2lan) {
2752 s32 ret_val;
2753
2754 if (adapter->netdev->mtu > ETH_DATA_LEN)
2755 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2756 else
2757 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
dd93f95e
BA		 2758
2759 if (ret_val)
2760 e_dbg("failed to enable jumbo frame workaround mode\n");
a1ce6473
BA		 2761 }
2762
bc7f75fa
AK		 2763 /* Program MC offset vector base */
2764 rctl = er32(RCTL);
2765 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2766 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2767 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2768 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2769
2770 /* Do not Store bad packets */
2771 rctl &= ~E1000_RCTL_SBP;
2772
2773 /* Enable Long Packet receive */
2774 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2775 rctl &= ~E1000_RCTL_LPE;
2776 else
2777 rctl |= E1000_RCTL_LPE;
2778
eb7c3adb
JK		 2779 /* Some systems expect that the CRC is included in SMBUS traffic. The
2780 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2781 * host memory when this is enabled
2782 */
2783 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2784 rctl |= E1000_RCTL_SECRC;
5918bd88 2785
a4f58f54
BA		 2786 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2787 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2788 u16 phy_data;
2789
2790 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2791 phy_data &= 0xfff8;
2792 phy_data |= (1 << 2);
2793 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2794
2795 e1e_rphy(hw, 22, &phy_data);
2796 phy_data &= 0x0fff;
2797 phy_data |= (1 << 14);
2798 e1e_wphy(hw, 0x10, 0x2823);
2799 e1e_wphy(hw, 0x11, 0x0003);
2800 e1e_wphy(hw, 22, phy_data);
2801 }
2802
bc7f75fa
AK		 2803 /* Setup buffer sizes */
2804 rctl &= ~E1000_RCTL_SZ_4096;
2805 rctl |= E1000_RCTL_BSEX;
2806 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2807 case 2048:
2808 default:
2809 rctl |= E1000_RCTL_SZ_2048;
2810 rctl &= ~E1000_RCTL_BSEX;
2811 break;
2812 case 4096:
2813 rctl |= E1000_RCTL_SZ_4096;
2814 break;
2815 case 8192:
2816 rctl |= E1000_RCTL_SZ_8192;
2817 break;
2818 case 16384:
2819 rctl |= E1000_RCTL_SZ_16384;
2820 break;
2821 }
2822
2823 /*
2824 * 82571 and greater support packet-split where the protocol
2825 * header is placed in skb->data and the packet data is
2826 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2827 * In the case of a non-split, skb->data is linearly filled,
2828 * followed by the page buffers. Therefore, skb->data is
2829 * sized to hold the largest protocol header.
2830 *
2831 * allocations using alloc_page take too long for regular MTU
2832 * so only enable packet split for jumbo frames
2833 *
2834 * Using pages when the page size is greater than 16k wastes
2835 * a lot of memory, since we allocate 3 pages at all times
2836 * per packet.
2837 */
bc7f75fa 2838 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2839 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2840 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2841 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2842 else
2843 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2844
2845 if (adapter->rx_ps_pages) {
90da0669
BA		 2846 u32 psrctl = 0;
2847
bc7f75fa
AK		 2848 /* Configure extra packet-split registers */
2849 rfctl = er32(RFCTL);
2850 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2851 /*
2852 * disable packet split support for IPv6 extension headers,
2853 * because some malformed IPv6 headers can hang the Rx
2854 */
bc7f75fa
AK		 2855 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2856 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2857
2858 ew32(RFCTL, rfctl);
2859
140a7480
AK		 2860 /* Enable Packet split descriptors */
2861 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2862
2863 psrctl |= adapter->rx_ps_bsize0 >>
2864 E1000_PSRCTL_BSIZE0_SHIFT;
2865
2866 switch (adapter->rx_ps_pages) {
2867 case 3:
2868 psrctl |= PAGE_SIZE <<
2869 E1000_PSRCTL_BSIZE3_SHIFT;
2870 case 2:
2871 psrctl |= PAGE_SIZE <<
2872 E1000_PSRCTL_BSIZE2_SHIFT;
2873 case 1:
2874 psrctl |= PAGE_SIZE >>
2875 E1000_PSRCTL_BSIZE1_SHIFT;
2876 break;
2877 }
2878
2879 ew32(PSRCTL, psrctl);
2880 }
2881
2882 ew32(RCTL, rctl);
318a94d6
JK		 2883 /* just started the receive unit, no need to restart */
2884 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2885}
2886
2887/**
2888 * e1000_configure_rx - Configure Receive Unit after Reset
2889 * @adapter: board private structure
2890 *
2891 * Configure the Rx unit of the MAC after a reset.
2892 **/
2893static void e1000_configure_rx(struct e1000_adapter *adapter)
2894{
2895 struct e1000_hw *hw = &adapter->hw;
2896 struct e1000_ring *rx_ring = adapter->rx_ring;
2897 u64 rdba;
2898 u32 rdlen, rctl, rxcsum, ctrl_ext;
2899
2900 if (adapter->rx_ps_pages) {
2901 /* this is a 32 byte descriptor */
2902 rdlen = rx_ring->count *
af667a29 2903 sizeof(union e1000_rx_desc_packet_split);
bc7f75fa
AK		 2904 adapter->clean_rx = e1000_clean_rx_irq_ps;
2905 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2906 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2907 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2908 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2909 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2910 } else {
97ac8cae 2911 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2912 adapter->clean_rx = e1000_clean_rx_irq;
2913 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2914 }
2915
2916 /* disable receives while setting up the descriptors */
2917 rctl = er32(RCTL);
7f99ae63
BA		 2918 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
2919 ew32(RCTL, rctl & ~E1000_RCTL_EN);
bc7f75fa 2920 e1e_flush();
1bba4386 2921 usleep_range(10000, 20000);
bc7f75fa 2922
3a3b7586
JB		 2923 if (adapter->flags2 & FLAG2_DMA_BURST) {
2924 /*
2925 * set the writeback threshold (only takes effect if the RDTR
2926 * is set). set GRAN=1 and write back up to 0x4 worth, and
af667a29 2927 * enable prefetching of 0x20 Rx descriptors
3a3b7586
JB		 2928 * granularity = 01
2929 * wthresh = 04,
2930 * hthresh = 04,
2931 * pthresh = 0x20
2932 */
2933 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
2934 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
2935
2936 /*
2937 * override the delay timers for enabling bursting, only if
2938 * the value was not set by the user via module options
2939 */
2940 if (adapter->rx_int_delay == DEFAULT_RDTR)
2941 adapter->rx_int_delay = BURST_RDTR;
2942 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
2943 adapter->rx_abs_int_delay = BURST_RADV;
2944 }
2945
bc7f75fa
AK		 2946 /* set the Receive Delay Timer Register */
2947 ew32(RDTR, adapter->rx_int_delay);
2948
2949 /* irq moderation */
2950 ew32(RADV, adapter->rx_abs_int_delay);
828bac87 2951 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
ad68076e 2952 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2953
2954 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2955 /* Auto-Mask interrupts upon ICR access */
2956 ctrl_ext |= E1000_CTRL_EXT_IAME;
2957 ew32(IAM, 0xffffffff);
2958 ew32(CTRL_EXT, ctrl_ext);
2959 e1e_flush();
2960
ad68076e
BA		 2961 /*
2962 * Setup the HW Rx Head and Tail Descriptor Pointers and
2963 * the Base and Length of the Rx Descriptor Ring
2964 */
bc7f75fa 2965 rdba = rx_ring->dma;
284901a9 2966 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2967 ew32(RDBAH, (rdba >> 32));
2968 ew32(RDLEN, rdlen);
2969 ew32(RDH, 0);
2970 ew32(RDT, 0);
2971 rx_ring->head = E1000_RDH;
2972 rx_ring->tail = E1000_RDT;
2973
2974 /* Enable Receive Checksum Offload for TCP and UDP */
2975 rxcsum = er32(RXCSUM);
2976 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2977 rxcsum |= E1000_RXCSUM_TUOFL;
2978
ad68076e
BA		 2979 /*
2980 * IPv4 payload checksum for UDP fragments must be
2981 * used in conjunction with packet-split.
2982 */
bc7f75fa
AK		 2983 if (adapter->rx_ps_pages)
2984 rxcsum |= E1000_RXCSUM_IPPCSE;
2985 } else {
2986 rxcsum &= ~E1000_RXCSUM_TUOFL;
2987 /* no need to clear IPPCSE as it defaults to 0 */
2988 }
2989 ew32(RXCSUM, rxcsum);
2990
ad68076e
BA		 2991 /*
2992 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2993 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2994 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2995 */
828bac87
BA		 2996 if ((adapter->flags & FLAG_HAS_ERT) ||
2997 (adapter->hw.mac.type == e1000_pch2lan)) {
53ec5498
BA		 2998 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2999 u32 rxdctl = er32(RXDCTL(0));
3000 ew32(RXDCTL(0), rxdctl | 0x3);
828bac87
BA		 3001 if (adapter->flags & FLAG_HAS_ERT)
3002 ew32(ERT, E1000_ERT_2048 | (1 << 13));
53ec5498
BA		 3003 /*
3004 * With jumbo frames and early-receive enabled,
3005 * excessive C-state transition latencies result in
3006 * dropped transactions.
3007 */
af667a29 3008 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55);
53ec5498 3009 } else {
af667a29
BA		 3010 pm_qos_update_request(&adapter->netdev->pm_qos_req,
3011 PM_QOS_DEFAULT_VALUE);
53ec5498 3012 }
97ac8cae 3013 }
bc7f75fa
AK		 3014
3015 /* Enable Receives */
3016 ew32(RCTL, rctl);
3017}
3018
3019/**
e2de3eb6 3020 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 3021 * @hw: pointer to the HW structure
3022 * @mc_addr_list: array of multicast addresses to program
3023 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 3024 *
ab8932f3 3025 * Updates the Multicast Table Array.
bc7f75fa 3026 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 3027 **/
e2de3eb6 3028static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 3029 u32 mc_addr_count)
bc7f75fa 3030{
ab8932f3 3031 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 3032}
3033
3034/**
3035 * e1000_set_multi - Multicast and Promiscuous mode set
3036 * @netdev: network interface device structure
3037 *
3038 * The set_multi entry point is called whenever the multicast address
3039 * list or the network interface flags are updated. This routine is
3040 * responsible for configuring the hardware for proper multicast,
3041 * promiscuous mode, and all-multi behavior.
3042 **/
3043static void e1000_set_multi(struct net_device *netdev)
3044{
3045 struct e1000_adapter *adapter = netdev_priv(netdev);
3046 struct e1000_hw *hw = &adapter->hw;
22bedad3 3047 struct netdev_hw_addr *ha;
bc7f75fa
AK		 3048 u8 *mta_list;
3049 u32 rctl;
bc7f75fa
AK		 3050
3051 /* Check for Promiscuous and All Multicast modes */
3052
3053 rctl = er32(RCTL);
3054
3055 if (netdev->flags & IFF_PROMISC) {
3056 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 3057 rctl &= ~E1000_RCTL_VFE;
86d70e53
JK		 3058 /* Do not hardware filter VLANs in promisc mode */
3059 e1000e_vlan_filter_disable(adapter);
bc7f75fa 3060 } else {
746b9f02
PM		 3061 if (netdev->flags & IFF_ALLMULTI) {
3062 rctl |= E1000_RCTL_MPE;
3063 rctl &= ~E1000_RCTL_UPE;
3064 } else {
3065 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3066 }
86d70e53 3067 e1000e_vlan_filter_enable(adapter);
bc7f75fa
AK		 3068 }
3069
3070 ew32(RCTL, rctl);
3071
7aeef972 3072 if (!netdev_mc_empty(netdev)) {
90da0669
BA		 3073 int i = 0;
3074
7aeef972 3075 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 3076 if (!mta_list)
3077 return;
3078
3079 /* prepare a packed array of only addresses. */
22bedad3
JP		 3080 netdev_for_each_mc_addr(ha, netdev)
3081 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 3082
ab8932f3 3083 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 3084 kfree(mta_list);
3085 } else {
3086 /*
3087 * if we're called from probe, we might not have
3088 * anything to do here, so clear out the list
3089 */
ab8932f3 3090 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa 3091 }
86d70e53
JK		 3092
3093 if (netdev->features & NETIF_F_HW_VLAN_RX)
3094 e1000e_vlan_strip_enable(adapter);
3095 else
3096 e1000e_vlan_strip_disable(adapter);
bc7f75fa
AK		 3097}
3098
3099/**
ad68076e 3100 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3101 * @adapter: private board structure
3102 **/
3103static void e1000_configure(struct e1000_adapter *adapter)
3104{
3105 e1000_set_multi(adapter->netdev);
3106
3107 e1000_restore_vlan(adapter);
cd791618 3108 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3109
3110 e1000_configure_tx(adapter);
3111 e1000_setup_rctl(adapter);
3112 e1000_configure_rx(adapter);
c2fed996
JK		 3113 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring),
3114 GFP_KERNEL);
bc7f75fa
AK		 3115}
3116
3117/**
3118 * e1000e_power_up_phy - restore link in case the phy was powered down
3119 * @adapter: address of board private structure
3120 *
3121 * The phy may be powered down to save power and turn off link when the
3122 * driver is unloaded and wake on lan is not enabled (among others)
3123 * *** this routine MUST be followed by a call to e1000e_reset ***
3124 **/
3125void e1000e_power_up_phy(struct e1000_adapter *adapter)
3126{
17f208de
BA		 3127 if (adapter->hw.phy.ops.power_up)
3128 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3129
3130 adapter->hw.mac.ops.setup_link(&adapter->hw);
3131}
3132
3133/**
3134 * e1000_power_down_phy - Power down the PHY
3135 *
17f208de
BA		 3136 * Power down the PHY so no link is implied when interface is down.
3137 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3138 */
3139static void e1000_power_down_phy(struct e1000_adapter *adapter)
3140{
bc7f75fa 3141 /* WoL is enabled */
23b66e2b 3142 if (adapter->wol)
bc7f75fa
AK		 3143 return;
3144
17f208de
BA		 3145 if (adapter->hw.phy.ops.power_down)
3146 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3147}
3148
3149/**
3150 * e1000e_reset - bring the hardware into a known good state
3151 *
3152 * This function boots the hardware and enables some settings that
3153 * require a configuration cycle of the hardware - those cannot be
3154 * set/changed during runtime. After reset the device needs to be
ad68076e 3155 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3156 */
3157void e1000e_reset(struct e1000_adapter *adapter)
3158{
3159 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3160 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3161 struct e1000_hw *hw = &adapter->hw;
3162 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3163 u32 pba = adapter->pba;
bc7f75fa
AK		 3164 u16 hwm;
3165
ad68076e 3166 /* reset Packet Buffer Allocation to default */
318a94d6 3167 ew32(PBA, pba);
df762464 3168
318a94d6 3169 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3170 /*
3171 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3172 * large enough to accommodate two full transmit packets,
3173 * rounded up to the next 1KB and expressed in KB. Likewise,
3174 * the Rx FIFO should be large enough to accommodate at least
3175 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3176 * expressed in KB.
3177 */
df762464 3178 pba = er32(PBA);
bc7f75fa 3179 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3180 tx_space = pba >> 16;
bc7f75fa 3181 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3182 pba &= 0xffff;
ad68076e 3183 /*
af667a29 3184 * the Tx fifo also stores 16 bytes of information about the Tx
ad68076e 3185 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3186 */
3187 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3188 sizeof(struct e1000_tx_desc) -
3189 ETH_FCS_LEN) * 2;
3190 min_tx_space = ALIGN(min_tx_space, 1024);
3191 min_tx_space >>= 10;
3192 /* software strips receive CRC, so leave room for it */
318a94d6 3193 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3194 min_rx_space = ALIGN(min_rx_space, 1024);
3195 min_rx_space >>= 10;
3196
ad68076e
BA		 3197 /*
3198 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3199 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3200 * allocation, take space away from current Rx allocation
3201 */
df762464
AK		 3202 if ((tx_space < min_tx_space) &&
3203 ((min_tx_space - tx_space) < pba)) {
3204 pba -= min_tx_space - tx_space;
bc7f75fa 3205
ad68076e 3206 /*
af667a29 3207 * if short on Rx space, Rx wins and must trump Tx
ad68076e
BA		 3208 * adjustment or use Early Receive if available
3209 */
df762464 3210 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3211 (!(adapter->flags & FLAG_HAS_ERT)))
3212 /* ERT enabled in e1000_configure_rx */
df762464 3213 pba = min_rx_space;
bc7f75fa 3214 }
df762464
AK		 3215
3216 ew32(PBA, pba);
bc7f75fa
AK		 3217 }
3218
ad68076e
BA		 3219 /*
3220 * flow control settings
3221 *
38eb394e 3222 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3223 * (or the size used for early receive) above it in the Rx FIFO.
3224 * Set it to the lower of:
3225 * - 90% of the Rx FIFO size, and
3226 * - the full Rx FIFO size minus the early receive size (for parts
3227 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3228 * - the full Rx FIFO size minus one full frame
ad68076e 3229 */
d3738bb8
BA		 3230 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3231 fc->pause_time = 0xFFFF;
3232 else
3233 fc->pause_time = E1000_FC_PAUSE_TIME;
3234 fc->send_xon = 1;
3235 fc->current_mode = fc->requested_mode;
3236
3237 switch (hw->mac.type) {
3238 default:
3239 if ((adapter->flags & FLAG_HAS_ERT) &&
3240 (adapter->netdev->mtu > ETH_DATA_LEN))
3241 hwm = min(((pba << 10) * 9 / 10),
3242 ((pba << 10) - (E1000_ERT_2048 << 3)));
3243 else
3244 hwm = min(((pba << 10) * 9 / 10),
3245 ((pba << 10) - adapter->max_frame_size));
3246
3247 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3248 fc->low_water = fc->high_water - 8;
3249 break;
3250 case e1000_pchlan:
38eb394e
BA		 3251 /*
3252 * Workaround PCH LOM adapter hangs with certain network
3253 * loads. If hangs persist, try disabling Tx flow control.
3254 */
3255 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3256 fc->high_water = 0x3500;
3257 fc->low_water = 0x1500;
3258 } else {
3259 fc->high_water = 0x5000;
3260 fc->low_water = 0x3000;
3261 }
a305595b 3262 fc->refresh_time = 0x1000;
d3738bb8
BA		 3263 break;
3264 case e1000_pch2lan:
3265 fc->high_water = 0x05C20;
3266 fc->low_water = 0x05048;
3267 fc->pause_time = 0x0650;
3268 fc->refresh_time = 0x0400;
828bac87
BA		 3269 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3270 pba = 14;
3271 ew32(PBA, pba);
3272 }
d3738bb8 3273 break;
38eb394e 3274 }
bc7f75fa 3275
828bac87
BA		 3276 /*
3277 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3278 * fit in receive buffer and early-receive not supported.
3279 */
3280 if (adapter->itr_setting & 0x3) {
3281 if (((adapter->max_frame_size * 2) > (pba << 10)) &&
3282 !(adapter->flags & FLAG_HAS_ERT)) {
3283 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3284 dev_info(&adapter->pdev->dev,
3285 "Interrupt Throttle Rate turned off\n");
3286 adapter->flags2 |= FLAG2_DISABLE_AIM;
3287 ew32(ITR, 0);
3288 }
3289 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3290 dev_info(&adapter->pdev->dev,
3291 "Interrupt Throttle Rate turned on\n");
3292 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3293 adapter->itr = 20000;
3294 ew32(ITR, 1000000000 / (adapter->itr * 256));
3295 }
3296 }
3297
bc7f75fa
AK		 3298 /* Allow time for pending master requests to run */
3299 mac->ops.reset_hw(hw);
97ac8cae
BA		 3300
3301 /*
3302 * For parts with AMT enabled, let the firmware know
3303 * that the network interface is in control
3304 */
c43bc57e 3305 if (adapter->flags & FLAG_HAS_AMT)
31dbe5b4 3306 e1000e_get_hw_control(adapter);
97ac8cae 3307
bc7f75fa
AK		 3308 ew32(WUC, 0);
3309
3310 if (mac->ops.init_hw(hw))
44defeb3 3311 e_err("Hardware Error\n");
bc7f75fa
AK		 3312
3313 e1000_update_mng_vlan(adapter);
3314
3315 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3316 ew32(VET, ETH_P_8021Q);
3317
3318 e1000e_reset_adaptive(hw);
31dbe5b4
BA		 3319
3320 if (!netif_running(adapter->netdev) &&
3321 !test_bit(__E1000_TESTING, &adapter->state)) {
3322 e1000_power_down_phy(adapter);
3323 return;
3324 }
3325
bc7f75fa
AK		 3326 e1000_get_phy_info(hw);
3327
918d7197
BA		 3328 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3329 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3330 u16 phy_data = 0;
ad68076e
BA		 3331 /*
3332 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3333 * the return value of this function because there is nothing
ad68076e
BA		 3334 * different we would do if it failed
3335 */
bc7f75fa
AK		 3336 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3337 phy_data &= ~IGP02E1000_PM_SPD;
3338 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3339 }
bc7f75fa
AK		 3340}
3341
3342int e1000e_up(struct e1000_adapter *adapter)
3343{
3344 struct e1000_hw *hw = &adapter->hw;
3345
3346 /* hardware has been reset, we need to reload some things */
3347 e1000_configure(adapter);
3348
3349 clear_bit(__E1000_DOWN, &adapter->state);
3350
3351 napi_enable(&adapter->napi);
4662e82b
BA		 3352 if (adapter->msix_entries)
3353 e1000_configure_msix(adapter);
bc7f75fa
AK		 3354 e1000_irq_enable(adapter);
3355
400484fa 3356 netif_start_queue(adapter->netdev);
4cb9be7a 3357
bc7f75fa 3358 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3359 if (adapter->msix_entries)
3360 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3361 else
3362 ew32(ICS, E1000_ICS_LSC);
3363
bc7f75fa
AK		 3364 return 0;
3365}
3366
713b3c9e
JB		 3367static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3368{
3369 struct e1000_hw *hw = &adapter->hw;
3370
3371 if (!(adapter->flags2 & FLAG2_DMA_BURST))
3372 return;
3373
3374 /* flush pending descriptor writebacks to memory */
3375 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3376 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3377
3378 /* execute the writes immediately */
3379 e1e_flush();
3380}
3381
67fd4fcb
JK		 3382static void e1000e_update_stats(struct e1000_adapter *adapter);
3383
bc7f75fa
AK		 3384void e1000e_down(struct e1000_adapter *adapter)
3385{
3386 struct net_device *netdev = adapter->netdev;
3387 struct e1000_hw *hw = &adapter->hw;
3388 u32 tctl, rctl;
3389
ad68076e
BA		 3390 /*
3391 * signal that we're down so the interrupt handler does not
3392 * reschedule our watchdog timer
3393 */
bc7f75fa
AK		 3394 set_bit(__E1000_DOWN, &adapter->state);
3395
3396 /* disable receives in the hardware */
3397 rctl = er32(RCTL);
7f99ae63
BA		 3398 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3399 ew32(RCTL, rctl & ~E1000_RCTL_EN);
bc7f75fa
AK		 3400 /* flush and sleep below */
3401
4cb9be7a 3402 netif_stop_queue(netdev);
bc7f75fa
AK		 3403
3404 /* disable transmits in the hardware */
3405 tctl = er32(TCTL);
3406 tctl &= ~E1000_TCTL_EN;
3407 ew32(TCTL, tctl);
7f99ae63 3408
bc7f75fa
AK		 3409 /* flush both disables and wait for them to finish */
3410 e1e_flush();
1bba4386 3411 usleep_range(10000, 20000);
bc7f75fa
AK		 3412
3413 napi_disable(&adapter->napi);
3414 e1000_irq_disable(adapter);
3415
3416 del_timer_sync(&adapter->watchdog_timer);
3417 del_timer_sync(&adapter->phy_info_timer);
3418
bc7f75fa 3419 netif_carrier_off(netdev);
67fd4fcb
JK		 3420
3421 spin_lock(&adapter->stats64_lock);
3422 e1000e_update_stats(adapter);
3423 spin_unlock(&adapter->stats64_lock);
3424
400484fa
BA		 3425 e1000e_flush_descriptors(adapter);
3426 e1000_clean_tx_ring(adapter);
3427 e1000_clean_rx_ring(adapter);
3428
bc7f75fa
AK		 3429 adapter->link_speed = 0;
3430 adapter->link_duplex = 0;
3431
52cc3086
JK		 3432 if (!pci_channel_offline(adapter->pdev))
3433 e1000e_reset(adapter);
713b3c9e 3434
bc7f75fa
AK		 3435 /*
3436 * TODO: for power management, we could drop the link and
3437 * pci_disable_device here.
3438 */
3439}
3440
3441void e1000e_reinit_locked(struct e1000_adapter *adapter)
3442{
3443 might_sleep();
3444 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 3445 usleep_range(1000, 2000);
bc7f75fa
AK		 3446 e1000e_down(adapter);
3447 e1000e_up(adapter);
3448 clear_bit(__E1000_RESETTING, &adapter->state);
3449}
3450
3451/**
3452 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3453 * @adapter: board private structure to initialize
3454 *
3455 * e1000_sw_init initializes the Adapter private data structure.
3456 * Fields are initialized based on PCI device information and
3457 * OS network device settings (MTU size).
3458 **/
3459static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3460{
bc7f75fa
AK		 3461 struct net_device *netdev = adapter->netdev;
3462
3463 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3464 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3465 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3466 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3467
67fd4fcb
JK		 3468 spin_lock_init(&adapter->stats64_lock);
3469
4662e82b 3470 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3471
4662e82b
BA		 3472 if (e1000_alloc_queues(adapter))
3473 return -ENOMEM;
bc7f75fa 3474
bc7f75fa 3475 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3476 e1000_irq_disable(adapter);
3477
bc7f75fa
AK		 3478 set_bit(__E1000_DOWN, &adapter->state);
3479 return 0;
bc7f75fa
AK		 3480}
3481
f8d59f78
BA		 3482/**
3483 * e1000_intr_msi_test - Interrupt Handler
3484 * @irq: interrupt number
3485 * @data: pointer to a network interface device structure
3486 **/
3487static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3488{
3489 struct net_device *netdev = data;
3490 struct e1000_adapter *adapter = netdev_priv(netdev);
3491 struct e1000_hw *hw = &adapter->hw;
3492 u32 icr = er32(ICR);
3493
3bb99fe2 3494 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3495 if (icr & E1000_ICR_RXSEQ) {
3496 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3497 wmb();
3498 }
3499
3500 return IRQ_HANDLED;
3501}
3502
3503/**
3504 * e1000_test_msi_interrupt - Returns 0 for successful test
3505 * @adapter: board private struct
3506 *
3507 * code flow taken from tg3.c
3508 **/
3509static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3510{
3511 struct net_device *netdev = adapter->netdev;
3512 struct e1000_hw *hw = &adapter->hw;
3513 int err;
3514
3515 /* poll_enable hasn't been called yet, so don't need disable */
3516 /* clear any pending events */
3517 er32(ICR);
3518
3519 /* free the real vector and request a test handler */
3520 e1000_free_irq(adapter);
4662e82b 3521 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3522
3523 /* Assume that the test fails, if it succeeds then the test
3524 * MSI irq handler will unset this flag */
3525 adapter->flags |= FLAG_MSI_TEST_FAILED;
3526
3527 err = pci_enable_msi(adapter->pdev);
3528 if (err)
3529 goto msi_test_failed;
3530
a0607fd3 3531 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3532 netdev->name, netdev);
3533 if (err) {
3534 pci_disable_msi(adapter->pdev);
3535 goto msi_test_failed;
3536 }
3537
3538 wmb();
3539
3540 e1000_irq_enable(adapter);
3541
3542 /* fire an unusual interrupt on the test handler */
3543 ew32(ICS, E1000_ICS_RXSEQ);
3544 e1e_flush();
3545 msleep(50);
3546
3547 e1000_irq_disable(adapter);
3548
3549 rmb();
3550
3551 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3552 adapter->int_mode = E1000E_INT_MODE_LEGACY;
068e8a30
JD		 3553 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3554 } else
3555 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78
BA		 3556
3557 free_irq(adapter->pdev->irq, netdev);
3558 pci_disable_msi(adapter->pdev);
3559
f8d59f78 3560msi_test_failed:
4662e82b 3561 e1000e_set_interrupt_capability(adapter);
068e8a30 3562 return e1000_request_irq(adapter);
f8d59f78
BA		 3563}
3564
3565/**
3566 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3567 * @adapter: board private struct
3568 *
3569 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3570 **/
3571static int e1000_test_msi(struct e1000_adapter *adapter)
3572{
3573 int err;
3574 u16 pci_cmd;
3575
3576 if (!(adapter->flags & FLAG_MSI_ENABLED))
3577 return 0;
3578
3579 /* disable SERR in case the MSI write causes a master abort */
3580 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3581 if (pci_cmd & PCI_COMMAND_SERR)
3582 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3583 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3584
3585 err = e1000_test_msi_interrupt(adapter);
3586
36f2407f
DN		 3587 /* re-enable SERR */
3588 if (pci_cmd & PCI_COMMAND_SERR) {
3589 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3590 pci_cmd |= PCI_COMMAND_SERR;
3591 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3592 }
f8d59f78 3593
f8d59f78
BA		 3594 return err;
3595}
3596
bc7f75fa
AK		 3597/**
3598 * e1000_open - Called when a network interface is made active
3599 * @netdev: network interface device structure
3600 *
3601 * Returns 0 on success, negative value on failure
3602 *
3603 * The open entry point is called when a network interface is made
3604 * active by the system (IFF_UP). At this point all resources needed
3605 * for transmit and receive operations are allocated, the interrupt
3606 * handler is registered with the OS, the watchdog timer is started,
3607 * and the stack is notified that the interface is ready.
3608 **/
3609static int e1000_open(struct net_device *netdev)
3610{
3611 struct e1000_adapter *adapter = netdev_priv(netdev);
3612 struct e1000_hw *hw = &adapter->hw;
23606cf5 3613 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3614 int err;
3615
3616 /* disallow open during test */
3617 if (test_bit(__E1000_TESTING, &adapter->state))
3618 return -EBUSY;
3619
23606cf5
RW		 3620 pm_runtime_get_sync(&pdev->dev);
3621
9c563d20
JB		 3622 netif_carrier_off(netdev);
3623
bc7f75fa
AK		 3624 /* allocate transmit descriptors */
3625 err = e1000e_setup_tx_resources(adapter);
3626 if (err)
3627 goto err_setup_tx;
3628
3629 /* allocate receive descriptors */
3630 err = e1000e_setup_rx_resources(adapter);
3631 if (err)
3632 goto err_setup_rx;
3633
11b08be8
BA		 3634 /*
3635 * If AMT is enabled, let the firmware know that the network
3636 * interface is now open and reset the part to a known state.
3637 */
3638 if (adapter->flags & FLAG_HAS_AMT) {
31dbe5b4 3639 e1000e_get_hw_control(adapter);
11b08be8
BA		 3640 e1000e_reset(adapter);
3641 }
3642
bc7f75fa
AK		 3643 e1000e_power_up_phy(adapter);
3644
3645 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3646 if ((adapter->hw.mng_cookie.status &
3647 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3648 e1000_update_mng_vlan(adapter);
3649
c128ec29 3650 /* DMA latency requirement to workaround early-receive/jumbo issue */
828bac87
BA		 3651 if ((adapter->flags & FLAG_HAS_ERT) ||
3652 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014
LT		 3653 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3654 PM_QOS_CPU_DMA_LATENCY,
3655 PM_QOS_DEFAULT_VALUE);
c128ec29 3656
ad68076e
BA		 3657 /*
3658 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3659 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3660 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3661 * clean_rx handler before we do so.
3662 */
bc7f75fa
AK		 3663 e1000_configure(adapter);
3664
3665 err = e1000_request_irq(adapter);
3666 if (err)
3667 goto err_req_irq;
3668
f8d59f78
BA		 3669 /*
3670 * Work around PCIe errata with MSI interrupts causing some chipsets to
3671 * ignore e1000e MSI messages, which means we need to test our MSI
3672 * interrupt now
3673 */
4662e82b 3674 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3675 err = e1000_test_msi(adapter);
3676 if (err) {
3677 e_err("Interrupt allocation failed\n");
3678 goto err_req_irq;
3679 }
3680 }
3681
bc7f75fa
AK		 3682 /* From here on the code is the same as e1000e_up() */
3683 clear_bit(__E1000_DOWN, &adapter->state);
3684
3685 napi_enable(&adapter->napi);
3686
3687 e1000_irq_enable(adapter);
3688
4cb9be7a 3689 netif_start_queue(netdev);
d55b53ff 3690
23606cf5
RW		 3691 adapter->idle_check = true;
3692 pm_runtime_put(&pdev->dev);
3693
bc7f75fa 3694 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3695 if (adapter->msix_entries)
3696 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3697 else
3698 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3699
3700 return 0;
3701
3702err_req_irq:
31dbe5b4 3703 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 3704 e1000_power_down_phy(adapter);
3705 e1000e_free_rx_resources(adapter);
3706err_setup_rx:
3707 e1000e_free_tx_resources(adapter);
3708err_setup_tx:
3709 e1000e_reset(adapter);
23606cf5 3710 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3711
3712 return err;
3713}
3714
3715/**
3716 * e1000_close - Disables a network interface
3717 * @netdev: network interface device structure
3718 *
3719 * Returns 0, this is not allowed to fail
3720 *
3721 * The close entry point is called when an interface is de-activated
3722 * by the OS. The hardware is still under the drivers control, but
3723 * needs to be disabled. A global MAC reset is issued to stop the
3724 * hardware, and all transmit and receive resources are freed.
3725 **/
3726static int e1000_close(struct net_device *netdev)
3727{
3728 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3729 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3730
3731 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3732
3733 pm_runtime_get_sync(&pdev->dev);
3734
3735 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3736 e1000e_down(adapter);
3737 e1000_free_irq(adapter);
3738 }
bc7f75fa 3739 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3740
3741 e1000e_free_tx_resources(adapter);
3742 e1000e_free_rx_resources(adapter);
3743
ad68076e
BA		 3744 /*
3745 * kill manageability vlan ID if supported, but not if a vlan with
3746 * the same ID is registered on the host OS (let 8021q kill it)
3747 */
86d70e53
JK		 3748 if (adapter->hw.mng_cookie.status &
3749 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
bc7f75fa
AK		 3750 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3751
ad68076e
BA		 3752 /*
3753 * If AMT is enabled, let the firmware know that the network
3754 * interface is now closed
3755 */
31dbe5b4
BA		 3756 if ((adapter->flags & FLAG_HAS_AMT) &&
3757 !test_bit(__E1000_TESTING, &adapter->state))
3758 e1000e_release_hw_control(adapter);
bc7f75fa 3759
828bac87
BA		 3760 if ((adapter->flags & FLAG_HAS_ERT) ||
3761 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014 3762 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
c128ec29 3763
23606cf5
RW		 3764 pm_runtime_put_sync(&pdev->dev);
3765
bc7f75fa
AK		 3766 return 0;
3767}
3768/**
3769 * e1000_set_mac - Change the Ethernet Address of the NIC
3770 * @netdev: network interface device structure
3771 * @p: pointer to an address structure
3772 *
3773 * Returns 0 on success, negative on failure
3774 **/
3775static int e1000_set_mac(struct net_device *netdev, void *p)
3776{
3777 struct e1000_adapter *adapter = netdev_priv(netdev);
3778 struct sockaddr *addr = p;
3779
3780 if (!is_valid_ether_addr(addr->sa_data))
3781 return -EADDRNOTAVAIL;
3782
3783 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3784 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3785
3786 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3787
3788 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3789 /* activate the work around */
3790 e1000e_set_laa_state_82571(&adapter->hw, 1);
3791
ad68076e
BA		 3792 /*
3793 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3794 * between the time RAR[0] gets clobbered and the time it
3795 * gets fixed (in e1000_watchdog), the actual LAA is in one
3796 * of the RARs and no incoming packets directed to this port
3797 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3798 * RAR[14]
3799 */
bc7f75fa
AK		 3800 e1000e_rar_set(&adapter->hw,
3801 adapter->hw.mac.addr,
3802 adapter->hw.mac.rar_entry_count - 1);
3803 }
3804
3805 return 0;
3806}
3807
a8f88ff5
JB		 3808/**
3809 * e1000e_update_phy_task - work thread to update phy
3810 * @work: pointer to our work struct
3811 *
3812 * this worker thread exists because we must acquire a
3813 * semaphore to read the phy, which we could msleep while
3814 * waiting for it, and we can't msleep in a timer.
3815 **/
3816static void e1000e_update_phy_task(struct work_struct *work)
3817{
3818 struct e1000_adapter *adapter = container_of(work,
3819 struct e1000_adapter, update_phy_task);
615b32af
JB		 3820
3821 if (test_bit(__E1000_DOWN, &adapter->state))
3822 return;
3823
a8f88ff5
JB		 3824 e1000_get_phy_info(&adapter->hw);
3825}
3826
ad68076e
BA		 3827/*
3828 * Need to wait a few seconds after link up to get diagnostic information from
3829 * the phy
3830 */
bc7f75fa
AK		 3831static void e1000_update_phy_info(unsigned long data)
3832{
3833 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
615b32af
JB		 3834
3835 if (test_bit(__E1000_DOWN, &adapter->state))
3836 return;
3837
a8f88ff5 3838 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3839}
3840
8c7bbb92
BA		 3841/**
3842 * e1000e_update_phy_stats - Update the PHY statistics counters
3843 * @adapter: board private structure
2b6b168d
BA		 3844 *
3845 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
8c7bbb92
BA		 3846 **/
3847static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3848{
3849 struct e1000_hw *hw = &adapter->hw;
3850 s32 ret_val;
3851 u16 phy_data;
3852
3853 ret_val = hw->phy.ops.acquire(hw);
3854 if (ret_val)
3855 return;
3856
8c7bbb92
BA		 3857 /*
3858 * A page set is expensive so check if already on desired page.
3859 * If not, set to the page with the PHY status registers.
3860 */
2b6b168d 3861 hw->phy.addr = 1;
8c7bbb92
BA		 3862 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3863 &phy_data);
3864 if (ret_val)
3865 goto release;
2b6b168d
BA		 3866 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
3867 ret_val = hw->phy.ops.set_page(hw,
3868 HV_STATS_PAGE << IGP_PAGE_SHIFT);
8c7bbb92
BA		 3869 if (ret_val)
3870 goto release;
3871 }
3872
8c7bbb92 3873 /* Single Collision Count */
2b6b168d
BA		 3874 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
3875 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
8c7bbb92
BA		 3876 if (!ret_val)
3877 adapter->stats.scc += phy_data;
3878
3879 /* Excessive Collision Count */
2b6b168d
BA		 3880 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
3881 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
8c7bbb92
BA		 3882 if (!ret_val)
3883 adapter->stats.ecol += phy_data;
3884
3885 /* Multiple Collision Count */
2b6b168d
BA		 3886 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
3887 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
8c7bbb92
BA		 3888 if (!ret_val)
3889 adapter->stats.mcc += phy_data;
3890
3891 /* Late Collision Count */
2b6b168d
BA		 3892 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
3893 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
8c7bbb92
BA		 3894 if (!ret_val)
3895 adapter->stats.latecol += phy_data;
3896
3897 /* Collision Count - also used for adaptive IFS */
2b6b168d
BA		 3898 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
3899 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
8c7bbb92
BA		 3900 if (!ret_val)
3901 hw->mac.collision_delta = phy_data;
3902
3903 /* Defer Count */
2b6b168d
BA		 3904 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
3905 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
8c7bbb92
BA		 3906 if (!ret_val)
3907 adapter->stats.dc += phy_data;
3908
3909 /* Transmit with no CRS */
2b6b168d
BA		 3910 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
3911 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
8c7bbb92
BA		 3912 if (!ret_val)
3913 adapter->stats.tncrs += phy_data;
3914
3915release:
3916 hw->phy.ops.release(hw);
3917}
3918
bc7f75fa
AK		 3919/**
3920 * e1000e_update_stats - Update the board statistics counters
3921 * @adapter: board private structure
3922 **/
67fd4fcb 3923static void e1000e_update_stats(struct e1000_adapter *adapter)
bc7f75fa 3924{
7274c20f 3925 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3926 struct e1000_hw *hw = &adapter->hw;
3927 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3928
3929 /*
3930 * Prevent stats update while adapter is being reset, or if the pci
3931 * connection is down.
3932 */
3933 if (adapter->link_speed == 0)
3934 return;
3935 if (pci_channel_offline(pdev))
3936 return;
3937
bc7f75fa
AK		 3938 adapter->stats.crcerrs += er32(CRCERRS);
3939 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3940 adapter->stats.gorc += er32(GORCL);
3941 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3942 adapter->stats.bprc += er32(BPRC);
3943 adapter->stats.mprc += er32(MPRC);
3944 adapter->stats.roc += er32(ROC);
3945
bc7f75fa 3946 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3947
3948 /* Half-duplex statistics */
3949 if (adapter->link_duplex == HALF_DUPLEX) {
3950 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3951 e1000e_update_phy_stats(adapter);
3952 } else {
3953 adapter->stats.scc += er32(SCC);
3954 adapter->stats.ecol += er32(ECOL);
3955 adapter->stats.mcc += er32(MCC);
3956 adapter->stats.latecol += er32(LATECOL);
3957 adapter->stats.dc += er32(DC);
3958
3959 hw->mac.collision_delta = er32(COLC);
3960
3961 if ((hw->mac.type != e1000_82574) &&
3962 (hw->mac.type != e1000_82583))
3963 adapter->stats.tncrs += er32(TNCRS);
3964 }
3965 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3966 }
8c7bbb92 3967
bc7f75fa
AK		 3968 adapter->stats.xonrxc += er32(XONRXC);
3969 adapter->stats.xontxc += er32(XONTXC);
3970 adapter->stats.xoffrxc += er32(XOFFRXC);
3971 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3972 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3973 adapter->stats.gotc += er32(GOTCL);
3974 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3975 adapter->stats.rnbc += er32(RNBC);
3976 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3977
3978 adapter->stats.mptc += er32(MPTC);
3979 adapter->stats.bptc += er32(BPTC);
3980
3981 /* used for adaptive IFS */
3982
3983 hw->mac.tx_packet_delta = er32(TPT);
3984 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3985
3986 adapter->stats.algnerrc += er32(ALGNERRC);
3987 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3988 adapter->stats.cexterr += er32(CEXTERR);
3989 adapter->stats.tsctc += er32(TSCTC);
3990 adapter->stats.tsctfc += er32(TSCTFC);
3991
bc7f75fa 3992 /* Fill out the OS statistics structure */
7274c20f
AK		 3993 netdev->stats.multicast = adapter->stats.mprc;
3994 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3995
3996 /* Rx Errors */
3997
ad68076e
BA		 3998 /*
3999 * RLEC on some newer hardware can be incorrect so build
4000 * our own version based on RUC and ROC
4001 */
7274c20f 4002 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 4003 adapter->stats.crcerrs + adapter->stats.algnerrc +
4004 adapter->stats.ruc + adapter->stats.roc +
4005 adapter->stats.cexterr;
7274c20f 4006 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 4007 adapter->stats.roc;
7274c20f
AK		 4008 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4009 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4010 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 4011
4012 /* Tx Errors */
7274c20f 4013 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 4014 adapter->stats.latecol;
7274c20f
AK		 4015 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4016 netdev->stats.tx_window_errors = adapter->stats.latecol;
4017 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 4018
4019 /* Tx Dropped needs to be maintained elsewhere */
4020
bc7f75fa
AK		 4021 /* Management Stats */
4022 adapter->stats.mgptc += er32(MGTPTC);
4023 adapter->stats.mgprc += er32(MGTPRC);
4024 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 4025}
4026
7c25769f
BA		 4027/**
4028 * e1000_phy_read_status - Update the PHY register status snapshot
4029 * @adapter: board private structure
4030 **/
4031static void e1000_phy_read_status(struct e1000_adapter *adapter)
4032{
4033 struct e1000_hw *hw = &adapter->hw;
4034 struct e1000_phy_regs *phy = &adapter->phy_regs;
7c25769f
BA		 4035
4036 if ((er32(STATUS) & E1000_STATUS_LU) &&
4037 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
90da0669
BA		 4038 int ret_val;
4039
7c25769f
BA		 4040 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4041 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4042 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4043 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4044 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4045 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4046 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4047 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4048 if (ret_val)
44defeb3 4049 e_warn("Error reading PHY register\n");
7c25769f
BA		 4050 } else {
4051 /*
4052 * Do not read PHY registers if link is not up
4053 * Set values to typical power-on defaults
4054 */
4055 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4056 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4057 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4058 BMSR_ERCAP);
4059 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4060 ADVERTISE_ALL | ADVERTISE_CSMA);
4061 phy->lpa = 0;
4062 phy->expansion = EXPANSION_ENABLENPAGE;
4063 phy->ctrl1000 = ADVERTISE_1000FULL;
4064 phy->stat1000 = 0;
4065 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4066 }
7c25769f
BA		 4067}
4068
bc7f75fa
AK		 4069static void e1000_print_link_info(struct e1000_adapter *adapter)
4070{
bc7f75fa
AK		 4071 struct e1000_hw *hw = &adapter->hw;
4072 u32 ctrl = er32(CTRL);
4073
8f12fe86
BA		 4074 /* Link status message must follow this format for user tools */
4075 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
4076 "Flow Control: %s\n",
4077 adapter->netdev->name,
44defeb3
JK		 4078 adapter->link_speed,
4079 (adapter->link_duplex == FULL_DUPLEX) ?
af667a29 4080 "Full Duplex" : "Half Duplex",
44defeb3 4081 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
af667a29
BA		 4082 "Rx/Tx" :
4083 ((ctrl & E1000_CTRL_RFCE) ? "Rx" :
4084 ((ctrl & E1000_CTRL_TFCE) ? "Tx" : "None")));
bc7f75fa
AK		 4085}
4086
0c6bdb30 4087static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 4088{
4089 struct e1000_hw *hw = &adapter->hw;
4090 bool link_active = 0;
4091 s32 ret_val = 0;
4092
4093 /*
4094 * get_link_status is set on LSC (link status) interrupt or
4095 * Rx sequence error interrupt. get_link_status will stay
4096 * false until the check_for_link establishes link
4097 * for copper adapters ONLY
4098 */
4099 switch (hw->phy.media_type) {
4100 case e1000_media_type_copper:
4101 if (hw->mac.get_link_status) {
4102 ret_val = hw->mac.ops.check_for_link(hw);
4103 link_active = !hw->mac.get_link_status;
4104 } else {
4105 link_active = 1;
4106 }
4107 break;
4108 case e1000_media_type_fiber:
4109 ret_val = hw->mac.ops.check_for_link(hw);
4110 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4111 break;
4112 case e1000_media_type_internal_serdes:
4113 ret_val = hw->mac.ops.check_for_link(hw);
4114 link_active = adapter->hw.mac.serdes_has_link;
4115 break;
4116 default:
4117 case e1000_media_type_unknown:
4118 break;
4119 }
4120
4121 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4122 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4123 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4124 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4125 }
4126
4127 return link_active;
4128}
4129
4130static void e1000e_enable_receives(struct e1000_adapter *adapter)
4131{
4132 /* make sure the receive unit is started */
4133 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4134 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4135 struct e1000_hw *hw = &adapter->hw;
4136 u32 rctl = er32(RCTL);
4137 ew32(RCTL, rctl | E1000_RCTL_EN);
4138 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4139 }
4140}
4141
ff10e13c
CW		 4142static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4143{
4144 struct e1000_hw *hw = &adapter->hw;
4145
4146 /*
4147 * With 82574 controllers, PHY needs to be checked periodically
4148 * for hung state and reset, if two calls return true
4149 */
4150 if (e1000_check_phy_82574(hw))
4151 adapter->phy_hang_count++;
4152 else
4153 adapter->phy_hang_count = 0;
4154
4155 if (adapter->phy_hang_count > 1) {
4156 adapter->phy_hang_count = 0;
4157 schedule_work(&adapter->reset_task);
4158 }
4159}
4160
bc7f75fa
AK		 4161/**
4162 * e1000_watchdog - Timer Call-back
4163 * @data: pointer to adapter cast into an unsigned long
4164 **/
4165static void e1000_watchdog(unsigned long data)
4166{
4167 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4168
4169 /* Do the rest outside of interrupt context */
4170 schedule_work(&adapter->watchdog_task);
4171
4172 /* TODO: make this use queue_delayed_work() */
4173}
4174
4175static void e1000_watchdog_task(struct work_struct *work)
4176{
4177 struct e1000_adapter *adapter = container_of(work,
4178 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4179 struct net_device *netdev = adapter->netdev;
4180 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4181 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4182 struct e1000_ring *tx_ring = adapter->tx_ring;
4183 struct e1000_hw *hw = &adapter->hw;
4184 u32 link, tctl;
bc7f75fa 4185
615b32af
JB		 4186 if (test_bit(__E1000_DOWN, &adapter->state))
4187 return;
4188
b405e8df 4189 link = e1000e_has_link(adapter);
318a94d6 4190 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4191 /* Cancel scheduled suspend requests. */
4192 pm_runtime_resume(netdev->dev.parent);
4193
318a94d6 4194 e1000e_enable_receives(adapter);
bc7f75fa 4195 goto link_up;
bc7f75fa
AK		 4196 }
4197
4198 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4199 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4200 e1000_update_mng_vlan(adapter);
4201
bc7f75fa
AK		 4202 if (link) {
4203 if (!netif_carrier_ok(netdev)) {
4204 bool txb2b = 1;
23606cf5
RW		 4205
4206 /* Cancel scheduled suspend requests. */
4207 pm_runtime_resume(netdev->dev.parent);
4208
318a94d6 4209 /* update snapshot of PHY registers on LSC */
7c25769f 4210 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4211 mac->ops.get_link_up_info(&adapter->hw,
4212 &adapter->link_speed,
4213 &adapter->link_duplex);
4214 e1000_print_link_info(adapter);
f4187b56
BA		 4215 /*
4216 * On supported PHYs, check for duplex mismatch only
4217 * if link has autonegotiated at 10/100 half
4218 */
4219 if ((hw->phy.type == e1000_phy_igp_3 ||
4220 hw->phy.type == e1000_phy_bm) &&
4221 (hw->mac.autoneg == true) &&
4222 (adapter->link_speed == SPEED_10 ||
4223 adapter->link_speed == SPEED_100) &&
4224 (adapter->link_duplex == HALF_DUPLEX)) {
4225 u16 autoneg_exp;
4226
4227 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4228
4229 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4230 e_info("Autonegotiated half duplex but"
4231 " link partner cannot autoneg. "
4232 " Try forcing full duplex if "
4233 "link gets many collisions.\n");
4234 }
4235
f49c57e1 4236 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4237 adapter->tx_timeout_factor = 1;
4238 switch (adapter->link_speed) {
4239 case SPEED_10:
4240 txb2b = 0;
10f1b492 4241 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4242 break;
4243 case SPEED_100:
4244 txb2b = 0;
4c86e0b9 4245 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4246 break;
4247 }
4248
ad68076e
BA		 4249 /*
4250 * workaround: re-program speed mode bit after
4251 * link-up event
4252 */
bc7f75fa
AK		 4253 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4254 !txb2b) {
4255 u32 tarc0;
e9ec2c0f 4256 tarc0 = er32(TARC(0));
bc7f75fa 4257 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4258 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4259 }
4260
ad68076e
BA		 4261 /*
4262 * disable TSO for pcie and 10/100 speeds, to avoid
4263 * some hardware issues
4264 */
bc7f75fa
AK		 4265 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4266 switch (adapter->link_speed) {
4267 case SPEED_10:
4268 case SPEED_100:
44defeb3 4269 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4270 netdev->features &= ~NETIF_F_TSO;
4271 netdev->features &= ~NETIF_F_TSO6;
4272 break;
4273 case SPEED_1000:
4274 netdev->features |= NETIF_F_TSO;
4275 netdev->features |= NETIF_F_TSO6;
4276 break;
4277 default:
4278 /* oops */
4279 break;
4280 }
4281 }
4282
ad68076e
BA		 4283 /*
4284 * enable transmits in the hardware, need to do this
4285 * after setting TARC(0)
4286 */
bc7f75fa
AK		 4287 tctl = er32(TCTL);
4288 tctl |= E1000_TCTL_EN;
4289 ew32(TCTL, tctl);
4290
75eb0fad
BA		 4291 /*
4292 * Perform any post-link-up configuration before
4293 * reporting link up.
4294 */
4295 if (phy->ops.cfg_on_link_up)
4296 phy->ops.cfg_on_link_up(hw);
4297
bc7f75fa 4298 netif_carrier_on(netdev);
bc7f75fa
AK		 4299
4300 if (!test_bit(__E1000_DOWN, &adapter->state))
4301 mod_timer(&adapter->phy_info_timer,
4302 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4303 }
4304 } else {
4305 if (netif_carrier_ok(netdev)) {
4306 adapter->link_speed = 0;
4307 adapter->link_duplex = 0;
8f12fe86
BA		 4308 /* Link status message must follow this format */
4309 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4310 adapter->netdev->name);
bc7f75fa 4311 netif_carrier_off(netdev);
bc7f75fa
AK		 4312 if (!test_bit(__E1000_DOWN, &adapter->state))
4313 mod_timer(&adapter->phy_info_timer,
4314 round_jiffies(jiffies + 2 * HZ));
4315
4316 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4317 schedule_work(&adapter->reset_task);
23606cf5
RW		 4318 else
4319 pm_schedule_suspend(netdev->dev.parent,
4320 LINK_TIMEOUT);
bc7f75fa
AK		 4321 }
4322 }
4323
4324link_up:
67fd4fcb 4325 spin_lock(&adapter->stats64_lock);
bc7f75fa
AK		 4326 e1000e_update_stats(adapter);
4327
4328 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4329 adapter->tpt_old = adapter->stats.tpt;
4330 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4331 adapter->colc_old = adapter->stats.colc;
4332
7c25769f
BA		 4333 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4334 adapter->gorc_old = adapter->stats.gorc;
4335 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4336 adapter->gotc_old = adapter->stats.gotc;
2084b114 4337 spin_unlock(&adapter->stats64_lock);
bc7f75fa
AK		 4338
4339 e1000e_update_adaptive(&adapter->hw);
4340
90da0669
BA		 4341 if (!netif_carrier_ok(netdev) &&
4342 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) {
4343 /*
4344 * We've lost link, so the controller stops DMA,
4345 * but we've got queued Tx work that's never going
4346 * to get done, so reset controller to flush Tx.
4347 * (Do the reset outside of interrupt context).
4348 */
90da0669
BA		 4349 schedule_work(&adapter->reset_task);
4350 /* return immediately since reset is imminent */
4351 return;
bc7f75fa
AK		 4352 }
4353
eab2abf5
JB		 4354 /* Simple mode for Interrupt Throttle Rate (ITR) */
4355 if (adapter->itr_setting == 4) {
4356 /*
4357 * Symmetric Tx/Rx gets a reduced ITR=2000;
4358 * Total asymmetrical Tx or Rx gets ITR=8000;
4359 * everyone else is between 2000-8000.
4360 */
4361 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4362 u32 dif = (adapter->gotc > adapter->gorc ?
4363 adapter->gotc - adapter->gorc :
4364 adapter->gorc - adapter->gotc) / 10000;
4365 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4366
4367 ew32(ITR, 1000000000 / (itr * 256));
4368 }
4369
ad68076e 4370 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4371 if (adapter->msix_entries)
4372 ew32(ICS, adapter->rx_ring->ims_val);
4373 else
4374 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa 4375
713b3c9e
JB		 4376 /* flush pending descriptors to memory before detecting Tx hang */
4377 e1000e_flush_descriptors(adapter);
4378
bc7f75fa
AK		 4379 /* Force detection of hung controller every watchdog period */
4380 adapter->detect_tx_hung = 1;
4381
ad68076e
BA		 4382 /*
4383 * With 82571 controllers, LAA may be overwritten due to controller
4384 * reset from the other port. Set the appropriate LAA in RAR[0]
4385 */
bc7f75fa
AK		 4386 if (e1000e_get_laa_state_82571(hw))
4387 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4388
ff10e13c
CW		 4389 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4390 e1000e_check_82574_phy_workaround(adapter);
4391
bc7f75fa
AK		 4392 /* Reset the timer */
4393 if (!test_bit(__E1000_DOWN, &adapter->state))
4394 mod_timer(&adapter->watchdog_timer,
4395 round_jiffies(jiffies + 2 * HZ));
4396}
4397
4398#define E1000_TX_FLAGS_CSUM 0x00000001
4399#define E1000_TX_FLAGS_VLAN 0x00000002
4400#define E1000_TX_FLAGS_TSO 0x00000004
4401#define E1000_TX_FLAGS_IPV4 0x00000008
4402#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4403#define E1000_TX_FLAGS_VLAN_SHIFT 16
4404
4405static int e1000_tso(struct e1000_adapter *adapter,
4406 struct sk_buff *skb)
4407{
4408 struct e1000_ring *tx_ring = adapter->tx_ring;
4409 struct e1000_context_desc *context_desc;
4410 struct e1000_buffer *buffer_info;
4411 unsigned int i;
4412 u32 cmd_length = 0;
4413 u16 ipcse = 0, tucse, mss;
4414 u8 ipcss, ipcso, tucss, tucso, hdr_len;
bc7f75fa 4415
3d5e33c9
BA		 4416 if (!skb_is_gso(skb))
4417 return 0;
bc7f75fa 4418
3d5e33c9 4419 if (skb_header_cloned(skb)) {
90da0669
BA		 4420 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4421
3d5e33c9
BA		 4422 if (err)
4423 return err;
bc7f75fa
AK		 4424 }
4425
3d5e33c9
BA		 4426 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4427 mss = skb_shinfo(skb)->gso_size;
4428 if (skb->protocol == htons(ETH_P_IP)) {
4429 struct iphdr *iph = ip_hdr(skb);
4430 iph->tot_len = 0;
4431 iph->check = 0;
4432 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4433 0, IPPROTO_TCP, 0);
4434 cmd_length = E1000_TXD_CMD_IP;
4435 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4436 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4437 ipv6_hdr(skb)->payload_len = 0;
4438 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4439 &ipv6_hdr(skb)->daddr,
4440 0, IPPROTO_TCP, 0);
4441 ipcse = 0;
4442 }
4443 ipcss = skb_network_offset(skb);
4444 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4445 tucss = skb_transport_offset(skb);
4446 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4447 tucse = 0;
4448
4449 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4450 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4451
4452 i = tx_ring->next_to_use;
4453 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4454 buffer_info = &tx_ring->buffer_info[i];
4455
4456 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4457 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4458 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4459 context_desc->upper_setup.tcp_fields.tucss = tucss;
4460 context_desc->upper_setup.tcp_fields.tucso = tucso;
4461 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4462 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4463 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4464 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4465
4466 buffer_info->time_stamp = jiffies;
4467 buffer_info->next_to_watch = i;
4468
4469 i++;
4470 if (i == tx_ring->count)
4471 i = 0;
4472 tx_ring->next_to_use = i;
4473
4474 return 1;
bc7f75fa
AK		 4475}
4476
4477static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4478{
4479 struct e1000_ring *tx_ring = adapter->tx_ring;
4480 struct e1000_context_desc *context_desc;
4481 struct e1000_buffer *buffer_info;
4482 unsigned int i;
4483 u8 css;
af807c82 4484 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4485 __be16 protocol;
bc7f75fa 4486
af807c82
DG		 4487 if (skb->ip_summed != CHECKSUM_PARTIAL)
4488 return 0;
bc7f75fa 4489
5f66f208
AJ		 4490 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4491 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4492 else
4493 protocol = skb->protocol;
4494
3f518390 4495 switch (protocol) {
09640e63 4496 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4497 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4498 cmd_len |= E1000_TXD_CMD_TCP;
4499 break;
09640e63 4500 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4501 /* XXX not handling all IPV6 headers */
4502 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4503 cmd_len |= E1000_TXD_CMD_TCP;
4504 break;
4505 default:
4506 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4507 e_warn("checksum_partial proto=%x!\n",
4508 be16_to_cpu(protocol));
af807c82 4509 break;
bc7f75fa
AK		 4510 }
4511
0d0b1672 4512 css = skb_checksum_start_offset(skb);
af807c82
DG		 4513
4514 i = tx_ring->next_to_use;
4515 buffer_info = &tx_ring->buffer_info[i];
4516 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4517
4518 context_desc->lower_setup.ip_config = 0;
4519 context_desc->upper_setup.tcp_fields.tucss = css;
4520 context_desc->upper_setup.tcp_fields.tucso =
4521 css + skb->csum_offset;
4522 context_desc->upper_setup.tcp_fields.tucse = 0;
4523 context_desc->tcp_seg_setup.data = 0;
4524 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4525
4526 buffer_info->time_stamp = jiffies;
4527 buffer_info->next_to_watch = i;
4528
4529 i++;
4530 if (i == tx_ring->count)
4531 i = 0;
4532 tx_ring->next_to_use = i;
4533
4534 return 1;
bc7f75fa
AK		 4535}
4536
4537#define E1000_MAX_PER_TXD 8192
4538#define E1000_MAX_TXD_PWR 12
4539
4540static int e1000_tx_map(struct e1000_adapter *adapter,
4541 struct sk_buff *skb, unsigned int first,
4542 unsigned int max_per_txd, unsigned int nr_frags,
4543 unsigned int mss)
4544{
4545 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4546 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4547 struct e1000_buffer *buffer_info;
8ddc951c 4548 unsigned int len = skb_headlen(skb);
03b1320d 4549 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4550 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4551
4552 i = tx_ring->next_to_use;
4553
4554 while (len) {
1b7719c4 4555 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4556 size = min(len, max_per_txd);
4557
bc7f75fa 4558 buffer_info->length = size;
bc7f75fa 4559 buffer_info->time_stamp = jiffies;
bc7f75fa 4560 buffer_info->next_to_watch = i;
0be3f55f
NN		 4561 buffer_info->dma = dma_map_single(&pdev->dev,
4562 skb->data + offset,
af667a29 4563 size, DMA_TO_DEVICE);
03b1320d 4564 buffer_info->mapped_as_page = false;
0be3f55f 4565 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4566 goto dma_error;
bc7f75fa
AK		 4567
4568 len -= size;
4569 offset += size;
03b1320d 4570 count++;
1b7719c4
AD		 4571
4572 if (len) {
4573 i++;
4574 if (i == tx_ring->count)
4575 i = 0;
4576 }
bc7f75fa
AK		 4577 }
4578
4579 for (f = 0; f < nr_frags; f++) {
4580 struct skb_frag_struct *frag;
4581
4582 frag = &skb_shinfo(skb)->frags[f];
4583 len = frag->size;
03b1320d 4584 offset = frag->page_offset;
bc7f75fa
AK		 4585
4586 while (len) {
1b7719c4
AD		 4587 i++;
4588 if (i == tx_ring->count)
4589 i = 0;
4590
bc7f75fa
AK		 4591 buffer_info = &tx_ring->buffer_info[i];
4592 size = min(len, max_per_txd);
bc7f75fa
AK		 4593
4594 buffer_info->length = size;
4595 buffer_info->time_stamp = jiffies;
bc7f75fa 4596 buffer_info->next_to_watch = i;
0be3f55f 4597 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4598 offset, size,
0be3f55f 4599 DMA_TO_DEVICE);
03b1320d 4600 buffer_info->mapped_as_page = true;
0be3f55f 4601 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4602 goto dma_error;
bc7f75fa
AK		 4603
4604 len -= size;
4605 offset += size;
4606 count++;
bc7f75fa
AK		 4607 }
4608 }
4609
af667a29 4610 segs = skb_shinfo(skb)->gso_segs ? : 1;
9ed318d5
TH		 4611 /* multiply data chunks by size of headers */
4612 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4613
bc7f75fa 4614 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4615 tx_ring->buffer_info[i].segs = segs;
4616 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4617 tx_ring->buffer_info[first].next_to_watch = i;
4618
4619 return count;
03b1320d
AD		 4620
4621dma_error:
af667a29 4622 dev_err(&pdev->dev, "Tx DMA map failed\n");
03b1320d 4623 buffer_info->dma = 0;
c1fa347f 4624 if (count)
03b1320d 4625 count--;
c1fa347f
RK		 4626
4627 while (count--) {
af667a29 4628 if (i == 0)
03b1320d 4629 i += tx_ring->count;
c1fa347f 4630 i--;
03b1320d 4631 buffer_info = &tx_ring->buffer_info[i];
1d51c418 4632 e1000_put_txbuf(adapter, buffer_info);
03b1320d
AD		 4633 }
4634
4635 return 0;
bc7f75fa
AK		 4636}
4637
4638static void e1000_tx_queue(struct e1000_adapter *adapter,
4639 int tx_flags, int count)
4640{
4641 struct e1000_ring *tx_ring = adapter->tx_ring;
4642 struct e1000_tx_desc *tx_desc = NULL;
4643 struct e1000_buffer *buffer_info;
4644 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4645 unsigned int i;
4646
4647 if (tx_flags & E1000_TX_FLAGS_TSO) {
4648 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4649 E1000_TXD_CMD_TSE;
4650 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4651
4652 if (tx_flags & E1000_TX_FLAGS_IPV4)
4653 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4654 }
4655
4656 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4657 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4658 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4659 }
4660
4661 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4662 txd_lower |= E1000_TXD_CMD_VLE;
4663 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4664 }
4665
4666 i = tx_ring->next_to_use;
4667
36b973df 4668 do {
bc7f75fa
AK		 4669 buffer_info = &tx_ring->buffer_info[i];
4670 tx_desc = E1000_TX_DESC(*tx_ring, i);
4671 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4672 tx_desc->lower.data =
4673 cpu_to_le32(txd_lower | buffer_info->length);
4674 tx_desc->upper.data = cpu_to_le32(txd_upper);
4675
4676 i++;
4677 if (i == tx_ring->count)
4678 i = 0;
36b973df 4679 } while (--count > 0);
bc7f75fa
AK		 4680
4681 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4682
ad68076e
BA		 4683 /*
4684 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4685 * know there are new descriptors to fetch. (Only
4686 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4687 * such as IA-64).
4688 */
bc7f75fa
AK		 4689 wmb();
4690
4691 tx_ring->next_to_use = i;
4692 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4693 /*
4694 * we need this if more than one processor can write to our tail
4695 * at a time, it synchronizes IO on IA64/Altix systems
4696 */
bc7f75fa
AK		 4697 mmiowb();
4698}
4699
4700#define MINIMUM_DHCP_PACKET_SIZE 282
4701static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4702 struct sk_buff *skb)
4703{
4704 struct e1000_hw *hw = &adapter->hw;
4705 u16 length, offset;
4706
4707 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4708 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4709 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4710 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4711 return 0;
4712 }
4713
4714 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4715 return 0;
4716
4717 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4718 return 0;
4719
4720 {
4721 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4722 struct udphdr *udp;
4723
4724 if (ip->protocol != IPPROTO_UDP)
4725 return 0;
4726
4727 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4728 if (ntohs(udp->dest) != 67)
4729 return 0;
4730
4731 offset = (u8 *)udp + 8 - skb->data;
4732 length = skb->len - offset;
4733 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4734 }
4735
4736 return 0;
4737}
4738
4739static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4740{
4741 struct e1000_adapter *adapter = netdev_priv(netdev);
4742
4743 netif_stop_queue(netdev);
ad68076e
BA		 4744 /*
4745 * Herbert's original patch had:
bc7f75fa 4746 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4747 * but since that doesn't exist yet, just open code it.
4748 */
bc7f75fa
AK		 4749 smp_mb();
4750
ad68076e
BA		 4751 /*
4752 * We need to check again in a case another CPU has just
4753 * made room available.
4754 */
bc7f75fa
AK		 4755 if (e1000_desc_unused(adapter->tx_ring) < size)
4756 return -EBUSY;
4757
4758 /* A reprieve! */
4759 netif_start_queue(netdev);
4760 ++adapter->restart_queue;
4761 return 0;
4762}
4763
4764static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4765{
4766 struct e1000_adapter *adapter = netdev_priv(netdev);
4767
4768 if (e1000_desc_unused(adapter->tx_ring) >= size)
4769 return 0;
4770 return __e1000_maybe_stop_tx(netdev, size);
4771}
4772
4773#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4774static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4775 struct net_device *netdev)
bc7f75fa
AK		 4776{
4777 struct e1000_adapter *adapter = netdev_priv(netdev);
4778 struct e1000_ring *tx_ring = adapter->tx_ring;
4779 unsigned int first;
4780 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4781 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4782 unsigned int tx_flags = 0;
e743d313 4783 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4784 unsigned int nr_frags;
4785 unsigned int mss;
bc7f75fa
AK		 4786 int count = 0;
4787 int tso;
4788 unsigned int f;
bc7f75fa
AK		 4789
4790 if (test_bit(__E1000_DOWN, &adapter->state)) {
4791 dev_kfree_skb_any(skb);
4792 return NETDEV_TX_OK;
4793 }
4794
4795 if (skb->len <= 0) {
4796 dev_kfree_skb_any(skb);
4797 return NETDEV_TX_OK;
4798 }
4799
4800 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4801 /*
4802 * The controller does a simple calculation to
bc7f75fa
AK		 4803 * make sure there is enough room in the FIFO before
4804 * initiating the DMA for each buffer. The calc is:
4805 * 4 = ceil(buffer len/mss). To make sure we don't
4806 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4807 * drops.
4808 */
bc7f75fa
AK		 4809 if (mss) {
4810 u8 hdr_len;
4811 max_per_txd = min(mss << 2, max_per_txd);
4812 max_txd_pwr = fls(max_per_txd) - 1;
4813
ad68076e
BA		 4814 /*
4815 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4816 * points to just header, pull a few bytes of payload from
4817 * frags into skb->data
4818 */
bc7f75fa 4819 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4820 /*
4821 * we do this workaround for ES2LAN, but it is un-necessary,
4822 * avoiding it could save a lot of cycles
4823 */
4e6c709c 4824 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4825 unsigned int pull_size;
4826
4827 pull_size = min((unsigned int)4, skb->data_len);
4828 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4829 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4830 dev_kfree_skb_any(skb);
4831 return NETDEV_TX_OK;
4832 }
e743d313 4833 len = skb_headlen(skb);
bc7f75fa
AK		 4834 }
4835 }
4836
4837 /* reserve a descriptor for the offload context */
4838 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4839 count++;
4840 count++;
4841
4842 count += TXD_USE_COUNT(len, max_txd_pwr);
4843
4844 nr_frags = skb_shinfo(skb)->nr_frags;
4845 for (f = 0; f < nr_frags; f++)
4846 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4847 max_txd_pwr);
4848
4849 if (adapter->hw.mac.tx_pkt_filtering)
4850 e1000_transfer_dhcp_info(adapter, skb);
4851
ad68076e
BA		 4852 /*
4853 * need: count + 2 desc gap to keep tail from touching
4854 * head, otherwise try next time
4855 */
92af3e95 4856 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4857 return NETDEV_TX_BUSY;
bc7f75fa 4858
eab6d18d 4859 if (vlan_tx_tag_present(skb)) {
bc7f75fa
AK		 4860 tx_flags |= E1000_TX_FLAGS_VLAN;
4861 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4862 }
4863
4864 first = tx_ring->next_to_use;
4865
4866 tso = e1000_tso(adapter, skb);
4867 if (tso < 0) {
4868 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4869 return NETDEV_TX_OK;
4870 }
4871
4872 if (tso)
4873 tx_flags |= E1000_TX_FLAGS_TSO;
4874 else if (e1000_tx_csum(adapter, skb))
4875 tx_flags |= E1000_TX_FLAGS_CSUM;
4876
ad68076e
BA		 4877 /*
4878 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4879 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4880 * no longer assume, we must.
4881 */
bc7f75fa
AK		 4882 if (skb->protocol == htons(ETH_P_IP))
4883 tx_flags |= E1000_TX_FLAGS_IPV4;
4884
25985edc 4885 /* if count is 0 then mapping error has occurred */
bc7f75fa 4886 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4887 if (count) {
4888 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4889 /* Make sure there is space in the ring for the next send. */
4890 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4891
4892 } else {
bc7f75fa 4893 dev_kfree_skb_any(skb);
1b7719c4
AD		 4894 tx_ring->buffer_info[first].time_stamp = 0;
4895 tx_ring->next_to_use = first;
bc7f75fa
AK		 4896 }
4897
bc7f75fa
AK		 4898 return NETDEV_TX_OK;
4899}
4900
4901/**
4902 * e1000_tx_timeout - Respond to a Tx Hang
4903 * @netdev: network interface device structure
4904 **/
4905static void e1000_tx_timeout(struct net_device *netdev)
4906{
4907 struct e1000_adapter *adapter = netdev_priv(netdev);
4908
4909 /* Do the reset outside of interrupt context */
4910 adapter->tx_timeout_count++;
4911 schedule_work(&adapter->reset_task);
4912}
4913
4914static void e1000_reset_task(struct work_struct *work)
4915{
4916 struct e1000_adapter *adapter;
4917 adapter = container_of(work, struct e1000_adapter, reset_task);
4918
615b32af
JB		 4919 /* don't run the task if already down */
4920 if (test_bit(__E1000_DOWN, &adapter->state))
4921 return;
4922
affa9dfb
CW		 4923 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4924 (adapter->flags & FLAG_RX_RESTART_NOW))) {
4925 e1000e_dump(adapter);
4926 e_err("Reset adapter\n");
4927 }
bc7f75fa
AK		 4928 e1000e_reinit_locked(adapter);
4929}
4930
4931/**
67fd4fcb 4932 * e1000_get_stats64 - Get System Network Statistics
bc7f75fa 4933 * @netdev: network interface device structure
67fd4fcb 4934 * @stats: rtnl_link_stats64 pointer
bc7f75fa
AK		 4935 *
4936 * Returns the address of the device statistics structure.
bc7f75fa 4937 **/
67fd4fcb
JK		 4938struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
4939 struct rtnl_link_stats64 *stats)
bc7f75fa 4940{
67fd4fcb
JK		 4941 struct e1000_adapter *adapter = netdev_priv(netdev);
4942
4943 memset(stats, 0, sizeof(struct rtnl_link_stats64));
4944 spin_lock(&adapter->stats64_lock);
4945 e1000e_update_stats(adapter);
4946 /* Fill out the OS statistics structure */
4947 stats->rx_bytes = adapter->stats.gorc;
4948 stats->rx_packets = adapter->stats.gprc;
4949 stats->tx_bytes = adapter->stats.gotc;
4950 stats->tx_packets = adapter->stats.gptc;
4951 stats->multicast = adapter->stats.mprc;
4952 stats->collisions = adapter->stats.colc;
4953
4954 /* Rx Errors */
4955
4956 /*
4957 * RLEC on some newer hardware can be incorrect so build
4958 * our own version based on RUC and ROC
4959 */
4960 stats->rx_errors = adapter->stats.rxerrc +
4961 adapter->stats.crcerrs + adapter->stats.algnerrc +
4962 adapter->stats.ruc + adapter->stats.roc +
4963 adapter->stats.cexterr;
4964 stats->rx_length_errors = adapter->stats.ruc +
4965 adapter->stats.roc;
4966 stats->rx_crc_errors = adapter->stats.crcerrs;
4967 stats->rx_frame_errors = adapter->stats.algnerrc;
4968 stats->rx_missed_errors = adapter->stats.mpc;
4969
4970 /* Tx Errors */
4971 stats->tx_errors = adapter->stats.ecol +
4972 adapter->stats.latecol;
4973 stats->tx_aborted_errors = adapter->stats.ecol;
4974 stats->tx_window_errors = adapter->stats.latecol;
4975 stats->tx_carrier_errors = adapter->stats.tncrs;
4976
4977 /* Tx Dropped needs to be maintained elsewhere */
4978
4979 spin_unlock(&adapter->stats64_lock);
4980 return stats;
bc7f75fa
AK		 4981}
4982
4983/**
4984 * e1000_change_mtu - Change the Maximum Transfer Unit
4985 * @netdev: network interface device structure
4986 * @new_mtu: new value for maximum frame size
4987 *
4988 * Returns 0 on success, negative on failure
4989 **/
4990static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4991{
4992 struct e1000_adapter *adapter = netdev_priv(netdev);
4993 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4994
2adc55c9
BA		 4995 /* Jumbo frame support */
4996 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4997 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4998 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4999 return -EINVAL;
5000 }
5001
2adc55c9
BA		 5002 /* Supported frame sizes */
5003 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5004 (max_frame > adapter->max_hw_frame_size)) {
5005 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 5006 return -EINVAL;
5007 }
5008
a1ce6473
BA		 5009 /* Jumbo frame workaround on 82579 requires CRC be stripped */
5010 if ((adapter->hw.mac.type == e1000_pch2lan) &&
5011 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5012 (new_mtu > ETH_DATA_LEN)) {
5013 e_err("Jumbo Frames not supported on 82579 when CRC "
5014 "stripping is disabled.\n");
5015 return -EINVAL;
5016 }
5017
6f461f6c
BA		 5018 /* 82573 Errata 17 */
5019 if (((adapter->hw.mac.type == e1000_82573) ||
5020 (adapter->hw.mac.type == e1000_82574)) &&
5021 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
5022 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
5023 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
5024 }
5025
bc7f75fa 5026 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 5027 usleep_range(1000, 2000);
610c9928 5028 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 5029 adapter->max_frame_size = max_frame;
610c9928
BA		 5030 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5031 netdev->mtu = new_mtu;
bc7f75fa
AK		 5032 if (netif_running(netdev))
5033 e1000e_down(adapter);
5034
ad68076e
BA		 5035 /*
5036 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 5037 * means we reserve 2 more, this pushes us to allocate from the next
5038 * larger slab size.
ad68076e 5039 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 5040 * However with the new *_jumbo_rx* routines, jumbo receives will use
5041 * fragmented skbs
ad68076e 5042 */
bc7f75fa 5043
9926146b 5044 if (max_frame <= 2048)
bc7f75fa
AK		 5045 adapter->rx_buffer_len = 2048;
5046 else
5047 adapter->rx_buffer_len = 4096;
5048
5049 /* adjust allocation if LPE protects us, and we aren't using SBP */
5050 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5051 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5052 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 5053 + ETH_FCS_LEN;
bc7f75fa 5054
bc7f75fa
AK		 5055 if (netif_running(netdev))
5056 e1000e_up(adapter);
5057 else
5058 e1000e_reset(adapter);
5059
5060 clear_bit(__E1000_RESETTING, &adapter->state);
5061
5062 return 0;
5063}
5064
5065static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5066 int cmd)
5067{
5068 struct e1000_adapter *adapter = netdev_priv(netdev);
5069 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 5070
318a94d6 5071 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 5072 return -EOPNOTSUPP;
5073
5074 switch (cmd) {
5075 case SIOCGMIIPHY:
5076 data->phy_id = adapter->hw.phy.addr;
5077 break;
5078 case SIOCGMIIREG:
b16a002e
BA		 5079 e1000_phy_read_status(adapter);
5080
7c25769f
BA		 5081 switch (data->reg_num & 0x1F) {
5082 case MII_BMCR:
5083 data->val_out = adapter->phy_regs.bmcr;
5084 break;
5085 case MII_BMSR:
5086 data->val_out = adapter->phy_regs.bmsr;
5087 break;
5088 case MII_PHYSID1:
5089 data->val_out = (adapter->hw.phy.id >> 16);
5090 break;
5091 case MII_PHYSID2:
5092 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5093 break;
5094 case MII_ADVERTISE:
5095 data->val_out = adapter->phy_regs.advertise;
5096 break;
5097 case MII_LPA:
5098 data->val_out = adapter->phy_regs.lpa;
5099 break;
5100 case MII_EXPANSION:
5101 data->val_out = adapter->phy_regs.expansion;
5102 break;
5103 case MII_CTRL1000:
5104 data->val_out = adapter->phy_regs.ctrl1000;
5105 break;
5106 case MII_STAT1000:
5107 data->val_out = adapter->phy_regs.stat1000;
5108 break;
5109 case MII_ESTATUS:
5110 data->val_out = adapter->phy_regs.estatus;
5111 break;
5112 default:
bc7f75fa
AK		 5113 return -EIO;
5114 }
bc7f75fa
AK		 5115 break;
5116 case SIOCSMIIREG:
5117 default:
5118 return -EOPNOTSUPP;
5119 }
5120 return 0;
5121}
5122
5123static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5124{
5125 switch (cmd) {
5126 case SIOCGMIIPHY:
5127 case SIOCGMIIREG:
5128 case SIOCSMIIREG:
5129 return e1000_mii_ioctl(netdev, ifr, cmd);
5130 default:
5131 return -EOPNOTSUPP;
5132 }
5133}
5134
a4f58f54
BA		 5135static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5136{
5137 struct e1000_hw *hw = &adapter->hw;
5138 u32 i, mac_reg;
2b6b168d 5139 u16 phy_reg, wuc_enable;
a4f58f54
BA		 5140 int retval = 0;
5141
5142 /* copy MAC RARs to PHY RARs */
d3738bb8 5143 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54 5144
2b6b168d
BA		 5145 retval = hw->phy.ops.acquire(hw);
5146 if (retval) {
5147 e_err("Could not acquire PHY\n");
5148 return retval;
5149 }
5150
5151 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
5152 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5153 if (retval)
5154 goto out;
5155
5156 /* copy MAC MTA to PHY MTA - only needed for pchlan */
a4f58f54
BA		 5157 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5158 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
2b6b168d
BA		 5159 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
5160 (u16)(mac_reg & 0xFFFF));
5161 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
5162 (u16)((mac_reg >> 16) & 0xFFFF));
a4f58f54
BA		 5163 }
5164
5165 /* configure PHY Rx Control register */
2b6b168d 5166 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
a4f58f54
BA		 5167 mac_reg = er32(RCTL);
5168 if (mac_reg & E1000_RCTL_UPE)
5169 phy_reg |= BM_RCTL_UPE;
5170 if (mac_reg & E1000_RCTL_MPE)
5171 phy_reg |= BM_RCTL_MPE;
5172 phy_reg &= ~(BM_RCTL_MO_MASK);
5173 if (mac_reg & E1000_RCTL_MO_3)
5174 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5175 << BM_RCTL_MO_SHIFT);
5176 if (mac_reg & E1000_RCTL_BAM)
5177 phy_reg |= BM_RCTL_BAM;
5178 if (mac_reg & E1000_RCTL_PMCF)
5179 phy_reg |= BM_RCTL_PMCF;
5180 mac_reg = er32(CTRL);
5181 if (mac_reg & E1000_CTRL_RFCE)
5182 phy_reg |= BM_RCTL_RFCE;
2b6b168d 5183 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
a4f58f54
BA		 5184
5185 /* enable PHY wakeup in MAC register */
5186 ew32(WUFC, wufc);
5187 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5188
5189 /* configure and enable PHY wakeup in PHY registers */
2b6b168d
BA		 5190 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
5191 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
a4f58f54
BA		 5192
5193 /* activate PHY wakeup */
2b6b168d
BA		 5194 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5195 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
a4f58f54
BA		 5196 if (retval)
5197 e_err("Could not set PHY Host Wakeup bit\n");
5198out:
94d8186a 5199 hw->phy.ops.release(hw);
a4f58f54
BA		 5200
5201 return retval;
5202}
5203
23606cf5
RW		 5204static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5205 bool runtime)
bc7f75fa
AK		 5206{
5207 struct net_device *netdev = pci_get_drvdata(pdev);
5208 struct e1000_adapter *adapter = netdev_priv(netdev);
5209 struct e1000_hw *hw = &adapter->hw;
5210 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5211 /* Runtime suspend should only enable wakeup for link changes */
5212 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5213 int retval = 0;
5214
5215 netif_device_detach(netdev);
5216
5217 if (netif_running(netdev)) {
5218 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5219 e1000e_down(adapter);
5220 e1000_free_irq(adapter);
5221 }
4662e82b 5222 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5223
5224 retval = pci_save_state(pdev);
5225 if (retval)
5226 return retval;
5227
5228 status = er32(STATUS);
5229 if (status & E1000_STATUS_LU)
5230 wufc &= ~E1000_WUFC_LNKC;
5231
5232 if (wufc) {
5233 e1000_setup_rctl(adapter);
5234 e1000_set_multi(netdev);
5235
5236 /* turn on all-multi mode if wake on multicast is enabled */
5237 if (wufc & E1000_WUFC_MC) {
5238 rctl = er32(RCTL);
5239 rctl |= E1000_RCTL_MPE;
5240 ew32(RCTL, rctl);
5241 }
5242
5243 ctrl = er32(CTRL);
5244 /* advertise wake from D3Cold */
5245 #define E1000_CTRL_ADVD3WUC 0x00100000
5246 /* phy power management enable */
5247 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5248 ctrl |= E1000_CTRL_ADVD3WUC;
5249 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5250 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5251 ew32(CTRL, ctrl);
5252
318a94d6
JK		 5253 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5254 adapter->hw.phy.media_type ==
5255 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5256 /* keep the laser running in D3 */
5257 ctrl_ext = er32(CTRL_EXT);
93a23f48 5258 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5259 ew32(CTRL_EXT, ctrl_ext);
5260 }
5261
97ac8cae 5262 if (adapter->flags & FLAG_IS_ICH)
99730e4c 5263 e1000_suspend_workarounds_ich8lan(&adapter->hw);
97ac8cae 5264
bc7f75fa
AK		 5265 /* Allow time for pending master requests to run */
5266 e1000e_disable_pcie_master(&adapter->hw);
5267
82776a4b 5268 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5269 /* enable wakeup by the PHY */
5270 retval = e1000_init_phy_wakeup(adapter, wufc);
5271 if (retval)
5272 return retval;
5273 } else {
5274 /* enable wakeup by the MAC */
5275 ew32(WUFC, wufc);
5276 ew32(WUC, E1000_WUC_PME_EN);
5277 }
bc7f75fa
AK		 5278 } else {
5279 ew32(WUC, 0);
5280 ew32(WUFC, 0);
bc7f75fa
AK		 5281 }
5282
4f9de721
RW		 5283 *enable_wake = !!wufc;
5284
bc7f75fa 5285 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5286 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5287 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5288 *enable_wake = true;
bc7f75fa
AK		 5289
5290 if (adapter->hw.phy.type == e1000_phy_igp_3)
5291 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5292
ad68076e
BA		 5293 /*
5294 * Release control of h/w to f/w. If f/w is AMT enabled, this
5295 * would have already happened in close and is redundant.
5296 */
31dbe5b4 5297 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 5298
5299 pci_disable_device(pdev);
5300
4f9de721
RW		 5301 return 0;
5302}
5303
5304static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5305{
5306 if (sleep && wake) {
5307 pci_prepare_to_sleep(pdev);
5308 return;
5309 }
5310
5311 pci_wake_from_d3(pdev, wake);
5312 pci_set_power_state(pdev, PCI_D3hot);
5313}
5314
5315static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5316 bool wake)
5317{
5318 struct net_device *netdev = pci_get_drvdata(pdev);
5319 struct e1000_adapter *adapter = netdev_priv(netdev);
5320
005cbdfc
AD		 5321 /*
5322 * The pci-e switch on some quad port adapters will report a
5323 * correctable error when the MAC transitions from D0 to D3. To
5324 * prevent this we need to mask off the correctable errors on the
5325 * downstream port of the pci-e switch.
5326 */
5327 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5328 struct pci_dev *us_dev = pdev->bus->self;
353064de 5329 int pos = pci_pcie_cap(us_dev);
005cbdfc
AD		 5330 u16 devctl;
5331
5332 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5333 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5334 (devctl & ~PCI_EXP_DEVCTL_CERE));
5335
4f9de721 5336 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5337
5338 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5339 } else {
4f9de721 5340 e1000_power_off(pdev, sleep, wake);
005cbdfc 5341 }
bc7f75fa
AK		 5342}
5343
6f461f6c
BA		 5344#ifdef CONFIG_PCIEASPM
5345static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5346{
9f728f53 5347 pci_disable_link_state_locked(pdev, state);
6f461f6c
BA		 5348}
5349#else
5350static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5351{
5352 int pos;
6f461f6c 5353 u16 reg16;
1eae4eb2
AK		 5354
5355 /*
6f461f6c
BA		 5356 * Both device and parent should have the same ASPM setting.
5357 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5358 */
6f461f6c
BA		 5359 pos = pci_pcie_cap(pdev);
5360 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5361 reg16 &= ~state;
5362 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5363
0c75ba22
AB		 5364 if (!pdev->bus->self)
5365 return;
5366
6f461f6c
BA		 5367 pos = pci_pcie_cap(pdev->bus->self);
5368 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5369 reg16 &= ~state;
5370 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5371}
5372#endif
78cd29d5 5373static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6f461f6c
BA		 5374{
5375 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5376 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5377 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5378
5379 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5380}
5381
aa338601 5382#ifdef CONFIG_PM
23606cf5 5383static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5384{
23606cf5 5385 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5386}
5387
23606cf5 5388static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5389{
5390 struct net_device *netdev = pci_get_drvdata(pdev);
5391 struct e1000_adapter *adapter = netdev_priv(netdev);
5392 struct e1000_hw *hw = &adapter->hw;
78cd29d5 5393 u16 aspm_disable_flag = 0;
bc7f75fa
AK		 5394 u32 err;
5395
78cd29d5
BA		 5396 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5397 aspm_disable_flag = PCIE_LINK_STATE_L0S;
5398 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5399 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5400 if (aspm_disable_flag)
5401 e1000e_disable_aspm(pdev, aspm_disable_flag);
5402
bc7f75fa
AK		 5403 pci_set_power_state(pdev, PCI_D0);
5404 pci_restore_state(pdev);
28b8f04a 5405 pci_save_state(pdev);
6e4f6f6b 5406
4662e82b 5407 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5408 if (netif_running(netdev)) {
5409 err = e1000_request_irq(adapter);
5410 if (err)
5411 return err;
5412 }
5413
99730e4c
BA		 5414 if (hw->mac.type == e1000_pch2lan)
5415 e1000_resume_workarounds_pchlan(&adapter->hw);
5416
bc7f75fa 5417 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5418
5419 /* report the system wakeup cause from S3/S4 */
5420 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5421 u16 phy_data;
5422
5423 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5424 if (phy_data) {
5425 e_info("PHY Wakeup cause - %s\n",
5426 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5427 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5428 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5429 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5430 phy_data & E1000_WUS_LNKC ? "Link Status "
5431 " Change" : "other");
5432 }
5433 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5434 } else {
5435 u32 wus = er32(WUS);
5436 if (wus) {
5437 e_info("MAC Wakeup cause - %s\n",
5438 wus & E1000_WUS_EX ? "Unicast Packet" :
5439 wus & E1000_WUS_MC ? "Multicast Packet" :
5440 wus & E1000_WUS_BC ? "Broadcast Packet" :
5441 wus & E1000_WUS_MAG ? "Magic Packet" :
5442 wus & E1000_WUS_LNKC ? "Link Status Change" :
5443 "other");
5444 }
5445 ew32(WUS, ~0);
5446 }
5447
bc7f75fa 5448 e1000e_reset(adapter);
bc7f75fa 5449
cd791618 5450 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5451
5452 if (netif_running(netdev))
5453 e1000e_up(adapter);
5454
5455 netif_device_attach(netdev);
5456
ad68076e
BA		 5457 /*
5458 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5459 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5460 * under the control of the driver.
5461 */
c43bc57e 5462 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5463 e1000e_get_hw_control(adapter);
bc7f75fa
AK		 5464
5465 return 0;
5466}
23606cf5 5467
a0340162
RW		 5468#ifdef CONFIG_PM_SLEEP
5469static int e1000_suspend(struct device *dev)
5470{
5471 struct pci_dev *pdev = to_pci_dev(dev);
5472 int retval;
5473 bool wake;
5474
5475 retval = __e1000_shutdown(pdev, &wake, false);
5476 if (!retval)
5477 e1000_complete_shutdown(pdev, true, wake);
5478
5479 return retval;
5480}
5481
23606cf5
RW		 5482static int e1000_resume(struct device *dev)
5483{
5484 struct pci_dev *pdev = to_pci_dev(dev);
5485 struct net_device *netdev = pci_get_drvdata(pdev);
5486 struct e1000_adapter *adapter = netdev_priv(netdev);
5487
5488 if (e1000e_pm_ready(adapter))
5489 adapter->idle_check = true;
5490
5491 return __e1000_resume(pdev);
5492}
a0340162
RW		 5493#endif /* CONFIG_PM_SLEEP */
5494
5495#ifdef CONFIG_PM_RUNTIME
5496static int e1000_runtime_suspend(struct device *dev)
5497{
5498 struct pci_dev *pdev = to_pci_dev(dev);
5499 struct net_device *netdev = pci_get_drvdata(pdev);
5500 struct e1000_adapter *adapter = netdev_priv(netdev);
5501
5502 if (e1000e_pm_ready(adapter)) {
5503 bool wake;
5504
5505 __e1000_shutdown(pdev, &wake, true);
5506 }
5507
5508 return 0;
5509}
5510
5511static int e1000_idle(struct device *dev)
5512{
5513 struct pci_dev *pdev = to_pci_dev(dev);
5514 struct net_device *netdev = pci_get_drvdata(pdev);
5515 struct e1000_adapter *adapter = netdev_priv(netdev);
5516
5517 if (!e1000e_pm_ready(adapter))
5518 return 0;
5519
5520 if (adapter->idle_check) {
5521 adapter->idle_check = false;
5522 if (!e1000e_has_link(adapter))
5523 pm_schedule_suspend(dev, MSEC_PER_SEC);
5524 }
5525
5526 return -EBUSY;
5527}
23606cf5
RW		 5528
5529static int e1000_runtime_resume(struct device *dev)
5530{
5531 struct pci_dev *pdev = to_pci_dev(dev);
5532 struct net_device *netdev = pci_get_drvdata(pdev);
5533 struct e1000_adapter *adapter = netdev_priv(netdev);
5534
5535 if (!e1000e_pm_ready(adapter))
5536 return 0;
5537
5538 adapter->idle_check = !dev->power.runtime_auto;
5539 return __e1000_resume(pdev);
5540}
a0340162 5541#endif /* CONFIG_PM_RUNTIME */
aa338601 5542#endif /* CONFIG_PM */
bc7f75fa
AK		 5543
5544static void e1000_shutdown(struct pci_dev *pdev)
5545{
4f9de721
RW		 5546 bool wake = false;
5547
23606cf5 5548 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5549
5550 if (system_state == SYSTEM_POWER_OFF)
5551 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5552}
5553
5554#ifdef CONFIG_NET_POLL_CONTROLLER
147b2c8c
DD		 5555
5556static irqreturn_t e1000_intr_msix(int irq, void *data)
5557{
5558 struct net_device *netdev = data;
5559 struct e1000_adapter *adapter = netdev_priv(netdev);
147b2c8c
DD		 5560
5561 if (adapter->msix_entries) {
90da0669
BA		 5562 int vector, msix_irq;
5563
147b2c8c
DD		 5564 vector = 0;
5565 msix_irq = adapter->msix_entries[vector].vector;
5566 disable_irq(msix_irq);
5567 e1000_intr_msix_rx(msix_irq, netdev);
5568 enable_irq(msix_irq);
5569
5570 vector++;
5571 msix_irq = adapter->msix_entries[vector].vector;
5572 disable_irq(msix_irq);
5573 e1000_intr_msix_tx(msix_irq, netdev);
5574 enable_irq(msix_irq);
5575
5576 vector++;
5577 msix_irq = adapter->msix_entries[vector].vector;
5578 disable_irq(msix_irq);
5579 e1000_msix_other(msix_irq, netdev);
5580 enable_irq(msix_irq);
5581 }
5582
5583 return IRQ_HANDLED;
5584}
5585
bc7f75fa
AK		 5586/*
5587 * Polling 'interrupt' - used by things like netconsole to send skbs
5588 * without having to re-enable interrupts. It's not called while
5589 * the interrupt routine is executing.
5590 */
5591static void e1000_netpoll(struct net_device *netdev)
5592{
5593 struct e1000_adapter *adapter = netdev_priv(netdev);
5594
147b2c8c
DD		 5595 switch (adapter->int_mode) {
5596 case E1000E_INT_MODE_MSIX:
5597 e1000_intr_msix(adapter->pdev->irq, netdev);
5598 break;
5599 case E1000E_INT_MODE_MSI:
5600 disable_irq(adapter->pdev->irq);
5601 e1000_intr_msi(adapter->pdev->irq, netdev);
5602 enable_irq(adapter->pdev->irq);
5603 break;
5604 default: /* E1000E_INT_MODE_LEGACY */
5605 disable_irq(adapter->pdev->irq);
5606 e1000_intr(adapter->pdev->irq, netdev);
5607 enable_irq(adapter->pdev->irq);
5608 break;
5609 }
bc7f75fa
AK		 5610}
5611#endif
5612
5613/**
5614 * e1000_io_error_detected - called when PCI error is detected
5615 * @pdev: Pointer to PCI device
5616 * @state: The current pci connection state
5617 *
5618 * This function is called after a PCI bus error affecting
5619 * this device has been detected.
5620 */
5621static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5622 pci_channel_state_t state)
5623{
5624 struct net_device *netdev = pci_get_drvdata(pdev);
5625 struct e1000_adapter *adapter = netdev_priv(netdev);
5626
5627 netif_device_detach(netdev);
5628
c93b5a76
MM		 5629 if (state == pci_channel_io_perm_failure)
5630 return PCI_ERS_RESULT_DISCONNECT;
5631
bc7f75fa
AK		 5632 if (netif_running(netdev))
5633 e1000e_down(adapter);
5634 pci_disable_device(pdev);
5635
5636 /* Request a slot slot reset. */
5637 return PCI_ERS_RESULT_NEED_RESET;
5638}
5639
5640/**
5641 * e1000_io_slot_reset - called after the pci bus has been reset.
5642 * @pdev: Pointer to PCI device
5643 *
5644 * Restart the card from scratch, as if from a cold-boot. Implementation
5645 * resembles the first-half of the e1000_resume routine.
5646 */
5647static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5648{
5649 struct net_device *netdev = pci_get_drvdata(pdev);
5650 struct e1000_adapter *adapter = netdev_priv(netdev);
5651 struct e1000_hw *hw = &adapter->hw;
78cd29d5 5652 u16 aspm_disable_flag = 0;
6e4f6f6b 5653 int err;
111b9dc5 5654 pci_ers_result_t result;
bc7f75fa 5655
78cd29d5
BA		 5656 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5657 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6f461f6c 5658 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
78cd29d5
BA		 5659 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5660 if (aspm_disable_flag)
5661 e1000e_disable_aspm(pdev, aspm_disable_flag);
5662
f0f422e5 5663 err = pci_enable_device_mem(pdev);
6e4f6f6b 5664 if (err) {
bc7f75fa
AK		 5665 dev_err(&pdev->dev,
5666 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5667 result = PCI_ERS_RESULT_DISCONNECT;
5668 } else {
5669 pci_set_master(pdev);
23606cf5 5670 pdev->state_saved = true;
111b9dc5 5671 pci_restore_state(pdev);
bc7f75fa 5672
111b9dc5
JB		 5673 pci_enable_wake(pdev, PCI_D3hot, 0);
5674 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5675
111b9dc5
JB		 5676 e1000e_reset(adapter);
5677 ew32(WUS, ~0);
5678 result = PCI_ERS_RESULT_RECOVERED;
5679 }
bc7f75fa 5680
111b9dc5
JB		 5681 pci_cleanup_aer_uncorrect_error_status(pdev);
5682
5683 return result;
bc7f75fa
AK		 5684}
5685
5686/**
5687 * e1000_io_resume - called when traffic can start flowing again.
5688 * @pdev: Pointer to PCI device
5689 *
5690 * This callback is called when the error recovery driver tells us that
5691 * its OK to resume normal operation. Implementation resembles the
5692 * second-half of the e1000_resume routine.
5693 */
5694static void e1000_io_resume(struct pci_dev *pdev)
5695{
5696 struct net_device *netdev = pci_get_drvdata(pdev);
5697 struct e1000_adapter *adapter = netdev_priv(netdev);
5698
cd791618 5699 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5700
5701 if (netif_running(netdev)) {
5702 if (e1000e_up(adapter)) {
5703 dev_err(&pdev->dev,
5704 "can't bring device back up after reset\n");
5705 return;
5706 }
5707 }
5708
5709 netif_device_attach(netdev);
5710
ad68076e
BA		 5711 /*
5712 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5713 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5714 * under the control of the driver.
5715 */
c43bc57e 5716 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5717 e1000e_get_hw_control(adapter);
bc7f75fa
AK		 5718
5719}
5720
5721static void e1000_print_device_info(struct e1000_adapter *adapter)
5722{
5723 struct e1000_hw *hw = &adapter->hw;
5724 struct net_device *netdev = adapter->netdev;
073287c0
BA		 5725 u32 ret_val;
5726 u8 pba_str[E1000_PBANUM_LENGTH];
bc7f75fa
AK		 5727
5728 /* print bus type/speed/width info */
a5cc7642 5729 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
44defeb3
JK		 5730 /* bus width */
5731 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5732 "Width x1"),
5733 /* MAC address */
7c510e4b 5734 netdev->dev_addr);
44defeb3
JK		 5735 e_info("Intel(R) PRO/%s Network Connection\n",
5736 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
073287c0
BA		 5737 ret_val = e1000_read_pba_string_generic(hw, pba_str,
5738 E1000_PBANUM_LENGTH);
5739 if (ret_val)
e0dc4f12 5740 strncpy((char *)pba_str, "Unknown", sizeof(pba_str) - 1);
073287c0
BA		 5741 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
5742 hw->mac.type, hw->phy.type, pba_str);
bc7f75fa
AK		 5743}
5744
10aa4c04
AK		 5745static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5746{
5747 struct e1000_hw *hw = &adapter->hw;
5748 int ret_val;
5749 u16 buf = 0;
5750
5751 if (hw->mac.type != e1000_82573)
5752 return;
5753
5754 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5755 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5756 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5757 dev_warn(&adapter->pdev->dev,
5758 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5759 }
10aa4c04
AK		 5760}
5761
651c2466
SH		 5762static const struct net_device_ops e1000e_netdev_ops = {
5763 .ndo_open = e1000_open,
5764 .ndo_stop = e1000_close,
00829823 5765 .ndo_start_xmit = e1000_xmit_frame,
67fd4fcb 5766 .ndo_get_stats64 = e1000e_get_stats64,
651c2466
SH		 5767 .ndo_set_multicast_list = e1000_set_multi,
5768 .ndo_set_mac_address = e1000_set_mac,
5769 .ndo_change_mtu = e1000_change_mtu,
5770 .ndo_do_ioctl = e1000_ioctl,
5771 .ndo_tx_timeout = e1000_tx_timeout,
5772 .ndo_validate_addr = eth_validate_addr,
5773
651c2466
SH		 5774 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5775 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5776#ifdef CONFIG_NET_POLL_CONTROLLER
5777 .ndo_poll_controller = e1000_netpoll,
5778#endif
5779};
5780
bc7f75fa
AK		 5781/**
5782 * e1000_probe - Device Initialization Routine
5783 * @pdev: PCI device information struct
5784 * @ent: entry in e1000_pci_tbl
5785 *
5786 * Returns 0 on success, negative on failure
5787 *
5788 * e1000_probe initializes an adapter identified by a pci_dev structure.
5789 * The OS initialization, configuring of the adapter private structure,
5790 * and a hardware reset occur.
5791 **/
5792static int __devinit e1000_probe(struct pci_dev *pdev,
5793 const struct pci_device_id *ent)
5794{
5795 struct net_device *netdev;
5796 struct e1000_adapter *adapter;
5797 struct e1000_hw *hw;
5798 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5799 resource_size_t mmio_start, mmio_len;
5800 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5801
5802 static int cards_found;
78cd29d5 5803 u16 aspm_disable_flag = 0;
bc7f75fa
AK		 5804 int i, err, pci_using_dac;
5805 u16 eeprom_data = 0;
5806 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5807
78cd29d5
BA		 5808 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
5809 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6f461f6c 5810 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
78cd29d5
BA		 5811 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5812 if (aspm_disable_flag)
5813 e1000e_disable_aspm(pdev, aspm_disable_flag);
6e4f6f6b 5814
f0f422e5 5815 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5816 if (err)
5817 return err;
5818
5819 pci_using_dac = 0;
0be3f55f 5820 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5821 if (!err) {
0be3f55f 5822 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5823 if (!err)
5824 pci_using_dac = 1;
5825 } else {
0be3f55f 5826 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5827 if (err) {
0be3f55f
NN		 5828 err = dma_set_coherent_mask(&pdev->dev,
5829 DMA_BIT_MASK(32));
bc7f75fa
AK		 5830 if (err) {
5831 dev_err(&pdev->dev, "No usable DMA "
5832 "configuration, aborting\n");
5833 goto err_dma;
5834 }
5835 }
5836 }
5837
e8de1481 5838 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5839 pci_select_bars(pdev, IORESOURCE_MEM),
5840 e1000e_driver_name);
bc7f75fa
AK		 5841 if (err)
5842 goto err_pci_reg;
5843
68eac460 5844 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5845 pci_enable_pcie_error_reporting(pdev);
68eac460 5846
bc7f75fa 5847 pci_set_master(pdev);
438b365a
BA		 5848 /* PCI config space info */
5849 err = pci_save_state(pdev);
5850 if (err)
5851 goto err_alloc_etherdev;
bc7f75fa
AK		 5852
5853 err = -ENOMEM;
5854 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5855 if (!netdev)
5856 goto err_alloc_etherdev;
5857
bc7f75fa
AK		 5858 SET_NETDEV_DEV(netdev, &pdev->dev);
5859
f85e4dfa
TH		 5860 netdev->irq = pdev->irq;
5861
bc7f75fa
AK		 5862 pci_set_drvdata(pdev, netdev);
5863 adapter = netdev_priv(netdev);
5864 hw = &adapter->hw;
5865 adapter->netdev = netdev;
5866 adapter->pdev = pdev;
5867 adapter->ei = ei;
5868 adapter->pba = ei->pba;
5869 adapter->flags = ei->flags;
eb7c3adb 5870 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5871 adapter->hw.adapter = adapter;
5872 adapter->hw.mac.type = ei->mac;
2adc55c9 5873 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5874 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5875
5876 mmio_start = pci_resource_start(pdev, 0);
5877 mmio_len = pci_resource_len(pdev, 0);
5878
5879 err = -EIO;
5880 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5881 if (!adapter->hw.hw_addr)
5882 goto err_ioremap;
5883
5884 if ((adapter->flags & FLAG_HAS_FLASH) &&
5885 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5886 flash_start = pci_resource_start(pdev, 1);
5887 flash_len = pci_resource_len(pdev, 1);
5888 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5889 if (!adapter->hw.flash_address)
5890 goto err_flashmap;
5891 }
5892
5893 /* construct the net_device struct */
651c2466 5894 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5895 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5896 netdev->watchdog_timeo = 5 * HZ;
5897 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5898 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5899
5900 netdev->mem_start = mmio_start;
5901 netdev->mem_end = mmio_start + mmio_len;
5902
5903 adapter->bd_number = cards_found++;
5904
4662e82b
BA		 5905 e1000e_check_options(adapter);
5906
bc7f75fa
AK		 5907 /* setup adapter struct */
5908 err = e1000_sw_init(adapter);
5909 if (err)
5910 goto err_sw_init;
5911
bc7f75fa
AK		 5912 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5913 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5914 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5915
69e3fd8c 5916 err = ei->get_variants(adapter);
bc7f75fa
AK		 5917 if (err)
5918 goto err_hw_init;
5919
4a770358
BA		 5920 if ((adapter->flags & FLAG_IS_ICH) &&
5921 (adapter->flags & FLAG_READ_ONLY_NVM))
5922 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5923
bc7f75fa
AK		 5924 hw->mac.ops.get_bus_info(&adapter->hw);
5925
318a94d6 5926 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5927
5928 /* Copper options */
318a94d6 5929 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5930 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5931 adapter->hw.phy.disable_polarity_correction = 0;
5932 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5933 }
5934
5935 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5936 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5937
5938 netdev->features = NETIF_F_SG |
5939 NETIF_F_HW_CSUM |
5940 NETIF_F_HW_VLAN_TX |
5941 NETIF_F_HW_VLAN_RX;
5942
5943 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5944 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5945
5946 netdev->features |= NETIF_F_TSO;
5947 netdev->features |= NETIF_F_TSO6;
5948
a5136e23
JK		 5949 netdev->vlan_features |= NETIF_F_TSO;
5950 netdev->vlan_features |= NETIF_F_TSO6;
5951 netdev->vlan_features |= NETIF_F_HW_CSUM;
5952 netdev->vlan_features |= NETIF_F_SG;
5953
7b872a55 5954 if (pci_using_dac) {
bc7f75fa 5955 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 5956 netdev->vlan_features |= NETIF_F_HIGHDMA;
5957 }
bc7f75fa 5958
bc7f75fa
AK		 5959 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5960 adapter->flags |= FLAG_MNG_PT_ENABLED;
5961
ad68076e
BA		 5962 /*
5963 * before reading the NVM, reset the controller to
5964 * put the device in a known good starting state
5965 */
bc7f75fa
AK		 5966 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5967
5968 /*
5969 * systems with ASPM and others may see the checksum fail on the first
5970 * attempt. Let's give it a few tries
5971 */
5972 for (i = 0;; i++) {
5973 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5974 break;
5975 if (i == 2) {
44defeb3 5976 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5977 err = -EIO;
5978 goto err_eeprom;
5979 }
5980 }
5981
10aa4c04
AK		 5982 e1000_eeprom_checks(adapter);
5983
608f8a0d 5984 /* copy the MAC address */
bc7f75fa 5985 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5986 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5987
5988 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5989 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5990
5991 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5992 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5993 err = -EIO;
5994 goto err_eeprom;
5995 }
5996
5997 init_timer(&adapter->watchdog_timer);
c061b18d 5998 adapter->watchdog_timer.function = e1000_watchdog;
bc7f75fa
AK		 5999 adapter->watchdog_timer.data = (unsigned long) adapter;
6000
6001 init_timer(&adapter->phy_info_timer);
c061b18d 6002 adapter->phy_info_timer.function = e1000_update_phy_info;
bc7f75fa
AK		 6003 adapter->phy_info_timer.data = (unsigned long) adapter;
6004
6005 INIT_WORK(&adapter->reset_task, e1000_reset_task);
6006 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 6007 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6008 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 6009 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 6010
bc7f75fa
AK		 6011 /* Initialize link parameters. User can change them with ethtool */
6012 adapter->hw.mac.autoneg = 1;
309af40b 6013 adapter->fc_autoneg = 1;
5c48ef3e
BA		 6014 adapter->hw.fc.requested_mode = e1000_fc_default;
6015 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 6016 adapter->hw.phy.autoneg_advertised = 0x2f;
6017
6018 /* ring size defaults */
6019 adapter->rx_ring->count = 256;
6020 adapter->tx_ring->count = 256;
6021
6022 /*
6023 * Initial Wake on LAN setting - If APM wake is enabled in
6024 * the EEPROM, enable the ACPI Magic Packet filter
6025 */
6026 if (adapter->flags & FLAG_APME_IN_WUC) {
6027 /* APME bit in EEPROM is mapped to WUC.APME */
6028 eeprom_data = er32(WUC);
6029 eeprom_apme_mask = E1000_WUC_APME;
4def99bb
BA		 6030 if ((hw->mac.type > e1000_ich10lan) &&
6031 (eeprom_data & E1000_WUC_PHY_WAKE))
a4f58f54 6032 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 6033 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6034 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6035 (adapter->hw.bus.func == 1))
6036 e1000_read_nvm(&adapter->hw,
6037 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
6038 else
6039 e1000_read_nvm(&adapter->hw,
6040 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
6041 }
6042
6043 /* fetch WoL from EEPROM */
6044 if (eeprom_data & eeprom_apme_mask)
6045 adapter->eeprom_wol |= E1000_WUFC_MAG;
6046
6047 /*
6048 * now that we have the eeprom settings, apply the special cases
6049 * where the eeprom may be wrong or the board simply won't support
6050 * wake on lan on a particular port
6051 */
6052 if (!(adapter->flags & FLAG_HAS_WOL))
6053 adapter->eeprom_wol = 0;
6054
6055 /* initialize the wol settings based on the eeprom settings */
6056 adapter->wol = adapter->eeprom_wol;
6ff68026 6057 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 6058
84527590
BA		 6059 /* save off EEPROM version number */
6060 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6061
bc7f75fa
AK		 6062 /* reset the hardware with the new settings */
6063 e1000e_reset(adapter);
6064
ad68076e
BA		 6065 /*
6066 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 6067 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 6068 * under the control of the driver.
6069 */
c43bc57e 6070 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 6071 e1000e_get_hw_control(adapter);
bc7f75fa 6072
e0dc4f12 6073 strncpy(netdev->name, "eth%d", sizeof(netdev->name) - 1);
bc7f75fa
AK		 6074 err = register_netdev(netdev);
6075 if (err)
6076 goto err_register;
6077
9c563d20
JB		 6078 /* carrier off reporting is important to ethtool even BEFORE open */
6079 netif_carrier_off(netdev);
6080
bc7f75fa
AK		 6081 e1000_print_device_info(adapter);
6082
f3ec4f87
AS		 6083 if (pci_dev_run_wake(pdev))
6084 pm_runtime_put_noidle(&pdev->dev);
23606cf5 6085
bc7f75fa
AK		 6086 return 0;
6087
6088err_register:
c43bc57e 6089 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 6090 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 6091err_eeprom:
6092 if (!e1000_check_reset_block(&adapter->hw))
6093 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 6094err_hw_init:
bc7f75fa
AK		 6095 kfree(adapter->tx_ring);
6096 kfree(adapter->rx_ring);
6097err_sw_init:
c43bc57e
JB		 6098 if (adapter->hw.flash_address)
6099 iounmap(adapter->hw.flash_address);
e82f54ba 6100 e1000e_reset_interrupt_capability(adapter);
c43bc57e 6101err_flashmap:
bc7f75fa
AK		 6102 iounmap(adapter->hw.hw_addr);
6103err_ioremap:
6104 free_netdev(netdev);
6105err_alloc_etherdev:
f0f422e5
BA		 6106 pci_release_selected_regions(pdev,
6107 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6108err_pci_reg:
6109err_dma:
6110 pci_disable_device(pdev);
6111 return err;
6112}
6113
6114/**
6115 * e1000_remove - Device Removal Routine
6116 * @pdev: PCI device information struct
6117 *
6118 * e1000_remove is called by the PCI subsystem to alert the driver
6119 * that it should release a PCI device. The could be caused by a
6120 * Hot-Plug event, or because the driver is going to be removed from
6121 * memory.
6122 **/
6123static void __devexit e1000_remove(struct pci_dev *pdev)
6124{
6125 struct net_device *netdev = pci_get_drvdata(pdev);
6126 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 6127 bool down = test_bit(__E1000_DOWN, &adapter->state);
6128
ad68076e 6129 /*
23f333a2
TH		 6130 * The timers may be rescheduled, so explicitly disable them
6131 * from being rescheduled.
ad68076e 6132 */
23606cf5
RW		 6133 if (!down)
6134 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 6135 del_timer_sync(&adapter->watchdog_timer);
6136 del_timer_sync(&adapter->phy_info_timer);
6137
41cec6f1
BA		 6138 cancel_work_sync(&adapter->reset_task);
6139 cancel_work_sync(&adapter->watchdog_task);
6140 cancel_work_sync(&adapter->downshift_task);
6141 cancel_work_sync(&adapter->update_phy_task);
6142 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa 6143
17f208de
BA		 6144 if (!(netdev->flags & IFF_UP))
6145 e1000_power_down_phy(adapter);
6146
23606cf5
RW		 6147 /* Don't lie to e1000_close() down the road. */
6148 if (!down)
6149 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 6150 unregister_netdev(netdev);
6151
f3ec4f87
AS		 6152 if (pci_dev_run_wake(pdev))
6153 pm_runtime_get_noresume(&pdev->dev);
23606cf5 6154
ad68076e
BA		 6155 /*
6156 * Release control of h/w to f/w. If f/w is AMT enabled, this
6157 * would have already happened in close and is redundant.
6158 */
31dbe5b4 6159 e1000e_release_hw_control(adapter);
bc7f75fa 6160
4662e82b 6161 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 6162 kfree(adapter->tx_ring);
6163 kfree(adapter->rx_ring);
6164
6165 iounmap(adapter->hw.hw_addr);
6166 if (adapter->hw.flash_address)
6167 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 6168 pci_release_selected_regions(pdev,
6169 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6170
6171 free_netdev(netdev);
6172
111b9dc5 6173 /* AER disable */
19d5afd4 6174 pci_disable_pcie_error_reporting(pdev);
111b9dc5 6175
bc7f75fa
AK		 6176 pci_disable_device(pdev);
6177}
6178
6179/* PCI Error Recovery (ERS) */
6180static struct pci_error_handlers e1000_err_handler = {
6181 .error_detected = e1000_io_error_detected,
6182 .slot_reset = e1000_io_slot_reset,
6183 .resume = e1000_io_resume,
6184};
6185
a3aa1884 6186static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 6187 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6188 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6189 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6190 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6191 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6192 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 6193 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6194 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6195 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 6196
bc7f75fa
AK		 6197 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6198 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6199 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6200 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 6201
bc7f75fa
AK		 6202 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6203 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6204 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 6205
4662e82b 6206 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 6207 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 6208 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 6209
bc7f75fa
AK		 6210 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6211 board_80003es2lan },
6212 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6213 board_80003es2lan },
6214 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6215 board_80003es2lan },
6216 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6217 board_80003es2lan },
ad68076e 6218
bc7f75fa
AK		 6219 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6220 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6221 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6222 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6223 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6224 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6225 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 6226 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 6227
bc7f75fa
AK		 6228 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6229 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6230 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6231 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6232 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 6233 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 6234 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6235 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6236 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6237
6238 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6239 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6240 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 6241
f4187b56
BA		 6242 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6243 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 6244 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 6245
a4f58f54
BA		 6246 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6247 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6248 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6249 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6250
d3738bb8
BA		 6251 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6252 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6253
bc7f75fa
AK		 6254 { } /* terminate list */
6255};
6256MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6257
aa338601 6258#ifdef CONFIG_PM
23606cf5 6259static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6260 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6261 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6262 e1000_runtime_resume, e1000_idle)
23606cf5 6263};
e50208a0 6264#endif
23606cf5 6265
bc7f75fa
AK		 6266/* PCI Device API Driver */
6267static struct pci_driver e1000_driver = {
6268 .name = e1000e_driver_name,
6269 .id_table = e1000_pci_tbl,
6270 .probe = e1000_probe,
6271 .remove = __devexit_p(e1000_remove),
aa338601 6272#ifdef CONFIG_PM
23606cf5 6273 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6274#endif
6275 .shutdown = e1000_shutdown,
6276 .err_handler = &e1000_err_handler
6277};
6278
6279/**
6280 * e1000_init_module - Driver Registration Routine
6281 *
6282 * e1000_init_module is the first routine called when the driver is
6283 * loaded. All it does is register with the PCI subsystem.
6284 **/
6285static int __init e1000_init_module(void)
6286{
6287 int ret;
8544b9f7
BA		 6288 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6289 e1000e_driver_version);
0d6057e4 6290 pr_info("Copyright(c) 1999 - 2011 Intel Corporation.\n");
bc7f75fa 6291 ret = pci_register_driver(&e1000_driver);
53ec5498 6292
bc7f75fa
AK		 6293 return ret;
6294}
6295module_init(e1000_init_module);
6296
6297/**
6298 * e1000_exit_module - Driver Exit Cleanup Routine
6299 *
6300 * e1000_exit_module is called just before the driver is removed
6301 * from memory.
6302 **/
6303static void __exit e1000_exit_module(void)
6304{
6305 pci_unregister_driver(&e1000_driver);
6306}
6307module_exit(e1000_exit_module);
6308
6309
6310MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6311MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6312MODULE_LICENSE("GPL");
6313MODULE_VERSION(DRV_VERSION);
6314
6315/* e1000_main.c */
kernel source for telekom puls (alcatel/mediatek)