Commit | Line | Data |
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1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
3 | ||
3d41e30a | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
1da177e4 LT |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 2 of the License, or (at your option) | |
9 | any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License along with | |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | ||
20 | The full GNU General Public License is included in this distribution in the | |
21 | file called LICENSE. | |
22 | ||
23 | Contact Information: | |
24 | Linux NICS <linux.nics@intel.com> | |
3d41e30a | 25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
1da177e4 LT |
26 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
27 | ||
28 | *******************************************************************************/ | |
29 | ||
30 | #include "e1000.h" | |
31 | ||
1da177e4 | 32 | char e1000_driver_name[] = "e1000"; |
3ad2cc67 | 33 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; |
1da177e4 LT |
34 | #ifndef CONFIG_E1000_NAPI |
35 | #define DRIVERNAPI | |
36 | #else | |
37 | #define DRIVERNAPI "-NAPI" | |
38 | #endif | |
3d41e30a | 39 | #define DRV_VERSION "7.0.38-k2"DRIVERNAPI |
1da177e4 | 40 | char e1000_driver_version[] = DRV_VERSION; |
3d41e30a | 41 | static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
1da177e4 LT |
42 | |
43 | /* e1000_pci_tbl - PCI Device ID Table | |
44 | * | |
45 | * Last entry must be all 0s | |
46 | * | |
47 | * Macro expands to... | |
48 | * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} | |
49 | */ | |
50 | static struct pci_device_id e1000_pci_tbl[] = { | |
51 | INTEL_E1000_ETHERNET_DEVICE(0x1000), | |
52 | INTEL_E1000_ETHERNET_DEVICE(0x1001), | |
53 | INTEL_E1000_ETHERNET_DEVICE(0x1004), | |
54 | INTEL_E1000_ETHERNET_DEVICE(0x1008), | |
55 | INTEL_E1000_ETHERNET_DEVICE(0x1009), | |
56 | INTEL_E1000_ETHERNET_DEVICE(0x100C), | |
57 | INTEL_E1000_ETHERNET_DEVICE(0x100D), | |
58 | INTEL_E1000_ETHERNET_DEVICE(0x100E), | |
59 | INTEL_E1000_ETHERNET_DEVICE(0x100F), | |
60 | INTEL_E1000_ETHERNET_DEVICE(0x1010), | |
61 | INTEL_E1000_ETHERNET_DEVICE(0x1011), | |
62 | INTEL_E1000_ETHERNET_DEVICE(0x1012), | |
63 | INTEL_E1000_ETHERNET_DEVICE(0x1013), | |
64 | INTEL_E1000_ETHERNET_DEVICE(0x1014), | |
65 | INTEL_E1000_ETHERNET_DEVICE(0x1015), | |
66 | INTEL_E1000_ETHERNET_DEVICE(0x1016), | |
67 | INTEL_E1000_ETHERNET_DEVICE(0x1017), | |
68 | INTEL_E1000_ETHERNET_DEVICE(0x1018), | |
69 | INTEL_E1000_ETHERNET_DEVICE(0x1019), | |
2648345f | 70 | INTEL_E1000_ETHERNET_DEVICE(0x101A), |
1da177e4 LT |
71 | INTEL_E1000_ETHERNET_DEVICE(0x101D), |
72 | INTEL_E1000_ETHERNET_DEVICE(0x101E), | |
73 | INTEL_E1000_ETHERNET_DEVICE(0x1026), | |
74 | INTEL_E1000_ETHERNET_DEVICE(0x1027), | |
75 | INTEL_E1000_ETHERNET_DEVICE(0x1028), | |
07b8fede MC |
76 | INTEL_E1000_ETHERNET_DEVICE(0x105E), |
77 | INTEL_E1000_ETHERNET_DEVICE(0x105F), | |
78 | INTEL_E1000_ETHERNET_DEVICE(0x1060), | |
1da177e4 LT |
79 | INTEL_E1000_ETHERNET_DEVICE(0x1075), |
80 | INTEL_E1000_ETHERNET_DEVICE(0x1076), | |
81 | INTEL_E1000_ETHERNET_DEVICE(0x1077), | |
82 | INTEL_E1000_ETHERNET_DEVICE(0x1078), | |
83 | INTEL_E1000_ETHERNET_DEVICE(0x1079), | |
84 | INTEL_E1000_ETHERNET_DEVICE(0x107A), | |
85 | INTEL_E1000_ETHERNET_DEVICE(0x107B), | |
86 | INTEL_E1000_ETHERNET_DEVICE(0x107C), | |
07b8fede MC |
87 | INTEL_E1000_ETHERNET_DEVICE(0x107D), |
88 | INTEL_E1000_ETHERNET_DEVICE(0x107E), | |
89 | INTEL_E1000_ETHERNET_DEVICE(0x107F), | |
1da177e4 | 90 | INTEL_E1000_ETHERNET_DEVICE(0x108A), |
2648345f MC |
91 | INTEL_E1000_ETHERNET_DEVICE(0x108B), |
92 | INTEL_E1000_ETHERNET_DEVICE(0x108C), | |
6418ecc6 JK |
93 | INTEL_E1000_ETHERNET_DEVICE(0x1096), |
94 | INTEL_E1000_ETHERNET_DEVICE(0x1098), | |
b7ee49db | 95 | INTEL_E1000_ETHERNET_DEVICE(0x1099), |
07b8fede | 96 | INTEL_E1000_ETHERNET_DEVICE(0x109A), |
b7ee49db | 97 | INTEL_E1000_ETHERNET_DEVICE(0x10B5), |
6418ecc6 | 98 | INTEL_E1000_ETHERNET_DEVICE(0x10B9), |
1da177e4 LT |
99 | /* required last entry */ |
100 | {0,} | |
101 | }; | |
102 | ||
103 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); | |
104 | ||
3ad2cc67 | 105 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 106 | struct e1000_tx_ring *txdr); |
3ad2cc67 | 107 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 108 | struct e1000_rx_ring *rxdr); |
3ad2cc67 | 109 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 110 | struct e1000_tx_ring *tx_ring); |
3ad2cc67 | 111 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 112 | struct e1000_rx_ring *rx_ring); |
1da177e4 LT |
113 | |
114 | /* Local Function Prototypes */ | |
115 | ||
116 | static int e1000_init_module(void); | |
117 | static void e1000_exit_module(void); | |
118 | static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | |
119 | static void __devexit e1000_remove(struct pci_dev *pdev); | |
581d708e | 120 | static int e1000_alloc_queues(struct e1000_adapter *adapter); |
1da177e4 LT |
121 | static int e1000_sw_init(struct e1000_adapter *adapter); |
122 | static int e1000_open(struct net_device *netdev); | |
123 | static int e1000_close(struct net_device *netdev); | |
124 | static void e1000_configure_tx(struct e1000_adapter *adapter); | |
125 | static void e1000_configure_rx(struct e1000_adapter *adapter); | |
126 | static void e1000_setup_rctl(struct e1000_adapter *adapter); | |
581d708e MC |
127 | static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter); |
128 | static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter); | |
129 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter, | |
130 | struct e1000_tx_ring *tx_ring); | |
131 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter, | |
132 | struct e1000_rx_ring *rx_ring); | |
1da177e4 LT |
133 | static void e1000_set_multi(struct net_device *netdev); |
134 | static void e1000_update_phy_info(unsigned long data); | |
135 | static void e1000_watchdog(unsigned long data); | |
136 | static void e1000_watchdog_task(struct e1000_adapter *adapter); | |
137 | static void e1000_82547_tx_fifo_stall(unsigned long data); | |
138 | static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev); | |
139 | static struct net_device_stats * e1000_get_stats(struct net_device *netdev); | |
140 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu); | |
141 | static int e1000_set_mac(struct net_device *netdev, void *p); | |
142 | static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs); | |
581d708e MC |
143 | static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter, |
144 | struct e1000_tx_ring *tx_ring); | |
1da177e4 | 145 | #ifdef CONFIG_E1000_NAPI |
581d708e | 146 | static int e1000_clean(struct net_device *poll_dev, int *budget); |
1da177e4 | 147 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
581d708e | 148 | struct e1000_rx_ring *rx_ring, |
1da177e4 | 149 | int *work_done, int work_to_do); |
2d7edb92 | 150 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
581d708e | 151 | struct e1000_rx_ring *rx_ring, |
2d7edb92 | 152 | int *work_done, int work_to_do); |
1da177e4 | 153 | #else |
581d708e MC |
154 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
155 | struct e1000_rx_ring *rx_ring); | |
156 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |
157 | struct e1000_rx_ring *rx_ring); | |
1da177e4 | 158 | #endif |
581d708e | 159 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 JK |
160 | struct e1000_rx_ring *rx_ring, |
161 | int cleaned_count); | |
581d708e | 162 | static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
163 | struct e1000_rx_ring *rx_ring, |
164 | int cleaned_count); | |
1da177e4 LT |
165 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); |
166 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | |
167 | int cmd); | |
1da177e4 LT |
168 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter); |
169 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter); | |
170 | static void e1000_tx_timeout(struct net_device *dev); | |
87041639 | 171 | static void e1000_reset_task(struct net_device *dev); |
1da177e4 | 172 | static void e1000_smartspeed(struct e1000_adapter *adapter); |
e619d523 AK |
173 | static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, |
174 | struct sk_buff *skb); | |
1da177e4 LT |
175 | |
176 | static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); | |
177 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); | |
178 | static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); | |
179 | static void e1000_restore_vlan(struct e1000_adapter *adapter); | |
180 | ||
1da177e4 | 181 | #ifdef CONFIG_PM |
977e74b5 | 182 | static int e1000_suspend(struct pci_dev *pdev, pm_message_t state); |
1da177e4 LT |
183 | static int e1000_resume(struct pci_dev *pdev); |
184 | #endif | |
c653e635 | 185 | static void e1000_shutdown(struct pci_dev *pdev); |
1da177e4 LT |
186 | |
187 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
188 | /* for netdump / net console */ | |
189 | static void e1000_netpoll (struct net_device *netdev); | |
190 | #endif | |
191 | ||
24025e4e | 192 | |
1da177e4 LT |
193 | static struct pci_driver e1000_driver = { |
194 | .name = e1000_driver_name, | |
195 | .id_table = e1000_pci_tbl, | |
196 | .probe = e1000_probe, | |
197 | .remove = __devexit_p(e1000_remove), | |
198 | /* Power Managment Hooks */ | |
199 | #ifdef CONFIG_PM | |
200 | .suspend = e1000_suspend, | |
c653e635 | 201 | .resume = e1000_resume, |
1da177e4 | 202 | #endif |
c653e635 | 203 | .shutdown = e1000_shutdown |
1da177e4 LT |
204 | }; |
205 | ||
206 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
207 | MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); | |
208 | MODULE_LICENSE("GPL"); | |
209 | MODULE_VERSION(DRV_VERSION); | |
210 | ||
211 | static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE; | |
212 | module_param(debug, int, 0); | |
213 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
214 | ||
215 | /** | |
216 | * e1000_init_module - Driver Registration Routine | |
217 | * | |
218 | * e1000_init_module is the first routine called when the driver is | |
219 | * loaded. All it does is register with the PCI subsystem. | |
220 | **/ | |
221 | ||
222 | static int __init | |
223 | e1000_init_module(void) | |
224 | { | |
225 | int ret; | |
226 | printk(KERN_INFO "%s - version %s\n", | |
227 | e1000_driver_string, e1000_driver_version); | |
228 | ||
229 | printk(KERN_INFO "%s\n", e1000_copyright); | |
230 | ||
231 | ret = pci_module_init(&e1000_driver); | |
8b378def | 232 | |
1da177e4 LT |
233 | return ret; |
234 | } | |
235 | ||
236 | module_init(e1000_init_module); | |
237 | ||
238 | /** | |
239 | * e1000_exit_module - Driver Exit Cleanup Routine | |
240 | * | |
241 | * e1000_exit_module is called just before the driver is removed | |
242 | * from memory. | |
243 | **/ | |
244 | ||
245 | static void __exit | |
246 | e1000_exit_module(void) | |
247 | { | |
1da177e4 LT |
248 | pci_unregister_driver(&e1000_driver); |
249 | } | |
250 | ||
251 | module_exit(e1000_exit_module); | |
252 | ||
253 | /** | |
254 | * e1000_irq_disable - Mask off interrupt generation on the NIC | |
255 | * @adapter: board private structure | |
256 | **/ | |
257 | ||
e619d523 | 258 | static void |
1da177e4 LT |
259 | e1000_irq_disable(struct e1000_adapter *adapter) |
260 | { | |
261 | atomic_inc(&adapter->irq_sem); | |
262 | E1000_WRITE_REG(&adapter->hw, IMC, ~0); | |
263 | E1000_WRITE_FLUSH(&adapter->hw); | |
264 | synchronize_irq(adapter->pdev->irq); | |
265 | } | |
266 | ||
267 | /** | |
268 | * e1000_irq_enable - Enable default interrupt generation settings | |
269 | * @adapter: board private structure | |
270 | **/ | |
271 | ||
e619d523 | 272 | static void |
1da177e4 LT |
273 | e1000_irq_enable(struct e1000_adapter *adapter) |
274 | { | |
96838a40 | 275 | if (likely(atomic_dec_and_test(&adapter->irq_sem))) { |
1da177e4 LT |
276 | E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK); |
277 | E1000_WRITE_FLUSH(&adapter->hw); | |
278 | } | |
279 | } | |
3ad2cc67 AB |
280 | |
281 | static void | |
2d7edb92 MC |
282 | e1000_update_mng_vlan(struct e1000_adapter *adapter) |
283 | { | |
284 | struct net_device *netdev = adapter->netdev; | |
285 | uint16_t vid = adapter->hw.mng_cookie.vlan_id; | |
286 | uint16_t old_vid = adapter->mng_vlan_id; | |
96838a40 JB |
287 | if (adapter->vlgrp) { |
288 | if (!adapter->vlgrp->vlan_devices[vid]) { | |
289 | if (adapter->hw.mng_cookie.status & | |
2d7edb92 MC |
290 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) { |
291 | e1000_vlan_rx_add_vid(netdev, vid); | |
292 | adapter->mng_vlan_id = vid; | |
293 | } else | |
294 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
96838a40 JB |
295 | |
296 | if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) && | |
297 | (vid != old_vid) && | |
2d7edb92 MC |
298 | !adapter->vlgrp->vlan_devices[old_vid]) |
299 | e1000_vlan_rx_kill_vid(netdev, old_vid); | |
c5f226fe JK |
300 | } else |
301 | adapter->mng_vlan_id = vid; | |
2d7edb92 MC |
302 | } |
303 | } | |
b55ccb35 JK |
304 | |
305 | /** | |
306 | * e1000_release_hw_control - release control of the h/w to f/w | |
307 | * @adapter: address of board private structure | |
308 | * | |
309 | * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
310 | * For ASF and Pass Through versions of f/w this means that the | |
311 | * driver is no longer loaded. For AMT version (only with 82573) i | |
312 | * of the f/w this means that the netowrk i/f is closed. | |
76c224bc | 313 | * |
b55ccb35 JK |
314 | **/ |
315 | ||
e619d523 | 316 | static void |
b55ccb35 JK |
317 | e1000_release_hw_control(struct e1000_adapter *adapter) |
318 | { | |
319 | uint32_t ctrl_ext; | |
320 | uint32_t swsm; | |
321 | ||
322 | /* Let firmware taken over control of h/w */ | |
323 | switch (adapter->hw.mac_type) { | |
324 | case e1000_82571: | |
325 | case e1000_82572: | |
4cc15f54 | 326 | case e1000_80003es2lan: |
b55ccb35 JK |
327 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
328 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
329 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); | |
330 | break; | |
331 | case e1000_82573: | |
332 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
333 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
334 | swsm & ~E1000_SWSM_DRV_LOAD); | |
335 | default: | |
336 | break; | |
337 | } | |
338 | } | |
339 | ||
340 | /** | |
341 | * e1000_get_hw_control - get control of the h/w from f/w | |
342 | * @adapter: address of board private structure | |
343 | * | |
344 | * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
76c224bc AK |
345 | * For ASF and Pass Through versions of f/w this means that |
346 | * the driver is loaded. For AMT version (only with 82573) | |
b55ccb35 | 347 | * of the f/w this means that the netowrk i/f is open. |
76c224bc | 348 | * |
b55ccb35 JK |
349 | **/ |
350 | ||
e619d523 | 351 | static void |
b55ccb35 JK |
352 | e1000_get_hw_control(struct e1000_adapter *adapter) |
353 | { | |
354 | uint32_t ctrl_ext; | |
355 | uint32_t swsm; | |
356 | /* Let firmware know the driver has taken over */ | |
357 | switch (adapter->hw.mac_type) { | |
358 | case e1000_82571: | |
359 | case e1000_82572: | |
4cc15f54 | 360 | case e1000_80003es2lan: |
b55ccb35 JK |
361 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
362 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
363 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); | |
364 | break; | |
365 | case e1000_82573: | |
366 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
367 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
368 | swsm | E1000_SWSM_DRV_LOAD); | |
369 | break; | |
370 | default: | |
371 | break; | |
372 | } | |
373 | } | |
374 | ||
1da177e4 LT |
375 | int |
376 | e1000_up(struct e1000_adapter *adapter) | |
377 | { | |
378 | struct net_device *netdev = adapter->netdev; | |
581d708e | 379 | int i, err; |
1da177e4 LT |
380 | |
381 | /* hardware has been reset, we need to reload some things */ | |
382 | ||
383 | /* Reset the PHY if it was previously powered down */ | |
96838a40 | 384 | if (adapter->hw.media_type == e1000_media_type_copper) { |
1da177e4 LT |
385 | uint16_t mii_reg; |
386 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
96838a40 | 387 | if (mii_reg & MII_CR_POWER_DOWN) |
4cc15f54 | 388 | e1000_phy_hw_reset(&adapter->hw); |
1da177e4 LT |
389 | } |
390 | ||
391 | e1000_set_multi(netdev); | |
392 | ||
393 | e1000_restore_vlan(adapter); | |
394 | ||
395 | e1000_configure_tx(adapter); | |
396 | e1000_setup_rctl(adapter); | |
397 | e1000_configure_rx(adapter); | |
72d64a43 JK |
398 | /* call E1000_DESC_UNUSED which always leaves |
399 | * at least 1 descriptor unused to make sure | |
400 | * next_to_use != next_to_clean */ | |
f56799ea | 401 | for (i = 0; i < adapter->num_rx_queues; i++) { |
72d64a43 | 402 | struct e1000_rx_ring *ring = &adapter->rx_ring[i]; |
a292ca6e JK |
403 | adapter->alloc_rx_buf(adapter, ring, |
404 | E1000_DESC_UNUSED(ring)); | |
f56799ea | 405 | } |
1da177e4 | 406 | |
fa4f7ef3 | 407 | #ifdef CONFIG_PCI_MSI |
96838a40 | 408 | if (adapter->hw.mac_type > e1000_82547_rev_2) { |
fa4f7ef3 | 409 | adapter->have_msi = TRUE; |
96838a40 | 410 | if ((err = pci_enable_msi(adapter->pdev))) { |
fa4f7ef3 MC |
411 | DPRINTK(PROBE, ERR, |
412 | "Unable to allocate MSI interrupt Error: %d\n", err); | |
413 | adapter->have_msi = FALSE; | |
414 | } | |
415 | } | |
416 | #endif | |
96838a40 | 417 | if ((err = request_irq(adapter->pdev->irq, &e1000_intr, |
1da177e4 | 418 | SA_SHIRQ | SA_SAMPLE_RANDOM, |
2648345f MC |
419 | netdev->name, netdev))) { |
420 | DPRINTK(PROBE, ERR, | |
421 | "Unable to allocate interrupt Error: %d\n", err); | |
1da177e4 | 422 | return err; |
2648345f | 423 | } |
1da177e4 | 424 | |
7bfa4816 JK |
425 | adapter->tx_queue_len = netdev->tx_queue_len; |
426 | ||
1da177e4 | 427 | mod_timer(&adapter->watchdog_timer, jiffies); |
1da177e4 LT |
428 | |
429 | #ifdef CONFIG_E1000_NAPI | |
430 | netif_poll_enable(netdev); | |
431 | #endif | |
5de55624 MC |
432 | e1000_irq_enable(adapter); |
433 | ||
1da177e4 LT |
434 | return 0; |
435 | } | |
436 | ||
437 | void | |
438 | e1000_down(struct e1000_adapter *adapter) | |
439 | { | |
440 | struct net_device *netdev = adapter->netdev; | |
57128197 JK |
441 | boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) && |
442 | e1000_check_mng_mode(&adapter->hw); | |
1da177e4 LT |
443 | |
444 | e1000_irq_disable(adapter); | |
c1605eb3 | 445 | |
1da177e4 | 446 | free_irq(adapter->pdev->irq, netdev); |
fa4f7ef3 | 447 | #ifdef CONFIG_PCI_MSI |
96838a40 | 448 | if (adapter->hw.mac_type > e1000_82547_rev_2 && |
fa4f7ef3 MC |
449 | adapter->have_msi == TRUE) |
450 | pci_disable_msi(adapter->pdev); | |
451 | #endif | |
1da177e4 LT |
452 | del_timer_sync(&adapter->tx_fifo_stall_timer); |
453 | del_timer_sync(&adapter->watchdog_timer); | |
454 | del_timer_sync(&adapter->phy_info_timer); | |
455 | ||
456 | #ifdef CONFIG_E1000_NAPI | |
457 | netif_poll_disable(netdev); | |
458 | #endif | |
7bfa4816 | 459 | netdev->tx_queue_len = adapter->tx_queue_len; |
1da177e4 LT |
460 | adapter->link_speed = 0; |
461 | adapter->link_duplex = 0; | |
462 | netif_carrier_off(netdev); | |
463 | netif_stop_queue(netdev); | |
464 | ||
465 | e1000_reset(adapter); | |
581d708e MC |
466 | e1000_clean_all_tx_rings(adapter); |
467 | e1000_clean_all_rx_rings(adapter); | |
1da177e4 | 468 | |
57128197 JK |
469 | /* Power down the PHY so no link is implied when interface is down * |
470 | * The PHY cannot be powered down if any of the following is TRUE * | |
471 | * (a) WoL is enabled | |
472 | * (b) AMT is active | |
473 | * (c) SoL/IDER session is active */ | |
474 | if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 && | |
2d7edb92 | 475 | adapter->hw.media_type == e1000_media_type_copper && |
57128197 JK |
476 | !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) && |
477 | !mng_mode_enabled && | |
478 | !e1000_check_phy_reset_block(&adapter->hw)) { | |
1da177e4 LT |
479 | uint16_t mii_reg; |
480 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
481 | mii_reg |= MII_CR_POWER_DOWN; | |
482 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
4e48a2b9 | 483 | mdelay(1); |
1da177e4 LT |
484 | } |
485 | } | |
486 | ||
487 | void | |
488 | e1000_reset(struct e1000_adapter *adapter) | |
489 | { | |
2d7edb92 | 490 | uint32_t pba, manc; |
1125ecbc | 491 | uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; |
1da177e4 LT |
492 | |
493 | /* Repartition Pba for greater than 9k mtu | |
494 | * To take effect CTRL.RST is required. | |
495 | */ | |
496 | ||
2d7edb92 MC |
497 | switch (adapter->hw.mac_type) { |
498 | case e1000_82547: | |
0e6ef3e0 | 499 | case e1000_82547_rev_2: |
2d7edb92 MC |
500 | pba = E1000_PBA_30K; |
501 | break; | |
868d5309 MC |
502 | case e1000_82571: |
503 | case e1000_82572: | |
6418ecc6 | 504 | case e1000_80003es2lan: |
868d5309 MC |
505 | pba = E1000_PBA_38K; |
506 | break; | |
2d7edb92 MC |
507 | case e1000_82573: |
508 | pba = E1000_PBA_12K; | |
509 | break; | |
510 | default: | |
511 | pba = E1000_PBA_48K; | |
512 | break; | |
513 | } | |
514 | ||
96838a40 | 515 | if ((adapter->hw.mac_type != e1000_82573) && |
f11b7f85 | 516 | (adapter->netdev->mtu > E1000_RXBUFFER_8192)) |
1125ecbc | 517 | pba -= 8; /* allocate more FIFO for Tx */ |
2d7edb92 MC |
518 | |
519 | ||
96838a40 | 520 | if (adapter->hw.mac_type == e1000_82547) { |
1da177e4 LT |
521 | adapter->tx_fifo_head = 0; |
522 | adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT; | |
523 | adapter->tx_fifo_size = | |
524 | (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT; | |
525 | atomic_set(&adapter->tx_fifo_stall, 0); | |
526 | } | |
2d7edb92 | 527 | |
1da177e4 LT |
528 | E1000_WRITE_REG(&adapter->hw, PBA, pba); |
529 | ||
530 | /* flow control settings */ | |
f11b7f85 JK |
531 | /* Set the FC high water mark to 90% of the FIFO size. |
532 | * Required to clear last 3 LSB */ | |
533 | fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8; | |
534 | ||
535 | adapter->hw.fc_high_water = fc_high_water_mark; | |
536 | adapter->hw.fc_low_water = fc_high_water_mark - 8; | |
87041639 JK |
537 | if (adapter->hw.mac_type == e1000_80003es2lan) |
538 | adapter->hw.fc_pause_time = 0xFFFF; | |
539 | else | |
540 | adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME; | |
1da177e4 LT |
541 | adapter->hw.fc_send_xon = 1; |
542 | adapter->hw.fc = adapter->hw.original_fc; | |
543 | ||
2d7edb92 | 544 | /* Allow time for pending master requests to run */ |
1da177e4 | 545 | e1000_reset_hw(&adapter->hw); |
96838a40 | 546 | if (adapter->hw.mac_type >= e1000_82544) |
1da177e4 | 547 | E1000_WRITE_REG(&adapter->hw, WUC, 0); |
96838a40 | 548 | if (e1000_init_hw(&adapter->hw)) |
1da177e4 | 549 | DPRINTK(PROBE, ERR, "Hardware Error\n"); |
2d7edb92 | 550 | e1000_update_mng_vlan(adapter); |
1da177e4 LT |
551 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ |
552 | E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE); | |
553 | ||
554 | e1000_reset_adaptive(&adapter->hw); | |
555 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
2d7edb92 MC |
556 | if (adapter->en_mng_pt) { |
557 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
558 | manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST); | |
559 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
560 | } | |
1da177e4 LT |
561 | } |
562 | ||
563 | /** | |
564 | * e1000_probe - Device Initialization Routine | |
565 | * @pdev: PCI device information struct | |
566 | * @ent: entry in e1000_pci_tbl | |
567 | * | |
568 | * Returns 0 on success, negative on failure | |
569 | * | |
570 | * e1000_probe initializes an adapter identified by a pci_dev structure. | |
571 | * The OS initialization, configuring of the adapter private structure, | |
572 | * and a hardware reset occur. | |
573 | **/ | |
574 | ||
575 | static int __devinit | |
576 | e1000_probe(struct pci_dev *pdev, | |
577 | const struct pci_device_id *ent) | |
578 | { | |
579 | struct net_device *netdev; | |
580 | struct e1000_adapter *adapter; | |
2d7edb92 | 581 | unsigned long mmio_start, mmio_len; |
2d7edb92 | 582 | |
1da177e4 | 583 | static int cards_found = 0; |
84916829 | 584 | static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */ |
2d7edb92 | 585 | int i, err, pci_using_dac; |
1da177e4 LT |
586 | uint16_t eeprom_data; |
587 | uint16_t eeprom_apme_mask = E1000_EEPROM_APME; | |
96838a40 | 588 | if ((err = pci_enable_device(pdev))) |
1da177e4 LT |
589 | return err; |
590 | ||
96838a40 | 591 | if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) { |
1da177e4 LT |
592 | pci_using_dac = 1; |
593 | } else { | |
96838a40 | 594 | if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) { |
1da177e4 LT |
595 | E1000_ERR("No usable DMA configuration, aborting\n"); |
596 | return err; | |
597 | } | |
598 | pci_using_dac = 0; | |
599 | } | |
600 | ||
96838a40 | 601 | if ((err = pci_request_regions(pdev, e1000_driver_name))) |
1da177e4 LT |
602 | return err; |
603 | ||
604 | pci_set_master(pdev); | |
605 | ||
606 | netdev = alloc_etherdev(sizeof(struct e1000_adapter)); | |
96838a40 | 607 | if (!netdev) { |
1da177e4 LT |
608 | err = -ENOMEM; |
609 | goto err_alloc_etherdev; | |
610 | } | |
611 | ||
612 | SET_MODULE_OWNER(netdev); | |
613 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
614 | ||
615 | pci_set_drvdata(pdev, netdev); | |
60490fe0 | 616 | adapter = netdev_priv(netdev); |
1da177e4 LT |
617 | adapter->netdev = netdev; |
618 | adapter->pdev = pdev; | |
619 | adapter->hw.back = adapter; | |
620 | adapter->msg_enable = (1 << debug) - 1; | |
621 | ||
622 | mmio_start = pci_resource_start(pdev, BAR_0); | |
623 | mmio_len = pci_resource_len(pdev, BAR_0); | |
624 | ||
625 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); | |
96838a40 | 626 | if (!adapter->hw.hw_addr) { |
1da177e4 LT |
627 | err = -EIO; |
628 | goto err_ioremap; | |
629 | } | |
630 | ||
96838a40 JB |
631 | for (i = BAR_1; i <= BAR_5; i++) { |
632 | if (pci_resource_len(pdev, i) == 0) | |
1da177e4 | 633 | continue; |
96838a40 | 634 | if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { |
1da177e4 LT |
635 | adapter->hw.io_base = pci_resource_start(pdev, i); |
636 | break; | |
637 | } | |
638 | } | |
639 | ||
640 | netdev->open = &e1000_open; | |
641 | netdev->stop = &e1000_close; | |
642 | netdev->hard_start_xmit = &e1000_xmit_frame; | |
643 | netdev->get_stats = &e1000_get_stats; | |
644 | netdev->set_multicast_list = &e1000_set_multi; | |
645 | netdev->set_mac_address = &e1000_set_mac; | |
646 | netdev->change_mtu = &e1000_change_mtu; | |
647 | netdev->do_ioctl = &e1000_ioctl; | |
648 | e1000_set_ethtool_ops(netdev); | |
649 | netdev->tx_timeout = &e1000_tx_timeout; | |
650 | netdev->watchdog_timeo = 5 * HZ; | |
651 | #ifdef CONFIG_E1000_NAPI | |
652 | netdev->poll = &e1000_clean; | |
653 | netdev->weight = 64; | |
654 | #endif | |
655 | netdev->vlan_rx_register = e1000_vlan_rx_register; | |
656 | netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid; | |
657 | netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid; | |
658 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
659 | netdev->poll_controller = e1000_netpoll; | |
660 | #endif | |
661 | strcpy(netdev->name, pci_name(pdev)); | |
662 | ||
663 | netdev->mem_start = mmio_start; | |
664 | netdev->mem_end = mmio_start + mmio_len; | |
665 | netdev->base_addr = adapter->hw.io_base; | |
666 | ||
667 | adapter->bd_number = cards_found; | |
668 | ||
669 | /* setup the private structure */ | |
670 | ||
96838a40 | 671 | if ((err = e1000_sw_init(adapter))) |
1da177e4 LT |
672 | goto err_sw_init; |
673 | ||
96838a40 | 674 | if ((err = e1000_check_phy_reset_block(&adapter->hw))) |
2d7edb92 MC |
675 | DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n"); |
676 | ||
84916829 | 677 | /* if ksp3, indicate if it's port a being setup */ |
76c224bc AK |
678 | if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 && |
679 | e1000_ksp3_port_a == 0) | |
84916829 JK |
680 | adapter->ksp3_port_a = 1; |
681 | e1000_ksp3_port_a++; | |
682 | /* Reset for multiple KP3 adapters */ | |
683 | if (e1000_ksp3_port_a == 4) | |
684 | e1000_ksp3_port_a = 0; | |
685 | ||
96838a40 | 686 | if (adapter->hw.mac_type >= e1000_82543) { |
1da177e4 LT |
687 | netdev->features = NETIF_F_SG | |
688 | NETIF_F_HW_CSUM | | |
689 | NETIF_F_HW_VLAN_TX | | |
690 | NETIF_F_HW_VLAN_RX | | |
691 | NETIF_F_HW_VLAN_FILTER; | |
692 | } | |
693 | ||
694 | #ifdef NETIF_F_TSO | |
96838a40 | 695 | if ((adapter->hw.mac_type >= e1000_82544) && |
1da177e4 LT |
696 | (adapter->hw.mac_type != e1000_82547)) |
697 | netdev->features |= NETIF_F_TSO; | |
2d7edb92 MC |
698 | |
699 | #ifdef NETIF_F_TSO_IPV6 | |
96838a40 | 700 | if (adapter->hw.mac_type > e1000_82547_rev_2) |
2d7edb92 MC |
701 | netdev->features |= NETIF_F_TSO_IPV6; |
702 | #endif | |
1da177e4 | 703 | #endif |
96838a40 | 704 | if (pci_using_dac) |
1da177e4 LT |
705 | netdev->features |= NETIF_F_HIGHDMA; |
706 | ||
76c224bc AK |
707 | /* hard_start_xmit is safe against parallel locking */ |
708 | netdev->features |= NETIF_F_LLTX; | |
709 | ||
2d7edb92 MC |
710 | adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw); |
711 | ||
96838a40 | 712 | /* before reading the EEPROM, reset the controller to |
1da177e4 | 713 | * put the device in a known good starting state */ |
96838a40 | 714 | |
1da177e4 LT |
715 | e1000_reset_hw(&adapter->hw); |
716 | ||
717 | /* make sure the EEPROM is good */ | |
718 | ||
96838a40 | 719 | if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) { |
1da177e4 LT |
720 | DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n"); |
721 | err = -EIO; | |
722 | goto err_eeprom; | |
723 | } | |
724 | ||
725 | /* copy the MAC address out of the EEPROM */ | |
726 | ||
96838a40 | 727 | if (e1000_read_mac_addr(&adapter->hw)) |
1da177e4 LT |
728 | DPRINTK(PROBE, ERR, "EEPROM Read Error\n"); |
729 | memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); | |
9beb0ac1 | 730 | memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); |
1da177e4 | 731 | |
96838a40 | 732 | if (!is_valid_ether_addr(netdev->perm_addr)) { |
1da177e4 LT |
733 | DPRINTK(PROBE, ERR, "Invalid MAC Address\n"); |
734 | err = -EIO; | |
735 | goto err_eeprom; | |
736 | } | |
737 | ||
738 | e1000_read_part_num(&adapter->hw, &(adapter->part_num)); | |
739 | ||
740 | e1000_get_bus_info(&adapter->hw); | |
741 | ||
742 | init_timer(&adapter->tx_fifo_stall_timer); | |
743 | adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall; | |
744 | adapter->tx_fifo_stall_timer.data = (unsigned long) adapter; | |
745 | ||
746 | init_timer(&adapter->watchdog_timer); | |
747 | adapter->watchdog_timer.function = &e1000_watchdog; | |
748 | adapter->watchdog_timer.data = (unsigned long) adapter; | |
749 | ||
750 | INIT_WORK(&adapter->watchdog_task, | |
751 | (void (*)(void *))e1000_watchdog_task, adapter); | |
752 | ||
753 | init_timer(&adapter->phy_info_timer); | |
754 | adapter->phy_info_timer.function = &e1000_update_phy_info; | |
755 | adapter->phy_info_timer.data = (unsigned long) adapter; | |
756 | ||
87041639 JK |
757 | INIT_WORK(&adapter->reset_task, |
758 | (void (*)(void *))e1000_reset_task, netdev); | |
1da177e4 LT |
759 | |
760 | /* we're going to reset, so assume we have no link for now */ | |
761 | ||
762 | netif_carrier_off(netdev); | |
763 | netif_stop_queue(netdev); | |
764 | ||
765 | e1000_check_options(adapter); | |
766 | ||
767 | /* Initial Wake on LAN setting | |
768 | * If APM wake is enabled in the EEPROM, | |
769 | * enable the ACPI Magic Packet filter | |
770 | */ | |
771 | ||
96838a40 | 772 | switch (adapter->hw.mac_type) { |
1da177e4 LT |
773 | case e1000_82542_rev2_0: |
774 | case e1000_82542_rev2_1: | |
775 | case e1000_82543: | |
776 | break; | |
777 | case e1000_82544: | |
778 | e1000_read_eeprom(&adapter->hw, | |
779 | EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); | |
780 | eeprom_apme_mask = E1000_EEPROM_82544_APM; | |
781 | break; | |
782 | case e1000_82546: | |
783 | case e1000_82546_rev_3: | |
fd803241 | 784 | case e1000_82571: |
6418ecc6 | 785 | case e1000_80003es2lan: |
96838a40 | 786 | if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){ |
1da177e4 LT |
787 | e1000_read_eeprom(&adapter->hw, |
788 | EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); | |
789 | break; | |
790 | } | |
791 | /* Fall Through */ | |
792 | default: | |
793 | e1000_read_eeprom(&adapter->hw, | |
794 | EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); | |
795 | break; | |
796 | } | |
96838a40 | 797 | if (eeprom_data & eeprom_apme_mask) |
1da177e4 LT |
798 | adapter->wol |= E1000_WUFC_MAG; |
799 | ||
fb3d47d4 JK |
800 | /* print bus type/speed/width info */ |
801 | { | |
802 | struct e1000_hw *hw = &adapter->hw; | |
803 | DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ", | |
804 | ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : | |
805 | (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")), | |
806 | ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" : | |
807 | (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" : | |
808 | (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" : | |
809 | (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" : | |
810 | (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"), | |
811 | ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : | |
812 | (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" : | |
813 | (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" : | |
814 | "32-bit")); | |
815 | } | |
816 | ||
817 | for (i = 0; i < 6; i++) | |
818 | printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':'); | |
819 | ||
1da177e4 LT |
820 | /* reset the hardware with the new settings */ |
821 | e1000_reset(adapter); | |
822 | ||
b55ccb35 JK |
823 | /* If the controller is 82573 and f/w is AMT, do not set |
824 | * DRV_LOAD until the interface is up. For all other cases, | |
825 | * let the f/w know that the h/w is now under the control | |
826 | * of the driver. */ | |
827 | if (adapter->hw.mac_type != e1000_82573 || | |
828 | !e1000_check_mng_mode(&adapter->hw)) | |
829 | e1000_get_hw_control(adapter); | |
2d7edb92 | 830 | |
1da177e4 | 831 | strcpy(netdev->name, "eth%d"); |
96838a40 | 832 | if ((err = register_netdev(netdev))) |
1da177e4 LT |
833 | goto err_register; |
834 | ||
835 | DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); | |
836 | ||
837 | cards_found++; | |
838 | return 0; | |
839 | ||
840 | err_register: | |
841 | err_sw_init: | |
842 | err_eeprom: | |
843 | iounmap(adapter->hw.hw_addr); | |
844 | err_ioremap: | |
845 | free_netdev(netdev); | |
846 | err_alloc_etherdev: | |
847 | pci_release_regions(pdev); | |
848 | return err; | |
849 | } | |
850 | ||
851 | /** | |
852 | * e1000_remove - Device Removal Routine | |
853 | * @pdev: PCI device information struct | |
854 | * | |
855 | * e1000_remove is called by the PCI subsystem to alert the driver | |
856 | * that it should release a PCI device. The could be caused by a | |
857 | * Hot-Plug event, or because the driver is going to be removed from | |
858 | * memory. | |
859 | **/ | |
860 | ||
861 | static void __devexit | |
862 | e1000_remove(struct pci_dev *pdev) | |
863 | { | |
864 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 865 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 866 | uint32_t manc; |
581d708e MC |
867 | #ifdef CONFIG_E1000_NAPI |
868 | int i; | |
869 | #endif | |
1da177e4 | 870 | |
be2b28ed JG |
871 | flush_scheduled_work(); |
872 | ||
96838a40 | 873 | if (adapter->hw.mac_type >= e1000_82540 && |
1da177e4 LT |
874 | adapter->hw.media_type == e1000_media_type_copper) { |
875 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
96838a40 | 876 | if (manc & E1000_MANC_SMBUS_EN) { |
1da177e4 LT |
877 | manc |= E1000_MANC_ARP_EN; |
878 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
879 | } | |
880 | } | |
881 | ||
b55ccb35 JK |
882 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
883 | * would have already happened in close and is redundant. */ | |
884 | e1000_release_hw_control(adapter); | |
2d7edb92 | 885 | |
1da177e4 | 886 | unregister_netdev(netdev); |
581d708e | 887 | #ifdef CONFIG_E1000_NAPI |
f56799ea | 888 | for (i = 0; i < adapter->num_rx_queues; i++) |
15333061 | 889 | dev_put(&adapter->polling_netdev[i]); |
581d708e | 890 | #endif |
1da177e4 | 891 | |
96838a40 | 892 | if (!e1000_check_phy_reset_block(&adapter->hw)) |
2d7edb92 | 893 | e1000_phy_hw_reset(&adapter->hw); |
1da177e4 | 894 | |
24025e4e MC |
895 | kfree(adapter->tx_ring); |
896 | kfree(adapter->rx_ring); | |
897 | #ifdef CONFIG_E1000_NAPI | |
898 | kfree(adapter->polling_netdev); | |
899 | #endif | |
900 | ||
1da177e4 LT |
901 | iounmap(adapter->hw.hw_addr); |
902 | pci_release_regions(pdev); | |
903 | ||
904 | free_netdev(netdev); | |
905 | ||
906 | pci_disable_device(pdev); | |
907 | } | |
908 | ||
909 | /** | |
910 | * e1000_sw_init - Initialize general software structures (struct e1000_adapter) | |
911 | * @adapter: board private structure to initialize | |
912 | * | |
913 | * e1000_sw_init initializes the Adapter private data structure. | |
914 | * Fields are initialized based on PCI device information and | |
915 | * OS network device settings (MTU size). | |
916 | **/ | |
917 | ||
918 | static int __devinit | |
919 | e1000_sw_init(struct e1000_adapter *adapter) | |
920 | { | |
921 | struct e1000_hw *hw = &adapter->hw; | |
922 | struct net_device *netdev = adapter->netdev; | |
923 | struct pci_dev *pdev = adapter->pdev; | |
581d708e MC |
924 | #ifdef CONFIG_E1000_NAPI |
925 | int i; | |
926 | #endif | |
1da177e4 LT |
927 | |
928 | /* PCI config space info */ | |
929 | ||
930 | hw->vendor_id = pdev->vendor; | |
931 | hw->device_id = pdev->device; | |
932 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
933 | hw->subsystem_id = pdev->subsystem_device; | |
934 | ||
935 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
936 | ||
937 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); | |
938 | ||
9e2feace AK |
939 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE; |
940 | adapter->rx_ps_bsize0 = E1000_RXBUFFER_128; | |
1da177e4 LT |
941 | hw->max_frame_size = netdev->mtu + |
942 | ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; | |
943 | hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; | |
944 | ||
945 | /* identify the MAC */ | |
946 | ||
96838a40 | 947 | if (e1000_set_mac_type(hw)) { |
1da177e4 LT |
948 | DPRINTK(PROBE, ERR, "Unknown MAC Type\n"); |
949 | return -EIO; | |
950 | } | |
951 | ||
952 | /* initialize eeprom parameters */ | |
953 | ||
96838a40 | 954 | if (e1000_init_eeprom_params(hw)) { |
2d7edb92 MC |
955 | E1000_ERR("EEPROM initialization failed\n"); |
956 | return -EIO; | |
957 | } | |
1da177e4 | 958 | |
96838a40 | 959 | switch (hw->mac_type) { |
1da177e4 LT |
960 | default: |
961 | break; | |
962 | case e1000_82541: | |
963 | case e1000_82547: | |
964 | case e1000_82541_rev_2: | |
965 | case e1000_82547_rev_2: | |
966 | hw->phy_init_script = 1; | |
967 | break; | |
968 | } | |
969 | ||
970 | e1000_set_media_type(hw); | |
971 | ||
972 | hw->wait_autoneg_complete = FALSE; | |
973 | hw->tbi_compatibility_en = TRUE; | |
974 | hw->adaptive_ifs = TRUE; | |
975 | ||
976 | /* Copper options */ | |
977 | ||
96838a40 | 978 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
979 | hw->mdix = AUTO_ALL_MODES; |
980 | hw->disable_polarity_correction = FALSE; | |
981 | hw->master_slave = E1000_MASTER_SLAVE; | |
982 | } | |
983 | ||
f56799ea JK |
984 | adapter->num_tx_queues = 1; |
985 | adapter->num_rx_queues = 1; | |
581d708e MC |
986 | |
987 | if (e1000_alloc_queues(adapter)) { | |
988 | DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n"); | |
989 | return -ENOMEM; | |
990 | } | |
991 | ||
992 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 993 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
994 | adapter->polling_netdev[i].priv = adapter; |
995 | adapter->polling_netdev[i].poll = &e1000_clean; | |
996 | adapter->polling_netdev[i].weight = 64; | |
997 | dev_hold(&adapter->polling_netdev[i]); | |
998 | set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state); | |
999 | } | |
7bfa4816 | 1000 | spin_lock_init(&adapter->tx_queue_lock); |
24025e4e MC |
1001 | #endif |
1002 | ||
1da177e4 LT |
1003 | atomic_set(&adapter->irq_sem, 1); |
1004 | spin_lock_init(&adapter->stats_lock); | |
1da177e4 LT |
1005 | |
1006 | return 0; | |
1007 | } | |
1008 | ||
581d708e MC |
1009 | /** |
1010 | * e1000_alloc_queues - Allocate memory for all rings | |
1011 | * @adapter: board private structure to initialize | |
1012 | * | |
1013 | * We allocate one ring per queue at run-time since we don't know the | |
1014 | * number of queues at compile-time. The polling_netdev array is | |
1015 | * intended for Multiqueue, but should work fine with a single queue. | |
1016 | **/ | |
1017 | ||
1018 | static int __devinit | |
1019 | e1000_alloc_queues(struct e1000_adapter *adapter) | |
1020 | { | |
1021 | int size; | |
1022 | ||
f56799ea | 1023 | size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues; |
581d708e MC |
1024 | adapter->tx_ring = kmalloc(size, GFP_KERNEL); |
1025 | if (!adapter->tx_ring) | |
1026 | return -ENOMEM; | |
1027 | memset(adapter->tx_ring, 0, size); | |
1028 | ||
f56799ea | 1029 | size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues; |
581d708e MC |
1030 | adapter->rx_ring = kmalloc(size, GFP_KERNEL); |
1031 | if (!adapter->rx_ring) { | |
1032 | kfree(adapter->tx_ring); | |
1033 | return -ENOMEM; | |
1034 | } | |
1035 | memset(adapter->rx_ring, 0, size); | |
1036 | ||
1037 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1038 | size = sizeof(struct net_device) * adapter->num_rx_queues; |
581d708e MC |
1039 | adapter->polling_netdev = kmalloc(size, GFP_KERNEL); |
1040 | if (!adapter->polling_netdev) { | |
1041 | kfree(adapter->tx_ring); | |
1042 | kfree(adapter->rx_ring); | |
1043 | return -ENOMEM; | |
1044 | } | |
1045 | memset(adapter->polling_netdev, 0, size); | |
1046 | #endif | |
1047 | ||
1048 | return E1000_SUCCESS; | |
1049 | } | |
1050 | ||
1da177e4 LT |
1051 | /** |
1052 | * e1000_open - Called when a network interface is made active | |
1053 | * @netdev: network interface device structure | |
1054 | * | |
1055 | * Returns 0 on success, negative value on failure | |
1056 | * | |
1057 | * The open entry point is called when a network interface is made | |
1058 | * active by the system (IFF_UP). At this point all resources needed | |
1059 | * for transmit and receive operations are allocated, the interrupt | |
1060 | * handler is registered with the OS, the watchdog timer is started, | |
1061 | * and the stack is notified that the interface is ready. | |
1062 | **/ | |
1063 | ||
1064 | static int | |
1065 | e1000_open(struct net_device *netdev) | |
1066 | { | |
60490fe0 | 1067 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1068 | int err; |
1069 | ||
1070 | /* allocate transmit descriptors */ | |
1071 | ||
581d708e | 1072 | if ((err = e1000_setup_all_tx_resources(adapter))) |
1da177e4 LT |
1073 | goto err_setup_tx; |
1074 | ||
1075 | /* allocate receive descriptors */ | |
1076 | ||
581d708e | 1077 | if ((err = e1000_setup_all_rx_resources(adapter))) |
1da177e4 LT |
1078 | goto err_setup_rx; |
1079 | ||
96838a40 | 1080 | if ((err = e1000_up(adapter))) |
1da177e4 | 1081 | goto err_up; |
2d7edb92 | 1082 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; |
96838a40 | 1083 | if ((adapter->hw.mng_cookie.status & |
2d7edb92 MC |
1084 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1085 | e1000_update_mng_vlan(adapter); | |
1086 | } | |
1da177e4 | 1087 | |
b55ccb35 JK |
1088 | /* If AMT is enabled, let the firmware know that the network |
1089 | * interface is now open */ | |
1090 | if (adapter->hw.mac_type == e1000_82573 && | |
1091 | e1000_check_mng_mode(&adapter->hw)) | |
1092 | e1000_get_hw_control(adapter); | |
1093 | ||
1da177e4 LT |
1094 | return E1000_SUCCESS; |
1095 | ||
1096 | err_up: | |
581d708e | 1097 | e1000_free_all_rx_resources(adapter); |
1da177e4 | 1098 | err_setup_rx: |
581d708e | 1099 | e1000_free_all_tx_resources(adapter); |
1da177e4 LT |
1100 | err_setup_tx: |
1101 | e1000_reset(adapter); | |
1102 | ||
1103 | return err; | |
1104 | } | |
1105 | ||
1106 | /** | |
1107 | * e1000_close - Disables a network interface | |
1108 | * @netdev: network interface device structure | |
1109 | * | |
1110 | * Returns 0, this is not allowed to fail | |
1111 | * | |
1112 | * The close entry point is called when an interface is de-activated | |
1113 | * by the OS. The hardware is still under the drivers control, but | |
1114 | * needs to be disabled. A global MAC reset is issued to stop the | |
1115 | * hardware, and all transmit and receive resources are freed. | |
1116 | **/ | |
1117 | ||
1118 | static int | |
1119 | e1000_close(struct net_device *netdev) | |
1120 | { | |
60490fe0 | 1121 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1122 | |
1123 | e1000_down(adapter); | |
1124 | ||
581d708e MC |
1125 | e1000_free_all_tx_resources(adapter); |
1126 | e1000_free_all_rx_resources(adapter); | |
1da177e4 | 1127 | |
96838a40 | 1128 | if ((adapter->hw.mng_cookie.status & |
2d7edb92 MC |
1129 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1130 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); | |
1131 | } | |
b55ccb35 JK |
1132 | |
1133 | /* If AMT is enabled, let the firmware know that the network | |
1134 | * interface is now closed */ | |
1135 | if (adapter->hw.mac_type == e1000_82573 && | |
1136 | e1000_check_mng_mode(&adapter->hw)) | |
1137 | e1000_release_hw_control(adapter); | |
1138 | ||
1da177e4 LT |
1139 | return 0; |
1140 | } | |
1141 | ||
1142 | /** | |
1143 | * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary | |
1144 | * @adapter: address of board private structure | |
2d7edb92 MC |
1145 | * @start: address of beginning of memory |
1146 | * @len: length of memory | |
1da177e4 | 1147 | **/ |
e619d523 | 1148 | static boolean_t |
1da177e4 LT |
1149 | e1000_check_64k_bound(struct e1000_adapter *adapter, |
1150 | void *start, unsigned long len) | |
1151 | { | |
1152 | unsigned long begin = (unsigned long) start; | |
1153 | unsigned long end = begin + len; | |
1154 | ||
2648345f MC |
1155 | /* First rev 82545 and 82546 need to not allow any memory |
1156 | * write location to cross 64k boundary due to errata 23 */ | |
1da177e4 | 1157 | if (adapter->hw.mac_type == e1000_82545 || |
2648345f | 1158 | adapter->hw.mac_type == e1000_82546) { |
1da177e4 LT |
1159 | return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE; |
1160 | } | |
1161 | ||
1162 | return TRUE; | |
1163 | } | |
1164 | ||
1165 | /** | |
1166 | * e1000_setup_tx_resources - allocate Tx resources (Descriptors) | |
1167 | * @adapter: board private structure | |
581d708e | 1168 | * @txdr: tx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1169 | * |
1170 | * Return 0 on success, negative on failure | |
1171 | **/ | |
1172 | ||
3ad2cc67 | 1173 | static int |
581d708e MC |
1174 | e1000_setup_tx_resources(struct e1000_adapter *adapter, |
1175 | struct e1000_tx_ring *txdr) | |
1da177e4 | 1176 | { |
1da177e4 LT |
1177 | struct pci_dev *pdev = adapter->pdev; |
1178 | int size; | |
1179 | ||
1180 | size = sizeof(struct e1000_buffer) * txdr->count; | |
a7ec15da RT |
1181 | |
1182 | txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus)); | |
96838a40 | 1183 | if (!txdr->buffer_info) { |
2648345f MC |
1184 | DPRINTK(PROBE, ERR, |
1185 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1186 | return -ENOMEM; |
1187 | } | |
1188 | memset(txdr->buffer_info, 0, size); | |
1189 | ||
1190 | /* round up to nearest 4K */ | |
1191 | ||
1192 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
1193 | E1000_ROUNDUP(txdr->size, 4096); | |
1194 | ||
1195 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); | |
96838a40 | 1196 | if (!txdr->desc) { |
1da177e4 | 1197 | setup_tx_desc_die: |
1da177e4 | 1198 | vfree(txdr->buffer_info); |
2648345f MC |
1199 | DPRINTK(PROBE, ERR, |
1200 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1201 | return -ENOMEM; |
1202 | } | |
1203 | ||
2648345f | 1204 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1205 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { |
1206 | void *olddesc = txdr->desc; | |
1207 | dma_addr_t olddma = txdr->dma; | |
2648345f MC |
1208 | DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes " |
1209 | "at %p\n", txdr->size, txdr->desc); | |
1210 | /* Try again, without freeing the previous */ | |
1da177e4 | 1211 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); |
2648345f | 1212 | /* Failed allocation, critical failure */ |
96838a40 | 1213 | if (!txdr->desc) { |
1da177e4 LT |
1214 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1215 | goto setup_tx_desc_die; | |
1216 | } | |
1217 | ||
1218 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { | |
1219 | /* give up */ | |
2648345f MC |
1220 | pci_free_consistent(pdev, txdr->size, txdr->desc, |
1221 | txdr->dma); | |
1da177e4 LT |
1222 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1223 | DPRINTK(PROBE, ERR, | |
2648345f MC |
1224 | "Unable to allocate aligned memory " |
1225 | "for the transmit descriptor ring\n"); | |
1da177e4 LT |
1226 | vfree(txdr->buffer_info); |
1227 | return -ENOMEM; | |
1228 | } else { | |
2648345f | 1229 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1230 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1231 | } | |
1232 | } | |
1233 | memset(txdr->desc, 0, txdr->size); | |
1234 | ||
1235 | txdr->next_to_use = 0; | |
1236 | txdr->next_to_clean = 0; | |
2ae76d98 | 1237 | spin_lock_init(&txdr->tx_lock); |
1da177e4 LT |
1238 | |
1239 | return 0; | |
1240 | } | |
1241 | ||
581d708e MC |
1242 | /** |
1243 | * e1000_setup_all_tx_resources - wrapper to allocate Tx resources | |
1244 | * (Descriptors) for all queues | |
1245 | * @adapter: board private structure | |
1246 | * | |
1247 | * If this function returns with an error, then it's possible one or | |
1248 | * more of the rings is populated (while the rest are not). It is the | |
1249 | * callers duty to clean those orphaned rings. | |
1250 | * | |
1251 | * Return 0 on success, negative on failure | |
1252 | **/ | |
1253 | ||
1254 | int | |
1255 | e1000_setup_all_tx_resources(struct e1000_adapter *adapter) | |
1256 | { | |
1257 | int i, err = 0; | |
1258 | ||
f56799ea | 1259 | for (i = 0; i < adapter->num_tx_queues; i++) { |
581d708e MC |
1260 | err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]); |
1261 | if (err) { | |
1262 | DPRINTK(PROBE, ERR, | |
1263 | "Allocation for Tx Queue %u failed\n", i); | |
1264 | break; | |
1265 | } | |
1266 | } | |
1267 | ||
1268 | return err; | |
1269 | } | |
1270 | ||
1da177e4 LT |
1271 | /** |
1272 | * e1000_configure_tx - Configure 8254x Transmit Unit after Reset | |
1273 | * @adapter: board private structure | |
1274 | * | |
1275 | * Configure the Tx unit of the MAC after a reset. | |
1276 | **/ | |
1277 | ||
1278 | static void | |
1279 | e1000_configure_tx(struct e1000_adapter *adapter) | |
1280 | { | |
581d708e MC |
1281 | uint64_t tdba; |
1282 | struct e1000_hw *hw = &adapter->hw; | |
1283 | uint32_t tdlen, tctl, tipg, tarc; | |
0fadb059 | 1284 | uint32_t ipgr1, ipgr2; |
1da177e4 LT |
1285 | |
1286 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
1287 | ||
f56799ea | 1288 | switch (adapter->num_tx_queues) { |
24025e4e MC |
1289 | case 1: |
1290 | default: | |
581d708e MC |
1291 | tdba = adapter->tx_ring[0].dma; |
1292 | tdlen = adapter->tx_ring[0].count * | |
1293 | sizeof(struct e1000_tx_desc); | |
1294 | E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL)); | |
1295 | E1000_WRITE_REG(hw, TDBAH, (tdba >> 32)); | |
1296 | E1000_WRITE_REG(hw, TDLEN, tdlen); | |
1297 | E1000_WRITE_REG(hw, TDH, 0); | |
1298 | E1000_WRITE_REG(hw, TDT, 0); | |
1299 | adapter->tx_ring[0].tdh = E1000_TDH; | |
1300 | adapter->tx_ring[0].tdt = E1000_TDT; | |
24025e4e MC |
1301 | break; |
1302 | } | |
1da177e4 LT |
1303 | |
1304 | /* Set the default values for the Tx Inter Packet Gap timer */ | |
1305 | ||
0fadb059 JK |
1306 | if (hw->media_type == e1000_media_type_fiber || |
1307 | hw->media_type == e1000_media_type_internal_serdes) | |
1308 | tipg = DEFAULT_82543_TIPG_IPGT_FIBER; | |
1309 | else | |
1310 | tipg = DEFAULT_82543_TIPG_IPGT_COPPER; | |
1311 | ||
581d708e | 1312 | switch (hw->mac_type) { |
1da177e4 LT |
1313 | case e1000_82542_rev2_0: |
1314 | case e1000_82542_rev2_1: | |
1315 | tipg = DEFAULT_82542_TIPG_IPGT; | |
0fadb059 JK |
1316 | ipgr1 = DEFAULT_82542_TIPG_IPGR1; |
1317 | ipgr2 = DEFAULT_82542_TIPG_IPGR2; | |
1da177e4 | 1318 | break; |
87041639 JK |
1319 | case e1000_80003es2lan: |
1320 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; | |
1321 | ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; | |
1322 | break; | |
1da177e4 | 1323 | default: |
0fadb059 JK |
1324 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; |
1325 | ipgr2 = DEFAULT_82543_TIPG_IPGR2; | |
1326 | break; | |
1da177e4 | 1327 | } |
0fadb059 JK |
1328 | tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; |
1329 | tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; | |
581d708e | 1330 | E1000_WRITE_REG(hw, TIPG, tipg); |
1da177e4 LT |
1331 | |
1332 | /* Set the Tx Interrupt Delay register */ | |
1333 | ||
581d708e MC |
1334 | E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay); |
1335 | if (hw->mac_type >= e1000_82540) | |
1336 | E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay); | |
1da177e4 LT |
1337 | |
1338 | /* Program the Transmit Control Register */ | |
1339 | ||
581d708e | 1340 | tctl = E1000_READ_REG(hw, TCTL); |
1da177e4 LT |
1341 | |
1342 | tctl &= ~E1000_TCTL_CT; | |
7e6c9861 | 1343 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | |
1da177e4 LT |
1344 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1345 | ||
7e6c9861 JK |
1346 | #ifdef DISABLE_MULR |
1347 | /* disable Multiple Reads for debugging */ | |
1348 | tctl &= ~E1000_TCTL_MULR; | |
1349 | #endif | |
1da177e4 | 1350 | |
2ae76d98 MC |
1351 | if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { |
1352 | tarc = E1000_READ_REG(hw, TARC0); | |
1353 | tarc |= ((1 << 25) | (1 << 21)); | |
1354 | E1000_WRITE_REG(hw, TARC0, tarc); | |
1355 | tarc = E1000_READ_REG(hw, TARC1); | |
1356 | tarc |= (1 << 25); | |
1357 | if (tctl & E1000_TCTL_MULR) | |
1358 | tarc &= ~(1 << 28); | |
1359 | else | |
1360 | tarc |= (1 << 28); | |
1361 | E1000_WRITE_REG(hw, TARC1, tarc); | |
87041639 JK |
1362 | } else if (hw->mac_type == e1000_80003es2lan) { |
1363 | tarc = E1000_READ_REG(hw, TARC0); | |
1364 | tarc |= 1; | |
1365 | if (hw->media_type == e1000_media_type_internal_serdes) | |
1366 | tarc |= (1 << 20); | |
1367 | E1000_WRITE_REG(hw, TARC0, tarc); | |
1368 | tarc = E1000_READ_REG(hw, TARC1); | |
1369 | tarc |= 1; | |
1370 | E1000_WRITE_REG(hw, TARC1, tarc); | |
2ae76d98 MC |
1371 | } |
1372 | ||
581d708e | 1373 | e1000_config_collision_dist(hw); |
1da177e4 LT |
1374 | |
1375 | /* Setup Transmit Descriptor Settings for eop descriptor */ | |
1376 | adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP | | |
1377 | E1000_TXD_CMD_IFCS; | |
1378 | ||
581d708e | 1379 | if (hw->mac_type < e1000_82543) |
1da177e4 LT |
1380 | adapter->txd_cmd |= E1000_TXD_CMD_RPS; |
1381 | else | |
1382 | adapter->txd_cmd |= E1000_TXD_CMD_RS; | |
1383 | ||
1384 | /* Cache if we're 82544 running in PCI-X because we'll | |
1385 | * need this to apply a workaround later in the send path. */ | |
581d708e MC |
1386 | if (hw->mac_type == e1000_82544 && |
1387 | hw->bus_type == e1000_bus_type_pcix) | |
1da177e4 | 1388 | adapter->pcix_82544 = 1; |
7e6c9861 JK |
1389 | |
1390 | E1000_WRITE_REG(hw, TCTL, tctl); | |
1391 | ||
1da177e4 LT |
1392 | } |
1393 | ||
1394 | /** | |
1395 | * e1000_setup_rx_resources - allocate Rx resources (Descriptors) | |
1396 | * @adapter: board private structure | |
581d708e | 1397 | * @rxdr: rx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1398 | * |
1399 | * Returns 0 on success, negative on failure | |
1400 | **/ | |
1401 | ||
3ad2cc67 | 1402 | static int |
581d708e MC |
1403 | e1000_setup_rx_resources(struct e1000_adapter *adapter, |
1404 | struct e1000_rx_ring *rxdr) | |
1da177e4 | 1405 | { |
1da177e4 | 1406 | struct pci_dev *pdev = adapter->pdev; |
2d7edb92 | 1407 | int size, desc_len; |
1da177e4 LT |
1408 | |
1409 | size = sizeof(struct e1000_buffer) * rxdr->count; | |
a7ec15da | 1410 | rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus)); |
581d708e | 1411 | if (!rxdr->buffer_info) { |
2648345f MC |
1412 | DPRINTK(PROBE, ERR, |
1413 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 LT |
1414 | return -ENOMEM; |
1415 | } | |
1416 | memset(rxdr->buffer_info, 0, size); | |
1417 | ||
2d7edb92 MC |
1418 | size = sizeof(struct e1000_ps_page) * rxdr->count; |
1419 | rxdr->ps_page = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1420 | if (!rxdr->ps_page) { |
2d7edb92 MC |
1421 | vfree(rxdr->buffer_info); |
1422 | DPRINTK(PROBE, ERR, | |
1423 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1424 | return -ENOMEM; | |
1425 | } | |
1426 | memset(rxdr->ps_page, 0, size); | |
1427 | ||
1428 | size = sizeof(struct e1000_ps_page_dma) * rxdr->count; | |
1429 | rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1430 | if (!rxdr->ps_page_dma) { |
2d7edb92 MC |
1431 | vfree(rxdr->buffer_info); |
1432 | kfree(rxdr->ps_page); | |
1433 | DPRINTK(PROBE, ERR, | |
1434 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1435 | return -ENOMEM; | |
1436 | } | |
1437 | memset(rxdr->ps_page_dma, 0, size); | |
1438 | ||
96838a40 | 1439 | if (adapter->hw.mac_type <= e1000_82547_rev_2) |
2d7edb92 MC |
1440 | desc_len = sizeof(struct e1000_rx_desc); |
1441 | else | |
1442 | desc_len = sizeof(union e1000_rx_desc_packet_split); | |
1443 | ||
1da177e4 LT |
1444 | /* Round up to nearest 4K */ |
1445 | ||
2d7edb92 | 1446 | rxdr->size = rxdr->count * desc_len; |
1da177e4 LT |
1447 | E1000_ROUNDUP(rxdr->size, 4096); |
1448 | ||
1449 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); | |
1450 | ||
581d708e MC |
1451 | if (!rxdr->desc) { |
1452 | DPRINTK(PROBE, ERR, | |
1453 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 | 1454 | setup_rx_desc_die: |
1da177e4 | 1455 | vfree(rxdr->buffer_info); |
2d7edb92 MC |
1456 | kfree(rxdr->ps_page); |
1457 | kfree(rxdr->ps_page_dma); | |
1da177e4 LT |
1458 | return -ENOMEM; |
1459 | } | |
1460 | ||
2648345f | 1461 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1462 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { |
1463 | void *olddesc = rxdr->desc; | |
1464 | dma_addr_t olddma = rxdr->dma; | |
2648345f MC |
1465 | DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes " |
1466 | "at %p\n", rxdr->size, rxdr->desc); | |
1467 | /* Try again, without freeing the previous */ | |
1da177e4 | 1468 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); |
2648345f | 1469 | /* Failed allocation, critical failure */ |
581d708e | 1470 | if (!rxdr->desc) { |
1da177e4 | 1471 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
581d708e MC |
1472 | DPRINTK(PROBE, ERR, |
1473 | "Unable to allocate memory " | |
1474 | "for the receive descriptor ring\n"); | |
1da177e4 LT |
1475 | goto setup_rx_desc_die; |
1476 | } | |
1477 | ||
1478 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { | |
1479 | /* give up */ | |
2648345f MC |
1480 | pci_free_consistent(pdev, rxdr->size, rxdr->desc, |
1481 | rxdr->dma); | |
1da177e4 | 1482 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
2648345f MC |
1483 | DPRINTK(PROBE, ERR, |
1484 | "Unable to allocate aligned memory " | |
1485 | "for the receive descriptor ring\n"); | |
581d708e | 1486 | goto setup_rx_desc_die; |
1da177e4 | 1487 | } else { |
2648345f | 1488 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1489 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
1490 | } | |
1491 | } | |
1492 | memset(rxdr->desc, 0, rxdr->size); | |
1493 | ||
1494 | rxdr->next_to_clean = 0; | |
1495 | rxdr->next_to_use = 0; | |
1496 | ||
1497 | return 0; | |
1498 | } | |
1499 | ||
581d708e MC |
1500 | /** |
1501 | * e1000_setup_all_rx_resources - wrapper to allocate Rx resources | |
1502 | * (Descriptors) for all queues | |
1503 | * @adapter: board private structure | |
1504 | * | |
1505 | * If this function returns with an error, then it's possible one or | |
1506 | * more of the rings is populated (while the rest are not). It is the | |
1507 | * callers duty to clean those orphaned rings. | |
1508 | * | |
1509 | * Return 0 on success, negative on failure | |
1510 | **/ | |
1511 | ||
1512 | int | |
1513 | e1000_setup_all_rx_resources(struct e1000_adapter *adapter) | |
1514 | { | |
1515 | int i, err = 0; | |
1516 | ||
f56799ea | 1517 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1518 | err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]); |
1519 | if (err) { | |
1520 | DPRINTK(PROBE, ERR, | |
1521 | "Allocation for Rx Queue %u failed\n", i); | |
1522 | break; | |
1523 | } | |
1524 | } | |
1525 | ||
1526 | return err; | |
1527 | } | |
1528 | ||
1da177e4 | 1529 | /** |
2648345f | 1530 | * e1000_setup_rctl - configure the receive control registers |
1da177e4 LT |
1531 | * @adapter: Board private structure |
1532 | **/ | |
e4c811c9 MC |
1533 | #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ |
1534 | (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) | |
1da177e4 LT |
1535 | static void |
1536 | e1000_setup_rctl(struct e1000_adapter *adapter) | |
1537 | { | |
2d7edb92 MC |
1538 | uint32_t rctl, rfctl; |
1539 | uint32_t psrctl = 0; | |
35ec56bb | 1540 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
e4c811c9 MC |
1541 | uint32_t pages = 0; |
1542 | #endif | |
1da177e4 LT |
1543 | |
1544 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1545 | ||
1546 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); | |
1547 | ||
1548 | rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | | |
1549 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1550 | (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); | |
1551 | ||
0fadb059 JK |
1552 | if (adapter->hw.mac_type > e1000_82543) |
1553 | rctl |= E1000_RCTL_SECRC; | |
1554 | ||
1555 | if (adapter->hw.tbi_compatibility_on == 1) | |
1da177e4 LT |
1556 | rctl |= E1000_RCTL_SBP; |
1557 | else | |
1558 | rctl &= ~E1000_RCTL_SBP; | |
1559 | ||
2d7edb92 MC |
1560 | if (adapter->netdev->mtu <= ETH_DATA_LEN) |
1561 | rctl &= ~E1000_RCTL_LPE; | |
1562 | else | |
1563 | rctl |= E1000_RCTL_LPE; | |
1564 | ||
1da177e4 | 1565 | /* Setup buffer sizes */ |
9e2feace AK |
1566 | rctl &= ~E1000_RCTL_SZ_4096; |
1567 | rctl |= E1000_RCTL_BSEX; | |
1568 | switch (adapter->rx_buffer_len) { | |
1569 | case E1000_RXBUFFER_256: | |
1570 | rctl |= E1000_RCTL_SZ_256; | |
1571 | rctl &= ~E1000_RCTL_BSEX; | |
1572 | break; | |
1573 | case E1000_RXBUFFER_512: | |
1574 | rctl |= E1000_RCTL_SZ_512; | |
1575 | rctl &= ~E1000_RCTL_BSEX; | |
1576 | break; | |
1577 | case E1000_RXBUFFER_1024: | |
1578 | rctl |= E1000_RCTL_SZ_1024; | |
1579 | rctl &= ~E1000_RCTL_BSEX; | |
1580 | break; | |
a1415ee6 JK |
1581 | case E1000_RXBUFFER_2048: |
1582 | default: | |
1583 | rctl |= E1000_RCTL_SZ_2048; | |
1584 | rctl &= ~E1000_RCTL_BSEX; | |
1585 | break; | |
1586 | case E1000_RXBUFFER_4096: | |
1587 | rctl |= E1000_RCTL_SZ_4096; | |
1588 | break; | |
1589 | case E1000_RXBUFFER_8192: | |
1590 | rctl |= E1000_RCTL_SZ_8192; | |
1591 | break; | |
1592 | case E1000_RXBUFFER_16384: | |
1593 | rctl |= E1000_RCTL_SZ_16384; | |
1594 | break; | |
2d7edb92 MC |
1595 | } |
1596 | ||
35ec56bb | 1597 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
2d7edb92 MC |
1598 | /* 82571 and greater support packet-split where the protocol |
1599 | * header is placed in skb->data and the packet data is | |
1600 | * placed in pages hanging off of skb_shinfo(skb)->nr_frags. | |
1601 | * In the case of a non-split, skb->data is linearly filled, | |
1602 | * followed by the page buffers. Therefore, skb->data is | |
1603 | * sized to hold the largest protocol header. | |
1604 | */ | |
e4c811c9 MC |
1605 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); |
1606 | if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) && | |
1607 | PAGE_SIZE <= 16384) | |
1608 | adapter->rx_ps_pages = pages; | |
1609 | else | |
1610 | adapter->rx_ps_pages = 0; | |
2d7edb92 | 1611 | #endif |
e4c811c9 | 1612 | if (adapter->rx_ps_pages) { |
2d7edb92 MC |
1613 | /* Configure extra packet-split registers */ |
1614 | rfctl = E1000_READ_REG(&adapter->hw, RFCTL); | |
1615 | rfctl |= E1000_RFCTL_EXTEN; | |
1616 | /* disable IPv6 packet split support */ | |
1617 | rfctl |= E1000_RFCTL_IPV6_DIS; | |
1618 | E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl); | |
1619 | ||
1620 | rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC; | |
96838a40 | 1621 | |
2d7edb92 MC |
1622 | psrctl |= adapter->rx_ps_bsize0 >> |
1623 | E1000_PSRCTL_BSIZE0_SHIFT; | |
e4c811c9 MC |
1624 | |
1625 | switch (adapter->rx_ps_pages) { | |
1626 | case 3: | |
1627 | psrctl |= PAGE_SIZE << | |
1628 | E1000_PSRCTL_BSIZE3_SHIFT; | |
1629 | case 2: | |
1630 | psrctl |= PAGE_SIZE << | |
1631 | E1000_PSRCTL_BSIZE2_SHIFT; | |
1632 | case 1: | |
1633 | psrctl |= PAGE_SIZE >> | |
1634 | E1000_PSRCTL_BSIZE1_SHIFT; | |
1635 | break; | |
1636 | } | |
2d7edb92 MC |
1637 | |
1638 | E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl); | |
1da177e4 LT |
1639 | } |
1640 | ||
1641 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1642 | } | |
1643 | ||
1644 | /** | |
1645 | * e1000_configure_rx - Configure 8254x Receive Unit after Reset | |
1646 | * @adapter: board private structure | |
1647 | * | |
1648 | * Configure the Rx unit of the MAC after a reset. | |
1649 | **/ | |
1650 | ||
1651 | static void | |
1652 | e1000_configure_rx(struct e1000_adapter *adapter) | |
1653 | { | |
581d708e MC |
1654 | uint64_t rdba; |
1655 | struct e1000_hw *hw = &adapter->hw; | |
1656 | uint32_t rdlen, rctl, rxcsum, ctrl_ext; | |
2d7edb92 | 1657 | |
e4c811c9 | 1658 | if (adapter->rx_ps_pages) { |
0f15a8fa | 1659 | /* this is a 32 byte descriptor */ |
581d708e | 1660 | rdlen = adapter->rx_ring[0].count * |
2d7edb92 MC |
1661 | sizeof(union e1000_rx_desc_packet_split); |
1662 | adapter->clean_rx = e1000_clean_rx_irq_ps; | |
1663 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; | |
1664 | } else { | |
581d708e MC |
1665 | rdlen = adapter->rx_ring[0].count * |
1666 | sizeof(struct e1000_rx_desc); | |
2d7edb92 MC |
1667 | adapter->clean_rx = e1000_clean_rx_irq; |
1668 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; | |
1669 | } | |
1da177e4 LT |
1670 | |
1671 | /* disable receives while setting up the descriptors */ | |
581d708e MC |
1672 | rctl = E1000_READ_REG(hw, RCTL); |
1673 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
1da177e4 LT |
1674 | |
1675 | /* set the Receive Delay Timer Register */ | |
581d708e | 1676 | E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay); |
1da177e4 | 1677 | |
581d708e MC |
1678 | if (hw->mac_type >= e1000_82540) { |
1679 | E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay); | |
96838a40 | 1680 | if (adapter->itr > 1) |
581d708e | 1681 | E1000_WRITE_REG(hw, ITR, |
1da177e4 LT |
1682 | 1000000000 / (adapter->itr * 256)); |
1683 | } | |
1684 | ||
2ae76d98 | 1685 | if (hw->mac_type >= e1000_82571) { |
2ae76d98 | 1686 | ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); |
1e613fd9 | 1687 | /* Reset delay timers after every interrupt */ |
6fc7a7ec | 1688 | ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR; |
1e613fd9 JK |
1689 | #ifdef CONFIG_E1000_NAPI |
1690 | /* Auto-Mask interrupts upon ICR read. */ | |
1691 | ctrl_ext |= E1000_CTRL_EXT_IAME; | |
1692 | #endif | |
2ae76d98 | 1693 | E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext); |
1e613fd9 | 1694 | E1000_WRITE_REG(hw, IAM, ~0); |
2ae76d98 MC |
1695 | E1000_WRITE_FLUSH(hw); |
1696 | } | |
1697 | ||
581d708e MC |
1698 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
1699 | * the Base and Length of the Rx Descriptor Ring */ | |
f56799ea | 1700 | switch (adapter->num_rx_queues) { |
24025e4e MC |
1701 | case 1: |
1702 | default: | |
581d708e MC |
1703 | rdba = adapter->rx_ring[0].dma; |
1704 | E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL)); | |
1705 | E1000_WRITE_REG(hw, RDBAH, (rdba >> 32)); | |
1706 | E1000_WRITE_REG(hw, RDLEN, rdlen); | |
1707 | E1000_WRITE_REG(hw, RDH, 0); | |
1708 | E1000_WRITE_REG(hw, RDT, 0); | |
1709 | adapter->rx_ring[0].rdh = E1000_RDH; | |
1710 | adapter->rx_ring[0].rdt = E1000_RDT; | |
1711 | break; | |
24025e4e MC |
1712 | } |
1713 | ||
1da177e4 | 1714 | /* Enable 82543 Receive Checksum Offload for TCP and UDP */ |
581d708e MC |
1715 | if (hw->mac_type >= e1000_82543) { |
1716 | rxcsum = E1000_READ_REG(hw, RXCSUM); | |
96838a40 | 1717 | if (adapter->rx_csum == TRUE) { |
2d7edb92 MC |
1718 | rxcsum |= E1000_RXCSUM_TUOFL; |
1719 | ||
868d5309 | 1720 | /* Enable 82571 IPv4 payload checksum for UDP fragments |
2d7edb92 | 1721 | * Must be used in conjunction with packet-split. */ |
96838a40 JB |
1722 | if ((hw->mac_type >= e1000_82571) && |
1723 | (adapter->rx_ps_pages)) { | |
2d7edb92 MC |
1724 | rxcsum |= E1000_RXCSUM_IPPCSE; |
1725 | } | |
1726 | } else { | |
1727 | rxcsum &= ~E1000_RXCSUM_TUOFL; | |
1728 | /* don't need to clear IPPCSE as it defaults to 0 */ | |
1729 | } | |
581d708e | 1730 | E1000_WRITE_REG(hw, RXCSUM, rxcsum); |
1da177e4 LT |
1731 | } |
1732 | ||
581d708e MC |
1733 | if (hw->mac_type == e1000_82573) |
1734 | E1000_WRITE_REG(hw, ERT, 0x0100); | |
2d7edb92 | 1735 | |
1da177e4 | 1736 | /* Enable Receives */ |
581d708e | 1737 | E1000_WRITE_REG(hw, RCTL, rctl); |
1da177e4 LT |
1738 | } |
1739 | ||
1740 | /** | |
581d708e | 1741 | * e1000_free_tx_resources - Free Tx Resources per Queue |
1da177e4 | 1742 | * @adapter: board private structure |
581d708e | 1743 | * @tx_ring: Tx descriptor ring for a specific queue |
1da177e4 LT |
1744 | * |
1745 | * Free all transmit software resources | |
1746 | **/ | |
1747 | ||
3ad2cc67 | 1748 | static void |
581d708e MC |
1749 | e1000_free_tx_resources(struct e1000_adapter *adapter, |
1750 | struct e1000_tx_ring *tx_ring) | |
1da177e4 LT |
1751 | { |
1752 | struct pci_dev *pdev = adapter->pdev; | |
1753 | ||
581d708e | 1754 | e1000_clean_tx_ring(adapter, tx_ring); |
1da177e4 | 1755 | |
581d708e MC |
1756 | vfree(tx_ring->buffer_info); |
1757 | tx_ring->buffer_info = NULL; | |
1da177e4 | 1758 | |
581d708e | 1759 | pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); |
1da177e4 | 1760 | |
581d708e MC |
1761 | tx_ring->desc = NULL; |
1762 | } | |
1763 | ||
1764 | /** | |
1765 | * e1000_free_all_tx_resources - Free Tx Resources for All Queues | |
1766 | * @adapter: board private structure | |
1767 | * | |
1768 | * Free all transmit software resources | |
1769 | **/ | |
1770 | ||
1771 | void | |
1772 | e1000_free_all_tx_resources(struct e1000_adapter *adapter) | |
1773 | { | |
1774 | int i; | |
1775 | ||
f56799ea | 1776 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 1777 | e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
1778 | } |
1779 | ||
e619d523 | 1780 | static void |
1da177e4 LT |
1781 | e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, |
1782 | struct e1000_buffer *buffer_info) | |
1783 | { | |
96838a40 | 1784 | if (buffer_info->dma) { |
2648345f MC |
1785 | pci_unmap_page(adapter->pdev, |
1786 | buffer_info->dma, | |
1787 | buffer_info->length, | |
1788 | PCI_DMA_TODEVICE); | |
1da177e4 | 1789 | } |
8241e35e | 1790 | if (buffer_info->skb) |
1da177e4 | 1791 | dev_kfree_skb_any(buffer_info->skb); |
8241e35e | 1792 | memset(buffer_info, 0, sizeof(struct e1000_buffer)); |
1da177e4 LT |
1793 | } |
1794 | ||
1795 | /** | |
1796 | * e1000_clean_tx_ring - Free Tx Buffers | |
1797 | * @adapter: board private structure | |
581d708e | 1798 | * @tx_ring: ring to be cleaned |
1da177e4 LT |
1799 | **/ |
1800 | ||
1801 | static void | |
581d708e MC |
1802 | e1000_clean_tx_ring(struct e1000_adapter *adapter, |
1803 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 1804 | { |
1da177e4 LT |
1805 | struct e1000_buffer *buffer_info; |
1806 | unsigned long size; | |
1807 | unsigned int i; | |
1808 | ||
1809 | /* Free all the Tx ring sk_buffs */ | |
1810 | ||
96838a40 | 1811 | for (i = 0; i < tx_ring->count; i++) { |
1da177e4 LT |
1812 | buffer_info = &tx_ring->buffer_info[i]; |
1813 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); | |
1814 | } | |
1815 | ||
1816 | size = sizeof(struct e1000_buffer) * tx_ring->count; | |
1817 | memset(tx_ring->buffer_info, 0, size); | |
1818 | ||
1819 | /* Zero out the descriptor ring */ | |
1820 | ||
1821 | memset(tx_ring->desc, 0, tx_ring->size); | |
1822 | ||
1823 | tx_ring->next_to_use = 0; | |
1824 | tx_ring->next_to_clean = 0; | |
fd803241 | 1825 | tx_ring->last_tx_tso = 0; |
1da177e4 | 1826 | |
581d708e MC |
1827 | writel(0, adapter->hw.hw_addr + tx_ring->tdh); |
1828 | writel(0, adapter->hw.hw_addr + tx_ring->tdt); | |
1829 | } | |
1830 | ||
1831 | /** | |
1832 | * e1000_clean_all_tx_rings - Free Tx Buffers for all queues | |
1833 | * @adapter: board private structure | |
1834 | **/ | |
1835 | ||
1836 | static void | |
1837 | e1000_clean_all_tx_rings(struct e1000_adapter *adapter) | |
1838 | { | |
1839 | int i; | |
1840 | ||
f56799ea | 1841 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 1842 | e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
1843 | } |
1844 | ||
1845 | /** | |
1846 | * e1000_free_rx_resources - Free Rx Resources | |
1847 | * @adapter: board private structure | |
581d708e | 1848 | * @rx_ring: ring to clean the resources from |
1da177e4 LT |
1849 | * |
1850 | * Free all receive software resources | |
1851 | **/ | |
1852 | ||
3ad2cc67 | 1853 | static void |
581d708e MC |
1854 | e1000_free_rx_resources(struct e1000_adapter *adapter, |
1855 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 1856 | { |
1da177e4 LT |
1857 | struct pci_dev *pdev = adapter->pdev; |
1858 | ||
581d708e | 1859 | e1000_clean_rx_ring(adapter, rx_ring); |
1da177e4 LT |
1860 | |
1861 | vfree(rx_ring->buffer_info); | |
1862 | rx_ring->buffer_info = NULL; | |
2d7edb92 MC |
1863 | kfree(rx_ring->ps_page); |
1864 | rx_ring->ps_page = NULL; | |
1865 | kfree(rx_ring->ps_page_dma); | |
1866 | rx_ring->ps_page_dma = NULL; | |
1da177e4 LT |
1867 | |
1868 | pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); | |
1869 | ||
1870 | rx_ring->desc = NULL; | |
1871 | } | |
1872 | ||
1873 | /** | |
581d708e | 1874 | * e1000_free_all_rx_resources - Free Rx Resources for All Queues |
1da177e4 | 1875 | * @adapter: board private structure |
581d708e MC |
1876 | * |
1877 | * Free all receive software resources | |
1878 | **/ | |
1879 | ||
1880 | void | |
1881 | e1000_free_all_rx_resources(struct e1000_adapter *adapter) | |
1882 | { | |
1883 | int i; | |
1884 | ||
f56799ea | 1885 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e MC |
1886 | e1000_free_rx_resources(adapter, &adapter->rx_ring[i]); |
1887 | } | |
1888 | ||
1889 | /** | |
1890 | * e1000_clean_rx_ring - Free Rx Buffers per Queue | |
1891 | * @adapter: board private structure | |
1892 | * @rx_ring: ring to free buffers from | |
1da177e4 LT |
1893 | **/ |
1894 | ||
1895 | static void | |
581d708e MC |
1896 | e1000_clean_rx_ring(struct e1000_adapter *adapter, |
1897 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 1898 | { |
1da177e4 | 1899 | struct e1000_buffer *buffer_info; |
2d7edb92 MC |
1900 | struct e1000_ps_page *ps_page; |
1901 | struct e1000_ps_page_dma *ps_page_dma; | |
1da177e4 LT |
1902 | struct pci_dev *pdev = adapter->pdev; |
1903 | unsigned long size; | |
2d7edb92 | 1904 | unsigned int i, j; |
1da177e4 LT |
1905 | |
1906 | /* Free all the Rx ring sk_buffs */ | |
96838a40 | 1907 | for (i = 0; i < rx_ring->count; i++) { |
1da177e4 | 1908 | buffer_info = &rx_ring->buffer_info[i]; |
96838a40 | 1909 | if (buffer_info->skb) { |
1da177e4 LT |
1910 | pci_unmap_single(pdev, |
1911 | buffer_info->dma, | |
1912 | buffer_info->length, | |
1913 | PCI_DMA_FROMDEVICE); | |
1914 | ||
1915 | dev_kfree_skb(buffer_info->skb); | |
1916 | buffer_info->skb = NULL; | |
997f5cbd JK |
1917 | } |
1918 | ps_page = &rx_ring->ps_page[i]; | |
1919 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
1920 | for (j = 0; j < adapter->rx_ps_pages; j++) { | |
1921 | if (!ps_page->ps_page[j]) break; | |
1922 | pci_unmap_page(pdev, | |
1923 | ps_page_dma->ps_page_dma[j], | |
1924 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
1925 | ps_page_dma->ps_page_dma[j] = 0; | |
1926 | put_page(ps_page->ps_page[j]); | |
1927 | ps_page->ps_page[j] = NULL; | |
1da177e4 LT |
1928 | } |
1929 | } | |
1930 | ||
1931 | size = sizeof(struct e1000_buffer) * rx_ring->count; | |
1932 | memset(rx_ring->buffer_info, 0, size); | |
2d7edb92 MC |
1933 | size = sizeof(struct e1000_ps_page) * rx_ring->count; |
1934 | memset(rx_ring->ps_page, 0, size); | |
1935 | size = sizeof(struct e1000_ps_page_dma) * rx_ring->count; | |
1936 | memset(rx_ring->ps_page_dma, 0, size); | |
1da177e4 LT |
1937 | |
1938 | /* Zero out the descriptor ring */ | |
1939 | ||
1940 | memset(rx_ring->desc, 0, rx_ring->size); | |
1941 | ||
1942 | rx_ring->next_to_clean = 0; | |
1943 | rx_ring->next_to_use = 0; | |
1944 | ||
581d708e MC |
1945 | writel(0, adapter->hw.hw_addr + rx_ring->rdh); |
1946 | writel(0, adapter->hw.hw_addr + rx_ring->rdt); | |
1947 | } | |
1948 | ||
1949 | /** | |
1950 | * e1000_clean_all_rx_rings - Free Rx Buffers for all queues | |
1951 | * @adapter: board private structure | |
1952 | **/ | |
1953 | ||
1954 | static void | |
1955 | e1000_clean_all_rx_rings(struct e1000_adapter *adapter) | |
1956 | { | |
1957 | int i; | |
1958 | ||
f56799ea | 1959 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 1960 | e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]); |
1da177e4 LT |
1961 | } |
1962 | ||
1963 | /* The 82542 2.0 (revision 2) needs to have the receive unit in reset | |
1964 | * and memory write and invalidate disabled for certain operations | |
1965 | */ | |
1966 | static void | |
1967 | e1000_enter_82542_rst(struct e1000_adapter *adapter) | |
1968 | { | |
1969 | struct net_device *netdev = adapter->netdev; | |
1970 | uint32_t rctl; | |
1971 | ||
1972 | e1000_pci_clear_mwi(&adapter->hw); | |
1973 | ||
1974 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1975 | rctl |= E1000_RCTL_RST; | |
1976 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1977 | E1000_WRITE_FLUSH(&adapter->hw); | |
1978 | mdelay(5); | |
1979 | ||
96838a40 | 1980 | if (netif_running(netdev)) |
581d708e | 1981 | e1000_clean_all_rx_rings(adapter); |
1da177e4 LT |
1982 | } |
1983 | ||
1984 | static void | |
1985 | e1000_leave_82542_rst(struct e1000_adapter *adapter) | |
1986 | { | |
1987 | struct net_device *netdev = adapter->netdev; | |
1988 | uint32_t rctl; | |
1989 | ||
1990 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1991 | rctl &= ~E1000_RCTL_RST; | |
1992 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1993 | E1000_WRITE_FLUSH(&adapter->hw); | |
1994 | mdelay(5); | |
1995 | ||
96838a40 | 1996 | if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE) |
1da177e4 LT |
1997 | e1000_pci_set_mwi(&adapter->hw); |
1998 | ||
96838a40 | 1999 | if (netif_running(netdev)) { |
72d64a43 JK |
2000 | /* No need to loop, because 82542 supports only 1 queue */ |
2001 | struct e1000_rx_ring *ring = &adapter->rx_ring[0]; | |
7c4d3367 | 2002 | e1000_configure_rx(adapter); |
72d64a43 | 2003 | adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring)); |
1da177e4 LT |
2004 | } |
2005 | } | |
2006 | ||
2007 | /** | |
2008 | * e1000_set_mac - Change the Ethernet Address of the NIC | |
2009 | * @netdev: network interface device structure | |
2010 | * @p: pointer to an address structure | |
2011 | * | |
2012 | * Returns 0 on success, negative on failure | |
2013 | **/ | |
2014 | ||
2015 | static int | |
2016 | e1000_set_mac(struct net_device *netdev, void *p) | |
2017 | { | |
60490fe0 | 2018 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2019 | struct sockaddr *addr = p; |
2020 | ||
96838a40 | 2021 | if (!is_valid_ether_addr(addr->sa_data)) |
1da177e4 LT |
2022 | return -EADDRNOTAVAIL; |
2023 | ||
2024 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2025 | ||
96838a40 | 2026 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2027 | e1000_enter_82542_rst(adapter); |
2028 | ||
2029 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
2030 | memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); | |
2031 | ||
2032 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2033 | ||
868d5309 MC |
2034 | /* With 82571 controllers, LAA may be overwritten (with the default) |
2035 | * due to controller reset from the other port. */ | |
2036 | if (adapter->hw.mac_type == e1000_82571) { | |
2037 | /* activate the work around */ | |
2038 | adapter->hw.laa_is_present = 1; | |
2039 | ||
96838a40 JB |
2040 | /* Hold a copy of the LAA in RAR[14] This is done so that |
2041 | * between the time RAR[0] gets clobbered and the time it | |
2042 | * gets fixed (in e1000_watchdog), the actual LAA is in one | |
868d5309 | 2043 | * of the RARs and no incoming packets directed to this port |
96838a40 | 2044 | * are dropped. Eventaully the LAA will be in RAR[0] and |
868d5309 | 2045 | * RAR[14] */ |
96838a40 | 2046 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, |
868d5309 MC |
2047 | E1000_RAR_ENTRIES - 1); |
2048 | } | |
2049 | ||
96838a40 | 2050 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2051 | e1000_leave_82542_rst(adapter); |
2052 | ||
2053 | return 0; | |
2054 | } | |
2055 | ||
2056 | /** | |
2057 | * e1000_set_multi - Multicast and Promiscuous mode set | |
2058 | * @netdev: network interface device structure | |
2059 | * | |
2060 | * The set_multi entry point is called whenever the multicast address | |
2061 | * list or the network interface flags are updated. This routine is | |
2062 | * responsible for configuring the hardware for proper multicast, | |
2063 | * promiscuous mode, and all-multi behavior. | |
2064 | **/ | |
2065 | ||
2066 | static void | |
2067 | e1000_set_multi(struct net_device *netdev) | |
2068 | { | |
60490fe0 | 2069 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2070 | struct e1000_hw *hw = &adapter->hw; |
2071 | struct dev_mc_list *mc_ptr; | |
2072 | uint32_t rctl; | |
2073 | uint32_t hash_value; | |
868d5309 | 2074 | int i, rar_entries = E1000_RAR_ENTRIES; |
1da177e4 | 2075 | |
868d5309 MC |
2076 | /* reserve RAR[14] for LAA over-write work-around */ |
2077 | if (adapter->hw.mac_type == e1000_82571) | |
2078 | rar_entries--; | |
1da177e4 | 2079 | |
2648345f MC |
2080 | /* Check for Promiscuous and All Multicast modes */ |
2081 | ||
1da177e4 LT |
2082 | rctl = E1000_READ_REG(hw, RCTL); |
2083 | ||
96838a40 | 2084 | if (netdev->flags & IFF_PROMISC) { |
1da177e4 | 2085 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); |
96838a40 | 2086 | } else if (netdev->flags & IFF_ALLMULTI) { |
1da177e4 LT |
2087 | rctl |= E1000_RCTL_MPE; |
2088 | rctl &= ~E1000_RCTL_UPE; | |
2089 | } else { | |
2090 | rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); | |
2091 | } | |
2092 | ||
2093 | E1000_WRITE_REG(hw, RCTL, rctl); | |
2094 | ||
2095 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2096 | ||
96838a40 | 2097 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2098 | e1000_enter_82542_rst(adapter); |
2099 | ||
2100 | /* load the first 14 multicast address into the exact filters 1-14 | |
2101 | * RAR 0 is used for the station MAC adddress | |
2102 | * if there are not 14 addresses, go ahead and clear the filters | |
868d5309 | 2103 | * -- with 82571 controllers only 0-13 entries are filled here |
1da177e4 LT |
2104 | */ |
2105 | mc_ptr = netdev->mc_list; | |
2106 | ||
96838a40 | 2107 | for (i = 1; i < rar_entries; i++) { |
868d5309 | 2108 | if (mc_ptr) { |
1da177e4 LT |
2109 | e1000_rar_set(hw, mc_ptr->dmi_addr, i); |
2110 | mc_ptr = mc_ptr->next; | |
2111 | } else { | |
2112 | E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0); | |
2113 | E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0); | |
2114 | } | |
2115 | } | |
2116 | ||
2117 | /* clear the old settings from the multicast hash table */ | |
2118 | ||
96838a40 | 2119 | for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++) |
1da177e4 LT |
2120 | E1000_WRITE_REG_ARRAY(hw, MTA, i, 0); |
2121 | ||
2122 | /* load any remaining addresses into the hash table */ | |
2123 | ||
96838a40 | 2124 | for (; mc_ptr; mc_ptr = mc_ptr->next) { |
1da177e4 LT |
2125 | hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr); |
2126 | e1000_mta_set(hw, hash_value); | |
2127 | } | |
2128 | ||
96838a40 | 2129 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 | 2130 | e1000_leave_82542_rst(adapter); |
1da177e4 LT |
2131 | } |
2132 | ||
2133 | /* Need to wait a few seconds after link up to get diagnostic information from | |
2134 | * the phy */ | |
2135 | ||
2136 | static void | |
2137 | e1000_update_phy_info(unsigned long data) | |
2138 | { | |
2139 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2140 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
2141 | } | |
2142 | ||
2143 | /** | |
2144 | * e1000_82547_tx_fifo_stall - Timer Call-back | |
2145 | * @data: pointer to adapter cast into an unsigned long | |
2146 | **/ | |
2147 | ||
2148 | static void | |
2149 | e1000_82547_tx_fifo_stall(unsigned long data) | |
2150 | { | |
2151 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2152 | struct net_device *netdev = adapter->netdev; | |
2153 | uint32_t tctl; | |
2154 | ||
96838a40 JB |
2155 | if (atomic_read(&adapter->tx_fifo_stall)) { |
2156 | if ((E1000_READ_REG(&adapter->hw, TDT) == | |
1da177e4 LT |
2157 | E1000_READ_REG(&adapter->hw, TDH)) && |
2158 | (E1000_READ_REG(&adapter->hw, TDFT) == | |
2159 | E1000_READ_REG(&adapter->hw, TDFH)) && | |
2160 | (E1000_READ_REG(&adapter->hw, TDFTS) == | |
2161 | E1000_READ_REG(&adapter->hw, TDFHS))) { | |
2162 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2163 | E1000_WRITE_REG(&adapter->hw, TCTL, | |
2164 | tctl & ~E1000_TCTL_EN); | |
2165 | E1000_WRITE_REG(&adapter->hw, TDFT, | |
2166 | adapter->tx_head_addr); | |
2167 | E1000_WRITE_REG(&adapter->hw, TDFH, | |
2168 | adapter->tx_head_addr); | |
2169 | E1000_WRITE_REG(&adapter->hw, TDFTS, | |
2170 | adapter->tx_head_addr); | |
2171 | E1000_WRITE_REG(&adapter->hw, TDFHS, | |
2172 | adapter->tx_head_addr); | |
2173 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
2174 | E1000_WRITE_FLUSH(&adapter->hw); | |
2175 | ||
2176 | adapter->tx_fifo_head = 0; | |
2177 | atomic_set(&adapter->tx_fifo_stall, 0); | |
2178 | netif_wake_queue(netdev); | |
2179 | } else { | |
2180 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); | |
2181 | } | |
2182 | } | |
2183 | } | |
2184 | ||
2185 | /** | |
2186 | * e1000_watchdog - Timer Call-back | |
2187 | * @data: pointer to adapter cast into an unsigned long | |
2188 | **/ | |
2189 | static void | |
2190 | e1000_watchdog(unsigned long data) | |
2191 | { | |
2192 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2193 | ||
2194 | /* Do the rest outside of interrupt context */ | |
2195 | schedule_work(&adapter->watchdog_task); | |
2196 | } | |
2197 | ||
2198 | static void | |
2199 | e1000_watchdog_task(struct e1000_adapter *adapter) | |
2200 | { | |
2201 | struct net_device *netdev = adapter->netdev; | |
545c67c0 | 2202 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
7e6c9861 | 2203 | uint32_t link, tctl; |
1da177e4 LT |
2204 | |
2205 | e1000_check_for_link(&adapter->hw); | |
2d7edb92 MC |
2206 | if (adapter->hw.mac_type == e1000_82573) { |
2207 | e1000_enable_tx_pkt_filtering(&adapter->hw); | |
96838a40 | 2208 | if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id) |
2d7edb92 | 2209 | e1000_update_mng_vlan(adapter); |
96838a40 | 2210 | } |
1da177e4 | 2211 | |
96838a40 | 2212 | if ((adapter->hw.media_type == e1000_media_type_internal_serdes) && |
1da177e4 LT |
2213 | !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE)) |
2214 | link = !adapter->hw.serdes_link_down; | |
2215 | else | |
2216 | link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU; | |
2217 | ||
96838a40 JB |
2218 | if (link) { |
2219 | if (!netif_carrier_ok(netdev)) { | |
fe7fe28e | 2220 | boolean_t txb2b = 1; |
1da177e4 LT |
2221 | e1000_get_speed_and_duplex(&adapter->hw, |
2222 | &adapter->link_speed, | |
2223 | &adapter->link_duplex); | |
2224 | ||
2225 | DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n", | |
2226 | adapter->link_speed, | |
2227 | adapter->link_duplex == FULL_DUPLEX ? | |
2228 | "Full Duplex" : "Half Duplex"); | |
2229 | ||
7e6c9861 JK |
2230 | /* tweak tx_queue_len according to speed/duplex |
2231 | * and adjust the timeout factor */ | |
66a2b0a3 JK |
2232 | netdev->tx_queue_len = adapter->tx_queue_len; |
2233 | adapter->tx_timeout_factor = 1; | |
7e6c9861 JK |
2234 | switch (adapter->link_speed) { |
2235 | case SPEED_10: | |
fe7fe28e | 2236 | txb2b = 0; |
7e6c9861 JK |
2237 | netdev->tx_queue_len = 10; |
2238 | adapter->tx_timeout_factor = 8; | |
2239 | break; | |
2240 | case SPEED_100: | |
fe7fe28e | 2241 | txb2b = 0; |
7e6c9861 JK |
2242 | netdev->tx_queue_len = 100; |
2243 | /* maybe add some timeout factor ? */ | |
2244 | break; | |
2245 | } | |
2246 | ||
fe7fe28e | 2247 | if ((adapter->hw.mac_type == e1000_82571 || |
7e6c9861 | 2248 | adapter->hw.mac_type == e1000_82572) && |
fe7fe28e | 2249 | txb2b == 0) { |
7e6c9861 JK |
2250 | #define SPEED_MODE_BIT (1 << 21) |
2251 | uint32_t tarc0; | |
2252 | tarc0 = E1000_READ_REG(&adapter->hw, TARC0); | |
2253 | tarc0 &= ~SPEED_MODE_BIT; | |
2254 | E1000_WRITE_REG(&adapter->hw, TARC0, tarc0); | |
2255 | } | |
2256 | ||
2257 | #ifdef NETIF_F_TSO | |
2258 | /* disable TSO for pcie and 10/100 speeds, to avoid | |
2259 | * some hardware issues */ | |
2260 | if (!adapter->tso_force && | |
2261 | adapter->hw.bus_type == e1000_bus_type_pci_express){ | |
66a2b0a3 JK |
2262 | switch (adapter->link_speed) { |
2263 | case SPEED_10: | |
66a2b0a3 | 2264 | case SPEED_100: |
7e6c9861 JK |
2265 | DPRINTK(PROBE,INFO, |
2266 | "10/100 speed: disabling TSO\n"); | |
2267 | netdev->features &= ~NETIF_F_TSO; | |
2268 | break; | |
2269 | case SPEED_1000: | |
2270 | netdev->features |= NETIF_F_TSO; | |
2271 | break; | |
2272 | default: | |
2273 | /* oops */ | |
66a2b0a3 JK |
2274 | break; |
2275 | } | |
2276 | } | |
7e6c9861 JK |
2277 | #endif |
2278 | ||
2279 | /* enable transmits in the hardware, need to do this | |
2280 | * after setting TARC0 */ | |
2281 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2282 | tctl |= E1000_TCTL_EN; | |
2283 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
66a2b0a3 | 2284 | |
1da177e4 LT |
2285 | netif_carrier_on(netdev); |
2286 | netif_wake_queue(netdev); | |
2287 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
2288 | adapter->smartspeed = 0; | |
2289 | } | |
2290 | } else { | |
96838a40 | 2291 | if (netif_carrier_ok(netdev)) { |
1da177e4 LT |
2292 | adapter->link_speed = 0; |
2293 | adapter->link_duplex = 0; | |
2294 | DPRINTK(LINK, INFO, "NIC Link is Down\n"); | |
2295 | netif_carrier_off(netdev); | |
2296 | netif_stop_queue(netdev); | |
2297 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
87041639 JK |
2298 | |
2299 | /* 80003ES2LAN workaround-- | |
2300 | * For packet buffer work-around on link down event; | |
2301 | * disable receives in the ISR and | |
2302 | * reset device here in the watchdog | |
2303 | */ | |
2304 | if (adapter->hw.mac_type == e1000_80003es2lan) { | |
2305 | /* reset device */ | |
2306 | schedule_work(&adapter->reset_task); | |
2307 | } | |
1da177e4 LT |
2308 | } |
2309 | ||
2310 | e1000_smartspeed(adapter); | |
2311 | } | |
2312 | ||
2313 | e1000_update_stats(adapter); | |
2314 | ||
2315 | adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; | |
2316 | adapter->tpt_old = adapter->stats.tpt; | |
2317 | adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old; | |
2318 | adapter->colc_old = adapter->stats.colc; | |
2319 | ||
2320 | adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; | |
2321 | adapter->gorcl_old = adapter->stats.gorcl; | |
2322 | adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; | |
2323 | adapter->gotcl_old = adapter->stats.gotcl; | |
2324 | ||
2325 | e1000_update_adaptive(&adapter->hw); | |
2326 | ||
f56799ea | 2327 | if (!netif_carrier_ok(netdev)) { |
581d708e | 2328 | if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) { |
1da177e4 LT |
2329 | /* We've lost link, so the controller stops DMA, |
2330 | * but we've got queued Tx work that's never going | |
2331 | * to get done, so reset controller to flush Tx. | |
2332 | * (Do the reset outside of interrupt context). */ | |
87041639 JK |
2333 | adapter->tx_timeout_count++; |
2334 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2335 | } |
2336 | } | |
2337 | ||
2338 | /* Dynamic mode for Interrupt Throttle Rate (ITR) */ | |
96838a40 | 2339 | if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) { |
1da177e4 LT |
2340 | /* Symmetric Tx/Rx gets a reduced ITR=2000; Total |
2341 | * asymmetrical Tx or Rx gets ITR=8000; everyone | |
2342 | * else is between 2000-8000. */ | |
2343 | uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000; | |
96838a40 | 2344 | uint32_t dif = (adapter->gotcl > adapter->gorcl ? |
1da177e4 LT |
2345 | adapter->gotcl - adapter->gorcl : |
2346 | adapter->gorcl - adapter->gotcl) / 10000; | |
2347 | uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; | |
2348 | E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256)); | |
2349 | } | |
2350 | ||
2351 | /* Cause software interrupt to ensure rx ring is cleaned */ | |
2352 | E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0); | |
2353 | ||
2648345f | 2354 | /* Force detection of hung controller every watchdog period */ |
1da177e4 LT |
2355 | adapter->detect_tx_hung = TRUE; |
2356 | ||
96838a40 | 2357 | /* With 82571 controllers, LAA may be overwritten due to controller |
868d5309 MC |
2358 | * reset from the other port. Set the appropriate LAA in RAR[0] */ |
2359 | if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present) | |
2360 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2361 | ||
1da177e4 LT |
2362 | /* Reset the timer */ |
2363 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
2364 | } | |
2365 | ||
2366 | #define E1000_TX_FLAGS_CSUM 0x00000001 | |
2367 | #define E1000_TX_FLAGS_VLAN 0x00000002 | |
2368 | #define E1000_TX_FLAGS_TSO 0x00000004 | |
2d7edb92 | 2369 | #define E1000_TX_FLAGS_IPV4 0x00000008 |
1da177e4 LT |
2370 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 |
2371 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | |
2372 | ||
e619d523 | 2373 | static int |
581d708e MC |
2374 | e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2375 | struct sk_buff *skb) | |
1da177e4 LT |
2376 | { |
2377 | #ifdef NETIF_F_TSO | |
2378 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2379 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2380 | unsigned int i; |
2381 | uint32_t cmd_length = 0; | |
2d7edb92 | 2382 | uint16_t ipcse = 0, tucse, mss; |
1da177e4 LT |
2383 | uint8_t ipcss, ipcso, tucss, tucso, hdr_len; |
2384 | int err; | |
2385 | ||
96838a40 | 2386 | if (skb_shinfo(skb)->tso_size) { |
1da177e4 LT |
2387 | if (skb_header_cloned(skb)) { |
2388 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
2389 | if (err) | |
2390 | return err; | |
2391 | } | |
2392 | ||
2393 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
2394 | mss = skb_shinfo(skb)->tso_size; | |
96838a40 | 2395 | if (skb->protocol == ntohs(ETH_P_IP)) { |
2d7edb92 MC |
2396 | skb->nh.iph->tot_len = 0; |
2397 | skb->nh.iph->check = 0; | |
2398 | skb->h.th->check = | |
2399 | ~csum_tcpudp_magic(skb->nh.iph->saddr, | |
2400 | skb->nh.iph->daddr, | |
2401 | 0, | |
2402 | IPPROTO_TCP, | |
2403 | 0); | |
2404 | cmd_length = E1000_TXD_CMD_IP; | |
2405 | ipcse = skb->h.raw - skb->data - 1; | |
2406 | #ifdef NETIF_F_TSO_IPV6 | |
96838a40 | 2407 | } else if (skb->protocol == ntohs(ETH_P_IPV6)) { |
2d7edb92 MC |
2408 | skb->nh.ipv6h->payload_len = 0; |
2409 | skb->h.th->check = | |
2410 | ~csum_ipv6_magic(&skb->nh.ipv6h->saddr, | |
2411 | &skb->nh.ipv6h->daddr, | |
2412 | 0, | |
2413 | IPPROTO_TCP, | |
2414 | 0); | |
2415 | ipcse = 0; | |
2416 | #endif | |
2417 | } | |
1da177e4 LT |
2418 | ipcss = skb->nh.raw - skb->data; |
2419 | ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data; | |
1da177e4 LT |
2420 | tucss = skb->h.raw - skb->data; |
2421 | tucso = (void *)&(skb->h.th->check) - (void *)skb->data; | |
2422 | tucse = 0; | |
2423 | ||
2424 | cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | | |
2d7edb92 | 2425 | E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); |
1da177e4 | 2426 | |
581d708e MC |
2427 | i = tx_ring->next_to_use; |
2428 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
545c67c0 | 2429 | buffer_info = &tx_ring->buffer_info[i]; |
1da177e4 LT |
2430 | |
2431 | context_desc->lower_setup.ip_fields.ipcss = ipcss; | |
2432 | context_desc->lower_setup.ip_fields.ipcso = ipcso; | |
2433 | context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); | |
2434 | context_desc->upper_setup.tcp_fields.tucss = tucss; | |
2435 | context_desc->upper_setup.tcp_fields.tucso = tucso; | |
2436 | context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); | |
2437 | context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); | |
2438 | context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; | |
2439 | context_desc->cmd_and_length = cpu_to_le32(cmd_length); | |
2440 | ||
545c67c0 JK |
2441 | buffer_info->time_stamp = jiffies; |
2442 | ||
581d708e MC |
2443 | if (++i == tx_ring->count) i = 0; |
2444 | tx_ring->next_to_use = i; | |
1da177e4 | 2445 | |
8241e35e | 2446 | return TRUE; |
1da177e4 LT |
2447 | } |
2448 | #endif | |
2449 | ||
8241e35e | 2450 | return FALSE; |
1da177e4 LT |
2451 | } |
2452 | ||
e619d523 | 2453 | static boolean_t |
581d708e MC |
2454 | e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2455 | struct sk_buff *skb) | |
1da177e4 LT |
2456 | { |
2457 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2458 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2459 | unsigned int i; |
2460 | uint8_t css; | |
2461 | ||
96838a40 | 2462 | if (likely(skb->ip_summed == CHECKSUM_HW)) { |
1da177e4 LT |
2463 | css = skb->h.raw - skb->data; |
2464 | ||
581d708e | 2465 | i = tx_ring->next_to_use; |
545c67c0 | 2466 | buffer_info = &tx_ring->buffer_info[i]; |
581d708e | 2467 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); |
1da177e4 LT |
2468 | |
2469 | context_desc->upper_setup.tcp_fields.tucss = css; | |
2470 | context_desc->upper_setup.tcp_fields.tucso = css + skb->csum; | |
2471 | context_desc->upper_setup.tcp_fields.tucse = 0; | |
2472 | context_desc->tcp_seg_setup.data = 0; | |
2473 | context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT); | |
2474 | ||
545c67c0 JK |
2475 | buffer_info->time_stamp = jiffies; |
2476 | ||
581d708e MC |
2477 | if (unlikely(++i == tx_ring->count)) i = 0; |
2478 | tx_ring->next_to_use = i; | |
1da177e4 LT |
2479 | |
2480 | return TRUE; | |
2481 | } | |
2482 | ||
2483 | return FALSE; | |
2484 | } | |
2485 | ||
2486 | #define E1000_MAX_TXD_PWR 12 | |
2487 | #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) | |
2488 | ||
e619d523 | 2489 | static int |
581d708e MC |
2490 | e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2491 | struct sk_buff *skb, unsigned int first, unsigned int max_per_txd, | |
2492 | unsigned int nr_frags, unsigned int mss) | |
1da177e4 | 2493 | { |
1da177e4 LT |
2494 | struct e1000_buffer *buffer_info; |
2495 | unsigned int len = skb->len; | |
2496 | unsigned int offset = 0, size, count = 0, i; | |
2497 | unsigned int f; | |
2498 | len -= skb->data_len; | |
2499 | ||
2500 | i = tx_ring->next_to_use; | |
2501 | ||
96838a40 | 2502 | while (len) { |
1da177e4 LT |
2503 | buffer_info = &tx_ring->buffer_info[i]; |
2504 | size = min(len, max_per_txd); | |
2505 | #ifdef NETIF_F_TSO | |
fd803241 JK |
2506 | /* Workaround for Controller erratum -- |
2507 | * descriptor for non-tso packet in a linear SKB that follows a | |
2508 | * tso gets written back prematurely before the data is fully | |
0f15a8fa | 2509 | * DMA'd to the controller */ |
fd803241 | 2510 | if (!skb->data_len && tx_ring->last_tx_tso && |
0f15a8fa | 2511 | !skb_shinfo(skb)->tso_size) { |
fd803241 JK |
2512 | tx_ring->last_tx_tso = 0; |
2513 | size -= 4; | |
2514 | } | |
2515 | ||
1da177e4 LT |
2516 | /* Workaround for premature desc write-backs |
2517 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2518 | if (unlikely(mss && !nr_frags && size == len && size > 8)) |
1da177e4 LT |
2519 | size -= 4; |
2520 | #endif | |
97338bde MC |
2521 | /* work-around for errata 10 and it applies |
2522 | * to all controllers in PCI-X mode | |
2523 | * The fix is to make sure that the first descriptor of a | |
2524 | * packet is smaller than 2048 - 16 - 16 (or 2016) bytes | |
2525 | */ | |
96838a40 | 2526 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
2527 | (size > 2015) && count == 0)) |
2528 | size = 2015; | |
96838a40 | 2529 | |
1da177e4 LT |
2530 | /* Workaround for potential 82544 hang in PCI-X. Avoid |
2531 | * terminating buffers within evenly-aligned dwords. */ | |
96838a40 | 2532 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2533 | !((unsigned long)(skb->data + offset + size - 1) & 4) && |
2534 | size > 4)) | |
2535 | size -= 4; | |
2536 | ||
2537 | buffer_info->length = size; | |
2538 | buffer_info->dma = | |
2539 | pci_map_single(adapter->pdev, | |
2540 | skb->data + offset, | |
2541 | size, | |
2542 | PCI_DMA_TODEVICE); | |
2543 | buffer_info->time_stamp = jiffies; | |
2544 | ||
2545 | len -= size; | |
2546 | offset += size; | |
2547 | count++; | |
96838a40 | 2548 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2549 | } |
2550 | ||
96838a40 | 2551 | for (f = 0; f < nr_frags; f++) { |
1da177e4 LT |
2552 | struct skb_frag_struct *frag; |
2553 | ||
2554 | frag = &skb_shinfo(skb)->frags[f]; | |
2555 | len = frag->size; | |
2556 | offset = frag->page_offset; | |
2557 | ||
96838a40 | 2558 | while (len) { |
1da177e4 LT |
2559 | buffer_info = &tx_ring->buffer_info[i]; |
2560 | size = min(len, max_per_txd); | |
2561 | #ifdef NETIF_F_TSO | |
2562 | /* Workaround for premature desc write-backs | |
2563 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2564 | if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8)) |
1da177e4 LT |
2565 | size -= 4; |
2566 | #endif | |
2567 | /* Workaround for potential 82544 hang in PCI-X. | |
2568 | * Avoid terminating buffers within evenly-aligned | |
2569 | * dwords. */ | |
96838a40 | 2570 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2571 | !((unsigned long)(frag->page+offset+size-1) & 4) && |
2572 | size > 4)) | |
2573 | size -= 4; | |
2574 | ||
2575 | buffer_info->length = size; | |
2576 | buffer_info->dma = | |
2577 | pci_map_page(adapter->pdev, | |
2578 | frag->page, | |
2579 | offset, | |
2580 | size, | |
2581 | PCI_DMA_TODEVICE); | |
2582 | buffer_info->time_stamp = jiffies; | |
2583 | ||
2584 | len -= size; | |
2585 | offset += size; | |
2586 | count++; | |
96838a40 | 2587 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2588 | } |
2589 | } | |
2590 | ||
2591 | i = (i == 0) ? tx_ring->count - 1 : i - 1; | |
2592 | tx_ring->buffer_info[i].skb = skb; | |
2593 | tx_ring->buffer_info[first].next_to_watch = i; | |
2594 | ||
2595 | return count; | |
2596 | } | |
2597 | ||
e619d523 | 2598 | static void |
581d708e MC |
2599 | e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2600 | int tx_flags, int count) | |
1da177e4 | 2601 | { |
1da177e4 LT |
2602 | struct e1000_tx_desc *tx_desc = NULL; |
2603 | struct e1000_buffer *buffer_info; | |
2604 | uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; | |
2605 | unsigned int i; | |
2606 | ||
96838a40 | 2607 | if (likely(tx_flags & E1000_TX_FLAGS_TSO)) { |
1da177e4 LT |
2608 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | |
2609 | E1000_TXD_CMD_TSE; | |
2d7edb92 MC |
2610 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; |
2611 | ||
96838a40 | 2612 | if (likely(tx_flags & E1000_TX_FLAGS_IPV4)) |
2d7edb92 | 2613 | txd_upper |= E1000_TXD_POPTS_IXSM << 8; |
1da177e4 LT |
2614 | } |
2615 | ||
96838a40 | 2616 | if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) { |
1da177e4 LT |
2617 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; |
2618 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; | |
2619 | } | |
2620 | ||
96838a40 | 2621 | if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) { |
1da177e4 LT |
2622 | txd_lower |= E1000_TXD_CMD_VLE; |
2623 | txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); | |
2624 | } | |
2625 | ||
2626 | i = tx_ring->next_to_use; | |
2627 | ||
96838a40 | 2628 | while (count--) { |
1da177e4 LT |
2629 | buffer_info = &tx_ring->buffer_info[i]; |
2630 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
2631 | tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
2632 | tx_desc->lower.data = | |
2633 | cpu_to_le32(txd_lower | buffer_info->length); | |
2634 | tx_desc->upper.data = cpu_to_le32(txd_upper); | |
96838a40 | 2635 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2636 | } |
2637 | ||
2638 | tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); | |
2639 | ||
2640 | /* Force memory writes to complete before letting h/w | |
2641 | * know there are new descriptors to fetch. (Only | |
2642 | * applicable for weak-ordered memory model archs, | |
2643 | * such as IA-64). */ | |
2644 | wmb(); | |
2645 | ||
2646 | tx_ring->next_to_use = i; | |
581d708e | 2647 | writel(i, adapter->hw.hw_addr + tx_ring->tdt); |
1da177e4 LT |
2648 | } |
2649 | ||
2650 | /** | |
2651 | * 82547 workaround to avoid controller hang in half-duplex environment. | |
2652 | * The workaround is to avoid queuing a large packet that would span | |
2653 | * the internal Tx FIFO ring boundary by notifying the stack to resend | |
2654 | * the packet at a later time. This gives the Tx FIFO an opportunity to | |
2655 | * flush all packets. When that occurs, we reset the Tx FIFO pointers | |
2656 | * to the beginning of the Tx FIFO. | |
2657 | **/ | |
2658 | ||
2659 | #define E1000_FIFO_HDR 0x10 | |
2660 | #define E1000_82547_PAD_LEN 0x3E0 | |
2661 | ||
e619d523 | 2662 | static int |
1da177e4 LT |
2663 | e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb) |
2664 | { | |
2665 | uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; | |
2666 | uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR; | |
2667 | ||
2668 | E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR); | |
2669 | ||
96838a40 | 2670 | if (adapter->link_duplex != HALF_DUPLEX) |
1da177e4 LT |
2671 | goto no_fifo_stall_required; |
2672 | ||
96838a40 | 2673 | if (atomic_read(&adapter->tx_fifo_stall)) |
1da177e4 LT |
2674 | return 1; |
2675 | ||
96838a40 | 2676 | if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) { |
1da177e4 LT |
2677 | atomic_set(&adapter->tx_fifo_stall, 1); |
2678 | return 1; | |
2679 | } | |
2680 | ||
2681 | no_fifo_stall_required: | |
2682 | adapter->tx_fifo_head += skb_fifo_len; | |
96838a40 | 2683 | if (adapter->tx_fifo_head >= adapter->tx_fifo_size) |
1da177e4 LT |
2684 | adapter->tx_fifo_head -= adapter->tx_fifo_size; |
2685 | return 0; | |
2686 | } | |
2687 | ||
2d7edb92 | 2688 | #define MINIMUM_DHCP_PACKET_SIZE 282 |
e619d523 | 2689 | static int |
2d7edb92 MC |
2690 | e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) |
2691 | { | |
2692 | struct e1000_hw *hw = &adapter->hw; | |
2693 | uint16_t length, offset; | |
96838a40 JB |
2694 | if (vlan_tx_tag_present(skb)) { |
2695 | if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && | |
2d7edb92 MC |
2696 | ( adapter->hw.mng_cookie.status & |
2697 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) ) | |
2698 | return 0; | |
2699 | } | |
20a44028 | 2700 | if (skb->len > MINIMUM_DHCP_PACKET_SIZE) { |
2d7edb92 | 2701 | struct ethhdr *eth = (struct ethhdr *) skb->data; |
96838a40 JB |
2702 | if ((htons(ETH_P_IP) == eth->h_proto)) { |
2703 | const struct iphdr *ip = | |
2d7edb92 | 2704 | (struct iphdr *)((uint8_t *)skb->data+14); |
96838a40 JB |
2705 | if (IPPROTO_UDP == ip->protocol) { |
2706 | struct udphdr *udp = | |
2707 | (struct udphdr *)((uint8_t *)ip + | |
2d7edb92 | 2708 | (ip->ihl << 2)); |
96838a40 | 2709 | if (ntohs(udp->dest) == 67) { |
2d7edb92 MC |
2710 | offset = (uint8_t *)udp + 8 - skb->data; |
2711 | length = skb->len - offset; | |
2712 | ||
2713 | return e1000_mng_write_dhcp_info(hw, | |
96838a40 | 2714 | (uint8_t *)udp + 8, |
2d7edb92 MC |
2715 | length); |
2716 | } | |
2717 | } | |
2718 | } | |
2719 | } | |
2720 | return 0; | |
2721 | } | |
2722 | ||
1da177e4 LT |
2723 | #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) |
2724 | static int | |
2725 | e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
2726 | { | |
60490fe0 | 2727 | struct e1000_adapter *adapter = netdev_priv(netdev); |
581d708e | 2728 | struct e1000_tx_ring *tx_ring; |
1da177e4 LT |
2729 | unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; |
2730 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; | |
2731 | unsigned int tx_flags = 0; | |
2732 | unsigned int len = skb->len; | |
2733 | unsigned long flags; | |
2734 | unsigned int nr_frags = 0; | |
2735 | unsigned int mss = 0; | |
2736 | int count = 0; | |
76c224bc | 2737 | int tso; |
1da177e4 LT |
2738 | unsigned int f; |
2739 | len -= skb->data_len; | |
2740 | ||
581d708e | 2741 | tx_ring = adapter->tx_ring; |
24025e4e | 2742 | |
581d708e | 2743 | if (unlikely(skb->len <= 0)) { |
1da177e4 LT |
2744 | dev_kfree_skb_any(skb); |
2745 | return NETDEV_TX_OK; | |
2746 | } | |
2747 | ||
2748 | #ifdef NETIF_F_TSO | |
2749 | mss = skb_shinfo(skb)->tso_size; | |
76c224bc | 2750 | /* The controller does a simple calculation to |
1da177e4 LT |
2751 | * make sure there is enough room in the FIFO before |
2752 | * initiating the DMA for each buffer. The calc is: | |
2753 | * 4 = ceil(buffer len/mss). To make sure we don't | |
2754 | * overrun the FIFO, adjust the max buffer len if mss | |
2755 | * drops. */ | |
96838a40 | 2756 | if (mss) { |
9a3056da | 2757 | uint8_t hdr_len; |
1da177e4 LT |
2758 | max_per_txd = min(mss << 2, max_per_txd); |
2759 | max_txd_pwr = fls(max_per_txd) - 1; | |
9a3056da | 2760 | |
9f687888 | 2761 | /* TSO Workaround for 82571/2/3 Controllers -- if skb->data |
9a3056da JK |
2762 | * points to just header, pull a few bytes of payload from |
2763 | * frags into skb->data */ | |
2764 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
9f687888 JK |
2765 | if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) { |
2766 | switch (adapter->hw.mac_type) { | |
2767 | unsigned int pull_size; | |
2768 | case e1000_82571: | |
2769 | case e1000_82572: | |
2770 | case e1000_82573: | |
2771 | pull_size = min((unsigned int)4, skb->data_len); | |
2772 | if (!__pskb_pull_tail(skb, pull_size)) { | |
76c224bc | 2773 | printk(KERN_ERR |
9f687888 JK |
2774 | "__pskb_pull_tail failed.\n"); |
2775 | dev_kfree_skb_any(skb); | |
749dfc70 | 2776 | return NETDEV_TX_OK; |
9f687888 JK |
2777 | } |
2778 | len = skb->len - skb->data_len; | |
2779 | break; | |
2780 | default: | |
2781 | /* do nothing */ | |
2782 | break; | |
d74bbd3b | 2783 | } |
9a3056da | 2784 | } |
1da177e4 LT |
2785 | } |
2786 | ||
9a3056da | 2787 | /* reserve a descriptor for the offload context */ |
96838a40 | 2788 | if ((mss) || (skb->ip_summed == CHECKSUM_HW)) |
1da177e4 | 2789 | count++; |
2648345f | 2790 | count++; |
1da177e4 | 2791 | #else |
96838a40 | 2792 | if (skb->ip_summed == CHECKSUM_HW) |
1da177e4 LT |
2793 | count++; |
2794 | #endif | |
fd803241 JK |
2795 | |
2796 | #ifdef NETIF_F_TSO | |
2797 | /* Controller Erratum workaround */ | |
2798 | if (!skb->data_len && tx_ring->last_tx_tso && | |
0f15a8fa | 2799 | !skb_shinfo(skb)->tso_size) |
fd803241 JK |
2800 | count++; |
2801 | #endif | |
2802 | ||
1da177e4 LT |
2803 | count += TXD_USE_COUNT(len, max_txd_pwr); |
2804 | ||
96838a40 | 2805 | if (adapter->pcix_82544) |
1da177e4 LT |
2806 | count++; |
2807 | ||
96838a40 | 2808 | /* work-around for errata 10 and it applies to all controllers |
97338bde MC |
2809 | * in PCI-X mode, so add one more descriptor to the count |
2810 | */ | |
96838a40 | 2811 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
2812 | (len > 2015))) |
2813 | count++; | |
2814 | ||
1da177e4 | 2815 | nr_frags = skb_shinfo(skb)->nr_frags; |
96838a40 | 2816 | for (f = 0; f < nr_frags; f++) |
1da177e4 LT |
2817 | count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, |
2818 | max_txd_pwr); | |
96838a40 | 2819 | if (adapter->pcix_82544) |
1da177e4 LT |
2820 | count += nr_frags; |
2821 | ||
0f15a8fa JK |
2822 | |
2823 | if (adapter->hw.tx_pkt_filtering && | |
2824 | (adapter->hw.mac_type == e1000_82573)) | |
2d7edb92 MC |
2825 | e1000_transfer_dhcp_info(adapter, skb); |
2826 | ||
581d708e MC |
2827 | local_irq_save(flags); |
2828 | if (!spin_trylock(&tx_ring->tx_lock)) { | |
2829 | /* Collision - tell upper layer to requeue */ | |
2830 | local_irq_restore(flags); | |
2831 | return NETDEV_TX_LOCKED; | |
2832 | } | |
1da177e4 LT |
2833 | |
2834 | /* need: count + 2 desc gap to keep tail from touching | |
2835 | * head, otherwise try next time */ | |
581d708e | 2836 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) { |
1da177e4 | 2837 | netif_stop_queue(netdev); |
581d708e | 2838 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2839 | return NETDEV_TX_BUSY; |
2840 | } | |
2841 | ||
96838a40 JB |
2842 | if (unlikely(adapter->hw.mac_type == e1000_82547)) { |
2843 | if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) { | |
1da177e4 LT |
2844 | netif_stop_queue(netdev); |
2845 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies); | |
581d708e | 2846 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2847 | return NETDEV_TX_BUSY; |
2848 | } | |
2849 | } | |
2850 | ||
96838a40 | 2851 | if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { |
1da177e4 LT |
2852 | tx_flags |= E1000_TX_FLAGS_VLAN; |
2853 | tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); | |
2854 | } | |
2855 | ||
581d708e | 2856 | first = tx_ring->next_to_use; |
96838a40 | 2857 | |
581d708e | 2858 | tso = e1000_tso(adapter, tx_ring, skb); |
1da177e4 LT |
2859 | if (tso < 0) { |
2860 | dev_kfree_skb_any(skb); | |
581d708e | 2861 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2862 | return NETDEV_TX_OK; |
2863 | } | |
2864 | ||
fd803241 JK |
2865 | if (likely(tso)) { |
2866 | tx_ring->last_tx_tso = 1; | |
1da177e4 | 2867 | tx_flags |= E1000_TX_FLAGS_TSO; |
fd803241 | 2868 | } else if (likely(e1000_tx_csum(adapter, tx_ring, skb))) |
1da177e4 LT |
2869 | tx_flags |= E1000_TX_FLAGS_CSUM; |
2870 | ||
2d7edb92 | 2871 | /* Old method was to assume IPv4 packet by default if TSO was enabled. |
868d5309 | 2872 | * 82571 hardware supports TSO capabilities for IPv6 as well... |
2d7edb92 | 2873 | * no longer assume, we must. */ |
581d708e | 2874 | if (likely(skb->protocol == ntohs(ETH_P_IP))) |
2d7edb92 MC |
2875 | tx_flags |= E1000_TX_FLAGS_IPV4; |
2876 | ||
581d708e MC |
2877 | e1000_tx_queue(adapter, tx_ring, tx_flags, |
2878 | e1000_tx_map(adapter, tx_ring, skb, first, | |
2879 | max_per_txd, nr_frags, mss)); | |
1da177e4 LT |
2880 | |
2881 | netdev->trans_start = jiffies; | |
2882 | ||
2883 | /* Make sure there is space in the ring for the next send. */ | |
581d708e | 2884 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2)) |
1da177e4 LT |
2885 | netif_stop_queue(netdev); |
2886 | ||
581d708e | 2887 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2888 | return NETDEV_TX_OK; |
2889 | } | |
2890 | ||
2891 | /** | |
2892 | * e1000_tx_timeout - Respond to a Tx Hang | |
2893 | * @netdev: network interface device structure | |
2894 | **/ | |
2895 | ||
2896 | static void | |
2897 | e1000_tx_timeout(struct net_device *netdev) | |
2898 | { | |
60490fe0 | 2899 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2900 | |
2901 | /* Do the reset outside of interrupt context */ | |
87041639 JK |
2902 | adapter->tx_timeout_count++; |
2903 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2904 | } |
2905 | ||
2906 | static void | |
87041639 | 2907 | e1000_reset_task(struct net_device *netdev) |
1da177e4 | 2908 | { |
60490fe0 | 2909 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2910 | |
2911 | e1000_down(adapter); | |
2912 | e1000_up(adapter); | |
2913 | } | |
2914 | ||
2915 | /** | |
2916 | * e1000_get_stats - Get System Network Statistics | |
2917 | * @netdev: network interface device structure | |
2918 | * | |
2919 | * Returns the address of the device statistics structure. | |
2920 | * The statistics are actually updated from the timer callback. | |
2921 | **/ | |
2922 | ||
2923 | static struct net_device_stats * | |
2924 | e1000_get_stats(struct net_device *netdev) | |
2925 | { | |
60490fe0 | 2926 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 2927 | |
6b7660cd | 2928 | /* only return the current stats */ |
1da177e4 LT |
2929 | return &adapter->net_stats; |
2930 | } | |
2931 | ||
2932 | /** | |
2933 | * e1000_change_mtu - Change the Maximum Transfer Unit | |
2934 | * @netdev: network interface device structure | |
2935 | * @new_mtu: new value for maximum frame size | |
2936 | * | |
2937 | * Returns 0 on success, negative on failure | |
2938 | **/ | |
2939 | ||
2940 | static int | |
2941 | e1000_change_mtu(struct net_device *netdev, int new_mtu) | |
2942 | { | |
60490fe0 | 2943 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 2944 | int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; |
85b22eb6 | 2945 | uint16_t eeprom_data = 0; |
1da177e4 | 2946 | |
96838a40 JB |
2947 | if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || |
2948 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { | |
2949 | DPRINTK(PROBE, ERR, "Invalid MTU setting\n"); | |
1da177e4 | 2950 | return -EINVAL; |
2d7edb92 | 2951 | } |
1da177e4 | 2952 | |
997f5cbd JK |
2953 | /* Adapter-specific max frame size limits. */ |
2954 | switch (adapter->hw.mac_type) { | |
9e2feace | 2955 | case e1000_undefined ... e1000_82542_rev2_1: |
997f5cbd JK |
2956 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { |
2957 | DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n"); | |
2d7edb92 | 2958 | return -EINVAL; |
2d7edb92 | 2959 | } |
997f5cbd | 2960 | break; |
85b22eb6 JK |
2961 | case e1000_82573: |
2962 | /* only enable jumbo frames if ASPM is disabled completely | |
2963 | * this means both bits must be zero in 0x1A bits 3:2 */ | |
2964 | e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1, | |
2965 | &eeprom_data); | |
2966 | if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) { | |
2967 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { | |
2968 | DPRINTK(PROBE, ERR, | |
2969 | "Jumbo Frames not supported.\n"); | |
2970 | return -EINVAL; | |
2971 | } | |
2972 | break; | |
2973 | } | |
2974 | /* fall through to get support */ | |
997f5cbd JK |
2975 | case e1000_82571: |
2976 | case e1000_82572: | |
87041639 | 2977 | case e1000_80003es2lan: |
997f5cbd JK |
2978 | #define MAX_STD_JUMBO_FRAME_SIZE 9234 |
2979 | if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) { | |
2980 | DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n"); | |
2981 | return -EINVAL; | |
2982 | } | |
2983 | break; | |
2984 | default: | |
2985 | /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */ | |
2986 | break; | |
1da177e4 LT |
2987 | } |
2988 | ||
9e2feace AK |
2989 | /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN |
2990 | * means we reserve 2 more, this pushes us to allocate from the next | |
2991 | * larger slab size | |
2992 | * i.e. RXBUFFER_2048 --> size-4096 slab */ | |
2993 | ||
2994 | if (max_frame <= E1000_RXBUFFER_256) | |
2995 | adapter->rx_buffer_len = E1000_RXBUFFER_256; | |
2996 | else if (max_frame <= E1000_RXBUFFER_512) | |
2997 | adapter->rx_buffer_len = E1000_RXBUFFER_512; | |
2998 | else if (max_frame <= E1000_RXBUFFER_1024) | |
2999 | adapter->rx_buffer_len = E1000_RXBUFFER_1024; | |
3000 | else if (max_frame <= E1000_RXBUFFER_2048) | |
3001 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; | |
3002 | else if (max_frame <= E1000_RXBUFFER_4096) | |
3003 | adapter->rx_buffer_len = E1000_RXBUFFER_4096; | |
3004 | else if (max_frame <= E1000_RXBUFFER_8192) | |
3005 | adapter->rx_buffer_len = E1000_RXBUFFER_8192; | |
3006 | else if (max_frame <= E1000_RXBUFFER_16384) | |
3007 | adapter->rx_buffer_len = E1000_RXBUFFER_16384; | |
3008 | ||
3009 | /* adjust allocation if LPE protects us, and we aren't using SBP */ | |
3010 | #define MAXIMUM_ETHERNET_VLAN_SIZE 1522 | |
3011 | if (!adapter->hw.tbi_compatibility_on && | |
3012 | ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) || | |
3013 | (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))) | |
3014 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; | |
997f5cbd | 3015 | |
2d7edb92 MC |
3016 | netdev->mtu = new_mtu; |
3017 | ||
96838a40 | 3018 | if (netif_running(netdev)) { |
1da177e4 LT |
3019 | e1000_down(adapter); |
3020 | e1000_up(adapter); | |
3021 | } | |
3022 | ||
1da177e4 LT |
3023 | adapter->hw.max_frame_size = max_frame; |
3024 | ||
3025 | return 0; | |
3026 | } | |
3027 | ||
3028 | /** | |
3029 | * e1000_update_stats - Update the board statistics counters | |
3030 | * @adapter: board private structure | |
3031 | **/ | |
3032 | ||
3033 | void | |
3034 | e1000_update_stats(struct e1000_adapter *adapter) | |
3035 | { | |
3036 | struct e1000_hw *hw = &adapter->hw; | |
3037 | unsigned long flags; | |
3038 | uint16_t phy_tmp; | |
3039 | ||
3040 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | |
3041 | ||
3042 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
3043 | ||
3044 | /* these counters are modified from e1000_adjust_tbi_stats, | |
3045 | * called from the interrupt context, so they must only | |
3046 | * be written while holding adapter->stats_lock | |
3047 | */ | |
3048 | ||
3049 | adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS); | |
3050 | adapter->stats.gprc += E1000_READ_REG(hw, GPRC); | |
3051 | adapter->stats.gorcl += E1000_READ_REG(hw, GORCL); | |
3052 | adapter->stats.gorch += E1000_READ_REG(hw, GORCH); | |
3053 | adapter->stats.bprc += E1000_READ_REG(hw, BPRC); | |
3054 | adapter->stats.mprc += E1000_READ_REG(hw, MPRC); | |
3055 | adapter->stats.roc += E1000_READ_REG(hw, ROC); | |
3056 | adapter->stats.prc64 += E1000_READ_REG(hw, PRC64); | |
3057 | adapter->stats.prc127 += E1000_READ_REG(hw, PRC127); | |
3058 | adapter->stats.prc255 += E1000_READ_REG(hw, PRC255); | |
3059 | adapter->stats.prc511 += E1000_READ_REG(hw, PRC511); | |
3060 | adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023); | |
3061 | adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522); | |
3062 | ||
3063 | adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS); | |
3064 | adapter->stats.mpc += E1000_READ_REG(hw, MPC); | |
3065 | adapter->stats.scc += E1000_READ_REG(hw, SCC); | |
3066 | adapter->stats.ecol += E1000_READ_REG(hw, ECOL); | |
3067 | adapter->stats.mcc += E1000_READ_REG(hw, MCC); | |
3068 | adapter->stats.latecol += E1000_READ_REG(hw, LATECOL); | |
3069 | adapter->stats.dc += E1000_READ_REG(hw, DC); | |
3070 | adapter->stats.sec += E1000_READ_REG(hw, SEC); | |
3071 | adapter->stats.rlec += E1000_READ_REG(hw, RLEC); | |
3072 | adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC); | |
3073 | adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC); | |
3074 | adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC); | |
3075 | adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC); | |
3076 | adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC); | |
3077 | adapter->stats.gptc += E1000_READ_REG(hw, GPTC); | |
3078 | adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL); | |
3079 | adapter->stats.gotch += E1000_READ_REG(hw, GOTCH); | |
3080 | adapter->stats.rnbc += E1000_READ_REG(hw, RNBC); | |
3081 | adapter->stats.ruc += E1000_READ_REG(hw, RUC); | |
3082 | adapter->stats.rfc += E1000_READ_REG(hw, RFC); | |
3083 | adapter->stats.rjc += E1000_READ_REG(hw, RJC); | |
3084 | adapter->stats.torl += E1000_READ_REG(hw, TORL); | |
3085 | adapter->stats.torh += E1000_READ_REG(hw, TORH); | |
3086 | adapter->stats.totl += E1000_READ_REG(hw, TOTL); | |
3087 | adapter->stats.toth += E1000_READ_REG(hw, TOTH); | |
3088 | adapter->stats.tpr += E1000_READ_REG(hw, TPR); | |
3089 | adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64); | |
3090 | adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127); | |
3091 | adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255); | |
3092 | adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511); | |
3093 | adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023); | |
3094 | adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522); | |
3095 | adapter->stats.mptc += E1000_READ_REG(hw, MPTC); | |
3096 | adapter->stats.bptc += E1000_READ_REG(hw, BPTC); | |
3097 | ||
3098 | /* used for adaptive IFS */ | |
3099 | ||
3100 | hw->tx_packet_delta = E1000_READ_REG(hw, TPT); | |
3101 | adapter->stats.tpt += hw->tx_packet_delta; | |
3102 | hw->collision_delta = E1000_READ_REG(hw, COLC); | |
3103 | adapter->stats.colc += hw->collision_delta; | |
3104 | ||
96838a40 | 3105 | if (hw->mac_type >= e1000_82543) { |
1da177e4 LT |
3106 | adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC); |
3107 | adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC); | |
3108 | adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS); | |
3109 | adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR); | |
3110 | adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC); | |
3111 | adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC); | |
3112 | } | |
96838a40 | 3113 | if (hw->mac_type > e1000_82547_rev_2) { |
2d7edb92 MC |
3114 | adapter->stats.iac += E1000_READ_REG(hw, IAC); |
3115 | adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC); | |
3116 | adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC); | |
3117 | adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC); | |
3118 | adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC); | |
3119 | adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC); | |
3120 | adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC); | |
3121 | adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC); | |
3122 | adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC); | |
3123 | } | |
1da177e4 LT |
3124 | |
3125 | /* Fill out the OS statistics structure */ | |
3126 | ||
3127 | adapter->net_stats.rx_packets = adapter->stats.gprc; | |
3128 | adapter->net_stats.tx_packets = adapter->stats.gptc; | |
3129 | adapter->net_stats.rx_bytes = adapter->stats.gorcl; | |
3130 | adapter->net_stats.tx_bytes = adapter->stats.gotcl; | |
3131 | adapter->net_stats.multicast = adapter->stats.mprc; | |
3132 | adapter->net_stats.collisions = adapter->stats.colc; | |
3133 | ||
3134 | /* Rx Errors */ | |
3135 | ||
87041639 JK |
3136 | /* RLEC on some newer hardware can be incorrect so build |
3137 | * our own version based on RUC and ROC */ | |
1da177e4 LT |
3138 | adapter->net_stats.rx_errors = adapter->stats.rxerrc + |
3139 | adapter->stats.crcerrs + adapter->stats.algnerrc + | |
87041639 JK |
3140 | adapter->stats.ruc + adapter->stats.roc + |
3141 | adapter->stats.cexterr; | |
87041639 JK |
3142 | adapter->net_stats.rx_length_errors = adapter->stats.ruc + |
3143 | adapter->stats.roc; | |
1da177e4 LT |
3144 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; |
3145 | adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; | |
1da177e4 LT |
3146 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; |
3147 | ||
3148 | /* Tx Errors */ | |
3149 | ||
3150 | adapter->net_stats.tx_errors = adapter->stats.ecol + | |
3151 | adapter->stats.latecol; | |
3152 | adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; | |
3153 | adapter->net_stats.tx_window_errors = adapter->stats.latecol; | |
3154 | adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; | |
3155 | ||
3156 | /* Tx Dropped needs to be maintained elsewhere */ | |
3157 | ||
3158 | /* Phy Stats */ | |
3159 | ||
96838a40 JB |
3160 | if (hw->media_type == e1000_media_type_copper) { |
3161 | if ((adapter->link_speed == SPEED_1000) && | |
1da177e4 LT |
3162 | (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { |
3163 | phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; | |
3164 | adapter->phy_stats.idle_errors += phy_tmp; | |
3165 | } | |
3166 | ||
96838a40 | 3167 | if ((hw->mac_type <= e1000_82546) && |
1da177e4 LT |
3168 | (hw->phy_type == e1000_phy_m88) && |
3169 | !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp)) | |
3170 | adapter->phy_stats.receive_errors += phy_tmp; | |
3171 | } | |
3172 | ||
3173 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
3174 | } | |
3175 | ||
3176 | /** | |
3177 | * e1000_intr - Interrupt Handler | |
3178 | * @irq: interrupt number | |
3179 | * @data: pointer to a network interface device structure | |
3180 | * @pt_regs: CPU registers structure | |
3181 | **/ | |
3182 | ||
3183 | static irqreturn_t | |
3184 | e1000_intr(int irq, void *data, struct pt_regs *regs) | |
3185 | { | |
3186 | struct net_device *netdev = data; | |
60490fe0 | 3187 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3188 | struct e1000_hw *hw = &adapter->hw; |
87041639 | 3189 | uint32_t rctl, icr = E1000_READ_REG(hw, ICR); |
1e613fd9 | 3190 | #ifndef CONFIG_E1000_NAPI |
581d708e | 3191 | int i; |
1e613fd9 JK |
3192 | #else |
3193 | /* Interrupt Auto-Mask...upon reading ICR, | |
3194 | * interrupts are masked. No need for the | |
3195 | * IMC write, but it does mean we should | |
3196 | * account for it ASAP. */ | |
3197 | if (likely(hw->mac_type >= e1000_82571)) | |
3198 | atomic_inc(&adapter->irq_sem); | |
be2b28ed | 3199 | #endif |
1da177e4 | 3200 | |
1e613fd9 JK |
3201 | if (unlikely(!icr)) { |
3202 | #ifdef CONFIG_E1000_NAPI | |
3203 | if (hw->mac_type >= e1000_82571) | |
3204 | e1000_irq_enable(adapter); | |
3205 | #endif | |
1da177e4 | 3206 | return IRQ_NONE; /* Not our interrupt */ |
1e613fd9 | 3207 | } |
1da177e4 | 3208 | |
96838a40 | 3209 | if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { |
1da177e4 | 3210 | hw->get_link_status = 1; |
87041639 JK |
3211 | /* 80003ES2LAN workaround-- |
3212 | * For packet buffer work-around on link down event; | |
3213 | * disable receives here in the ISR and | |
3214 | * reset adapter in watchdog | |
3215 | */ | |
3216 | if (netif_carrier_ok(netdev) && | |
3217 | (adapter->hw.mac_type == e1000_80003es2lan)) { | |
3218 | /* disable receives */ | |
3219 | rctl = E1000_READ_REG(hw, RCTL); | |
3220 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
3221 | } | |
1da177e4 LT |
3222 | mod_timer(&adapter->watchdog_timer, jiffies); |
3223 | } | |
3224 | ||
3225 | #ifdef CONFIG_E1000_NAPI | |
1e613fd9 JK |
3226 | if (unlikely(hw->mac_type < e1000_82571)) { |
3227 | atomic_inc(&adapter->irq_sem); | |
3228 | E1000_WRITE_REG(hw, IMC, ~0); | |
3229 | E1000_WRITE_FLUSH(hw); | |
3230 | } | |
581d708e MC |
3231 | if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0]))) |
3232 | __netif_rx_schedule(&adapter->polling_netdev[0]); | |
3233 | else | |
3234 | e1000_irq_enable(adapter); | |
c1605eb3 | 3235 | #else |
1da177e4 | 3236 | /* Writing IMC and IMS is needed for 82547. |
96838a40 JB |
3237 | * Due to Hub Link bus being occupied, an interrupt |
3238 | * de-assertion message is not able to be sent. | |
3239 | * When an interrupt assertion message is generated later, | |
3240 | * two messages are re-ordered and sent out. | |
3241 | * That causes APIC to think 82547 is in de-assertion | |
3242 | * state, while 82547 is in assertion state, resulting | |
3243 | * in dead lock. Writing IMC forces 82547 into | |
3244 | * de-assertion state. | |
3245 | */ | |
3246 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) { | |
1da177e4 | 3247 | atomic_inc(&adapter->irq_sem); |
2648345f | 3248 | E1000_WRITE_REG(hw, IMC, ~0); |
1da177e4 LT |
3249 | } |
3250 | ||
96838a40 JB |
3251 | for (i = 0; i < E1000_MAX_INTR; i++) |
3252 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & | |
581d708e | 3253 | !e1000_clean_tx_irq(adapter, adapter->tx_ring))) |
1da177e4 LT |
3254 | break; |
3255 | ||
96838a40 | 3256 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) |
1da177e4 | 3257 | e1000_irq_enable(adapter); |
581d708e | 3258 | |
c1605eb3 | 3259 | #endif |
1da177e4 LT |
3260 | |
3261 | return IRQ_HANDLED; | |
3262 | } | |
3263 | ||
3264 | #ifdef CONFIG_E1000_NAPI | |
3265 | /** | |
3266 | * e1000_clean - NAPI Rx polling callback | |
3267 | * @adapter: board private structure | |
3268 | **/ | |
3269 | ||
3270 | static int | |
581d708e | 3271 | e1000_clean(struct net_device *poll_dev, int *budget) |
1da177e4 | 3272 | { |
581d708e MC |
3273 | struct e1000_adapter *adapter; |
3274 | int work_to_do = min(*budget, poll_dev->quota); | |
38bd3b26 | 3275 | int tx_cleaned = 0, i = 0, work_done = 0; |
581d708e MC |
3276 | |
3277 | /* Must NOT use netdev_priv macro here. */ | |
3278 | adapter = poll_dev->priv; | |
3279 | ||
3280 | /* Keep link state information with original netdev */ | |
3281 | if (!netif_carrier_ok(adapter->netdev)) | |
3282 | goto quit_polling; | |
2648345f | 3283 | |
581d708e MC |
3284 | while (poll_dev != &adapter->polling_netdev[i]) { |
3285 | i++; | |
5d9428de | 3286 | BUG_ON(i == adapter->num_rx_queues); |
581d708e MC |
3287 | } |
3288 | ||
8241e35e JK |
3289 | if (likely(adapter->num_tx_queues == 1)) { |
3290 | /* e1000_clean is called per-cpu. This lock protects | |
3291 | * tx_ring[0] from being cleaned by multiple cpus | |
3292 | * simultaneously. A failure obtaining the lock means | |
3293 | * tx_ring[0] is currently being cleaned anyway. */ | |
3294 | if (spin_trylock(&adapter->tx_queue_lock)) { | |
3295 | tx_cleaned = e1000_clean_tx_irq(adapter, | |
3296 | &adapter->tx_ring[0]); | |
3297 | spin_unlock(&adapter->tx_queue_lock); | |
3298 | } | |
3299 | } else | |
3300 | tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]); | |
3301 | ||
581d708e MC |
3302 | adapter->clean_rx(adapter, &adapter->rx_ring[i], |
3303 | &work_done, work_to_do); | |
1da177e4 LT |
3304 | |
3305 | *budget -= work_done; | |
581d708e | 3306 | poll_dev->quota -= work_done; |
96838a40 | 3307 | |
2b02893e | 3308 | /* If no Tx and not enough Rx work done, exit the polling mode */ |
96838a40 | 3309 | if ((!tx_cleaned && (work_done == 0)) || |
581d708e MC |
3310 | !netif_running(adapter->netdev)) { |
3311 | quit_polling: | |
3312 | netif_rx_complete(poll_dev); | |
1da177e4 LT |
3313 | e1000_irq_enable(adapter); |
3314 | return 0; | |
3315 | } | |
3316 | ||
3317 | return 1; | |
3318 | } | |
3319 | ||
3320 | #endif | |
3321 | /** | |
3322 | * e1000_clean_tx_irq - Reclaim resources after transmit completes | |
3323 | * @adapter: board private structure | |
3324 | **/ | |
3325 | ||
3326 | static boolean_t | |
581d708e MC |
3327 | e1000_clean_tx_irq(struct e1000_adapter *adapter, |
3328 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 3329 | { |
1da177e4 LT |
3330 | struct net_device *netdev = adapter->netdev; |
3331 | struct e1000_tx_desc *tx_desc, *eop_desc; | |
3332 | struct e1000_buffer *buffer_info; | |
3333 | unsigned int i, eop; | |
2a1af5d7 JK |
3334 | #ifdef CONFIG_E1000_NAPI |
3335 | unsigned int count = 0; | |
3336 | #endif | |
1da177e4 LT |
3337 | boolean_t cleaned = FALSE; |
3338 | ||
3339 | i = tx_ring->next_to_clean; | |
3340 | eop = tx_ring->buffer_info[i].next_to_watch; | |
3341 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
3342 | ||
581d708e | 3343 | while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) { |
96838a40 | 3344 | for (cleaned = FALSE; !cleaned; ) { |
1da177e4 LT |
3345 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
3346 | buffer_info = &tx_ring->buffer_info[i]; | |
3347 | cleaned = (i == eop); | |
3348 | ||
fd803241 | 3349 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); |
8241e35e | 3350 | memset(tx_desc, 0, sizeof(struct e1000_tx_desc)); |
1da177e4 | 3351 | |
96838a40 | 3352 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 | 3353 | } |
581d708e | 3354 | |
7bfa4816 | 3355 | |
1da177e4 LT |
3356 | eop = tx_ring->buffer_info[i].next_to_watch; |
3357 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
2a1af5d7 JK |
3358 | #ifdef CONFIG_E1000_NAPI |
3359 | #define E1000_TX_WEIGHT 64 | |
3360 | /* weight of a sort for tx, to avoid endless transmit cleanup */ | |
3361 | if (count++ == E1000_TX_WEIGHT) break; | |
3362 | #endif | |
1da177e4 LT |
3363 | } |
3364 | ||
3365 | tx_ring->next_to_clean = i; | |
3366 | ||
77b2aad5 | 3367 | #define TX_WAKE_THRESHOLD 32 |
96838a40 | 3368 | if (unlikely(cleaned && netif_queue_stopped(netdev) && |
77b2aad5 AK |
3369 | netif_carrier_ok(netdev))) { |
3370 | spin_lock(&tx_ring->tx_lock); | |
3371 | if (netif_queue_stopped(netdev) && | |
3372 | (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) | |
3373 | netif_wake_queue(netdev); | |
3374 | spin_unlock(&tx_ring->tx_lock); | |
3375 | } | |
2648345f | 3376 | |
581d708e | 3377 | if (adapter->detect_tx_hung) { |
2648345f | 3378 | /* Detect a transmit hang in hardware, this serializes the |
1da177e4 LT |
3379 | * check with the clearing of time_stamp and movement of i */ |
3380 | adapter->detect_tx_hung = FALSE; | |
392137fa JK |
3381 | if (tx_ring->buffer_info[eop].dma && |
3382 | time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + | |
7e6c9861 | 3383 | (adapter->tx_timeout_factor * HZ)) |
70b8f1e1 | 3384 | && !(E1000_READ_REG(&adapter->hw, STATUS) & |
392137fa | 3385 | E1000_STATUS_TXOFF)) { |
70b8f1e1 MC |
3386 | |
3387 | /* detected Tx unit hang */ | |
c6963ef5 | 3388 | DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" |
7bfa4816 | 3389 | " Tx Queue <%lu>\n" |
70b8f1e1 MC |
3390 | " TDH <%x>\n" |
3391 | " TDT <%x>\n" | |
3392 | " next_to_use <%x>\n" | |
3393 | " next_to_clean <%x>\n" | |
3394 | "buffer_info[next_to_clean]\n" | |
70b8f1e1 MC |
3395 | " time_stamp <%lx>\n" |
3396 | " next_to_watch <%x>\n" | |
3397 | " jiffies <%lx>\n" | |
3398 | " next_to_watch.status <%x>\n", | |
7bfa4816 JK |
3399 | (unsigned long)((tx_ring - adapter->tx_ring) / |
3400 | sizeof(struct e1000_tx_ring)), | |
581d708e MC |
3401 | readl(adapter->hw.hw_addr + tx_ring->tdh), |
3402 | readl(adapter->hw.hw_addr + tx_ring->tdt), | |
70b8f1e1 | 3403 | tx_ring->next_to_use, |
392137fa JK |
3404 | tx_ring->next_to_clean, |
3405 | tx_ring->buffer_info[eop].time_stamp, | |
70b8f1e1 MC |
3406 | eop, |
3407 | jiffies, | |
3408 | eop_desc->upper.fields.status); | |
1da177e4 | 3409 | netif_stop_queue(netdev); |
70b8f1e1 | 3410 | } |
1da177e4 | 3411 | } |
1da177e4 LT |
3412 | return cleaned; |
3413 | } | |
3414 | ||
3415 | /** | |
3416 | * e1000_rx_checksum - Receive Checksum Offload for 82543 | |
2d7edb92 MC |
3417 | * @adapter: board private structure |
3418 | * @status_err: receive descriptor status and error fields | |
3419 | * @csum: receive descriptor csum field | |
3420 | * @sk_buff: socket buffer with received data | |
1da177e4 LT |
3421 | **/ |
3422 | ||
e619d523 | 3423 | static void |
1da177e4 | 3424 | e1000_rx_checksum(struct e1000_adapter *adapter, |
2d7edb92 MC |
3425 | uint32_t status_err, uint32_t csum, |
3426 | struct sk_buff *skb) | |
1da177e4 | 3427 | { |
2d7edb92 MC |
3428 | uint16_t status = (uint16_t)status_err; |
3429 | uint8_t errors = (uint8_t)(status_err >> 24); | |
3430 | skb->ip_summed = CHECKSUM_NONE; | |
3431 | ||
1da177e4 | 3432 | /* 82543 or newer only */ |
96838a40 | 3433 | if (unlikely(adapter->hw.mac_type < e1000_82543)) return; |
1da177e4 | 3434 | /* Ignore Checksum bit is set */ |
96838a40 | 3435 | if (unlikely(status & E1000_RXD_STAT_IXSM)) return; |
2d7edb92 | 3436 | /* TCP/UDP checksum error bit is set */ |
96838a40 | 3437 | if (unlikely(errors & E1000_RXD_ERR_TCPE)) { |
1da177e4 | 3438 | /* let the stack verify checksum errors */ |
1da177e4 | 3439 | adapter->hw_csum_err++; |
2d7edb92 MC |
3440 | return; |
3441 | } | |
3442 | /* TCP/UDP Checksum has not been calculated */ | |
96838a40 JB |
3443 | if (adapter->hw.mac_type <= e1000_82547_rev_2) { |
3444 | if (!(status & E1000_RXD_STAT_TCPCS)) | |
2d7edb92 | 3445 | return; |
1da177e4 | 3446 | } else { |
96838a40 | 3447 | if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) |
2d7edb92 MC |
3448 | return; |
3449 | } | |
3450 | /* It must be a TCP or UDP packet with a valid checksum */ | |
3451 | if (likely(status & E1000_RXD_STAT_TCPCS)) { | |
1da177e4 LT |
3452 | /* TCP checksum is good */ |
3453 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
2d7edb92 MC |
3454 | } else if (adapter->hw.mac_type > e1000_82547_rev_2) { |
3455 | /* IP fragment with UDP payload */ | |
3456 | /* Hardware complements the payload checksum, so we undo it | |
3457 | * and then put the value in host order for further stack use. | |
3458 | */ | |
3459 | csum = ntohl(csum ^ 0xFFFF); | |
3460 | skb->csum = csum; | |
3461 | skb->ip_summed = CHECKSUM_HW; | |
1da177e4 | 3462 | } |
2d7edb92 | 3463 | adapter->hw_csum_good++; |
1da177e4 LT |
3464 | } |
3465 | ||
3466 | /** | |
2d7edb92 | 3467 | * e1000_clean_rx_irq - Send received data up the network stack; legacy |
1da177e4 LT |
3468 | * @adapter: board private structure |
3469 | **/ | |
3470 | ||
3471 | static boolean_t | |
3472 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3473 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3474 | struct e1000_rx_ring *rx_ring, | |
3475 | int *work_done, int work_to_do) | |
1da177e4 | 3476 | #else |
581d708e MC |
3477 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3478 | struct e1000_rx_ring *rx_ring) | |
1da177e4 LT |
3479 | #endif |
3480 | { | |
1da177e4 LT |
3481 | struct net_device *netdev = adapter->netdev; |
3482 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f JB |
3483 | struct e1000_rx_desc *rx_desc, *next_rxd; |
3484 | struct e1000_buffer *buffer_info, *next_buffer; | |
1da177e4 LT |
3485 | unsigned long flags; |
3486 | uint32_t length; | |
3487 | uint8_t last_byte; | |
3488 | unsigned int i; | |
72d64a43 | 3489 | int cleaned_count = 0; |
a1415ee6 | 3490 | boolean_t cleaned = FALSE; |
1da177e4 LT |
3491 | |
3492 | i = rx_ring->next_to_clean; | |
3493 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
b92ff8ee | 3494 | buffer_info = &rx_ring->buffer_info[i]; |
1da177e4 | 3495 | |
b92ff8ee | 3496 | while (rx_desc->status & E1000_RXD_STAT_DD) { |
86c3d59f | 3497 | struct sk_buff *skb, *next_skb; |
a292ca6e | 3498 | u8 status; |
1da177e4 | 3499 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 3500 | if (*work_done >= work_to_do) |
1da177e4 LT |
3501 | break; |
3502 | (*work_done)++; | |
3503 | #endif | |
a292ca6e | 3504 | status = rx_desc->status; |
b92ff8ee | 3505 | skb = buffer_info->skb; |
86c3d59f JB |
3506 | buffer_info->skb = NULL; |
3507 | ||
30320be8 JK |
3508 | prefetch(skb->data - NET_IP_ALIGN); |
3509 | ||
86c3d59f JB |
3510 | if (++i == rx_ring->count) i = 0; |
3511 | next_rxd = E1000_RX_DESC(*rx_ring, i); | |
30320be8 JK |
3512 | prefetch(next_rxd); |
3513 | ||
86c3d59f JB |
3514 | next_buffer = &rx_ring->buffer_info[i]; |
3515 | next_skb = next_buffer->skb; | |
30320be8 | 3516 | prefetch(next_skb->data - NET_IP_ALIGN); |
86c3d59f | 3517 | |
72d64a43 JK |
3518 | cleaned = TRUE; |
3519 | cleaned_count++; | |
a292ca6e JK |
3520 | pci_unmap_single(pdev, |
3521 | buffer_info->dma, | |
3522 | buffer_info->length, | |
1da177e4 LT |
3523 | PCI_DMA_FROMDEVICE); |
3524 | ||
1da177e4 LT |
3525 | length = le16_to_cpu(rx_desc->length); |
3526 | ||
a1415ee6 JK |
3527 | if (unlikely(!(status & E1000_RXD_STAT_EOP))) { |
3528 | /* All receives must fit into a single buffer */ | |
3529 | E1000_DBG("%s: Receive packet consumed multiple" | |
3530 | " buffers\n", netdev->name); | |
3531 | dev_kfree_skb_irq(skb); | |
1da177e4 LT |
3532 | goto next_desc; |
3533 | } | |
3534 | ||
96838a40 | 3535 | if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) { |
1da177e4 | 3536 | last_byte = *(skb->data + length - 1); |
b92ff8ee | 3537 | if (TBI_ACCEPT(&adapter->hw, status, |
1da177e4 LT |
3538 | rx_desc->errors, length, last_byte)) { |
3539 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
a292ca6e JK |
3540 | e1000_tbi_adjust_stats(&adapter->hw, |
3541 | &adapter->stats, | |
1da177e4 LT |
3542 | length, skb->data); |
3543 | spin_unlock_irqrestore(&adapter->stats_lock, | |
3544 | flags); | |
3545 | length--; | |
3546 | } else { | |
9e2feace AK |
3547 | /* recycle */ |
3548 | buffer_info->skb = skb; | |
1da177e4 LT |
3549 | goto next_desc; |
3550 | } | |
1cb5821f | 3551 | } |
1da177e4 | 3552 | |
a292ca6e JK |
3553 | /* code added for copybreak, this should improve |
3554 | * performance for small packets with large amounts | |
3555 | * of reassembly being done in the stack */ | |
3556 | #define E1000_CB_LENGTH 256 | |
a1415ee6 | 3557 | if (length < E1000_CB_LENGTH) { |
a292ca6e JK |
3558 | struct sk_buff *new_skb = |
3559 | dev_alloc_skb(length + NET_IP_ALIGN); | |
3560 | if (new_skb) { | |
3561 | skb_reserve(new_skb, NET_IP_ALIGN); | |
3562 | new_skb->dev = netdev; | |
3563 | memcpy(new_skb->data - NET_IP_ALIGN, | |
3564 | skb->data - NET_IP_ALIGN, | |
3565 | length + NET_IP_ALIGN); | |
3566 | /* save the skb in buffer_info as good */ | |
3567 | buffer_info->skb = skb; | |
3568 | skb = new_skb; | |
3569 | skb_put(skb, length); | |
3570 | } | |
a1415ee6 JK |
3571 | } else |
3572 | skb_put(skb, length); | |
a292ca6e JK |
3573 | |
3574 | /* end copybreak code */ | |
1da177e4 LT |
3575 | |
3576 | /* Receive Checksum Offload */ | |
a292ca6e JK |
3577 | e1000_rx_checksum(adapter, |
3578 | (uint32_t)(status) | | |
2d7edb92 | 3579 | ((uint32_t)(rx_desc->errors) << 24), |
c3d7a3a4 | 3580 | le16_to_cpu(rx_desc->csum), skb); |
96838a40 | 3581 | |
1da177e4 LT |
3582 | skb->protocol = eth_type_trans(skb, netdev); |
3583 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 3584 | if (unlikely(adapter->vlgrp && |
a292ca6e | 3585 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 | 3586 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
2d7edb92 MC |
3587 | le16_to_cpu(rx_desc->special) & |
3588 | E1000_RXD_SPC_VLAN_MASK); | |
1da177e4 LT |
3589 | } else { |
3590 | netif_receive_skb(skb); | |
3591 | } | |
3592 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 3593 | if (unlikely(adapter->vlgrp && |
b92ff8ee | 3594 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 LT |
3595 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
3596 | le16_to_cpu(rx_desc->special) & | |
3597 | E1000_RXD_SPC_VLAN_MASK); | |
3598 | } else { | |
3599 | netif_rx(skb); | |
3600 | } | |
3601 | #endif /* CONFIG_E1000_NAPI */ | |
3602 | netdev->last_rx = jiffies; | |
3603 | ||
3604 | next_desc: | |
3605 | rx_desc->status = 0; | |
1da177e4 | 3606 | |
72d64a43 JK |
3607 | /* return some buffers to hardware, one at a time is too slow */ |
3608 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
3609 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
3610 | cleaned_count = 0; | |
3611 | } | |
3612 | ||
30320be8 | 3613 | /* use prefetched values */ |
86c3d59f JB |
3614 | rx_desc = next_rxd; |
3615 | buffer_info = next_buffer; | |
1da177e4 | 3616 | } |
1da177e4 | 3617 | rx_ring->next_to_clean = i; |
72d64a43 JK |
3618 | |
3619 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
3620 | if (cleaned_count) | |
3621 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
2d7edb92 MC |
3622 | |
3623 | return cleaned; | |
3624 | } | |
3625 | ||
3626 | /** | |
3627 | * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split | |
3628 | * @adapter: board private structure | |
3629 | **/ | |
3630 | ||
3631 | static boolean_t | |
3632 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3633 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
3634 | struct e1000_rx_ring *rx_ring, | |
3635 | int *work_done, int work_to_do) | |
2d7edb92 | 3636 | #else |
581d708e MC |
3637 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
3638 | struct e1000_rx_ring *rx_ring) | |
2d7edb92 MC |
3639 | #endif |
3640 | { | |
86c3d59f | 3641 | union e1000_rx_desc_packet_split *rx_desc, *next_rxd; |
2d7edb92 MC |
3642 | struct net_device *netdev = adapter->netdev; |
3643 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f | 3644 | struct e1000_buffer *buffer_info, *next_buffer; |
2d7edb92 MC |
3645 | struct e1000_ps_page *ps_page; |
3646 | struct e1000_ps_page_dma *ps_page_dma; | |
86c3d59f | 3647 | struct sk_buff *skb, *next_skb; |
2d7edb92 MC |
3648 | unsigned int i, j; |
3649 | uint32_t length, staterr; | |
72d64a43 | 3650 | int cleaned_count = 0; |
2d7edb92 MC |
3651 | boolean_t cleaned = FALSE; |
3652 | ||
3653 | i = rx_ring->next_to_clean; | |
3654 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | |
683a38f3 | 3655 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
9e2feace | 3656 | buffer_info = &rx_ring->buffer_info[i]; |
2d7edb92 | 3657 | |
96838a40 | 3658 | while (staterr & E1000_RXD_STAT_DD) { |
30320be8 | 3659 | buffer_info = &rx_ring->buffer_info[i]; |
2d7edb92 MC |
3660 | ps_page = &rx_ring->ps_page[i]; |
3661 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
3662 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 3663 | if (unlikely(*work_done >= work_to_do)) |
2d7edb92 MC |
3664 | break; |
3665 | (*work_done)++; | |
3666 | #endif | |
86c3d59f JB |
3667 | skb = buffer_info->skb; |
3668 | ||
30320be8 JK |
3669 | /* in the packet split case this is header only */ |
3670 | prefetch(skb->data - NET_IP_ALIGN); | |
3671 | ||
86c3d59f JB |
3672 | if (++i == rx_ring->count) i = 0; |
3673 | next_rxd = E1000_RX_DESC_PS(*rx_ring, i); | |
30320be8 JK |
3674 | prefetch(next_rxd); |
3675 | ||
86c3d59f JB |
3676 | next_buffer = &rx_ring->buffer_info[i]; |
3677 | next_skb = next_buffer->skb; | |
30320be8 | 3678 | prefetch(next_skb->data - NET_IP_ALIGN); |
86c3d59f | 3679 | |
2d7edb92 | 3680 | cleaned = TRUE; |
72d64a43 | 3681 | cleaned_count++; |
2d7edb92 MC |
3682 | pci_unmap_single(pdev, buffer_info->dma, |
3683 | buffer_info->length, | |
3684 | PCI_DMA_FROMDEVICE); | |
3685 | ||
96838a40 | 3686 | if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) { |
2d7edb92 MC |
3687 | E1000_DBG("%s: Packet Split buffers didn't pick up" |
3688 | " the full packet\n", netdev->name); | |
3689 | dev_kfree_skb_irq(skb); | |
3690 | goto next_desc; | |
3691 | } | |
1da177e4 | 3692 | |
96838a40 | 3693 | if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) { |
2d7edb92 MC |
3694 | dev_kfree_skb_irq(skb); |
3695 | goto next_desc; | |
3696 | } | |
3697 | ||
3698 | length = le16_to_cpu(rx_desc->wb.middle.length0); | |
3699 | ||
96838a40 | 3700 | if (unlikely(!length)) { |
2d7edb92 MC |
3701 | E1000_DBG("%s: Last part of the packet spanning" |
3702 | " multiple descriptors\n", netdev->name); | |
3703 | dev_kfree_skb_irq(skb); | |
3704 | goto next_desc; | |
3705 | } | |
3706 | ||
3707 | /* Good Receive */ | |
3708 | skb_put(skb, length); | |
3709 | ||
dc7c6add JK |
3710 | { |
3711 | /* this looks ugly, but it seems compiler issues make it | |
3712 | more efficient than reusing j */ | |
3713 | int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); | |
3714 | ||
3715 | /* page alloc/put takes too long and effects small packet | |
3716 | * throughput, so unsplit small packets and save the alloc/put*/ | |
9e2feace | 3717 | if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) { |
dc7c6add | 3718 | u8 *vaddr; |
76c224bc | 3719 | /* there is no documentation about how to call |
dc7c6add JK |
3720 | * kmap_atomic, so we can't hold the mapping |
3721 | * very long */ | |
3722 | pci_dma_sync_single_for_cpu(pdev, | |
3723 | ps_page_dma->ps_page_dma[0], | |
3724 | PAGE_SIZE, | |
3725 | PCI_DMA_FROMDEVICE); | |
3726 | vaddr = kmap_atomic(ps_page->ps_page[0], | |
3727 | KM_SKB_DATA_SOFTIRQ); | |
3728 | memcpy(skb->tail, vaddr, l1); | |
3729 | kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); | |
3730 | pci_dma_sync_single_for_device(pdev, | |
3731 | ps_page_dma->ps_page_dma[0], | |
3732 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
3733 | skb_put(skb, l1); | |
3734 | length += l1; | |
3735 | goto copydone; | |
3736 | } /* if */ | |
3737 | } | |
3738 | ||
96838a40 | 3739 | for (j = 0; j < adapter->rx_ps_pages; j++) { |
30320be8 | 3740 | if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j]))) |
2d7edb92 | 3741 | break; |
2d7edb92 MC |
3742 | pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j], |
3743 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
3744 | ps_page_dma->ps_page_dma[j] = 0; | |
329bfd0b JK |
3745 | skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0, |
3746 | length); | |
2d7edb92 | 3747 | ps_page->ps_page[j] = NULL; |
2d7edb92 MC |
3748 | skb->len += length; |
3749 | skb->data_len += length; | |
5d51b80f | 3750 | skb->truesize += length; |
2d7edb92 MC |
3751 | } |
3752 | ||
dc7c6add | 3753 | copydone: |
2d7edb92 | 3754 | e1000_rx_checksum(adapter, staterr, |
c3d7a3a4 | 3755 | le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); |
2d7edb92 MC |
3756 | skb->protocol = eth_type_trans(skb, netdev); |
3757 | ||
96838a40 | 3758 | if (likely(rx_desc->wb.upper.header_status & |
c3d7a3a4 | 3759 | cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))) |
e4c811c9 | 3760 | adapter->rx_hdr_split++; |
2d7edb92 | 3761 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 3762 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 3763 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
683a38f3 MC |
3764 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3765 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
3766 | } else { |
3767 | netif_receive_skb(skb); | |
3768 | } | |
3769 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 3770 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 3771 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
683a38f3 MC |
3772 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3773 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
3774 | } else { |
3775 | netif_rx(skb); | |
3776 | } | |
3777 | #endif /* CONFIG_E1000_NAPI */ | |
3778 | netdev->last_rx = jiffies; | |
3779 | ||
3780 | next_desc: | |
c3d7a3a4 | 3781 | rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); |
2d7edb92 | 3782 | buffer_info->skb = NULL; |
2d7edb92 | 3783 | |
72d64a43 JK |
3784 | /* return some buffers to hardware, one at a time is too slow */ |
3785 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
3786 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
3787 | cleaned_count = 0; | |
3788 | } | |
3789 | ||
30320be8 | 3790 | /* use prefetched values */ |
86c3d59f JB |
3791 | rx_desc = next_rxd; |
3792 | buffer_info = next_buffer; | |
3793 | ||
683a38f3 | 3794 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
2d7edb92 MC |
3795 | } |
3796 | rx_ring->next_to_clean = i; | |
72d64a43 JK |
3797 | |
3798 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
3799 | if (cleaned_count) | |
3800 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
1da177e4 LT |
3801 | |
3802 | return cleaned; | |
3803 | } | |
3804 | ||
3805 | /** | |
2d7edb92 | 3806 | * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended |
1da177e4 LT |
3807 | * @adapter: address of board private structure |
3808 | **/ | |
3809 | ||
3810 | static void | |
581d708e | 3811 | e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 | 3812 | struct e1000_rx_ring *rx_ring, |
a292ca6e | 3813 | int cleaned_count) |
1da177e4 | 3814 | { |
1da177e4 LT |
3815 | struct net_device *netdev = adapter->netdev; |
3816 | struct pci_dev *pdev = adapter->pdev; | |
3817 | struct e1000_rx_desc *rx_desc; | |
3818 | struct e1000_buffer *buffer_info; | |
3819 | struct sk_buff *skb; | |
2648345f MC |
3820 | unsigned int i; |
3821 | unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN; | |
1da177e4 LT |
3822 | |
3823 | i = rx_ring->next_to_use; | |
3824 | buffer_info = &rx_ring->buffer_info[i]; | |
3825 | ||
a292ca6e JK |
3826 | while (cleaned_count--) { |
3827 | if (!(skb = buffer_info->skb)) | |
3828 | skb = dev_alloc_skb(bufsz); | |
3829 | else { | |
3830 | skb_trim(skb, 0); | |
3831 | goto map_skb; | |
3832 | } | |
3833 | ||
96838a40 | 3834 | if (unlikely(!skb)) { |
1da177e4 | 3835 | /* Better luck next round */ |
72d64a43 | 3836 | adapter->alloc_rx_buff_failed++; |
1da177e4 LT |
3837 | break; |
3838 | } | |
3839 | ||
2648345f | 3840 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
3841 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
3842 | struct sk_buff *oldskb = skb; | |
2648345f MC |
3843 | DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes " |
3844 | "at %p\n", bufsz, skb->data); | |
3845 | /* Try again, without freeing the previous */ | |
1da177e4 | 3846 | skb = dev_alloc_skb(bufsz); |
2648345f | 3847 | /* Failed allocation, critical failure */ |
1da177e4 LT |
3848 | if (!skb) { |
3849 | dev_kfree_skb(oldskb); | |
3850 | break; | |
3851 | } | |
2648345f | 3852 | |
1da177e4 LT |
3853 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
3854 | /* give up */ | |
3855 | dev_kfree_skb(skb); | |
3856 | dev_kfree_skb(oldskb); | |
3857 | break; /* while !buffer_info->skb */ | |
3858 | } else { | |
2648345f | 3859 | /* Use new allocation */ |
1da177e4 LT |
3860 | dev_kfree_skb(oldskb); |
3861 | } | |
3862 | } | |
1da177e4 LT |
3863 | /* Make buffer alignment 2 beyond a 16 byte boundary |
3864 | * this will result in a 16 byte aligned IP header after | |
3865 | * the 14 byte MAC header is removed | |
3866 | */ | |
3867 | skb_reserve(skb, NET_IP_ALIGN); | |
3868 | ||
3869 | skb->dev = netdev; | |
3870 | ||
3871 | buffer_info->skb = skb; | |
3872 | buffer_info->length = adapter->rx_buffer_len; | |
a292ca6e | 3873 | map_skb: |
1da177e4 LT |
3874 | buffer_info->dma = pci_map_single(pdev, |
3875 | skb->data, | |
3876 | adapter->rx_buffer_len, | |
3877 | PCI_DMA_FROMDEVICE); | |
3878 | ||
2648345f MC |
3879 | /* Fix for errata 23, can't cross 64kB boundary */ |
3880 | if (!e1000_check_64k_bound(adapter, | |
3881 | (void *)(unsigned long)buffer_info->dma, | |
3882 | adapter->rx_buffer_len)) { | |
3883 | DPRINTK(RX_ERR, ERR, | |
3884 | "dma align check failed: %u bytes at %p\n", | |
3885 | adapter->rx_buffer_len, | |
3886 | (void *)(unsigned long)buffer_info->dma); | |
1da177e4 LT |
3887 | dev_kfree_skb(skb); |
3888 | buffer_info->skb = NULL; | |
3889 | ||
2648345f | 3890 | pci_unmap_single(pdev, buffer_info->dma, |
1da177e4 LT |
3891 | adapter->rx_buffer_len, |
3892 | PCI_DMA_FROMDEVICE); | |
3893 | ||
3894 | break; /* while !buffer_info->skb */ | |
3895 | } | |
1da177e4 LT |
3896 | rx_desc = E1000_RX_DESC(*rx_ring, i); |
3897 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
3898 | ||
96838a40 JB |
3899 | if (unlikely(++i == rx_ring->count)) |
3900 | i = 0; | |
1da177e4 LT |
3901 | buffer_info = &rx_ring->buffer_info[i]; |
3902 | } | |
3903 | ||
b92ff8ee JB |
3904 | if (likely(rx_ring->next_to_use != i)) { |
3905 | rx_ring->next_to_use = i; | |
3906 | if (unlikely(i-- == 0)) | |
3907 | i = (rx_ring->count - 1); | |
3908 | ||
3909 | /* Force memory writes to complete before letting h/w | |
3910 | * know there are new descriptors to fetch. (Only | |
3911 | * applicable for weak-ordered memory model archs, | |
3912 | * such as IA-64). */ | |
3913 | wmb(); | |
3914 | writel(i, adapter->hw.hw_addr + rx_ring->rdt); | |
3915 | } | |
1da177e4 LT |
3916 | } |
3917 | ||
2d7edb92 MC |
3918 | /** |
3919 | * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split | |
3920 | * @adapter: address of board private structure | |
3921 | **/ | |
3922 | ||
3923 | static void | |
581d708e | 3924 | e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
3925 | struct e1000_rx_ring *rx_ring, |
3926 | int cleaned_count) | |
2d7edb92 | 3927 | { |
2d7edb92 MC |
3928 | struct net_device *netdev = adapter->netdev; |
3929 | struct pci_dev *pdev = adapter->pdev; | |
3930 | union e1000_rx_desc_packet_split *rx_desc; | |
3931 | struct e1000_buffer *buffer_info; | |
3932 | struct e1000_ps_page *ps_page; | |
3933 | struct e1000_ps_page_dma *ps_page_dma; | |
3934 | struct sk_buff *skb; | |
3935 | unsigned int i, j; | |
3936 | ||
3937 | i = rx_ring->next_to_use; | |
3938 | buffer_info = &rx_ring->buffer_info[i]; | |
3939 | ps_page = &rx_ring->ps_page[i]; | |
3940 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
3941 | ||
72d64a43 | 3942 | while (cleaned_count--) { |
2d7edb92 MC |
3943 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); |
3944 | ||
96838a40 | 3945 | for (j = 0; j < PS_PAGE_BUFFERS; j++) { |
e4c811c9 MC |
3946 | if (j < adapter->rx_ps_pages) { |
3947 | if (likely(!ps_page->ps_page[j])) { | |
3948 | ps_page->ps_page[j] = | |
3949 | alloc_page(GFP_ATOMIC); | |
b92ff8ee JB |
3950 | if (unlikely(!ps_page->ps_page[j])) { |
3951 | adapter->alloc_rx_buff_failed++; | |
e4c811c9 | 3952 | goto no_buffers; |
b92ff8ee | 3953 | } |
e4c811c9 MC |
3954 | ps_page_dma->ps_page_dma[j] = |
3955 | pci_map_page(pdev, | |
3956 | ps_page->ps_page[j], | |
3957 | 0, PAGE_SIZE, | |
3958 | PCI_DMA_FROMDEVICE); | |
3959 | } | |
3960 | /* Refresh the desc even if buffer_addrs didn't | |
96838a40 | 3961 | * change because each write-back erases |
e4c811c9 MC |
3962 | * this info. |
3963 | */ | |
3964 | rx_desc->read.buffer_addr[j+1] = | |
3965 | cpu_to_le64(ps_page_dma->ps_page_dma[j]); | |
3966 | } else | |
3967 | rx_desc->read.buffer_addr[j+1] = ~0; | |
2d7edb92 MC |
3968 | } |
3969 | ||
3970 | skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN); | |
3971 | ||
b92ff8ee JB |
3972 | if (unlikely(!skb)) { |
3973 | adapter->alloc_rx_buff_failed++; | |
2d7edb92 | 3974 | break; |
b92ff8ee | 3975 | } |
2d7edb92 MC |
3976 | |
3977 | /* Make buffer alignment 2 beyond a 16 byte boundary | |
3978 | * this will result in a 16 byte aligned IP header after | |
3979 | * the 14 byte MAC header is removed | |
3980 | */ | |
3981 | skb_reserve(skb, NET_IP_ALIGN); | |
3982 | ||
3983 | skb->dev = netdev; | |
3984 | ||
3985 | buffer_info->skb = skb; | |
3986 | buffer_info->length = adapter->rx_ps_bsize0; | |
3987 | buffer_info->dma = pci_map_single(pdev, skb->data, | |
3988 | adapter->rx_ps_bsize0, | |
3989 | PCI_DMA_FROMDEVICE); | |
3990 | ||
3991 | rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); | |
3992 | ||
96838a40 | 3993 | if (unlikely(++i == rx_ring->count)) i = 0; |
2d7edb92 MC |
3994 | buffer_info = &rx_ring->buffer_info[i]; |
3995 | ps_page = &rx_ring->ps_page[i]; | |
3996 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
3997 | } | |
3998 | ||
3999 | no_buffers: | |
b92ff8ee JB |
4000 | if (likely(rx_ring->next_to_use != i)) { |
4001 | rx_ring->next_to_use = i; | |
4002 | if (unlikely(i-- == 0)) i = (rx_ring->count - 1); | |
4003 | ||
4004 | /* Force memory writes to complete before letting h/w | |
4005 | * know there are new descriptors to fetch. (Only | |
4006 | * applicable for weak-ordered memory model archs, | |
4007 | * such as IA-64). */ | |
4008 | wmb(); | |
4009 | /* Hardware increments by 16 bytes, but packet split | |
4010 | * descriptors are 32 bytes...so we increment tail | |
4011 | * twice as much. | |
4012 | */ | |
4013 | writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt); | |
4014 | } | |
2d7edb92 MC |
4015 | } |
4016 | ||
1da177e4 LT |
4017 | /** |
4018 | * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers. | |
4019 | * @adapter: | |
4020 | **/ | |
4021 | ||
4022 | static void | |
4023 | e1000_smartspeed(struct e1000_adapter *adapter) | |
4024 | { | |
4025 | uint16_t phy_status; | |
4026 | uint16_t phy_ctrl; | |
4027 | ||
96838a40 | 4028 | if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg || |
1da177e4 LT |
4029 | !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) |
4030 | return; | |
4031 | ||
96838a40 | 4032 | if (adapter->smartspeed == 0) { |
1da177e4 LT |
4033 | /* If Master/Slave config fault is asserted twice, |
4034 | * we assume back-to-back */ | |
4035 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); | |
96838a40 | 4036 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4037 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); |
96838a40 | 4038 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4039 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); |
96838a40 | 4040 | if (phy_ctrl & CR_1000T_MS_ENABLE) { |
1da177e4 LT |
4041 | phy_ctrl &= ~CR_1000T_MS_ENABLE; |
4042 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, | |
4043 | phy_ctrl); | |
4044 | adapter->smartspeed++; | |
96838a40 | 4045 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4046 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, |
4047 | &phy_ctrl)) { | |
4048 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4049 | MII_CR_RESTART_AUTO_NEG); | |
4050 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, | |
4051 | phy_ctrl); | |
4052 | } | |
4053 | } | |
4054 | return; | |
96838a40 | 4055 | } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { |
1da177e4 LT |
4056 | /* If still no link, perhaps using 2/3 pair cable */ |
4057 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); | |
4058 | phy_ctrl |= CR_1000T_MS_ENABLE; | |
4059 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl); | |
96838a40 | 4060 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4061 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) { |
4062 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4063 | MII_CR_RESTART_AUTO_NEG); | |
4064 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl); | |
4065 | } | |
4066 | } | |
4067 | /* Restart process after E1000_SMARTSPEED_MAX iterations */ | |
96838a40 | 4068 | if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX) |
1da177e4 LT |
4069 | adapter->smartspeed = 0; |
4070 | } | |
4071 | ||
4072 | /** | |
4073 | * e1000_ioctl - | |
4074 | * @netdev: | |
4075 | * @ifreq: | |
4076 | * @cmd: | |
4077 | **/ | |
4078 | ||
4079 | static int | |
4080 | e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4081 | { | |
4082 | switch (cmd) { | |
4083 | case SIOCGMIIPHY: | |
4084 | case SIOCGMIIREG: | |
4085 | case SIOCSMIIREG: | |
4086 | return e1000_mii_ioctl(netdev, ifr, cmd); | |
4087 | default: | |
4088 | return -EOPNOTSUPP; | |
4089 | } | |
4090 | } | |
4091 | ||
4092 | /** | |
4093 | * e1000_mii_ioctl - | |
4094 | * @netdev: | |
4095 | * @ifreq: | |
4096 | * @cmd: | |
4097 | **/ | |
4098 | ||
4099 | static int | |
4100 | e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4101 | { | |
60490fe0 | 4102 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4103 | struct mii_ioctl_data *data = if_mii(ifr); |
4104 | int retval; | |
4105 | uint16_t mii_reg; | |
4106 | uint16_t spddplx; | |
97876fc6 | 4107 | unsigned long flags; |
1da177e4 | 4108 | |
96838a40 | 4109 | if (adapter->hw.media_type != e1000_media_type_copper) |
1da177e4 LT |
4110 | return -EOPNOTSUPP; |
4111 | ||
4112 | switch (cmd) { | |
4113 | case SIOCGMIIPHY: | |
4114 | data->phy_id = adapter->hw.phy_addr; | |
4115 | break; | |
4116 | case SIOCGMIIREG: | |
96838a40 | 4117 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4118 | return -EPERM; |
97876fc6 | 4119 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4120 | if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, |
97876fc6 MC |
4121 | &data->val_out)) { |
4122 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4123 | return -EIO; |
97876fc6 MC |
4124 | } |
4125 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 LT |
4126 | break; |
4127 | case SIOCSMIIREG: | |
96838a40 | 4128 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4129 | return -EPERM; |
96838a40 | 4130 | if (data->reg_num & ~(0x1F)) |
1da177e4 LT |
4131 | return -EFAULT; |
4132 | mii_reg = data->val_in; | |
97876fc6 | 4133 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4134 | if (e1000_write_phy_reg(&adapter->hw, data->reg_num, |
97876fc6 MC |
4135 | mii_reg)) { |
4136 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4137 | return -EIO; |
97876fc6 | 4138 | } |
dc86d32a | 4139 | if (adapter->hw.media_type == e1000_media_type_copper) { |
1da177e4 LT |
4140 | switch (data->reg_num) { |
4141 | case PHY_CTRL: | |
96838a40 | 4142 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4143 | break; |
96838a40 | 4144 | if (mii_reg & MII_CR_AUTO_NEG_EN) { |
1da177e4 LT |
4145 | adapter->hw.autoneg = 1; |
4146 | adapter->hw.autoneg_advertised = 0x2F; | |
4147 | } else { | |
4148 | if (mii_reg & 0x40) | |
4149 | spddplx = SPEED_1000; | |
4150 | else if (mii_reg & 0x2000) | |
4151 | spddplx = SPEED_100; | |
4152 | else | |
4153 | spddplx = SPEED_10; | |
4154 | spddplx += (mii_reg & 0x100) | |
cb764326 JK |
4155 | ? DUPLEX_FULL : |
4156 | DUPLEX_HALF; | |
1da177e4 LT |
4157 | retval = e1000_set_spd_dplx(adapter, |
4158 | spddplx); | |
96838a40 | 4159 | if (retval) { |
97876fc6 | 4160 | spin_unlock_irqrestore( |
96838a40 | 4161 | &adapter->stats_lock, |
97876fc6 | 4162 | flags); |
1da177e4 | 4163 | return retval; |
97876fc6 | 4164 | } |
1da177e4 | 4165 | } |
96838a40 | 4166 | if (netif_running(adapter->netdev)) { |
1da177e4 LT |
4167 | e1000_down(adapter); |
4168 | e1000_up(adapter); | |
4169 | } else | |
4170 | e1000_reset(adapter); | |
4171 | break; | |
4172 | case M88E1000_PHY_SPEC_CTRL: | |
4173 | case M88E1000_EXT_PHY_SPEC_CTRL: | |
96838a40 | 4174 | if (e1000_phy_reset(&adapter->hw)) { |
97876fc6 MC |
4175 | spin_unlock_irqrestore( |
4176 | &adapter->stats_lock, flags); | |
1da177e4 | 4177 | return -EIO; |
97876fc6 | 4178 | } |
1da177e4 LT |
4179 | break; |
4180 | } | |
4181 | } else { | |
4182 | switch (data->reg_num) { | |
4183 | case PHY_CTRL: | |
96838a40 | 4184 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4185 | break; |
96838a40 | 4186 | if (netif_running(adapter->netdev)) { |
1da177e4 LT |
4187 | e1000_down(adapter); |
4188 | e1000_up(adapter); | |
4189 | } else | |
4190 | e1000_reset(adapter); | |
4191 | break; | |
4192 | } | |
4193 | } | |
97876fc6 | 4194 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
1da177e4 LT |
4195 | break; |
4196 | default: | |
4197 | return -EOPNOTSUPP; | |
4198 | } | |
4199 | return E1000_SUCCESS; | |
4200 | } | |
4201 | ||
4202 | void | |
4203 | e1000_pci_set_mwi(struct e1000_hw *hw) | |
4204 | { | |
4205 | struct e1000_adapter *adapter = hw->back; | |
2648345f | 4206 | int ret_val = pci_set_mwi(adapter->pdev); |
1da177e4 | 4207 | |
96838a40 | 4208 | if (ret_val) |
2648345f | 4209 | DPRINTK(PROBE, ERR, "Error in setting MWI\n"); |
1da177e4 LT |
4210 | } |
4211 | ||
4212 | void | |
4213 | e1000_pci_clear_mwi(struct e1000_hw *hw) | |
4214 | { | |
4215 | struct e1000_adapter *adapter = hw->back; | |
4216 | ||
4217 | pci_clear_mwi(adapter->pdev); | |
4218 | } | |
4219 | ||
4220 | void | |
4221 | e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4222 | { | |
4223 | struct e1000_adapter *adapter = hw->back; | |
4224 | ||
4225 | pci_read_config_word(adapter->pdev, reg, value); | |
4226 | } | |
4227 | ||
4228 | void | |
4229 | e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4230 | { | |
4231 | struct e1000_adapter *adapter = hw->back; | |
4232 | ||
4233 | pci_write_config_word(adapter->pdev, reg, *value); | |
4234 | } | |
4235 | ||
4236 | uint32_t | |
4237 | e1000_io_read(struct e1000_hw *hw, unsigned long port) | |
4238 | { | |
4239 | return inl(port); | |
4240 | } | |
4241 | ||
4242 | void | |
4243 | e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) | |
4244 | { | |
4245 | outl(value, port); | |
4246 | } | |
4247 | ||
4248 | static void | |
4249 | e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
4250 | { | |
60490fe0 | 4251 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4252 | uint32_t ctrl, rctl; |
4253 | ||
4254 | e1000_irq_disable(adapter); | |
4255 | adapter->vlgrp = grp; | |
4256 | ||
96838a40 | 4257 | if (grp) { |
1da177e4 LT |
4258 | /* enable VLAN tag insert/strip */ |
4259 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4260 | ctrl |= E1000_CTRL_VME; | |
4261 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4262 | ||
4263 | /* enable VLAN receive filtering */ | |
4264 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4265 | rctl |= E1000_RCTL_VFE; | |
4266 | rctl &= ~E1000_RCTL_CFIEN; | |
4267 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2d7edb92 | 4268 | e1000_update_mng_vlan(adapter); |
1da177e4 LT |
4269 | } else { |
4270 | /* disable VLAN tag insert/strip */ | |
4271 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4272 | ctrl &= ~E1000_CTRL_VME; | |
4273 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4274 | ||
4275 | /* disable VLAN filtering */ | |
4276 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4277 | rctl &= ~E1000_RCTL_VFE; | |
4278 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
96838a40 | 4279 | if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) { |
2d7edb92 MC |
4280 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
4281 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
4282 | } | |
1da177e4 LT |
4283 | } |
4284 | ||
4285 | e1000_irq_enable(adapter); | |
4286 | } | |
4287 | ||
4288 | static void | |
4289 | e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) | |
4290 | { | |
60490fe0 | 4291 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 4292 | uint32_t vfta, index; |
96838a40 JB |
4293 | |
4294 | if ((adapter->hw.mng_cookie.status & | |
4295 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
4296 | (vid == adapter->mng_vlan_id)) | |
2d7edb92 | 4297 | return; |
1da177e4 LT |
4298 | /* add VID to filter table */ |
4299 | index = (vid >> 5) & 0x7F; | |
4300 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4301 | vfta |= (1 << (vid & 0x1F)); | |
4302 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4303 | } | |
4304 | ||
4305 | static void | |
4306 | e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) | |
4307 | { | |
60490fe0 | 4308 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4309 | uint32_t vfta, index; |
4310 | ||
4311 | e1000_irq_disable(adapter); | |
4312 | ||
96838a40 | 4313 | if (adapter->vlgrp) |
1da177e4 LT |
4314 | adapter->vlgrp->vlan_devices[vid] = NULL; |
4315 | ||
4316 | e1000_irq_enable(adapter); | |
4317 | ||
96838a40 JB |
4318 | if ((adapter->hw.mng_cookie.status & |
4319 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
ff147013 JK |
4320 | (vid == adapter->mng_vlan_id)) { |
4321 | /* release control to f/w */ | |
4322 | e1000_release_hw_control(adapter); | |
2d7edb92 | 4323 | return; |
ff147013 JK |
4324 | } |
4325 | ||
1da177e4 LT |
4326 | /* remove VID from filter table */ |
4327 | index = (vid >> 5) & 0x7F; | |
4328 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4329 | vfta &= ~(1 << (vid & 0x1F)); | |
4330 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4331 | } | |
4332 | ||
4333 | static void | |
4334 | e1000_restore_vlan(struct e1000_adapter *adapter) | |
4335 | { | |
4336 | e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
4337 | ||
96838a40 | 4338 | if (adapter->vlgrp) { |
1da177e4 | 4339 | uint16_t vid; |
96838a40 JB |
4340 | for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { |
4341 | if (!adapter->vlgrp->vlan_devices[vid]) | |
1da177e4 LT |
4342 | continue; |
4343 | e1000_vlan_rx_add_vid(adapter->netdev, vid); | |
4344 | } | |
4345 | } | |
4346 | } | |
4347 | ||
4348 | int | |
4349 | e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx) | |
4350 | { | |
4351 | adapter->hw.autoneg = 0; | |
4352 | ||
6921368f | 4353 | /* Fiber NICs only allow 1000 gbps Full duplex */ |
96838a40 | 4354 | if ((adapter->hw.media_type == e1000_media_type_fiber) && |
6921368f MC |
4355 | spddplx != (SPEED_1000 + DUPLEX_FULL)) { |
4356 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); | |
4357 | return -EINVAL; | |
4358 | } | |
4359 | ||
96838a40 | 4360 | switch (spddplx) { |
1da177e4 LT |
4361 | case SPEED_10 + DUPLEX_HALF: |
4362 | adapter->hw.forced_speed_duplex = e1000_10_half; | |
4363 | break; | |
4364 | case SPEED_10 + DUPLEX_FULL: | |
4365 | adapter->hw.forced_speed_duplex = e1000_10_full; | |
4366 | break; | |
4367 | case SPEED_100 + DUPLEX_HALF: | |
4368 | adapter->hw.forced_speed_duplex = e1000_100_half; | |
4369 | break; | |
4370 | case SPEED_100 + DUPLEX_FULL: | |
4371 | adapter->hw.forced_speed_duplex = e1000_100_full; | |
4372 | break; | |
4373 | case SPEED_1000 + DUPLEX_FULL: | |
4374 | adapter->hw.autoneg = 1; | |
4375 | adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; | |
4376 | break; | |
4377 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ | |
4378 | default: | |
2648345f | 4379 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); |
1da177e4 LT |
4380 | return -EINVAL; |
4381 | } | |
4382 | return 0; | |
4383 | } | |
4384 | ||
b6a1d5f8 | 4385 | #ifdef CONFIG_PM |
0f15a8fa JK |
4386 | /* Save/restore 16 or 64 dwords of PCI config space depending on which |
4387 | * bus we're on (PCI(X) vs. PCI-E) | |
2f82665f JB |
4388 | */ |
4389 | #define PCIE_CONFIG_SPACE_LEN 256 | |
4390 | #define PCI_CONFIG_SPACE_LEN 64 | |
4391 | static int | |
4392 | e1000_pci_save_state(struct e1000_adapter *adapter) | |
4393 | { | |
4394 | struct pci_dev *dev = adapter->pdev; | |
4395 | int size; | |
4396 | int i; | |
0f15a8fa | 4397 | |
2f82665f JB |
4398 | if (adapter->hw.mac_type >= e1000_82571) |
4399 | size = PCIE_CONFIG_SPACE_LEN; | |
4400 | else | |
4401 | size = PCI_CONFIG_SPACE_LEN; | |
4402 | ||
4403 | WARN_ON(adapter->config_space != NULL); | |
4404 | ||
4405 | adapter->config_space = kmalloc(size, GFP_KERNEL); | |
4406 | if (!adapter->config_space) { | |
4407 | DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size); | |
4408 | return -ENOMEM; | |
4409 | } | |
4410 | for (i = 0; i < (size / 4); i++) | |
4411 | pci_read_config_dword(dev, i * 4, &adapter->config_space[i]); | |
4412 | return 0; | |
4413 | } | |
4414 | ||
4415 | static void | |
4416 | e1000_pci_restore_state(struct e1000_adapter *adapter) | |
4417 | { | |
4418 | struct pci_dev *dev = adapter->pdev; | |
4419 | int size; | |
4420 | int i; | |
0f15a8fa | 4421 | |
2f82665f JB |
4422 | if (adapter->config_space == NULL) |
4423 | return; | |
0f15a8fa | 4424 | |
2f82665f JB |
4425 | if (adapter->hw.mac_type >= e1000_82571) |
4426 | size = PCIE_CONFIG_SPACE_LEN; | |
4427 | else | |
4428 | size = PCI_CONFIG_SPACE_LEN; | |
4429 | for (i = 0; i < (size / 4); i++) | |
4430 | pci_write_config_dword(dev, i * 4, adapter->config_space[i]); | |
4431 | kfree(adapter->config_space); | |
4432 | adapter->config_space = NULL; | |
4433 | return; | |
4434 | } | |
4435 | #endif /* CONFIG_PM */ | |
4436 | ||
1da177e4 | 4437 | static int |
829ca9a3 | 4438 | e1000_suspend(struct pci_dev *pdev, pm_message_t state) |
1da177e4 LT |
4439 | { |
4440 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4441 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 4442 | uint32_t ctrl, ctrl_ext, rctl, manc, status; |
1da177e4 | 4443 | uint32_t wufc = adapter->wol; |
240b1710 | 4444 | int retval = 0; |
1da177e4 LT |
4445 | |
4446 | netif_device_detach(netdev); | |
4447 | ||
96838a40 | 4448 | if (netif_running(netdev)) |
1da177e4 LT |
4449 | e1000_down(adapter); |
4450 | ||
2f82665f | 4451 | #ifdef CONFIG_PM |
0f15a8fa JK |
4452 | /* Implement our own version of pci_save_state(pdev) because pci- |
4453 | * express adapters have 256-byte config spaces. */ | |
2f82665f JB |
4454 | retval = e1000_pci_save_state(adapter); |
4455 | if (retval) | |
4456 | return retval; | |
4457 | #endif | |
4458 | ||
1da177e4 | 4459 | status = E1000_READ_REG(&adapter->hw, STATUS); |
96838a40 | 4460 | if (status & E1000_STATUS_LU) |
1da177e4 LT |
4461 | wufc &= ~E1000_WUFC_LNKC; |
4462 | ||
96838a40 | 4463 | if (wufc) { |
1da177e4 LT |
4464 | e1000_setup_rctl(adapter); |
4465 | e1000_set_multi(netdev); | |
4466 | ||
4467 | /* turn on all-multi mode if wake on multicast is enabled */ | |
96838a40 | 4468 | if (adapter->wol & E1000_WUFC_MC) { |
1da177e4 LT |
4469 | rctl = E1000_READ_REG(&adapter->hw, RCTL); |
4470 | rctl |= E1000_RCTL_MPE; | |
4471 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
4472 | } | |
4473 | ||
96838a40 | 4474 | if (adapter->hw.mac_type >= e1000_82540) { |
1da177e4 LT |
4475 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); |
4476 | /* advertise wake from D3Cold */ | |
4477 | #define E1000_CTRL_ADVD3WUC 0x00100000 | |
4478 | /* phy power management enable */ | |
4479 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 | |
4480 | ctrl |= E1000_CTRL_ADVD3WUC | | |
4481 | E1000_CTRL_EN_PHY_PWR_MGMT; | |
4482 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4483 | } | |
4484 | ||
96838a40 | 4485 | if (adapter->hw.media_type == e1000_media_type_fiber || |
1da177e4 LT |
4486 | adapter->hw.media_type == e1000_media_type_internal_serdes) { |
4487 | /* keep the laser running in D3 */ | |
4488 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
4489 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; | |
4490 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext); | |
4491 | } | |
4492 | ||
2d7edb92 MC |
4493 | /* Allow time for pending master requests to run */ |
4494 | e1000_disable_pciex_master(&adapter->hw); | |
4495 | ||
1da177e4 LT |
4496 | E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN); |
4497 | E1000_WRITE_REG(&adapter->hw, WUFC, wufc); | |
d0e027db AK |
4498 | pci_enable_wake(pdev, PCI_D3hot, 1); |
4499 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
4500 | } else { |
4501 | E1000_WRITE_REG(&adapter->hw, WUC, 0); | |
4502 | E1000_WRITE_REG(&adapter->hw, WUFC, 0); | |
d0e027db AK |
4503 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4504 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
4505 | } |
4506 | ||
96838a40 | 4507 | if (adapter->hw.mac_type >= e1000_82540 && |
1da177e4 LT |
4508 | adapter->hw.media_type == e1000_media_type_copper) { |
4509 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
96838a40 | 4510 | if (manc & E1000_MANC_SMBUS_EN) { |
1da177e4 LT |
4511 | manc |= E1000_MANC_ARP_EN; |
4512 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
d0e027db AK |
4513 | pci_enable_wake(pdev, PCI_D3hot, 1); |
4514 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
4515 | } |
4516 | } | |
4517 | ||
b55ccb35 JK |
4518 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
4519 | * would have already happened in close and is redundant. */ | |
4520 | e1000_release_hw_control(adapter); | |
2d7edb92 | 4521 | |
1da177e4 | 4522 | pci_disable_device(pdev); |
240b1710 | 4523 | |
d0e027db | 4524 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
1da177e4 LT |
4525 | |
4526 | return 0; | |
4527 | } | |
4528 | ||
2f82665f | 4529 | #ifdef CONFIG_PM |
1da177e4 LT |
4530 | static int |
4531 | e1000_resume(struct pci_dev *pdev) | |
4532 | { | |
4533 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4534 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 4535 | uint32_t manc, ret_val; |
1da177e4 | 4536 | |
d0e027db | 4537 | pci_set_power_state(pdev, PCI_D0); |
2f82665f | 4538 | e1000_pci_restore_state(adapter); |
2b02893e | 4539 | ret_val = pci_enable_device(pdev); |
a4cb847d | 4540 | pci_set_master(pdev); |
1da177e4 | 4541 | |
d0e027db AK |
4542 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4543 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
4544 | |
4545 | e1000_reset(adapter); | |
4546 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
4547 | ||
96838a40 | 4548 | if (netif_running(netdev)) |
1da177e4 LT |
4549 | e1000_up(adapter); |
4550 | ||
4551 | netif_device_attach(netdev); | |
4552 | ||
96838a40 | 4553 | if (adapter->hw.mac_type >= e1000_82540 && |
1da177e4 LT |
4554 | adapter->hw.media_type == e1000_media_type_copper) { |
4555 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
4556 | manc &= ~(E1000_MANC_ARP_EN); | |
4557 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
4558 | } | |
4559 | ||
b55ccb35 JK |
4560 | /* If the controller is 82573 and f/w is AMT, do not set |
4561 | * DRV_LOAD until the interface is up. For all other cases, | |
4562 | * let the f/w know that the h/w is now under the control | |
4563 | * of the driver. */ | |
4564 | if (adapter->hw.mac_type != e1000_82573 || | |
4565 | !e1000_check_mng_mode(&adapter->hw)) | |
4566 | e1000_get_hw_control(adapter); | |
2d7edb92 | 4567 | |
1da177e4 LT |
4568 | return 0; |
4569 | } | |
4570 | #endif | |
c653e635 AK |
4571 | |
4572 | static void e1000_shutdown(struct pci_dev *pdev) | |
4573 | { | |
4574 | e1000_suspend(pdev, PMSG_SUSPEND); | |
4575 | } | |
4576 | ||
1da177e4 LT |
4577 | #ifdef CONFIG_NET_POLL_CONTROLLER |
4578 | /* | |
4579 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
4580 | * without having to re-enable interrupts. It's not called while | |
4581 | * the interrupt routine is executing. | |
4582 | */ | |
4583 | static void | |
2648345f | 4584 | e1000_netpoll(struct net_device *netdev) |
1da177e4 | 4585 | { |
60490fe0 | 4586 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4587 | disable_irq(adapter->pdev->irq); |
4588 | e1000_intr(adapter->pdev->irq, netdev, NULL); | |
c4cfe567 | 4589 | e1000_clean_tx_irq(adapter, adapter->tx_ring); |
e8da8be1 JK |
4590 | #ifndef CONFIG_E1000_NAPI |
4591 | adapter->clean_rx(adapter, adapter->rx_ring); | |
4592 | #endif | |
1da177e4 LT |
4593 | enable_irq(adapter->pdev->irq); |
4594 | } | |
4595 | #endif | |
4596 | ||
4597 | /* e1000_main.c */ |