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Merge branch 'master'
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
31/* Change Log
2b02893e
MC		 32 * 6.0.58 4/20/05
33 * o Accepted ethtool cleanup patch from Stephen Hemminger
2648345f
MC		 34 * 6.0.44+ 2/15/05
35 * o applied Anton's patch to resolve tx hang in hardware
36 * o Applied Andrew Mortons patch - e1000 stops working after resume
1da177e4
LT		 37 */
38
39char e1000_driver_name[] = "e1000";
40char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
41#ifndef CONFIG_E1000_NAPI
42#define DRIVERNAPI
43#else
44#define DRIVERNAPI "-NAPI"
45#endif
07b8fede 46#define DRV_VERSION "6.1.16-k2"DRIVERNAPI
1da177e4 47char e1000_driver_version[] = DRV_VERSION;
2b02893e 48char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 49
50/* e1000_pci_tbl - PCI Device ID Table
51 *
52 * Last entry must be all 0s
53 *
54 * Macro expands to...
55 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
56 */
57static struct pci_device_id e1000_pci_tbl[] = {
58 INTEL_E1000_ETHERNET_DEVICE(0x1000),
59 INTEL_E1000_ETHERNET_DEVICE(0x1001),
60 INTEL_E1000_ETHERNET_DEVICE(0x1004),
61 INTEL_E1000_ETHERNET_DEVICE(0x1008),
62 INTEL_E1000_ETHERNET_DEVICE(0x1009),
63 INTEL_E1000_ETHERNET_DEVICE(0x100C),
64 INTEL_E1000_ETHERNET_DEVICE(0x100D),
65 INTEL_E1000_ETHERNET_DEVICE(0x100E),
66 INTEL_E1000_ETHERNET_DEVICE(0x100F),
67 INTEL_E1000_ETHERNET_DEVICE(0x1010),
68 INTEL_E1000_ETHERNET_DEVICE(0x1011),
69 INTEL_E1000_ETHERNET_DEVICE(0x1012),
70 INTEL_E1000_ETHERNET_DEVICE(0x1013),
71 INTEL_E1000_ETHERNET_DEVICE(0x1014),
72 INTEL_E1000_ETHERNET_DEVICE(0x1015),
73 INTEL_E1000_ETHERNET_DEVICE(0x1016),
74 INTEL_E1000_ETHERNET_DEVICE(0x1017),
75 INTEL_E1000_ETHERNET_DEVICE(0x1018),
76 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 77 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 78 INTEL_E1000_ETHERNET_DEVICE(0x101D),
79 INTEL_E1000_ETHERNET_DEVICE(0x101E),
80 INTEL_E1000_ETHERNET_DEVICE(0x1026),
81 INTEL_E1000_ETHERNET_DEVICE(0x1027),
82 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 83 INTEL_E1000_ETHERNET_DEVICE(0x105E),
84 INTEL_E1000_ETHERNET_DEVICE(0x105F),
85 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 86 INTEL_E1000_ETHERNET_DEVICE(0x1075),
87 INTEL_E1000_ETHERNET_DEVICE(0x1076),
88 INTEL_E1000_ETHERNET_DEVICE(0x1077),
89 INTEL_E1000_ETHERNET_DEVICE(0x1078),
90 INTEL_E1000_ETHERNET_DEVICE(0x1079),
91 INTEL_E1000_ETHERNET_DEVICE(0x107A),
92 INTEL_E1000_ETHERNET_DEVICE(0x107B),
93 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 94 INTEL_E1000_ETHERNET_DEVICE(0x107D),
95 INTEL_E1000_ETHERNET_DEVICE(0x107E),
96 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 97 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 98 INTEL_E1000_ETHERNET_DEVICE(0x108B),
99 INTEL_E1000_ETHERNET_DEVICE(0x108C),
07b8fede 100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
1da177e4
LT		 101 /* required last entry */
102 {0,}
103};
104
105MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
106
107int e1000_up(struct e1000_adapter *adapter);
108void e1000_down(struct e1000_adapter *adapter);
109void e1000_reset(struct e1000_adapter *adapter);
110int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
581d708e
MC		 111int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
112int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
113void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
114void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
115int e1000_setup_tx_resources(struct e1000_adapter *adapter,
116 struct e1000_tx_ring *txdr);
117int e1000_setup_rx_resources(struct e1000_adapter *adapter,
118 struct e1000_rx_ring *rxdr);
119void e1000_free_tx_resources(struct e1000_adapter *adapter,
120 struct e1000_tx_ring *tx_ring);
121void e1000_free_rx_resources(struct e1000_adapter *adapter,
122 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 123void e1000_update_stats(struct e1000_adapter *adapter);
124
125/* Local Function Prototypes */
126
127static int e1000_init_module(void);
128static void e1000_exit_module(void);
129static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
130static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e
MC		 131static int e1000_alloc_queues(struct e1000_adapter *adapter);
132#ifdef CONFIG_E1000_MQ
133static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
134#endif
1da177e4
LT		 135static int e1000_sw_init(struct e1000_adapter *adapter);
136static int e1000_open(struct net_device *netdev);
137static int e1000_close(struct net_device *netdev);
138static void e1000_configure_tx(struct e1000_adapter *adapter);
139static void e1000_configure_rx(struct e1000_adapter *adapter);
140static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 141static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
142static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
143static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
144 struct e1000_tx_ring *tx_ring);
145static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
146 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 147static void e1000_set_multi(struct net_device *netdev);
148static void e1000_update_phy_info(unsigned long data);
149static void e1000_watchdog(unsigned long data);
150static void e1000_watchdog_task(struct e1000_adapter *adapter);
151static void e1000_82547_tx_fifo_stall(unsigned long data);
152static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155static int e1000_set_mac(struct net_device *netdev, void *p);
156static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 157static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
1da177e4 159#ifdef CONFIG_E1000_NAPI
581d708e 160static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 161static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 162 struct e1000_rx_ring *rx_ring,
1da177e4 163 int *work_done, int work_to_do);
2d7edb92 164static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 165 struct e1000_rx_ring *rx_ring,
2d7edb92 166 int *work_done, int work_to_do);
1da177e4 167#else
581d708e
MC		 168static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
1da177e4 172#endif
581d708e
MC		 173static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring);
175static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 177static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
178static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
179 int cmd);
180void e1000_set_ethtool_ops(struct net_device *netdev);
181static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
182static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
183static void e1000_tx_timeout(struct net_device *dev);
184static void e1000_tx_timeout_task(struct net_device *dev);
185static void e1000_smartspeed(struct e1000_adapter *adapter);
186static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
187 struct sk_buff *skb);
188
189static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
190static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
191static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
192static void e1000_restore_vlan(struct e1000_adapter *adapter);
193
829ca9a3 194static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 195#ifdef CONFIG_PM
196static int e1000_resume(struct pci_dev *pdev);
197#endif
198
199#ifdef CONFIG_NET_POLL_CONTROLLER
200/* for netdump / net console */
201static void e1000_netpoll (struct net_device *netdev);
202#endif
203
24025e4e
MC		 204#ifdef CONFIG_E1000_MQ
205/* for multiple Rx queues */
206void e1000_rx_schedule(void *data);
207#endif
208
1da177e4
LT		 209/* Exported from other modules */
210
211extern void e1000_check_options(struct e1000_adapter *adapter);
212
213static struct pci_driver e1000_driver = {
214 .name = e1000_driver_name,
215 .id_table = e1000_pci_tbl,
216 .probe = e1000_probe,
217 .remove = __devexit_p(e1000_remove),
218 /* Power Managment Hooks */
219#ifdef CONFIG_PM
220 .suspend = e1000_suspend,
221 .resume = e1000_resume
222#endif
223};
224
225MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
226MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
227MODULE_LICENSE("GPL");
228MODULE_VERSION(DRV_VERSION);
229
230static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
231module_param(debug, int, 0);
232MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
233
234/**
235 * e1000_init_module - Driver Registration Routine
236 *
237 * e1000_init_module is the first routine called when the driver is
238 * loaded. All it does is register with the PCI subsystem.
239 **/
240
241static int __init
242e1000_init_module(void)
243{
244 int ret;
245 printk(KERN_INFO "%s - version %s\n",
246 e1000_driver_string, e1000_driver_version);
247
248 printk(KERN_INFO "%s\n", e1000_copyright);
249
250 ret = pci_module_init(&e1000_driver);
8b378def 251
1da177e4
LT		 252 return ret;
253}
254
255module_init(e1000_init_module);
256
257/**
258 * e1000_exit_module - Driver Exit Cleanup Routine
259 *
260 * e1000_exit_module is called just before the driver is removed
261 * from memory.
262 **/
263
264static void __exit
265e1000_exit_module(void)
266{
1da177e4
LT		 267 pci_unregister_driver(&e1000_driver);
268}
269
270module_exit(e1000_exit_module);
271
272/**
273 * e1000_irq_disable - Mask off interrupt generation on the NIC
274 * @adapter: board private structure
275 **/
276
277static inline void
278e1000_irq_disable(struct e1000_adapter *adapter)
279{
280 atomic_inc(&adapter->irq_sem);
281 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
282 E1000_WRITE_FLUSH(&adapter->hw);
283 synchronize_irq(adapter->pdev->irq);
284}
285
286/**
287 * e1000_irq_enable - Enable default interrupt generation settings
288 * @adapter: board private structure
289 **/
290
291static inline void
292e1000_irq_enable(struct e1000_adapter *adapter)
293{
294 if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
295 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
296 E1000_WRITE_FLUSH(&adapter->hw);
297 }
298}
2d7edb92
MC		 299void
300e1000_update_mng_vlan(struct e1000_adapter *adapter)
301{
302 struct net_device *netdev = adapter->netdev;
303 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
304 uint16_t old_vid = adapter->mng_vlan_id;
305 if(adapter->vlgrp) {
306 if(!adapter->vlgrp->vlan_devices[vid]) {
307 if(adapter->hw.mng_cookie.status &
308 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
309 e1000_vlan_rx_add_vid(netdev, vid);
310 adapter->mng_vlan_id = vid;
311 } else
312 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
313
314 if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
315 (vid != old_vid) &&
316 !adapter->vlgrp->vlan_devices[old_vid])
317 e1000_vlan_rx_kill_vid(netdev, old_vid);
318 }
319 }
320}
321
1da177e4
LT		 322int
323e1000_up(struct e1000_adapter *adapter)
324{
325 struct net_device *netdev = adapter->netdev;
581d708e 326 int i, err;
1da177e4
LT		 327
328 /* hardware has been reset, we need to reload some things */
329
330 /* Reset the PHY if it was previously powered down */
331 if(adapter->hw.media_type == e1000_media_type_copper) {
332 uint16_t mii_reg;
333 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
334 if(mii_reg & MII_CR_POWER_DOWN)
335 e1000_phy_reset(&adapter->hw);
336 }
337
338 e1000_set_multi(netdev);
339
340 e1000_restore_vlan(adapter);
341
342 e1000_configure_tx(adapter);
343 e1000_setup_rctl(adapter);
344 e1000_configure_rx(adapter);
581d708e
MC		 345 for (i = 0; i < adapter->num_queues; i++)
346 adapter->alloc_rx_buf(adapter, &adapter->rx_ring[i]);
1da177e4 347
fa4f7ef3
MC		 348#ifdef CONFIG_PCI_MSI
349 if(adapter->hw.mac_type > e1000_82547_rev_2) {
350 adapter->have_msi = TRUE;
351 if((err = pci_enable_msi(adapter->pdev))) {
352 DPRINTK(PROBE, ERR,
353 "Unable to allocate MSI interrupt Error: %d\n", err);
354 adapter->have_msi = FALSE;
355 }
356 }
357#endif
1da177e4
LT		 358 if((err = request_irq(adapter->pdev->irq, &e1000_intr,
359 SA_SHIRQ | SA_SAMPLE_RANDOM,
2648345f
MC		 360 netdev->name, netdev))) {
361 DPRINTK(PROBE, ERR,
362 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 363 return err;
2648345f 364 }
1da177e4
LT		 365
366 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 367
368#ifdef CONFIG_E1000_NAPI
369 netif_poll_enable(netdev);
370#endif
5de55624
MC		 371 e1000_irq_enable(adapter);
372
1da177e4
LT		 373 return 0;
374}
375
376void
377e1000_down(struct e1000_adapter *adapter)
378{
379 struct net_device *netdev = adapter->netdev;
380
381 e1000_irq_disable(adapter);
24025e4e
MC		 382#ifdef CONFIG_E1000_MQ
383 while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
384#endif
1da177e4 385 free_irq(adapter->pdev->irq, netdev);
fa4f7ef3
MC		 386#ifdef CONFIG_PCI_MSI
387 if(adapter->hw.mac_type > e1000_82547_rev_2 &&
388 adapter->have_msi == TRUE)
389 pci_disable_msi(adapter->pdev);
390#endif
1da177e4
LT		 391 del_timer_sync(&adapter->tx_fifo_stall_timer);
392 del_timer_sync(&adapter->watchdog_timer);
393 del_timer_sync(&adapter->phy_info_timer);
394
395#ifdef CONFIG_E1000_NAPI
396 netif_poll_disable(netdev);
397#endif
398 adapter->link_speed = 0;
399 adapter->link_duplex = 0;
400 netif_carrier_off(netdev);
401 netif_stop_queue(netdev);
402
403 e1000_reset(adapter);
581d708e
MC		 404 e1000_clean_all_tx_rings(adapter);
405 e1000_clean_all_rx_rings(adapter);
1da177e4 406
07b8fede 407 /* If WoL is not enabled and management mode is not IAMT
1da177e4 408 * Power down the PHY so no link is implied when interface is down */
2d7edb92
MC		 409 if(!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
410 adapter->hw.media_type == e1000_media_type_copper &&
411 !e1000_check_mng_mode(&adapter->hw) &&
412 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN)) {
1da177e4
LT		 413 uint16_t mii_reg;
414 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
415 mii_reg |= MII_CR_POWER_DOWN;
416 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
4e48a2b9 417 mdelay(1);
1da177e4
LT		 418 }
419}
420
421void
422e1000_reset(struct e1000_adapter *adapter)
423{
1125ecbc 424 struct net_device *netdev = adapter->netdev;
2d7edb92 425 uint32_t pba, manc;
1125ecbc
MC		 426 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
427 uint16_t fc_low_water_mark = E1000_FC_LOW_DIFF;
1da177e4
LT		 428
429 /* Repartition Pba for greater than 9k mtu
430 * To take effect CTRL.RST is required.
431 */
432
2d7edb92
MC		 433 switch (adapter->hw.mac_type) {
434 case e1000_82547:
0e6ef3e0 435 case e1000_82547_rev_2:
2d7edb92
MC		 436 pba = E1000_PBA_30K;
437 break;
868d5309
MC		 438 case e1000_82571:
439 case e1000_82572:
440 pba = E1000_PBA_38K;
441 break;
2d7edb92
MC		 442 case e1000_82573:
443 pba = E1000_PBA_12K;
444 break;
445 default:
446 pba = E1000_PBA_48K;
447 break;
448 }
449
1125ecbc
MC		 450 if((adapter->hw.mac_type != e1000_82573) &&
451 (adapter->rx_buffer_len > E1000_RXBUFFER_8192)) {
452 pba -= 8; /* allocate more FIFO for Tx */
453 /* send an XOFF when there is enough space in the
454 * Rx FIFO to hold one extra full size Rx packet
455 */
456 fc_high_water_mark = netdev->mtu + ENET_HEADER_SIZE +
457 ETHERNET_FCS_SIZE + 1;
458 fc_low_water_mark = fc_high_water_mark + 8;
459 }
2d7edb92
MC		 460
461
462 if(adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 463 adapter->tx_fifo_head = 0;
464 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
465 adapter->tx_fifo_size =
466 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
467 atomic_set(&adapter->tx_fifo_stall, 0);
468 }
2d7edb92 469
1da177e4
LT		 470 E1000_WRITE_REG(&adapter->hw, PBA, pba);
471
472 /* flow control settings */
473 adapter->hw.fc_high_water = (pba << E1000_PBA_BYTES_SHIFT) -
1125ecbc 474 fc_high_water_mark;
1da177e4 475 adapter->hw.fc_low_water = (pba << E1000_PBA_BYTES_SHIFT) -
1125ecbc 476 fc_low_water_mark;
1da177e4
LT		 477 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
478 adapter->hw.fc_send_xon = 1;
479 adapter->hw.fc = adapter->hw.original_fc;
480
2d7edb92 481 /* Allow time for pending master requests to run */
1da177e4
LT		 482 e1000_reset_hw(&adapter->hw);
483 if(adapter->hw.mac_type >= e1000_82544)
484 E1000_WRITE_REG(&adapter->hw, WUC, 0);
485 if(e1000_init_hw(&adapter->hw))
486 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 487 e1000_update_mng_vlan(adapter);
1da177e4
LT		 488 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
489 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
490
491 e1000_reset_adaptive(&adapter->hw);
492 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2d7edb92
MC		 493 if (adapter->en_mng_pt) {
494 manc = E1000_READ_REG(&adapter->hw, MANC);
495 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
496 E1000_WRITE_REG(&adapter->hw, MANC, manc);
497 }
1da177e4
LT		 498}
499
500/**
501 * e1000_probe - Device Initialization Routine
502 * @pdev: PCI device information struct
503 * @ent: entry in e1000_pci_tbl
504 *
505 * Returns 0 on success, negative on failure
506 *
507 * e1000_probe initializes an adapter identified by a pci_dev structure.
508 * The OS initialization, configuring of the adapter private structure,
509 * and a hardware reset occur.
510 **/
511
512static int __devinit
513e1000_probe(struct pci_dev *pdev,
514 const struct pci_device_id *ent)
515{
516 struct net_device *netdev;
517 struct e1000_adapter *adapter;
2d7edb92 518 unsigned long mmio_start, mmio_len;
868d5309 519 uint32_t ctrl_ext;
2d7edb92
MC		 520 uint32_t swsm;
521
1da177e4 522 static int cards_found = 0;
2d7edb92 523 int i, err, pci_using_dac;
1da177e4
LT		 524 uint16_t eeprom_data;
525 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
1da177e4
LT		 526 if((err = pci_enable_device(pdev)))
527 return err;
528
529 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
530 pci_using_dac = 1;
531 } else {
532 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
533 E1000_ERR("No usable DMA configuration, aborting\n");
534 return err;
535 }
536 pci_using_dac = 0;
537 }
538
539 if((err = pci_request_regions(pdev, e1000_driver_name)))
540 return err;
541
542 pci_set_master(pdev);
543
544 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
545 if(!netdev) {
546 err = -ENOMEM;
547 goto err_alloc_etherdev;
548 }
549
550 SET_MODULE_OWNER(netdev);
551 SET_NETDEV_DEV(netdev, &pdev->dev);
552
553 pci_set_drvdata(pdev, netdev);
60490fe0 554 adapter = netdev_priv(netdev);
1da177e4
LT		 555 adapter->netdev = netdev;
556 adapter->pdev = pdev;
557 adapter->hw.back = adapter;
558 adapter->msg_enable = (1 << debug) - 1;
559
560 mmio_start = pci_resource_start(pdev, BAR_0);
561 mmio_len = pci_resource_len(pdev, BAR_0);
562
563 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
564 if(!adapter->hw.hw_addr) {
565 err = -EIO;
566 goto err_ioremap;
567 }
568
569 for(i = BAR_1; i <= BAR_5; i++) {
570 if(pci_resource_len(pdev, i) == 0)
571 continue;
572 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
573 adapter->hw.io_base = pci_resource_start(pdev, i);
574 break;
575 }
576 }
577
578 netdev->open = &e1000_open;
579 netdev->stop = &e1000_close;
580 netdev->hard_start_xmit = &e1000_xmit_frame;
581 netdev->get_stats = &e1000_get_stats;
582 netdev->set_multicast_list = &e1000_set_multi;
583 netdev->set_mac_address = &e1000_set_mac;
584 netdev->change_mtu = &e1000_change_mtu;
585 netdev->do_ioctl = &e1000_ioctl;
586 e1000_set_ethtool_ops(netdev);
587 netdev->tx_timeout = &e1000_tx_timeout;
588 netdev->watchdog_timeo = 5 * HZ;
589#ifdef CONFIG_E1000_NAPI
590 netdev->poll = &e1000_clean;
591 netdev->weight = 64;
592#endif
593 netdev->vlan_rx_register = e1000_vlan_rx_register;
594 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
595 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
596#ifdef CONFIG_NET_POLL_CONTROLLER
597 netdev->poll_controller = e1000_netpoll;
598#endif
599 strcpy(netdev->name, pci_name(pdev));
600
601 netdev->mem_start = mmio_start;
602 netdev->mem_end = mmio_start + mmio_len;
603 netdev->base_addr = adapter->hw.io_base;
604
605 adapter->bd_number = cards_found;
606
607 /* setup the private structure */
608
609 if((err = e1000_sw_init(adapter)))
610 goto err_sw_init;
611
2d7edb92
MC		 612 if((err = e1000_check_phy_reset_block(&adapter->hw)))
613 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
614
1da177e4
LT		 615 if(adapter->hw.mac_type >= e1000_82543) {
616 netdev->features = NETIF_F_SG |
617 NETIF_F_HW_CSUM |
618 NETIF_F_HW_VLAN_TX |
619 NETIF_F_HW_VLAN_RX |
620 NETIF_F_HW_VLAN_FILTER;
621 }
622
623#ifdef NETIF_F_TSO
624 if((adapter->hw.mac_type >= e1000_82544) &&
625 (adapter->hw.mac_type != e1000_82547))
626 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 627
628#ifdef NETIF_F_TSO_IPV6
629 if(adapter->hw.mac_type > e1000_82547_rev_2)
630 netdev->features |= NETIF_F_TSO_IPV6;
631#endif
1da177e4
LT		 632#endif
633 if(pci_using_dac)
634 netdev->features |= NETIF_F_HIGHDMA;
635
636 /* hard_start_xmit is safe against parallel locking */
637 netdev->features |= NETIF_F_LLTX;
638
2d7edb92
MC		 639 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
640
1da177e4
LT		 641 /* before reading the EEPROM, reset the controller to
642 * put the device in a known good starting state */
643
644 e1000_reset_hw(&adapter->hw);
645
646 /* make sure the EEPROM is good */
647
648 if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
649 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
650 err = -EIO;
651 goto err_eeprom;
652 }
653
654 /* copy the MAC address out of the EEPROM */
655
2648345f 656 if(e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 657 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
658 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 659 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 660
9beb0ac1 661 if(!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 662 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
663 err = -EIO;
664 goto err_eeprom;
665 }
666
667 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
668
669 e1000_get_bus_info(&adapter->hw);
670
671 init_timer(&adapter->tx_fifo_stall_timer);
672 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
673 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
674
675 init_timer(&adapter->watchdog_timer);
676 adapter->watchdog_timer.function = &e1000_watchdog;
677 adapter->watchdog_timer.data = (unsigned long) adapter;
678
679 INIT_WORK(&adapter->watchdog_task,
680 (void (*)(void *))e1000_watchdog_task, adapter);
681
682 init_timer(&adapter->phy_info_timer);
683 adapter->phy_info_timer.function = &e1000_update_phy_info;
684 adapter->phy_info_timer.data = (unsigned long) adapter;
685
686 INIT_WORK(&adapter->tx_timeout_task,
687 (void (*)(void *))e1000_tx_timeout_task, netdev);
688
689 /* we're going to reset, so assume we have no link for now */
690
691 netif_carrier_off(netdev);
692 netif_stop_queue(netdev);
693
694 e1000_check_options(adapter);
695
696 /* Initial Wake on LAN setting
697 * If APM wake is enabled in the EEPROM,
698 * enable the ACPI Magic Packet filter
699 */
700
701 switch(adapter->hw.mac_type) {
702 case e1000_82542_rev2_0:
703 case e1000_82542_rev2_1:
704 case e1000_82543:
705 break;
706 case e1000_82544:
707 e1000_read_eeprom(&adapter->hw,
708 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
709 eeprom_apme_mask = E1000_EEPROM_82544_APM;
710 break;
711 case e1000_82546:
712 case e1000_82546_rev_3:
713 if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
714 && (adapter->hw.media_type == e1000_media_type_copper)) {
715 e1000_read_eeprom(&adapter->hw,
716 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
717 break;
718 }
719 /* Fall Through */
720 default:
721 e1000_read_eeprom(&adapter->hw,
722 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
723 break;
724 }
725 if(eeprom_data & eeprom_apme_mask)
726 adapter->wol |= E1000_WUFC_MAG;
727
728 /* reset the hardware with the new settings */
729 e1000_reset(adapter);
730
2d7edb92
MC		 731 /* Let firmware know the driver has taken over */
732 switch(adapter->hw.mac_type) {
868d5309
MC		 733 case e1000_82571:
734 case e1000_82572:
735 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
736 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
737 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
738 break;
2d7edb92
MC		 739 case e1000_82573:
740 swsm = E1000_READ_REG(&adapter->hw, SWSM);
741 E1000_WRITE_REG(&adapter->hw, SWSM,
742 swsm | E1000_SWSM_DRV_LOAD);
743 break;
744 default:
745 break;
746 }
747
1da177e4
LT		 748 strcpy(netdev->name, "eth%d");
749 if((err = register_netdev(netdev)))
750 goto err_register;
751
752 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
753
754 cards_found++;
755 return 0;
756
757err_register:
758err_sw_init:
759err_eeprom:
760 iounmap(adapter->hw.hw_addr);
761err_ioremap:
762 free_netdev(netdev);
763err_alloc_etherdev:
764 pci_release_regions(pdev);
765 return err;
766}
767
768/**
769 * e1000_remove - Device Removal Routine
770 * @pdev: PCI device information struct
771 *
772 * e1000_remove is called by the PCI subsystem to alert the driver
773 * that it should release a PCI device. The could be caused by a
774 * Hot-Plug event, or because the driver is going to be removed from
775 * memory.
776 **/
777
778static void __devexit
779e1000_remove(struct pci_dev *pdev)
780{
781 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 782 struct e1000_adapter *adapter = netdev_priv(netdev);
868d5309 783 uint32_t ctrl_ext;
2d7edb92 784 uint32_t manc, swsm;
581d708e
MC		 785#ifdef CONFIG_E1000_NAPI
786 int i;
787#endif
1da177e4 788
be2b28ed
JG		 789 flush_scheduled_work();
790
1da177e4
LT		 791 if(adapter->hw.mac_type >= e1000_82540 &&
792 adapter->hw.media_type == e1000_media_type_copper) {
793 manc = E1000_READ_REG(&adapter->hw, MANC);
794 if(manc & E1000_MANC_SMBUS_EN) {
795 manc |= E1000_MANC_ARP_EN;
796 E1000_WRITE_REG(&adapter->hw, MANC, manc);
797 }
798 }
799
2d7edb92 800 switch(adapter->hw.mac_type) {
868d5309
MC		 801 case e1000_82571:
802 case e1000_82572:
803 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
804 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
805 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
806 break;
2d7edb92
MC		 807 case e1000_82573:
808 swsm = E1000_READ_REG(&adapter->hw, SWSM);
809 E1000_WRITE_REG(&adapter->hw, SWSM,
810 swsm & ~E1000_SWSM_DRV_LOAD);
811 break;
812
813 default:
814 break;
815 }
816
1da177e4 817 unregister_netdev(netdev);
581d708e
MC		 818#ifdef CONFIG_E1000_NAPI
819 for (i = 0; i < adapter->num_queues; i++)
820 __dev_put(&adapter->polling_netdev[i]);
821#endif
1da177e4 822
2d7edb92
MC		 823 if(!e1000_check_phy_reset_block(&adapter->hw))
824 e1000_phy_hw_reset(&adapter->hw);
1da177e4 825
24025e4e
MC		 826 kfree(adapter->tx_ring);
827 kfree(adapter->rx_ring);
828#ifdef CONFIG_E1000_NAPI
829 kfree(adapter->polling_netdev);
830#endif
831
1da177e4
LT		 832 iounmap(adapter->hw.hw_addr);
833 pci_release_regions(pdev);
834
24025e4e
MC		 835#ifdef CONFIG_E1000_MQ
836 free_percpu(adapter->cpu_netdev);
837 free_percpu(adapter->cpu_tx_ring);
838#endif
1da177e4
LT		 839 free_netdev(netdev);
840
841 pci_disable_device(pdev);
842}
843
844/**
845 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
846 * @adapter: board private structure to initialize
847 *
848 * e1000_sw_init initializes the Adapter private data structure.
849 * Fields are initialized based on PCI device information and
850 * OS network device settings (MTU size).
851 **/
852
853static int __devinit
854e1000_sw_init(struct e1000_adapter *adapter)
855{
856 struct e1000_hw *hw = &adapter->hw;
857 struct net_device *netdev = adapter->netdev;
858 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 859#ifdef CONFIG_E1000_NAPI
860 int i;
861#endif
1da177e4
LT		 862
863 /* PCI config space info */
864
865 hw->vendor_id = pdev->vendor;
866 hw->device_id = pdev->device;
867 hw->subsystem_vendor_id = pdev->subsystem_vendor;
868 hw->subsystem_id = pdev->subsystem_device;
869
870 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
871
872 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
873
874 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2d7edb92 875 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
1da177e4
LT		 876 hw->max_frame_size = netdev->mtu +
877 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
878 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
879
880 /* identify the MAC */
881
882 if(e1000_set_mac_type(hw)) {
883 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
884 return -EIO;
885 }
886
887 /* initialize eeprom parameters */
888
2d7edb92
MC		 889 if(e1000_init_eeprom_params(hw)) {
890 E1000_ERR("EEPROM initialization failed\n");
891 return -EIO;
892 }
1da177e4
LT		 893
894 switch(hw->mac_type) {
895 default:
896 break;
897 case e1000_82541:
898 case e1000_82547:
899 case e1000_82541_rev_2:
900 case e1000_82547_rev_2:
901 hw->phy_init_script = 1;
902 break;
903 }
904
905 e1000_set_media_type(hw);
906
907 hw->wait_autoneg_complete = FALSE;
908 hw->tbi_compatibility_en = TRUE;
909 hw->adaptive_ifs = TRUE;
910
911 /* Copper options */
912
913 if(hw->media_type == e1000_media_type_copper) {
914 hw->mdix = AUTO_ALL_MODES;
915 hw->disable_polarity_correction = FALSE;
916 hw->master_slave = E1000_MASTER_SLAVE;
917 }
918
24025e4e
MC		 919#ifdef CONFIG_E1000_MQ
920 /* Number of supported queues */
921 switch (hw->mac_type) {
922 case e1000_82571:
923 case e1000_82572:
924 adapter->num_queues = 2;
925 break;
926 default:
927 adapter->num_queues = 1;
928 break;
929 }
930 adapter->num_queues = min(adapter->num_queues, num_online_cpus());
931#else
581d708e 932 adapter->num_queues = 1;
24025e4e 933#endif
581d708e
MC		 934
935 if (e1000_alloc_queues(adapter)) {
936 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
937 return -ENOMEM;
938 }
939
940#ifdef CONFIG_E1000_NAPI
941 for (i = 0; i < adapter->num_queues; i++) {
942 adapter->polling_netdev[i].priv = adapter;
943 adapter->polling_netdev[i].poll = &e1000_clean;
944 adapter->polling_netdev[i].weight = 64;
945 dev_hold(&adapter->polling_netdev[i]);
946 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
947 }
948#endif
24025e4e
MC		 949
950#ifdef CONFIG_E1000_MQ
951 e1000_setup_queue_mapping(adapter);
952#endif
953
1da177e4
LT		 954 atomic_set(&adapter->irq_sem, 1);
955 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 956
957 return 0;
958}
959
581d708e
MC		 960/**
961 * e1000_alloc_queues - Allocate memory for all rings
962 * @adapter: board private structure to initialize
963 *
964 * We allocate one ring per queue at run-time since we don't know the
965 * number of queues at compile-time. The polling_netdev array is
966 * intended for Multiqueue, but should work fine with a single queue.
967 **/
968
969static int __devinit
970e1000_alloc_queues(struct e1000_adapter *adapter)
971{
972 int size;
973
974 size = sizeof(struct e1000_tx_ring) * adapter->num_queues;
975 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
976 if (!adapter->tx_ring)
977 return -ENOMEM;
978 memset(adapter->tx_ring, 0, size);
979
980 size = sizeof(struct e1000_rx_ring) * adapter->num_queues;
981 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
982 if (!adapter->rx_ring) {
983 kfree(adapter->tx_ring);
984 return -ENOMEM;
985 }
986 memset(adapter->rx_ring, 0, size);
987
988#ifdef CONFIG_E1000_NAPI
989 size = sizeof(struct net_device) * adapter->num_queues;
990 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
991 if (!adapter->polling_netdev) {
992 kfree(adapter->tx_ring);
993 kfree(adapter->rx_ring);
994 return -ENOMEM;
995 }
996 memset(adapter->polling_netdev, 0, size);
997#endif
998
999 return E1000_SUCCESS;
1000}
1001
24025e4e
MC		 1002#ifdef CONFIG_E1000_MQ
1003static void __devinit
1004e1000_setup_queue_mapping(struct e1000_adapter *adapter)
1005{
1006 int i, cpu;
1007
1008 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1009 adapter->rx_sched_call_data.info = adapter->netdev;
1010 cpus_clear(adapter->rx_sched_call_data.cpumask);
1011
1012 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1013 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1014
1015 lock_cpu_hotplug();
1016 i = 0;
1017 for_each_online_cpu(cpu) {
1018 *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_queues];
1019 /* This is incomplete because we'd like to assign separate
1020 * physical cpus to these netdev polling structures and
1021 * avoid saturating a subset of cpus.
1022 */
1023 if (i < adapter->num_queues) {
1024 *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
1025 adapter->cpu_for_queue[i] = cpu;
1026 } else
1027 *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
1028
1029 i++;
1030 }
1031 unlock_cpu_hotplug();
1032}
1033#endif
1034
1da177e4
LT		 1035/**
1036 * e1000_open - Called when a network interface is made active
1037 * @netdev: network interface device structure
1038 *
1039 * Returns 0 on success, negative value on failure
1040 *
1041 * The open entry point is called when a network interface is made
1042 * active by the system (IFF_UP). At this point all resources needed
1043 * for transmit and receive operations are allocated, the interrupt
1044 * handler is registered with the OS, the watchdog timer is started,
1045 * and the stack is notified that the interface is ready.
1046 **/
1047
1048static int
1049e1000_open(struct net_device *netdev)
1050{
60490fe0 1051 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1052 int err;
1053
1054 /* allocate transmit descriptors */
1055
581d708e 1056 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1057 goto err_setup_tx;
1058
1059 /* allocate receive descriptors */
1060
581d708e 1061 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1062 goto err_setup_rx;
1063
1064 if((err = e1000_up(adapter)))
1065 goto err_up;
2d7edb92
MC		 1066 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1067 if((adapter->hw.mng_cookie.status &
1068 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1069 e1000_update_mng_vlan(adapter);
1070 }
1da177e4
LT		 1071
1072 return E1000_SUCCESS;
1073
1074err_up:
581d708e 1075 e1000_free_all_rx_resources(adapter);
1da177e4 1076err_setup_rx:
581d708e 1077 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1078err_setup_tx:
1079 e1000_reset(adapter);
1080
1081 return err;
1082}
1083
1084/**
1085 * e1000_close - Disables a network interface
1086 * @netdev: network interface device structure
1087 *
1088 * Returns 0, this is not allowed to fail
1089 *
1090 * The close entry point is called when an interface is de-activated
1091 * by the OS. The hardware is still under the drivers control, but
1092 * needs to be disabled. A global MAC reset is issued to stop the
1093 * hardware, and all transmit and receive resources are freed.
1094 **/
1095
1096static int
1097e1000_close(struct net_device *netdev)
1098{
60490fe0 1099 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1100
1101 e1000_down(adapter);
1102
581d708e
MC		 1103 e1000_free_all_tx_resources(adapter);
1104 e1000_free_all_rx_resources(adapter);
1da177e4 1105
2d7edb92
MC		 1106 if((adapter->hw.mng_cookie.status &
1107 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1108 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1109 }
1da177e4
LT		 1110 return 0;
1111}
1112
1113/**
1114 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1115 * @adapter: address of board private structure
2d7edb92
MC		 1116 * @start: address of beginning of memory
1117 * @len: length of memory
1da177e4
LT		 1118 **/
1119static inline boolean_t
1120e1000_check_64k_bound(struct e1000_adapter *adapter,
1121 void *start, unsigned long len)
1122{
1123 unsigned long begin = (unsigned long) start;
1124 unsigned long end = begin + len;
1125
2648345f
MC		 1126 /* First rev 82545 and 82546 need to not allow any memory
1127 * write location to cross 64k boundary due to errata 23 */
1da177e4 1128 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1129 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1130 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1131 }
1132
1133 return TRUE;
1134}
1135
1136/**
1137 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1138 * @adapter: board private structure
581d708e 1139 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1140 *
1141 * Return 0 on success, negative on failure
1142 **/
1143
1144int
581d708e
MC		 1145e1000_setup_tx_resources(struct e1000_adapter *adapter,
1146 struct e1000_tx_ring *txdr)
1da177e4 1147{
1da177e4
LT		 1148 struct pci_dev *pdev = adapter->pdev;
1149 int size;
1150
1151 size = sizeof(struct e1000_buffer) * txdr->count;
1152 txdr->buffer_info = vmalloc(size);
1153 if(!txdr->buffer_info) {
2648345f
MC		 1154 DPRINTK(PROBE, ERR,
1155 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1156 return -ENOMEM;
1157 }
1158 memset(txdr->buffer_info, 0, size);
2ae76d98 1159 memset(&txdr->previous_buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1160
1161 /* round up to nearest 4K */
1162
1163 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1164 E1000_ROUNDUP(txdr->size, 4096);
1165
1166 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1167 if(!txdr->desc) {
1168setup_tx_desc_die:
1da177e4 1169 vfree(txdr->buffer_info);
2648345f
MC		 1170 DPRINTK(PROBE, ERR,
1171 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1172 return -ENOMEM;
1173 }
1174
2648345f 1175 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1176 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1177 void *olddesc = txdr->desc;
1178 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1179 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1180 "at %p\n", txdr->size, txdr->desc);
1181 /* Try again, without freeing the previous */
1da177e4 1182 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1da177e4 1183 if(!txdr->desc) {
2648345f 1184 /* Failed allocation, critical failure */
1da177e4
LT		 1185 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1186 goto setup_tx_desc_die;
1187 }
1188
1189 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1190 /* give up */
2648345f
MC		 1191 pci_free_consistent(pdev, txdr->size, txdr->desc,
1192 txdr->dma);
1da177e4
LT		 1193 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1194 DPRINTK(PROBE, ERR,
2648345f
MC		 1195 "Unable to allocate aligned memory "
1196 "for the transmit descriptor ring\n");
1da177e4
LT		 1197 vfree(txdr->buffer_info);
1198 return -ENOMEM;
1199 } else {
2648345f 1200 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1201 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1202 }
1203 }
1204 memset(txdr->desc, 0, txdr->size);
1205
1206 txdr->next_to_use = 0;
1207 txdr->next_to_clean = 0;
2ae76d98 1208 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1209
1210 return 0;
1211}
1212
581d708e
MC		 1213/**
1214 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1215 * (Descriptors) for all queues
1216 * @adapter: board private structure
1217 *
1218 * If this function returns with an error, then it's possible one or
1219 * more of the rings is populated (while the rest are not). It is the
1220 * callers duty to clean those orphaned rings.
1221 *
1222 * Return 0 on success, negative on failure
1223 **/
1224
1225int
1226e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1227{
1228 int i, err = 0;
1229
1230 for (i = 0; i < adapter->num_queues; i++) {
1231 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1232 if (err) {
1233 DPRINTK(PROBE, ERR,
1234 "Allocation for Tx Queue %u failed\n", i);
1235 break;
1236 }
1237 }
1238
1239 return err;
1240}
1241
1da177e4
LT		 1242/**
1243 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1244 * @adapter: board private structure
1245 *
1246 * Configure the Tx unit of the MAC after a reset.
1247 **/
1248
1249static void
1250e1000_configure_tx(struct e1000_adapter *adapter)
1251{
581d708e
MC		 1252 uint64_t tdba;
1253 struct e1000_hw *hw = &adapter->hw;
1254 uint32_t tdlen, tctl, tipg, tarc;
1da177e4
LT		 1255
1256 /* Setup the HW Tx Head and Tail descriptor pointers */
1257
24025e4e
MC		 1258 switch (adapter->num_queues) {
1259 case 2:
1260 tdba = adapter->tx_ring[1].dma;
1261 tdlen = adapter->tx_ring[1].count *
1262 sizeof(struct e1000_tx_desc);
1263 E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
1264 E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
1265 E1000_WRITE_REG(hw, TDLEN1, tdlen);
1266 E1000_WRITE_REG(hw, TDH1, 0);
1267 E1000_WRITE_REG(hw, TDT1, 0);
1268 adapter->tx_ring[1].tdh = E1000_TDH1;
1269 adapter->tx_ring[1].tdt = E1000_TDT1;
1270 /* Fall Through */
1271 case 1:
1272 default:
581d708e
MC		 1273 tdba = adapter->tx_ring[0].dma;
1274 tdlen = adapter->tx_ring[0].count *
1275 sizeof(struct e1000_tx_desc);
1276 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1277 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1278 E1000_WRITE_REG(hw, TDLEN, tdlen);
1279 E1000_WRITE_REG(hw, TDH, 0);
1280 E1000_WRITE_REG(hw, TDT, 0);
1281 adapter->tx_ring[0].tdh = E1000_TDH;
1282 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1283 break;
1284 }
1da177e4
LT		 1285
1286 /* Set the default values for the Tx Inter Packet Gap timer */
1287
581d708e 1288 switch (hw->mac_type) {
1da177e4
LT		 1289 case e1000_82542_rev2_0:
1290 case e1000_82542_rev2_1:
1291 tipg = DEFAULT_82542_TIPG_IPGT;
1292 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
1293 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
1294 break;
1295 default:
581d708e
MC		 1296 if (hw->media_type == e1000_media_type_fiber ||
1297 hw->media_type == e1000_media_type_internal_serdes)
1da177e4
LT		 1298 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1299 else
1300 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1301 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
1302 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
1303 }
581d708e 1304 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1305
1306 /* Set the Tx Interrupt Delay register */
1307
581d708e
MC		 1308 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1309 if (hw->mac_type >= e1000_82540)
1310 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1311
1312 /* Program the Transmit Control Register */
1313
581d708e 1314 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1315
1316 tctl &= ~E1000_TCTL_CT;
24025e4e 1317 tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1318 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1319
581d708e 1320 E1000_WRITE_REG(hw, TCTL, tctl);
1da177e4 1321
2ae76d98
MC		 1322 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1323 tarc = E1000_READ_REG(hw, TARC0);
1324 tarc |= ((1 << 25) | (1 << 21));
1325 E1000_WRITE_REG(hw, TARC0, tarc);
1326 tarc = E1000_READ_REG(hw, TARC1);
1327 tarc |= (1 << 25);
1328 if (tctl & E1000_TCTL_MULR)
1329 tarc &= ~(1 << 28);
1330 else
1331 tarc |= (1 << 28);
1332 E1000_WRITE_REG(hw, TARC1, tarc);
1333 }
1334
581d708e 1335 e1000_config_collision_dist(hw);
1da177e4
LT		 1336
1337 /* Setup Transmit Descriptor Settings for eop descriptor */
1338 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1339 E1000_TXD_CMD_IFCS;
1340
581d708e 1341 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1342 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1343 else
1344 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1345
1346 /* Cache if we're 82544 running in PCI-X because we'll
1347 * need this to apply a workaround later in the send path. */
581d708e
MC		 1348 if (hw->mac_type == e1000_82544 &&
1349 hw->bus_type == e1000_bus_type_pcix)
1da177e4
LT		 1350 adapter->pcix_82544 = 1;
1351}
1352
1353/**
1354 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1355 * @adapter: board private structure
581d708e 1356 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1357 *
1358 * Returns 0 on success, negative on failure
1359 **/
1360
1361int
581d708e
MC		 1362e1000_setup_rx_resources(struct e1000_adapter *adapter,
1363 struct e1000_rx_ring *rxdr)
1da177e4 1364{
1da177e4 1365 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1366 int size, desc_len;
1da177e4
LT		 1367
1368 size = sizeof(struct e1000_buffer) * rxdr->count;
1369 rxdr->buffer_info = vmalloc(size);
581d708e 1370 if (!rxdr->buffer_info) {
2648345f
MC		 1371 DPRINTK(PROBE, ERR,
1372 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1373 return -ENOMEM;
1374 }
1375 memset(rxdr->buffer_info, 0, size);
1376
2d7edb92
MC		 1377 size = sizeof(struct e1000_ps_page) * rxdr->count;
1378 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1379 if(!rxdr->ps_page) {
1380 vfree(rxdr->buffer_info);
1381 DPRINTK(PROBE, ERR,
1382 "Unable to allocate memory for the receive descriptor ring\n");
1383 return -ENOMEM;
1384 }
1385 memset(rxdr->ps_page, 0, size);
1386
1387 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1388 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1389 if(!rxdr->ps_page_dma) {
1390 vfree(rxdr->buffer_info);
1391 kfree(rxdr->ps_page);
1392 DPRINTK(PROBE, ERR,
1393 "Unable to allocate memory for the receive descriptor ring\n");
1394 return -ENOMEM;
1395 }
1396 memset(rxdr->ps_page_dma, 0, size);
1397
1398 if(adapter->hw.mac_type <= e1000_82547_rev_2)
1399 desc_len = sizeof(struct e1000_rx_desc);
1400 else
1401 desc_len = sizeof(union e1000_rx_desc_packet_split);
1402
1da177e4
LT		 1403 /* Round up to nearest 4K */
1404
2d7edb92 1405 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1406 E1000_ROUNDUP(rxdr->size, 4096);
1407
1408 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1409
581d708e
MC		 1410 if (!rxdr->desc) {
1411 DPRINTK(PROBE, ERR,
1412 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1413setup_rx_desc_die:
1da177e4 1414 vfree(rxdr->buffer_info);
2d7edb92
MC		 1415 kfree(rxdr->ps_page);
1416 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1417 return -ENOMEM;
1418 }
1419
2648345f 1420 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1421 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1422 void *olddesc = rxdr->desc;
1423 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1424 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1425 "at %p\n", rxdr->size, rxdr->desc);
1426 /* Try again, without freeing the previous */
1da177e4 1427 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1428 /* Failed allocation, critical failure */
581d708e 1429 if (!rxdr->desc) {
1da177e4 1430 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1431 DPRINTK(PROBE, ERR,
1432 "Unable to allocate memory "
1433 "for the receive descriptor ring\n");
1da177e4
LT		 1434 goto setup_rx_desc_die;
1435 }
1436
1437 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1438 /* give up */
2648345f
MC		 1439 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1440 rxdr->dma);
1da177e4 1441 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1442 DPRINTK(PROBE, ERR,
1443 "Unable to allocate aligned memory "
1444 "for the receive descriptor ring\n");
581d708e 1445 goto setup_rx_desc_die;
1da177e4 1446 } else {
2648345f 1447 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1448 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1449 }
1450 }
1451 memset(rxdr->desc, 0, rxdr->size);
1452
1453 rxdr->next_to_clean = 0;
1454 rxdr->next_to_use = 0;
1455
1456 return 0;
1457}
1458
581d708e
MC		 1459/**
1460 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1461 * (Descriptors) for all queues
1462 * @adapter: board private structure
1463 *
1464 * If this function returns with an error, then it's possible one or
1465 * more of the rings is populated (while the rest are not). It is the
1466 * callers duty to clean those orphaned rings.
1467 *
1468 * Return 0 on success, negative on failure
1469 **/
1470
1471int
1472e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1473{
1474 int i, err = 0;
1475
1476 for (i = 0; i < adapter->num_queues; i++) {
1477 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1478 if (err) {
1479 DPRINTK(PROBE, ERR,
1480 "Allocation for Rx Queue %u failed\n", i);
1481 break;
1482 }
1483 }
1484
1485 return err;
1486}
1487
1da177e4 1488/**
2648345f 1489 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1490 * @adapter: Board private structure
1491 **/
e4c811c9
MC		 1492#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1493 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1494static void
1495e1000_setup_rctl(struct e1000_adapter *adapter)
1496{
2d7edb92
MC		 1497 uint32_t rctl, rfctl;
1498 uint32_t psrctl = 0;
e4c811c9
MC		 1499#ifdef CONFIG_E1000_PACKET_SPLIT
1500 uint32_t pages = 0;
1501#endif
1da177e4
LT		 1502
1503 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1504
1505 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1506
1507 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1508 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1509 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1510
1511 if(adapter->hw.tbi_compatibility_on == 1)
1512 rctl |= E1000_RCTL_SBP;
1513 else
1514 rctl &= ~E1000_RCTL_SBP;
1515
2d7edb92
MC		 1516 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1517 rctl &= ~E1000_RCTL_LPE;
1518 else
1519 rctl |= E1000_RCTL_LPE;
1520
1da177e4 1521 /* Setup buffer sizes */
868d5309 1522 if(adapter->hw.mac_type >= e1000_82571) {
2d7edb92
MC		 1523 /* We can now specify buffers in 1K increments.
1524 * BSIZE and BSEX are ignored in this case. */
1525 rctl |= adapter->rx_buffer_len << 0x11;
1526 } else {
1527 rctl &= ~E1000_RCTL_SZ_4096;
1528 rctl |= E1000_RCTL_BSEX;
1529 switch (adapter->rx_buffer_len) {
1530 case E1000_RXBUFFER_2048:
1531 default:
1532 rctl |= E1000_RCTL_SZ_2048;
1533 rctl &= ~E1000_RCTL_BSEX;
1534 break;
1535 case E1000_RXBUFFER_4096:
1536 rctl |= E1000_RCTL_SZ_4096;
1537 break;
1538 case E1000_RXBUFFER_8192:
1539 rctl |= E1000_RCTL_SZ_8192;
1540 break;
1541 case E1000_RXBUFFER_16384:
1542 rctl |= E1000_RCTL_SZ_16384;
1543 break;
1544 }
1545 }
1546
1547#ifdef CONFIG_E1000_PACKET_SPLIT
1548 /* 82571 and greater support packet-split where the protocol
1549 * header is placed in skb->data and the packet data is
1550 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1551 * In the case of a non-split, skb->data is linearly filled,
1552 * followed by the page buffers. Therefore, skb->data is
1553 * sized to hold the largest protocol header.
1554 */
e4c811c9
MC		 1555 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1556 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1557 PAGE_SIZE <= 16384)
1558 adapter->rx_ps_pages = pages;
1559 else
1560 adapter->rx_ps_pages = 0;
2d7edb92 1561#endif
e4c811c9 1562 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1563 /* Configure extra packet-split registers */
1564 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1565 rfctl |= E1000_RFCTL_EXTEN;
1566 /* disable IPv6 packet split support */
1567 rfctl |= E1000_RFCTL_IPV6_DIS;
1568 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1569
1570 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
1571
1572 psrctl |= adapter->rx_ps_bsize0 >>
1573 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1574
1575 switch (adapter->rx_ps_pages) {
1576 case 3:
1577 psrctl |= PAGE_SIZE <<
1578 E1000_PSRCTL_BSIZE3_SHIFT;
1579 case 2:
1580 psrctl |= PAGE_SIZE <<
1581 E1000_PSRCTL_BSIZE2_SHIFT;
1582 case 1:
1583 psrctl |= PAGE_SIZE >>
1584 E1000_PSRCTL_BSIZE1_SHIFT;
1585 break;
1586 }
2d7edb92
MC		 1587
1588 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1589 }
1590
1591 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1592}
1593
1594/**
1595 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1596 * @adapter: board private structure
1597 *
1598 * Configure the Rx unit of the MAC after a reset.
1599 **/
1600
1601static void
1602e1000_configure_rx(struct e1000_adapter *adapter)
1603{
581d708e
MC		 1604 uint64_t rdba;
1605 struct e1000_hw *hw = &adapter->hw;
1606 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1607#ifdef CONFIG_E1000_MQ
1608 uint32_t reta, mrqc;
1609 int i;
1610#endif
2d7edb92 1611
e4c811c9 1612 if (adapter->rx_ps_pages) {
581d708e 1613 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1614 sizeof(union e1000_rx_desc_packet_split);
1615 adapter->clean_rx = e1000_clean_rx_irq_ps;
1616 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1617 } else {
581d708e
MC		 1618 rdlen = adapter->rx_ring[0].count *
1619 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1620 adapter->clean_rx = e1000_clean_rx_irq;
1621 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1622 }
1da177e4
LT		 1623
1624 /* disable receives while setting up the descriptors */
581d708e
MC		 1625 rctl = E1000_READ_REG(hw, RCTL);
1626 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1627
1628 /* set the Receive Delay Timer Register */
581d708e 1629 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1630
581d708e
MC		 1631 if (hw->mac_type >= e1000_82540) {
1632 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1da177e4 1633 if(adapter->itr > 1)
581d708e 1634 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1635 1000000000 / (adapter->itr * 256));
1636 }
1637
2ae76d98
MC		 1638 if (hw->mac_type >= e1000_82571) {
1639 /* Reset delay timers after every interrupt */
1640 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1641 ctrl_ext |= E1000_CTRL_EXT_CANC;
1642 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1643 E1000_WRITE_FLUSH(hw);
1644 }
1645
581d708e
MC		 1646 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1647 * the Base and Length of the Rx Descriptor Ring */
24025e4e
MC		 1648 switch (adapter->num_queues) {
1649#ifdef CONFIG_E1000_MQ
1650 case 2:
1651 rdba = adapter->rx_ring[1].dma;
1652 E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
1653 E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
1654 E1000_WRITE_REG(hw, RDLEN1, rdlen);
1655 E1000_WRITE_REG(hw, RDH1, 0);
1656 E1000_WRITE_REG(hw, RDT1, 0);
1657 adapter->rx_ring[1].rdh = E1000_RDH1;
1658 adapter->rx_ring[1].rdt = E1000_RDT1;
1659 /* Fall Through */
1660#endif
1661 case 1:
1662 default:
581d708e
MC		 1663 rdba = adapter->rx_ring[0].dma;
1664 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1665 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1666 E1000_WRITE_REG(hw, RDLEN, rdlen);
1667 E1000_WRITE_REG(hw, RDH, 0);
1668 E1000_WRITE_REG(hw, RDT, 0);
1669 adapter->rx_ring[0].rdh = E1000_RDH;
1670 adapter->rx_ring[0].rdt = E1000_RDT;
1671 break;
24025e4e
MC		 1672 }
1673
1674#ifdef CONFIG_E1000_MQ
1675 if (adapter->num_queues > 1) {
1676 uint32_t random[10];
1677
1678 get_random_bytes(&random[0], 40);
1679
1680 if (hw->mac_type <= e1000_82572) {
1681 E1000_WRITE_REG(hw, RSSIR, 0);
1682 E1000_WRITE_REG(hw, RSSIM, 0);
1683 }
1684
1685 switch (adapter->num_queues) {
1686 case 2:
1687 default:
1688 reta = 0x00800080;
1689 mrqc = E1000_MRQC_ENABLE_RSS_2Q;
1690 break;
1691 }
1692
1693 /* Fill out redirection table */
1694 for (i = 0; i < 32; i++)
1695 E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
1696 /* Fill out hash function seeds */
1697 for (i = 0; i < 10; i++)
1698 E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
1699
1700 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1701 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1702 E1000_WRITE_REG(hw, MRQC, mrqc);
1703 }
1704
1705 /* Multiqueue and packet checksumming are mutually exclusive. */
1706 if (hw->mac_type >= e1000_82571) {
1707 rxcsum = E1000_READ_REG(hw, RXCSUM);
1708 rxcsum |= E1000_RXCSUM_PCSD;
1709 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1710 }
1711
1712#else
1da177e4
LT		 1713
1714 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1715 if (hw->mac_type >= e1000_82543) {
1716 rxcsum = E1000_READ_REG(hw, RXCSUM);
2d7edb92
MC		 1717 if(adapter->rx_csum == TRUE) {
1718 rxcsum |= E1000_RXCSUM_TUOFL;
1719
868d5309 1720 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1721 * Must be used in conjunction with packet-split. */
e4c811c9
MC		 1722 if ((hw->mac_type >= e1000_82571) &&
1723 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1724 rxcsum |= E1000_RXCSUM_IPPCSE;
1725 }
1726 } else {
1727 rxcsum &= ~E1000_RXCSUM_TUOFL;
1728 /* don't need to clear IPPCSE as it defaults to 0 */
1729 }
581d708e 1730 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4 1731 }
24025e4e 1732#endif /* CONFIG_E1000_MQ */
1da177e4 1733
581d708e
MC		 1734 if (hw->mac_type == e1000_82573)
1735 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1736
1da177e4 1737 /* Enable Receives */
581d708e 1738 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1739}
1740
1741/**
581d708e 1742 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1743 * @adapter: board private structure
581d708e 1744 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1745 *
1746 * Free all transmit software resources
1747 **/
1748
1749void
581d708e
MC		 1750e1000_free_tx_resources(struct e1000_adapter *adapter,
1751 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1752{
1753 struct pci_dev *pdev = adapter->pdev;
1754
581d708e 1755 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1756
581d708e
MC		 1757 vfree(tx_ring->buffer_info);
1758 tx_ring->buffer_info = NULL;
1da177e4 1759
581d708e 1760 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1761
581d708e
MC		 1762 tx_ring->desc = NULL;
1763}
1764
1765/**
1766 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1767 * @adapter: board private structure
1768 *
1769 * Free all transmit software resources
1770 **/
1771
1772void
1773e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1774{
1775 int i;
1776
1777 for (i = 0; i < adapter->num_queues; i++)
1778 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1779}
1780
1781static inline void
1782e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1783 struct e1000_buffer *buffer_info)
1784{
1da177e4 1785 if(buffer_info->dma) {
2648345f
MC		 1786 pci_unmap_page(adapter->pdev,
1787 buffer_info->dma,
1788 buffer_info->length,
1789 PCI_DMA_TODEVICE);
1da177e4
LT		 1790 buffer_info->dma = 0;
1791 }
1792 if(buffer_info->skb) {
1793 dev_kfree_skb_any(buffer_info->skb);
1794 buffer_info->skb = NULL;
1795 }
1796}
1797
1798/**
1799 * e1000_clean_tx_ring - Free Tx Buffers
1800 * @adapter: board private structure
581d708e 1801 * @tx_ring: ring to be cleaned
1da177e4
LT		 1802 **/
1803
1804static void
581d708e
MC		 1805e1000_clean_tx_ring(struct e1000_adapter *adapter,
1806 struct e1000_tx_ring *tx_ring)
1da177e4 1807{
1da177e4
LT		 1808 struct e1000_buffer *buffer_info;
1809 unsigned long size;
1810 unsigned int i;
1811
1812 /* Free all the Tx ring sk_buffs */
1813
581d708e 1814 if (likely(tx_ring->previous_buffer_info.skb != NULL)) {
2648345f 1815 e1000_unmap_and_free_tx_resource(adapter,
581d708e 1816 &tx_ring->previous_buffer_info);
1da177e4
LT		 1817 }
1818
1819 for(i = 0; i < tx_ring->count; i++) {
1820 buffer_info = &tx_ring->buffer_info[i];
1821 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1822 }
1823
1824 size = sizeof(struct e1000_buffer) * tx_ring->count;
1825 memset(tx_ring->buffer_info, 0, size);
1826
1827 /* Zero out the descriptor ring */
1828
1829 memset(tx_ring->desc, 0, tx_ring->size);
1830
1831 tx_ring->next_to_use = 0;
1832 tx_ring->next_to_clean = 0;
1833
581d708e
MC		 1834 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1835 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1836}
1837
1838/**
1839 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1840 * @adapter: board private structure
1841 **/
1842
1843static void
1844e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1845{
1846 int i;
1847
1848 for (i = 0; i < adapter->num_queues; i++)
1849 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1850}
1851
1852/**
1853 * e1000_free_rx_resources - Free Rx Resources
1854 * @adapter: board private structure
581d708e 1855 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1856 *
1857 * Free all receive software resources
1858 **/
1859
1860void
581d708e
MC		 1861e1000_free_rx_resources(struct e1000_adapter *adapter,
1862 struct e1000_rx_ring *rx_ring)
1da177e4 1863{
1da177e4
LT		 1864 struct pci_dev *pdev = adapter->pdev;
1865
581d708e 1866 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1867
1868 vfree(rx_ring->buffer_info);
1869 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1870 kfree(rx_ring->ps_page);
1871 rx_ring->ps_page = NULL;
1872 kfree(rx_ring->ps_page_dma);
1873 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1874
1875 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1876
1877 rx_ring->desc = NULL;
1878}
1879
1880/**
581d708e 1881 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1882 * @adapter: board private structure
581d708e
MC		 1883 *
1884 * Free all receive software resources
1885 **/
1886
1887void
1888e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1889{
1890 int i;
1891
1892 for (i = 0; i < adapter->num_queues; i++)
1893 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1894}
1895
1896/**
1897 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1898 * @adapter: board private structure
1899 * @rx_ring: ring to free buffers from
1da177e4
LT		 1900 **/
1901
1902static void
581d708e
MC		 1903e1000_clean_rx_ring(struct e1000_adapter *adapter,
1904 struct e1000_rx_ring *rx_ring)
1da177e4 1905{
1da177e4 1906 struct e1000_buffer *buffer_info;
2d7edb92
MC		 1907 struct e1000_ps_page *ps_page;
1908 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 1909 struct pci_dev *pdev = adapter->pdev;
1910 unsigned long size;
2d7edb92 1911 unsigned int i, j;
1da177e4
LT		 1912
1913 /* Free all the Rx ring sk_buffs */
1914
1915 for(i = 0; i < rx_ring->count; i++) {
1916 buffer_info = &rx_ring->buffer_info[i];
1917 if(buffer_info->skb) {
2d7edb92
MC		 1918 ps_page = &rx_ring->ps_page[i];
1919 ps_page_dma = &rx_ring->ps_page_dma[i];
1da177e4
LT		 1920 pci_unmap_single(pdev,
1921 buffer_info->dma,
1922 buffer_info->length,
1923 PCI_DMA_FROMDEVICE);
1924
1925 dev_kfree_skb(buffer_info->skb);
1926 buffer_info->skb = NULL;
2d7edb92 1927
e4c811c9 1928 for(j = 0; j < adapter->rx_ps_pages; j++) {
2d7edb92
MC		 1929 if(!ps_page->ps_page[j]) break;
1930 pci_unmap_single(pdev,
1931 ps_page_dma->ps_page_dma[j],
1932 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1933 ps_page_dma->ps_page_dma[j] = 0;
1934 put_page(ps_page->ps_page[j]);
1935 ps_page->ps_page[j] = NULL;
1936 }
1da177e4
LT		 1937 }
1938 }
1939
1940 size = sizeof(struct e1000_buffer) * rx_ring->count;
1941 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 1942 size = sizeof(struct e1000_ps_page) * rx_ring->count;
1943 memset(rx_ring->ps_page, 0, size);
1944 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
1945 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 1946
1947 /* Zero out the descriptor ring */
1948
1949 memset(rx_ring->desc, 0, rx_ring->size);
1950
1951 rx_ring->next_to_clean = 0;
1952 rx_ring->next_to_use = 0;
1953
581d708e
MC		 1954 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
1955 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
1956}
1957
1958/**
1959 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
1960 * @adapter: board private structure
1961 **/
1962
1963static void
1964e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
1965{
1966 int i;
1967
1968 for (i = 0; i < adapter->num_queues; i++)
1969 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 1970}
1971
1972/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
1973 * and memory write and invalidate disabled for certain operations
1974 */
1975static void
1976e1000_enter_82542_rst(struct e1000_adapter *adapter)
1977{
1978 struct net_device *netdev = adapter->netdev;
1979 uint32_t rctl;
1980
1981 e1000_pci_clear_mwi(&adapter->hw);
1982
1983 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1984 rctl |= E1000_RCTL_RST;
1985 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1986 E1000_WRITE_FLUSH(&adapter->hw);
1987 mdelay(5);
1988
1989 if(netif_running(netdev))
581d708e 1990 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 1991}
1992
1993static void
1994e1000_leave_82542_rst(struct e1000_adapter *adapter)
1995{
1996 struct net_device *netdev = adapter->netdev;
1997 uint32_t rctl;
1998
1999 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2000 rctl &= ~E1000_RCTL_RST;
2001 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2002 E1000_WRITE_FLUSH(&adapter->hw);
2003 mdelay(5);
2004
2005 if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2006 e1000_pci_set_mwi(&adapter->hw);
2007
2008 if(netif_running(netdev)) {
2009 e1000_configure_rx(adapter);
581d708e 2010 e1000_alloc_rx_buffers(adapter, &adapter->rx_ring[0]);
1da177e4
LT		 2011 }
2012}
2013
2014/**
2015 * e1000_set_mac - Change the Ethernet Address of the NIC
2016 * @netdev: network interface device structure
2017 * @p: pointer to an address structure
2018 *
2019 * Returns 0 on success, negative on failure
2020 **/
2021
2022static int
2023e1000_set_mac(struct net_device *netdev, void *p)
2024{
60490fe0 2025 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2026 struct sockaddr *addr = p;
2027
2028 if(!is_valid_ether_addr(addr->sa_data))
2029 return -EADDRNOTAVAIL;
2030
2031 /* 82542 2.0 needs to be in reset to write receive address registers */
2032
2033 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2034 e1000_enter_82542_rst(adapter);
2035
2036 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2037 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2038
2039 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2040
868d5309
MC		 2041 /* With 82571 controllers, LAA may be overwritten (with the default)
2042 * due to controller reset from the other port. */
2043 if (adapter->hw.mac_type == e1000_82571) {
2044 /* activate the work around */
2045 adapter->hw.laa_is_present = 1;
2046
2047 /* Hold a copy of the LAA in RAR[14] This is done so that
2048 * between the time RAR[0] gets clobbered and the time it
2049 * gets fixed (in e1000_watchdog), the actual LAA is in one
2050 * of the RARs and no incoming packets directed to this port
2051 * are dropped. Eventaully the LAA will be in RAR[0] and
2052 * RAR[14] */
2053 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2054 E1000_RAR_ENTRIES - 1);
2055 }
2056
1da177e4
LT		 2057 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2058 e1000_leave_82542_rst(adapter);
2059
2060 return 0;
2061}
2062
2063/**
2064 * e1000_set_multi - Multicast and Promiscuous mode set
2065 * @netdev: network interface device structure
2066 *
2067 * The set_multi entry point is called whenever the multicast address
2068 * list or the network interface flags are updated. This routine is
2069 * responsible for configuring the hardware for proper multicast,
2070 * promiscuous mode, and all-multi behavior.
2071 **/
2072
2073static void
2074e1000_set_multi(struct net_device *netdev)
2075{
60490fe0 2076 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2077 struct e1000_hw *hw = &adapter->hw;
2078 struct dev_mc_list *mc_ptr;
2079 uint32_t rctl;
2080 uint32_t hash_value;
868d5309 2081 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2082
868d5309
MC		 2083 /* reserve RAR[14] for LAA over-write work-around */
2084 if (adapter->hw.mac_type == e1000_82571)
2085 rar_entries--;
1da177e4 2086
2648345f
MC		 2087 /* Check for Promiscuous and All Multicast modes */
2088
1da177e4
LT		 2089 rctl = E1000_READ_REG(hw, RCTL);
2090
2091 if(netdev->flags & IFF_PROMISC) {
2092 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2093 } else if(netdev->flags & IFF_ALLMULTI) {
2094 rctl |= E1000_RCTL_MPE;
2095 rctl &= ~E1000_RCTL_UPE;
2096 } else {
2097 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2098 }
2099
2100 E1000_WRITE_REG(hw, RCTL, rctl);
2101
2102 /* 82542 2.0 needs to be in reset to write receive address registers */
2103
2104 if(hw->mac_type == e1000_82542_rev2_0)
2105 e1000_enter_82542_rst(adapter);
2106
2107 /* load the first 14 multicast address into the exact filters 1-14
2108 * RAR 0 is used for the station MAC adddress
2109 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2110 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2111 */
2112 mc_ptr = netdev->mc_list;
2113
868d5309
MC		 2114 for(i = 1; i < rar_entries; i++) {
2115 if (mc_ptr) {
1da177e4
LT		 2116 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2117 mc_ptr = mc_ptr->next;
2118 } else {
2119 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2120 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2121 }
2122 }
2123
2124 /* clear the old settings from the multicast hash table */
2125
2126 for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
2127 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2128
2129 /* load any remaining addresses into the hash table */
2130
2131 for(; mc_ptr; mc_ptr = mc_ptr->next) {
2132 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2133 e1000_mta_set(hw, hash_value);
2134 }
2135
2136 if(hw->mac_type == e1000_82542_rev2_0)
2137 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2138}
2139
2140/* Need to wait a few seconds after link up to get diagnostic information from
2141 * the phy */
2142
2143static void
2144e1000_update_phy_info(unsigned long data)
2145{
2146 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2147 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2148}
2149
2150/**
2151 * e1000_82547_tx_fifo_stall - Timer Call-back
2152 * @data: pointer to adapter cast into an unsigned long
2153 **/
2154
2155static void
2156e1000_82547_tx_fifo_stall(unsigned long data)
2157{
2158 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2159 struct net_device *netdev = adapter->netdev;
2160 uint32_t tctl;
2161
2162 if(atomic_read(&adapter->tx_fifo_stall)) {
2163 if((E1000_READ_REG(&adapter->hw, TDT) ==
2164 E1000_READ_REG(&adapter->hw, TDH)) &&
2165 (E1000_READ_REG(&adapter->hw, TDFT) ==
2166 E1000_READ_REG(&adapter->hw, TDFH)) &&
2167 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2168 E1000_READ_REG(&adapter->hw, TDFHS))) {
2169 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2170 E1000_WRITE_REG(&adapter->hw, TCTL,
2171 tctl & ~E1000_TCTL_EN);
2172 E1000_WRITE_REG(&adapter->hw, TDFT,
2173 adapter->tx_head_addr);
2174 E1000_WRITE_REG(&adapter->hw, TDFH,
2175 adapter->tx_head_addr);
2176 E1000_WRITE_REG(&adapter->hw, TDFTS,
2177 adapter->tx_head_addr);
2178 E1000_WRITE_REG(&adapter->hw, TDFHS,
2179 adapter->tx_head_addr);
2180 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2181 E1000_WRITE_FLUSH(&adapter->hw);
2182
2183 adapter->tx_fifo_head = 0;
2184 atomic_set(&adapter->tx_fifo_stall, 0);
2185 netif_wake_queue(netdev);
2186 } else {
2187 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2188 }
2189 }
2190}
2191
2192/**
2193 * e1000_watchdog - Timer Call-back
2194 * @data: pointer to adapter cast into an unsigned long
2195 **/
2196static void
2197e1000_watchdog(unsigned long data)
2198{
2199 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2200
2201 /* Do the rest outside of interrupt context */
2202 schedule_work(&adapter->watchdog_task);
2203}
2204
2205static void
2206e1000_watchdog_task(struct e1000_adapter *adapter)
2207{
2208 struct net_device *netdev = adapter->netdev;
581d708e 2209 struct e1000_tx_ring *txdr = &adapter->tx_ring[0];
1da177e4
LT		 2210 uint32_t link;
2211
2212 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2213 if (adapter->hw.mac_type == e1000_82573) {
2214 e1000_enable_tx_pkt_filtering(&adapter->hw);
2215 if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2216 e1000_update_mng_vlan(adapter);
2217 }
1da177e4
LT		 2218
2219 if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2220 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2221 link = !adapter->hw.serdes_link_down;
2222 else
2223 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2224
2225 if(link) {
2226 if(!netif_carrier_ok(netdev)) {
2227 e1000_get_speed_and_duplex(&adapter->hw,
2228 &adapter->link_speed,
2229 &adapter->link_duplex);
2230
2231 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2232 adapter->link_speed,
2233 adapter->link_duplex == FULL_DUPLEX ?
2234 "Full Duplex" : "Half Duplex");
2235
2236 netif_carrier_on(netdev);
2237 netif_wake_queue(netdev);
2238 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2239 adapter->smartspeed = 0;
2240 }
2241 } else {
2242 if(netif_carrier_ok(netdev)) {
2243 adapter->link_speed = 0;
2244 adapter->link_duplex = 0;
2245 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2246 netif_carrier_off(netdev);
2247 netif_stop_queue(netdev);
2248 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2249 }
2250
2251 e1000_smartspeed(adapter);
2252 }
2253
2254 e1000_update_stats(adapter);
2255
2256 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2257 adapter->tpt_old = adapter->stats.tpt;
2258 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2259 adapter->colc_old = adapter->stats.colc;
2260
2261 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2262 adapter->gorcl_old = adapter->stats.gorcl;
2263 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2264 adapter->gotcl_old = adapter->stats.gotcl;
2265
2266 e1000_update_adaptive(&adapter->hw);
2267
581d708e
MC		 2268 if (adapter->num_queues == 1 && !netif_carrier_ok(netdev)) {
2269 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2270 /* We've lost link, so the controller stops DMA,
2271 * but we've got queued Tx work that's never going
2272 * to get done, so reset controller to flush Tx.
2273 * (Do the reset outside of interrupt context). */
2274 schedule_work(&adapter->tx_timeout_task);
2275 }
2276 }
2277
2278 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2279 if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2280 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2281 * asymmetrical Tx or Rx gets ITR=8000; everyone
2282 * else is between 2000-8000. */
2283 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2284 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2285 adapter->gotcl - adapter->gorcl :
2286 adapter->gorcl - adapter->gotcl) / 10000;
2287 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2288 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2289 }
2290
2291 /* Cause software interrupt to ensure rx ring is cleaned */
2292 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2293
2648345f 2294 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2295 adapter->detect_tx_hung = TRUE;
2296
868d5309
MC		 2297 /* With 82571 controllers, LAA may be overwritten due to controller
2298 * reset from the other port. Set the appropriate LAA in RAR[0] */
2299 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2300 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2301
1da177e4
LT		 2302 /* Reset the timer */
2303 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2304}
2305
2306#define E1000_TX_FLAGS_CSUM 0x00000001
2307#define E1000_TX_FLAGS_VLAN 0x00000002
2308#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2309#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2310#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2311#define E1000_TX_FLAGS_VLAN_SHIFT 16
2312
2313static inline int
581d708e
MC		 2314e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2315 struct sk_buff *skb)
1da177e4
LT		 2316{
2317#ifdef NETIF_F_TSO
2318 struct e1000_context_desc *context_desc;
2319 unsigned int i;
2320 uint32_t cmd_length = 0;
2d7edb92 2321 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2322 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2323 int err;
2324
2325 if(skb_shinfo(skb)->tso_size) {
2326 if (skb_header_cloned(skb)) {
2327 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2328 if (err)
2329 return err;
2330 }
2331
2332 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2333 mss = skb_shinfo(skb)->tso_size;
2d7edb92
MC		 2334 if(skb->protocol == ntohs(ETH_P_IP)) {
2335 skb->nh.iph->tot_len = 0;
2336 skb->nh.iph->check = 0;
2337 skb->h.th->check =
2338 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2339 skb->nh.iph->daddr,
2340 0,
2341 IPPROTO_TCP,
2342 0);
2343 cmd_length = E1000_TXD_CMD_IP;
2344 ipcse = skb->h.raw - skb->data - 1;
2345#ifdef NETIF_F_TSO_IPV6
2346 } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
2347 skb->nh.ipv6h->payload_len = 0;
2348 skb->h.th->check =
2349 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2350 &skb->nh.ipv6h->daddr,
2351 0,
2352 IPPROTO_TCP,
2353 0);
2354 ipcse = 0;
2355#endif
2356 }
1da177e4
LT		 2357 ipcss = skb->nh.raw - skb->data;
2358 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2359 tucss = skb->h.raw - skb->data;
2360 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2361 tucse = 0;
2362
2363 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2364 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2365
581d708e
MC		 2366 i = tx_ring->next_to_use;
2367 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2368
2369 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2370 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2371 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2372 context_desc->upper_setup.tcp_fields.tucss = tucss;
2373 context_desc->upper_setup.tcp_fields.tucso = tucso;
2374 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2375 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2376 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2377 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2378
581d708e
MC		 2379 if (++i == tx_ring->count) i = 0;
2380 tx_ring->next_to_use = i;
1da177e4
LT		 2381
2382 return 1;
2383 }
2384#endif
2385
2386 return 0;
2387}
2388
2389static inline boolean_t
581d708e
MC		 2390e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2391 struct sk_buff *skb)
1da177e4
LT		 2392{
2393 struct e1000_context_desc *context_desc;
2394 unsigned int i;
2395 uint8_t css;
2396
2397 if(likely(skb->ip_summed == CHECKSUM_HW)) {
2398 css = skb->h.raw - skb->data;
2399
581d708e
MC		 2400 i = tx_ring->next_to_use;
2401 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2402
2403 context_desc->upper_setup.tcp_fields.tucss = css;
2404 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2405 context_desc->upper_setup.tcp_fields.tucse = 0;
2406 context_desc->tcp_seg_setup.data = 0;
2407 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2408
581d708e
MC		 2409 if (unlikely(++i == tx_ring->count)) i = 0;
2410 tx_ring->next_to_use = i;
1da177e4
LT		 2411
2412 return TRUE;
2413 }
2414
2415 return FALSE;
2416}
2417
2418#define E1000_MAX_TXD_PWR 12
2419#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2420
2421static inline int
581d708e
MC		 2422e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2423 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2424 unsigned int nr_frags, unsigned int mss)
1da177e4 2425{
1da177e4
LT		 2426 struct e1000_buffer *buffer_info;
2427 unsigned int len = skb->len;
2428 unsigned int offset = 0, size, count = 0, i;
2429 unsigned int f;
2430 len -= skb->data_len;
2431
2432 i = tx_ring->next_to_use;
2433
2434 while(len) {
2435 buffer_info = &tx_ring->buffer_info[i];
2436 size = min(len, max_per_txd);
2437#ifdef NETIF_F_TSO
2438 /* Workaround for premature desc write-backs
2439 * in TSO mode. Append 4-byte sentinel desc */
2440 if(unlikely(mss && !nr_frags && size == len && size > 8))
2441 size -= 4;
2442#endif
97338bde
MC		 2443 /* work-around for errata 10 and it applies
2444 * to all controllers in PCI-X mode
2445 * The fix is to make sure that the first descriptor of a
2446 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2447 */
2448 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2449 (size > 2015) && count == 0))
2450 size = 2015;
2451
1da177e4
LT		 2452 /* Workaround for potential 82544 hang in PCI-X. Avoid
2453 * terminating buffers within evenly-aligned dwords. */
2454 if(unlikely(adapter->pcix_82544 &&
2455 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2456 size > 4))
2457 size -= 4;
2458
2459 buffer_info->length = size;
2460 buffer_info->dma =
2461 pci_map_single(adapter->pdev,
2462 skb->data + offset,
2463 size,
2464 PCI_DMA_TODEVICE);
2465 buffer_info->time_stamp = jiffies;
2466
2467 len -= size;
2468 offset += size;
2469 count++;
2470 if(unlikely(++i == tx_ring->count)) i = 0;
2471 }
2472
2473 for(f = 0; f < nr_frags; f++) {
2474 struct skb_frag_struct *frag;
2475
2476 frag = &skb_shinfo(skb)->frags[f];
2477 len = frag->size;
2478 offset = frag->page_offset;
2479
2480 while(len) {
2481 buffer_info = &tx_ring->buffer_info[i];
2482 size = min(len, max_per_txd);
2483#ifdef NETIF_F_TSO
2484 /* Workaround for premature desc write-backs
2485 * in TSO mode. Append 4-byte sentinel desc */
2486 if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2487 size -= 4;
2488#endif
2489 /* Workaround for potential 82544 hang in PCI-X.
2490 * Avoid terminating buffers within evenly-aligned
2491 * dwords. */
2492 if(unlikely(adapter->pcix_82544 &&
2493 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2494 size > 4))
2495 size -= 4;
2496
2497 buffer_info->length = size;
2498 buffer_info->dma =
2499 pci_map_page(adapter->pdev,
2500 frag->page,
2501 offset,
2502 size,
2503 PCI_DMA_TODEVICE);
2504 buffer_info->time_stamp = jiffies;
2505
2506 len -= size;
2507 offset += size;
2508 count++;
2509 if(unlikely(++i == tx_ring->count)) i = 0;
2510 }
2511 }
2512
2513 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2514 tx_ring->buffer_info[i].skb = skb;
2515 tx_ring->buffer_info[first].next_to_watch = i;
2516
2517 return count;
2518}
2519
2520static inline void
581d708e
MC		 2521e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2522 int tx_flags, int count)
1da177e4 2523{
1da177e4
LT		 2524 struct e1000_tx_desc *tx_desc = NULL;
2525 struct e1000_buffer *buffer_info;
2526 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2527 unsigned int i;
2528
2529 if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2530 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2531 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2532 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2533
2534 if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
2535 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2536 }
2537
2538 if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2539 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2540 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2541 }
2542
2543 if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2544 txd_lower |= E1000_TXD_CMD_VLE;
2545 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2546 }
2547
2548 i = tx_ring->next_to_use;
2549
2550 while(count--) {
2551 buffer_info = &tx_ring->buffer_info[i];
2552 tx_desc = E1000_TX_DESC(*tx_ring, i);
2553 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2554 tx_desc->lower.data =
2555 cpu_to_le32(txd_lower | buffer_info->length);
2556 tx_desc->upper.data = cpu_to_le32(txd_upper);
2557 if(unlikely(++i == tx_ring->count)) i = 0;
2558 }
2559
2560 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2561
2562 /* Force memory writes to complete before letting h/w
2563 * know there are new descriptors to fetch. (Only
2564 * applicable for weak-ordered memory model archs,
2565 * such as IA-64). */
2566 wmb();
2567
2568 tx_ring->next_to_use = i;
581d708e 2569 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2570}
2571
2572/**
2573 * 82547 workaround to avoid controller hang in half-duplex environment.
2574 * The workaround is to avoid queuing a large packet that would span
2575 * the internal Tx FIFO ring boundary by notifying the stack to resend
2576 * the packet at a later time. This gives the Tx FIFO an opportunity to
2577 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2578 * to the beginning of the Tx FIFO.
2579 **/
2580
2581#define E1000_FIFO_HDR 0x10
2582#define E1000_82547_PAD_LEN 0x3E0
2583
2584static inline int
2585e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2586{
2587 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2588 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2589
2590 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2591
2592 if(adapter->link_duplex != HALF_DUPLEX)
2593 goto no_fifo_stall_required;
2594
2595 if(atomic_read(&adapter->tx_fifo_stall))
2596 return 1;
2597
2598 if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2599 atomic_set(&adapter->tx_fifo_stall, 1);
2600 return 1;
2601 }
2602
2603no_fifo_stall_required:
2604 adapter->tx_fifo_head += skb_fifo_len;
2605 if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
2606 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2607 return 0;
2608}
2609
2d7edb92
MC		 2610#define MINIMUM_DHCP_PACKET_SIZE 282
2611static inline int
2612e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2613{
2614 struct e1000_hw *hw = &adapter->hw;
2615 uint16_t length, offset;
2616 if(vlan_tx_tag_present(skb)) {
2617 if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2618 ( adapter->hw.mng_cookie.status &
2619 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2620 return 0;
2621 }
2622 if(htons(ETH_P_IP) == skb->protocol) {
2623 const struct iphdr *ip = skb->nh.iph;
2624 if(IPPROTO_UDP == ip->protocol) {
2625 struct udphdr *udp = (struct udphdr *)(skb->h.uh);
2626 if(ntohs(udp->dest) == 67) {
2627 offset = (uint8_t *)udp + 8 - skb->data;
2628 length = skb->len - offset;
2629
2630 return e1000_mng_write_dhcp_info(hw,
2631 (uint8_t *)udp + 8, length);
2632 }
2633 }
2634 } else if((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
2635 struct ethhdr *eth = (struct ethhdr *) skb->data;
2636 if((htons(ETH_P_IP) == eth->h_proto)) {
2637 const struct iphdr *ip =
2638 (struct iphdr *)((uint8_t *)skb->data+14);
2639 if(IPPROTO_UDP == ip->protocol) {
2640 struct udphdr *udp =
2641 (struct udphdr *)((uint8_t *)ip +
2642 (ip->ihl << 2));
2643 if(ntohs(udp->dest) == 67) {
2644 offset = (uint8_t *)udp + 8 - skb->data;
2645 length = skb->len - offset;
2646
2647 return e1000_mng_write_dhcp_info(hw,
2648 (uint8_t *)udp + 8,
2649 length);
2650 }
2651 }
2652 }
2653 }
2654 return 0;
2655}
2656
1da177e4
LT		 2657#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2658static int
2659e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2660{
60490fe0 2661 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2662 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2663 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2664 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2665 unsigned int tx_flags = 0;
2666 unsigned int len = skb->len;
2667 unsigned long flags;
2668 unsigned int nr_frags = 0;
2669 unsigned int mss = 0;
2670 int count = 0;
2671 int tso;
2672 unsigned int f;
2673 len -= skb->data_len;
2674
24025e4e
MC		 2675#ifdef CONFIG_E1000_MQ
2676 tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2677#else
581d708e 2678 tx_ring = adapter->tx_ring;
24025e4e
MC		 2679#endif
2680
581d708e 2681 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2682 dev_kfree_skb_any(skb);
2683 return NETDEV_TX_OK;
2684 }
2685
2686#ifdef NETIF_F_TSO
2687 mss = skb_shinfo(skb)->tso_size;
2648345f 2688 /* The controller does a simple calculation to
1da177e4
LT		 2689 * make sure there is enough room in the FIFO before
2690 * initiating the DMA for each buffer. The calc is:
2691 * 4 = ceil(buffer len/mss). To make sure we don't
2692 * overrun the FIFO, adjust the max buffer len if mss
2693 * drops. */
2694 if(mss) {
2695 max_per_txd = min(mss << 2, max_per_txd);
2696 max_txd_pwr = fls(max_per_txd) - 1;
2697 }
2698
2699 if((mss) || (skb->ip_summed == CHECKSUM_HW))
2700 count++;
2648345f 2701 count++;
1da177e4
LT		 2702#else
2703 if(skb->ip_summed == CHECKSUM_HW)
2704 count++;
2705#endif
2706 count += TXD_USE_COUNT(len, max_txd_pwr);
2707
2708 if(adapter->pcix_82544)
2709 count++;
2710
97338bde
MC		 2711 /* work-around for errata 10 and it applies to all controllers
2712 * in PCI-X mode, so add one more descriptor to the count
2713 */
2714 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2715 (len > 2015)))
2716 count++;
2717
1da177e4
LT		 2718 nr_frags = skb_shinfo(skb)->nr_frags;
2719 for(f = 0; f < nr_frags; f++)
2720 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2721 max_txd_pwr);
2722 if(adapter->pcix_82544)
2723 count += nr_frags;
2724
868d5309
MC		 2725#ifdef NETIF_F_TSO
2726 /* TSO Workaround for 82571/2 Controllers -- if skb->data
2727 * points to just header, pull a few bytes of payload from
2728 * frags into skb->data */
2729 if (skb_shinfo(skb)->tso_size) {
2730 uint8_t hdr_len;
2731 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2732 if (skb->data_len && (hdr_len < (skb->len - skb->data_len)) &&
2733 (adapter->hw.mac_type == e1000_82571 ||
2734 adapter->hw.mac_type == e1000_82572)) {
2735 unsigned int pull_size;
2736 pull_size = min((unsigned int)4, skb->data_len);
2737 if (!__pskb_pull_tail(skb, pull_size)) {
2738 printk(KERN_ERR "__pskb_pull_tail failed.\n");
2739 dev_kfree_skb_any(skb);
2740 return -EFAULT;
2741 }
2742 }
2743 }
2744#endif
2745
2d7edb92
MC		 2746 if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2747 e1000_transfer_dhcp_info(adapter, skb);
2748
581d708e
MC		 2749 local_irq_save(flags);
2750 if (!spin_trylock(&tx_ring->tx_lock)) {
2751 /* Collision - tell upper layer to requeue */
2752 local_irq_restore(flags);
2753 return NETDEV_TX_LOCKED;
2754 }
1da177e4
LT		 2755
2756 /* need: count + 2 desc gap to keep tail from touching
2757 * head, otherwise try next time */
581d708e 2758 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2759 netif_stop_queue(netdev);
581d708e 2760 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2761 return NETDEV_TX_BUSY;
2762 }
2763
2764 if(unlikely(adapter->hw.mac_type == e1000_82547)) {
2765 if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
2766 netif_stop_queue(netdev);
2767 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2768 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2769 return NETDEV_TX_BUSY;
2770 }
2771 }
2772
2773 if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2774 tx_flags |= E1000_TX_FLAGS_VLAN;
2775 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2776 }
2777
581d708e 2778 first = tx_ring->next_to_use;
1da177e4 2779
581d708e 2780 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2781 if (tso < 0) {
2782 dev_kfree_skb_any(skb);
581d708e 2783 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2784 return NETDEV_TX_OK;
2785 }
2786
2787 if (likely(tso))
2788 tx_flags |= E1000_TX_FLAGS_TSO;
581d708e 2789 else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 2790 tx_flags |= E1000_TX_FLAGS_CSUM;
2791
2d7edb92 2792 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 2793 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 2794 * no longer assume, we must. */
581d708e 2795 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2d7edb92
MC		 2796 tx_flags |= E1000_TX_FLAGS_IPV4;
2797
581d708e
MC		 2798 e1000_tx_queue(adapter, tx_ring, tx_flags,
2799 e1000_tx_map(adapter, tx_ring, skb, first,
2800 max_per_txd, nr_frags, mss));
1da177e4
LT		 2801
2802 netdev->trans_start = jiffies;
2803
2804 /* Make sure there is space in the ring for the next send. */
581d708e 2805 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 2806 netif_stop_queue(netdev);
2807
581d708e 2808 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2809 return NETDEV_TX_OK;
2810}
2811
2812/**
2813 * e1000_tx_timeout - Respond to a Tx Hang
2814 * @netdev: network interface device structure
2815 **/
2816
2817static void
2818e1000_tx_timeout(struct net_device *netdev)
2819{
60490fe0 2820 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2821
2822 /* Do the reset outside of interrupt context */
2823 schedule_work(&adapter->tx_timeout_task);
2824}
2825
2826static void
2827e1000_tx_timeout_task(struct net_device *netdev)
2828{
60490fe0 2829 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2830
2831 e1000_down(adapter);
2832 e1000_up(adapter);
2833}
2834
2835/**
2836 * e1000_get_stats - Get System Network Statistics
2837 * @netdev: network interface device structure
2838 *
2839 * Returns the address of the device statistics structure.
2840 * The statistics are actually updated from the timer callback.
2841 **/
2842
2843static struct net_device_stats *
2844e1000_get_stats(struct net_device *netdev)
2845{
60490fe0 2846 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2847
2848 e1000_update_stats(adapter);
2849 return &adapter->net_stats;
2850}
2851
2852/**
2853 * e1000_change_mtu - Change the Maximum Transfer Unit
2854 * @netdev: network interface device structure
2855 * @new_mtu: new value for maximum frame size
2856 *
2857 * Returns 0 on success, negative on failure
2858 **/
2859
2860static int
2861e1000_change_mtu(struct net_device *netdev, int new_mtu)
2862{
60490fe0 2863 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2864 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
2865
2866 if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
2867 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2868 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
2869 return -EINVAL;
2870 }
2871
868d5309 2872#define MAX_STD_JUMBO_FRAME_SIZE 9234
2d7edb92 2873 /* might want this to be bigger enum check... */
868d5309
MC		 2874 /* 82571 controllers limit jumbo frame size to 10500 bytes */
2875 if ((adapter->hw.mac_type == e1000_82571 ||
2876 adapter->hw.mac_type == e1000_82572) &&
2877 max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2878 DPRINTK(PROBE, ERR, "MTU > 9216 bytes not supported "
2879 "on 82571 and 82572 controllers.\n");
2880 return -EINVAL;
2881 }
2882
2883 if(adapter->hw.mac_type == e1000_82573 &&
2d7edb92
MC		 2884 max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
2885 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
2886 "on 82573\n");
1da177e4 2887 return -EINVAL;
2d7edb92 2888 }
1da177e4 2889
2d7edb92
MC		 2890 if(adapter->hw.mac_type > e1000_82547_rev_2) {
2891 adapter->rx_buffer_len = max_frame;
2892 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
1da177e4 2893 } else {
2d7edb92
MC		 2894 if(unlikely((adapter->hw.mac_type < e1000_82543) &&
2895 (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
2896 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
2897 "on 82542\n");
2898 return -EINVAL;
2899
2900 } else {
2901 if(max_frame <= E1000_RXBUFFER_2048) {
2902 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2903 } else if(max_frame <= E1000_RXBUFFER_4096) {
2904 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
2905 } else if(max_frame <= E1000_RXBUFFER_8192) {
2906 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
2907 } else if(max_frame <= E1000_RXBUFFER_16384) {
2908 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
2909 }
2910 }
1da177e4
LT		 2911 }
2912
2d7edb92
MC		 2913 netdev->mtu = new_mtu;
2914
2915 if(netif_running(netdev)) {
1da177e4
LT		 2916 e1000_down(adapter);
2917 e1000_up(adapter);
2918 }
2919
1da177e4
LT		 2920 adapter->hw.max_frame_size = max_frame;
2921
2922 return 0;
2923}
2924
2925/**
2926 * e1000_update_stats - Update the board statistics counters
2927 * @adapter: board private structure
2928 **/
2929
2930void
2931e1000_update_stats(struct e1000_adapter *adapter)
2932{
2933 struct e1000_hw *hw = &adapter->hw;
2934 unsigned long flags;
2935 uint16_t phy_tmp;
2936
2937#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2938
2939 spin_lock_irqsave(&adapter->stats_lock, flags);
2940
2941 /* these counters are modified from e1000_adjust_tbi_stats,
2942 * called from the interrupt context, so they must only
2943 * be written while holding adapter->stats_lock
2944 */
2945
2946 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
2947 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
2948 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
2949 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
2950 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
2951 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
2952 adapter->stats.roc += E1000_READ_REG(hw, ROC);
2953 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
2954 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
2955 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
2956 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
2957 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
2958 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
2959
2960 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
2961 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
2962 adapter->stats.scc += E1000_READ_REG(hw, SCC);
2963 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
2964 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
2965 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
2966 adapter->stats.dc += E1000_READ_REG(hw, DC);
2967 adapter->stats.sec += E1000_READ_REG(hw, SEC);
2968 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
2969 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
2970 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
2971 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
2972 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
2973 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
2974 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
2975 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
2976 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
2977 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
2978 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
2979 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
2980 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
2981 adapter->stats.torl += E1000_READ_REG(hw, TORL);
2982 adapter->stats.torh += E1000_READ_REG(hw, TORH);
2983 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
2984 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
2985 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
2986 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
2987 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
2988 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
2989 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
2990 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
2991 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
2992 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
2993 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
2994
2995 /* used for adaptive IFS */
2996
2997 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
2998 adapter->stats.tpt += hw->tx_packet_delta;
2999 hw->collision_delta = E1000_READ_REG(hw, COLC);
3000 adapter->stats.colc += hw->collision_delta;
3001
3002 if(hw->mac_type >= e1000_82543) {
3003 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3004 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3005 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3006 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3007 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3008 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3009 }
2d7edb92
MC		 3010 if(hw->mac_type > e1000_82547_rev_2) {
3011 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3012 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3013 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3014 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3015 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3016 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3017 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3018 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3019 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3020 }
1da177e4
LT		 3021
3022 /* Fill out the OS statistics structure */
3023
3024 adapter->net_stats.rx_packets = adapter->stats.gprc;
3025 adapter->net_stats.tx_packets = adapter->stats.gptc;
3026 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3027 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3028 adapter->net_stats.multicast = adapter->stats.mprc;
3029 adapter->net_stats.collisions = adapter->stats.colc;
3030
3031 /* Rx Errors */
3032
3033 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3034 adapter->stats.crcerrs + adapter->stats.algnerrc +
6d915757
MC		 3035 adapter->stats.rlec + adapter->stats.mpc +
3036 adapter->stats.cexterr;
1da177e4
LT		 3037 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3038 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3039 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3040 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
3041 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3042
3043 /* Tx Errors */
3044
3045 adapter->net_stats.tx_errors = adapter->stats.ecol +
3046 adapter->stats.latecol;
3047 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3048 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3049 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3050
3051 /* Tx Dropped needs to be maintained elsewhere */
3052
3053 /* Phy Stats */
3054
3055 if(hw->media_type == e1000_media_type_copper) {
3056 if((adapter->link_speed == SPEED_1000) &&
3057 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3058 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3059 adapter->phy_stats.idle_errors += phy_tmp;
3060 }
3061
3062 if((hw->mac_type <= e1000_82546) &&
3063 (hw->phy_type == e1000_phy_m88) &&
3064 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3065 adapter->phy_stats.receive_errors += phy_tmp;
3066 }
3067
3068 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3069}
3070
24025e4e
MC		 3071#ifdef CONFIG_E1000_MQ
3072void
3073e1000_rx_schedule(void *data)
3074{
3075 struct net_device *poll_dev, *netdev = data;
3076 struct e1000_adapter *adapter = netdev->priv;
3077 int this_cpu = get_cpu();
3078
3079 poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
3080 if (poll_dev == NULL) {
3081 put_cpu();
3082 return;
3083 }
3084
3085 if (likely(netif_rx_schedule_prep(poll_dev)))
3086 __netif_rx_schedule(poll_dev);
3087 else
3088 e1000_irq_enable(adapter);
3089
3090 put_cpu();
3091}
3092#endif
3093
1da177e4
LT		 3094/**
3095 * e1000_intr - Interrupt Handler
3096 * @irq: interrupt number
3097 * @data: pointer to a network interface device structure
3098 * @pt_regs: CPU registers structure
3099 **/
3100
3101static irqreturn_t
3102e1000_intr(int irq, void *data, struct pt_regs *regs)
3103{
3104 struct net_device *netdev = data;
60490fe0 3105 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3106 struct e1000_hw *hw = &adapter->hw;
3107 uint32_t icr = E1000_READ_REG(hw, ICR);
166d823d 3108#if defined(CONFIG_E1000_NAPI) && defined(CONFIG_E1000_MQ) || !defined(CONFIG_E1000_NAPI)
581d708e 3109 int i;
be2b28ed 3110#endif
1da177e4
LT		 3111
3112 if(unlikely(!icr))
3113 return IRQ_NONE; /* Not our interrupt */
3114
3115 if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3116 hw->get_link_status = 1;
3117 mod_timer(&adapter->watchdog_timer, jiffies);
3118 }
3119
3120#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3121 atomic_inc(&adapter->irq_sem);
3122 E1000_WRITE_REG(hw, IMC, ~0);
3123 E1000_WRITE_FLUSH(hw);
24025e4e
MC		 3124#ifdef CONFIG_E1000_MQ
3125 if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
3126 cpu_set(adapter->cpu_for_queue[0],
3127 adapter->rx_sched_call_data.cpumask);
3128 for (i = 1; i < adapter->num_queues; i++) {
3129 cpu_set(adapter->cpu_for_queue[i],
3130 adapter->rx_sched_call_data.cpumask);
3131 atomic_inc(&adapter->irq_sem);
3132 }
3133 atomic_set(&adapter->rx_sched_call_data.count, i);
3134 smp_call_async_mask(&adapter->rx_sched_call_data);
3135 } else {
3136 printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
1da177e4 3137 }
be2b28ed 3138#else /* if !CONFIG_E1000_MQ */
581d708e
MC		 3139 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3140 __netif_rx_schedule(&adapter->polling_netdev[0]);
3141 else
3142 e1000_irq_enable(adapter);
be2b28ed
JG		 3143#endif /* CONFIG_E1000_MQ */
3144
3145#else /* if !CONFIG_E1000_NAPI */
1da177e4
LT		 3146 /* Writing IMC and IMS is needed for 82547.
3147 Due to Hub Link bus being occupied, an interrupt
3148 de-assertion message is not able to be sent.
3149 When an interrupt assertion message is generated later,
3150 two messages are re-ordered and sent out.
3151 That causes APIC to think 82547 is in de-assertion
3152 state, while 82547 is in assertion state, resulting
3153 in dead lock. Writing IMC forces 82547 into
3154 de-assertion state.
3155 */
3156 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
3157 atomic_inc(&adapter->irq_sem);
2648345f 3158 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3159 }
3160
3161 for(i = 0; i < E1000_MAX_INTR; i++)
581d708e
MC		 3162 if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3163 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3164 break;
3165
3166 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3167 e1000_irq_enable(adapter);
581d708e 3168
be2b28ed 3169#endif /* CONFIG_E1000_NAPI */
1da177e4
LT		 3170
3171 return IRQ_HANDLED;
3172}
3173
3174#ifdef CONFIG_E1000_NAPI
3175/**
3176 * e1000_clean - NAPI Rx polling callback
3177 * @adapter: board private structure
3178 **/
3179
3180static int
581d708e 3181e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3182{
581d708e
MC		 3183 struct e1000_adapter *adapter;
3184 int work_to_do = min(*budget, poll_dev->quota);
3185 int tx_cleaned, i = 0, work_done = 0;
3186
3187 /* Must NOT use netdev_priv macro here. */
3188 adapter = poll_dev->priv;
3189
3190 /* Keep link state information with original netdev */
3191 if (!netif_carrier_ok(adapter->netdev))
3192 goto quit_polling;
2648345f 3193
581d708e
MC		 3194 while (poll_dev != &adapter->polling_netdev[i]) {
3195 i++;
3196 if (unlikely(i == adapter->num_queues))
3197 BUG();
3198 }
3199
3200 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3201 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3202 &work_done, work_to_do);
1da177e4
LT		 3203
3204 *budget -= work_done;
581d708e 3205 poll_dev->quota -= work_done;
1da177e4 3206
2b02893e 3207 /* If no Tx and not enough Rx work done, exit the polling mode */
581d708e
MC		 3208 if((!tx_cleaned && (work_done == 0)) ||
3209 !netif_running(adapter->netdev)) {
3210quit_polling:
3211 netif_rx_complete(poll_dev);
1da177e4
LT		 3212 e1000_irq_enable(adapter);
3213 return 0;
3214 }
3215
3216 return 1;
3217}
3218
3219#endif
3220/**
3221 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3222 * @adapter: board private structure
3223 **/
3224
3225static boolean_t
581d708e
MC		 3226e1000_clean_tx_irq(struct e1000_adapter *adapter,
3227 struct e1000_tx_ring *tx_ring)
1da177e4 3228{
1da177e4
LT		 3229 struct net_device *netdev = adapter->netdev;
3230 struct e1000_tx_desc *tx_desc, *eop_desc;
3231 struct e1000_buffer *buffer_info;
3232 unsigned int i, eop;
3233 boolean_t cleaned = FALSE;
3234
3235 i = tx_ring->next_to_clean;
3236 eop = tx_ring->buffer_info[i].next_to_watch;
3237 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3238
581d708e 3239 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
2701234f
MC		 3240 /* Premature writeback of Tx descriptors clear (free buffers
3241 * and unmap pci_mapping) previous_buffer_info */
581d708e 3242 if (likely(tx_ring->previous_buffer_info.skb != NULL)) {
2701234f 3243 e1000_unmap_and_free_tx_resource(adapter,
581d708e 3244 &tx_ring->previous_buffer_info);
1da177e4
LT		 3245 }
3246
3247 for(cleaned = FALSE; !cleaned; ) {
3248 tx_desc = E1000_TX_DESC(*tx_ring, i);
3249 buffer_info = &tx_ring->buffer_info[i];
3250 cleaned = (i == eop);
3251
2701234f
MC		 3252#ifdef NETIF_F_TSO
3253 if (!(netdev->features & NETIF_F_TSO)) {
3254#endif
3255 e1000_unmap_and_free_tx_resource(adapter,
3256 buffer_info);
3257#ifdef NETIF_F_TSO
1da177e4 3258 } else {
2701234f 3259 if (cleaned) {
581d708e 3260 memcpy(&tx_ring->previous_buffer_info,
2701234f
MC		 3261 buffer_info,
3262 sizeof(struct e1000_buffer));
3263 memset(buffer_info, 0,
3264 sizeof(struct e1000_buffer));
3265 } else {
3266 e1000_unmap_and_free_tx_resource(
3267 adapter, buffer_info);
3268 }
1da177e4 3269 }
2701234f 3270#endif
1da177e4
LT		 3271
3272 tx_desc->buffer_addr = 0;
3273 tx_desc->lower.data = 0;
3274 tx_desc->upper.data = 0;
3275
1da177e4
LT		 3276 if(unlikely(++i == tx_ring->count)) i = 0;
3277 }
581d708e
MC		 3278
3279 tx_ring->pkt++;
1da177e4
LT		 3280
3281 eop = tx_ring->buffer_info[i].next_to_watch;
3282 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3283 }
3284
3285 tx_ring->next_to_clean = i;
3286
581d708e 3287 spin_lock(&tx_ring->tx_lock);
1da177e4
LT		 3288
3289 if(unlikely(cleaned && netif_queue_stopped(netdev) &&
3290 netif_carrier_ok(netdev)))
3291 netif_wake_queue(netdev);
3292
581d708e 3293 spin_unlock(&tx_ring->tx_lock);
2648345f 3294
581d708e 3295 if (adapter->detect_tx_hung) {
2648345f 3296 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3297 * check with the clearing of time_stamp and movement of i */
3298 adapter->detect_tx_hung = FALSE;
70b8f1e1
MC		 3299 if (tx_ring->buffer_info[i].dma &&
3300 time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
3301 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3302 E1000_STATUS_TXOFF)) {
3303
3304 /* detected Tx unit hang */
3305 i = tx_ring->next_to_clean;
3306 eop = tx_ring->buffer_info[i].next_to_watch;
3307 eop_desc = E1000_TX_DESC(*tx_ring, eop);
c6963ef5 3308 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
70b8f1e1
MC		 3309 " TDH <%x>\n"
3310 " TDT <%x>\n"
3311 " next_to_use <%x>\n"
3312 " next_to_clean <%x>\n"
3313 "buffer_info[next_to_clean]\n"
b4ee21f4 3314 " dma <%llx>\n"
70b8f1e1
MC		 3315 " time_stamp <%lx>\n"
3316 " next_to_watch <%x>\n"
3317 " jiffies <%lx>\n"
3318 " next_to_watch.status <%x>\n",
581d708e
MC		 3319 readl(adapter->hw.hw_addr + tx_ring->tdh),
3320 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1
MC		 3321 tx_ring->next_to_use,
3322 i,
b4ee21f4 3323 (unsigned long long)tx_ring->buffer_info[i].dma,
70b8f1e1
MC		 3324 tx_ring->buffer_info[i].time_stamp,
3325 eop,
3326 jiffies,
3327 eop_desc->upper.fields.status);
1da177e4 3328 netif_stop_queue(netdev);
70b8f1e1 3329 }
1da177e4 3330 }
2701234f 3331#ifdef NETIF_F_TSO
581d708e
MC		 3332 if (unlikely(!(eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3333 time_after(jiffies, tx_ring->previous_buffer_info.time_stamp + HZ)))
2701234f 3334 e1000_unmap_and_free_tx_resource(
581d708e 3335 adapter, &tx_ring->previous_buffer_info);
2701234f 3336#endif
1da177e4
LT		 3337 return cleaned;
3338}
3339
3340/**
3341 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3342 * @adapter: board private structure
3343 * @status_err: receive descriptor status and error fields
3344 * @csum: receive descriptor csum field
3345 * @sk_buff: socket buffer with received data
1da177e4
LT		 3346 **/
3347
3348static inline void
3349e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3350 uint32_t status_err, uint32_t csum,
3351 struct sk_buff *skb)
1da177e4 3352{
2d7edb92
MC		 3353 uint16_t status = (uint16_t)status_err;
3354 uint8_t errors = (uint8_t)(status_err >> 24);
3355 skb->ip_summed = CHECKSUM_NONE;
3356
1da177e4 3357 /* 82543 or newer only */
2d7edb92 3358 if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3359 /* Ignore Checksum bit is set */
2d7edb92
MC		 3360 if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
3361 /* TCP/UDP checksum error bit is set */
3362 if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3363 /* let the stack verify checksum errors */
1da177e4 3364 adapter->hw_csum_err++;
2d7edb92
MC		 3365 return;
3366 }
3367 /* TCP/UDP Checksum has not been calculated */
3368 if(adapter->hw.mac_type <= e1000_82547_rev_2) {
3369 if(!(status & E1000_RXD_STAT_TCPCS))
3370 return;
1da177e4 3371 } else {
2d7edb92
MC		 3372 if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3373 return;
3374 }
3375 /* It must be a TCP or UDP packet with a valid checksum */
3376 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3377 /* TCP checksum is good */
3378 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3379 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3380 /* IP fragment with UDP payload */
3381 /* Hardware complements the payload checksum, so we undo it
3382 * and then put the value in host order for further stack use.
3383 */
3384 csum = ntohl(csum ^ 0xFFFF);
3385 skb->csum = csum;
3386 skb->ip_summed = CHECKSUM_HW;
1da177e4 3387 }
2d7edb92 3388 adapter->hw_csum_good++;
1da177e4
LT		 3389}
3390
3391/**
2d7edb92 3392 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3393 * @adapter: board private structure
3394 **/
3395
3396static boolean_t
3397#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3398e1000_clean_rx_irq(struct e1000_adapter *adapter,
3399 struct e1000_rx_ring *rx_ring,
3400 int *work_done, int work_to_do)
1da177e4 3401#else
581d708e
MC		 3402e1000_clean_rx_irq(struct e1000_adapter *adapter,
3403 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3404#endif
3405{
1da177e4
LT		 3406 struct net_device *netdev = adapter->netdev;
3407 struct pci_dev *pdev = adapter->pdev;
3408 struct e1000_rx_desc *rx_desc;
3409 struct e1000_buffer *buffer_info;
3410 struct sk_buff *skb;
3411 unsigned long flags;
3412 uint32_t length;
3413 uint8_t last_byte;
3414 unsigned int i;
3415 boolean_t cleaned = FALSE;
3416
3417 i = rx_ring->next_to_clean;
3418 rx_desc = E1000_RX_DESC(*rx_ring, i);
3419
3420 while(rx_desc->status & E1000_RXD_STAT_DD) {
3421 buffer_info = &rx_ring->buffer_info[i];
3422#ifdef CONFIG_E1000_NAPI
3423 if(*work_done >= work_to_do)
3424 break;
3425 (*work_done)++;
3426#endif
3427 cleaned = TRUE;
3428
3429 pci_unmap_single(pdev,
3430 buffer_info->dma,
3431 buffer_info->length,
3432 PCI_DMA_FROMDEVICE);
3433
3434 skb = buffer_info->skb;
3435 length = le16_to_cpu(rx_desc->length);
3436
3437 if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
3438 /* All receives must fit into a single buffer */
3439 E1000_DBG("%s: Receive packet consumed multiple"
2648345f 3440 " buffers\n", netdev->name);
1da177e4
LT		 3441 dev_kfree_skb_irq(skb);
3442 goto next_desc;
3443 }
3444
3445 if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3446 last_byte = *(skb->data + length - 1);
3447 if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
3448 rx_desc->errors, length, last_byte)) {
3449 spin_lock_irqsave(&adapter->stats_lock, flags);
3450 e1000_tbi_adjust_stats(&adapter->hw,
3451 &adapter->stats,
3452 length, skb->data);
3453 spin_unlock_irqrestore(&adapter->stats_lock,
3454 flags);
3455 length--;
3456 } else {
3457 dev_kfree_skb_irq(skb);
3458 goto next_desc;
3459 }
3460 }
3461
3462 /* Good Receive */
3463 skb_put(skb, length - ETHERNET_FCS_SIZE);
3464
3465 /* Receive Checksum Offload */
2d7edb92
MC		 3466 e1000_rx_checksum(adapter,
3467 (uint32_t)(rx_desc->status) |
3468 ((uint32_t)(rx_desc->errors) << 24),
3469 rx_desc->csum, skb);
1da177e4
LT		 3470 skb->protocol = eth_type_trans(skb, netdev);
3471#ifdef CONFIG_E1000_NAPI
3472 if(unlikely(adapter->vlgrp &&
3473 (rx_desc->status & E1000_RXD_STAT_VP))) {
3474 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3475 le16_to_cpu(rx_desc->special) &
3476 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3477 } else {
3478 netif_receive_skb(skb);
3479 }
3480#else /* CONFIG_E1000_NAPI */
3481 if(unlikely(adapter->vlgrp &&
3482 (rx_desc->status & E1000_RXD_STAT_VP))) {
3483 vlan_hwaccel_rx(skb, adapter->vlgrp,
3484 le16_to_cpu(rx_desc->special) &
3485 E1000_RXD_SPC_VLAN_MASK);
3486 } else {
3487 netif_rx(skb);
3488 }
3489#endif /* CONFIG_E1000_NAPI */
3490 netdev->last_rx = jiffies;
581d708e 3491 rx_ring->pkt++;
1da177e4
LT		 3492
3493next_desc:
3494 rx_desc->status = 0;
3495 buffer_info->skb = NULL;
3496 if(unlikely(++i == rx_ring->count)) i = 0;
3497
3498 rx_desc = E1000_RX_DESC(*rx_ring, i);
3499 }
1da177e4 3500 rx_ring->next_to_clean = i;
581d708e 3501 adapter->alloc_rx_buf(adapter, rx_ring);
2d7edb92
MC		 3502
3503 return cleaned;
3504}
3505
3506/**
3507 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3508 * @adapter: board private structure
3509 **/
3510
3511static boolean_t
3512#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3513e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3514 struct e1000_rx_ring *rx_ring,
3515 int *work_done, int work_to_do)
2d7edb92 3516#else
581d708e
MC		 3517e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3518 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3519#endif
3520{
2d7edb92
MC		 3521 union e1000_rx_desc_packet_split *rx_desc;
3522 struct net_device *netdev = adapter->netdev;
3523 struct pci_dev *pdev = adapter->pdev;
3524 struct e1000_buffer *buffer_info;
3525 struct e1000_ps_page *ps_page;
3526 struct e1000_ps_page_dma *ps_page_dma;
3527 struct sk_buff *skb;
3528 unsigned int i, j;
3529 uint32_t length, staterr;
3530 boolean_t cleaned = FALSE;
3531
3532 i = rx_ring->next_to_clean;
3533 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3534 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3535
3536 while(staterr & E1000_RXD_STAT_DD) {
3537 buffer_info = &rx_ring->buffer_info[i];
3538 ps_page = &rx_ring->ps_page[i];
3539 ps_page_dma = &rx_ring->ps_page_dma[i];
3540#ifdef CONFIG_E1000_NAPI
3541 if(unlikely(*work_done >= work_to_do))
3542 break;
3543 (*work_done)++;
3544#endif
3545 cleaned = TRUE;
3546 pci_unmap_single(pdev, buffer_info->dma,
3547 buffer_info->length,
3548 PCI_DMA_FROMDEVICE);
3549
3550 skb = buffer_info->skb;
3551
3552 if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3553 E1000_DBG("%s: Packet Split buffers didn't pick up"
3554 " the full packet\n", netdev->name);
3555 dev_kfree_skb_irq(skb);
3556 goto next_desc;
3557 }
1da177e4 3558
2d7edb92
MC		 3559 if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3560 dev_kfree_skb_irq(skb);
3561 goto next_desc;
3562 }
3563
3564 length = le16_to_cpu(rx_desc->wb.middle.length0);
3565
3566 if(unlikely(!length)) {
3567 E1000_DBG("%s: Last part of the packet spanning"
3568 " multiple descriptors\n", netdev->name);
3569 dev_kfree_skb_irq(skb);
3570 goto next_desc;
3571 }
3572
3573 /* Good Receive */
3574 skb_put(skb, length);
3575
e4c811c9 3576 for(j = 0; j < adapter->rx_ps_pages; j++) {
2d7edb92
MC		 3577 if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
3578 break;
3579
3580 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3581 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3582 ps_page_dma->ps_page_dma[j] = 0;
3583 skb_shinfo(skb)->frags[j].page =
3584 ps_page->ps_page[j];
3585 ps_page->ps_page[j] = NULL;
3586 skb_shinfo(skb)->frags[j].page_offset = 0;
3587 skb_shinfo(skb)->frags[j].size = length;
3588 skb_shinfo(skb)->nr_frags++;
3589 skb->len += length;
3590 skb->data_len += length;
3591 }
3592
3593 e1000_rx_checksum(adapter, staterr,
3594 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3595 skb->protocol = eth_type_trans(skb, netdev);
3596
2d7edb92 3597 if(likely(rx_desc->wb.upper.header_status &
e4c811c9
MC		 3598 E1000_RXDPS_HDRSTAT_HDRSP)) {
3599 adapter->rx_hdr_split++;
3600#ifdef HAVE_RX_ZERO_COPY
2d7edb92
MC		 3601 skb_shinfo(skb)->zero_copy = TRUE;
3602#endif
e4c811c9 3603 }
2d7edb92
MC		 3604#ifdef CONFIG_E1000_NAPI
3605 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3606 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3607 le16_to_cpu(rx_desc->wb.middle.vlan) &
3608 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3609 } else {
3610 netif_receive_skb(skb);
3611 }
3612#else /* CONFIG_E1000_NAPI */
3613 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3614 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3615 le16_to_cpu(rx_desc->wb.middle.vlan) &
3616 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3617 } else {
3618 netif_rx(skb);
3619 }
3620#endif /* CONFIG_E1000_NAPI */
3621 netdev->last_rx = jiffies;
581d708e 3622 rx_ring->pkt++;
2d7edb92
MC		 3623
3624next_desc:
3625 rx_desc->wb.middle.status_error &= ~0xFF;
3626 buffer_info->skb = NULL;
3627 if(unlikely(++i == rx_ring->count)) i = 0;
3628
3629 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3630 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3631 }
3632 rx_ring->next_to_clean = i;
581d708e 3633 adapter->alloc_rx_buf(adapter, rx_ring);
1da177e4
LT		 3634
3635 return cleaned;
3636}
3637
3638/**
2d7edb92 3639 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3640 * @adapter: address of board private structure
3641 **/
3642
3643static void
581d708e
MC		 3644e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
3645 struct e1000_rx_ring *rx_ring)
1da177e4 3646{
1da177e4
LT		 3647 struct net_device *netdev = adapter->netdev;
3648 struct pci_dev *pdev = adapter->pdev;
3649 struct e1000_rx_desc *rx_desc;
3650 struct e1000_buffer *buffer_info;
3651 struct sk_buff *skb;
2648345f
MC		 3652 unsigned int i;
3653 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3654
3655 i = rx_ring->next_to_use;
3656 buffer_info = &rx_ring->buffer_info[i];
3657
3658 while(!buffer_info->skb) {
1da177e4 3659 skb = dev_alloc_skb(bufsz);
2648345f 3660
1da177e4
LT		 3661 if(unlikely(!skb)) {
3662 /* Better luck next round */
3663 break;
3664 }
3665
2648345f 3666 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3667 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3668 struct sk_buff *oldskb = skb;
2648345f
MC		 3669 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3670 "at %p\n", bufsz, skb->data);
3671 /* Try again, without freeing the previous */
1da177e4 3672 skb = dev_alloc_skb(bufsz);
2648345f 3673 /* Failed allocation, critical failure */
1da177e4
LT		 3674 if (!skb) {
3675 dev_kfree_skb(oldskb);
3676 break;
3677 }
2648345f 3678
1da177e4
LT		 3679 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3680 /* give up */
3681 dev_kfree_skb(skb);
3682 dev_kfree_skb(oldskb);
3683 break; /* while !buffer_info->skb */
3684 } else {
2648345f 3685 /* Use new allocation */
1da177e4
LT		 3686 dev_kfree_skb(oldskb);
3687 }
3688 }
1da177e4
LT		 3689 /* Make buffer alignment 2 beyond a 16 byte boundary
3690 * this will result in a 16 byte aligned IP header after
3691 * the 14 byte MAC header is removed
3692 */
3693 skb_reserve(skb, NET_IP_ALIGN);
3694
3695 skb->dev = netdev;
3696
3697 buffer_info->skb = skb;
3698 buffer_info->length = adapter->rx_buffer_len;
3699 buffer_info->dma = pci_map_single(pdev,
3700 skb->data,
3701 adapter->rx_buffer_len,
3702 PCI_DMA_FROMDEVICE);
3703
2648345f
MC		 3704 /* Fix for errata 23, can't cross 64kB boundary */
3705 if (!e1000_check_64k_bound(adapter,
3706 (void *)(unsigned long)buffer_info->dma,
3707 adapter->rx_buffer_len)) {
3708 DPRINTK(RX_ERR, ERR,
3709 "dma align check failed: %u bytes at %p\n",
3710 adapter->rx_buffer_len,
3711 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3712 dev_kfree_skb(skb);
3713 buffer_info->skb = NULL;
3714
2648345f 3715 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3716 adapter->rx_buffer_len,
3717 PCI_DMA_FROMDEVICE);
3718
3719 break; /* while !buffer_info->skb */
3720 }
1da177e4
LT		 3721 rx_desc = E1000_RX_DESC(*rx_ring, i);
3722 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3723
3724 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3725 /* Force memory writes to complete before letting h/w
3726 * know there are new descriptors to fetch. (Only
3727 * applicable for weak-ordered memory model archs,
3728 * such as IA-64). */
3729 wmb();
581d708e 3730 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
1da177e4
LT		 3731 }
3732
3733 if(unlikely(++i == rx_ring->count)) i = 0;
3734 buffer_info = &rx_ring->buffer_info[i];
3735 }
3736
3737 rx_ring->next_to_use = i;
3738}
3739
2d7edb92
MC		 3740/**
3741 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3742 * @adapter: address of board private structure
3743 **/
3744
3745static void
581d708e
MC		 3746e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
3747 struct e1000_rx_ring *rx_ring)
2d7edb92 3748{
2d7edb92
MC		 3749 struct net_device *netdev = adapter->netdev;
3750 struct pci_dev *pdev = adapter->pdev;
3751 union e1000_rx_desc_packet_split *rx_desc;
3752 struct e1000_buffer *buffer_info;
3753 struct e1000_ps_page *ps_page;
3754 struct e1000_ps_page_dma *ps_page_dma;
3755 struct sk_buff *skb;
3756 unsigned int i, j;
3757
3758 i = rx_ring->next_to_use;
3759 buffer_info = &rx_ring->buffer_info[i];
3760 ps_page = &rx_ring->ps_page[i];
3761 ps_page_dma = &rx_ring->ps_page_dma[i];
3762
3763 while(!buffer_info->skb) {
3764 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3765
3766 for(j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 3767 if (j < adapter->rx_ps_pages) {
3768 if (likely(!ps_page->ps_page[j])) {
3769 ps_page->ps_page[j] =
3770 alloc_page(GFP_ATOMIC);
3771 if (unlikely(!ps_page->ps_page[j]))
3772 goto no_buffers;
3773 ps_page_dma->ps_page_dma[j] =
3774 pci_map_page(pdev,
3775 ps_page->ps_page[j],
3776 0, PAGE_SIZE,
3777 PCI_DMA_FROMDEVICE);
3778 }
3779 /* Refresh the desc even if buffer_addrs didn't
3780 * change because each write-back erases
3781 * this info.
3782 */
3783 rx_desc->read.buffer_addr[j+1] =
3784 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3785 } else
3786 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 3787 }
3788
3789 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3790
3791 if(unlikely(!skb))
3792 break;
3793
3794 /* Make buffer alignment 2 beyond a 16 byte boundary
3795 * this will result in a 16 byte aligned IP header after
3796 * the 14 byte MAC header is removed
3797 */
3798 skb_reserve(skb, NET_IP_ALIGN);
3799
3800 skb->dev = netdev;
3801
3802 buffer_info->skb = skb;
3803 buffer_info->length = adapter->rx_ps_bsize0;
3804 buffer_info->dma = pci_map_single(pdev, skb->data,
3805 adapter->rx_ps_bsize0,
3806 PCI_DMA_FROMDEVICE);
3807
3808 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
3809
3810 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3811 /* Force memory writes to complete before letting h/w
3812 * know there are new descriptors to fetch. (Only
3813 * applicable for weak-ordered memory model archs,
3814 * such as IA-64). */
3815 wmb();
3816 /* Hardware increments by 16 bytes, but packet split
3817 * descriptors are 32 bytes...so we increment tail
3818 * twice as much.
3819 */
581d708e 3820 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
2d7edb92
MC		 3821 }
3822
3823 if(unlikely(++i == rx_ring->count)) i = 0;
3824 buffer_info = &rx_ring->buffer_info[i];
3825 ps_page = &rx_ring->ps_page[i];
3826 ps_page_dma = &rx_ring->ps_page_dma[i];
3827 }
3828
3829no_buffers:
3830 rx_ring->next_to_use = i;
3831}
3832
1da177e4
LT		 3833/**
3834 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
3835 * @adapter:
3836 **/
3837
3838static void
3839e1000_smartspeed(struct e1000_adapter *adapter)
3840{
3841 uint16_t phy_status;
3842 uint16_t phy_ctrl;
3843
3844 if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
3845 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
3846 return;
3847
3848 if(adapter->smartspeed == 0) {
3849 /* If Master/Slave config fault is asserted twice,
3850 * we assume back-to-back */
3851 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
3852 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
3853 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
3854 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
3855 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
3856 if(phy_ctrl & CR_1000T_MS_ENABLE) {
3857 phy_ctrl &= ~CR_1000T_MS_ENABLE;
3858 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
3859 phy_ctrl);
3860 adapter->smartspeed++;
3861 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
3862 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
3863 &phy_ctrl)) {
3864 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3865 MII_CR_RESTART_AUTO_NEG);
3866 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
3867 phy_ctrl);
3868 }
3869 }
3870 return;
3871 } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
3872 /* If still no link, perhaps using 2/3 pair cable */
3873 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
3874 phy_ctrl |= CR_1000T_MS_ENABLE;
3875 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
3876 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
3877 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
3878 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3879 MII_CR_RESTART_AUTO_NEG);
3880 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
3881 }
3882 }
3883 /* Restart process after E1000_SMARTSPEED_MAX iterations */
3884 if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
3885 adapter->smartspeed = 0;
3886}
3887
3888/**
3889 * e1000_ioctl -
3890 * @netdev:
3891 * @ifreq:
3892 * @cmd:
3893 **/
3894
3895static int
3896e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3897{
3898 switch (cmd) {
3899 case SIOCGMIIPHY:
3900 case SIOCGMIIREG:
3901 case SIOCSMIIREG:
3902 return e1000_mii_ioctl(netdev, ifr, cmd);
3903 default:
3904 return -EOPNOTSUPP;
3905 }
3906}
3907
3908/**
3909 * e1000_mii_ioctl -
3910 * @netdev:
3911 * @ifreq:
3912 * @cmd:
3913 **/
3914
3915static int
3916e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3917{
60490fe0 3918 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3919 struct mii_ioctl_data *data = if_mii(ifr);
3920 int retval;
3921 uint16_t mii_reg;
3922 uint16_t spddplx;
97876fc6 3923 unsigned long flags;
1da177e4
LT		 3924
3925 if(adapter->hw.media_type != e1000_media_type_copper)
3926 return -EOPNOTSUPP;
3927
3928 switch (cmd) {
3929 case SIOCGMIIPHY:
3930 data->phy_id = adapter->hw.phy_addr;
3931 break;
3932 case SIOCGMIIREG:
97876fc6 3933 if(!capable(CAP_NET_ADMIN))
1da177e4 3934 return -EPERM;
97876fc6
MC		 3935 spin_lock_irqsave(&adapter->stats_lock, flags);
3936 if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
3937 &data->val_out)) {
3938 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 3939 return -EIO;
97876fc6
MC		 3940 }
3941 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 3942 break;
3943 case SIOCSMIIREG:
97876fc6 3944 if(!capable(CAP_NET_ADMIN))
1da177e4 3945 return -EPERM;
97876fc6 3946 if(data->reg_num & ~(0x1F))
1da177e4
LT		 3947 return -EFAULT;
3948 mii_reg = data->val_in;
97876fc6
MC		 3949 spin_lock_irqsave(&adapter->stats_lock, flags);
3950 if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
3951 mii_reg)) {
3952 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 3953 return -EIO;
97876fc6
MC		 3954 }
3955 if(adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT		 3956 switch (data->reg_num) {
3957 case PHY_CTRL:
3958 if(mii_reg & MII_CR_POWER_DOWN)
3959 break;
3960 if(mii_reg & MII_CR_AUTO_NEG_EN) {
3961 adapter->hw.autoneg = 1;
3962 adapter->hw.autoneg_advertised = 0x2F;
3963 } else {
3964 if (mii_reg & 0x40)
3965 spddplx = SPEED_1000;
3966 else if (mii_reg & 0x2000)
3967 spddplx = SPEED_100;
3968 else
3969 spddplx = SPEED_10;
3970 spddplx += (mii_reg & 0x100)
3971 ? FULL_DUPLEX :
3972 HALF_DUPLEX;
3973 retval = e1000_set_spd_dplx(adapter,
3974 spddplx);
97876fc6
MC		 3975 if(retval) {
3976 spin_unlock_irqrestore(
3977 &adapter->stats_lock,
3978 flags);
1da177e4 3979 return retval;
97876fc6 3980 }
1da177e4
LT		 3981 }
3982 if(netif_running(adapter->netdev)) {
3983 e1000_down(adapter);
3984 e1000_up(adapter);
3985 } else
3986 e1000_reset(adapter);
3987 break;
3988 case M88E1000_PHY_SPEC_CTRL:
3989 case M88E1000_EXT_PHY_SPEC_CTRL:
97876fc6
MC		 3990 if(e1000_phy_reset(&adapter->hw)) {
3991 spin_unlock_irqrestore(
3992 &adapter->stats_lock, flags);
1da177e4 3993 return -EIO;
97876fc6 3994 }
1da177e4
LT		 3995 break;
3996 }
3997 } else {
3998 switch (data->reg_num) {
3999 case PHY_CTRL:
4000 if(mii_reg & MII_CR_POWER_DOWN)
4001 break;
4002 if(netif_running(adapter->netdev)) {
4003 e1000_down(adapter);
4004 e1000_up(adapter);
4005 } else
4006 e1000_reset(adapter);
4007 break;
4008 }
4009 }
97876fc6 4010 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4011 break;
4012 default:
4013 return -EOPNOTSUPP;
4014 }
4015 return E1000_SUCCESS;
4016}
4017
4018void
4019e1000_pci_set_mwi(struct e1000_hw *hw)
4020{
4021 struct e1000_adapter *adapter = hw->back;
2648345f 4022 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4023
2648345f
MC		 4024 if(ret_val)
4025 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4026}
4027
4028void
4029e1000_pci_clear_mwi(struct e1000_hw *hw)
4030{
4031 struct e1000_adapter *adapter = hw->back;
4032
4033 pci_clear_mwi(adapter->pdev);
4034}
4035
4036void
4037e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4038{
4039 struct e1000_adapter *adapter = hw->back;
4040
4041 pci_read_config_word(adapter->pdev, reg, value);
4042}
4043
4044void
4045e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4046{
4047 struct e1000_adapter *adapter = hw->back;
4048
4049 pci_write_config_word(adapter->pdev, reg, *value);
4050}
4051
4052uint32_t
4053e1000_io_read(struct e1000_hw *hw, unsigned long port)
4054{
4055 return inl(port);
4056}
4057
4058void
4059e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4060{
4061 outl(value, port);
4062}
4063
4064static void
4065e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4066{
60490fe0 4067 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4068 uint32_t ctrl, rctl;
4069
4070 e1000_irq_disable(adapter);
4071 adapter->vlgrp = grp;
4072
4073 if(grp) {
4074 /* enable VLAN tag insert/strip */
4075 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4076 ctrl |= E1000_CTRL_VME;
4077 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4078
4079 /* enable VLAN receive filtering */
4080 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4081 rctl |= E1000_RCTL_VFE;
4082 rctl &= ~E1000_RCTL_CFIEN;
4083 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4084 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4085 } else {
4086 /* disable VLAN tag insert/strip */
4087 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4088 ctrl &= ~E1000_CTRL_VME;
4089 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4090
4091 /* disable VLAN filtering */
4092 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4093 rctl &= ~E1000_RCTL_VFE;
4094 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92
MC		 4095 if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4096 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4097 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4098 }
1da177e4
LT		 4099 }
4100
4101 e1000_irq_enable(adapter);
4102}
4103
4104static void
4105e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4106{
60490fe0 4107 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4108 uint32_t vfta, index;
2d7edb92
MC		 4109 if((adapter->hw.mng_cookie.status &
4110 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4111 (vid == adapter->mng_vlan_id))
4112 return;
1da177e4
LT		 4113 /* add VID to filter table */
4114 index = (vid >> 5) & 0x7F;
4115 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4116 vfta |= (1 << (vid & 0x1F));
4117 e1000_write_vfta(&adapter->hw, index, vfta);
4118}
4119
4120static void
4121e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4122{
60490fe0 4123 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4124 uint32_t vfta, index;
4125
4126 e1000_irq_disable(adapter);
4127
4128 if(adapter->vlgrp)
4129 adapter->vlgrp->vlan_devices[vid] = NULL;
4130
4131 e1000_irq_enable(adapter);
4132
2d7edb92
MC		 4133 if((adapter->hw.mng_cookie.status &
4134 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4135 (vid == adapter->mng_vlan_id))
4136 return;
1da177e4
LT		 4137 /* remove VID from filter table */
4138 index = (vid >> 5) & 0x7F;
4139 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4140 vfta &= ~(1 << (vid & 0x1F));
4141 e1000_write_vfta(&adapter->hw, index, vfta);
4142}
4143
4144static void
4145e1000_restore_vlan(struct e1000_adapter *adapter)
4146{
4147 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4148
4149 if(adapter->vlgrp) {
4150 uint16_t vid;
4151 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4152 if(!adapter->vlgrp->vlan_devices[vid])
4153 continue;
4154 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4155 }
4156 }
4157}
4158
4159int
4160e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4161{
4162 adapter->hw.autoneg = 0;
4163
6921368f
MC		 4164 /* Fiber NICs only allow 1000 gbps Full duplex */
4165 if((adapter->hw.media_type == e1000_media_type_fiber) &&
4166 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4167 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4168 return -EINVAL;
4169 }
4170
1da177e4
LT		 4171 switch(spddplx) {
4172 case SPEED_10 + DUPLEX_HALF:
4173 adapter->hw.forced_speed_duplex = e1000_10_half;
4174 break;
4175 case SPEED_10 + DUPLEX_FULL:
4176 adapter->hw.forced_speed_duplex = e1000_10_full;
4177 break;
4178 case SPEED_100 + DUPLEX_HALF:
4179 adapter->hw.forced_speed_duplex = e1000_100_half;
4180 break;
4181 case SPEED_100 + DUPLEX_FULL:
4182 adapter->hw.forced_speed_duplex = e1000_100_full;
4183 break;
4184 case SPEED_1000 + DUPLEX_FULL:
4185 adapter->hw.autoneg = 1;
4186 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4187 break;
4188 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4189 default:
2648345f 4190 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4191 return -EINVAL;
4192 }
4193 return 0;
4194}
4195
1da177e4 4196static int
829ca9a3 4197e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4198{
4199 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4200 struct e1000_adapter *adapter = netdev_priv(netdev);
2d7edb92 4201 uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm;
1da177e4
LT		 4202 uint32_t wufc = adapter->wol;
4203
4204 netif_device_detach(netdev);
4205
4206 if(netif_running(netdev))
4207 e1000_down(adapter);
4208
4209 status = E1000_READ_REG(&adapter->hw, STATUS);
4210 if(status & E1000_STATUS_LU)
4211 wufc &= ~E1000_WUFC_LNKC;
4212
4213 if(wufc) {
4214 e1000_setup_rctl(adapter);
4215 e1000_set_multi(netdev);
4216
4217 /* turn on all-multi mode if wake on multicast is enabled */
4218 if(adapter->wol & E1000_WUFC_MC) {
4219 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4220 rctl |= E1000_RCTL_MPE;
4221 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4222 }
4223
4224 if(adapter->hw.mac_type >= e1000_82540) {
4225 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4226 /* advertise wake from D3Cold */
4227 #define E1000_CTRL_ADVD3WUC 0x00100000
4228 /* phy power management enable */
4229 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4230 ctrl |= E1000_CTRL_ADVD3WUC |
4231 E1000_CTRL_EN_PHY_PWR_MGMT;
4232 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4233 }
4234
4235 if(adapter->hw.media_type == e1000_media_type_fiber ||
4236 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4237 /* keep the laser running in D3 */
4238 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4239 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4240 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4241 }
4242
2d7edb92
MC		 4243 /* Allow time for pending master requests to run */
4244 e1000_disable_pciex_master(&adapter->hw);
4245
1da177e4
LT		 4246 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4247 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4248 pci_enable_wake(pdev, 3, 1);
4249 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4250 } else {
4251 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4252 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4253 pci_enable_wake(pdev, 3, 0);
4254 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4255 }
4256
4257 pci_save_state(pdev);
4258
4259 if(adapter->hw.mac_type >= e1000_82540 &&
4260 adapter->hw.media_type == e1000_media_type_copper) {
4261 manc = E1000_READ_REG(&adapter->hw, MANC);
4262 if(manc & E1000_MANC_SMBUS_EN) {
4263 manc |= E1000_MANC_ARP_EN;
4264 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4265 pci_enable_wake(pdev, 3, 1);
4266 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4267 }
4268 }
4269
2d7edb92 4270 switch(adapter->hw.mac_type) {
868d5309
MC		 4271 case e1000_82571:
4272 case e1000_82572:
4273 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4274 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
4275 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
4276 break;
2d7edb92
MC		 4277 case e1000_82573:
4278 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4279 E1000_WRITE_REG(&adapter->hw, SWSM,
4280 swsm & ~E1000_SWSM_DRV_LOAD);
4281 break;
4282 default:
4283 break;
4284 }
4285
1da177e4 4286 pci_disable_device(pdev);
829ca9a3 4287 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4288
4289 return 0;
4290}
4291
4292#ifdef CONFIG_PM
4293static int
4294e1000_resume(struct pci_dev *pdev)
4295{
4296 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4297 struct e1000_adapter *adapter = netdev_priv(netdev);
2b02893e 4298 uint32_t manc, ret_val, swsm;
868d5309 4299 uint32_t ctrl_ext;
1da177e4 4300
829ca9a3 4301 pci_set_power_state(pdev, PCI_D0);
1da177e4 4302 pci_restore_state(pdev);
2b02893e 4303 ret_val = pci_enable_device(pdev);
a4cb847d 4304 pci_set_master(pdev);
1da177e4 4305
829ca9a3
PM		 4306 pci_enable_wake(pdev, PCI_D3hot, 0);
4307 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4308
4309 e1000_reset(adapter);
4310 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4311
4312 if(netif_running(netdev))
4313 e1000_up(adapter);
4314
4315 netif_device_attach(netdev);
4316
4317 if(adapter->hw.mac_type >= e1000_82540 &&
4318 adapter->hw.media_type == e1000_media_type_copper) {
4319 manc = E1000_READ_REG(&adapter->hw, MANC);
4320 manc &= ~(E1000_MANC_ARP_EN);
4321 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4322 }
4323
2d7edb92 4324 switch(adapter->hw.mac_type) {
868d5309
MC		 4325 case e1000_82571:
4326 case e1000_82572:
4327 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4328 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
4329 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
4330 break;
2d7edb92
MC		 4331 case e1000_82573:
4332 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4333 E1000_WRITE_REG(&adapter->hw, SWSM,
4334 swsm | E1000_SWSM_DRV_LOAD);
4335 break;
4336 default:
4337 break;
4338 }
4339
1da177e4
LT		 4340 return 0;
4341}
4342#endif
1da177e4
LT		 4343#ifdef CONFIG_NET_POLL_CONTROLLER
4344/*
4345 * Polling 'interrupt' - used by things like netconsole to send skbs
4346 * without having to re-enable interrupts. It's not called while
4347 * the interrupt routine is executing.
4348 */
4349static void
2648345f 4350e1000_netpoll(struct net_device *netdev)
1da177e4 4351{
60490fe0 4352 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4353 disable_irq(adapter->pdev->irq);
4354 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4355 e1000_clean_tx_irq(adapter, adapter->tx_ring);
1da177e4
LT		 4356 enable_irq(adapter->pdev->irq);
4357}
4358#endif
4359
4360/* e1000_main.c */