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Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4
[GitHub/LineageOS/android_kernel_samsung_universal7580.git] / drivers / net / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
1da177e4
LT		 32#include <asm/uaccess.h>
33
1da177e4
LT		 34struct e1000_stats {
35 char stat_string[ETH_GSTRING_LEN];
36 int sizeof_stat;
37 int stat_offset;
38};
39
030ed68b 40#define E1000_STAT(m) FIELD_SIZEOF(struct e1000_adapter, m), \
1da177e4
LT		 41 offsetof(struct e1000_adapter, m)
42static const struct e1000_stats e1000_gstrings_stats[] = {
49559854
MW		 43 { "rx_packets", E1000_STAT(stats.gprc) },
44 { "tx_packets", E1000_STAT(stats.gptc) },
45 { "rx_bytes", E1000_STAT(stats.gorcl) },
46 { "tx_bytes", E1000_STAT(stats.gotcl) },
47 { "rx_broadcast", E1000_STAT(stats.bprc) },
48 { "tx_broadcast", E1000_STAT(stats.bptc) },
49 { "rx_multicast", E1000_STAT(stats.mprc) },
50 { "tx_multicast", E1000_STAT(stats.mptc) },
51 { "rx_errors", E1000_STAT(stats.rxerrc) },
52 { "tx_errors", E1000_STAT(stats.txerrc) },
1da177e4 53 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
49559854
MW		 54 { "multicast", E1000_STAT(stats.mprc) },
55 { "collisions", E1000_STAT(stats.colc) },
56 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
1da177e4 57 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
49559854 58 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
1da177e4 59 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
2648345f 60 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
49559854
MW		 61 { "rx_missed_errors", E1000_STAT(stats.mpc) },
62 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
63 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
1da177e4
LT		 64 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
65 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
49559854 66 { "tx_window_errors", E1000_STAT(stats.latecol) },
1da177e4
LT		 67 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
68 { "tx_deferred_ok", E1000_STAT(stats.dc) },
69 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
70 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 71 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
fcfb1224 72 { "tx_restart_queue", E1000_STAT(restart_queue) },
1da177e4
LT		 73 { "rx_long_length_errors", E1000_STAT(stats.roc) },
74 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
75 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
76 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
77 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
78 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
79 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
80 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
81 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
82 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
83 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9 84 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
6b7660cd 85 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
15e376b4
JG		 86 { "tx_smbus", E1000_STAT(stats.mgptc) },
87 { "rx_smbus", E1000_STAT(stats.mgprc) },
88 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
1da177e4 89};
7bfa4816 90
7bfa4816 91#define E1000_QUEUE_STATS_LEN 0
ff8ac609 92#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
7bfa4816 93#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT		 94static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
95 "Register test (offline)", "Eeprom test (offline)",
96 "Interrupt test (offline)", "Loopback test (offline)",
97 "Link test (on/offline)"
98};
4c3616cd 99#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
1da177e4 100
64798845
JP		 101static int e1000_get_settings(struct net_device *netdev,
102 struct ethtool_cmd *ecmd)
1da177e4 103{
60490fe0 104 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 105 struct e1000_hw *hw = &adapter->hw;
106
96838a40 107 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 108
109 ecmd->supported = (SUPPORTED_10baseT_Half |
110 SUPPORTED_10baseT_Full |
111 SUPPORTED_100baseT_Half |
112 SUPPORTED_100baseT_Full |
113 SUPPORTED_1000baseT_Full|
114 SUPPORTED_Autoneg |
115 SUPPORTED_TP);
1da177e4
LT		 116 ecmd->advertising = ADVERTISED_TP;
117
96838a40 118 if (hw->autoneg == 1) {
1da177e4 119 ecmd->advertising |= ADVERTISED_Autoneg;
1da177e4 120 /* the e1000 autoneg seems to match ethtool nicely */
1da177e4
LT		 121 ecmd->advertising |= hw->autoneg_advertised;
122 }
123
124 ecmd->port = PORT_TP;
125 ecmd->phy_address = hw->phy_addr;
126
96838a40 127 if (hw->mac_type == e1000_82543)
1da177e4
LT		 128 ecmd->transceiver = XCVR_EXTERNAL;
129 else
130 ecmd->transceiver = XCVR_INTERNAL;
131
132 } else {
133 ecmd->supported = (SUPPORTED_1000baseT_Full |
134 SUPPORTED_FIBRE |
135 SUPPORTED_Autoneg);
136
012609a8
MC		 137 ecmd->advertising = (ADVERTISED_1000baseT_Full |
138 ADVERTISED_FIBRE |
139 ADVERTISED_Autoneg);
1da177e4
LT		 140
141 ecmd->port = PORT_FIBRE;
142
96838a40 143 if (hw->mac_type >= e1000_82545)
1da177e4
LT		 144 ecmd->transceiver = XCVR_INTERNAL;
145 else
146 ecmd->transceiver = XCVR_EXTERNAL;
147 }
148
1dc32918 149 if (er32(STATUS) & E1000_STATUS_LU) {
1da177e4
LT		 150
151 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
152 &adapter->link_duplex);
153 ecmd->speed = adapter->link_speed;
154
155 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
156 * and HALF_DUPLEX != DUPLEX_HALF */
157
96838a40 158 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT		 159 ecmd->duplex = DUPLEX_FULL;
160 else
161 ecmd->duplex = DUPLEX_HALF;
162 } else {
163 ecmd->speed = -1;
164 ecmd->duplex = -1;
165 }
166
167 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
168 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
169 return 0;
170}
171
64798845
JP		 172static int e1000_set_settings(struct net_device *netdev,
173 struct ethtool_cmd *ecmd)
1da177e4 174{
60490fe0 175 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 176 struct e1000_hw *hw = &adapter->hw;
177
1a821ca5
JB		 178 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
179 msleep(1);
180
57128197 181 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 182 hw->autoneg = 1;
96838a40 183 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC		 184 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
185 ADVERTISED_FIBRE |
186 ADVERTISED_Autoneg;
96838a40 187 else
2f2ca263
JK		 188 hw->autoneg_advertised = ecmd->advertising |
189 ADVERTISED_TP |
190 ADVERTISED_Autoneg;
012609a8 191 ecmd->advertising = hw->autoneg_advertised;
1da177e4 192 } else
1a821ca5
JB		 193 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
194 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 195 return -EINVAL;
1a821ca5 196 }
1da177e4
LT		 197
198 /* reset the link */
199
1a821ca5
JB		 200 if (netif_running(adapter->netdev)) {
201 e1000_down(adapter);
202 e1000_up(adapter);
203 } else
1da177e4
LT		 204 e1000_reset(adapter);
205
1a821ca5 206 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 207 return 0;
208}
209
64798845
JP		 210static void e1000_get_pauseparam(struct net_device *netdev,
211 struct ethtool_pauseparam *pause)
1da177e4 212{
60490fe0 213 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 214 struct e1000_hw *hw = &adapter->hw;
215
96838a40 216 pause->autoneg =
1da177e4 217 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40 218
11241b10 219 if (hw->fc == E1000_FC_RX_PAUSE)
1da177e4 220 pause->rx_pause = 1;
11241b10 221 else if (hw->fc == E1000_FC_TX_PAUSE)
1da177e4 222 pause->tx_pause = 1;
11241b10 223 else if (hw->fc == E1000_FC_FULL) {
1da177e4
LT		 224 pause->rx_pause = 1;
225 pause->tx_pause = 1;
226 }
227}
228
64798845
JP		 229static int e1000_set_pauseparam(struct net_device *netdev,
230 struct ethtool_pauseparam *pause)
1da177e4 231{
60490fe0 232 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 233 struct e1000_hw *hw = &adapter->hw;
1a821ca5 234 int retval = 0;
96838a40 235
1da177e4
LT		 236 adapter->fc_autoneg = pause->autoneg;
237
1a821ca5
JB		 238 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
239 msleep(1);
240
96838a40 241 if (pause->rx_pause && pause->tx_pause)
11241b10 242 hw->fc = E1000_FC_FULL;
96838a40 243 else if (pause->rx_pause && !pause->tx_pause)
11241b10 244 hw->fc = E1000_FC_RX_PAUSE;
96838a40 245 else if (!pause->rx_pause && pause->tx_pause)
11241b10 246 hw->fc = E1000_FC_TX_PAUSE;
96838a40 247 else if (!pause->rx_pause && !pause->tx_pause)
11241b10 248 hw->fc = E1000_FC_NONE;
1da177e4
LT		 249
250 hw->original_fc = hw->fc;
251
96838a40 252 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB		 253 if (netif_running(adapter->netdev)) {
254 e1000_down(adapter);
255 e1000_up(adapter);
256 } else
1da177e4 257 e1000_reset(adapter);
96838a40 258 } else
1a821ca5 259 retval = ((hw->media_type == e1000_media_type_fiber) ?
90fb5135 260 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 261
1a821ca5
JB		 262 clear_bit(__E1000_RESETTING, &adapter->flags);
263 return retval;
1da177e4
LT		 264}
265
64798845 266static u32 e1000_get_rx_csum(struct net_device *netdev)
1da177e4 267{
60490fe0 268 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 269 return adapter->rx_csum;
270}
271
64798845 272static int e1000_set_rx_csum(struct net_device *netdev, u32 data)
1da177e4 273{
60490fe0 274 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 275 adapter->rx_csum = data;
276
2db10a08
AK		 277 if (netif_running(netdev))
278 e1000_reinit_locked(adapter);
279 else
1da177e4
LT		 280 e1000_reset(adapter);
281 return 0;
282}
96838a40 283
64798845 284static u32 e1000_get_tx_csum(struct net_device *netdev)
1da177e4
LT		 285{
286 return (netdev->features & NETIF_F_HW_CSUM) != 0;
287}
288
64798845 289static int e1000_set_tx_csum(struct net_device *netdev, u32 data)
1da177e4 290{
60490fe0 291 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 292 struct e1000_hw *hw = &adapter->hw;
1da177e4 293
1dc32918 294 if (hw->mac_type < e1000_82543) {
1da177e4
LT		 295 if (!data)
296 return -EINVAL;
297 return 0;
298 }
299
300 if (data)
301 netdev->features |= NETIF_F_HW_CSUM;
302 else
303 netdev->features &= ~NETIF_F_HW_CSUM;
304
305 return 0;
306}
307
64798845 308static int e1000_set_tso(struct net_device *netdev, u32 data)
1da177e4 309{
60490fe0 310 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 311 struct e1000_hw *hw = &adapter->hw;
312
313 if ((hw->mac_type < e1000_82544) ||
314 (hw->mac_type == e1000_82547))
1da177e4
LT		 315 return data ? -EINVAL : 0;
316
317 if (data)
318 netdev->features |= NETIF_F_TSO;
319 else
320 netdev->features &= ~NETIF_F_TSO;
7e6c9861 321
1532ecea 322 netdev->features &= ~NETIF_F_TSO6;
87ca4e5b 323
7e6c9861 324 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
c3033b01 325 adapter->tso_force = true;
1da177e4 326 return 0;
96838a40 327}
1da177e4 328
64798845 329static u32 e1000_get_msglevel(struct net_device *netdev)
1da177e4 330{
60490fe0 331 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 332 return adapter->msg_enable;
333}
334
64798845 335static void e1000_set_msglevel(struct net_device *netdev, u32 data)
1da177e4 336{
60490fe0 337 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 338 adapter->msg_enable = data;
339}
340
64798845 341static int e1000_get_regs_len(struct net_device *netdev)
1da177e4
LT		 342{
343#define E1000_REGS_LEN 32
406874a7 344 return E1000_REGS_LEN * sizeof(u32);
1da177e4
LT		 345}
346
64798845
JP		 347static void e1000_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
348 void *p)
1da177e4 349{
60490fe0 350 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 351 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 352 u32 *regs_buff = p;
353 u16 phy_data;
1da177e4 354
406874a7 355 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
1da177e4
LT		 356
357 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
358
1dc32918
JP		 359 regs_buff[0] = er32(CTRL);
360 regs_buff[1] = er32(STATUS);
1da177e4 361
1dc32918
JP		 362 regs_buff[2] = er32(RCTL);
363 regs_buff[3] = er32(RDLEN);
364 regs_buff[4] = er32(RDH);
365 regs_buff[5] = er32(RDT);
366 regs_buff[6] = er32(RDTR);
1da177e4 367
1dc32918
JP		 368 regs_buff[7] = er32(TCTL);
369 regs_buff[8] = er32(TDLEN);
370 regs_buff[9] = er32(TDH);
371 regs_buff[10] = er32(TDT);
372 regs_buff[11] = er32(TIDV);
1da177e4 373
1dc32918 374 regs_buff[12] = hw->phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 375 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT		 376 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
377 IGP01E1000_PHY_AGC_A);
378 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
379 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 380 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT		 381 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
382 IGP01E1000_PHY_AGC_B);
383 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
384 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 385 regs_buff[14] = (u32)phy_data; /* cable length */
1da177e4
LT		 386 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
387 IGP01E1000_PHY_AGC_C);
388 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
389 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 390 regs_buff[15] = (u32)phy_data; /* cable length */
1da177e4
LT		 391 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
392 IGP01E1000_PHY_AGC_D);
393 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
394 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 395 regs_buff[16] = (u32)phy_data; /* cable length */
1da177e4
LT		 396 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
397 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
398 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
399 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 400 regs_buff[18] = (u32)phy_data; /* cable polarity */
1da177e4
LT		 401 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
402 IGP01E1000_PHY_PCS_INIT_REG);
403 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
404 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 405 regs_buff[19] = (u32)phy_data; /* cable polarity */
1da177e4
LT		 406 regs_buff[20] = 0; /* polarity correction enabled (always) */
407 regs_buff[22] = 0; /* phy receive errors (unavailable) */
408 regs_buff[23] = regs_buff[18]; /* mdix mode */
409 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
410 } else {
8fc897b0 411 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
406874a7 412 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT		 413 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
414 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
415 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 416 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
406874a7 417 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
1da177e4
LT		 418 regs_buff[18] = regs_buff[13]; /* cable polarity */
419 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
420 regs_buff[20] = regs_buff[17]; /* polarity correction */
421 /* phy receive errors */
422 regs_buff[22] = adapter->phy_stats.receive_errors;
423 regs_buff[23] = regs_buff[13]; /* mdix mode */
424 }
425 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
426 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
406874a7 427 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
1da177e4 428 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 429 if (hw->mac_type >= e1000_82540 &&
4ccc12ae 430 hw->media_type == e1000_media_type_copper) {
1dc32918 431 regs_buff[26] = er32(MANC);
1da177e4
LT		 432 }
433}
434
64798845 435static int e1000_get_eeprom_len(struct net_device *netdev)
1da177e4 436{
60490fe0 437 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 438 struct e1000_hw *hw = &adapter->hw;
439
440 return hw->eeprom.word_size * 2;
1da177e4
LT		 441}
442
64798845
JP		 443static int e1000_get_eeprom(struct net_device *netdev,
444 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 445{
60490fe0 446 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 447 struct e1000_hw *hw = &adapter->hw;
406874a7 448 u16 *eeprom_buff;
1da177e4
LT		 449 int first_word, last_word;
450 int ret_val = 0;
406874a7 451 u16 i;
1da177e4 452
96838a40 453 if (eeprom->len == 0)
1da177e4
LT		 454 return -EINVAL;
455
456 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
457
458 first_word = eeprom->offset >> 1;
459 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
460
406874a7 461 eeprom_buff = kmalloc(sizeof(u16) *
1da177e4 462 (last_word - first_word + 1), GFP_KERNEL);
96838a40 463 if (!eeprom_buff)
1da177e4
LT		 464 return -ENOMEM;
465
96838a40 466 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT		 467 ret_val = e1000_read_eeprom(hw, first_word,
468 last_word - first_word + 1,
469 eeprom_buff);
470 else {
c7be73bc
JP		 471 for (i = 0; i < last_word - first_word + 1; i++) {
472 ret_val = e1000_read_eeprom(hw, first_word + i, 1,
473 &eeprom_buff[i]);
474 if (ret_val)
1da177e4 475 break;
c7be73bc 476 }
1da177e4
LT		 477 }
478
479 /* Device's eeprom is always little-endian, word addressable */
480 for (i = 0; i < last_word - first_word + 1; i++)
481 le16_to_cpus(&eeprom_buff[i]);
482
406874a7 483 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
1da177e4
LT		 484 eeprom->len);
485 kfree(eeprom_buff);
486
487 return ret_val;
488}
489
64798845
JP		 490static int e1000_set_eeprom(struct net_device *netdev,
491 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 492{
60490fe0 493 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 494 struct e1000_hw *hw = &adapter->hw;
406874a7 495 u16 *eeprom_buff;
1da177e4
LT		 496 void *ptr;
497 int max_len, first_word, last_word, ret_val = 0;
406874a7 498 u16 i;
1da177e4 499
96838a40 500 if (eeprom->len == 0)
1da177e4
LT		 501 return -EOPNOTSUPP;
502
96838a40 503 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT		 504 return -EFAULT;
505
506 max_len = hw->eeprom.word_size * 2;
507
508 first_word = eeprom->offset >> 1;
509 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
510 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 511 if (!eeprom_buff)
1da177e4
LT		 512 return -ENOMEM;
513
514 ptr = (void *)eeprom_buff;
515
96838a40 516 if (eeprom->offset & 1) {
1da177e4
LT		 517 /* need read/modify/write of first changed EEPROM word */
518 /* only the second byte of the word is being modified */
519 ret_val = e1000_read_eeprom(hw, first_word, 1,
520 &eeprom_buff[0]);
521 ptr++;
522 }
96838a40 523 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
1da177e4
LT		 524 /* need read/modify/write of last changed EEPROM word */
525 /* only the first byte of the word is being modified */
526 ret_val = e1000_read_eeprom(hw, last_word, 1,
527 &eeprom_buff[last_word - first_word]);
528 }
529
530 /* Device's eeprom is always little-endian, word addressable */
531 for (i = 0; i < last_word - first_word + 1; i++)
532 le16_to_cpus(&eeprom_buff[i]);
533
534 memcpy(ptr, bytes, eeprom->len);
535
536 for (i = 0; i < last_word - first_word + 1; i++)
537 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
538
539 ret_val = e1000_write_eeprom(hw, first_word,
540 last_word - first_word + 1, eeprom_buff);
541
1532ecea
JB		 542 /* Update the checksum over the first part of the EEPROM if needed */
543 if ((ret_val == 0) && (first_word <= EEPROM_CHECKSUM_REG))
1da177e4
LT		 544 e1000_update_eeprom_checksum(hw);
545
546 kfree(eeprom_buff);
547 return ret_val;
548}
549
64798845
JP		 550static void e1000_get_drvinfo(struct net_device *netdev,
551 struct ethtool_drvinfo *drvinfo)
1da177e4 552{
60490fe0 553 struct e1000_adapter *adapter = netdev_priv(netdev);
a2917e22 554 char firmware_version[32];
1da177e4
LT		 555
556 strncpy(drvinfo->driver, e1000_driver_name, 32);
557 strncpy(drvinfo->version, e1000_driver_version, 32);
a2917e22 558
1532ecea 559 sprintf(firmware_version, "N/A");
a2917e22 560 strncpy(drvinfo->fw_version, firmware_version, 32);
1da177e4 561 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
1da177e4
LT		 562 drvinfo->regdump_len = e1000_get_regs_len(netdev);
563 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
564}
565
64798845
JP		 566static void e1000_get_ringparam(struct net_device *netdev,
567 struct ethtool_ringparam *ring)
1da177e4 568{
60490fe0 569 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 570 struct e1000_hw *hw = &adapter->hw;
571 e1000_mac_type mac_type = hw->mac_type;
581d708e
MC		 572 struct e1000_tx_ring *txdr = adapter->tx_ring;
573 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT		 574
575 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
576 E1000_MAX_82544_RXD;
577 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
578 E1000_MAX_82544_TXD;
579 ring->rx_mini_max_pending = 0;
580 ring->rx_jumbo_max_pending = 0;
581 ring->rx_pending = rxdr->count;
582 ring->tx_pending = txdr->count;
583 ring->rx_mini_pending = 0;
584 ring->rx_jumbo_pending = 0;
585}
586
64798845
JP		 587static int e1000_set_ringparam(struct net_device *netdev,
588 struct ethtool_ringparam *ring)
1da177e4 589{
60490fe0 590 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 591 struct e1000_hw *hw = &adapter->hw;
592 e1000_mac_type mac_type = hw->mac_type;
793fab72
VA		 593 struct e1000_tx_ring *txdr, *tx_old;
594 struct e1000_rx_ring *rxdr, *rx_old;
1c7e5b12 595 int i, err;
581d708e 596
0989aa43
JK		 597 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
598 return -EINVAL;
599
2db10a08
AK		 600 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
601 msleep(1);
602
581d708e
MC		 603 if (netif_running(adapter->netdev))
604 e1000_down(adapter);
1da177e4
LT		 605
606 tx_old = adapter->tx_ring;
607 rx_old = adapter->rx_ring;
608
793fab72 609 err = -ENOMEM;
1c7e5b12 610 txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), GFP_KERNEL);
793fab72
VA		 611 if (!txdr)
612 goto err_alloc_tx;
581d708e 613
1c7e5b12 614 rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), GFP_KERNEL);
793fab72
VA		 615 if (!rxdr)
616 goto err_alloc_rx;
581d708e 617
793fab72
VA		 618 adapter->tx_ring = txdr;
619 adapter->rx_ring = rxdr;
581d708e 620
406874a7
JP		 621 rxdr->count = max(ring->rx_pending,(u32)E1000_MIN_RXD);
622 rxdr->count = min(rxdr->count,(u32)(mac_type < e1000_82544 ?
1da177e4 623 E1000_MAX_RXD : E1000_MAX_82544_RXD));
9099cfb9 624 rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4 625
406874a7
JP		 626 txdr->count = max(ring->tx_pending,(u32)E1000_MIN_TXD);
627 txdr->count = min(txdr->count,(u32)(mac_type < e1000_82544 ?
1da177e4 628 E1000_MAX_TXD : E1000_MAX_82544_TXD));
9099cfb9 629 txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 630
f56799ea 631 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 632 txdr[i].count = txdr->count;
f56799ea 633 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 634 rxdr[i].count = rxdr->count;
581d708e 635
96838a40 636 if (netif_running(adapter->netdev)) {
1da177e4 637 /* Try to get new resources before deleting old */
c7be73bc
JP		 638 err = e1000_setup_all_rx_resources(adapter);
639 if (err)
1da177e4 640 goto err_setup_rx;
c7be73bc
JP		 641 err = e1000_setup_all_tx_resources(adapter);
642 if (err)
1da177e4
LT		 643 goto err_setup_tx;
644
645 /* save the new, restore the old in order to free it,
646 * then restore the new back again */
647
1da177e4
LT		 648 adapter->rx_ring = rx_old;
649 adapter->tx_ring = tx_old;
581d708e
MC		 650 e1000_free_all_rx_resources(adapter);
651 e1000_free_all_tx_resources(adapter);
652 kfree(tx_old);
653 kfree(rx_old);
793fab72
VA		 654 adapter->rx_ring = rxdr;
655 adapter->tx_ring = txdr;
c7be73bc
JP		 656 err = e1000_up(adapter);
657 if (err)
2db10a08 658 goto err_setup;
1da177e4
LT		 659 }
660
2db10a08 661 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 662 return 0;
663err_setup_tx:
581d708e 664 e1000_free_all_rx_resources(adapter);
1da177e4
LT		 665err_setup_rx:
666 adapter->rx_ring = rx_old;
667 adapter->tx_ring = tx_old;
793fab72
VA		 668 kfree(rxdr);
669err_alloc_rx:
670 kfree(txdr);
671err_alloc_tx:
1da177e4 672 e1000_up(adapter);
2db10a08
AK		 673err_setup:
674 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 675 return err;
676}
677
64798845
JP		 678static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, int reg,
679 u32 mask, u32 write)
7e64300a 680{
1dc32918 681 struct e1000_hw *hw = &adapter->hw;
406874a7 682 static const u32 test[] =
7e64300a 683 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1dc32918 684 u8 __iomem *address = hw->hw_addr + reg;
406874a7 685 u32 read;
7e64300a
JP		 686 int i;
687
688 for (i = 0; i < ARRAY_SIZE(test); i++) {
689 writel(write & test[i], address);
690 read = readl(address);
691 if (read != (write & test[i] & mask)) {
692 DPRINTK(DRV, ERR, "pattern test reg %04X failed: "
693 "got 0x%08X expected 0x%08X\n",
cba0516d 694 reg, read, (write & test[i] & mask));
7e64300a
JP		 695 *data = reg;
696 return true;
697 }
698 }
699 return false;
1da177e4
LT		 700}
701
64798845
JP		 702static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, int reg,
703 u32 mask, u32 write)
7e64300a 704{
1dc32918
JP		 705 struct e1000_hw *hw = &adapter->hw;
706 u8 __iomem *address = hw->hw_addr + reg;
406874a7 707 u32 read;
7e64300a
JP		 708
709 writel(write & mask, address);
710 read = readl(address);
711 if ((read & mask) != (write & mask)) {
712 DPRINTK(DRV, ERR, "set/check reg %04X test failed: "
713 "got 0x%08X expected 0x%08X\n",
714 reg, (read & mask), (write & mask));
715 *data = reg;
716 return true;
717 }
718 return false;
1da177e4
LT		 719}
720
7e64300a
JP		 721#define REG_PATTERN_TEST(reg, mask, write) \
722 do { \
723 if (reg_pattern_test(adapter, data, \
1dc32918 724 (hw->mac_type >= e1000_82543) \
7e64300a
JP		 725 ? E1000_##reg : E1000_82542_##reg, \
726 mask, write)) \
727 return 1; \
728 } while (0)
729
730#define REG_SET_AND_CHECK(reg, mask, write) \
731 do { \
732 if (reg_set_and_check(adapter, data, \
1dc32918 733 (hw->mac_type >= e1000_82543) \
7e64300a
JP		 734 ? E1000_##reg : E1000_82542_##reg, \
735 mask, write)) \
736 return 1; \
737 } while (0)
738
64798845 739static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 740{
406874a7
JP		 741 u32 value, before, after;
742 u32 i, toggle;
1dc32918 743 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 744
745 /* The status register is Read Only, so a write should fail.
746 * Some bits that get toggled are ignored.
747 */
1532ecea 748
868d5309 749 /* there are several bits on newer hardware that are r/w */
1532ecea 750 toggle = 0xFFFFF833;
b01f6691 751
1dc32918
JP		 752 before = er32(STATUS);
753 value = (er32(STATUS) & toggle);
754 ew32(STATUS, toggle);
755 after = er32(STATUS) & toggle;
96838a40 756 if (value != after) {
b01f6691
MC		 757 DPRINTK(DRV, ERR, "failed STATUS register test got: "
758 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT		 759 *data = 1;
760 return 1;
761 }
b01f6691 762 /* restore previous status */
1dc32918 763 ew32(STATUS, before);
90fb5135 764
1532ecea
JB		 765 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
766 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
767 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
768 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
90fb5135 769
1da177e4
LT		 770 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
771 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
772 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
773 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
774 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
775 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
776 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
777 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
778 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
779 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
780
781 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
90fb5135 782
1532ecea 783 before = 0x06DFB3FE;
cd94dd0b 784 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT		 785 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
786
1dc32918 787 if (hw->mac_type >= e1000_82543) {
1da177e4 788
cd94dd0b 789 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 790 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
1532ecea 791 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT		 792 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
793 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
1532ecea 794 value = E1000_RAR_ENTRIES;
cd94dd0b 795 for (i = 0; i < value; i++) {
1da177e4 796 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
90fb5135 797 0xFFFFFFFF);
1da177e4
LT		 798 }
799
800 } else {
801
802 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
803 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
804 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
805 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
806
807 }
808
1532ecea 809 value = E1000_MC_TBL_SIZE;
cd94dd0b 810 for (i = 0; i < value; i++)
1da177e4
LT		 811 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
812
813 *data = 0;
814 return 0;
815}
816
64798845 817static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 818{
1dc32918 819 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 820 u16 temp;
821 u16 checksum = 0;
822 u16 i;
1da177e4
LT		 823
824 *data = 0;
825 /* Read and add up the contents of the EEPROM */
96838a40 826 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
1dc32918 827 if ((e1000_read_eeprom(hw, i, 1, &temp)) < 0) {
1da177e4
LT		 828 *data = 1;
829 break;
830 }
831 checksum += temp;
832 }
833
834 /* If Checksum is not Correct return error else test passed */
e982f17c 835 if ((checksum != (u16)EEPROM_SUM) && !(*data))
1da177e4
LT		 836 *data = 2;
837
838 return *data;
839}
840
64798845 841static irqreturn_t e1000_test_intr(int irq, void *data)
1da177e4 842{
e982f17c 843 struct net_device *netdev = (struct net_device *)data;
60490fe0 844 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 845 struct e1000_hw *hw = &adapter->hw;
1da177e4 846
1dc32918 847 adapter->test_icr |= er32(ICR);
1da177e4
LT		 848
849 return IRQ_HANDLED;
850}
851
64798845 852static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
1da177e4
LT		 853{
854 struct net_device *netdev = adapter->netdev;
406874a7 855 u32 mask, i = 0;
c3033b01 856 bool shared_int = true;
406874a7 857 u32 irq = adapter->pdev->irq;
1dc32918 858 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 859
860 *data = 0;
861
8fc897b0 862 /* NOTE: we don't test MSI interrupts here, yet */
1da177e4 863 /* Hook up test interrupt handler just for this test */
90fb5135
AK		 864 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
865 netdev))
c3033b01 866 shared_int = false;
8fc897b0 867 else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
90fb5135 868 netdev->name, netdev)) {
1da177e4
LT		 869 *data = 1;
870 return -1;
871 }
8fc897b0 872 DPRINTK(HW, INFO, "testing %s interrupt\n",
b9b6e78b 873 (shared_int ? "shared" : "unshared"));
1da177e4
LT		 874
875 /* Disable all the interrupts */
1dc32918 876 ew32(IMC, 0xFFFFFFFF);
f8ec4733 877 msleep(10);
1da177e4
LT		 878
879 /* Test each interrupt */
96838a40 880 for (; i < 10; i++) {
1da177e4
LT		 881
882 /* Interrupt to test */
883 mask = 1 << i;
884
76c224bc
AK		 885 if (!shared_int) {
886 /* Disable the interrupt to be reported in
887 * the cause register and then force the same
888 * interrupt and see if one gets posted. If
889 * an interrupt was posted to the bus, the
890 * test failed.
891 */
892 adapter->test_icr = 0;
1dc32918
JP		 893 ew32(IMC, mask);
894 ew32(ICS, mask);
f8ec4733 895 msleep(10);
76c224bc
AK		 896
897 if (adapter->test_icr & mask) {
898 *data = 3;
899 break;
900 }
1da177e4
LT		 901 }
902
903 /* Enable the interrupt to be reported in
904 * the cause register and then force the same
905 * interrupt and see if one gets posted. If
906 * an interrupt was not posted to the bus, the
907 * test failed.
908 */
909 adapter->test_icr = 0;
1dc32918
JP		 910 ew32(IMS, mask);
911 ew32(ICS, mask);
f8ec4733 912 msleep(10);
1da177e4 913
96838a40 914 if (!(adapter->test_icr & mask)) {
1da177e4
LT		 915 *data = 4;
916 break;
917 }
918
76c224bc 919 if (!shared_int) {
1da177e4
LT		 920 /* Disable the other interrupts to be reported in
921 * the cause register and then force the other
922 * interrupts and see if any get posted. If
923 * an interrupt was posted to the bus, the
924 * test failed.
925 */
926 adapter->test_icr = 0;
1dc32918
JP		 927 ew32(IMC, ~mask & 0x00007FFF);
928 ew32(ICS, ~mask & 0x00007FFF);
f8ec4733 929 msleep(10);
1da177e4 930
96838a40 931 if (adapter->test_icr) {
1da177e4
LT		 932 *data = 5;
933 break;
934 }
935 }
936 }
937
938 /* Disable all the interrupts */
1dc32918 939 ew32(IMC, 0xFFFFFFFF);
f8ec4733 940 msleep(10);
1da177e4
LT		 941
942 /* Unhook test interrupt handler */
943 free_irq(irq, netdev);
944
945 return *data;
946}
947
64798845 948static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1da177e4 949{
581d708e
MC		 950 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
951 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT		 952 struct pci_dev *pdev = adapter->pdev;
953 int i;
954
96838a40
JB		 955 if (txdr->desc && txdr->buffer_info) {
956 for (i = 0; i < txdr->count; i++) {
957 if (txdr->buffer_info[i].dma)
1da177e4
LT		 958 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
959 txdr->buffer_info[i].length,
960 PCI_DMA_TODEVICE);
96838a40 961 if (txdr->buffer_info[i].skb)
1da177e4
LT		 962 dev_kfree_skb(txdr->buffer_info[i].skb);
963 }
964 }
965
96838a40
JB		 966 if (rxdr->desc && rxdr->buffer_info) {
967 for (i = 0; i < rxdr->count; i++) {
968 if (rxdr->buffer_info[i].dma)
1da177e4
LT		 969 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
970 rxdr->buffer_info[i].length,
971 PCI_DMA_FROMDEVICE);
96838a40 972 if (rxdr->buffer_info[i].skb)
1da177e4
LT		 973 dev_kfree_skb(rxdr->buffer_info[i].skb);
974 }
975 }
976
f5645110 977 if (txdr->desc) {
1da177e4 978 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
6b27adb6
JL		 979 txdr->desc = NULL;
980 }
f5645110 981 if (rxdr->desc) {
1da177e4 982 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
6b27adb6
JL		 983 rxdr->desc = NULL;
984 }
1da177e4 985
b4558ea9 986 kfree(txdr->buffer_info);
6b27adb6 987 txdr->buffer_info = NULL;
b4558ea9 988 kfree(rxdr->buffer_info);
6b27adb6 989 rxdr->buffer_info = NULL;
f5645110 990
1da177e4
LT		 991 return;
992}
993
64798845 994static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1da177e4 995{
1dc32918 996 struct e1000_hw *hw = &adapter->hw;
581d708e
MC		 997 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
998 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 999 struct pci_dev *pdev = adapter->pdev;
406874a7 1000 u32 rctl;
1c7e5b12 1001 int i, ret_val;
1da177e4
LT		 1002
1003 /* Setup Tx descriptor ring and Tx buffers */
1004
96838a40
JB		 1005 if (!txdr->count)
1006 txdr->count = E1000_DEFAULT_TXD;
1da177e4 1007
c7be73bc
JP		 1008 txdr->buffer_info = kcalloc(txdr->count, sizeof(struct e1000_buffer),
1009 GFP_KERNEL);
1010 if (!txdr->buffer_info) {
1da177e4
LT		 1011 ret_val = 1;
1012 goto err_nomem;
1013 }
1da177e4
LT		 1014
1015 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1016 txdr->size = ALIGN(txdr->size, 4096);
c7be73bc
JP		 1017 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1018 if (!txdr->desc) {
1da177e4
LT		 1019 ret_val = 2;
1020 goto err_nomem;
1021 }
1022 memset(txdr->desc, 0, txdr->size);
1023 txdr->next_to_use = txdr->next_to_clean = 0;
1024
e982f17c
JP		 1025 ew32(TDBAL, ((u64)txdr->dma & 0x00000000FFFFFFFF));
1026 ew32(TDBAH, ((u64)txdr->dma >> 32));
1dc32918
JP		 1027 ew32(TDLEN, txdr->count * sizeof(struct e1000_tx_desc));
1028 ew32(TDH, 0);
1029 ew32(TDT, 0);
1030 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN |
1031 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1032 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1da177e4 1033
96838a40 1034 for (i = 0; i < txdr->count; i++) {
1da177e4
LT		 1035 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1036 struct sk_buff *skb;
1037 unsigned int size = 1024;
1038
c7be73bc
JP		 1039 skb = alloc_skb(size, GFP_KERNEL);
1040 if (!skb) {
1da177e4
LT		 1041 ret_val = 3;
1042 goto err_nomem;
1043 }
1044 skb_put(skb, size);
1045 txdr->buffer_info[i].skb = skb;
1046 txdr->buffer_info[i].length = skb->len;
1047 txdr->buffer_info[i].dma =
1048 pci_map_single(pdev, skb->data, skb->len,
1049 PCI_DMA_TODEVICE);
1050 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1051 tx_desc->lower.data = cpu_to_le32(skb->len);
1052 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1053 E1000_TXD_CMD_IFCS |
1054 E1000_TXD_CMD_RPS);
1055 tx_desc->upper.data = 0;
1056 }
1057
1058 /* Setup Rx descriptor ring and Rx buffers */
1059
96838a40
JB		 1060 if (!rxdr->count)
1061 rxdr->count = E1000_DEFAULT_RXD;
1da177e4 1062
c7be73bc
JP		 1063 rxdr->buffer_info = kcalloc(rxdr->count, sizeof(struct e1000_buffer),
1064 GFP_KERNEL);
1065 if (!rxdr->buffer_info) {
1da177e4
LT		 1066 ret_val = 4;
1067 goto err_nomem;
1068 }
1da177e4
LT		 1069
1070 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
c7be73bc
JP		 1071 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1072 if (!rxdr->desc) {
1da177e4
LT		 1073 ret_val = 5;
1074 goto err_nomem;
1075 }
1076 memset(rxdr->desc, 0, rxdr->size);
1077 rxdr->next_to_use = rxdr->next_to_clean = 0;
1078
1dc32918
JP		 1079 rctl = er32(RCTL);
1080 ew32(RCTL, rctl & ~E1000_RCTL_EN);
e982f17c
JP		 1081 ew32(RDBAL, ((u64)rxdr->dma & 0xFFFFFFFF));
1082 ew32(RDBAH, ((u64)rxdr->dma >> 32));
1dc32918
JP		 1083 ew32(RDLEN, rxdr->size);
1084 ew32(RDH, 0);
1085 ew32(RDT, 0);
1da177e4
LT		 1086 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1087 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918
JP		 1088 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1089 ew32(RCTL, rctl);
1da177e4 1090
96838a40 1091 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT		 1092 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1093 struct sk_buff *skb;
1094
c7be73bc
JP		 1095 skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN, GFP_KERNEL);
1096 if (!skb) {
1da177e4
LT		 1097 ret_val = 6;
1098 goto err_nomem;
1099 }
1100 skb_reserve(skb, NET_IP_ALIGN);
1101 rxdr->buffer_info[i].skb = skb;
1102 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1103 rxdr->buffer_info[i].dma =
1104 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1105 PCI_DMA_FROMDEVICE);
1106 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1107 memset(skb->data, 0x00, skb->len);
1108 }
1109
1110 return 0;
1111
1112err_nomem:
1113 e1000_free_desc_rings(adapter);
1114 return ret_val;
1115}
1116
64798845 1117static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1da177e4 1118{
1dc32918
JP		 1119 struct e1000_hw *hw = &adapter->hw;
1120
1da177e4 1121 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1dc32918
JP		 1122 e1000_write_phy_reg(hw, 29, 0x001F);
1123 e1000_write_phy_reg(hw, 30, 0x8FFC);
1124 e1000_write_phy_reg(hw, 29, 0x001A);
1125 e1000_write_phy_reg(hw, 30, 0x8FF0);
1da177e4
LT		 1126}
1127
64798845 1128static void e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1da177e4 1129{
1dc32918 1130 struct e1000_hw *hw = &adapter->hw;
406874a7 1131 u16 phy_reg;
1da177e4
LT		 1132
1133 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1134 * Extended PHY Specific Control Register to 25MHz clock. This
1135 * value defaults back to a 2.5MHz clock when the PHY is reset.
1136 */
1dc32918 1137 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1138 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1dc32918 1139 e1000_write_phy_reg(hw,
1da177e4
LT		 1140 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1141
1142 /* In addition, because of the s/w reset above, we need to enable
1143 * CRS on TX. This must be set for both full and half duplex
1144 * operation.
1145 */
1dc32918 1146 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1147 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1dc32918 1148 e1000_write_phy_reg(hw,
1da177e4
LT		 1149 M88E1000_PHY_SPEC_CTRL, phy_reg);
1150}
1151
64798845 1152static int e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1153{
1dc32918 1154 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1155 u32 ctrl_reg;
1156 u16 phy_reg;
1da177e4
LT		 1157
1158 /* Setup the Device Control Register for PHY loopback test. */
1159
1dc32918 1160 ctrl_reg = er32(CTRL);
1da177e4
LT		 1161 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1162 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1163 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1164 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1165 E1000_CTRL_FD); /* Force Duplex to FULL */
1166
1dc32918 1167 ew32(CTRL, ctrl_reg);
1da177e4
LT		 1168
1169 /* Read the PHY Specific Control Register (0x10) */
1dc32918 1170 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4
LT		 1171
1172 /* Clear Auto-Crossover bits in PHY Specific Control Register
1173 * (bits 6:5).
1174 */
1175 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1dc32918 1176 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1da177e4
LT		 1177
1178 /* Perform software reset on the PHY */
1dc32918 1179 e1000_phy_reset(hw);
1da177e4
LT		 1180
1181 /* Have to setup TX_CLK and TX_CRS after software reset */
1182 e1000_phy_reset_clk_and_crs(adapter);
1183
1dc32918 1184 e1000_write_phy_reg(hw, PHY_CTRL, 0x8100);
1da177e4
LT		 1185
1186 /* Wait for reset to complete. */
1187 udelay(500);
1188
1189 /* Have to setup TX_CLK and TX_CRS after software reset */
1190 e1000_phy_reset_clk_and_crs(adapter);
1191
1192 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1193 e1000_phy_disable_receiver(adapter);
1194
1195 /* Set the loopback bit in the PHY control register. */
1dc32918 1196 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1197 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1198 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT		 1199
1200 /* Setup TX_CLK and TX_CRS one more time. */
1201 e1000_phy_reset_clk_and_crs(adapter);
1202
1203 /* Check Phy Configuration */
1dc32918 1204 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
96838a40 1205 if (phy_reg != 0x4100)
1da177e4
LT		 1206 return 9;
1207
1dc32918 1208 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1209 if (phy_reg != 0x0070)
1da177e4
LT		 1210 return 10;
1211
1dc32918 1212 e1000_read_phy_reg(hw, 29, &phy_reg);
96838a40 1213 if (phy_reg != 0x001A)
1da177e4
LT		 1214 return 11;
1215
1216 return 0;
1217}
1218
64798845 1219static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1220{
1dc32918 1221 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1222 u32 ctrl_reg = 0;
1223 u32 stat_reg = 0;
1da177e4 1224
1dc32918 1225 hw->autoneg = false;
1da177e4 1226
1dc32918 1227 if (hw->phy_type == e1000_phy_m88) {
1da177e4 1228 /* Auto-MDI/MDIX Off */
1dc32918 1229 e1000_write_phy_reg(hw,
1da177e4
LT		 1230 M88E1000_PHY_SPEC_CTRL, 0x0808);
1231 /* reset to update Auto-MDI/MDIX */
1dc32918 1232 e1000_write_phy_reg(hw, PHY_CTRL, 0x9140);
1da177e4 1233 /* autoneg off */
1dc32918 1234 e1000_write_phy_reg(hw, PHY_CTRL, 0x8140);
1532ecea 1235 }
1da177e4 1236
1dc32918 1237 ctrl_reg = er32(CTRL);
cd94dd0b 1238
1532ecea
JB		 1239 /* force 1000, set loopback */
1240 e1000_write_phy_reg(hw, PHY_CTRL, 0x4140);
cd94dd0b 1241
1532ecea
JB		 1242 /* Now set up the MAC to the same speed/duplex as the PHY. */
1243 ctrl_reg = er32(CTRL);
1244 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1245 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1246 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1247 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1248 E1000_CTRL_FD); /* Force Duplex to FULL */
1da177e4 1249
1dc32918
JP		 1250 if (hw->media_type == e1000_media_type_copper &&
1251 hw->phy_type == e1000_phy_m88)
1da177e4 1252 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1253 else {
1da177e4
LT		 1254 /* Set the ILOS bit on the fiber Nic is half
1255 * duplex link is detected. */
1dc32918 1256 stat_reg = er32(STATUS);
96838a40 1257 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT		 1258 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1259 }
1260
1dc32918 1261 ew32(CTRL, ctrl_reg);
1da177e4
LT		 1262
1263 /* Disable the receiver on the PHY so when a cable is plugged in, the
1264 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1265 */
1dc32918 1266 if (hw->phy_type == e1000_phy_m88)
1da177e4
LT		 1267 e1000_phy_disable_receiver(adapter);
1268
1269 udelay(500);
1270
1271 return 0;
1272}
1273
64798845 1274static int e1000_set_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1275{
1dc32918 1276 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1277 u16 phy_reg = 0;
1278 u16 count = 0;
1da177e4 1279
1dc32918 1280 switch (hw->mac_type) {
1da177e4 1281 case e1000_82543:
1dc32918 1282 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1283 /* Attempt to setup Loopback mode on Non-integrated PHY.
1284 * Some PHY registers get corrupted at random, so
1285 * attempt this 10 times.
1286 */
96838a40 1287 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1288 count++ < 10);
96838a40 1289 if (count < 11)
1da177e4
LT		 1290 return 0;
1291 }
1292 break;
1293
1294 case e1000_82544:
1295 case e1000_82540:
1296 case e1000_82545:
1297 case e1000_82545_rev_3:
1298 case e1000_82546:
1299 case e1000_82546_rev_3:
1300 case e1000_82541:
1301 case e1000_82541_rev_2:
1302 case e1000_82547:
1303 case e1000_82547_rev_2:
1304 return e1000_integrated_phy_loopback(adapter);
1305 break;
1da177e4
LT		 1306 default:
1307 /* Default PHY loopback work is to read the MII
1308 * control register and assert bit 14 (loopback mode).
1309 */
1dc32918 1310 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1311 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1312 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT		 1313 return 0;
1314 break;
1315 }
1316
1317 return 8;
1318}
1319
64798845 1320static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1da177e4 1321{
49273163 1322 struct e1000_hw *hw = &adapter->hw;
406874a7 1323 u32 rctl;
1da177e4 1324
49273163
JK		 1325 if (hw->media_type == e1000_media_type_fiber ||
1326 hw->media_type == e1000_media_type_internal_serdes) {
1327 switch (hw->mac_type) {
1328 case e1000_82545:
1329 case e1000_82546:
1330 case e1000_82545_rev_3:
1331 case e1000_82546_rev_3:
1da177e4 1332 return e1000_set_phy_loopback(adapter);
49273163 1333 break;
49273163 1334 default:
1dc32918 1335 rctl = er32(RCTL);
1da177e4 1336 rctl |= E1000_RCTL_LBM_TCVR;
1dc32918 1337 ew32(RCTL, rctl);
1da177e4
LT		 1338 return 0;
1339 }
49273163 1340 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT		 1341 return e1000_set_phy_loopback(adapter);
1342
1343 return 7;
1344}
1345
64798845 1346static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1da177e4 1347{
49273163 1348 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1349 u32 rctl;
1350 u16 phy_reg;
1da177e4 1351
1dc32918 1352 rctl = er32(RCTL);
1da177e4 1353 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1dc32918 1354 ew32(RCTL, rctl);
1da177e4 1355
49273163 1356 switch (hw->mac_type) {
49273163
JK		 1357 case e1000_82545:
1358 case e1000_82546:
1359 case e1000_82545_rev_3:
1360 case e1000_82546_rev_3:
1361 default:
c3033b01 1362 hw->autoneg = true;
49273163
JK		 1363 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1364 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1365 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK		 1366 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1367 e1000_phy_reset(hw);
1da177e4 1368 }
49273163 1369 break;
1da177e4
LT		 1370 }
1371}
1372
64798845
JP		 1373static void e1000_create_lbtest_frame(struct sk_buff *skb,
1374 unsigned int frame_size)
1da177e4
LT		 1375{
1376 memset(skb->data, 0xFF, frame_size);
ce7393b9 1377 frame_size &= ~1;
1da177e4
LT		 1378 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1379 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1380 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1381}
1382
64798845
JP		 1383static int e1000_check_lbtest_frame(struct sk_buff *skb,
1384 unsigned int frame_size)
1da177e4 1385{
ce7393b9 1386 frame_size &= ~1;
96838a40
JB		 1387 if (*(skb->data + 3) == 0xFF) {
1388 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT		 1389 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1390 return 0;
1391 }
1392 }
1393 return 13;
1394}
1395
64798845 1396static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1da177e4 1397{
1dc32918 1398 struct e1000_hw *hw = &adapter->hw;
581d708e
MC		 1399 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1400 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1401 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC		 1402 int i, j, k, l, lc, good_cnt, ret_val=0;
1403 unsigned long time;
1da177e4 1404
1dc32918 1405 ew32(RDT, rxdr->count - 1);
1da177e4 1406
96838a40 1407 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC		 1408 * The idea is to wrap the largest ring a number of times using 64
1409 * send/receive pairs during each loop
1410 */
1da177e4 1411
96838a40 1412 if (rxdr->count <= txdr->count)
e4eff729
MC		 1413 lc = ((txdr->count / 64) * 2) + 1;
1414 else
1415 lc = ((rxdr->count / 64) * 2) + 1;
1416
1417 k = l = 0;
96838a40
JB		 1418 for (j = 0; j <= lc; j++) { /* loop count loop */
1419 for (i = 0; i < 64; i++) { /* send the packets */
1420 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1421 1024);
96838a40 1422 pci_dma_sync_single_for_device(pdev,
e4eff729
MC		 1423 txdr->buffer_info[k].dma,
1424 txdr->buffer_info[k].length,
1425 PCI_DMA_TODEVICE);
96838a40 1426 if (unlikely(++k == txdr->count)) k = 0;
e4eff729 1427 }
1dc32918 1428 ew32(TDT, k);
f8ec4733 1429 msleep(200);
e4eff729
MC		 1430 time = jiffies; /* set the start time for the receive */
1431 good_cnt = 0;
1432 do { /* receive the sent packets */
96838a40 1433 pci_dma_sync_single_for_cpu(pdev,
e4eff729
MC		 1434 rxdr->buffer_info[l].dma,
1435 rxdr->buffer_info[l].length,
1436 PCI_DMA_FROMDEVICE);
96838a40 1437
e4eff729
MC		 1438 ret_val = e1000_check_lbtest_frame(
1439 rxdr->buffer_info[l].skb,
1440 1024);
96838a40 1441 if (!ret_val)
e4eff729 1442 good_cnt++;
96838a40
JB		 1443 if (unlikely(++l == rxdr->count)) l = 0;
1444 /* time + 20 msecs (200 msecs on 2.4) is more than
1445 * enough time to complete the receives, if it's
e4eff729
MC		 1446 * exceeded, break and error off
1447 */
1448 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1449 if (good_cnt != 64) {
e4eff729 1450 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1451 break;
e4eff729 1452 }
96838a40 1453 if (jiffies >= (time + 2)) {
e4eff729
MC		 1454 ret_val = 14; /* error code for time out error */
1455 break;
1456 }
1457 } /* end loop count loop */
1da177e4
LT		 1458 return ret_val;
1459}
1460
64798845 1461static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1462{
c7be73bc
JP		 1463 *data = e1000_setup_desc_rings(adapter);
1464 if (*data)
57128197 1465 goto out;
c7be73bc
JP		 1466 *data = e1000_setup_loopback_test(adapter);
1467 if (*data)
57128197 1468 goto err_loopback;
1da177e4
LT		 1469 *data = e1000_run_loopback_test(adapter);
1470 e1000_loopback_cleanup(adapter);
57128197 1471
1da177e4 1472err_loopback:
57128197
JK		 1473 e1000_free_desc_rings(adapter);
1474out:
1da177e4
LT		 1475 return *data;
1476}
1477
64798845 1478static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1479{
1dc32918 1480 struct e1000_hw *hw = &adapter->hw;
1da177e4 1481 *data = 0;
1dc32918 1482 if (hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 1483 int i = 0;
be0f0719 1484 hw->serdes_has_link = false;
1da177e4 1485
2648345f
MC		 1486 /* On some blade server designs, link establishment
1487 * could take as long as 2-3 minutes */
1da177e4 1488 do {
1dc32918 1489 e1000_check_for_link(hw);
be0f0719 1490 if (hw->serdes_has_link)
1da177e4 1491 return *data;
f8ec4733 1492 msleep(20);
1da177e4
LT		 1493 } while (i++ < 3750);
1494
2648345f 1495 *data = 1;
1da177e4 1496 } else {
1dc32918
JP		 1497 e1000_check_for_link(hw);
1498 if (hw->autoneg) /* if auto_neg is set wait for it */
f8ec4733 1499 msleep(4000);
1da177e4 1500
1dc32918 1501 if (!(er32(STATUS) & E1000_STATUS_LU)) {
1da177e4
LT		 1502 *data = 1;
1503 }
1504 }
1505 return *data;
1506}
1507
64798845 1508static int e1000_get_sset_count(struct net_device *netdev, int sset)
1da177e4 1509{
b9f2c044
JG		 1510 switch (sset) {
1511 case ETH_SS_TEST:
1512 return E1000_TEST_LEN;
1513 case ETH_SS_STATS:
1514 return E1000_STATS_LEN;
1515 default:
1516 return -EOPNOTSUPP;
1517 }
1da177e4
LT		 1518}
1519
64798845
JP		 1520static void e1000_diag_test(struct net_device *netdev,
1521 struct ethtool_test *eth_test, u64 *data)
1da177e4 1522{
60490fe0 1523 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1524 struct e1000_hw *hw = &adapter->hw;
c3033b01 1525 bool if_running = netif_running(netdev);
1da177e4 1526
1314bbf3 1527 set_bit(__E1000_TESTING, &adapter->flags);
96838a40 1528 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT		 1529 /* Offline tests */
1530
1531 /* save speed, duplex, autoneg settings */
1dc32918
JP		 1532 u16 autoneg_advertised = hw->autoneg_advertised;
1533 u8 forced_speed_duplex = hw->forced_speed_duplex;
1534 u8 autoneg = hw->autoneg;
1da177e4 1535
d658266e
JB		 1536 DPRINTK(HW, INFO, "offline testing starting\n");
1537
1da177e4
LT		 1538 /* Link test performed before hardware reset so autoneg doesn't
1539 * interfere with test result */
96838a40 1540 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT		 1541 eth_test->flags |= ETH_TEST_FL_FAILED;
1542
96838a40 1543 if (if_running)
2db10a08
AK		 1544 /* indicate we're in test mode */
1545 dev_close(netdev);
1da177e4
LT		 1546 else
1547 e1000_reset(adapter);
1548
96838a40 1549 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT		 1550 eth_test->flags |= ETH_TEST_FL_FAILED;
1551
1552 e1000_reset(adapter);
96838a40 1553 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT		 1554 eth_test->flags |= ETH_TEST_FL_FAILED;
1555
1556 e1000_reset(adapter);
96838a40 1557 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT		 1558 eth_test->flags |= ETH_TEST_FL_FAILED;
1559
1560 e1000_reset(adapter);
d658266e
JB		 1561 /* make sure the phy is powered up */
1562 e1000_power_up_phy(adapter);
96838a40 1563 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT		 1564 eth_test->flags |= ETH_TEST_FL_FAILED;
1565
1566 /* restore speed, duplex, autoneg settings */
1dc32918
JP		 1567 hw->autoneg_advertised = autoneg_advertised;
1568 hw->forced_speed_duplex = forced_speed_duplex;
1569 hw->autoneg = autoneg;
1da177e4
LT		 1570
1571 e1000_reset(adapter);
1314bbf3 1572 clear_bit(__E1000_TESTING, &adapter->flags);
96838a40 1573 if (if_running)
2db10a08 1574 dev_open(netdev);
1da177e4 1575 } else {
d658266e 1576 DPRINTK(HW, INFO, "online testing starting\n");
1da177e4 1577 /* Online tests */
96838a40 1578 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT		 1579 eth_test->flags |= ETH_TEST_FL_FAILED;
1580
90fb5135 1581 /* Online tests aren't run; pass by default */
1da177e4
LT		 1582 data[0] = 0;
1583 data[1] = 0;
1584 data[2] = 0;
1585 data[3] = 0;
2db10a08 1586
1314bbf3 1587 clear_bit(__E1000_TESTING, &adapter->flags);
1da177e4 1588 }
352c9f85 1589 msleep_interruptible(4 * 1000);
1da177e4
LT		 1590}
1591
64798845
JP		 1592static int e1000_wol_exclusion(struct e1000_adapter *adapter,
1593 struct ethtool_wolinfo *wol)
1da177e4 1594{
1da177e4 1595 struct e1000_hw *hw = &adapter->hw;
120cd576 1596 int retval = 1; /* fail by default */
1da177e4 1597
120cd576 1598 switch (hw->device_id) {
dc1f71f6 1599 case E1000_DEV_ID_82542:
1da177e4
LT		 1600 case E1000_DEV_ID_82543GC_FIBER:
1601 case E1000_DEV_ID_82543GC_COPPER:
1602 case E1000_DEV_ID_82544EI_FIBER:
1603 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1604 case E1000_DEV_ID_82545EM_FIBER:
1605 case E1000_DEV_ID_82545EM_COPPER:
84916829 1606 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576
JB		 1607 case E1000_DEV_ID_82546GB_PCIE:
1608 /* these don't support WoL at all */
1da177e4 1609 wol->supported = 0;
120cd576 1610 break;
1da177e4
LT		 1611 case E1000_DEV_ID_82546EB_FIBER:
1612 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1613 /* Wake events not supported on port B */
1dc32918 1614 if (er32(STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1615 wol->supported = 0;
120cd576 1616 break;
1da177e4 1617 }
120cd576
JB		 1618 /* return success for non excluded adapter ports */
1619 retval = 0;
1620 break;
1621 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1622 /* quad port adapters only support WoL on port A */
1623 if (!adapter->quad_port_a) {
1624 wol->supported = 0;
1625 break;
1626 }
1627 /* return success for non excluded adapter ports */
1628 retval = 0;
1629 break;
1da177e4 1630 default:
120cd576
JB		 1631 /* dual port cards only support WoL on port A from now on
1632 * unless it was enabled in the eeprom for port B
1633 * so exclude FUNC_1 ports from having WoL enabled */
1dc32918 1634 if (er32(STATUS) & E1000_STATUS_FUNC_1 &&
120cd576
JB		 1635 !adapter->eeprom_wol) {
1636 wol->supported = 0;
1637 break;
1638 }
84916829 1639
120cd576
JB		 1640 retval = 0;
1641 }
1642
1643 return retval;
1644}
1645
64798845
JP		 1646static void e1000_get_wol(struct net_device *netdev,
1647 struct ethtool_wolinfo *wol)
120cd576
JB		 1648{
1649 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1650 struct e1000_hw *hw = &adapter->hw;
120cd576
JB		 1651
1652 wol->supported = WAKE_UCAST | WAKE_MCAST |
1653 WAKE_BCAST | WAKE_MAGIC;
1654 wol->wolopts = 0;
1655
1656 /* this function will set ->supported = 0 and return 1 if wol is not
1657 * supported by this hardware */
de126489
RW		 1658 if (e1000_wol_exclusion(adapter, wol) ||
1659 !device_can_wakeup(&adapter->pdev->dev))
1da177e4 1660 return;
120cd576
JB		 1661
1662 /* apply any specific unsupported masks here */
1dc32918 1663 switch (hw->device_id) {
120cd576
JB		 1664 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1665 /* KSP3 does not suppport UCAST wake-ups */
1666 wol->supported &= ~WAKE_UCAST;
1667
1668 if (adapter->wol & E1000_WUFC_EX)
1669 DPRINTK(DRV, ERR, "Interface does not support "
1670 "directed (unicast) frame wake-up packets\n");
1671 break;
1672 default:
1673 break;
1da177e4 1674 }
120cd576
JB		 1675
1676 if (adapter->wol & E1000_WUFC_EX)
1677 wol->wolopts |= WAKE_UCAST;
1678 if (adapter->wol & E1000_WUFC_MC)
1679 wol->wolopts |= WAKE_MCAST;
1680 if (adapter->wol & E1000_WUFC_BC)
1681 wol->wolopts |= WAKE_BCAST;
1682 if (adapter->wol & E1000_WUFC_MAG)
1683 wol->wolopts |= WAKE_MAGIC;
1684
1685 return;
1da177e4
LT		 1686}
1687
64798845 1688static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1da177e4 1689{
60490fe0 1690 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1691 struct e1000_hw *hw = &adapter->hw;
1692
120cd576
JB		 1693 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1694 return -EOPNOTSUPP;
1695
de126489
RW		 1696 if (e1000_wol_exclusion(adapter, wol) ||
1697 !device_can_wakeup(&adapter->pdev->dev))
1da177e4
LT		 1698 return wol->wolopts ? -EOPNOTSUPP : 0;
1699
120cd576 1700 switch (hw->device_id) {
84916829 1701 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829
JK		 1702 if (wol->wolopts & WAKE_UCAST) {
1703 DPRINTK(DRV, ERR, "Interface does not support "
1704 "directed (unicast) frame wake-up packets\n");
1705 return -EOPNOTSUPP;
1706 }
120cd576 1707 break;
1da177e4 1708 default:
120cd576 1709 break;
1da177e4
LT		 1710 }
1711
120cd576
JB		 1712 /* these settings will always override what we currently have */
1713 adapter->wol = 0;
1714
1715 if (wol->wolopts & WAKE_UCAST)
1716 adapter->wol |= E1000_WUFC_EX;
1717 if (wol->wolopts & WAKE_MCAST)
1718 adapter->wol |= E1000_WUFC_MC;
1719 if (wol->wolopts & WAKE_BCAST)
1720 adapter->wol |= E1000_WUFC_BC;
1721 if (wol->wolopts & WAKE_MAGIC)
1722 adapter->wol |= E1000_WUFC_MAG;
1723
de126489
RW		 1724 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1725
1da177e4
LT		 1726 return 0;
1727}
1728
1729/* toggle LED 4 times per second = 2 "blinks" per second */
1730#define E1000_ID_INTERVAL (HZ/4)
1731
1732/* bit defines for adapter->led_status */
1733#define E1000_LED_ON 0
1734
64798845 1735static void e1000_led_blink_callback(unsigned long data)
1da177e4
LT		 1736{
1737 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1dc32918 1738 struct e1000_hw *hw = &adapter->hw;
1da177e4 1739
96838a40 1740 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1dc32918 1741 e1000_led_off(hw);
1da177e4 1742 else
1dc32918 1743 e1000_led_on(hw);
1da177e4
LT		 1744
1745 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1746}
1747
64798845 1748static int e1000_phys_id(struct net_device *netdev, u32 data)
1da177e4 1749{
60490fe0 1750 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1751 struct e1000_hw *hw = &adapter->hw;
1da177e4 1752
abec42a4
SH		 1753 if (!data)
1754 data = INT_MAX;
1da177e4 1755
1532ecea
JB		 1756 if (!adapter->blink_timer.function) {
1757 init_timer(&adapter->blink_timer);
1758 adapter->blink_timer.function = e1000_led_blink_callback;
1759 adapter->blink_timer.data = (unsigned long)adapter;
1da177e4 1760 }
1532ecea
JB		 1761 e1000_setup_led(hw);
1762 mod_timer(&adapter->blink_timer, jiffies);
1763 msleep_interruptible(data * 1000);
1764 del_timer_sync(&adapter->blink_timer);
1da177e4 1765
1dc32918 1766 e1000_led_off(hw);
1da177e4 1767 clear_bit(E1000_LED_ON, &adapter->led_status);
1dc32918 1768 e1000_cleanup_led(hw);
1da177e4
LT		 1769
1770 return 0;
1771}
1772
94c9e5a8
JB		 1773static int e1000_get_coalesce(struct net_device *netdev,
1774 struct ethtool_coalesce *ec)
1775{
1776 struct e1000_adapter *adapter = netdev_priv(netdev);
1777
1778 if (adapter->hw.mac_type < e1000_82545)
1779 return -EOPNOTSUPP;
1780
1781 if (adapter->itr_setting <= 3)
1782 ec->rx_coalesce_usecs = adapter->itr_setting;
1783 else
1784 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1785
1786 return 0;
1787}
1788
1789static int e1000_set_coalesce(struct net_device *netdev,
1790 struct ethtool_coalesce *ec)
1791{
1792 struct e1000_adapter *adapter = netdev_priv(netdev);
1793 struct e1000_hw *hw = &adapter->hw;
1794
1795 if (hw->mac_type < e1000_82545)
1796 return -EOPNOTSUPP;
1797
1798 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
1799 ((ec->rx_coalesce_usecs > 3) &&
1800 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
1801 (ec->rx_coalesce_usecs == 2))
1802 return -EINVAL;
1803
1804 if (ec->rx_coalesce_usecs <= 3) {
1805 adapter->itr = 20000;
1806 adapter->itr_setting = ec->rx_coalesce_usecs;
1807 } else {
1808 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
1809 adapter->itr_setting = adapter->itr & ~3;
1810 }
1811
1812 if (adapter->itr_setting != 0)
1813 ew32(ITR, 1000000000 / (adapter->itr * 256));
1814 else
1815 ew32(ITR, 0);
1816
1817 return 0;
1818}
1819
64798845 1820static int e1000_nway_reset(struct net_device *netdev)
1da177e4 1821{
60490fe0 1822 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK		 1823 if (netif_running(netdev))
1824 e1000_reinit_locked(adapter);
1da177e4
LT		 1825 return 0;
1826}
1827
64798845
JP		 1828static void e1000_get_ethtool_stats(struct net_device *netdev,
1829 struct ethtool_stats *stats, u64 *data)
1da177e4 1830{
60490fe0 1831 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1832 int i;
1833
1834 e1000_update_stats(adapter);
7bfa4816
JK		 1835 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1836 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1837 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
406874a7 1838 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1da177e4 1839 }
7bfa4816 1840/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT		 1841}
1842
64798845
JP		 1843static void e1000_get_strings(struct net_device *netdev, u32 stringset,
1844 u8 *data)
1da177e4 1845{
406874a7 1846 u8 *p = data;
1da177e4
LT		 1847 int i;
1848
96838a40 1849 switch (stringset) {
1da177e4 1850 case ETH_SS_TEST:
96838a40 1851 memcpy(data, *e1000_gstrings_test,
c32bc6e9 1852 sizeof(e1000_gstrings_test));
1da177e4
LT		 1853 break;
1854 case ETH_SS_STATS:
7bfa4816
JK		 1855 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1856 memcpy(p, e1000_gstrings_stats[i].stat_string,
1857 ETH_GSTRING_LEN);
1858 p += ETH_GSTRING_LEN;
1859 }
7bfa4816 1860/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT		 1861 break;
1862 }
1863}
1864
7282d491 1865static const struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT		 1866 .get_settings = e1000_get_settings,
1867 .set_settings = e1000_set_settings,
1868 .get_drvinfo = e1000_get_drvinfo,
1869 .get_regs_len = e1000_get_regs_len,
1870 .get_regs = e1000_get_regs,
1871 .get_wol = e1000_get_wol,
1872 .set_wol = e1000_set_wol,
8fc897b0
AK		 1873 .get_msglevel = e1000_get_msglevel,
1874 .set_msglevel = e1000_set_msglevel,
1da177e4
LT		 1875 .nway_reset = e1000_nway_reset,
1876 .get_link = ethtool_op_get_link,
1877 .get_eeprom_len = e1000_get_eeprom_len,
1878 .get_eeprom = e1000_get_eeprom,
1879 .set_eeprom = e1000_set_eeprom,
1880 .get_ringparam = e1000_get_ringparam,
1881 .set_ringparam = e1000_set_ringparam,
8fc897b0
AK		 1882 .get_pauseparam = e1000_get_pauseparam,
1883 .set_pauseparam = e1000_set_pauseparam,
1884 .get_rx_csum = e1000_get_rx_csum,
1885 .set_rx_csum = e1000_set_rx_csum,
1886 .get_tx_csum = e1000_get_tx_csum,
1887 .set_tx_csum = e1000_set_tx_csum,
8fc897b0 1888 .set_sg = ethtool_op_set_sg,
8fc897b0 1889 .set_tso = e1000_set_tso,
1da177e4
LT		 1890 .self_test = e1000_diag_test,
1891 .get_strings = e1000_get_strings,
1892 .phys_id = e1000_phys_id,
1da177e4 1893 .get_ethtool_stats = e1000_get_ethtool_stats,
94c9e5a8
JB		 1894 .get_sset_count = e1000_get_sset_count,
1895 .get_coalesce = e1000_get_coalesce,
1896 .set_coalesce = e1000_set_coalesce,
1da177e4
LT		 1897};
1898
1899void e1000_set_ethtool_ops(struct net_device *netdev)
1900{
1901 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1902}