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e1000: Fix Quadport Wake on LAN
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
32
33#include <asm/uaccess.h>
34
35extern char e1000_driver_name[];
36extern char e1000_driver_version[];
37
38extern int e1000_up(struct e1000_adapter *adapter);
39extern void e1000_down(struct e1000_adapter *adapter);
40extern void e1000_reset(struct e1000_adapter *adapter);
41extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
581d708e
MC		 42extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
43extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
44extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
45extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
1da177e4
LT		 46extern void e1000_update_stats(struct e1000_adapter *adapter);
47
48struct e1000_stats {
49 char stat_string[ETH_GSTRING_LEN];
50 int sizeof_stat;
51 int stat_offset;
52};
53
54#define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
55 offsetof(struct e1000_adapter, m)
56static const struct e1000_stats e1000_gstrings_stats[] = {
57 { "rx_packets", E1000_STAT(net_stats.rx_packets) },
58 { "tx_packets", E1000_STAT(net_stats.tx_packets) },
59 { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
60 { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
61 { "rx_errors", E1000_STAT(net_stats.rx_errors) },
62 { "tx_errors", E1000_STAT(net_stats.tx_errors) },
1da177e4
LT		 63 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
64 { "multicast", E1000_STAT(net_stats.multicast) },
65 { "collisions", E1000_STAT(net_stats.collisions) },
66 { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
67 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
68 { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
69 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
70 { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) },
2648345f 71 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
1da177e4
LT		 72 { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
73 { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
74 { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
75 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
76 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
77 { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
78 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
79 { "tx_deferred_ok", E1000_STAT(stats.dc) },
80 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
81 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 82 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
1da177e4
LT		 83 { "rx_long_length_errors", E1000_STAT(stats.roc) },
84 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
85 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
86 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
87 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
88 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
89 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
90 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
91 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
92 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
93 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9
MC		 94 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
95 { "rx_header_split", E1000_STAT(rx_hdr_split) },
6b7660cd 96 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
1da177e4 97};
7bfa4816 98
7bfa4816 99#define E1000_QUEUE_STATS_LEN 0
7bfa4816 100#define E1000_GLOBAL_STATS_LEN \
1da177e4 101 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
7bfa4816 102#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT		 103static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
104 "Register test (offline)", "Eeprom test (offline)",
105 "Interrupt test (offline)", "Loopback test (offline)",
106 "Link test (on/offline)"
107};
108#define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
109
110static int
111e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
112{
60490fe0 113 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 114 struct e1000_hw *hw = &adapter->hw;
115
96838a40 116 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 117
118 ecmd->supported = (SUPPORTED_10baseT_Half |
119 SUPPORTED_10baseT_Full |
120 SUPPORTED_100baseT_Half |
121 SUPPORTED_100baseT_Full |
122 SUPPORTED_1000baseT_Full|
123 SUPPORTED_Autoneg |
124 SUPPORTED_TP);
125
126 ecmd->advertising = ADVERTISED_TP;
127
96838a40 128 if (hw->autoneg == 1) {
1da177e4
LT		 129 ecmd->advertising |= ADVERTISED_Autoneg;
130
131 /* the e1000 autoneg seems to match ethtool nicely */
132
133 ecmd->advertising |= hw->autoneg_advertised;
134 }
135
136 ecmd->port = PORT_TP;
137 ecmd->phy_address = hw->phy_addr;
138
96838a40 139 if (hw->mac_type == e1000_82543)
1da177e4
LT		 140 ecmd->transceiver = XCVR_EXTERNAL;
141 else
142 ecmd->transceiver = XCVR_INTERNAL;
143
144 } else {
145 ecmd->supported = (SUPPORTED_1000baseT_Full |
146 SUPPORTED_FIBRE |
147 SUPPORTED_Autoneg);
148
012609a8
MC		 149 ecmd->advertising = (ADVERTISED_1000baseT_Full |
150 ADVERTISED_FIBRE |
151 ADVERTISED_Autoneg);
1da177e4
LT		 152
153 ecmd->port = PORT_FIBRE;
154
96838a40 155 if (hw->mac_type >= e1000_82545)
1da177e4
LT		 156 ecmd->transceiver = XCVR_INTERNAL;
157 else
158 ecmd->transceiver = XCVR_EXTERNAL;
159 }
160
96838a40 161 if (netif_carrier_ok(adapter->netdev)) {
1da177e4
LT		 162
163 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
164 &adapter->link_duplex);
165 ecmd->speed = adapter->link_speed;
166
167 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
168 * and HALF_DUPLEX != DUPLEX_HALF */
169
96838a40 170 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT		 171 ecmd->duplex = DUPLEX_FULL;
172 else
173 ecmd->duplex = DUPLEX_HALF;
174 } else {
175 ecmd->speed = -1;
176 ecmd->duplex = -1;
177 }
178
179 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
180 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
181 return 0;
182}
183
184static int
185e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
186{
60490fe0 187 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 188 struct e1000_hw *hw = &adapter->hw;
189
57128197
JK		 190 /* When SoL/IDER sessions are active, autoneg/speed/duplex
191 * cannot be changed */
192 if (e1000_check_phy_reset_block(hw)) {
193 DPRINTK(DRV, ERR, "Cannot change link characteristics "
194 "when SoL/IDER is active.\n");
195 return -EINVAL;
196 }
197
198 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 199 hw->autoneg = 1;
96838a40 200 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC		 201 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
202 ADVERTISED_FIBRE |
203 ADVERTISED_Autoneg;
96838a40 204 else
012609a8
MC		 205 hw->autoneg_advertised = ADVERTISED_10baseT_Half |
206 ADVERTISED_10baseT_Full |
207 ADVERTISED_100baseT_Half |
208 ADVERTISED_100baseT_Full |
209 ADVERTISED_1000baseT_Full|
210 ADVERTISED_Autoneg |
211 ADVERTISED_TP;
212 ecmd->advertising = hw->autoneg_advertised;
1da177e4 213 } else
96838a40 214 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
1da177e4
LT		 215 return -EINVAL;
216
217 /* reset the link */
218
96838a40 219 if (netif_running(adapter->netdev)) {
1da177e4
LT		 220 e1000_down(adapter);
221 e1000_reset(adapter);
222 e1000_up(adapter);
223 } else
224 e1000_reset(adapter);
225
226 return 0;
227}
228
229static void
230e1000_get_pauseparam(struct net_device *netdev,
231 struct ethtool_pauseparam *pause)
232{
60490fe0 233 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 234 struct e1000_hw *hw = &adapter->hw;
235
96838a40 236 pause->autoneg =
1da177e4 237 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40
JB		 238
239 if (hw->fc == e1000_fc_rx_pause)
1da177e4 240 pause->rx_pause = 1;
96838a40 241 else if (hw->fc == e1000_fc_tx_pause)
1da177e4 242 pause->tx_pause = 1;
96838a40 243 else if (hw->fc == e1000_fc_full) {
1da177e4
LT		 244 pause->rx_pause = 1;
245 pause->tx_pause = 1;
246 }
247}
248
249static int
250e1000_set_pauseparam(struct net_device *netdev,
251 struct ethtool_pauseparam *pause)
252{
60490fe0 253 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 254 struct e1000_hw *hw = &adapter->hw;
96838a40 255
1da177e4
LT		 256 adapter->fc_autoneg = pause->autoneg;
257
96838a40 258 if (pause->rx_pause && pause->tx_pause)
1da177e4 259 hw->fc = e1000_fc_full;
96838a40 260 else if (pause->rx_pause && !pause->tx_pause)
1da177e4 261 hw->fc = e1000_fc_rx_pause;
96838a40 262 else if (!pause->rx_pause && pause->tx_pause)
1da177e4 263 hw->fc = e1000_fc_tx_pause;
96838a40 264 else if (!pause->rx_pause && !pause->tx_pause)
1da177e4
LT		 265 hw->fc = e1000_fc_none;
266
267 hw->original_fc = hw->fc;
268
96838a40
JB		 269 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
270 if (netif_running(adapter->netdev)) {
1da177e4
LT		 271 e1000_down(adapter);
272 e1000_up(adapter);
273 } else
274 e1000_reset(adapter);
96838a40 275 } else
1da177e4
LT		 276 return ((hw->media_type == e1000_media_type_fiber) ?
277 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 278
1da177e4
LT		 279 return 0;
280}
281
282static uint32_t
283e1000_get_rx_csum(struct net_device *netdev)
284{
60490fe0 285 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 286 return adapter->rx_csum;
287}
288
289static int
290e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
291{
60490fe0 292 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 293 adapter->rx_csum = data;
294
96838a40 295 if (netif_running(netdev)) {
1da177e4
LT		 296 e1000_down(adapter);
297 e1000_up(adapter);
298 } else
299 e1000_reset(adapter);
300 return 0;
301}
96838a40 302
1da177e4
LT		 303static uint32_t
304e1000_get_tx_csum(struct net_device *netdev)
305{
306 return (netdev->features & NETIF_F_HW_CSUM) != 0;
307}
308
309static int
310e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
311{
60490fe0 312 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 313
96838a40 314 if (adapter->hw.mac_type < e1000_82543) {
1da177e4
LT		 315 if (!data)
316 return -EINVAL;
317 return 0;
318 }
319
320 if (data)
321 netdev->features |= NETIF_F_HW_CSUM;
322 else
323 netdev->features &= ~NETIF_F_HW_CSUM;
324
325 return 0;
326}
327
328#ifdef NETIF_F_TSO
329static int
330e1000_set_tso(struct net_device *netdev, uint32_t data)
331{
60490fe0 332 struct e1000_adapter *adapter = netdev_priv(netdev);
96838a40
JB		 333 if ((adapter->hw.mac_type < e1000_82544) ||
334 (adapter->hw.mac_type == e1000_82547))
1da177e4
LT		 335 return data ? -EINVAL : 0;
336
337 if (data)
338 netdev->features |= NETIF_F_TSO;
339 else
340 netdev->features &= ~NETIF_F_TSO;
341 return 0;
96838a40 342}
1da177e4
LT		 343#endif /* NETIF_F_TSO */
344
345static uint32_t
346e1000_get_msglevel(struct net_device *netdev)
347{
60490fe0 348 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 349 return adapter->msg_enable;
350}
351
352static void
353e1000_set_msglevel(struct net_device *netdev, uint32_t data)
354{
60490fe0 355 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 356 adapter->msg_enable = data;
357}
358
96838a40 359static int
1da177e4
LT		 360e1000_get_regs_len(struct net_device *netdev)
361{
362#define E1000_REGS_LEN 32
363 return E1000_REGS_LEN * sizeof(uint32_t);
364}
365
366static void
367e1000_get_regs(struct net_device *netdev,
368 struct ethtool_regs *regs, void *p)
369{
60490fe0 370 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 371 struct e1000_hw *hw = &adapter->hw;
372 uint32_t *regs_buff = p;
373 uint16_t phy_data;
374
375 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
376
377 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
378
379 regs_buff[0] = E1000_READ_REG(hw, CTRL);
380 regs_buff[1] = E1000_READ_REG(hw, STATUS);
381
382 regs_buff[2] = E1000_READ_REG(hw, RCTL);
383 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
384 regs_buff[4] = E1000_READ_REG(hw, RDH);
385 regs_buff[5] = E1000_READ_REG(hw, RDT);
386 regs_buff[6] = E1000_READ_REG(hw, RDTR);
387
388 regs_buff[7] = E1000_READ_REG(hw, TCTL);
389 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
390 regs_buff[9] = E1000_READ_REG(hw, TDH);
391 regs_buff[10] = E1000_READ_REG(hw, TDT);
392 regs_buff[11] = E1000_READ_REG(hw, TIDV);
393
394 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 395 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT		 396 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
397 IGP01E1000_PHY_AGC_A);
398 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
399 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
400 regs_buff[13] = (uint32_t)phy_data; /* cable length */
401 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
402 IGP01E1000_PHY_AGC_B);
403 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
404 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
405 regs_buff[14] = (uint32_t)phy_data; /* cable length */
406 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
407 IGP01E1000_PHY_AGC_C);
408 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
409 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
410 regs_buff[15] = (uint32_t)phy_data; /* cable length */
411 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
412 IGP01E1000_PHY_AGC_D);
413 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
414 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
415 regs_buff[16] = (uint32_t)phy_data; /* cable length */
416 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
417 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
418 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
419 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
420 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
421 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
422 IGP01E1000_PHY_PCS_INIT_REG);
423 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
424 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
425 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
426 regs_buff[20] = 0; /* polarity correction enabled (always) */
427 regs_buff[22] = 0; /* phy receive errors (unavailable) */
428 regs_buff[23] = regs_buff[18]; /* mdix mode */
429 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
430 } else {
431 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
432 regs_buff[13] = (uint32_t)phy_data; /* cable length */
433 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
434 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
435 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
436 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
437 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
438 regs_buff[18] = regs_buff[13]; /* cable polarity */
439 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
440 regs_buff[20] = regs_buff[17]; /* polarity correction */
441 /* phy receive errors */
442 regs_buff[22] = adapter->phy_stats.receive_errors;
443 regs_buff[23] = regs_buff[13]; /* mdix mode */
444 }
445 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
446 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
447 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
448 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 449 if (hw->mac_type >= e1000_82540 &&
1da177e4
LT		 450 hw->media_type == e1000_media_type_copper) {
451 regs_buff[26] = E1000_READ_REG(hw, MANC);
452 }
453}
454
455static int
456e1000_get_eeprom_len(struct net_device *netdev)
457{
60490fe0 458 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 459 return adapter->hw.eeprom.word_size * 2;
460}
461
462static int
463e1000_get_eeprom(struct net_device *netdev,
464 struct ethtool_eeprom *eeprom, uint8_t *bytes)
465{
60490fe0 466 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 467 struct e1000_hw *hw = &adapter->hw;
468 uint16_t *eeprom_buff;
469 int first_word, last_word;
470 int ret_val = 0;
471 uint16_t i;
472
96838a40 473 if (eeprom->len == 0)
1da177e4
LT		 474 return -EINVAL;
475
476 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
477
478 first_word = eeprom->offset >> 1;
479 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
480
481 eeprom_buff = kmalloc(sizeof(uint16_t) *
482 (last_word - first_word + 1), GFP_KERNEL);
96838a40 483 if (!eeprom_buff)
1da177e4
LT		 484 return -ENOMEM;
485
96838a40 486 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT		 487 ret_val = e1000_read_eeprom(hw, first_word,
488 last_word - first_word + 1,
489 eeprom_buff);
490 else {
491 for (i = 0; i < last_word - first_word + 1; i++)
96838a40 492 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
1da177e4
LT		 493 &eeprom_buff[i])))
494 break;
495 }
496
497 /* Device's eeprom is always little-endian, word addressable */
498 for (i = 0; i < last_word - first_word + 1; i++)
499 le16_to_cpus(&eeprom_buff[i]);
500
501 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
502 eeprom->len);
503 kfree(eeprom_buff);
504
505 return ret_val;
506}
507
508static int
509e1000_set_eeprom(struct net_device *netdev,
510 struct ethtool_eeprom *eeprom, uint8_t *bytes)
511{
60490fe0 512 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 513 struct e1000_hw *hw = &adapter->hw;
514 uint16_t *eeprom_buff;
515 void *ptr;
516 int max_len, first_word, last_word, ret_val = 0;
517 uint16_t i;
518
96838a40 519 if (eeprom->len == 0)
1da177e4
LT		 520 return -EOPNOTSUPP;
521
96838a40 522 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT		 523 return -EFAULT;
524
525 max_len = hw->eeprom.word_size * 2;
526
527 first_word = eeprom->offset >> 1;
528 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
529 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 530 if (!eeprom_buff)
1da177e4
LT		 531 return -ENOMEM;
532
533 ptr = (void *)eeprom_buff;
534
96838a40 535 if (eeprom->offset & 1) {
1da177e4
LT		 536 /* need read/modify/write of first changed EEPROM word */
537 /* only the second byte of the word is being modified */
538 ret_val = e1000_read_eeprom(hw, first_word, 1,
539 &eeprom_buff[0]);
540 ptr++;
541 }
96838a40 542 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
1da177e4
LT		 543 /* need read/modify/write of last changed EEPROM word */
544 /* only the first byte of the word is being modified */
545 ret_val = e1000_read_eeprom(hw, last_word, 1,
546 &eeprom_buff[last_word - first_word]);
547 }
548
549 /* Device's eeprom is always little-endian, word addressable */
550 for (i = 0; i < last_word - first_word + 1; i++)
551 le16_to_cpus(&eeprom_buff[i]);
552
553 memcpy(ptr, bytes, eeprom->len);
554
555 for (i = 0; i < last_word - first_word + 1; i++)
556 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
557
558 ret_val = e1000_write_eeprom(hw, first_word,
559 last_word - first_word + 1, eeprom_buff);
560
96838a40 561 /* Update the checksum over the first part of the EEPROM if needed
a7990ba6 562 * and flush shadow RAM for 82573 conrollers */
96838a40 563 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
a7990ba6 564 (hw->mac_type == e1000_82573)))
1da177e4
LT		 565 e1000_update_eeprom_checksum(hw);
566
567 kfree(eeprom_buff);
568 return ret_val;
569}
570
571static void
572e1000_get_drvinfo(struct net_device *netdev,
573 struct ethtool_drvinfo *drvinfo)
574{
60490fe0 575 struct e1000_adapter *adapter = netdev_priv(netdev);
a2917e22
JK		 576 char firmware_version[32];
577 uint16_t eeprom_data;
1da177e4
LT		 578
579 strncpy(drvinfo->driver, e1000_driver_name, 32);
580 strncpy(drvinfo->version, e1000_driver_version, 32);
a2917e22
JK		 581
582 /* EEPROM image version # is reported as firmware version # for
583 * 8257{1|2|3} controllers */
584 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
585 switch (adapter->hw.mac_type) {
586 case e1000_82571:
587 case e1000_82572:
588 case e1000_82573:
589 sprintf(firmware_version, "%d.%d-%d",
590 (eeprom_data & 0xF000) >> 12,
591 (eeprom_data & 0x0FF0) >> 4,
592 eeprom_data & 0x000F);
593 break;
594 default:
595 sprintf(firmware_version, "N/A");
596 }
597
598 strncpy(drvinfo->fw_version, firmware_version, 32);
1da177e4
LT		 599 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
600 drvinfo->n_stats = E1000_STATS_LEN;
601 drvinfo->testinfo_len = E1000_TEST_LEN;
602 drvinfo->regdump_len = e1000_get_regs_len(netdev);
603 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
604}
605
606static void
607e1000_get_ringparam(struct net_device *netdev,
608 struct ethtool_ringparam *ring)
609{
60490fe0 610 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 611 e1000_mac_type mac_type = adapter->hw.mac_type;
581d708e
MC		 612 struct e1000_tx_ring *txdr = adapter->tx_ring;
613 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT		 614
615 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
616 E1000_MAX_82544_RXD;
617 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
618 E1000_MAX_82544_TXD;
619 ring->rx_mini_max_pending = 0;
620 ring->rx_jumbo_max_pending = 0;
621 ring->rx_pending = rxdr->count;
622 ring->tx_pending = txdr->count;
623 ring->rx_mini_pending = 0;
624 ring->rx_jumbo_pending = 0;
625}
626
96838a40 627static int
1da177e4
LT		 628e1000_set_ringparam(struct net_device *netdev,
629 struct ethtool_ringparam *ring)
630{
60490fe0 631 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 632 e1000_mac_type mac_type = adapter->hw.mac_type;
581d708e
MC		 633 struct e1000_tx_ring *txdr, *tx_old, *tx_new;
634 struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
635 int i, err, tx_ring_size, rx_ring_size;
636
0989aa43
JK		 637 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
638 return -EINVAL;
639
f56799ea
JK		 640 tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
641 rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 642
643 if (netif_running(adapter->netdev))
644 e1000_down(adapter);
1da177e4
LT		 645
646 tx_old = adapter->tx_ring;
647 rx_old = adapter->rx_ring;
648
581d708e
MC		 649 adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
650 if (!adapter->tx_ring) {
651 err = -ENOMEM;
652 goto err_setup_rx;
653 }
654 memset(adapter->tx_ring, 0, tx_ring_size);
655
656 adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
657 if (!adapter->rx_ring) {
658 kfree(adapter->tx_ring);
659 err = -ENOMEM;
660 goto err_setup_rx;
661 }
662 memset(adapter->rx_ring, 0, rx_ring_size);
663
664 txdr = adapter->tx_ring;
665 rxdr = adapter->rx_ring;
666
1da177e4
LT		 667 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
668 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
669 E1000_MAX_RXD : E1000_MAX_82544_RXD));
96838a40 670 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4
LT		 671
672 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
673 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
674 E1000_MAX_TXD : E1000_MAX_82544_TXD));
96838a40 675 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 676
f56799ea 677 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 678 txdr[i].count = txdr->count;
f56799ea 679 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 680 rxdr[i].count = rxdr->count;
581d708e 681
96838a40 682 if (netif_running(adapter->netdev)) {
1da177e4 683 /* Try to get new resources before deleting old */
581d708e 684 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4 685 goto err_setup_rx;
581d708e 686 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 687 goto err_setup_tx;
688
689 /* save the new, restore the old in order to free it,
690 * then restore the new back again */
691
692 rx_new = adapter->rx_ring;
693 tx_new = adapter->tx_ring;
694 adapter->rx_ring = rx_old;
695 adapter->tx_ring = tx_old;
581d708e
MC		 696 e1000_free_all_rx_resources(adapter);
697 e1000_free_all_tx_resources(adapter);
698 kfree(tx_old);
699 kfree(rx_old);
1da177e4
LT		 700 adapter->rx_ring = rx_new;
701 adapter->tx_ring = tx_new;
96838a40 702 if ((err = e1000_up(adapter)))
1da177e4
LT		 703 return err;
704 }
705
706 return 0;
707err_setup_tx:
581d708e 708 e1000_free_all_rx_resources(adapter);
1da177e4
LT		 709err_setup_rx:
710 adapter->rx_ring = rx_old;
711 adapter->tx_ring = tx_old;
712 e1000_up(adapter);
713 return err;
714}
715
716#define REG_PATTERN_TEST(R, M, W) \
717{ \
718 uint32_t pat, value; \
719 uint32_t test[] = \
720 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
96838a40 721 for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
1da177e4
LT		 722 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
723 value = E1000_READ_REG(&adapter->hw, R); \
96838a40 724 if (value != (test[pat] & W & M)) { \
b01f6691
MC		 725 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
726 "0x%08X expected 0x%08X\n", \
727 E1000_##R, value, (test[pat] & W & M)); \
1da177e4
LT		 728 *data = (adapter->hw.mac_type < e1000_82543) ? \
729 E1000_82542_##R : E1000_##R; \
730 return 1; \
731 } \
732 } \
733}
734
735#define REG_SET_AND_CHECK(R, M, W) \
736{ \
737 uint32_t value; \
738 E1000_WRITE_REG(&adapter->hw, R, W & M); \
739 value = E1000_READ_REG(&adapter->hw, R); \
96838a40 740 if ((W & M) != (value & M)) { \
b01f6691
MC		 741 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
742 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
1da177e4
LT		 743 *data = (adapter->hw.mac_type < e1000_82543) ? \
744 E1000_82542_##R : E1000_##R; \
745 return 1; \
746 } \
747}
748
749static int
750e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
751{
b01f6691
MC		 752 uint32_t value, before, after;
753 uint32_t i, toggle;
1da177e4
LT		 754
755 /* The status register is Read Only, so a write should fail.
756 * Some bits that get toggled are ignored.
757 */
b01f6691 758 switch (adapter->hw.mac_type) {
868d5309
MC		 759 /* there are several bits on newer hardware that are r/w */
760 case e1000_82571:
761 case e1000_82572:
762 toggle = 0x7FFFF3FF;
763 break;
b01f6691
MC		 764 case e1000_82573:
765 toggle = 0x7FFFF033;
766 break;
767 default:
768 toggle = 0xFFFFF833;
769 break;
770 }
771
772 before = E1000_READ_REG(&adapter->hw, STATUS);
773 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
774 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
775 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
96838a40 776 if (value != after) {
b01f6691
MC		 777 DPRINTK(DRV, ERR, "failed STATUS register test got: "
778 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT		 779 *data = 1;
780 return 1;
781 }
b01f6691
MC		 782 /* restore previous status */
783 E1000_WRITE_REG(&adapter->hw, STATUS, before);
1da177e4
LT		 784
785 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
786 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
787 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
788 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
789 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
790 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
791 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
792 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
793 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
794 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
795 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
796 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
797 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
798 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
799
800 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
801 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
802 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
803
96838a40 804 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 805
806 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
807 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
808 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
809 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
810 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
811
96838a40 812 for (i = 0; i < E1000_RAR_ENTRIES; i++) {
1da177e4
LT		 813 REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
814 0xFFFFFFFF);
815 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
816 0xFFFFFFFF);
817 }
818
819 } else {
820
821 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
822 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
823 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
824 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
825
826 }
827
96838a40 828 for (i = 0; i < E1000_MC_TBL_SIZE; i++)
1da177e4
LT		 829 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
830
831 *data = 0;
832 return 0;
833}
834
835static int
836e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
837{
838 uint16_t temp;
839 uint16_t checksum = 0;
840 uint16_t i;
841
842 *data = 0;
843 /* Read and add up the contents of the EEPROM */
96838a40
JB		 844 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
845 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
1da177e4
LT		 846 *data = 1;
847 break;
848 }
849 checksum += temp;
850 }
851
852 /* If Checksum is not Correct return error else test passed */
96838a40 853 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
1da177e4
LT		 854 *data = 2;
855
856 return *data;
857}
858
859static irqreturn_t
860e1000_test_intr(int irq,
861 void *data,
862 struct pt_regs *regs)
863{
864 struct net_device *netdev = (struct net_device *) data;
60490fe0 865 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 866
867 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
868
869 return IRQ_HANDLED;
870}
871
872static int
873e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
874{
875 struct net_device *netdev = adapter->netdev;
876 uint32_t mask, i=0, shared_int = TRUE;
877 uint32_t irq = adapter->pdev->irq;
878
879 *data = 0;
880
881 /* Hook up test interrupt handler just for this test */
96838a40 882 if (!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
1da177e4 883 shared_int = FALSE;
96838a40 884 } else if (request_irq(irq, &e1000_test_intr, SA_SHIRQ,
2648345f 885 netdev->name, netdev)){
1da177e4
LT		 886 *data = 1;
887 return -1;
888 }
889
890 /* Disable all the interrupts */
891 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
892 msec_delay(10);
893
894 /* Test each interrupt */
96838a40 895 for (; i < 10; i++) {
1da177e4
LT		 896
897 /* Interrupt to test */
898 mask = 1 << i;
899
96838a40 900 if (!shared_int) {
1da177e4
LT		 901 /* Disable the interrupt to be reported in
902 * the cause register and then force the same
903 * interrupt and see if one gets posted. If
904 * an interrupt was posted to the bus, the
905 * test failed.
906 */
907 adapter->test_icr = 0;
908 E1000_WRITE_REG(&adapter->hw, IMC, mask);
909 E1000_WRITE_REG(&adapter->hw, ICS, mask);
910 msec_delay(10);
96838a40
JB		 911
912 if (adapter->test_icr & mask) {
1da177e4
LT		 913 *data = 3;
914 break;
915 }
916 }
917
918 /* Enable the interrupt to be reported in
919 * the cause register and then force the same
920 * interrupt and see if one gets posted. If
921 * an interrupt was not posted to the bus, the
922 * test failed.
923 */
924 adapter->test_icr = 0;
925 E1000_WRITE_REG(&adapter->hw, IMS, mask);
926 E1000_WRITE_REG(&adapter->hw, ICS, mask);
927 msec_delay(10);
928
96838a40 929 if (!(adapter->test_icr & mask)) {
1da177e4
LT		 930 *data = 4;
931 break;
932 }
933
96838a40 934 if (!shared_int) {
1da177e4
LT		 935 /* Disable the other interrupts to be reported in
936 * the cause register and then force the other
937 * interrupts and see if any get posted. If
938 * an interrupt was posted to the bus, the
939 * test failed.
940 */
941 adapter->test_icr = 0;
2648345f
MC		 942 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
943 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
1da177e4
LT		 944 msec_delay(10);
945
96838a40 946 if (adapter->test_icr) {
1da177e4
LT		 947 *data = 5;
948 break;
949 }
950 }
951 }
952
953 /* Disable all the interrupts */
954 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
955 msec_delay(10);
956
957 /* Unhook test interrupt handler */
958 free_irq(irq, netdev);
959
960 return *data;
961}
962
963static void
964e1000_free_desc_rings(struct e1000_adapter *adapter)
965{
581d708e
MC		 966 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
967 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT		 968 struct pci_dev *pdev = adapter->pdev;
969 int i;
970
96838a40
JB		 971 if (txdr->desc && txdr->buffer_info) {
972 for (i = 0; i < txdr->count; i++) {
973 if (txdr->buffer_info[i].dma)
1da177e4
LT		 974 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
975 txdr->buffer_info[i].length,
976 PCI_DMA_TODEVICE);
96838a40 977 if (txdr->buffer_info[i].skb)
1da177e4
LT		 978 dev_kfree_skb(txdr->buffer_info[i].skb);
979 }
980 }
981
96838a40
JB		 982 if (rxdr->desc && rxdr->buffer_info) {
983 for (i = 0; i < rxdr->count; i++) {
984 if (rxdr->buffer_info[i].dma)
1da177e4
LT		 985 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
986 rxdr->buffer_info[i].length,
987 PCI_DMA_FROMDEVICE);
96838a40 988 if (rxdr->buffer_info[i].skb)
1da177e4
LT		 989 dev_kfree_skb(rxdr->buffer_info[i].skb);
990 }
991 }
992
f5645110 993 if (txdr->desc) {
1da177e4 994 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
6b27adb6
JL		 995 txdr->desc = NULL;
996 }
f5645110 997 if (rxdr->desc) {
1da177e4 998 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
6b27adb6
JL		 999 rxdr->desc = NULL;
1000 }
1da177e4 1001
b4558ea9 1002 kfree(txdr->buffer_info);
6b27adb6 1003 txdr->buffer_info = NULL;
b4558ea9 1004 kfree(rxdr->buffer_info);
6b27adb6 1005 rxdr->buffer_info = NULL;
f5645110 1006
1da177e4
LT		 1007 return;
1008}
1009
1010static int
1011e1000_setup_desc_rings(struct e1000_adapter *adapter)
1012{
581d708e
MC		 1013 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1014 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT		 1015 struct pci_dev *pdev = adapter->pdev;
1016 uint32_t rctl;
1017 int size, i, ret_val;
1018
1019 /* Setup Tx descriptor ring and Tx buffers */
1020
96838a40
JB		 1021 if (!txdr->count)
1022 txdr->count = E1000_DEFAULT_TXD;
1da177e4
LT		 1023
1024 size = txdr->count * sizeof(struct e1000_buffer);
96838a40 1025 if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1da177e4
LT		 1026 ret_val = 1;
1027 goto err_nomem;
1028 }
1029 memset(txdr->buffer_info, 0, size);
1030
1031 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1032 E1000_ROUNDUP(txdr->size, 4096);
96838a40 1033 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
1da177e4
LT		 1034 ret_val = 2;
1035 goto err_nomem;
1036 }
1037 memset(txdr->desc, 0, txdr->size);
1038 txdr->next_to_use = txdr->next_to_clean = 0;
1039
1040 E1000_WRITE_REG(&adapter->hw, TDBAL,
1041 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1042 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1043 E1000_WRITE_REG(&adapter->hw, TDLEN,
1044 txdr->count * sizeof(struct e1000_tx_desc));
1045 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1046 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1047 E1000_WRITE_REG(&adapter->hw, TCTL,
1048 E1000_TCTL_PSP | E1000_TCTL_EN |
1049 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1050 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1051
96838a40 1052 for (i = 0; i < txdr->count; i++) {
1da177e4
LT		 1053 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1054 struct sk_buff *skb;
1055 unsigned int size = 1024;
1056
96838a40 1057 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1da177e4
LT		 1058 ret_val = 3;
1059 goto err_nomem;
1060 }
1061 skb_put(skb, size);
1062 txdr->buffer_info[i].skb = skb;
1063 txdr->buffer_info[i].length = skb->len;
1064 txdr->buffer_info[i].dma =
1065 pci_map_single(pdev, skb->data, skb->len,
1066 PCI_DMA_TODEVICE);
1067 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1068 tx_desc->lower.data = cpu_to_le32(skb->len);
1069 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1070 E1000_TXD_CMD_IFCS |
1071 E1000_TXD_CMD_RPS);
1072 tx_desc->upper.data = 0;
1073 }
1074
1075 /* Setup Rx descriptor ring and Rx buffers */
1076
96838a40
JB		 1077 if (!rxdr->count)
1078 rxdr->count = E1000_DEFAULT_RXD;
1da177e4
LT		 1079
1080 size = rxdr->count * sizeof(struct e1000_buffer);
96838a40 1081 if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1da177e4
LT		 1082 ret_val = 4;
1083 goto err_nomem;
1084 }
1085 memset(rxdr->buffer_info, 0, size);
1086
1087 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
96838a40 1088 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1da177e4
LT		 1089 ret_val = 5;
1090 goto err_nomem;
1091 }
1092 memset(rxdr->desc, 0, rxdr->size);
1093 rxdr->next_to_use = rxdr->next_to_clean = 0;
1094
1095 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1096 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1097 E1000_WRITE_REG(&adapter->hw, RDBAL,
1098 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1099 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1100 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1101 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1102 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1103 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1104 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1105 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1106 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1107
96838a40 1108 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT		 1109 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1110 struct sk_buff *skb;
1111
96838a40 1112 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1da177e4
LT		 1113 GFP_KERNEL))) {
1114 ret_val = 6;
1115 goto err_nomem;
1116 }
1117 skb_reserve(skb, NET_IP_ALIGN);
1118 rxdr->buffer_info[i].skb = skb;
1119 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1120 rxdr->buffer_info[i].dma =
1121 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1122 PCI_DMA_FROMDEVICE);
1123 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1124 memset(skb->data, 0x00, skb->len);
1125 }
1126
1127 return 0;
1128
1129err_nomem:
1130 e1000_free_desc_rings(adapter);
1131 return ret_val;
1132}
1133
1134static void
1135e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1136{
1137 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1138 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1139 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1140 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1141 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1142}
1143
1144static void
1145e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1146{
1147 uint16_t phy_reg;
1148
1149 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1150 * Extended PHY Specific Control Register to 25MHz clock. This
1151 * value defaults back to a 2.5MHz clock when the PHY is reset.
1152 */
1153 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1154 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1155 e1000_write_phy_reg(&adapter->hw,
1156 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1157
1158 /* In addition, because of the s/w reset above, we need to enable
1159 * CRS on TX. This must be set for both full and half duplex
1160 * operation.
1161 */
1162 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1163 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1164 e1000_write_phy_reg(&adapter->hw,
1165 M88E1000_PHY_SPEC_CTRL, phy_reg);
1166}
1167
1168static int
1169e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1170{
1171 uint32_t ctrl_reg;
1172 uint16_t phy_reg;
1173
1174 /* Setup the Device Control Register for PHY loopback test. */
1175
1176 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1177 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1178 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1179 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1180 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1181 E1000_CTRL_FD); /* Force Duplex to FULL */
1182
1183 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1184
1185 /* Read the PHY Specific Control Register (0x10) */
1186 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1187
1188 /* Clear Auto-Crossover bits in PHY Specific Control Register
1189 * (bits 6:5).
1190 */
1191 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1192 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1193
1194 /* Perform software reset on the PHY */
1195 e1000_phy_reset(&adapter->hw);
1196
1197 /* Have to setup TX_CLK and TX_CRS after software reset */
1198 e1000_phy_reset_clk_and_crs(adapter);
1199
1200 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1201
1202 /* Wait for reset to complete. */
1203 udelay(500);
1204
1205 /* Have to setup TX_CLK and TX_CRS after software reset */
1206 e1000_phy_reset_clk_and_crs(adapter);
1207
1208 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1209 e1000_phy_disable_receiver(adapter);
1210
1211 /* Set the loopback bit in the PHY control register. */
1212 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1213 phy_reg |= MII_CR_LOOPBACK;
1214 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1215
1216 /* Setup TX_CLK and TX_CRS one more time. */
1217 e1000_phy_reset_clk_and_crs(adapter);
1218
1219 /* Check Phy Configuration */
1220 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
96838a40 1221 if (phy_reg != 0x4100)
1da177e4
LT		 1222 return 9;
1223
1224 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1225 if (phy_reg != 0x0070)
1da177e4
LT		 1226 return 10;
1227
1228 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
96838a40 1229 if (phy_reg != 0x001A)
1da177e4
LT		 1230 return 11;
1231
1232 return 0;
1233}
1234
1235static int
1236e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1237{
1238 uint32_t ctrl_reg = 0;
1239 uint32_t stat_reg = 0;
1240
1241 adapter->hw.autoneg = FALSE;
1242
96838a40 1243 if (adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT		 1244 /* Auto-MDI/MDIX Off */
1245 e1000_write_phy_reg(&adapter->hw,
1246 M88E1000_PHY_SPEC_CTRL, 0x0808);
1247 /* reset to update Auto-MDI/MDIX */
1248 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1249 /* autoneg off */
1250 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
1251 }
1252 /* force 1000, set loopback */
1253 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1254
1255 /* Now set up the MAC to the same speed/duplex as the PHY. */
1256 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1257 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1258 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1259 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1260 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1261 E1000_CTRL_FD); /* Force Duplex to FULL */
1262
96838a40 1263 if (adapter->hw.media_type == e1000_media_type_copper &&
1da177e4
LT		 1264 adapter->hw.phy_type == e1000_phy_m88) {
1265 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1266 } else {
1267 /* Set the ILOS bit on the fiber Nic is half
1268 * duplex link is detected. */
1269 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 1270 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT		 1271 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1272 }
1273
1274 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1275
1276 /* Disable the receiver on the PHY so when a cable is plugged in, the
1277 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1278 */
96838a40 1279 if (adapter->hw.phy_type == e1000_phy_m88)
1da177e4
LT		 1280 e1000_phy_disable_receiver(adapter);
1281
1282 udelay(500);
1283
1284 return 0;
1285}
1286
1287static int
1288e1000_set_phy_loopback(struct e1000_adapter *adapter)
1289{
1290 uint16_t phy_reg = 0;
1291 uint16_t count = 0;
1292
1293 switch (adapter->hw.mac_type) {
1294 case e1000_82543:
96838a40 1295 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 1296 /* Attempt to setup Loopback mode on Non-integrated PHY.
1297 * Some PHY registers get corrupted at random, so
1298 * attempt this 10 times.
1299 */
96838a40 1300 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1301 count++ < 10);
96838a40 1302 if (count < 11)
1da177e4
LT		 1303 return 0;
1304 }
1305 break;
1306
1307 case e1000_82544:
1308 case e1000_82540:
1309 case e1000_82545:
1310 case e1000_82545_rev_3:
1311 case e1000_82546:
1312 case e1000_82546_rev_3:
1313 case e1000_82541:
1314 case e1000_82541_rev_2:
1315 case e1000_82547:
1316 case e1000_82547_rev_2:
868d5309
MC		 1317 case e1000_82571:
1318 case e1000_82572:
4564327b 1319 case e1000_82573:
1da177e4
LT		 1320 return e1000_integrated_phy_loopback(adapter);
1321 break;
1322
1323 default:
1324 /* Default PHY loopback work is to read the MII
1325 * control register and assert bit 14 (loopback mode).
1326 */
1327 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1328 phy_reg |= MII_CR_LOOPBACK;
1329 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1330 return 0;
1331 break;
1332 }
1333
1334 return 8;
1335}
1336
1337static int
1338e1000_setup_loopback_test(struct e1000_adapter *adapter)
1339{
49273163 1340 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1341 uint32_t rctl;
1342
49273163
JK		 1343 if (hw->media_type == e1000_media_type_fiber ||
1344 hw->media_type == e1000_media_type_internal_serdes) {
1345 switch (hw->mac_type) {
1346 case e1000_82545:
1347 case e1000_82546:
1348 case e1000_82545_rev_3:
1349 case e1000_82546_rev_3:
1da177e4 1350 return e1000_set_phy_loopback(adapter);
49273163
JK		 1351 break;
1352 case e1000_82571:
1353 case e1000_82572:
1354#define E1000_SERDES_LB_ON 0x410
1355 e1000_set_phy_loopback(adapter);
1356 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
1357 msec_delay(10);
1358 return 0;
1359 break;
1360 default:
1361 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1362 rctl |= E1000_RCTL_LBM_TCVR;
49273163 1363 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1364 return 0;
1365 }
49273163 1366 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT		 1367 return e1000_set_phy_loopback(adapter);
1368
1369 return 7;
1370}
1371
1372static void
1373e1000_loopback_cleanup(struct e1000_adapter *adapter)
1374{
49273163 1375 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1376 uint32_t rctl;
1377 uint16_t phy_reg;
1378
49273163 1379 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1380 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
49273163 1381 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4 1382
49273163
JK		 1383 switch (hw->mac_type) {
1384 case e1000_82571:
1385 case e1000_82572:
1386 if (hw->media_type == e1000_media_type_fiber ||
1387 hw->media_type == e1000_media_type_internal_serdes) {
1388#define E1000_SERDES_LB_OFF 0x400
1389 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
1390 msec_delay(10);
1391 break;
1392 }
1393 /* Fall Through */
1394 case e1000_82545:
1395 case e1000_82546:
1396 case e1000_82545_rev_3:
1397 case e1000_82546_rev_3:
1398 default:
1399 hw->autoneg = TRUE;
1400 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1401 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1402 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK		 1403 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1404 e1000_phy_reset(hw);
1da177e4 1405 }
49273163 1406 break;
1da177e4
LT		 1407 }
1408}
1409
1410static void
1411e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1412{
1413 memset(skb->data, 0xFF, frame_size);
ce7393b9 1414 frame_size &= ~1;
1da177e4
LT		 1415 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1416 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1417 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1418}
1419
1420static int
1421e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1422{
ce7393b9 1423 frame_size &= ~1;
96838a40
JB		 1424 if (*(skb->data + 3) == 0xFF) {
1425 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT		 1426 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1427 return 0;
1428 }
1429 }
1430 return 13;
1431}
1432
1433static int
1434e1000_run_loopback_test(struct e1000_adapter *adapter)
1435{
581d708e
MC		 1436 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1437 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1438 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC		 1439 int i, j, k, l, lc, good_cnt, ret_val=0;
1440 unsigned long time;
1da177e4
LT		 1441
1442 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1443
96838a40 1444 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC		 1445 * The idea is to wrap the largest ring a number of times using 64
1446 * send/receive pairs during each loop
1447 */
1da177e4 1448
96838a40 1449 if (rxdr->count <= txdr->count)
e4eff729
MC		 1450 lc = ((txdr->count / 64) * 2) + 1;
1451 else
1452 lc = ((rxdr->count / 64) * 2) + 1;
1453
1454 k = l = 0;
96838a40
JB		 1455 for (j = 0; j <= lc; j++) { /* loop count loop */
1456 for (i = 0; i < 64; i++) { /* send the packets */
1457 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1458 1024);
96838a40 1459 pci_dma_sync_single_for_device(pdev,
e4eff729
MC		 1460 txdr->buffer_info[k].dma,
1461 txdr->buffer_info[k].length,
1462 PCI_DMA_TODEVICE);
96838a40 1463 if (unlikely(++k == txdr->count)) k = 0;
e4eff729
MC		 1464 }
1465 E1000_WRITE_REG(&adapter->hw, TDT, k);
1466 msec_delay(200);
1467 time = jiffies; /* set the start time for the receive */
1468 good_cnt = 0;
1469 do { /* receive the sent packets */
96838a40 1470 pci_dma_sync_single_for_cpu(pdev,
e4eff729
MC		 1471 rxdr->buffer_info[l].dma,
1472 rxdr->buffer_info[l].length,
1473 PCI_DMA_FROMDEVICE);
96838a40 1474
e4eff729
MC		 1475 ret_val = e1000_check_lbtest_frame(
1476 rxdr->buffer_info[l].skb,
1477 1024);
96838a40 1478 if (!ret_val)
e4eff729 1479 good_cnt++;
96838a40
JB		 1480 if (unlikely(++l == rxdr->count)) l = 0;
1481 /* time + 20 msecs (200 msecs on 2.4) is more than
1482 * enough time to complete the receives, if it's
e4eff729
MC		 1483 * exceeded, break and error off
1484 */
1485 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1486 if (good_cnt != 64) {
e4eff729 1487 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1488 break;
e4eff729 1489 }
96838a40 1490 if (jiffies >= (time + 2)) {
e4eff729
MC		 1491 ret_val = 14; /* error code for time out error */
1492 break;
1493 }
1494 } /* end loop count loop */
1da177e4
LT		 1495 return ret_val;
1496}
1497
1498static int
1499e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1500{
57128197
JK		 1501 /* PHY loopback cannot be performed if SoL/IDER
1502 * sessions are active */
1503 if (e1000_check_phy_reset_block(&adapter->hw)) {
1504 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1505 "when SoL/IDER is active.\n");
1506 *data = 0;
1507 goto out;
1508 }
1509
1510 if ((*data = e1000_setup_desc_rings(adapter)))
1511 goto out;
1512 if ((*data = e1000_setup_loopback_test(adapter)))
1513 goto err_loopback;
1da177e4
LT		 1514 *data = e1000_run_loopback_test(adapter);
1515 e1000_loopback_cleanup(adapter);
57128197 1516
1da177e4 1517err_loopback:
57128197
JK		 1518 e1000_free_desc_rings(adapter);
1519out:
1da177e4
LT		 1520 return *data;
1521}
1522
1523static int
1524e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1525{
1526 *data = 0;
1da177e4
LT		 1527 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1528 int i = 0;
1529 adapter->hw.serdes_link_down = TRUE;
1530
2648345f
MC		 1531 /* On some blade server designs, link establishment
1532 * could take as long as 2-3 minutes */
1da177e4
LT		 1533 do {
1534 e1000_check_for_link(&adapter->hw);
1535 if (adapter->hw.serdes_link_down == FALSE)
1536 return *data;
1537 msec_delay(20);
1538 } while (i++ < 3750);
1539
2648345f 1540 *data = 1;
1da177e4
LT		 1541 } else {
1542 e1000_check_for_link(&adapter->hw);
96838a40 1543 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
e4eff729 1544 msec_delay(4000);
1da177e4 1545
96838a40 1546 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1da177e4
LT		 1547 *data = 1;
1548 }
1549 }
1550 return *data;
1551}
1552
96838a40 1553static int
1da177e4
LT		 1554e1000_diag_test_count(struct net_device *netdev)
1555{
1556 return E1000_TEST_LEN;
1557}
1558
1559static void
1560e1000_diag_test(struct net_device *netdev,
1561 struct ethtool_test *eth_test, uint64_t *data)
1562{
60490fe0 1563 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1564 boolean_t if_running = netif_running(netdev);
1565
96838a40 1566 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT		 1567 /* Offline tests */
1568
1569 /* save speed, duplex, autoneg settings */
1570 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1571 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1572 uint8_t autoneg = adapter->hw.autoneg;
1573
1574 /* Link test performed before hardware reset so autoneg doesn't
1575 * interfere with test result */
96838a40 1576 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT		 1577 eth_test->flags |= ETH_TEST_FL_FAILED;
1578
96838a40 1579 if (if_running)
1da177e4
LT		 1580 e1000_down(adapter);
1581 else
1582 e1000_reset(adapter);
1583
96838a40 1584 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT		 1585 eth_test->flags |= ETH_TEST_FL_FAILED;
1586
1587 e1000_reset(adapter);
96838a40 1588 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT		 1589 eth_test->flags |= ETH_TEST_FL_FAILED;
1590
1591 e1000_reset(adapter);
96838a40 1592 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT		 1593 eth_test->flags |= ETH_TEST_FL_FAILED;
1594
1595 e1000_reset(adapter);
96838a40 1596 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT		 1597 eth_test->flags |= ETH_TEST_FL_FAILED;
1598
1599 /* restore speed, duplex, autoneg settings */
1600 adapter->hw.autoneg_advertised = autoneg_advertised;
1601 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1602 adapter->hw.autoneg = autoneg;
1603
1604 e1000_reset(adapter);
96838a40 1605 if (if_running)
1da177e4
LT		 1606 e1000_up(adapter);
1607 } else {
1608 /* Online tests */
96838a40 1609 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT		 1610 eth_test->flags |= ETH_TEST_FL_FAILED;
1611
1612 /* Offline tests aren't run; pass by default */
1613 data[0] = 0;
1614 data[1] = 0;
1615 data[2] = 0;
1616 data[3] = 0;
1617 }
352c9f85 1618 msleep_interruptible(4 * 1000);
1da177e4
LT		 1619}
1620
1621static void
1622e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1623{
60490fe0 1624 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1625 struct e1000_hw *hw = &adapter->hw;
1626
96838a40 1627 switch (adapter->hw.device_id) {
1da177e4
LT		 1628 case E1000_DEV_ID_82542:
1629 case E1000_DEV_ID_82543GC_FIBER:
1630 case E1000_DEV_ID_82543GC_COPPER:
1631 case E1000_DEV_ID_82544EI_FIBER:
1632 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1633 case E1000_DEV_ID_82545EM_FIBER:
1634 case E1000_DEV_ID_82545EM_COPPER:
84916829 1635 case E1000_DEV_ID_82546GB_QUAD_COPPER:
1da177e4
LT		 1636 wol->supported = 0;
1637 wol->wolopts = 0;
1638 return;
1639
84916829
JK		 1640 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1641 /* device id 10B5 port-A supports wol */
1642 if (!adapter->ksp3_port_a) {
1643 wol->supported = 0;
1644 return;
1645 }
1646 /* KSP3 does not suppport UCAST wake-ups for any interface */
1647 wol->supported = WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
1648
1649 if (adapter->wol & E1000_WUFC_EX)
1650 DPRINTK(DRV, ERR, "Interface does not support "
1651 "directed (unicast) frame wake-up packets\n");
1652 wol->wolopts = 0;
1653 goto do_defaults;
1654
1da177e4
LT		 1655 case E1000_DEV_ID_82546EB_FIBER:
1656 case E1000_DEV_ID_82546GB_FIBER:
b7ee49db 1657 case E1000_DEV_ID_82571EB_FIBER:
1da177e4 1658 /* Wake events only supported on port A for dual fiber */
96838a40 1659 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1da177e4
LT		 1660 wol->supported = 0;
1661 wol->wolopts = 0;
1662 return;
1663 }
1664 /* Fall Through */
1665
1666 default:
1667 wol->supported = WAKE_UCAST | WAKE_MCAST |
1668 WAKE_BCAST | WAKE_MAGIC;
1da177e4 1669 wol->wolopts = 0;
84916829
JK		 1670
1671do_defaults:
96838a40 1672 if (adapter->wol & E1000_WUFC_EX)
1da177e4 1673 wol->wolopts |= WAKE_UCAST;
96838a40 1674 if (adapter->wol & E1000_WUFC_MC)
1da177e4 1675 wol->wolopts |= WAKE_MCAST;
96838a40 1676 if (adapter->wol & E1000_WUFC_BC)
1da177e4 1677 wol->wolopts |= WAKE_BCAST;
96838a40 1678 if (adapter->wol & E1000_WUFC_MAG)
1da177e4
LT		 1679 wol->wolopts |= WAKE_MAGIC;
1680 return;
1681 }
1682}
1683
1684static int
1685e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1686{
60490fe0 1687 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1688 struct e1000_hw *hw = &adapter->hw;
1689
96838a40 1690 switch (adapter->hw.device_id) {
1da177e4
LT		 1691 case E1000_DEV_ID_82542:
1692 case E1000_DEV_ID_82543GC_FIBER:
1693 case E1000_DEV_ID_82543GC_COPPER:
1694 case E1000_DEV_ID_82544EI_FIBER:
1695 case E1000_DEV_ID_82546EB_QUAD_COPPER:
84916829 1696 case E1000_DEV_ID_82546GB_QUAD_COPPER:
1da177e4
LT		 1697 case E1000_DEV_ID_82545EM_FIBER:
1698 case E1000_DEV_ID_82545EM_COPPER:
1699 return wol->wolopts ? -EOPNOTSUPP : 0;
1700
84916829
JK		 1701 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1702 /* device id 10B5 port-A supports wol */
1703 if (!adapter->ksp3_port_a)
1704 return wol->wolopts ? -EOPNOTSUPP : 0;
1705
1706 if (wol->wolopts & WAKE_UCAST) {
1707 DPRINTK(DRV, ERR, "Interface does not support "
1708 "directed (unicast) frame wake-up packets\n");
1709 return -EOPNOTSUPP;
1710 }
1711
1da177e4
LT		 1712 case E1000_DEV_ID_82546EB_FIBER:
1713 case E1000_DEV_ID_82546GB_FIBER:
b7ee49db 1714 case E1000_DEV_ID_82571EB_FIBER:
1da177e4 1715 /* Wake events only supported on port A for dual fiber */
96838a40 1716 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
1da177e4
LT		 1717 return wol->wolopts ? -EOPNOTSUPP : 0;
1718 /* Fall Through */
1719
1720 default:
96838a40 1721 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1da177e4
LT		 1722 return -EOPNOTSUPP;
1723
1724 adapter->wol = 0;
1725
96838a40 1726 if (wol->wolopts & WAKE_UCAST)
1da177e4 1727 adapter->wol |= E1000_WUFC_EX;
96838a40 1728 if (wol->wolopts & WAKE_MCAST)
1da177e4 1729 adapter->wol |= E1000_WUFC_MC;
96838a40 1730 if (wol->wolopts & WAKE_BCAST)
1da177e4 1731 adapter->wol |= E1000_WUFC_BC;
96838a40 1732 if (wol->wolopts & WAKE_MAGIC)
1da177e4
LT		 1733 adapter->wol |= E1000_WUFC_MAG;
1734 }
1735
1736 return 0;
1737}
1738
1739/* toggle LED 4 times per second = 2 "blinks" per second */
1740#define E1000_ID_INTERVAL (HZ/4)
1741
1742/* bit defines for adapter->led_status */
1743#define E1000_LED_ON 0
1744
1745static void
1746e1000_led_blink_callback(unsigned long data)
1747{
1748 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1749
96838a40 1750 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1da177e4
LT		 1751 e1000_led_off(&adapter->hw);
1752 else
1753 e1000_led_on(&adapter->hw);
1754
1755 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1756}
1757
1758static int
1759e1000_phys_id(struct net_device *netdev, uint32_t data)
1760{
60490fe0 1761 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1762
96838a40 1763 if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1da177e4
LT		 1764 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1765
96838a40
JB		 1766 if (adapter->hw.mac_type < e1000_82571) {
1767 if (!adapter->blink_timer.function) {
d439d4b7
MC		 1768 init_timer(&adapter->blink_timer);
1769 adapter->blink_timer.function = e1000_led_blink_callback;
1770 adapter->blink_timer.data = (unsigned long) adapter;
1771 }
1772 e1000_setup_led(&adapter->hw);
1773 mod_timer(&adapter->blink_timer, jiffies);
1774 msleep_interruptible(data * 1000);
1775 del_timer_sync(&adapter->blink_timer);
d8c2bd3d
JK		 1776 } else if (adapter->hw.mac_type < e1000_82573) {
1777 E1000_WRITE_REG(&adapter->hw, LEDCTL,
1778 (E1000_LEDCTL_LED2_BLINK_RATE |
1779 E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
1780 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1781 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
1782 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
1783 msleep_interruptible(data * 1000);
1784 } else {
1785 E1000_WRITE_REG(&adapter->hw, LEDCTL,
1786 (E1000_LEDCTL_LED2_BLINK_RATE |
1787 E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
1788 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1789 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
1790 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
d439d4b7 1791 msleep_interruptible(data * 1000);
1da177e4
LT		 1792 }
1793
1da177e4
LT		 1794 e1000_led_off(&adapter->hw);
1795 clear_bit(E1000_LED_ON, &adapter->led_status);
1796 e1000_cleanup_led(&adapter->hw);
1797
1798 return 0;
1799}
1800
1801static int
1802e1000_nway_reset(struct net_device *netdev)
1803{
60490fe0 1804 struct e1000_adapter *adapter = netdev_priv(netdev);
96838a40 1805 if (netif_running(netdev)) {
1da177e4
LT		 1806 e1000_down(adapter);
1807 e1000_up(adapter);
1808 }
1809 return 0;
1810}
1811
96838a40 1812static int
1da177e4
LT		 1813e1000_get_stats_count(struct net_device *netdev)
1814{
1815 return E1000_STATS_LEN;
1816}
1817
96838a40
JB		 1818static void
1819e1000_get_ethtool_stats(struct net_device *netdev,
1da177e4
LT		 1820 struct ethtool_stats *stats, uint64_t *data)
1821{
60490fe0 1822 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1823 int i;
1824
1825 e1000_update_stats(adapter);
7bfa4816
JK		 1826 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1827 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1828 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1da177e4
LT		 1829 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1830 }
7bfa4816 1831/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT		 1832}
1833
96838a40 1834static void
1da177e4
LT		 1835e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1836{
7bfa4816 1837 uint8_t *p = data;
1da177e4
LT		 1838 int i;
1839
96838a40 1840 switch (stringset) {
1da177e4 1841 case ETH_SS_TEST:
96838a40 1842 memcpy(data, *e1000_gstrings_test,
1da177e4
LT		 1843 E1000_TEST_LEN*ETH_GSTRING_LEN);
1844 break;
1845 case ETH_SS_STATS:
7bfa4816
JK		 1846 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1847 memcpy(p, e1000_gstrings_stats[i].stat_string,
1848 ETH_GSTRING_LEN);
1849 p += ETH_GSTRING_LEN;
1850 }
7bfa4816 1851/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT		 1852 break;
1853 }
1854}
1855
3ad2cc67 1856static struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT		 1857 .get_settings = e1000_get_settings,
1858 .set_settings = e1000_set_settings,
1859 .get_drvinfo = e1000_get_drvinfo,
1860 .get_regs_len = e1000_get_regs_len,
1861 .get_regs = e1000_get_regs,
1862 .get_wol = e1000_get_wol,
1863 .set_wol = e1000_set_wol,
1864 .get_msglevel = e1000_get_msglevel,
1865 .set_msglevel = e1000_set_msglevel,
1866 .nway_reset = e1000_nway_reset,
1867 .get_link = ethtool_op_get_link,
1868 .get_eeprom_len = e1000_get_eeprom_len,
1869 .get_eeprom = e1000_get_eeprom,
1870 .set_eeprom = e1000_set_eeprom,
1871 .get_ringparam = e1000_get_ringparam,
1872 .set_ringparam = e1000_set_ringparam,
1873 .get_pauseparam = e1000_get_pauseparam,
1874 .set_pauseparam = e1000_set_pauseparam,
1875 .get_rx_csum = e1000_get_rx_csum,
1876 .set_rx_csum = e1000_set_rx_csum,
1877 .get_tx_csum = e1000_get_tx_csum,
1878 .set_tx_csum = e1000_set_tx_csum,
1879 .get_sg = ethtool_op_get_sg,
1880 .set_sg = ethtool_op_set_sg,
1881#ifdef NETIF_F_TSO
1882 .get_tso = ethtool_op_get_tso,
1883 .set_tso = e1000_set_tso,
1884#endif
1885 .self_test_count = e1000_diag_test_count,
1886 .self_test = e1000_diag_test,
1887 .get_strings = e1000_get_strings,
1888 .phys_id = e1000_phys_id,
1889 .get_stats_count = e1000_get_stats_count,
1890 .get_ethtool_stats = e1000_get_ethtool_stats,
9beb0ac1 1891 .get_perm_addr = ethtool_op_get_perm_addr,
1da177e4
LT		 1892};
1893
1894void e1000_set_ethtool_ops(struct net_device *netdev)
1895{
1896 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1897}