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[PATCH] e1000: Added functions declarations
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
32
33#include <asm/uaccess.h>
34
35extern char e1000_driver_name[];
36extern char e1000_driver_version[];
37
38extern int e1000_up(struct e1000_adapter *adapter);
39extern void e1000_down(struct e1000_adapter *adapter);
40extern void e1000_reset(struct e1000_adapter *adapter);
41extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
581d708e
MC		 42extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
43extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
44extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
45extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
1da177e4
LT		 46extern void e1000_update_stats(struct e1000_adapter *adapter);
47
48struct e1000_stats {
49 char stat_string[ETH_GSTRING_LEN];
50 int sizeof_stat;
51 int stat_offset;
52};
53
54#define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
55 offsetof(struct e1000_adapter, m)
56static const struct e1000_stats e1000_gstrings_stats[] = {
57 { "rx_packets", E1000_STAT(net_stats.rx_packets) },
58 { "tx_packets", E1000_STAT(net_stats.tx_packets) },
59 { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
60 { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
61 { "rx_errors", E1000_STAT(net_stats.rx_errors) },
62 { "tx_errors", E1000_STAT(net_stats.tx_errors) },
63 { "rx_dropped", E1000_STAT(net_stats.rx_dropped) },
64 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
65 { "multicast", E1000_STAT(net_stats.multicast) },
66 { "collisions", E1000_STAT(net_stats.collisions) },
67 { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
68 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
69 { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
70 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
71 { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) },
2648345f 72 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
1da177e4
LT		 73 { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
74 { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
75 { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
76 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
77 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
78 { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
79 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
80 { "tx_deferred_ok", E1000_STAT(stats.dc) },
81 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
82 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 83 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
1da177e4
LT		 84 { "rx_long_length_errors", E1000_STAT(stats.roc) },
85 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
86 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
87 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
88 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
89 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
90 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
91 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
92 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
93 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
94 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9
MC		 95 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
96 { "rx_header_split", E1000_STAT(rx_hdr_split) },
6b7660cd 97 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
1da177e4 98};
7bfa4816
JK		 99
100#ifdef CONFIG_E1000_MQ
101#define E1000_QUEUE_STATS_LEN \
102 (((struct e1000_adapter *)netdev->priv)->num_tx_queues + \
103 ((struct e1000_adapter *)netdev->priv)->num_rx_queues) \
104 * (sizeof(struct e1000_queue_stats) / sizeof(uint64_t))
105#else
106#define E1000_QUEUE_STATS_LEN 0
107#endif
108#define E1000_GLOBAL_STATS_LEN \
1da177e4 109 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
7bfa4816 110#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT		 111static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
112 "Register test (offline)", "Eeprom test (offline)",
113 "Interrupt test (offline)", "Loopback test (offline)",
114 "Link test (on/offline)"
115};
116#define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
117
118static int
119e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
120{
60490fe0 121 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 122 struct e1000_hw *hw = &adapter->hw;
123
124 if(hw->media_type == e1000_media_type_copper) {
125
126 ecmd->supported = (SUPPORTED_10baseT_Half |
127 SUPPORTED_10baseT_Full |
128 SUPPORTED_100baseT_Half |
129 SUPPORTED_100baseT_Full |
130 SUPPORTED_1000baseT_Full|
131 SUPPORTED_Autoneg |
132 SUPPORTED_TP);
133
134 ecmd->advertising = ADVERTISED_TP;
135
136 if(hw->autoneg == 1) {
137 ecmd->advertising |= ADVERTISED_Autoneg;
138
139 /* the e1000 autoneg seems to match ethtool nicely */
140
141 ecmd->advertising |= hw->autoneg_advertised;
142 }
143
144 ecmd->port = PORT_TP;
145 ecmd->phy_address = hw->phy_addr;
146
147 if(hw->mac_type == e1000_82543)
148 ecmd->transceiver = XCVR_EXTERNAL;
149 else
150 ecmd->transceiver = XCVR_INTERNAL;
151
152 } else {
153 ecmd->supported = (SUPPORTED_1000baseT_Full |
154 SUPPORTED_FIBRE |
155 SUPPORTED_Autoneg);
156
012609a8
MC		 157 ecmd->advertising = (ADVERTISED_1000baseT_Full |
158 ADVERTISED_FIBRE |
159 ADVERTISED_Autoneg);
1da177e4
LT		 160
161 ecmd->port = PORT_FIBRE;
162
163 if(hw->mac_type >= e1000_82545)
164 ecmd->transceiver = XCVR_INTERNAL;
165 else
166 ecmd->transceiver = XCVR_EXTERNAL;
167 }
168
169 if(netif_carrier_ok(adapter->netdev)) {
170
171 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
172 &adapter->link_duplex);
173 ecmd->speed = adapter->link_speed;
174
175 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
176 * and HALF_DUPLEX != DUPLEX_HALF */
177
178 if(adapter->link_duplex == FULL_DUPLEX)
179 ecmd->duplex = DUPLEX_FULL;
180 else
181 ecmd->duplex = DUPLEX_HALF;
182 } else {
183 ecmd->speed = -1;
184 ecmd->duplex = -1;
185 }
186
187 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
188 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
189 return 0;
190}
191
192static int
193e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
194{
60490fe0 195 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 196 struct e1000_hw *hw = &adapter->hw;
197
57128197
JK		 198 /* When SoL/IDER sessions are active, autoneg/speed/duplex
199 * cannot be changed */
200 if (e1000_check_phy_reset_block(hw)) {
201 DPRINTK(DRV, ERR, "Cannot change link characteristics "
202 "when SoL/IDER is active.\n");
203 return -EINVAL;
204 }
205
206 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 207 hw->autoneg = 1;
012609a8
MC		 208 if(hw->media_type == e1000_media_type_fiber)
209 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
210 ADVERTISED_FIBRE |
211 ADVERTISED_Autoneg;
212 else
213 hw->autoneg_advertised = ADVERTISED_10baseT_Half |
214 ADVERTISED_10baseT_Full |
215 ADVERTISED_100baseT_Half |
216 ADVERTISED_100baseT_Full |
217 ADVERTISED_1000baseT_Full|
218 ADVERTISED_Autoneg |
219 ADVERTISED_TP;
220 ecmd->advertising = hw->autoneg_advertised;
1da177e4
LT		 221 } else
222 if(e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
223 return -EINVAL;
224
225 /* reset the link */
226
227 if(netif_running(adapter->netdev)) {
228 e1000_down(adapter);
229 e1000_reset(adapter);
230 e1000_up(adapter);
231 } else
232 e1000_reset(adapter);
233
234 return 0;
235}
236
237static void
238e1000_get_pauseparam(struct net_device *netdev,
239 struct ethtool_pauseparam *pause)
240{
60490fe0 241 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 242 struct e1000_hw *hw = &adapter->hw;
243
244 pause->autoneg =
245 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
246
247 if(hw->fc == e1000_fc_rx_pause)
248 pause->rx_pause = 1;
249 else if(hw->fc == e1000_fc_tx_pause)
250 pause->tx_pause = 1;
251 else if(hw->fc == e1000_fc_full) {
252 pause->rx_pause = 1;
253 pause->tx_pause = 1;
254 }
255}
256
257static int
258e1000_set_pauseparam(struct net_device *netdev,
259 struct ethtool_pauseparam *pause)
260{
60490fe0 261 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 262 struct e1000_hw *hw = &adapter->hw;
263
264 adapter->fc_autoneg = pause->autoneg;
265
266 if(pause->rx_pause && pause->tx_pause)
267 hw->fc = e1000_fc_full;
268 else if(pause->rx_pause && !pause->tx_pause)
269 hw->fc = e1000_fc_rx_pause;
270 else if(!pause->rx_pause && pause->tx_pause)
271 hw->fc = e1000_fc_tx_pause;
272 else if(!pause->rx_pause && !pause->tx_pause)
273 hw->fc = e1000_fc_none;
274
275 hw->original_fc = hw->fc;
276
277 if(adapter->fc_autoneg == AUTONEG_ENABLE) {
278 if(netif_running(adapter->netdev)) {
279 e1000_down(adapter);
280 e1000_up(adapter);
281 } else
282 e1000_reset(adapter);
283 }
284 else
285 return ((hw->media_type == e1000_media_type_fiber) ?
286 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
287
288 return 0;
289}
290
291static uint32_t
292e1000_get_rx_csum(struct net_device *netdev)
293{
60490fe0 294 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 295 return adapter->rx_csum;
296}
297
298static int
299e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
300{
60490fe0 301 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 302 adapter->rx_csum = data;
303
304 if(netif_running(netdev)) {
305 e1000_down(adapter);
306 e1000_up(adapter);
307 } else
308 e1000_reset(adapter);
309 return 0;
310}
311
312static uint32_t
313e1000_get_tx_csum(struct net_device *netdev)
314{
315 return (netdev->features & NETIF_F_HW_CSUM) != 0;
316}
317
318static int
319e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
320{
60490fe0 321 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 322
323 if(adapter->hw.mac_type < e1000_82543) {
324 if (!data)
325 return -EINVAL;
326 return 0;
327 }
328
329 if (data)
330 netdev->features |= NETIF_F_HW_CSUM;
331 else
332 netdev->features &= ~NETIF_F_HW_CSUM;
333
334 return 0;
335}
336
337#ifdef NETIF_F_TSO
338static int
339e1000_set_tso(struct net_device *netdev, uint32_t data)
340{
60490fe0
MC		 341 struct e1000_adapter *adapter = netdev_priv(netdev);
342 if((adapter->hw.mac_type < e1000_82544) ||
1da177e4
LT		 343 (adapter->hw.mac_type == e1000_82547))
344 return data ? -EINVAL : 0;
345
346 if (data)
347 netdev->features |= NETIF_F_TSO;
348 else
349 netdev->features &= ~NETIF_F_TSO;
350 return 0;
351}
352#endif /* NETIF_F_TSO */
353
354static uint32_t
355e1000_get_msglevel(struct net_device *netdev)
356{
60490fe0 357 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 358 return adapter->msg_enable;
359}
360
361static void
362e1000_set_msglevel(struct net_device *netdev, uint32_t data)
363{
60490fe0 364 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 365 adapter->msg_enable = data;
366}
367
368static int
369e1000_get_regs_len(struct net_device *netdev)
370{
371#define E1000_REGS_LEN 32
372 return E1000_REGS_LEN * sizeof(uint32_t);
373}
374
375static void
376e1000_get_regs(struct net_device *netdev,
377 struct ethtool_regs *regs, void *p)
378{
60490fe0 379 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 380 struct e1000_hw *hw = &adapter->hw;
381 uint32_t *regs_buff = p;
382 uint16_t phy_data;
383
384 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
385
386 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
387
388 regs_buff[0] = E1000_READ_REG(hw, CTRL);
389 regs_buff[1] = E1000_READ_REG(hw, STATUS);
390
391 regs_buff[2] = E1000_READ_REG(hw, RCTL);
392 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
393 regs_buff[4] = E1000_READ_REG(hw, RDH);
394 regs_buff[5] = E1000_READ_REG(hw, RDT);
395 regs_buff[6] = E1000_READ_REG(hw, RDTR);
396
397 regs_buff[7] = E1000_READ_REG(hw, TCTL);
398 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
399 regs_buff[9] = E1000_READ_REG(hw, TDH);
400 regs_buff[10] = E1000_READ_REG(hw, TDT);
401 regs_buff[11] = E1000_READ_REG(hw, TIDV);
402
403 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
404 if(hw->phy_type == e1000_phy_igp) {
405 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
406 IGP01E1000_PHY_AGC_A);
407 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
408 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
409 regs_buff[13] = (uint32_t)phy_data; /* cable length */
410 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
411 IGP01E1000_PHY_AGC_B);
412 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
413 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
414 regs_buff[14] = (uint32_t)phy_data; /* cable length */
415 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
416 IGP01E1000_PHY_AGC_C);
417 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
418 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
419 regs_buff[15] = (uint32_t)phy_data; /* cable length */
420 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
421 IGP01E1000_PHY_AGC_D);
422 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
423 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
424 regs_buff[16] = (uint32_t)phy_data; /* cable length */
425 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
426 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
427 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
428 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
429 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
430 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
431 IGP01E1000_PHY_PCS_INIT_REG);
432 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
433 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
434 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
435 regs_buff[20] = 0; /* polarity correction enabled (always) */
436 regs_buff[22] = 0; /* phy receive errors (unavailable) */
437 regs_buff[23] = regs_buff[18]; /* mdix mode */
438 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
439 } else {
440 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
441 regs_buff[13] = (uint32_t)phy_data; /* cable length */
442 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
443 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
444 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
445 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
446 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
447 regs_buff[18] = regs_buff[13]; /* cable polarity */
448 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
449 regs_buff[20] = regs_buff[17]; /* polarity correction */
450 /* phy receive errors */
451 regs_buff[22] = adapter->phy_stats.receive_errors;
452 regs_buff[23] = regs_buff[13]; /* mdix mode */
453 }
454 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
455 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
456 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
457 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
458 if(hw->mac_type >= e1000_82540 &&
459 hw->media_type == e1000_media_type_copper) {
460 regs_buff[26] = E1000_READ_REG(hw, MANC);
461 }
462}
463
464static int
465e1000_get_eeprom_len(struct net_device *netdev)
466{
60490fe0 467 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 468 return adapter->hw.eeprom.word_size * 2;
469}
470
471static int
472e1000_get_eeprom(struct net_device *netdev,
473 struct ethtool_eeprom *eeprom, uint8_t *bytes)
474{
60490fe0 475 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 476 struct e1000_hw *hw = &adapter->hw;
477 uint16_t *eeprom_buff;
478 int first_word, last_word;
479 int ret_val = 0;
480 uint16_t i;
481
482 if(eeprom->len == 0)
483 return -EINVAL;
484
485 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
486
487 first_word = eeprom->offset >> 1;
488 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
489
490 eeprom_buff = kmalloc(sizeof(uint16_t) *
491 (last_word - first_word + 1), GFP_KERNEL);
492 if(!eeprom_buff)
493 return -ENOMEM;
494
495 if(hw->eeprom.type == e1000_eeprom_spi)
496 ret_val = e1000_read_eeprom(hw, first_word,
497 last_word - first_word + 1,
498 eeprom_buff);
499 else {
500 for (i = 0; i < last_word - first_word + 1; i++)
501 if((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
502 &eeprom_buff[i])))
503 break;
504 }
505
506 /* Device's eeprom is always little-endian, word addressable */
507 for (i = 0; i < last_word - first_word + 1; i++)
508 le16_to_cpus(&eeprom_buff[i]);
509
510 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
511 eeprom->len);
512 kfree(eeprom_buff);
513
514 return ret_val;
515}
516
517static int
518e1000_set_eeprom(struct net_device *netdev,
519 struct ethtool_eeprom *eeprom, uint8_t *bytes)
520{
60490fe0 521 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 522 struct e1000_hw *hw = &adapter->hw;
523 uint16_t *eeprom_buff;
524 void *ptr;
525 int max_len, first_word, last_word, ret_val = 0;
526 uint16_t i;
527
528 if(eeprom->len == 0)
529 return -EOPNOTSUPP;
530
531 if(eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
532 return -EFAULT;
533
534 max_len = hw->eeprom.word_size * 2;
535
536 first_word = eeprom->offset >> 1;
537 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
538 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
539 if(!eeprom_buff)
540 return -ENOMEM;
541
542 ptr = (void *)eeprom_buff;
543
544 if(eeprom->offset & 1) {
545 /* need read/modify/write of first changed EEPROM word */
546 /* only the second byte of the word is being modified */
547 ret_val = e1000_read_eeprom(hw, first_word, 1,
548 &eeprom_buff[0]);
549 ptr++;
550 }
551 if(((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
552 /* need read/modify/write of last changed EEPROM word */
553 /* only the first byte of the word is being modified */
554 ret_val = e1000_read_eeprom(hw, last_word, 1,
555 &eeprom_buff[last_word - first_word]);
556 }
557
558 /* Device's eeprom is always little-endian, word addressable */
559 for (i = 0; i < last_word - first_word + 1; i++)
560 le16_to_cpus(&eeprom_buff[i]);
561
562 memcpy(ptr, bytes, eeprom->len);
563
564 for (i = 0; i < last_word - first_word + 1; i++)
565 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
566
567 ret_val = e1000_write_eeprom(hw, first_word,
568 last_word - first_word + 1, eeprom_buff);
569
a7990ba6
MC		 570 /* Update the checksum over the first part of the EEPROM if needed
571 * and flush shadow RAM for 82573 conrollers */
572 if((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
573 (hw->mac_type == e1000_82573)))
1da177e4
LT		 574 e1000_update_eeprom_checksum(hw);
575
576 kfree(eeprom_buff);
577 return ret_val;
578}
579
580static void
581e1000_get_drvinfo(struct net_device *netdev,
582 struct ethtool_drvinfo *drvinfo)
583{
60490fe0 584 struct e1000_adapter *adapter = netdev_priv(netdev);
a2917e22
JK		 585 char firmware_version[32];
586 uint16_t eeprom_data;
1da177e4
LT		 587
588 strncpy(drvinfo->driver, e1000_driver_name, 32);
589 strncpy(drvinfo->version, e1000_driver_version, 32);
a2917e22
JK		 590
591 /* EEPROM image version # is reported as firmware version # for
592 * 8257{1|2|3} controllers */
593 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
594 switch (adapter->hw.mac_type) {
595 case e1000_82571:
596 case e1000_82572:
597 case e1000_82573:
598 sprintf(firmware_version, "%d.%d-%d",
599 (eeprom_data & 0xF000) >> 12,
600 (eeprom_data & 0x0FF0) >> 4,
601 eeprom_data & 0x000F);
602 break;
603 default:
604 sprintf(firmware_version, "N/A");
605 }
606
607 strncpy(drvinfo->fw_version, firmware_version, 32);
1da177e4
LT		 608 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
609 drvinfo->n_stats = E1000_STATS_LEN;
610 drvinfo->testinfo_len = E1000_TEST_LEN;
611 drvinfo->regdump_len = e1000_get_regs_len(netdev);
612 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
613}
614
615static void
616e1000_get_ringparam(struct net_device *netdev,
617 struct ethtool_ringparam *ring)
618{
60490fe0 619 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 620 e1000_mac_type mac_type = adapter->hw.mac_type;
581d708e
MC		 621 struct e1000_tx_ring *txdr = adapter->tx_ring;
622 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT		 623
624 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
625 E1000_MAX_82544_RXD;
626 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
627 E1000_MAX_82544_TXD;
628 ring->rx_mini_max_pending = 0;
629 ring->rx_jumbo_max_pending = 0;
630 ring->rx_pending = rxdr->count;
631 ring->tx_pending = txdr->count;
632 ring->rx_mini_pending = 0;
633 ring->rx_jumbo_pending = 0;
634}
635
636static int
637e1000_set_ringparam(struct net_device *netdev,
638 struct ethtool_ringparam *ring)
639{
60490fe0 640 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 641 e1000_mac_type mac_type = adapter->hw.mac_type;
581d708e
MC		 642 struct e1000_tx_ring *txdr, *tx_old, *tx_new;
643 struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
644 int i, err, tx_ring_size, rx_ring_size;
645
f56799ea
JK		 646 tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
647 rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 648
649 if (netif_running(adapter->netdev))
650 e1000_down(adapter);
1da177e4
LT		 651
652 tx_old = adapter->tx_ring;
653 rx_old = adapter->rx_ring;
654
581d708e
MC		 655 adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
656 if (!adapter->tx_ring) {
657 err = -ENOMEM;
658 goto err_setup_rx;
659 }
660 memset(adapter->tx_ring, 0, tx_ring_size);
661
662 adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
663 if (!adapter->rx_ring) {
664 kfree(adapter->tx_ring);
665 err = -ENOMEM;
666 goto err_setup_rx;
667 }
668 memset(adapter->rx_ring, 0, rx_ring_size);
669
670 txdr = adapter->tx_ring;
671 rxdr = adapter->rx_ring;
672
2648345f 673 if((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1da177e4
LT		 674 return -EINVAL;
675
1da177e4
LT		 676 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
677 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
678 E1000_MAX_RXD : E1000_MAX_82544_RXD));
679 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
680
681 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
682 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
683 E1000_MAX_TXD : E1000_MAX_82544_TXD));
684 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
685
f56799ea 686 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 687 txdr[i].count = txdr->count;
f56799ea 688 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 689 rxdr[i].count = rxdr->count;
581d708e 690
1da177e4
LT		 691 if(netif_running(adapter->netdev)) {
692 /* Try to get new resources before deleting old */
581d708e 693 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4 694 goto err_setup_rx;
581d708e 695 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 696 goto err_setup_tx;
697
698 /* save the new, restore the old in order to free it,
699 * then restore the new back again */
700
701 rx_new = adapter->rx_ring;
702 tx_new = adapter->tx_ring;
703 adapter->rx_ring = rx_old;
704 adapter->tx_ring = tx_old;
581d708e
MC		 705 e1000_free_all_rx_resources(adapter);
706 e1000_free_all_tx_resources(adapter);
707 kfree(tx_old);
708 kfree(rx_old);
1da177e4
LT		 709 adapter->rx_ring = rx_new;
710 adapter->tx_ring = tx_new;
711 if((err = e1000_up(adapter)))
712 return err;
713 }
714
715 return 0;
716err_setup_tx:
581d708e 717 e1000_free_all_rx_resources(adapter);
1da177e4
LT		 718err_setup_rx:
719 adapter->rx_ring = rx_old;
720 adapter->tx_ring = tx_old;
721 e1000_up(adapter);
722 return err;
723}
724
725#define REG_PATTERN_TEST(R, M, W) \
726{ \
727 uint32_t pat, value; \
728 uint32_t test[] = \
729 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
730 for(pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
731 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
732 value = E1000_READ_REG(&adapter->hw, R); \
733 if(value != (test[pat] & W & M)) { \
b01f6691
MC		 734 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
735 "0x%08X expected 0x%08X\n", \
736 E1000_##R, value, (test[pat] & W & M)); \
1da177e4
LT		 737 *data = (adapter->hw.mac_type < e1000_82543) ? \
738 E1000_82542_##R : E1000_##R; \
739 return 1; \
740 } \
741 } \
742}
743
744#define REG_SET_AND_CHECK(R, M, W) \
745{ \
746 uint32_t value; \
747 E1000_WRITE_REG(&adapter->hw, R, W & M); \
748 value = E1000_READ_REG(&adapter->hw, R); \
b01f6691
MC		 749 if((W & M) != (value & M)) { \
750 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
751 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
1da177e4
LT		 752 *data = (adapter->hw.mac_type < e1000_82543) ? \
753 E1000_82542_##R : E1000_##R; \
754 return 1; \
755 } \
756}
757
758static int
759e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
760{
b01f6691
MC		 761 uint32_t value, before, after;
762 uint32_t i, toggle;
1da177e4
LT		 763
764 /* The status register is Read Only, so a write should fail.
765 * Some bits that get toggled are ignored.
766 */
b01f6691 767 switch (adapter->hw.mac_type) {
868d5309
MC		 768 /* there are several bits on newer hardware that are r/w */
769 case e1000_82571:
770 case e1000_82572:
771 toggle = 0x7FFFF3FF;
772 break;
b01f6691
MC		 773 case e1000_82573:
774 toggle = 0x7FFFF033;
775 break;
776 default:
777 toggle = 0xFFFFF833;
778 break;
779 }
780
781 before = E1000_READ_REG(&adapter->hw, STATUS);
782 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
783 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
784 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
785 if(value != after) {
786 DPRINTK(DRV, ERR, "failed STATUS register test got: "
787 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT		 788 *data = 1;
789 return 1;
790 }
b01f6691
MC		 791 /* restore previous status */
792 E1000_WRITE_REG(&adapter->hw, STATUS, before);
1da177e4
LT		 793
794 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
795 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
796 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
797 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
798 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
799 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
800 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
801 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
802 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
803 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
804 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
805 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
806 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
807 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
808
809 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
810 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
811 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
812
813 if(adapter->hw.mac_type >= e1000_82543) {
814
815 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
816 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
817 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
818 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
819 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
820
821 for(i = 0; i < E1000_RAR_ENTRIES; i++) {
822 REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
823 0xFFFFFFFF);
824 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
825 0xFFFFFFFF);
826 }
827
828 } else {
829
830 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
831 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
832 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
833 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
834
835 }
836
837 for(i = 0; i < E1000_MC_TBL_SIZE; i++)
838 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
839
840 *data = 0;
841 return 0;
842}
843
844static int
845e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
846{
847 uint16_t temp;
848 uint16_t checksum = 0;
849 uint16_t i;
850
851 *data = 0;
852 /* Read and add up the contents of the EEPROM */
853 for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
854 if((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
855 *data = 1;
856 break;
857 }
858 checksum += temp;
859 }
860
861 /* If Checksum is not Correct return error else test passed */
862 if((checksum != (uint16_t) EEPROM_SUM) && !(*data))
863 *data = 2;
864
865 return *data;
866}
867
868static irqreturn_t
869e1000_test_intr(int irq,
870 void *data,
871 struct pt_regs *regs)
872{
873 struct net_device *netdev = (struct net_device *) data;
60490fe0 874 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 875
876 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
877
878 return IRQ_HANDLED;
879}
880
881static int
882e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
883{
884 struct net_device *netdev = adapter->netdev;
885 uint32_t mask, i=0, shared_int = TRUE;
886 uint32_t irq = adapter->pdev->irq;
887
888 *data = 0;
889
890 /* Hook up test interrupt handler just for this test */
891 if(!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
892 shared_int = FALSE;
2648345f
MC		 893 } else if(request_irq(irq, &e1000_test_intr, SA_SHIRQ,
894 netdev->name, netdev)){
1da177e4
LT		 895 *data = 1;
896 return -1;
897 }
898
899 /* Disable all the interrupts */
900 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
901 msec_delay(10);
902
903 /* Test each interrupt */
904 for(; i < 10; i++) {
905
906 /* Interrupt to test */
907 mask = 1 << i;
908
909 if(!shared_int) {
910 /* Disable the interrupt to be reported in
911 * the cause register and then force the same
912 * interrupt and see if one gets posted. If
913 * an interrupt was posted to the bus, the
914 * test failed.
915 */
916 adapter->test_icr = 0;
917 E1000_WRITE_REG(&adapter->hw, IMC, mask);
918 E1000_WRITE_REG(&adapter->hw, ICS, mask);
919 msec_delay(10);
920
921 if(adapter->test_icr & mask) {
922 *data = 3;
923 break;
924 }
925 }
926
927 /* Enable the interrupt to be reported in
928 * the cause register and then force the same
929 * interrupt and see if one gets posted. If
930 * an interrupt was not posted to the bus, the
931 * test failed.
932 */
933 adapter->test_icr = 0;
934 E1000_WRITE_REG(&adapter->hw, IMS, mask);
935 E1000_WRITE_REG(&adapter->hw, ICS, mask);
936 msec_delay(10);
937
938 if(!(adapter->test_icr & mask)) {
939 *data = 4;
940 break;
941 }
942
943 if(!shared_int) {
944 /* Disable the other interrupts to be reported in
945 * the cause register and then force the other
946 * interrupts and see if any get posted. If
947 * an interrupt was posted to the bus, the
948 * test failed.
949 */
950 adapter->test_icr = 0;
2648345f
MC		 951 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
952 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
1da177e4
LT		 953 msec_delay(10);
954
955 if(adapter->test_icr) {
956 *data = 5;
957 break;
958 }
959 }
960 }
961
962 /* Disable all the interrupts */
963 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
964 msec_delay(10);
965
966 /* Unhook test interrupt handler */
967 free_irq(irq, netdev);
968
969 return *data;
970}
971
972static void
973e1000_free_desc_rings(struct e1000_adapter *adapter)
974{
581d708e
MC		 975 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
976 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT		 977 struct pci_dev *pdev = adapter->pdev;
978 int i;
979
980 if(txdr->desc && txdr->buffer_info) {
981 for(i = 0; i < txdr->count; i++) {
982 if(txdr->buffer_info[i].dma)
983 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
984 txdr->buffer_info[i].length,
985 PCI_DMA_TODEVICE);
986 if(txdr->buffer_info[i].skb)
987 dev_kfree_skb(txdr->buffer_info[i].skb);
988 }
989 }
990
991 if(rxdr->desc && rxdr->buffer_info) {
992 for(i = 0; i < rxdr->count; i++) {
993 if(rxdr->buffer_info[i].dma)
994 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
995 rxdr->buffer_info[i].length,
996 PCI_DMA_FROMDEVICE);
997 if(rxdr->buffer_info[i].skb)
998 dev_kfree_skb(rxdr->buffer_info[i].skb);
999 }
1000 }
1001
f5645110 1002 if (txdr->desc) {
1da177e4 1003 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
6b27adb6
JL		 1004 txdr->desc = NULL;
1005 }
f5645110 1006 if (rxdr->desc) {
1da177e4 1007 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
6b27adb6
JL		 1008 rxdr->desc = NULL;
1009 }
1da177e4 1010
b4558ea9 1011 kfree(txdr->buffer_info);
6b27adb6 1012 txdr->buffer_info = NULL;
b4558ea9 1013 kfree(rxdr->buffer_info);
6b27adb6 1014 rxdr->buffer_info = NULL;
f5645110 1015
1da177e4
LT		 1016 return;
1017}
1018
1019static int
1020e1000_setup_desc_rings(struct e1000_adapter *adapter)
1021{
581d708e
MC		 1022 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1023 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT		 1024 struct pci_dev *pdev = adapter->pdev;
1025 uint32_t rctl;
1026 int size, i, ret_val;
1027
1028 /* Setup Tx descriptor ring and Tx buffers */
1029
e4eff729
MC		 1030 if(!txdr->count)
1031 txdr->count = E1000_DEFAULT_TXD;
1da177e4
LT		 1032
1033 size = txdr->count * sizeof(struct e1000_buffer);
1034 if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1035 ret_val = 1;
1036 goto err_nomem;
1037 }
1038 memset(txdr->buffer_info, 0, size);
1039
1040 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1041 E1000_ROUNDUP(txdr->size, 4096);
1042 if(!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
1043 ret_val = 2;
1044 goto err_nomem;
1045 }
1046 memset(txdr->desc, 0, txdr->size);
1047 txdr->next_to_use = txdr->next_to_clean = 0;
1048
1049 E1000_WRITE_REG(&adapter->hw, TDBAL,
1050 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1051 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1052 E1000_WRITE_REG(&adapter->hw, TDLEN,
1053 txdr->count * sizeof(struct e1000_tx_desc));
1054 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1055 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1056 E1000_WRITE_REG(&adapter->hw, TCTL,
1057 E1000_TCTL_PSP | E1000_TCTL_EN |
1058 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1059 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1060
1061 for(i = 0; i < txdr->count; i++) {
1062 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1063 struct sk_buff *skb;
1064 unsigned int size = 1024;
1065
1066 if(!(skb = alloc_skb(size, GFP_KERNEL))) {
1067 ret_val = 3;
1068 goto err_nomem;
1069 }
1070 skb_put(skb, size);
1071 txdr->buffer_info[i].skb = skb;
1072 txdr->buffer_info[i].length = skb->len;
1073 txdr->buffer_info[i].dma =
1074 pci_map_single(pdev, skb->data, skb->len,
1075 PCI_DMA_TODEVICE);
1076 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1077 tx_desc->lower.data = cpu_to_le32(skb->len);
1078 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1079 E1000_TXD_CMD_IFCS |
1080 E1000_TXD_CMD_RPS);
1081 tx_desc->upper.data = 0;
1082 }
1083
1084 /* Setup Rx descriptor ring and Rx buffers */
1085
e4eff729
MC		 1086 if(!rxdr->count)
1087 rxdr->count = E1000_DEFAULT_RXD;
1da177e4
LT		 1088
1089 size = rxdr->count * sizeof(struct e1000_buffer);
1090 if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1091 ret_val = 4;
1092 goto err_nomem;
1093 }
1094 memset(rxdr->buffer_info, 0, size);
1095
1096 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
1097 if(!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1098 ret_val = 5;
1099 goto err_nomem;
1100 }
1101 memset(rxdr->desc, 0, rxdr->size);
1102 rxdr->next_to_use = rxdr->next_to_clean = 0;
1103
1104 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1105 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1106 E1000_WRITE_REG(&adapter->hw, RDBAL,
1107 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1108 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1109 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1110 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1111 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1112 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1113 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1114 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1115 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1116
1117 for(i = 0; i < rxdr->count; i++) {
1118 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1119 struct sk_buff *skb;
1120
2648345f 1121 if(!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1da177e4
LT		 1122 GFP_KERNEL))) {
1123 ret_val = 6;
1124 goto err_nomem;
1125 }
1126 skb_reserve(skb, NET_IP_ALIGN);
1127 rxdr->buffer_info[i].skb = skb;
1128 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1129 rxdr->buffer_info[i].dma =
1130 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1131 PCI_DMA_FROMDEVICE);
1132 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1133 memset(skb->data, 0x00, skb->len);
1134 }
1135
1136 return 0;
1137
1138err_nomem:
1139 e1000_free_desc_rings(adapter);
1140 return ret_val;
1141}
1142
1143static void
1144e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1145{
1146 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1147 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1148 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1149 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1150 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1151}
1152
1153static void
1154e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1155{
1156 uint16_t phy_reg;
1157
1158 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1159 * Extended PHY Specific Control Register to 25MHz clock. This
1160 * value defaults back to a 2.5MHz clock when the PHY is reset.
1161 */
1162 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1163 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1164 e1000_write_phy_reg(&adapter->hw,
1165 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1166
1167 /* In addition, because of the s/w reset above, we need to enable
1168 * CRS on TX. This must be set for both full and half duplex
1169 * operation.
1170 */
1171 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1172 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1173 e1000_write_phy_reg(&adapter->hw,
1174 M88E1000_PHY_SPEC_CTRL, phy_reg);
1175}
1176
1177static int
1178e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1179{
1180 uint32_t ctrl_reg;
1181 uint16_t phy_reg;
1182
1183 /* Setup the Device Control Register for PHY loopback test. */
1184
1185 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1186 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1187 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1188 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1189 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1190 E1000_CTRL_FD); /* Force Duplex to FULL */
1191
1192 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1193
1194 /* Read the PHY Specific Control Register (0x10) */
1195 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1196
1197 /* Clear Auto-Crossover bits in PHY Specific Control Register
1198 * (bits 6:5).
1199 */
1200 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1201 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1202
1203 /* Perform software reset on the PHY */
1204 e1000_phy_reset(&adapter->hw);
1205
1206 /* Have to setup TX_CLK and TX_CRS after software reset */
1207 e1000_phy_reset_clk_and_crs(adapter);
1208
1209 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1210
1211 /* Wait for reset to complete. */
1212 udelay(500);
1213
1214 /* Have to setup TX_CLK and TX_CRS after software reset */
1215 e1000_phy_reset_clk_and_crs(adapter);
1216
1217 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1218 e1000_phy_disable_receiver(adapter);
1219
1220 /* Set the loopback bit in the PHY control register. */
1221 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1222 phy_reg |= MII_CR_LOOPBACK;
1223 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1224
1225 /* Setup TX_CLK and TX_CRS one more time. */
1226 e1000_phy_reset_clk_and_crs(adapter);
1227
1228 /* Check Phy Configuration */
1229 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1230 if(phy_reg != 0x4100)
1231 return 9;
1232
1233 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1234 if(phy_reg != 0x0070)
1235 return 10;
1236
1237 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
1238 if(phy_reg != 0x001A)
1239 return 11;
1240
1241 return 0;
1242}
1243
1244static int
1245e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1246{
1247 uint32_t ctrl_reg = 0;
1248 uint32_t stat_reg = 0;
1249
1250 adapter->hw.autoneg = FALSE;
1251
1252 if(adapter->hw.phy_type == e1000_phy_m88) {
1253 /* Auto-MDI/MDIX Off */
1254 e1000_write_phy_reg(&adapter->hw,
1255 M88E1000_PHY_SPEC_CTRL, 0x0808);
1256 /* reset to update Auto-MDI/MDIX */
1257 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1258 /* autoneg off */
1259 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
1260 }
1261 /* force 1000, set loopback */
1262 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1263
1264 /* Now set up the MAC to the same speed/duplex as the PHY. */
1265 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1266 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1267 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1268 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1269 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1270 E1000_CTRL_FD); /* Force Duplex to FULL */
1271
1272 if(adapter->hw.media_type == e1000_media_type_copper &&
1273 adapter->hw.phy_type == e1000_phy_m88) {
1274 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1275 } else {
1276 /* Set the ILOS bit on the fiber Nic is half
1277 * duplex link is detected. */
1278 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
1279 if((stat_reg & E1000_STATUS_FD) == 0)
1280 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1281 }
1282
1283 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1284
1285 /* Disable the receiver on the PHY so when a cable is plugged in, the
1286 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1287 */
1288 if(adapter->hw.phy_type == e1000_phy_m88)
1289 e1000_phy_disable_receiver(adapter);
1290
1291 udelay(500);
1292
1293 return 0;
1294}
1295
1296static int
1297e1000_set_phy_loopback(struct e1000_adapter *adapter)
1298{
1299 uint16_t phy_reg = 0;
1300 uint16_t count = 0;
1301
1302 switch (adapter->hw.mac_type) {
1303 case e1000_82543:
1304 if(adapter->hw.media_type == e1000_media_type_copper) {
1305 /* Attempt to setup Loopback mode on Non-integrated PHY.
1306 * Some PHY registers get corrupted at random, so
1307 * attempt this 10 times.
1308 */
1309 while(e1000_nonintegrated_phy_loopback(adapter) &&
1310 count++ < 10);
1311 if(count < 11)
1312 return 0;
1313 }
1314 break;
1315
1316 case e1000_82544:
1317 case e1000_82540:
1318 case e1000_82545:
1319 case e1000_82545_rev_3:
1320 case e1000_82546:
1321 case e1000_82546_rev_3:
1322 case e1000_82541:
1323 case e1000_82541_rev_2:
1324 case e1000_82547:
1325 case e1000_82547_rev_2:
868d5309
MC		 1326 case e1000_82571:
1327 case e1000_82572:
4564327b 1328 case e1000_82573:
1da177e4
LT		 1329 return e1000_integrated_phy_loopback(adapter);
1330 break;
1331
1332 default:
1333 /* Default PHY loopback work is to read the MII
1334 * control register and assert bit 14 (loopback mode).
1335 */
1336 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1337 phy_reg |= MII_CR_LOOPBACK;
1338 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1339 return 0;
1340 break;
1341 }
1342
1343 return 8;
1344}
1345
1346static int
1347e1000_setup_loopback_test(struct e1000_adapter *adapter)
1348{
49273163 1349 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1350 uint32_t rctl;
1351
49273163
JK		 1352 if (hw->media_type == e1000_media_type_fiber ||
1353 hw->media_type == e1000_media_type_internal_serdes) {
1354 switch (hw->mac_type) {
1355 case e1000_82545:
1356 case e1000_82546:
1357 case e1000_82545_rev_3:
1358 case e1000_82546_rev_3:
1da177e4 1359 return e1000_set_phy_loopback(adapter);
49273163
JK		 1360 break;
1361 case e1000_82571:
1362 case e1000_82572:
1363#define E1000_SERDES_LB_ON 0x410
1364 e1000_set_phy_loopback(adapter);
1365 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
1366 msec_delay(10);
1367 return 0;
1368 break;
1369 default:
1370 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1371 rctl |= E1000_RCTL_LBM_TCVR;
49273163 1372 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1373 return 0;
1374 }
49273163 1375 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT		 1376 return e1000_set_phy_loopback(adapter);
1377
1378 return 7;
1379}
1380
1381static void
1382e1000_loopback_cleanup(struct e1000_adapter *adapter)
1383{
49273163 1384 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1385 uint32_t rctl;
1386 uint16_t phy_reg;
1387
49273163 1388 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1389 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
49273163 1390 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4 1391
49273163
JK		 1392 switch (hw->mac_type) {
1393 case e1000_82571:
1394 case e1000_82572:
1395 if (hw->media_type == e1000_media_type_fiber ||
1396 hw->media_type == e1000_media_type_internal_serdes) {
1397#define E1000_SERDES_LB_OFF 0x400
1398 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
1399 msec_delay(10);
1400 break;
1401 }
1402 /* Fall Through */
1403 case e1000_82545:
1404 case e1000_82546:
1405 case e1000_82545_rev_3:
1406 case e1000_82546_rev_3:
1407 default:
1408 hw->autoneg = TRUE;
1409 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1410 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1411 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK		 1412 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1413 e1000_phy_reset(hw);
1da177e4 1414 }
49273163 1415 break;
1da177e4
LT		 1416 }
1417}
1418
1419static void
1420e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1421{
1422 memset(skb->data, 0xFF, frame_size);
ce7393b9 1423 frame_size &= ~1;
1da177e4
LT		 1424 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1425 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1426 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1427}
1428
1429static int
1430e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1431{
ce7393b9 1432 frame_size &= ~1;
1da177e4
LT		 1433 if(*(skb->data + 3) == 0xFF) {
1434 if((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1435 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1436 return 0;
1437 }
1438 }
1439 return 13;
1440}
1441
1442static int
1443e1000_run_loopback_test(struct e1000_adapter *adapter)
1444{
581d708e
MC		 1445 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1446 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1447 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC		 1448 int i, j, k, l, lc, good_cnt, ret_val=0;
1449 unsigned long time;
1da177e4
LT		 1450
1451 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1452
e4eff729
MC		 1453 /* Calculate the loop count based on the largest descriptor ring
1454 * The idea is to wrap the largest ring a number of times using 64
1455 * send/receive pairs during each loop
1456 */
1da177e4 1457
e4eff729
MC		 1458 if(rxdr->count <= txdr->count)
1459 lc = ((txdr->count / 64) * 2) + 1;
1460 else
1461 lc = ((rxdr->count / 64) * 2) + 1;
1462
1463 k = l = 0;
1464 for(j = 0; j <= lc; j++) { /* loop count loop */
1465 for(i = 0; i < 64; i++) { /* send the packets */
1466 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
1467 1024);
1468 pci_dma_sync_single_for_device(pdev,
1469 txdr->buffer_info[k].dma,
1470 txdr->buffer_info[k].length,
1471 PCI_DMA_TODEVICE);
1472 if(unlikely(++k == txdr->count)) k = 0;
1473 }
1474 E1000_WRITE_REG(&adapter->hw, TDT, k);
1475 msec_delay(200);
1476 time = jiffies; /* set the start time for the receive */
1477 good_cnt = 0;
1478 do { /* receive the sent packets */
1479 pci_dma_sync_single_for_cpu(pdev,
1480 rxdr->buffer_info[l].dma,
1481 rxdr->buffer_info[l].length,
1482 PCI_DMA_FROMDEVICE);
1483
1484 ret_val = e1000_check_lbtest_frame(
1485 rxdr->buffer_info[l].skb,
1486 1024);
1487 if(!ret_val)
1488 good_cnt++;
1489 if(unlikely(++l == rxdr->count)) l = 0;
1490 /* time + 20 msecs (200 msecs on 2.4) is more than
1491 * enough time to complete the receives, if it's
1492 * exceeded, break and error off
1493 */
1494 } while (good_cnt < 64 && jiffies < (time + 20));
1495 if(good_cnt != 64) {
1496 ret_val = 13; /* ret_val is the same as mis-compare */
1497 break;
1498 }
1499 if(jiffies >= (time + 2)) {
1500 ret_val = 14; /* error code for time out error */
1501 break;
1502 }
1503 } /* end loop count loop */
1da177e4
LT		 1504 return ret_val;
1505}
1506
1507static int
1508e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1509{
57128197
JK		 1510 /* PHY loopback cannot be performed if SoL/IDER
1511 * sessions are active */
1512 if (e1000_check_phy_reset_block(&adapter->hw)) {
1513 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1514 "when SoL/IDER is active.\n");
1515 *data = 0;
1516 goto out;
1517 }
1518
1519 if ((*data = e1000_setup_desc_rings(adapter)))
1520 goto out;
1521 if ((*data = e1000_setup_loopback_test(adapter)))
1522 goto err_loopback;
1da177e4
LT		 1523 *data = e1000_run_loopback_test(adapter);
1524 e1000_loopback_cleanup(adapter);
57128197 1525
1da177e4 1526err_loopback:
57128197
JK		 1527 e1000_free_desc_rings(adapter);
1528out:
1da177e4
LT		 1529 return *data;
1530}
1531
1532static int
1533e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1534{
1535 *data = 0;
1da177e4
LT		 1536 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1537 int i = 0;
1538 adapter->hw.serdes_link_down = TRUE;
1539
2648345f
MC		 1540 /* On some blade server designs, link establishment
1541 * could take as long as 2-3 minutes */
1da177e4
LT		 1542 do {
1543 e1000_check_for_link(&adapter->hw);
1544 if (adapter->hw.serdes_link_down == FALSE)
1545 return *data;
1546 msec_delay(20);
1547 } while (i++ < 3750);
1548
2648345f 1549 *data = 1;
1da177e4
LT		 1550 } else {
1551 e1000_check_for_link(&adapter->hw);
e4eff729
MC		 1552 if(adapter->hw.autoneg) /* if auto_neg is set wait for it */
1553 msec_delay(4000);
1da177e4
LT		 1554
1555 if(!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1556 *data = 1;
1557 }
1558 }
1559 return *data;
1560}
1561
1562static int
1563e1000_diag_test_count(struct net_device *netdev)
1564{
1565 return E1000_TEST_LEN;
1566}
1567
1568static void
1569e1000_diag_test(struct net_device *netdev,
1570 struct ethtool_test *eth_test, uint64_t *data)
1571{
60490fe0 1572 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1573 boolean_t if_running = netif_running(netdev);
1574
1575 if(eth_test->flags == ETH_TEST_FL_OFFLINE) {
1576 /* Offline tests */
1577
1578 /* save speed, duplex, autoneg settings */
1579 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1580 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1581 uint8_t autoneg = adapter->hw.autoneg;
1582
1583 /* Link test performed before hardware reset so autoneg doesn't
1584 * interfere with test result */
1585 if(e1000_link_test(adapter, &data[4]))
1586 eth_test->flags |= ETH_TEST_FL_FAILED;
1587
1588 if(if_running)
1589 e1000_down(adapter);
1590 else
1591 e1000_reset(adapter);
1592
1593 if(e1000_reg_test(adapter, &data[0]))
1594 eth_test->flags |= ETH_TEST_FL_FAILED;
1595
1596 e1000_reset(adapter);
1597 if(e1000_eeprom_test(adapter, &data[1]))
1598 eth_test->flags |= ETH_TEST_FL_FAILED;
1599
1600 e1000_reset(adapter);
1601 if(e1000_intr_test(adapter, &data[2]))
1602 eth_test->flags |= ETH_TEST_FL_FAILED;
1603
1604 e1000_reset(adapter);
1605 if(e1000_loopback_test(adapter, &data[3]))
1606 eth_test->flags |= ETH_TEST_FL_FAILED;
1607
1608 /* restore speed, duplex, autoneg settings */
1609 adapter->hw.autoneg_advertised = autoneg_advertised;
1610 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1611 adapter->hw.autoneg = autoneg;
1612
1613 e1000_reset(adapter);
1614 if(if_running)
1615 e1000_up(adapter);
1616 } else {
1617 /* Online tests */
1618 if(e1000_link_test(adapter, &data[4]))
1619 eth_test->flags |= ETH_TEST_FL_FAILED;
1620
1621 /* Offline tests aren't run; pass by default */
1622 data[0] = 0;
1623 data[1] = 0;
1624 data[2] = 0;
1625 data[3] = 0;
1626 }
352c9f85 1627 msleep_interruptible(4 * 1000);
1da177e4
LT		 1628}
1629
1630static void
1631e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1632{
60490fe0 1633 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1634 struct e1000_hw *hw = &adapter->hw;
1635
1636 switch(adapter->hw.device_id) {
1637 case E1000_DEV_ID_82542:
1638 case E1000_DEV_ID_82543GC_FIBER:
1639 case E1000_DEV_ID_82543GC_COPPER:
1640 case E1000_DEV_ID_82544EI_FIBER:
1641 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1642 case E1000_DEV_ID_82545EM_FIBER:
1643 case E1000_DEV_ID_82545EM_COPPER:
1644 wol->supported = 0;
1645 wol->wolopts = 0;
1646 return;
1647
1648 case E1000_DEV_ID_82546EB_FIBER:
1649 case E1000_DEV_ID_82546GB_FIBER:
b7ee49db 1650 case E1000_DEV_ID_82571EB_FIBER:
1da177e4
LT		 1651 /* Wake events only supported on port A for dual fiber */
1652 if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1653 wol->supported = 0;
1654 wol->wolopts = 0;
1655 return;
1656 }
1657 /* Fall Through */
1658
1659 default:
1660 wol->supported = WAKE_UCAST | WAKE_MCAST |
1661 WAKE_BCAST | WAKE_MAGIC;
1662
1663 wol->wolopts = 0;
1664 if(adapter->wol & E1000_WUFC_EX)
1665 wol->wolopts |= WAKE_UCAST;
1666 if(adapter->wol & E1000_WUFC_MC)
1667 wol->wolopts |= WAKE_MCAST;
1668 if(adapter->wol & E1000_WUFC_BC)
1669 wol->wolopts |= WAKE_BCAST;
1670 if(adapter->wol & E1000_WUFC_MAG)
1671 wol->wolopts |= WAKE_MAGIC;
1672 return;
1673 }
1674}
1675
1676static int
1677e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1678{
60490fe0 1679 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1680 struct e1000_hw *hw = &adapter->hw;
1681
1682 switch(adapter->hw.device_id) {
1683 case E1000_DEV_ID_82542:
1684 case E1000_DEV_ID_82543GC_FIBER:
1685 case E1000_DEV_ID_82543GC_COPPER:
1686 case E1000_DEV_ID_82544EI_FIBER:
1687 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1688 case E1000_DEV_ID_82545EM_FIBER:
1689 case E1000_DEV_ID_82545EM_COPPER:
1690 return wol->wolopts ? -EOPNOTSUPP : 0;
1691
1692 case E1000_DEV_ID_82546EB_FIBER:
1693 case E1000_DEV_ID_82546GB_FIBER:
b7ee49db 1694 case E1000_DEV_ID_82571EB_FIBER:
1da177e4
LT		 1695 /* Wake events only supported on port A for dual fiber */
1696 if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
1697 return wol->wolopts ? -EOPNOTSUPP : 0;
1698 /* Fall Through */
1699
1700 default:
1701 if(wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1702 return -EOPNOTSUPP;
1703
1704 adapter->wol = 0;
1705
1706 if(wol->wolopts & WAKE_UCAST)
1707 adapter->wol |= E1000_WUFC_EX;
1708 if(wol->wolopts & WAKE_MCAST)
1709 adapter->wol |= E1000_WUFC_MC;
1710 if(wol->wolopts & WAKE_BCAST)
1711 adapter->wol |= E1000_WUFC_BC;
1712 if(wol->wolopts & WAKE_MAGIC)
1713 adapter->wol |= E1000_WUFC_MAG;
1714 }
1715
1716 return 0;
1717}
1718
1719/* toggle LED 4 times per second = 2 "blinks" per second */
1720#define E1000_ID_INTERVAL (HZ/4)
1721
1722/* bit defines for adapter->led_status */
1723#define E1000_LED_ON 0
1724
1725static void
1726e1000_led_blink_callback(unsigned long data)
1727{
1728 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1729
1730 if(test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1731 e1000_led_off(&adapter->hw);
1732 else
1733 e1000_led_on(&adapter->hw);
1734
1735 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1736}
1737
1738static int
1739e1000_phys_id(struct net_device *netdev, uint32_t data)
1740{
60490fe0 1741 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1742
1743 if(!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1744 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1745
868d5309 1746 if(adapter->hw.mac_type < e1000_82571) {
d439d4b7
MC		 1747 if(!adapter->blink_timer.function) {
1748 init_timer(&adapter->blink_timer);
1749 adapter->blink_timer.function = e1000_led_blink_callback;
1750 adapter->blink_timer.data = (unsigned long) adapter;
1751 }
1752 e1000_setup_led(&adapter->hw);
1753 mod_timer(&adapter->blink_timer, jiffies);
1754 msleep_interruptible(data * 1000);
1755 del_timer_sync(&adapter->blink_timer);
d8c2bd3d
JK		 1756 } else if (adapter->hw.mac_type < e1000_82573) {
1757 E1000_WRITE_REG(&adapter->hw, LEDCTL,
1758 (E1000_LEDCTL_LED2_BLINK_RATE |
1759 E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
1760 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1761 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
1762 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
1763 msleep_interruptible(data * 1000);
1764 } else {
1765 E1000_WRITE_REG(&adapter->hw, LEDCTL,
1766 (E1000_LEDCTL_LED2_BLINK_RATE |
1767 E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
1768 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1769 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
1770 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
d439d4b7 1771 msleep_interruptible(data * 1000);
1da177e4
LT		 1772 }
1773
1da177e4
LT		 1774 e1000_led_off(&adapter->hw);
1775 clear_bit(E1000_LED_ON, &adapter->led_status);
1776 e1000_cleanup_led(&adapter->hw);
1777
1778 return 0;
1779}
1780
1781static int
1782e1000_nway_reset(struct net_device *netdev)
1783{
60490fe0 1784 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1785 if(netif_running(netdev)) {
1786 e1000_down(adapter);
1787 e1000_up(adapter);
1788 }
1789 return 0;
1790}
1791
1792static int
1793e1000_get_stats_count(struct net_device *netdev)
1794{
1795 return E1000_STATS_LEN;
1796}
1797
1798static void
1799e1000_get_ethtool_stats(struct net_device *netdev,
1800 struct ethtool_stats *stats, uint64_t *data)
1801{
60490fe0 1802 struct e1000_adapter *adapter = netdev_priv(netdev);
7bfa4816
JK		 1803#ifdef CONFIG_E1000_MQ
1804 uint64_t *queue_stat;
1805 int stat_count = sizeof(struct e1000_queue_stats) / sizeof(uint64_t);
1806 int j, k;
1807#endif
1da177e4
LT		 1808 int i;
1809
1810 e1000_update_stats(adapter);
7bfa4816
JK		 1811 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1812 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1813 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1da177e4
LT		 1814 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1815 }
7bfa4816
JK		 1816#ifdef CONFIG_E1000_MQ
1817 for (j = 0; j < adapter->num_tx_queues; j++) {
1818 queue_stat = (uint64_t *)&adapter->tx_ring[j].tx_stats;
1819 for (k = 0; k < stat_count; k++)
1820 data[i + k] = queue_stat[k];
1821 i += k;
1822 }
1823 for (j = 0; j < adapter->num_rx_queues; j++) {
1824 queue_stat = (uint64_t *)&adapter->rx_ring[j].rx_stats;
1825 for (k = 0; k < stat_count; k++)
1826 data[i + k] = queue_stat[k];
1827 i += k;
1828 }
1829#endif
1830/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT		 1831}
1832
1833static void
1834e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1835{
7bfa4816
JK		 1836#ifdef CONFIG_E1000_MQ
1837 struct e1000_adapter *adapter = netdev_priv(netdev);
1838#endif
1839 uint8_t *p = data;
1da177e4
LT		 1840 int i;
1841
1842 switch(stringset) {
1843 case ETH_SS_TEST:
1844 memcpy(data, *e1000_gstrings_test,
1845 E1000_TEST_LEN*ETH_GSTRING_LEN);
1846 break;
1847 case ETH_SS_STATS:
7bfa4816
JK		 1848 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1849 memcpy(p, e1000_gstrings_stats[i].stat_string,
1850 ETH_GSTRING_LEN);
1851 p += ETH_GSTRING_LEN;
1852 }
1853#ifdef CONFIG_E1000_MQ
1854 for (i = 0; i < adapter->num_tx_queues; i++) {
1855 sprintf(p, "tx_queue_%u_packets", i);
1856 p += ETH_GSTRING_LEN;
1857 sprintf(p, "tx_queue_%u_bytes", i);
1858 p += ETH_GSTRING_LEN;
1859 }
1860 for (i = 0; i < adapter->num_rx_queues; i++) {
1861 sprintf(p, "rx_queue_%u_packets", i);
1862 p += ETH_GSTRING_LEN;
1863 sprintf(p, "rx_queue_%u_bytes", i);
1864 p += ETH_GSTRING_LEN;
1da177e4 1865 }
7bfa4816
JK		 1866#endif
1867/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT		 1868 break;
1869 }
1870}
1871
3ad2cc67 1872static struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT		 1873 .get_settings = e1000_get_settings,
1874 .set_settings = e1000_set_settings,
1875 .get_drvinfo = e1000_get_drvinfo,
1876 .get_regs_len = e1000_get_regs_len,
1877 .get_regs = e1000_get_regs,
1878 .get_wol = e1000_get_wol,
1879 .set_wol = e1000_set_wol,
1880 .get_msglevel = e1000_get_msglevel,
1881 .set_msglevel = e1000_set_msglevel,
1882 .nway_reset = e1000_nway_reset,
1883 .get_link = ethtool_op_get_link,
1884 .get_eeprom_len = e1000_get_eeprom_len,
1885 .get_eeprom = e1000_get_eeprom,
1886 .set_eeprom = e1000_set_eeprom,
1887 .get_ringparam = e1000_get_ringparam,
1888 .set_ringparam = e1000_set_ringparam,
1889 .get_pauseparam = e1000_get_pauseparam,
1890 .set_pauseparam = e1000_set_pauseparam,
1891 .get_rx_csum = e1000_get_rx_csum,
1892 .set_rx_csum = e1000_set_rx_csum,
1893 .get_tx_csum = e1000_get_tx_csum,
1894 .set_tx_csum = e1000_set_tx_csum,
1895 .get_sg = ethtool_op_get_sg,
1896 .set_sg = ethtool_op_set_sg,
1897#ifdef NETIF_F_TSO
1898 .get_tso = ethtool_op_get_tso,
1899 .set_tso = e1000_set_tso,
1900#endif
1901 .self_test_count = e1000_diag_test_count,
1902 .self_test = e1000_diag_test,
1903 .get_strings = e1000_get_strings,
1904 .phys_id = e1000_phys_id,
1905 .get_stats_count = e1000_get_stats_count,
1906 .get_ethtool_stats = e1000_get_ethtool_stats,
9beb0ac1 1907 .get_perm_addr = ethtool_op_get_perm_addr,
1da177e4
LT		 1908};
1909
1910void e1000_set_ethtool_ops(struct net_device *netdev)
1911{
1912 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1913}