Commit | Line | Data |
---|---|---|
a4636960 MC |
1 | /* cnic.c: Broadcom CNIC core network driver. |
2 | * | |
3 | * Copyright (c) 2006-2009 Broadcom Corporation | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation. | |
8 | * | |
9 | * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com) | |
10 | * Modified and maintained by: Michael Chan <mchan@broadcom.com> | |
11 | */ | |
12 | ||
ddf79b20 JP |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
14 | ||
a4636960 MC |
15 | #include <linux/module.h> |
16 | ||
17 | #include <linux/kernel.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/list.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/pci.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/netdevice.h> | |
24 | #include <linux/uio_driver.h> | |
25 | #include <linux/in.h> | |
26 | #include <linux/dma-mapping.h> | |
27 | #include <linux/delay.h> | |
28 | #include <linux/ethtool.h> | |
29 | #include <linux/if_vlan.h> | |
30 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) | |
31 | #define BCM_VLAN 1 | |
32 | #endif | |
33 | #include <net/ip.h> | |
34 | #include <net/tcp.h> | |
35 | #include <net/route.h> | |
36 | #include <net/ipv6.h> | |
37 | #include <net/ip6_route.h> | |
c05e85a0 | 38 | #include <net/ip6_checksum.h> |
a4636960 MC |
39 | #include <scsi/iscsi_if.h> |
40 | ||
41 | #include "cnic_if.h" | |
42 | #include "bnx2.h" | |
e2513065 MC |
43 | #include "bnx2x_reg.h" |
44 | #include "bnx2x_fw_defs.h" | |
45 | #include "bnx2x_hsi.h" | |
46 | #include "../scsi/bnx2i/57xx_iscsi_constants.h" | |
47 | #include "../scsi/bnx2i/57xx_iscsi_hsi.h" | |
a4636960 MC |
48 | #include "cnic.h" |
49 | #include "cnic_defs.h" | |
50 | ||
51 | #define DRV_MODULE_NAME "cnic" | |
a4636960 MC |
52 | |
53 | static char version[] __devinitdata = | |
54 | "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n"; | |
55 | ||
56 | MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) " | |
57 | "Chen (zongxi@broadcom.com"); | |
58 | MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver"); | |
59 | MODULE_LICENSE("GPL"); | |
60 | MODULE_VERSION(CNIC_MODULE_VERSION); | |
61 | ||
62 | static LIST_HEAD(cnic_dev_list); | |
63 | static DEFINE_RWLOCK(cnic_dev_lock); | |
64 | static DEFINE_MUTEX(cnic_lock); | |
65 | ||
66 | static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE]; | |
67 | ||
68 | static int cnic_service_bnx2(void *, void *); | |
71034ba8 | 69 | static int cnic_service_bnx2x(void *, void *); |
a4636960 MC |
70 | static int cnic_ctl(void *, struct cnic_ctl_info *); |
71 | ||
72 | static struct cnic_ops cnic_bnx2_ops = { | |
73 | .cnic_owner = THIS_MODULE, | |
74 | .cnic_handler = cnic_service_bnx2, | |
75 | .cnic_ctl = cnic_ctl, | |
76 | }; | |
77 | ||
71034ba8 MC |
78 | static struct cnic_ops cnic_bnx2x_ops = { |
79 | .cnic_owner = THIS_MODULE, | |
80 | .cnic_handler = cnic_service_bnx2x, | |
81 | .cnic_ctl = cnic_ctl, | |
82 | }; | |
83 | ||
86b53606 MC |
84 | static void cnic_shutdown_rings(struct cnic_dev *); |
85 | static void cnic_init_rings(struct cnic_dev *); | |
a4636960 MC |
86 | static int cnic_cm_set_pg(struct cnic_sock *); |
87 | ||
88 | static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode) | |
89 | { | |
90 | struct cnic_dev *dev = uinfo->priv; | |
91 | struct cnic_local *cp = dev->cnic_priv; | |
92 | ||
93 | if (!capable(CAP_NET_ADMIN)) | |
94 | return -EPERM; | |
95 | ||
96 | if (cp->uio_dev != -1) | |
97 | return -EBUSY; | |
98 | ||
86b53606 MC |
99 | rtnl_lock(); |
100 | if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) { | |
101 | rtnl_unlock(); | |
102 | return -ENODEV; | |
103 | } | |
104 | ||
a4636960 MC |
105 | cp->uio_dev = iminor(inode); |
106 | ||
86b53606 MC |
107 | cnic_init_rings(dev); |
108 | rtnl_unlock(); | |
a4636960 MC |
109 | |
110 | return 0; | |
111 | } | |
112 | ||
113 | static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode) | |
114 | { | |
115 | struct cnic_dev *dev = uinfo->priv; | |
116 | struct cnic_local *cp = dev->cnic_priv; | |
117 | ||
86b53606 | 118 | cnic_shutdown_rings(dev); |
6ef57a0e | 119 | |
a4636960 MC |
120 | cp->uio_dev = -1; |
121 | return 0; | |
122 | } | |
123 | ||
124 | static inline void cnic_hold(struct cnic_dev *dev) | |
125 | { | |
126 | atomic_inc(&dev->ref_count); | |
127 | } | |
128 | ||
129 | static inline void cnic_put(struct cnic_dev *dev) | |
130 | { | |
131 | atomic_dec(&dev->ref_count); | |
132 | } | |
133 | ||
134 | static inline void csk_hold(struct cnic_sock *csk) | |
135 | { | |
136 | atomic_inc(&csk->ref_count); | |
137 | } | |
138 | ||
139 | static inline void csk_put(struct cnic_sock *csk) | |
140 | { | |
141 | atomic_dec(&csk->ref_count); | |
142 | } | |
143 | ||
144 | static struct cnic_dev *cnic_from_netdev(struct net_device *netdev) | |
145 | { | |
146 | struct cnic_dev *cdev; | |
147 | ||
148 | read_lock(&cnic_dev_lock); | |
149 | list_for_each_entry(cdev, &cnic_dev_list, list) { | |
150 | if (netdev == cdev->netdev) { | |
151 | cnic_hold(cdev); | |
152 | read_unlock(&cnic_dev_lock); | |
153 | return cdev; | |
154 | } | |
155 | } | |
156 | read_unlock(&cnic_dev_lock); | |
157 | return NULL; | |
158 | } | |
159 | ||
7fc1ece4 MC |
160 | static inline void ulp_get(struct cnic_ulp_ops *ulp_ops) |
161 | { | |
162 | atomic_inc(&ulp_ops->ref_count); | |
163 | } | |
164 | ||
165 | static inline void ulp_put(struct cnic_ulp_ops *ulp_ops) | |
166 | { | |
167 | atomic_dec(&ulp_ops->ref_count); | |
168 | } | |
169 | ||
a4636960 MC |
170 | static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val) |
171 | { | |
172 | struct cnic_local *cp = dev->cnic_priv; | |
173 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
174 | struct drv_ctl_info info; | |
175 | struct drv_ctl_io *io = &info.data.io; | |
176 | ||
177 | info.cmd = DRV_CTL_CTX_WR_CMD; | |
178 | io->cid_addr = cid_addr; | |
179 | io->offset = off; | |
180 | io->data = val; | |
181 | ethdev->drv_ctl(dev->netdev, &info); | |
182 | } | |
183 | ||
71034ba8 MC |
184 | static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr) |
185 | { | |
186 | struct cnic_local *cp = dev->cnic_priv; | |
187 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
188 | struct drv_ctl_info info; | |
189 | struct drv_ctl_io *io = &info.data.io; | |
190 | ||
191 | info.cmd = DRV_CTL_CTXTBL_WR_CMD; | |
192 | io->offset = off; | |
193 | io->dma_addr = addr; | |
194 | ethdev->drv_ctl(dev->netdev, &info); | |
195 | } | |
196 | ||
197 | static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start) | |
198 | { | |
199 | struct cnic_local *cp = dev->cnic_priv; | |
200 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
201 | struct drv_ctl_info info; | |
202 | struct drv_ctl_l2_ring *ring = &info.data.ring; | |
203 | ||
204 | if (start) | |
205 | info.cmd = DRV_CTL_START_L2_CMD; | |
206 | else | |
207 | info.cmd = DRV_CTL_STOP_L2_CMD; | |
208 | ||
209 | ring->cid = cid; | |
210 | ring->client_id = cl_id; | |
211 | ethdev->drv_ctl(dev->netdev, &info); | |
212 | } | |
213 | ||
a4636960 MC |
214 | static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val) |
215 | { | |
216 | struct cnic_local *cp = dev->cnic_priv; | |
217 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
218 | struct drv_ctl_info info; | |
219 | struct drv_ctl_io *io = &info.data.io; | |
220 | ||
221 | info.cmd = DRV_CTL_IO_WR_CMD; | |
222 | io->offset = off; | |
223 | io->data = val; | |
224 | ethdev->drv_ctl(dev->netdev, &info); | |
225 | } | |
226 | ||
227 | static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off) | |
228 | { | |
229 | struct cnic_local *cp = dev->cnic_priv; | |
230 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
231 | struct drv_ctl_info info; | |
232 | struct drv_ctl_io *io = &info.data.io; | |
233 | ||
234 | info.cmd = DRV_CTL_IO_RD_CMD; | |
235 | io->offset = off; | |
236 | ethdev->drv_ctl(dev->netdev, &info); | |
237 | return io->data; | |
238 | } | |
239 | ||
240 | static int cnic_in_use(struct cnic_sock *csk) | |
241 | { | |
242 | return test_bit(SK_F_INUSE, &csk->flags); | |
243 | } | |
244 | ||
245 | static void cnic_kwq_completion(struct cnic_dev *dev, u32 count) | |
246 | { | |
247 | struct cnic_local *cp = dev->cnic_priv; | |
248 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
249 | struct drv_ctl_info info; | |
250 | ||
251 | info.cmd = DRV_CTL_COMPLETION_CMD; | |
252 | info.data.comp.comp_count = count; | |
253 | ethdev->drv_ctl(dev->netdev, &info); | |
254 | } | |
255 | ||
71034ba8 MC |
256 | static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid) |
257 | { | |
258 | u32 i; | |
259 | ||
260 | for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) { | |
261 | if (cp->ctx_tbl[i].cid == cid) { | |
262 | *l5_cid = i; | |
263 | return 0; | |
264 | } | |
265 | } | |
266 | return -EINVAL; | |
267 | } | |
268 | ||
a4636960 MC |
269 | static int cnic_send_nlmsg(struct cnic_local *cp, u32 type, |
270 | struct cnic_sock *csk) | |
271 | { | |
272 | struct iscsi_path path_req; | |
273 | char *buf = NULL; | |
274 | u16 len = 0; | |
275 | u32 msg_type = ISCSI_KEVENT_IF_DOWN; | |
276 | struct cnic_ulp_ops *ulp_ops; | |
277 | ||
278 | if (cp->uio_dev == -1) | |
279 | return -ENODEV; | |
280 | ||
281 | if (csk) { | |
282 | len = sizeof(path_req); | |
283 | buf = (char *) &path_req; | |
284 | memset(&path_req, 0, len); | |
285 | ||
286 | msg_type = ISCSI_KEVENT_PATH_REQ; | |
287 | path_req.handle = (u64) csk->l5_cid; | |
288 | if (test_bit(SK_F_IPV6, &csk->flags)) { | |
289 | memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0], | |
290 | sizeof(struct in6_addr)); | |
291 | path_req.ip_addr_len = 16; | |
292 | } else { | |
293 | memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0], | |
294 | sizeof(struct in_addr)); | |
295 | path_req.ip_addr_len = 4; | |
296 | } | |
297 | path_req.vlan_id = csk->vlan_id; | |
298 | path_req.pmtu = csk->mtu; | |
299 | } | |
300 | ||
301 | rcu_read_lock(); | |
6d7760a8 | 302 | ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]); |
a4636960 MC |
303 | if (ulp_ops) |
304 | ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len); | |
305 | rcu_read_unlock(); | |
306 | return 0; | |
307 | } | |
308 | ||
309 | static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type, | |
310 | char *buf, u16 len) | |
311 | { | |
312 | int rc = -EINVAL; | |
313 | ||
314 | switch (msg_type) { | |
315 | case ISCSI_UEVENT_PATH_UPDATE: { | |
316 | struct cnic_local *cp; | |
317 | u32 l5_cid; | |
318 | struct cnic_sock *csk; | |
319 | struct iscsi_path *path_resp; | |
320 | ||
321 | if (len < sizeof(*path_resp)) | |
322 | break; | |
323 | ||
324 | path_resp = (struct iscsi_path *) buf; | |
325 | cp = dev->cnic_priv; | |
326 | l5_cid = (u32) path_resp->handle; | |
327 | if (l5_cid >= MAX_CM_SK_TBL_SZ) | |
328 | break; | |
329 | ||
330 | csk = &cp->csk_tbl[l5_cid]; | |
331 | csk_hold(csk); | |
332 | if (cnic_in_use(csk)) { | |
333 | memcpy(csk->ha, path_resp->mac_addr, 6); | |
334 | if (test_bit(SK_F_IPV6, &csk->flags)) | |
335 | memcpy(&csk->src_ip[0], &path_resp->src.v6_addr, | |
336 | sizeof(struct in6_addr)); | |
337 | else | |
338 | memcpy(&csk->src_ip[0], &path_resp->src.v4_addr, | |
339 | sizeof(struct in_addr)); | |
340 | if (is_valid_ether_addr(csk->ha)) | |
341 | cnic_cm_set_pg(csk); | |
342 | } | |
343 | csk_put(csk); | |
344 | rc = 0; | |
345 | } | |
346 | } | |
347 | ||
348 | return rc; | |
349 | } | |
350 | ||
351 | static int cnic_offld_prep(struct cnic_sock *csk) | |
352 | { | |
353 | if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags)) | |
354 | return 0; | |
355 | ||
356 | if (!test_bit(SK_F_CONNECT_START, &csk->flags)) { | |
357 | clear_bit(SK_F_OFFLD_SCHED, &csk->flags); | |
358 | return 0; | |
359 | } | |
360 | ||
361 | return 1; | |
362 | } | |
363 | ||
364 | static int cnic_close_prep(struct cnic_sock *csk) | |
365 | { | |
366 | clear_bit(SK_F_CONNECT_START, &csk->flags); | |
367 | smp_mb__after_clear_bit(); | |
368 | ||
369 | if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) { | |
370 | while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags)) | |
371 | msleep(1); | |
372 | ||
373 | return 1; | |
374 | } | |
375 | return 0; | |
376 | } | |
377 | ||
378 | static int cnic_abort_prep(struct cnic_sock *csk) | |
379 | { | |
380 | clear_bit(SK_F_CONNECT_START, &csk->flags); | |
381 | smp_mb__after_clear_bit(); | |
382 | ||
383 | while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags)) | |
384 | msleep(1); | |
385 | ||
386 | if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) { | |
387 | csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP; | |
388 | return 1; | |
389 | } | |
390 | ||
391 | return 0; | |
392 | } | |
393 | ||
6d7760a8 MC |
394 | static void cnic_uio_stop(void) |
395 | { | |
396 | struct cnic_dev *dev; | |
397 | ||
398 | read_lock(&cnic_dev_lock); | |
399 | list_for_each_entry(dev, &cnic_dev_list, list) { | |
400 | struct cnic_local *cp = dev->cnic_priv; | |
401 | ||
402 | if (cp->cnic_uinfo) | |
403 | cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL); | |
404 | } | |
405 | read_unlock(&cnic_dev_lock); | |
406 | } | |
407 | ||
a4636960 MC |
408 | int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops) |
409 | { | |
410 | struct cnic_dev *dev; | |
411 | ||
0d37f36f | 412 | if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) { |
ddf79b20 | 413 | pr_err("%s: Bad type %d\n", __func__, ulp_type); |
a4636960 MC |
414 | return -EINVAL; |
415 | } | |
416 | mutex_lock(&cnic_lock); | |
417 | if (cnic_ulp_tbl[ulp_type]) { | |
ddf79b20 JP |
418 | pr_err("%s: Type %d has already been registered\n", |
419 | __func__, ulp_type); | |
a4636960 MC |
420 | mutex_unlock(&cnic_lock); |
421 | return -EBUSY; | |
422 | } | |
423 | ||
424 | read_lock(&cnic_dev_lock); | |
425 | list_for_each_entry(dev, &cnic_dev_list, list) { | |
426 | struct cnic_local *cp = dev->cnic_priv; | |
427 | ||
428 | clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]); | |
429 | } | |
430 | read_unlock(&cnic_dev_lock); | |
431 | ||
7fc1ece4 | 432 | atomic_set(&ulp_ops->ref_count, 0); |
a4636960 MC |
433 | rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops); |
434 | mutex_unlock(&cnic_lock); | |
435 | ||
436 | /* Prevent race conditions with netdev_event */ | |
437 | rtnl_lock(); | |
438 | read_lock(&cnic_dev_lock); | |
439 | list_for_each_entry(dev, &cnic_dev_list, list) { | |
440 | struct cnic_local *cp = dev->cnic_priv; | |
441 | ||
442 | if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type])) | |
443 | ulp_ops->cnic_init(dev); | |
444 | } | |
445 | read_unlock(&cnic_dev_lock); | |
446 | rtnl_unlock(); | |
447 | ||
448 | return 0; | |
449 | } | |
450 | ||
451 | int cnic_unregister_driver(int ulp_type) | |
452 | { | |
453 | struct cnic_dev *dev; | |
7fc1ece4 MC |
454 | struct cnic_ulp_ops *ulp_ops; |
455 | int i = 0; | |
a4636960 | 456 | |
0d37f36f | 457 | if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) { |
ddf79b20 | 458 | pr_err("%s: Bad type %d\n", __func__, ulp_type); |
a4636960 MC |
459 | return -EINVAL; |
460 | } | |
461 | mutex_lock(&cnic_lock); | |
7fc1ece4 MC |
462 | ulp_ops = cnic_ulp_tbl[ulp_type]; |
463 | if (!ulp_ops) { | |
ddf79b20 JP |
464 | pr_err("%s: Type %d has not been registered\n", |
465 | __func__, ulp_type); | |
a4636960 MC |
466 | goto out_unlock; |
467 | } | |
468 | read_lock(&cnic_dev_lock); | |
469 | list_for_each_entry(dev, &cnic_dev_list, list) { | |
470 | struct cnic_local *cp = dev->cnic_priv; | |
471 | ||
472 | if (rcu_dereference(cp->ulp_ops[ulp_type])) { | |
ddf79b20 JP |
473 | pr_err("%s: Type %d still has devices registered\n", |
474 | __func__, ulp_type); | |
a4636960 MC |
475 | read_unlock(&cnic_dev_lock); |
476 | goto out_unlock; | |
477 | } | |
478 | } | |
479 | read_unlock(&cnic_dev_lock); | |
480 | ||
6d7760a8 MC |
481 | if (ulp_type == CNIC_ULP_ISCSI) |
482 | cnic_uio_stop(); | |
483 | ||
a4636960 MC |
484 | rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL); |
485 | ||
486 | mutex_unlock(&cnic_lock); | |
487 | synchronize_rcu(); | |
7fc1ece4 MC |
488 | while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) { |
489 | msleep(100); | |
490 | i++; | |
491 | } | |
492 | ||
493 | if (atomic_read(&ulp_ops->ref_count) != 0) | |
ddf79b20 | 494 | netdev_warn(dev->netdev, "Failed waiting for ref count to go to zero\n"); |
a4636960 MC |
495 | return 0; |
496 | ||
497 | out_unlock: | |
498 | mutex_unlock(&cnic_lock); | |
499 | return -EINVAL; | |
500 | } | |
501 | ||
502 | static int cnic_start_hw(struct cnic_dev *); | |
503 | static void cnic_stop_hw(struct cnic_dev *); | |
504 | ||
505 | static int cnic_register_device(struct cnic_dev *dev, int ulp_type, | |
506 | void *ulp_ctx) | |
507 | { | |
508 | struct cnic_local *cp = dev->cnic_priv; | |
509 | struct cnic_ulp_ops *ulp_ops; | |
510 | ||
0d37f36f | 511 | if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) { |
ddf79b20 | 512 | pr_err("%s: Bad type %d\n", __func__, ulp_type); |
a4636960 MC |
513 | return -EINVAL; |
514 | } | |
515 | mutex_lock(&cnic_lock); | |
516 | if (cnic_ulp_tbl[ulp_type] == NULL) { | |
ddf79b20 JP |
517 | pr_err("%s: Driver with type %d has not been registered\n", |
518 | __func__, ulp_type); | |
a4636960 MC |
519 | mutex_unlock(&cnic_lock); |
520 | return -EAGAIN; | |
521 | } | |
522 | if (rcu_dereference(cp->ulp_ops[ulp_type])) { | |
ddf79b20 JP |
523 | pr_err("%s: Type %d has already been registered to this device\n", |
524 | __func__, ulp_type); | |
a4636960 MC |
525 | mutex_unlock(&cnic_lock); |
526 | return -EBUSY; | |
527 | } | |
528 | ||
529 | clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]); | |
530 | cp->ulp_handle[ulp_type] = ulp_ctx; | |
531 | ulp_ops = cnic_ulp_tbl[ulp_type]; | |
532 | rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops); | |
533 | cnic_hold(dev); | |
534 | ||
535 | if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) | |
536 | if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type])) | |
537 | ulp_ops->cnic_start(cp->ulp_handle[ulp_type]); | |
538 | ||
539 | mutex_unlock(&cnic_lock); | |
540 | ||
541 | return 0; | |
542 | ||
543 | } | |
544 | EXPORT_SYMBOL(cnic_register_driver); | |
545 | ||
546 | static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type) | |
547 | { | |
548 | struct cnic_local *cp = dev->cnic_priv; | |
681dbd71 | 549 | int i = 0; |
a4636960 | 550 | |
0d37f36f | 551 | if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) { |
ddf79b20 | 552 | pr_err("%s: Bad type %d\n", __func__, ulp_type); |
a4636960 MC |
553 | return -EINVAL; |
554 | } | |
555 | mutex_lock(&cnic_lock); | |
556 | if (rcu_dereference(cp->ulp_ops[ulp_type])) { | |
557 | rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL); | |
558 | cnic_put(dev); | |
559 | } else { | |
ddf79b20 JP |
560 | pr_err("%s: device not registered to this ulp type %d\n", |
561 | __func__, ulp_type); | |
a4636960 MC |
562 | mutex_unlock(&cnic_lock); |
563 | return -EINVAL; | |
564 | } | |
565 | mutex_unlock(&cnic_lock); | |
566 | ||
567 | synchronize_rcu(); | |
568 | ||
681dbd71 MC |
569 | while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) && |
570 | i < 20) { | |
571 | msleep(100); | |
572 | i++; | |
573 | } | |
574 | if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type])) | |
ddf79b20 | 575 | netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n"); |
681dbd71 | 576 | |
a4636960 MC |
577 | return 0; |
578 | } | |
579 | EXPORT_SYMBOL(cnic_unregister_driver); | |
580 | ||
581 | static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id) | |
582 | { | |
583 | id_tbl->start = start_id; | |
584 | id_tbl->max = size; | |
585 | id_tbl->next = 0; | |
586 | spin_lock_init(&id_tbl->lock); | |
587 | id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL); | |
588 | if (!id_tbl->table) | |
589 | return -ENOMEM; | |
590 | ||
591 | return 0; | |
592 | } | |
593 | ||
594 | static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl) | |
595 | { | |
596 | kfree(id_tbl->table); | |
597 | id_tbl->table = NULL; | |
598 | } | |
599 | ||
600 | static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id) | |
601 | { | |
602 | int ret = -1; | |
603 | ||
604 | id -= id_tbl->start; | |
605 | if (id >= id_tbl->max) | |
606 | return ret; | |
607 | ||
608 | spin_lock(&id_tbl->lock); | |
609 | if (!test_bit(id, id_tbl->table)) { | |
610 | set_bit(id, id_tbl->table); | |
611 | ret = 0; | |
612 | } | |
613 | spin_unlock(&id_tbl->lock); | |
614 | return ret; | |
615 | } | |
616 | ||
617 | /* Returns -1 if not successful */ | |
618 | static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl) | |
619 | { | |
620 | u32 id; | |
621 | ||
622 | spin_lock(&id_tbl->lock); | |
623 | id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next); | |
624 | if (id >= id_tbl->max) { | |
625 | id = -1; | |
626 | if (id_tbl->next != 0) { | |
627 | id = find_first_zero_bit(id_tbl->table, id_tbl->next); | |
628 | if (id >= id_tbl->next) | |
629 | id = -1; | |
630 | } | |
631 | } | |
632 | ||
633 | if (id < id_tbl->max) { | |
634 | set_bit(id, id_tbl->table); | |
635 | id_tbl->next = (id + 1) & (id_tbl->max - 1); | |
636 | id += id_tbl->start; | |
637 | } | |
638 | ||
639 | spin_unlock(&id_tbl->lock); | |
640 | ||
641 | return id; | |
642 | } | |
643 | ||
644 | static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id) | |
645 | { | |
646 | if (id == -1) | |
647 | return; | |
648 | ||
649 | id -= id_tbl->start; | |
650 | if (id >= id_tbl->max) | |
651 | return; | |
652 | ||
653 | clear_bit(id, id_tbl->table); | |
654 | } | |
655 | ||
656 | static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma) | |
657 | { | |
658 | int i; | |
659 | ||
660 | if (!dma->pg_arr) | |
661 | return; | |
662 | ||
663 | for (i = 0; i < dma->num_pages; i++) { | |
664 | if (dma->pg_arr[i]) { | |
3248e168 MC |
665 | dma_free_coherent(&dev->pcidev->dev, BCM_PAGE_SIZE, |
666 | dma->pg_arr[i], dma->pg_map_arr[i]); | |
a4636960 MC |
667 | dma->pg_arr[i] = NULL; |
668 | } | |
669 | } | |
670 | if (dma->pgtbl) { | |
3248e168 MC |
671 | dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size, |
672 | dma->pgtbl, dma->pgtbl_map); | |
a4636960 MC |
673 | dma->pgtbl = NULL; |
674 | } | |
675 | kfree(dma->pg_arr); | |
676 | dma->pg_arr = NULL; | |
677 | dma->num_pages = 0; | |
678 | } | |
679 | ||
680 | static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma) | |
681 | { | |
682 | int i; | |
683 | u32 *page_table = dma->pgtbl; | |
684 | ||
685 | for (i = 0; i < dma->num_pages; i++) { | |
686 | /* Each entry needs to be in big endian format. */ | |
687 | *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32); | |
688 | page_table++; | |
689 | *page_table = (u32) dma->pg_map_arr[i]; | |
690 | page_table++; | |
691 | } | |
692 | } | |
693 | ||
71034ba8 MC |
694 | static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma) |
695 | { | |
696 | int i; | |
697 | u32 *page_table = dma->pgtbl; | |
698 | ||
699 | for (i = 0; i < dma->num_pages; i++) { | |
700 | /* Each entry needs to be in little endian format. */ | |
701 | *page_table = dma->pg_map_arr[i] & 0xffffffff; | |
702 | page_table++; | |
703 | *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32); | |
704 | page_table++; | |
705 | } | |
706 | } | |
707 | ||
a4636960 MC |
708 | static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma, |
709 | int pages, int use_pg_tbl) | |
710 | { | |
711 | int i, size; | |
712 | struct cnic_local *cp = dev->cnic_priv; | |
713 | ||
714 | size = pages * (sizeof(void *) + sizeof(dma_addr_t)); | |
715 | dma->pg_arr = kzalloc(size, GFP_ATOMIC); | |
716 | if (dma->pg_arr == NULL) | |
717 | return -ENOMEM; | |
718 | ||
719 | dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages); | |
720 | dma->num_pages = pages; | |
721 | ||
722 | for (i = 0; i < pages; i++) { | |
3248e168 MC |
723 | dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev, |
724 | BCM_PAGE_SIZE, | |
725 | &dma->pg_map_arr[i], | |
726 | GFP_ATOMIC); | |
a4636960 MC |
727 | if (dma->pg_arr[i] == NULL) |
728 | goto error; | |
729 | } | |
730 | if (!use_pg_tbl) | |
731 | return 0; | |
732 | ||
733 | dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) & | |
734 | ~(BCM_PAGE_SIZE - 1); | |
3248e168 MC |
735 | dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size, |
736 | &dma->pgtbl_map, GFP_ATOMIC); | |
a4636960 MC |
737 | if (dma->pgtbl == NULL) |
738 | goto error; | |
739 | ||
740 | cp->setup_pgtbl(dev, dma); | |
741 | ||
742 | return 0; | |
743 | ||
744 | error: | |
745 | cnic_free_dma(dev, dma); | |
746 | return -ENOMEM; | |
747 | } | |
748 | ||
86b53606 MC |
749 | static void cnic_free_context(struct cnic_dev *dev) |
750 | { | |
751 | struct cnic_local *cp = dev->cnic_priv; | |
752 | int i; | |
753 | ||
754 | for (i = 0; i < cp->ctx_blks; i++) { | |
755 | if (cp->ctx_arr[i].ctx) { | |
3248e168 MC |
756 | dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size, |
757 | cp->ctx_arr[i].ctx, | |
758 | cp->ctx_arr[i].mapping); | |
86b53606 MC |
759 | cp->ctx_arr[i].ctx = NULL; |
760 | } | |
761 | } | |
762 | } | |
763 | ||
a4636960 MC |
764 | static void cnic_free_resc(struct cnic_dev *dev) |
765 | { | |
766 | struct cnic_local *cp = dev->cnic_priv; | |
767 | int i = 0; | |
768 | ||
769 | if (cp->cnic_uinfo) { | |
a4636960 MC |
770 | while (cp->uio_dev != -1 && i < 15) { |
771 | msleep(100); | |
772 | i++; | |
773 | } | |
774 | uio_unregister_device(cp->cnic_uinfo); | |
775 | kfree(cp->cnic_uinfo); | |
776 | cp->cnic_uinfo = NULL; | |
777 | } | |
778 | ||
779 | if (cp->l2_buf) { | |
3248e168 MC |
780 | dma_free_coherent(&dev->pcidev->dev, cp->l2_buf_size, |
781 | cp->l2_buf, cp->l2_buf_map); | |
a4636960 MC |
782 | cp->l2_buf = NULL; |
783 | } | |
784 | ||
785 | if (cp->l2_ring) { | |
3248e168 MC |
786 | dma_free_coherent(&dev->pcidev->dev, cp->l2_ring_size, |
787 | cp->l2_ring, cp->l2_ring_map); | |
a4636960 MC |
788 | cp->l2_ring = NULL; |
789 | } | |
790 | ||
86b53606 | 791 | cnic_free_context(dev); |
a4636960 MC |
792 | kfree(cp->ctx_arr); |
793 | cp->ctx_arr = NULL; | |
794 | cp->ctx_blks = 0; | |
795 | ||
796 | cnic_free_dma(dev, &cp->gbl_buf_info); | |
797 | cnic_free_dma(dev, &cp->conn_buf_info); | |
798 | cnic_free_dma(dev, &cp->kwq_info); | |
71034ba8 | 799 | cnic_free_dma(dev, &cp->kwq_16_data_info); |
a4636960 MC |
800 | cnic_free_dma(dev, &cp->kcq_info); |
801 | kfree(cp->iscsi_tbl); | |
802 | cp->iscsi_tbl = NULL; | |
803 | kfree(cp->ctx_tbl); | |
804 | cp->ctx_tbl = NULL; | |
805 | ||
806 | cnic_free_id_tbl(&cp->cid_tbl); | |
807 | } | |
808 | ||
809 | static int cnic_alloc_context(struct cnic_dev *dev) | |
810 | { | |
811 | struct cnic_local *cp = dev->cnic_priv; | |
812 | ||
813 | if (CHIP_NUM(cp) == CHIP_NUM_5709) { | |
814 | int i, k, arr_size; | |
815 | ||
816 | cp->ctx_blk_size = BCM_PAGE_SIZE; | |
817 | cp->cids_per_blk = BCM_PAGE_SIZE / 128; | |
818 | arr_size = BNX2_MAX_CID / cp->cids_per_blk * | |
819 | sizeof(struct cnic_ctx); | |
820 | cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL); | |
821 | if (cp->ctx_arr == NULL) | |
822 | return -ENOMEM; | |
823 | ||
824 | k = 0; | |
825 | for (i = 0; i < 2; i++) { | |
826 | u32 j, reg, off, lo, hi; | |
827 | ||
828 | if (i == 0) | |
829 | off = BNX2_PG_CTX_MAP; | |
830 | else | |
831 | off = BNX2_ISCSI_CTX_MAP; | |
832 | ||
833 | reg = cnic_reg_rd_ind(dev, off); | |
834 | lo = reg >> 16; | |
835 | hi = reg & 0xffff; | |
836 | for (j = lo; j < hi; j += cp->cids_per_blk, k++) | |
837 | cp->ctx_arr[k].cid = j; | |
838 | } | |
839 | ||
840 | cp->ctx_blks = k; | |
841 | if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) { | |
842 | cp->ctx_blks = 0; | |
843 | return -ENOMEM; | |
844 | } | |
845 | ||
846 | for (i = 0; i < cp->ctx_blks; i++) { | |
847 | cp->ctx_arr[i].ctx = | |
3248e168 MC |
848 | dma_alloc_coherent(&dev->pcidev->dev, |
849 | BCM_PAGE_SIZE, | |
850 | &cp->ctx_arr[i].mapping, | |
851 | GFP_KERNEL); | |
a4636960 MC |
852 | if (cp->ctx_arr[i].ctx == NULL) |
853 | return -ENOMEM; | |
854 | } | |
855 | } | |
856 | return 0; | |
857 | } | |
858 | ||
ec0248ea MC |
859 | static int cnic_alloc_l2_rings(struct cnic_dev *dev, int pages) |
860 | { | |
861 | struct cnic_local *cp = dev->cnic_priv; | |
862 | ||
863 | cp->l2_ring_size = pages * BCM_PAGE_SIZE; | |
3248e168 MC |
864 | cp->l2_ring = dma_alloc_coherent(&dev->pcidev->dev, cp->l2_ring_size, |
865 | &cp->l2_ring_map, | |
866 | GFP_KERNEL | __GFP_COMP); | |
ec0248ea MC |
867 | if (!cp->l2_ring) |
868 | return -ENOMEM; | |
869 | ||
870 | cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size; | |
871 | cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size); | |
3248e168 MC |
872 | cp->l2_buf = dma_alloc_coherent(&dev->pcidev->dev, cp->l2_buf_size, |
873 | &cp->l2_buf_map, | |
874 | GFP_KERNEL | __GFP_COMP); | |
ec0248ea MC |
875 | if (!cp->l2_buf) |
876 | return -ENOMEM; | |
877 | ||
878 | return 0; | |
879 | } | |
880 | ||
5e9b2dbf | 881 | static int cnic_alloc_uio(struct cnic_dev *dev) { |
a4636960 MC |
882 | struct cnic_local *cp = dev->cnic_priv; |
883 | struct uio_info *uinfo; | |
884 | int ret; | |
885 | ||
a4636960 MC |
886 | uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC); |
887 | if (!uinfo) | |
5e9b2dbf | 888 | return -ENOMEM; |
a4636960 MC |
889 | |
890 | uinfo->mem[0].addr = dev->netdev->base_addr; | |
891 | uinfo->mem[0].internal_addr = dev->regview; | |
892 | uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start; | |
893 | uinfo->mem[0].memtype = UIO_MEM_PHYS; | |
894 | ||
5e9b2dbf | 895 | if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) { |
86b53606 | 896 | uinfo->mem[1].addr = (unsigned long) cp->status_blk & PAGE_MASK; |
5e9b2dbf MC |
897 | if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) |
898 | uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9; | |
899 | else | |
900 | uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE; | |
901 | ||
902 | uinfo->name = "bnx2_cnic"; | |
71034ba8 MC |
903 | } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) { |
904 | uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk & | |
905 | PAGE_MASK; | |
906 | uinfo->mem[1].size = sizeof(struct host_def_status_block); | |
907 | ||
908 | uinfo->name = "bnx2x_cnic"; | |
5e9b2dbf MC |
909 | } |
910 | ||
a4636960 MC |
911 | uinfo->mem[1].memtype = UIO_MEM_LOGICAL; |
912 | ||
913 | uinfo->mem[2].addr = (unsigned long) cp->l2_ring; | |
914 | uinfo->mem[2].size = cp->l2_ring_size; | |
915 | uinfo->mem[2].memtype = UIO_MEM_LOGICAL; | |
916 | ||
917 | uinfo->mem[3].addr = (unsigned long) cp->l2_buf; | |
918 | uinfo->mem[3].size = cp->l2_buf_size; | |
919 | uinfo->mem[3].memtype = UIO_MEM_LOGICAL; | |
920 | ||
a4636960 MC |
921 | uinfo->version = CNIC_MODULE_VERSION; |
922 | uinfo->irq = UIO_IRQ_CUSTOM; | |
923 | ||
924 | uinfo->open = cnic_uio_open; | |
925 | uinfo->release = cnic_uio_close; | |
926 | ||
927 | uinfo->priv = dev; | |
928 | ||
929 | ret = uio_register_device(&dev->pcidev->dev, uinfo); | |
930 | if (ret) { | |
931 | kfree(uinfo); | |
5e9b2dbf | 932 | return ret; |
a4636960 MC |
933 | } |
934 | ||
935 | cp->cnic_uinfo = uinfo; | |
5e9b2dbf MC |
936 | return 0; |
937 | } | |
938 | ||
939 | static int cnic_alloc_bnx2_resc(struct cnic_dev *dev) | |
940 | { | |
941 | struct cnic_local *cp = dev->cnic_priv; | |
942 | int ret; | |
943 | ||
944 | ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1); | |
945 | if (ret) | |
946 | goto error; | |
947 | cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr; | |
948 | ||
949 | ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1); | |
950 | if (ret) | |
951 | goto error; | |
952 | cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr; | |
953 | ||
954 | ret = cnic_alloc_context(dev); | |
955 | if (ret) | |
956 | goto error; | |
957 | ||
958 | ret = cnic_alloc_l2_rings(dev, 2); | |
959 | if (ret) | |
960 | goto error; | |
961 | ||
962 | ret = cnic_alloc_uio(dev); | |
963 | if (ret) | |
964 | goto error; | |
a4636960 MC |
965 | |
966 | return 0; | |
967 | ||
968 | error: | |
969 | cnic_free_resc(dev); | |
970 | return ret; | |
971 | } | |
972 | ||
71034ba8 MC |
973 | static int cnic_alloc_bnx2x_context(struct cnic_dev *dev) |
974 | { | |
975 | struct cnic_local *cp = dev->cnic_priv; | |
976 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
977 | int ctx_blk_size = cp->ethdev->ctx_blk_size; | |
978 | int total_mem, blks, i, cid_space; | |
979 | ||
980 | if (BNX2X_ISCSI_START_CID < ethdev->starting_cid) | |
981 | return -EINVAL; | |
982 | ||
983 | cid_space = MAX_ISCSI_TBL_SZ + | |
984 | (BNX2X_ISCSI_START_CID - ethdev->starting_cid); | |
985 | ||
986 | total_mem = BNX2X_CONTEXT_MEM_SIZE * cid_space; | |
987 | blks = total_mem / ctx_blk_size; | |
988 | if (total_mem % ctx_blk_size) | |
989 | blks++; | |
990 | ||
991 | if (blks > cp->ethdev->ctx_tbl_len) | |
992 | return -ENOMEM; | |
993 | ||
994 | cp->ctx_arr = kzalloc(blks * sizeof(struct cnic_ctx), GFP_KERNEL); | |
995 | if (cp->ctx_arr == NULL) | |
996 | return -ENOMEM; | |
997 | ||
998 | cp->ctx_blks = blks; | |
999 | cp->ctx_blk_size = ctx_blk_size; | |
1000 | if (BNX2X_CHIP_IS_E1H(cp->chip_id)) | |
1001 | cp->ctx_align = 0; | |
1002 | else | |
1003 | cp->ctx_align = ctx_blk_size; | |
1004 | ||
1005 | cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE; | |
1006 | ||
1007 | for (i = 0; i < blks; i++) { | |
1008 | cp->ctx_arr[i].ctx = | |
3248e168 MC |
1009 | dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size, |
1010 | &cp->ctx_arr[i].mapping, | |
1011 | GFP_KERNEL); | |
71034ba8 MC |
1012 | if (cp->ctx_arr[i].ctx == NULL) |
1013 | return -ENOMEM; | |
1014 | ||
1015 | if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) { | |
1016 | if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) { | |
1017 | cnic_free_context(dev); | |
1018 | cp->ctx_blk_size += cp->ctx_align; | |
1019 | i = -1; | |
1020 | continue; | |
1021 | } | |
1022 | } | |
1023 | } | |
1024 | return 0; | |
1025 | } | |
1026 | ||
1027 | static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev) | |
1028 | { | |
1029 | struct cnic_local *cp = dev->cnic_priv; | |
1030 | int i, j, n, ret, pages; | |
1031 | struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info; | |
1032 | ||
1033 | cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ, | |
1034 | GFP_KERNEL); | |
1035 | if (!cp->iscsi_tbl) | |
1036 | goto error; | |
1037 | ||
1038 | cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) * | |
1039 | MAX_CNIC_L5_CONTEXT, GFP_KERNEL); | |
1040 | if (!cp->ctx_tbl) | |
1041 | goto error; | |
1042 | ||
1043 | for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) { | |
1044 | cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i]; | |
1045 | cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI; | |
1046 | } | |
1047 | ||
1048 | pages = PAGE_ALIGN(MAX_CNIC_L5_CONTEXT * CNIC_KWQ16_DATA_SIZE) / | |
1049 | PAGE_SIZE; | |
1050 | ||
1051 | ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0); | |
1052 | if (ret) | |
1053 | return -ENOMEM; | |
1054 | ||
1055 | n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE; | |
1056 | for (i = 0, j = 0; i < MAX_ISCSI_TBL_SZ; i++) { | |
1057 | long off = CNIC_KWQ16_DATA_SIZE * (i % n); | |
1058 | ||
1059 | cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off; | |
1060 | cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] + | |
1061 | off; | |
1062 | ||
1063 | if ((i % n) == (n - 1)) | |
1064 | j++; | |
1065 | } | |
1066 | ||
1067 | ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 0); | |
1068 | if (ret) | |
1069 | goto error; | |
1070 | cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr; | |
1071 | ||
1072 | for (i = 0; i < KCQ_PAGE_CNT; i++) { | |
1073 | struct bnx2x_bd_chain_next *next = | |
1074 | (struct bnx2x_bd_chain_next *) | |
1075 | &cp->kcq[i][MAX_KCQE_CNT]; | |
1076 | int j = i + 1; | |
1077 | ||
1078 | if (j >= KCQ_PAGE_CNT) | |
1079 | j = 0; | |
1080 | next->addr_hi = (u64) cp->kcq_info.pg_map_arr[j] >> 32; | |
1081 | next->addr_lo = cp->kcq_info.pg_map_arr[j] & 0xffffffff; | |
1082 | } | |
1083 | ||
1084 | pages = PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS * | |
1085 | BNX2X_ISCSI_CONN_BUF_SIZE) / PAGE_SIZE; | |
1086 | ret = cnic_alloc_dma(dev, &cp->conn_buf_info, pages, 1); | |
1087 | if (ret) | |
1088 | goto error; | |
1089 | ||
1090 | pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE; | |
1091 | ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0); | |
1092 | if (ret) | |
1093 | goto error; | |
1094 | ||
1095 | ret = cnic_alloc_bnx2x_context(dev); | |
1096 | if (ret) | |
1097 | goto error; | |
1098 | ||
1099 | cp->bnx2x_status_blk = cp->status_blk; | |
1100 | cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk; | |
1101 | ||
4e9c4fd3 MC |
1102 | memset(cp->bnx2x_status_blk, 0, sizeof(struct host_status_block)); |
1103 | ||
71034ba8 MC |
1104 | cp->l2_rx_ring_size = 15; |
1105 | ||
1106 | ret = cnic_alloc_l2_rings(dev, 4); | |
1107 | if (ret) | |
1108 | goto error; | |
1109 | ||
1110 | ret = cnic_alloc_uio(dev); | |
1111 | if (ret) | |
1112 | goto error; | |
1113 | ||
1114 | return 0; | |
1115 | ||
1116 | error: | |
1117 | cnic_free_resc(dev); | |
1118 | return -ENOMEM; | |
1119 | } | |
1120 | ||
a4636960 MC |
1121 | static inline u32 cnic_kwq_avail(struct cnic_local *cp) |
1122 | { | |
1123 | return cp->max_kwq_idx - | |
1124 | ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx); | |
1125 | } | |
1126 | ||
1127 | static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[], | |
1128 | u32 num_wqes) | |
1129 | { | |
1130 | struct cnic_local *cp = dev->cnic_priv; | |
1131 | struct kwqe *prod_qe; | |
1132 | u16 prod, sw_prod, i; | |
1133 | ||
1134 | if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) | |
1135 | return -EAGAIN; /* bnx2 is down */ | |
1136 | ||
1137 | spin_lock_bh(&cp->cnic_ulp_lock); | |
1138 | if (num_wqes > cnic_kwq_avail(cp) && | |
1139 | !(cp->cnic_local_flags & CNIC_LCL_FL_KWQ_INIT)) { | |
1140 | spin_unlock_bh(&cp->cnic_ulp_lock); | |
1141 | return -EAGAIN; | |
1142 | } | |
1143 | ||
1144 | cp->cnic_local_flags &= ~CNIC_LCL_FL_KWQ_INIT; | |
1145 | ||
1146 | prod = cp->kwq_prod_idx; | |
1147 | sw_prod = prod & MAX_KWQ_IDX; | |
1148 | for (i = 0; i < num_wqes; i++) { | |
1149 | prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)]; | |
1150 | memcpy(prod_qe, wqes[i], sizeof(struct kwqe)); | |
1151 | prod++; | |
1152 | sw_prod = prod & MAX_KWQ_IDX; | |
1153 | } | |
1154 | cp->kwq_prod_idx = prod; | |
1155 | ||
1156 | CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx); | |
1157 | ||
1158 | spin_unlock_bh(&cp->cnic_ulp_lock); | |
1159 | return 0; | |
1160 | } | |
1161 | ||
71034ba8 MC |
1162 | static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid, |
1163 | union l5cm_specific_data *l5_data) | |
1164 | { | |
1165 | struct cnic_context *ctx = &cp->ctx_tbl[l5_cid]; | |
1166 | dma_addr_t map; | |
1167 | ||
1168 | map = ctx->kwqe_data_mapping; | |
1169 | l5_data->phy_address.lo = (u64) map & 0xffffffff; | |
1170 | l5_data->phy_address.hi = (u64) map >> 32; | |
1171 | return ctx->kwqe_data; | |
1172 | } | |
1173 | ||
1174 | static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid, | |
1175 | u32 type, union l5cm_specific_data *l5_data) | |
1176 | { | |
1177 | struct cnic_local *cp = dev->cnic_priv; | |
1178 | struct l5cm_spe kwqe; | |
1179 | struct kwqe_16 *kwq[1]; | |
1180 | int ret; | |
1181 | ||
1182 | kwqe.hdr.conn_and_cmd_data = | |
1183 | cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) | | |
1184 | BNX2X_HW_CID(cid, cp->func))); | |
1185 | kwqe.hdr.type = cpu_to_le16(type); | |
1186 | kwqe.hdr.reserved = 0; | |
1187 | kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo); | |
1188 | kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi); | |
1189 | ||
1190 | kwq[0] = (struct kwqe_16 *) &kwqe; | |
1191 | ||
1192 | spin_lock_bh(&cp->cnic_ulp_lock); | |
1193 | ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1); | |
1194 | spin_unlock_bh(&cp->cnic_ulp_lock); | |
1195 | ||
1196 | if (ret == 1) | |
1197 | return 0; | |
1198 | ||
1199 | return -EBUSY; | |
1200 | } | |
1201 | ||
1202 | static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type, | |
1203 | struct kcqe *cqes[], u32 num_cqes) | |
1204 | { | |
1205 | struct cnic_local *cp = dev->cnic_priv; | |
1206 | struct cnic_ulp_ops *ulp_ops; | |
1207 | ||
1208 | rcu_read_lock(); | |
1209 | ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]); | |
1210 | if (likely(ulp_ops)) { | |
1211 | ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type], | |
1212 | cqes, num_cqes); | |
1213 | } | |
1214 | rcu_read_unlock(); | |
1215 | } | |
1216 | ||
1217 | static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe) | |
1218 | { | |
1219 | struct cnic_local *cp = dev->cnic_priv; | |
1220 | struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe; | |
1221 | int func = cp->func, pages; | |
1222 | int hq_bds; | |
1223 | ||
1224 | cp->num_iscsi_tasks = req1->num_tasks_per_conn; | |
1225 | cp->num_ccells = req1->num_ccells_per_conn; | |
1226 | cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE * | |
1227 | cp->num_iscsi_tasks; | |
1228 | cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS * | |
1229 | BNX2X_ISCSI_R2TQE_SIZE; | |
1230 | cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE; | |
1231 | pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE; | |
1232 | hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE); | |
1233 | cp->num_cqs = req1->num_cqs; | |
1234 | ||
1235 | if (!dev->max_iscsi_conn) | |
1236 | return 0; | |
1237 | ||
1238 | /* init Tstorm RAM */ | |
1239 | CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(func), | |
1240 | req1->rq_num_wqes); | |
1241 | CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(func), | |
1242 | PAGE_SIZE); | |
1243 | CNIC_WR8(dev, BAR_TSTRORM_INTMEM + | |
1244 | TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT); | |
1245 | CNIC_WR16(dev, BAR_TSTRORM_INTMEM + | |
1246 | TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func), | |
1247 | req1->num_tasks_per_conn); | |
1248 | ||
1249 | /* init Ustorm RAM */ | |
1250 | CNIC_WR16(dev, BAR_USTRORM_INTMEM + | |
1251 | USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(func), | |
1252 | req1->rq_buffer_size); | |
1253 | CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(func), | |
1254 | PAGE_SIZE); | |
1255 | CNIC_WR8(dev, BAR_USTRORM_INTMEM + | |
1256 | USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT); | |
1257 | CNIC_WR16(dev, BAR_USTRORM_INTMEM + | |
1258 | USTORM_ISCSI_NUM_OF_TASKS_OFFSET(func), | |
1259 | req1->num_tasks_per_conn); | |
1260 | CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(func), | |
1261 | req1->rq_num_wqes); | |
1262 | CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(func), | |
1263 | req1->cq_num_wqes); | |
1264 | CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(func), | |
1265 | cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS); | |
1266 | ||
1267 | /* init Xstorm RAM */ | |
1268 | CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(func), | |
1269 | PAGE_SIZE); | |
1270 | CNIC_WR8(dev, BAR_XSTRORM_INTMEM + | |
1271 | XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT); | |
1272 | CNIC_WR16(dev, BAR_XSTRORM_INTMEM + | |
1273 | XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func), | |
1274 | req1->num_tasks_per_conn); | |
1275 | CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(func), | |
1276 | hq_bds); | |
1277 | CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(func), | |
1278 | req1->num_tasks_per_conn); | |
1279 | CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(func), | |
1280 | cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS); | |
1281 | ||
1282 | /* init Cstorm RAM */ | |
1283 | CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(func), | |
1284 | PAGE_SIZE); | |
1285 | CNIC_WR8(dev, BAR_CSTRORM_INTMEM + | |
1286 | CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT); | |
1287 | CNIC_WR16(dev, BAR_CSTRORM_INTMEM + | |
1288 | CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func), | |
1289 | req1->num_tasks_per_conn); | |
1290 | CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(func), | |
1291 | req1->cq_num_wqes); | |
1292 | CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(func), | |
1293 | hq_bds); | |
1294 | ||
1295 | return 0; | |
1296 | } | |
1297 | ||
1298 | static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe) | |
1299 | { | |
1300 | struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe; | |
1301 | struct cnic_local *cp = dev->cnic_priv; | |
1302 | int func = cp->func; | |
1303 | struct iscsi_kcqe kcqe; | |
1304 | struct kcqe *cqes[1]; | |
1305 | ||
1306 | memset(&kcqe, 0, sizeof(kcqe)); | |
1307 | if (!dev->max_iscsi_conn) { | |
1308 | kcqe.completion_status = | |
1309 | ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED; | |
1310 | goto done; | |
1311 | } | |
1312 | ||
1313 | CNIC_WR(dev, BAR_TSTRORM_INTMEM + | |
1314 | TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]); | |
1315 | CNIC_WR(dev, BAR_TSTRORM_INTMEM + | |
1316 | TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4, | |
1317 | req2->error_bit_map[1]); | |
1318 | ||
1319 | CNIC_WR16(dev, BAR_USTRORM_INTMEM + | |
1320 | USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn); | |
1321 | CNIC_WR(dev, BAR_USTRORM_INTMEM + | |
1322 | USTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]); | |
1323 | CNIC_WR(dev, BAR_USTRORM_INTMEM + | |
1324 | USTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4, | |
1325 | req2->error_bit_map[1]); | |
1326 | ||
1327 | CNIC_WR16(dev, BAR_CSTRORM_INTMEM + | |
1328 | CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn); | |
1329 | ||
1330 | kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS; | |
1331 | ||
1332 | done: | |
1333 | kcqe.op_code = ISCSI_KCQE_OPCODE_INIT; | |
1334 | cqes[0] = (struct kcqe *) &kcqe; | |
1335 | cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1); | |
1336 | ||
1337 | return 0; | |
1338 | } | |
1339 | ||
1340 | static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid) | |
1341 | { | |
1342 | struct cnic_local *cp = dev->cnic_priv; | |
1343 | struct cnic_context *ctx = &cp->ctx_tbl[l5_cid]; | |
1344 | ||
1345 | if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) { | |
1346 | struct cnic_iscsi *iscsi = ctx->proto.iscsi; | |
1347 | ||
1348 | cnic_free_dma(dev, &iscsi->hq_info); | |
1349 | cnic_free_dma(dev, &iscsi->r2tq_info); | |
1350 | cnic_free_dma(dev, &iscsi->task_array_info); | |
1351 | } | |
1352 | cnic_free_id(&cp->cid_tbl, ctx->cid); | |
1353 | ctx->cid = 0; | |
1354 | } | |
1355 | ||
1356 | static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid) | |
1357 | { | |
1358 | u32 cid; | |
1359 | int ret, pages; | |
1360 | struct cnic_local *cp = dev->cnic_priv; | |
1361 | struct cnic_context *ctx = &cp->ctx_tbl[l5_cid]; | |
1362 | struct cnic_iscsi *iscsi = ctx->proto.iscsi; | |
1363 | ||
1364 | cid = cnic_alloc_new_id(&cp->cid_tbl); | |
1365 | if (cid == -1) { | |
1366 | ret = -ENOMEM; | |
1367 | goto error; | |
1368 | } | |
1369 | ||
1370 | ctx->cid = cid; | |
1371 | pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE; | |
1372 | ||
1373 | ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1); | |
1374 | if (ret) | |
1375 | goto error; | |
1376 | ||
1377 | pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE; | |
1378 | ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1); | |
1379 | if (ret) | |
1380 | goto error; | |
1381 | ||
1382 | pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE; | |
1383 | ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1); | |
1384 | if (ret) | |
1385 | goto error; | |
1386 | ||
1387 | return 0; | |
1388 | ||
1389 | error: | |
1390 | cnic_free_bnx2x_conn_resc(dev, l5_cid); | |
1391 | return ret; | |
1392 | } | |
1393 | ||
1394 | static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init, | |
1395 | struct regpair *ctx_addr) | |
1396 | { | |
1397 | struct cnic_local *cp = dev->cnic_priv; | |
1398 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
1399 | int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk; | |
1400 | int off = (cid - ethdev->starting_cid) % cp->cids_per_blk; | |
1401 | unsigned long align_off = 0; | |
1402 | dma_addr_t ctx_map; | |
1403 | void *ctx; | |
1404 | ||
1405 | if (cp->ctx_align) { | |
1406 | unsigned long mask = cp->ctx_align - 1; | |
1407 | ||
1408 | if (cp->ctx_arr[blk].mapping & mask) | |
1409 | align_off = cp->ctx_align - | |
1410 | (cp->ctx_arr[blk].mapping & mask); | |
1411 | } | |
1412 | ctx_map = cp->ctx_arr[blk].mapping + align_off + | |
1413 | (off * BNX2X_CONTEXT_MEM_SIZE); | |
1414 | ctx = cp->ctx_arr[blk].ctx + align_off + | |
1415 | (off * BNX2X_CONTEXT_MEM_SIZE); | |
1416 | if (init) | |
1417 | memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE); | |
1418 | ||
1419 | ctx_addr->lo = ctx_map & 0xffffffff; | |
1420 | ctx_addr->hi = (u64) ctx_map >> 32; | |
1421 | return ctx; | |
1422 | } | |
1423 | ||
1424 | static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[], | |
1425 | u32 num) | |
1426 | { | |
1427 | struct cnic_local *cp = dev->cnic_priv; | |
1428 | struct iscsi_kwqe_conn_offload1 *req1 = | |
1429 | (struct iscsi_kwqe_conn_offload1 *) wqes[0]; | |
1430 | struct iscsi_kwqe_conn_offload2 *req2 = | |
1431 | (struct iscsi_kwqe_conn_offload2 *) wqes[1]; | |
1432 | struct iscsi_kwqe_conn_offload3 *req3; | |
1433 | struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id]; | |
1434 | struct cnic_iscsi *iscsi = ctx->proto.iscsi; | |
1435 | u32 cid = ctx->cid; | |
1436 | u32 hw_cid = BNX2X_HW_CID(cid, cp->func); | |
1437 | struct iscsi_context *ictx; | |
1438 | struct regpair context_addr; | |
1439 | int i, j, n = 2, n_max; | |
1440 | ||
1441 | ctx->ctx_flags = 0; | |
1442 | if (!req2->num_additional_wqes) | |
1443 | return -EINVAL; | |
1444 | ||
1445 | n_max = req2->num_additional_wqes + 2; | |
1446 | ||
1447 | ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr); | |
1448 | if (ictx == NULL) | |
1449 | return -ENOMEM; | |
1450 | ||
1451 | req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++]; | |
1452 | ||
1453 | ictx->xstorm_ag_context.hq_prod = 1; | |
1454 | ||
1455 | ictx->xstorm_st_context.iscsi.first_burst_length = | |
1456 | ISCSI_DEF_FIRST_BURST_LEN; | |
1457 | ictx->xstorm_st_context.iscsi.max_send_pdu_length = | |
1458 | ISCSI_DEF_MAX_RECV_SEG_LEN; | |
1459 | ictx->xstorm_st_context.iscsi.sq_pbl_base.lo = | |
1460 | req1->sq_page_table_addr_lo; | |
1461 | ictx->xstorm_st_context.iscsi.sq_pbl_base.hi = | |
1462 | req1->sq_page_table_addr_hi; | |
1463 | ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi; | |
1464 | ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo; | |
1465 | ictx->xstorm_st_context.iscsi.hq_pbl_base.lo = | |
1466 | iscsi->hq_info.pgtbl_map & 0xffffffff; | |
1467 | ictx->xstorm_st_context.iscsi.hq_pbl_base.hi = | |
1468 | (u64) iscsi->hq_info.pgtbl_map >> 32; | |
1469 | ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo = | |
1470 | iscsi->hq_info.pgtbl[0]; | |
1471 | ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi = | |
1472 | iscsi->hq_info.pgtbl[1]; | |
1473 | ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo = | |
1474 | iscsi->r2tq_info.pgtbl_map & 0xffffffff; | |
1475 | ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi = | |
1476 | (u64) iscsi->r2tq_info.pgtbl_map >> 32; | |
1477 | ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo = | |
1478 | iscsi->r2tq_info.pgtbl[0]; | |
1479 | ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi = | |
1480 | iscsi->r2tq_info.pgtbl[1]; | |
1481 | ictx->xstorm_st_context.iscsi.task_pbl_base.lo = | |
1482 | iscsi->task_array_info.pgtbl_map & 0xffffffff; | |
1483 | ictx->xstorm_st_context.iscsi.task_pbl_base.hi = | |
1484 | (u64) iscsi->task_array_info.pgtbl_map >> 32; | |
1485 | ictx->xstorm_st_context.iscsi.task_pbl_cache_idx = | |
1486 | BNX2X_ISCSI_PBL_NOT_CACHED; | |
1487 | ictx->xstorm_st_context.iscsi.flags.flags |= | |
1488 | XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA; | |
1489 | ictx->xstorm_st_context.iscsi.flags.flags |= | |
1490 | XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T; | |
1491 | ||
1492 | ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE; | |
1493 | /* TSTORM requires the base address of RQ DB & not PTE */ | |
1494 | ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo = | |
1495 | req2->rq_page_table_addr_lo & PAGE_MASK; | |
1496 | ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi = | |
1497 | req2->rq_page_table_addr_hi; | |
1498 | ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id; | |
1499 | ictx->tstorm_st_context.tcp.cwnd = 0x5A8; | |
1500 | ictx->tstorm_st_context.tcp.flags2 |= | |
1501 | TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN; | |
1502 | ||
1503 | ictx->timers_context.flags |= ISCSI_TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG; | |
1504 | ||
1505 | ictx->ustorm_st_context.ring.rq.pbl_base.lo = | |
15971c3c | 1506 | req2->rq_page_table_addr_lo; |
71034ba8 | 1507 | ictx->ustorm_st_context.ring.rq.pbl_base.hi = |
15971c3c | 1508 | req2->rq_page_table_addr_hi; |
71034ba8 MC |
1509 | ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi; |
1510 | ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo; | |
1511 | ictx->ustorm_st_context.ring.r2tq.pbl_base.lo = | |
1512 | iscsi->r2tq_info.pgtbl_map & 0xffffffff; | |
1513 | ictx->ustorm_st_context.ring.r2tq.pbl_base.hi = | |
1514 | (u64) iscsi->r2tq_info.pgtbl_map >> 32; | |
1515 | ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo = | |
1516 | iscsi->r2tq_info.pgtbl[0]; | |
1517 | ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi = | |
1518 | iscsi->r2tq_info.pgtbl[1]; | |
1519 | ictx->ustorm_st_context.ring.cq_pbl_base.lo = | |
1520 | req1->cq_page_table_addr_lo; | |
1521 | ictx->ustorm_st_context.ring.cq_pbl_base.hi = | |
1522 | req1->cq_page_table_addr_hi; | |
1523 | ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN; | |
1524 | ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi; | |
1525 | ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo; | |
1526 | ictx->ustorm_st_context.task_pbe_cache_index = | |
1527 | BNX2X_ISCSI_PBL_NOT_CACHED; | |
1528 | ictx->ustorm_st_context.task_pdu_cache_index = | |
1529 | BNX2X_ISCSI_PDU_HEADER_NOT_CACHED; | |
1530 | ||
1531 | for (i = 1, j = 1; i < cp->num_cqs; i++, j++) { | |
1532 | if (j == 3) { | |
1533 | if (n >= n_max) | |
1534 | break; | |
1535 | req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++]; | |
1536 | j = 0; | |
1537 | } | |
1538 | ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN; | |
1539 | ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo = | |
1540 | req3->qp_first_pte[j].hi; | |
1541 | ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi = | |
1542 | req3->qp_first_pte[j].lo; | |
1543 | } | |
1544 | ||
1545 | ictx->ustorm_st_context.task_pbl_base.lo = | |
1546 | iscsi->task_array_info.pgtbl_map & 0xffffffff; | |
1547 | ictx->ustorm_st_context.task_pbl_base.hi = | |
1548 | (u64) iscsi->task_array_info.pgtbl_map >> 32; | |
1549 | ictx->ustorm_st_context.tce_phy_addr.lo = | |
1550 | iscsi->task_array_info.pgtbl[0]; | |
1551 | ictx->ustorm_st_context.tce_phy_addr.hi = | |
1552 | iscsi->task_array_info.pgtbl[1]; | |
1553 | ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id; | |
1554 | ictx->ustorm_st_context.num_cqs = cp->num_cqs; | |
1555 | ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN; | |
1556 | ictx->ustorm_st_context.negotiated_rx_and_flags |= | |
1557 | ISCSI_DEF_MAX_BURST_LEN; | |
1558 | ictx->ustorm_st_context.negotiated_rx |= | |
1559 | ISCSI_DEFAULT_MAX_OUTSTANDING_R2T << | |
1560 | USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT; | |
1561 | ||
1562 | ictx->cstorm_st_context.hq_pbl_base.lo = | |
1563 | iscsi->hq_info.pgtbl_map & 0xffffffff; | |
1564 | ictx->cstorm_st_context.hq_pbl_base.hi = | |
1565 | (u64) iscsi->hq_info.pgtbl_map >> 32; | |
1566 | ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0]; | |
1567 | ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1]; | |
1568 | ictx->cstorm_st_context.task_pbl_base.lo = | |
1569 | iscsi->task_array_info.pgtbl_map & 0xffffffff; | |
1570 | ictx->cstorm_st_context.task_pbl_base.hi = | |
1571 | (u64) iscsi->task_array_info.pgtbl_map >> 32; | |
1572 | /* CSTORM and USTORM initialization is different, CSTORM requires | |
1573 | * CQ DB base & not PTE addr */ | |
1574 | ictx->cstorm_st_context.cq_db_base.lo = | |
1575 | req1->cq_page_table_addr_lo & PAGE_MASK; | |
1576 | ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi; | |
1577 | ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id; | |
1578 | ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1; | |
1579 | for (i = 0; i < cp->num_cqs; i++) { | |
1580 | ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] = | |
1581 | ISCSI_INITIAL_SN; | |
1582 | ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] = | |
1583 | ISCSI_INITIAL_SN; | |
1584 | } | |
1585 | ||
1586 | ictx->xstorm_ag_context.cdu_reserved = | |
1587 | CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG, | |
1588 | ISCSI_CONNECTION_TYPE); | |
1589 | ictx->ustorm_ag_context.cdu_usage = | |
1590 | CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG, | |
1591 | ISCSI_CONNECTION_TYPE); | |
1592 | return 0; | |
1593 | ||
1594 | } | |
1595 | ||
1596 | static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[], | |
1597 | u32 num, int *work) | |
1598 | { | |
1599 | struct iscsi_kwqe_conn_offload1 *req1; | |
1600 | struct iscsi_kwqe_conn_offload2 *req2; | |
1601 | struct cnic_local *cp = dev->cnic_priv; | |
1602 | struct iscsi_kcqe kcqe; | |
1603 | struct kcqe *cqes[1]; | |
1604 | u32 l5_cid; | |
1605 | int ret; | |
1606 | ||
1607 | if (num < 2) { | |
1608 | *work = num; | |
1609 | return -EINVAL; | |
1610 | } | |
1611 | ||
1612 | req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0]; | |
1613 | req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1]; | |
1614 | if ((num - 2) < req2->num_additional_wqes) { | |
1615 | *work = num; | |
1616 | return -EINVAL; | |
1617 | } | |
1618 | *work = 2 + req2->num_additional_wqes;; | |
1619 | ||
1620 | l5_cid = req1->iscsi_conn_id; | |
1621 | if (l5_cid >= MAX_ISCSI_TBL_SZ) | |
1622 | return -EINVAL; | |
1623 | ||
1624 | memset(&kcqe, 0, sizeof(kcqe)); | |
1625 | kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN; | |
1626 | kcqe.iscsi_conn_id = l5_cid; | |
1627 | kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE; | |
1628 | ||
1629 | if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) { | |
1630 | atomic_dec(&cp->iscsi_conn); | |
1631 | ret = 0; | |
1632 | goto done; | |
1633 | } | |
1634 | ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid); | |
1635 | if (ret) { | |
1636 | atomic_dec(&cp->iscsi_conn); | |
1637 | ret = 0; | |
1638 | goto done; | |
1639 | } | |
1640 | ret = cnic_setup_bnx2x_ctx(dev, wqes, num); | |
1641 | if (ret < 0) { | |
1642 | cnic_free_bnx2x_conn_resc(dev, l5_cid); | |
1643 | atomic_dec(&cp->iscsi_conn); | |
1644 | goto done; | |
1645 | } | |
1646 | ||
1647 | kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS; | |
1648 | kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp->ctx_tbl[l5_cid].cid, | |
1649 | cp->func); | |
1650 | ||
1651 | done: | |
1652 | cqes[0] = (struct kcqe *) &kcqe; | |
1653 | cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1); | |
1654 | return ret; | |
1655 | } | |
1656 | ||
1657 | ||
1658 | static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe) | |
1659 | { | |
1660 | struct cnic_local *cp = dev->cnic_priv; | |
1661 | struct iscsi_kwqe_conn_update *req = | |
1662 | (struct iscsi_kwqe_conn_update *) kwqe; | |
1663 | void *data; | |
1664 | union l5cm_specific_data l5_data; | |
1665 | u32 l5_cid, cid = BNX2X_SW_CID(req->context_id); | |
1666 | int ret; | |
1667 | ||
1668 | if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0) | |
1669 | return -EINVAL; | |
1670 | ||
1671 | data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data); | |
1672 | if (!data) | |
1673 | return -ENOMEM; | |
1674 | ||
1675 | memcpy(data, kwqe, sizeof(struct kwqe)); | |
1676 | ||
1677 | ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN, | |
1678 | req->context_id, ISCSI_CONNECTION_TYPE, &l5_data); | |
1679 | return ret; | |
1680 | } | |
1681 | ||
1682 | static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe) | |
1683 | { | |
1684 | struct cnic_local *cp = dev->cnic_priv; | |
1685 | struct iscsi_kwqe_conn_destroy *req = | |
1686 | (struct iscsi_kwqe_conn_destroy *) kwqe; | |
1687 | union l5cm_specific_data l5_data; | |
1688 | u32 l5_cid = req->reserved0; | |
1689 | struct cnic_context *ctx = &cp->ctx_tbl[l5_cid]; | |
1690 | int ret = 0; | |
1691 | struct iscsi_kcqe kcqe; | |
1692 | struct kcqe *cqes[1]; | |
1693 | ||
1694 | if (!(ctx->ctx_flags & CTX_FL_OFFLD_START)) | |
1695 | goto skip_cfc_delete; | |
1696 | ||
1697 | while (!time_after(jiffies, ctx->timestamp + (2 * HZ))) | |
1698 | msleep(250); | |
1699 | ||
1700 | init_waitqueue_head(&ctx->waitq); | |
1701 | ctx->wait_cond = 0; | |
1702 | memset(&l5_data, 0, sizeof(l5_data)); | |
1703 | ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL, | |
1704 | req->context_id, | |
1705 | ETH_CONNECTION_TYPE | | |
1706 | (1 << SPE_HDR_COMMON_RAMROD_SHIFT), | |
1707 | &l5_data); | |
1708 | if (ret == 0) | |
1709 | wait_event(ctx->waitq, ctx->wait_cond); | |
1710 | ||
1711 | skip_cfc_delete: | |
1712 | cnic_free_bnx2x_conn_resc(dev, l5_cid); | |
1713 | ||
1714 | atomic_dec(&cp->iscsi_conn); | |
1715 | ||
1716 | memset(&kcqe, 0, sizeof(kcqe)); | |
1717 | kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN; | |
1718 | kcqe.iscsi_conn_id = l5_cid; | |
1719 | kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS; | |
1720 | kcqe.iscsi_conn_context_id = req->context_id; | |
1721 | ||
1722 | cqes[0] = (struct kcqe *) &kcqe; | |
1723 | cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1); | |
1724 | ||
1725 | return ret; | |
1726 | } | |
1727 | ||
1728 | static void cnic_init_storm_conn_bufs(struct cnic_dev *dev, | |
1729 | struct l4_kwq_connect_req1 *kwqe1, | |
1730 | struct l4_kwq_connect_req3 *kwqe3, | |
1731 | struct l5cm_active_conn_buffer *conn_buf) | |
1732 | { | |
1733 | struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf; | |
1734 | struct l5cm_xstorm_conn_buffer *xstorm_buf = | |
1735 | &conn_buf->xstorm_conn_buffer; | |
1736 | struct l5cm_tstorm_conn_buffer *tstorm_buf = | |
1737 | &conn_buf->tstorm_conn_buffer; | |
1738 | struct regpair context_addr; | |
1739 | u32 cid = BNX2X_SW_CID(kwqe1->cid); | |
1740 | struct in6_addr src_ip, dst_ip; | |
1741 | int i; | |
1742 | u32 *addrp; | |
1743 | ||
1744 | addrp = (u32 *) &conn_addr->local_ip_addr; | |
1745 | for (i = 0; i < 4; i++, addrp++) | |
1746 | src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp); | |
1747 | ||
1748 | addrp = (u32 *) &conn_addr->remote_ip_addr; | |
1749 | for (i = 0; i < 4; i++, addrp++) | |
1750 | dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp); | |
1751 | ||
1752 | cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr); | |
1753 | ||
1754 | xstorm_buf->context_addr.hi = context_addr.hi; | |
1755 | xstorm_buf->context_addr.lo = context_addr.lo; | |
1756 | xstorm_buf->mss = 0xffff; | |
1757 | xstorm_buf->rcv_buf = kwqe3->rcv_buf; | |
1758 | if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE) | |
1759 | xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE; | |
1760 | xstorm_buf->pseudo_header_checksum = | |
1761 | swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0)); | |
1762 | ||
1763 | if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK)) | |
1764 | tstorm_buf->params |= | |
1765 | L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE; | |
1766 | if (kwqe3->ka_timeout) { | |
1767 | tstorm_buf->ka_enable = 1; | |
1768 | tstorm_buf->ka_timeout = kwqe3->ka_timeout; | |
1769 | tstorm_buf->ka_interval = kwqe3->ka_interval; | |
1770 | tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count; | |
1771 | } | |
1772 | tstorm_buf->rcv_buf = kwqe3->rcv_buf; | |
1773 | tstorm_buf->snd_buf = kwqe3->snd_buf; | |
1774 | tstorm_buf->max_rt_time = 0xffffffff; | |
1775 | } | |
1776 | ||
1777 | static void cnic_init_bnx2x_mac(struct cnic_dev *dev) | |
1778 | { | |
1779 | struct cnic_local *cp = dev->cnic_priv; | |
1780 | int func = CNIC_FUNC(cp); | |
1781 | u8 *mac = dev->mac_addr; | |
1782 | ||
1783 | CNIC_WR8(dev, BAR_XSTRORM_INTMEM + | |
1784 | XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(func), mac[0]); | |
1785 | CNIC_WR8(dev, BAR_XSTRORM_INTMEM + | |
1786 | XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(func), mac[1]); | |
1787 | CNIC_WR8(dev, BAR_XSTRORM_INTMEM + | |
1788 | XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(func), mac[2]); | |
1789 | CNIC_WR8(dev, BAR_XSTRORM_INTMEM + | |
1790 | XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(func), mac[3]); | |
1791 | CNIC_WR8(dev, BAR_XSTRORM_INTMEM + | |
1792 | XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(func), mac[4]); | |
1793 | CNIC_WR8(dev, BAR_XSTRORM_INTMEM + | |
1794 | XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(func), mac[5]); | |
1795 | ||
1796 | CNIC_WR8(dev, BAR_TSTRORM_INTMEM + | |
1797 | TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func), mac[5]); | |
1798 | CNIC_WR8(dev, BAR_TSTRORM_INTMEM + | |
1799 | TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func) + 1, | |
1800 | mac[4]); | |
1801 | CNIC_WR8(dev, BAR_TSTRORM_INTMEM + | |
1802 | TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func), mac[3]); | |
1803 | CNIC_WR8(dev, BAR_TSTRORM_INTMEM + | |
1804 | TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 1, | |
1805 | mac[2]); | |
1806 | CNIC_WR8(dev, BAR_TSTRORM_INTMEM + | |
1807 | TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 2, | |
1808 | mac[1]); | |
1809 | CNIC_WR8(dev, BAR_TSTRORM_INTMEM + | |
1810 | TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 3, | |
1811 | mac[0]); | |
1812 | } | |
1813 | ||
1814 | static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts) | |
1815 | { | |
1816 | struct cnic_local *cp = dev->cnic_priv; | |
1817 | u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN; | |
1818 | u16 tstorm_flags = 0; | |
1819 | ||
1820 | if (tcp_ts) { | |
1821 | xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED; | |
1822 | tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED; | |
1823 | } | |
1824 | ||
1825 | CNIC_WR8(dev, BAR_XSTRORM_INTMEM + | |
1826 | XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), xstorm_flags); | |
1827 | ||
1828 | CNIC_WR16(dev, BAR_TSTRORM_INTMEM + | |
1829 | TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), tstorm_flags); | |
1830 | } | |
1831 | ||
1832 | static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[], | |
1833 | u32 num, int *work) | |
1834 | { | |
1835 | struct cnic_local *cp = dev->cnic_priv; | |
1836 | struct l4_kwq_connect_req1 *kwqe1 = | |
1837 | (struct l4_kwq_connect_req1 *) wqes[0]; | |
1838 | struct l4_kwq_connect_req3 *kwqe3; | |
1839 | struct l5cm_active_conn_buffer *conn_buf; | |
1840 | struct l5cm_conn_addr_params *conn_addr; | |
1841 | union l5cm_specific_data l5_data; | |
1842 | u32 l5_cid = kwqe1->pg_cid; | |
1843 | struct cnic_sock *csk = &cp->csk_tbl[l5_cid]; | |
1844 | struct cnic_context *ctx = &cp->ctx_tbl[l5_cid]; | |
1845 | int ret; | |
1846 | ||
1847 | if (num < 2) { | |
1848 | *work = num; | |
1849 | return -EINVAL; | |
1850 | } | |
1851 | ||
1852 | if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) | |
1853 | *work = 3; | |
1854 | else | |
1855 | *work = 2; | |
1856 | ||
1857 | if (num < *work) { | |
1858 | *work = num; | |
1859 | return -EINVAL; | |
1860 | } | |
1861 | ||
1862 | if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) { | |
ddf79b20 | 1863 | netdev_err(dev->netdev, "conn_buf size too big\n"); |
71034ba8 MC |
1864 | return -ENOMEM; |
1865 | } | |
1866 | conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data); | |
1867 | if (!conn_buf) | |
1868 | return -ENOMEM; | |
1869 | ||
1870 | memset(conn_buf, 0, sizeof(*conn_buf)); | |
1871 | ||
1872 | conn_addr = &conn_buf->conn_addr_buf; | |
1873 | conn_addr->remote_addr_0 = csk->ha[0]; | |
1874 | conn_addr->remote_addr_1 = csk->ha[1]; | |
1875 | conn_addr->remote_addr_2 = csk->ha[2]; | |
1876 | conn_addr->remote_addr_3 = csk->ha[3]; | |
1877 | conn_addr->remote_addr_4 = csk->ha[4]; | |
1878 | conn_addr->remote_addr_5 = csk->ha[5]; | |
1879 | ||
1880 | if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) { | |
1881 | struct l4_kwq_connect_req2 *kwqe2 = | |
1882 | (struct l4_kwq_connect_req2 *) wqes[1]; | |
1883 | ||
1884 | conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4; | |
1885 | conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3; | |
1886 | conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2; | |
1887 | ||
1888 | conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4; | |
1889 | conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3; | |
1890 | conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2; | |
1891 | conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION; | |
1892 | } | |
1893 | kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1]; | |
1894 | ||
1895 | conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip; | |
1896 | conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip; | |
1897 | conn_addr->local_tcp_port = kwqe1->src_port; | |
1898 | conn_addr->remote_tcp_port = kwqe1->dst_port; | |
1899 | ||
1900 | conn_addr->pmtu = kwqe3->pmtu; | |
1901 | cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf); | |
1902 | ||
1903 | CNIC_WR16(dev, BAR_XSTRORM_INTMEM + | |
1904 | XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->func), csk->vlan_id); | |
1905 | ||
1906 | cnic_bnx2x_set_tcp_timestamp(dev, | |
1907 | kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP); | |
1908 | ||
1909 | ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT, | |
1910 | kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data); | |
1911 | if (!ret) | |
1912 | ctx->ctx_flags |= CTX_FL_OFFLD_START; | |
1913 | ||
1914 | return ret; | |
1915 | } | |
1916 | ||
1917 | static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe) | |
1918 | { | |
1919 | struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe; | |
1920 | union l5cm_specific_data l5_data; | |
1921 | int ret; | |
1922 | ||
1923 | memset(&l5_data, 0, sizeof(l5_data)); | |
1924 | ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE, | |
1925 | req->cid, ISCSI_CONNECTION_TYPE, &l5_data); | |
1926 | return ret; | |
1927 | } | |
1928 | ||
1929 | static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe) | |
1930 | { | |
1931 | struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe; | |
1932 | union l5cm_specific_data l5_data; | |
1933 | int ret; | |
1934 | ||
1935 | memset(&l5_data, 0, sizeof(l5_data)); | |
1936 | ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT, | |
1937 | req->cid, ISCSI_CONNECTION_TYPE, &l5_data); | |
1938 | return ret; | |
1939 | } | |
1940 | static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe) | |
1941 | { | |
1942 | struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe; | |
1943 | struct l4_kcq kcqe; | |
1944 | struct kcqe *cqes[1]; | |
1945 | ||
1946 | memset(&kcqe, 0, sizeof(kcqe)); | |
1947 | kcqe.pg_host_opaque = req->host_opaque; | |
1948 | kcqe.pg_cid = req->host_opaque; | |
1949 | kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG; | |
1950 | cqes[0] = (struct kcqe *) &kcqe; | |
1951 | cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1); | |
1952 | return 0; | |
1953 | } | |
1954 | ||
1955 | static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe) | |
1956 | { | |
1957 | struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe; | |
1958 | struct l4_kcq kcqe; | |
1959 | struct kcqe *cqes[1]; | |
1960 | ||
1961 | memset(&kcqe, 0, sizeof(kcqe)); | |
1962 | kcqe.pg_host_opaque = req->pg_host_opaque; | |
1963 | kcqe.pg_cid = req->pg_cid; | |
1964 | kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG; | |
1965 | cqes[0] = (struct kcqe *) &kcqe; | |
1966 | cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1); | |
1967 | return 0; | |
1968 | } | |
1969 | ||
1970 | static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[], | |
1971 | u32 num_wqes) | |
1972 | { | |
1973 | int i, work, ret; | |
1974 | u32 opcode; | |
1975 | struct kwqe *kwqe; | |
1976 | ||
1977 | if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) | |
1978 | return -EAGAIN; /* bnx2 is down */ | |
1979 | ||
1980 | for (i = 0; i < num_wqes; ) { | |
1981 | kwqe = wqes[i]; | |
1982 | opcode = KWQE_OPCODE(kwqe->kwqe_op_flag); | |
1983 | work = 1; | |
1984 | ||
1985 | switch (opcode) { | |
1986 | case ISCSI_KWQE_OPCODE_INIT1: | |
1987 | ret = cnic_bnx2x_iscsi_init1(dev, kwqe); | |
1988 | break; | |
1989 | case ISCSI_KWQE_OPCODE_INIT2: | |
1990 | ret = cnic_bnx2x_iscsi_init2(dev, kwqe); | |
1991 | break; | |
1992 | case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1: | |
1993 | ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i], | |
1994 | num_wqes - i, &work); | |
1995 | break; | |
1996 | case ISCSI_KWQE_OPCODE_UPDATE_CONN: | |
1997 | ret = cnic_bnx2x_iscsi_update(dev, kwqe); | |
1998 | break; | |
1999 | case ISCSI_KWQE_OPCODE_DESTROY_CONN: | |
2000 | ret = cnic_bnx2x_iscsi_destroy(dev, kwqe); | |
2001 | break; | |
2002 | case L4_KWQE_OPCODE_VALUE_CONNECT1: | |
2003 | ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i, | |
2004 | &work); | |
2005 | break; | |
2006 | case L4_KWQE_OPCODE_VALUE_CLOSE: | |
2007 | ret = cnic_bnx2x_close(dev, kwqe); | |
2008 | break; | |
2009 | case L4_KWQE_OPCODE_VALUE_RESET: | |
2010 | ret = cnic_bnx2x_reset(dev, kwqe); | |
2011 | break; | |
2012 | case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG: | |
2013 | ret = cnic_bnx2x_offload_pg(dev, kwqe); | |
2014 | break; | |
2015 | case L4_KWQE_OPCODE_VALUE_UPDATE_PG: | |
2016 | ret = cnic_bnx2x_update_pg(dev, kwqe); | |
2017 | break; | |
2018 | case L4_KWQE_OPCODE_VALUE_UPLOAD_PG: | |
2019 | ret = 0; | |
2020 | break; | |
2021 | default: | |
2022 | ret = 0; | |
ddf79b20 JP |
2023 | netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n", |
2024 | opcode); | |
71034ba8 MC |
2025 | break; |
2026 | } | |
2027 | if (ret < 0) | |
ddf79b20 JP |
2028 | netdev_err(dev->netdev, "KWQE(0x%x) failed\n", |
2029 | opcode); | |
71034ba8 MC |
2030 | i += work; |
2031 | } | |
2032 | return 0; | |
2033 | } | |
2034 | ||
a4636960 MC |
2035 | static void service_kcqes(struct cnic_dev *dev, int num_cqes) |
2036 | { | |
2037 | struct cnic_local *cp = dev->cnic_priv; | |
2038 | int i, j; | |
2039 | ||
2040 | i = 0; | |
2041 | j = 1; | |
2042 | while (num_cqes) { | |
2043 | struct cnic_ulp_ops *ulp_ops; | |
2044 | int ulp_type; | |
2045 | u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag; | |
2046 | u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK; | |
2047 | ||
2048 | if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION)) | |
2049 | cnic_kwq_completion(dev, 1); | |
2050 | ||
2051 | while (j < num_cqes) { | |
2052 | u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag; | |
2053 | ||
2054 | if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer) | |
2055 | break; | |
2056 | ||
2057 | if (unlikely(next_op & KCQE_RAMROD_COMPLETION)) | |
2058 | cnic_kwq_completion(dev, 1); | |
2059 | j++; | |
2060 | } | |
2061 | ||
2062 | if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA) | |
2063 | ulp_type = CNIC_ULP_RDMA; | |
2064 | else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI) | |
2065 | ulp_type = CNIC_ULP_ISCSI; | |
2066 | else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4) | |
2067 | ulp_type = CNIC_ULP_L4; | |
2068 | else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2) | |
2069 | goto end; | |
2070 | else { | |
ddf79b20 JP |
2071 | netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n", |
2072 | kcqe_op_flag); | |
a4636960 MC |
2073 | goto end; |
2074 | } | |
2075 | ||
2076 | rcu_read_lock(); | |
2077 | ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]); | |
2078 | if (likely(ulp_ops)) { | |
2079 | ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type], | |
2080 | cp->completed_kcq + i, j); | |
2081 | } | |
2082 | rcu_read_unlock(); | |
2083 | end: | |
2084 | num_cqes -= j; | |
2085 | i += j; | |
2086 | j = 1; | |
2087 | } | |
2088 | return; | |
2089 | } | |
2090 | ||
71034ba8 MC |
2091 | static u16 cnic_bnx2_next_idx(u16 idx) |
2092 | { | |
2093 | return idx + 1; | |
2094 | } | |
2095 | ||
2096 | static u16 cnic_bnx2_hw_idx(u16 idx) | |
2097 | { | |
2098 | return idx; | |
2099 | } | |
2100 | ||
2101 | static u16 cnic_bnx2x_next_idx(u16 idx) | |
a4636960 | 2102 | { |
71034ba8 MC |
2103 | idx++; |
2104 | if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT) | |
2105 | idx++; | |
2106 | ||
2107 | return idx; | |
a4636960 MC |
2108 | } |
2109 | ||
71034ba8 | 2110 | static u16 cnic_bnx2x_hw_idx(u16 idx) |
a4636960 | 2111 | { |
71034ba8 MC |
2112 | if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT) |
2113 | idx++; | |
a4636960 MC |
2114 | return idx; |
2115 | } | |
2116 | ||
2117 | static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod) | |
2118 | { | |
2119 | struct cnic_local *cp = dev->cnic_priv; | |
2120 | u16 i, ri, last; | |
2121 | struct kcqe *kcqe; | |
2122 | int kcqe_cnt = 0, last_cnt = 0; | |
2123 | ||
2124 | i = ri = last = *sw_prod; | |
2125 | ri &= MAX_KCQ_IDX; | |
2126 | ||
2127 | while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) { | |
2128 | kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)]; | |
2129 | cp->completed_kcq[kcqe_cnt++] = kcqe; | |
2130 | i = cp->next_idx(i); | |
2131 | ri = i & MAX_KCQ_IDX; | |
2132 | if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) { | |
2133 | last_cnt = kcqe_cnt; | |
2134 | last = i; | |
2135 | } | |
2136 | } | |
2137 | ||
2138 | *sw_prod = last; | |
2139 | return last_cnt; | |
2140 | } | |
2141 | ||
86b53606 | 2142 | static void cnic_chk_pkt_rings(struct cnic_local *cp) |
a4636960 MC |
2143 | { |
2144 | u16 rx_cons = *cp->rx_cons_ptr; | |
2145 | u16 tx_cons = *cp->tx_cons_ptr; | |
2146 | ||
2147 | if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) { | |
2148 | cp->tx_cons = tx_cons; | |
2149 | cp->rx_cons = rx_cons; | |
71034ba8 | 2150 | |
a4636960 MC |
2151 | uio_event_notify(cp->cnic_uinfo); |
2152 | } | |
2153 | } | |
2154 | ||
2155 | static int cnic_service_bnx2(void *data, void *status_blk) | |
2156 | { | |
2157 | struct cnic_dev *dev = data; | |
2158 | struct status_block *sblk = status_blk; | |
2159 | struct cnic_local *cp = dev->cnic_priv; | |
2160 | u32 status_idx = sblk->status_idx; | |
2161 | u16 hw_prod, sw_prod; | |
2162 | int kcqe_cnt; | |
2163 | ||
2164 | if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) | |
2165 | return status_idx; | |
2166 | ||
2167 | cp->kwq_con_idx = *cp->kwq_con_idx_ptr; | |
2168 | ||
2169 | hw_prod = sblk->status_completion_producer_index; | |
2170 | sw_prod = cp->kcq_prod_idx; | |
2171 | while (sw_prod != hw_prod) { | |
2172 | kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod); | |
2173 | if (kcqe_cnt == 0) | |
2174 | goto done; | |
2175 | ||
2176 | service_kcqes(dev, kcqe_cnt); | |
2177 | ||
2178 | /* Tell compiler that status_blk fields can change. */ | |
2179 | barrier(); | |
2180 | if (status_idx != sblk->status_idx) { | |
2181 | status_idx = sblk->status_idx; | |
2182 | cp->kwq_con_idx = *cp->kwq_con_idx_ptr; | |
2183 | hw_prod = sblk->status_completion_producer_index; | |
2184 | } else | |
2185 | break; | |
2186 | } | |
2187 | ||
2188 | done: | |
2189 | CNIC_WR16(dev, cp->kcq_io_addr, sw_prod); | |
2190 | ||
2191 | cp->kcq_prod_idx = sw_prod; | |
2192 | ||
86b53606 | 2193 | cnic_chk_pkt_rings(cp); |
a4636960 MC |
2194 | return status_idx; |
2195 | } | |
2196 | ||
2197 | static void cnic_service_bnx2_msix(unsigned long data) | |
2198 | { | |
2199 | struct cnic_dev *dev = (struct cnic_dev *) data; | |
2200 | struct cnic_local *cp = dev->cnic_priv; | |
2201 | struct status_block_msix *status_blk = cp->bnx2_status_blk; | |
2202 | u32 status_idx = status_blk->status_idx; | |
2203 | u16 hw_prod, sw_prod; | |
2204 | int kcqe_cnt; | |
2205 | ||
2206 | cp->kwq_con_idx = status_blk->status_cmd_consumer_index; | |
2207 | ||
2208 | hw_prod = status_blk->status_completion_producer_index; | |
2209 | sw_prod = cp->kcq_prod_idx; | |
2210 | while (sw_prod != hw_prod) { | |
2211 | kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod); | |
2212 | if (kcqe_cnt == 0) | |
2213 | goto done; | |
2214 | ||
2215 | service_kcqes(dev, kcqe_cnt); | |
2216 | ||
2217 | /* Tell compiler that status_blk fields can change. */ | |
2218 | barrier(); | |
2219 | if (status_idx != status_blk->status_idx) { | |
2220 | status_idx = status_blk->status_idx; | |
2221 | cp->kwq_con_idx = status_blk->status_cmd_consumer_index; | |
2222 | hw_prod = status_blk->status_completion_producer_index; | |
2223 | } else | |
2224 | break; | |
2225 | } | |
2226 | ||
2227 | done: | |
2228 | CNIC_WR16(dev, cp->kcq_io_addr, sw_prod); | |
2229 | cp->kcq_prod_idx = sw_prod; | |
2230 | ||
86b53606 | 2231 | cnic_chk_pkt_rings(cp); |
a4636960 MC |
2232 | |
2233 | cp->last_status_idx = status_idx; | |
2234 | CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num | | |
2235 | BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx); | |
2236 | } | |
2237 | ||
2238 | static irqreturn_t cnic_irq(int irq, void *dev_instance) | |
2239 | { | |
2240 | struct cnic_dev *dev = dev_instance; | |
2241 | struct cnic_local *cp = dev->cnic_priv; | |
2242 | u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX; | |
2243 | ||
2244 | if (cp->ack_int) | |
2245 | cp->ack_int(dev); | |
2246 | ||
2247 | prefetch(cp->status_blk); | |
2248 | prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]); | |
2249 | ||
2250 | if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) | |
2251 | tasklet_schedule(&cp->cnic_irq_task); | |
2252 | ||
2253 | return IRQ_HANDLED; | |
2254 | } | |
2255 | ||
71034ba8 MC |
2256 | static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm, |
2257 | u16 index, u8 op, u8 update) | |
2258 | { | |
2259 | struct cnic_local *cp = dev->cnic_priv; | |
2260 | u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 + | |
2261 | COMMAND_REG_INT_ACK); | |
2262 | struct igu_ack_register igu_ack; | |
2263 | ||
2264 | igu_ack.status_block_index = index; | |
2265 | igu_ack.sb_id_and_flags = | |
2266 | ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) | | |
2267 | (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) | | |
2268 | (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) | | |
2269 | (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT)); | |
2270 | ||
2271 | CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack)); | |
2272 | } | |
2273 | ||
2274 | static void cnic_ack_bnx2x_msix(struct cnic_dev *dev) | |
2275 | { | |
2276 | struct cnic_local *cp = dev->cnic_priv; | |
2277 | ||
2278 | cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID, 0, | |
2279 | IGU_INT_DISABLE, 0); | |
2280 | } | |
2281 | ||
2282 | static void cnic_service_bnx2x_bh(unsigned long data) | |
2283 | { | |
2284 | struct cnic_dev *dev = (struct cnic_dev *) data; | |
2285 | struct cnic_local *cp = dev->cnic_priv; | |
2286 | u16 hw_prod, sw_prod; | |
2287 | struct cstorm_status_block_c *sblk = | |
2288 | &cp->bnx2x_status_blk->c_status_block; | |
2289 | u32 status_idx = sblk->status_block_index; | |
2290 | int kcqe_cnt; | |
2291 | ||
2292 | if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) | |
2293 | return; | |
2294 | ||
2295 | hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS]; | |
2296 | hw_prod = cp->hw_idx(hw_prod); | |
2297 | sw_prod = cp->kcq_prod_idx; | |
2298 | while (sw_prod != hw_prod) { | |
2299 | kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod); | |
2300 | if (kcqe_cnt == 0) | |
2301 | goto done; | |
2302 | ||
2303 | service_kcqes(dev, kcqe_cnt); | |
2304 | ||
2305 | /* Tell compiler that sblk fields can change. */ | |
2306 | barrier(); | |
2307 | if (status_idx == sblk->status_block_index) | |
2308 | break; | |
2309 | ||
2310 | status_idx = sblk->status_block_index; | |
2311 | hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS]; | |
2312 | hw_prod = cp->hw_idx(hw_prod); | |
2313 | } | |
2314 | ||
2315 | done: | |
2316 | CNIC_WR16(dev, cp->kcq_io_addr, sw_prod + MAX_KCQ_IDX); | |
2317 | cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID, | |
2318 | status_idx, IGU_INT_ENABLE, 1); | |
2319 | ||
2320 | cp->kcq_prod_idx = sw_prod; | |
2321 | return; | |
2322 | } | |
2323 | ||
2324 | static int cnic_service_bnx2x(void *data, void *status_blk) | |
2325 | { | |
2326 | struct cnic_dev *dev = data; | |
2327 | struct cnic_local *cp = dev->cnic_priv; | |
2328 | u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX; | |
2329 | ||
2330 | prefetch(cp->status_blk); | |
2331 | prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]); | |
2332 | ||
2333 | if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) | |
2334 | tasklet_schedule(&cp->cnic_irq_task); | |
2335 | ||
2336 | cnic_chk_pkt_rings(cp); | |
2337 | ||
2338 | return 0; | |
2339 | } | |
2340 | ||
a4636960 MC |
2341 | static void cnic_ulp_stop(struct cnic_dev *dev) |
2342 | { | |
2343 | struct cnic_local *cp = dev->cnic_priv; | |
2344 | int if_type; | |
2345 | ||
6d7760a8 MC |
2346 | if (cp->cnic_uinfo) |
2347 | cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL); | |
2348 | ||
a4636960 MC |
2349 | for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) { |
2350 | struct cnic_ulp_ops *ulp_ops; | |
2351 | ||
681dbd71 MC |
2352 | mutex_lock(&cnic_lock); |
2353 | ulp_ops = cp->ulp_ops[if_type]; | |
2354 | if (!ulp_ops) { | |
2355 | mutex_unlock(&cnic_lock); | |
a4636960 | 2356 | continue; |
681dbd71 MC |
2357 | } |
2358 | set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]); | |
2359 | mutex_unlock(&cnic_lock); | |
a4636960 MC |
2360 | |
2361 | if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type])) | |
2362 | ulp_ops->cnic_stop(cp->ulp_handle[if_type]); | |
681dbd71 MC |
2363 | |
2364 | clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]); | |
a4636960 | 2365 | } |
a4636960 MC |
2366 | } |
2367 | ||
2368 | static void cnic_ulp_start(struct cnic_dev *dev) | |
2369 | { | |
2370 | struct cnic_local *cp = dev->cnic_priv; | |
2371 | int if_type; | |
2372 | ||
a4636960 MC |
2373 | for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) { |
2374 | struct cnic_ulp_ops *ulp_ops; | |
2375 | ||
681dbd71 MC |
2376 | mutex_lock(&cnic_lock); |
2377 | ulp_ops = cp->ulp_ops[if_type]; | |
2378 | if (!ulp_ops || !ulp_ops->cnic_start) { | |
2379 | mutex_unlock(&cnic_lock); | |
a4636960 | 2380 | continue; |
681dbd71 MC |
2381 | } |
2382 | set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]); | |
2383 | mutex_unlock(&cnic_lock); | |
a4636960 MC |
2384 | |
2385 | if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type])) | |
2386 | ulp_ops->cnic_start(cp->ulp_handle[if_type]); | |
681dbd71 MC |
2387 | |
2388 | clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]); | |
a4636960 | 2389 | } |
a4636960 MC |
2390 | } |
2391 | ||
2392 | static int cnic_ctl(void *data, struct cnic_ctl_info *info) | |
2393 | { | |
2394 | struct cnic_dev *dev = data; | |
2395 | ||
2396 | switch (info->cmd) { | |
2397 | case CNIC_CTL_STOP_CMD: | |
2398 | cnic_hold(dev); | |
a4636960 MC |
2399 | |
2400 | cnic_ulp_stop(dev); | |
2401 | cnic_stop_hw(dev); | |
2402 | ||
a4636960 MC |
2403 | cnic_put(dev); |
2404 | break; | |
2405 | case CNIC_CTL_START_CMD: | |
2406 | cnic_hold(dev); | |
a4636960 MC |
2407 | |
2408 | if (!cnic_start_hw(dev)) | |
2409 | cnic_ulp_start(dev); | |
2410 | ||
a4636960 MC |
2411 | cnic_put(dev); |
2412 | break; | |
71034ba8 MC |
2413 | case CNIC_CTL_COMPLETION_CMD: { |
2414 | u32 cid = BNX2X_SW_CID(info->data.comp.cid); | |
2415 | u32 l5_cid; | |
2416 | struct cnic_local *cp = dev->cnic_priv; | |
2417 | ||
2418 | if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) { | |
2419 | struct cnic_context *ctx = &cp->ctx_tbl[l5_cid]; | |
2420 | ||
2421 | ctx->wait_cond = 1; | |
2422 | wake_up(&ctx->waitq); | |
2423 | } | |
2424 | break; | |
2425 | } | |
a4636960 MC |
2426 | default: |
2427 | return -EINVAL; | |
2428 | } | |
2429 | return 0; | |
2430 | } | |
2431 | ||
2432 | static void cnic_ulp_init(struct cnic_dev *dev) | |
2433 | { | |
2434 | int i; | |
2435 | struct cnic_local *cp = dev->cnic_priv; | |
2436 | ||
a4636960 MC |
2437 | for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) { |
2438 | struct cnic_ulp_ops *ulp_ops; | |
2439 | ||
7fc1ece4 MC |
2440 | mutex_lock(&cnic_lock); |
2441 | ulp_ops = cnic_ulp_tbl[i]; | |
2442 | if (!ulp_ops || !ulp_ops->cnic_init) { | |
2443 | mutex_unlock(&cnic_lock); | |
a4636960 | 2444 | continue; |
7fc1ece4 MC |
2445 | } |
2446 | ulp_get(ulp_ops); | |
2447 | mutex_unlock(&cnic_lock); | |
a4636960 MC |
2448 | |
2449 | if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i])) | |
2450 | ulp_ops->cnic_init(dev); | |
2451 | ||
7fc1ece4 | 2452 | ulp_put(ulp_ops); |
a4636960 | 2453 | } |
a4636960 MC |
2454 | } |
2455 | ||
2456 | static void cnic_ulp_exit(struct cnic_dev *dev) | |
2457 | { | |
2458 | int i; | |
2459 | struct cnic_local *cp = dev->cnic_priv; | |
2460 | ||
a4636960 MC |
2461 | for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) { |
2462 | struct cnic_ulp_ops *ulp_ops; | |
2463 | ||
7fc1ece4 MC |
2464 | mutex_lock(&cnic_lock); |
2465 | ulp_ops = cnic_ulp_tbl[i]; | |
2466 | if (!ulp_ops || !ulp_ops->cnic_exit) { | |
2467 | mutex_unlock(&cnic_lock); | |
a4636960 | 2468 | continue; |
7fc1ece4 MC |
2469 | } |
2470 | ulp_get(ulp_ops); | |
2471 | mutex_unlock(&cnic_lock); | |
a4636960 MC |
2472 | |
2473 | if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i])) | |
2474 | ulp_ops->cnic_exit(dev); | |
2475 | ||
7fc1ece4 | 2476 | ulp_put(ulp_ops); |
a4636960 | 2477 | } |
a4636960 MC |
2478 | } |
2479 | ||
2480 | static int cnic_cm_offload_pg(struct cnic_sock *csk) | |
2481 | { | |
2482 | struct cnic_dev *dev = csk->dev; | |
2483 | struct l4_kwq_offload_pg *l4kwqe; | |
2484 | struct kwqe *wqes[1]; | |
2485 | ||
2486 | l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1; | |
2487 | memset(l4kwqe, 0, sizeof(*l4kwqe)); | |
2488 | wqes[0] = (struct kwqe *) l4kwqe; | |
2489 | ||
2490 | l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG; | |
2491 | l4kwqe->flags = | |
2492 | L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT; | |
2493 | l4kwqe->l2hdr_nbytes = ETH_HLEN; | |
2494 | ||
2495 | l4kwqe->da0 = csk->ha[0]; | |
2496 | l4kwqe->da1 = csk->ha[1]; | |
2497 | l4kwqe->da2 = csk->ha[2]; | |
2498 | l4kwqe->da3 = csk->ha[3]; | |
2499 | l4kwqe->da4 = csk->ha[4]; | |
2500 | l4kwqe->da5 = csk->ha[5]; | |
2501 | ||
2502 | l4kwqe->sa0 = dev->mac_addr[0]; | |
2503 | l4kwqe->sa1 = dev->mac_addr[1]; | |
2504 | l4kwqe->sa2 = dev->mac_addr[2]; | |
2505 | l4kwqe->sa3 = dev->mac_addr[3]; | |
2506 | l4kwqe->sa4 = dev->mac_addr[4]; | |
2507 | l4kwqe->sa5 = dev->mac_addr[5]; | |
2508 | ||
2509 | l4kwqe->etype = ETH_P_IP; | |
a9736c08 | 2510 | l4kwqe->ipid_start = DEF_IPID_START; |
a4636960 MC |
2511 | l4kwqe->host_opaque = csk->l5_cid; |
2512 | ||
2513 | if (csk->vlan_id) { | |
2514 | l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING; | |
2515 | l4kwqe->vlan_tag = csk->vlan_id; | |
2516 | l4kwqe->l2hdr_nbytes += 4; | |
2517 | } | |
2518 | ||
2519 | return dev->submit_kwqes(dev, wqes, 1); | |
2520 | } | |
2521 | ||
2522 | static int cnic_cm_update_pg(struct cnic_sock *csk) | |
2523 | { | |
2524 | struct cnic_dev *dev = csk->dev; | |
2525 | struct l4_kwq_update_pg *l4kwqe; | |
2526 | struct kwqe *wqes[1]; | |
2527 | ||
2528 | l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1; | |
2529 | memset(l4kwqe, 0, sizeof(*l4kwqe)); | |
2530 | wqes[0] = (struct kwqe *) l4kwqe; | |
2531 | ||
2532 | l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG; | |
2533 | l4kwqe->flags = | |
2534 | L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT; | |
2535 | l4kwqe->pg_cid = csk->pg_cid; | |
2536 | ||
2537 | l4kwqe->da0 = csk->ha[0]; | |
2538 | l4kwqe->da1 = csk->ha[1]; | |
2539 | l4kwqe->da2 = csk->ha[2]; | |
2540 | l4kwqe->da3 = csk->ha[3]; | |
2541 | l4kwqe->da4 = csk->ha[4]; | |
2542 | l4kwqe->da5 = csk->ha[5]; | |
2543 | ||
2544 | l4kwqe->pg_host_opaque = csk->l5_cid; | |
2545 | l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA; | |
2546 | ||
2547 | return dev->submit_kwqes(dev, wqes, 1); | |
2548 | } | |
2549 | ||
2550 | static int cnic_cm_upload_pg(struct cnic_sock *csk) | |
2551 | { | |
2552 | struct cnic_dev *dev = csk->dev; | |
2553 | struct l4_kwq_upload *l4kwqe; | |
2554 | struct kwqe *wqes[1]; | |
2555 | ||
2556 | l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1; | |
2557 | memset(l4kwqe, 0, sizeof(*l4kwqe)); | |
2558 | wqes[0] = (struct kwqe *) l4kwqe; | |
2559 | ||
2560 | l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG; | |
2561 | l4kwqe->flags = | |
2562 | L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT; | |
2563 | l4kwqe->cid = csk->pg_cid; | |
2564 | ||
2565 | return dev->submit_kwqes(dev, wqes, 1); | |
2566 | } | |
2567 | ||
2568 | static int cnic_cm_conn_req(struct cnic_sock *csk) | |
2569 | { | |
2570 | struct cnic_dev *dev = csk->dev; | |
2571 | struct l4_kwq_connect_req1 *l4kwqe1; | |
2572 | struct l4_kwq_connect_req2 *l4kwqe2; | |
2573 | struct l4_kwq_connect_req3 *l4kwqe3; | |
2574 | struct kwqe *wqes[3]; | |
2575 | u8 tcp_flags = 0; | |
2576 | int num_wqes = 2; | |
2577 | ||
2578 | l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1; | |
2579 | l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2; | |
2580 | l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3; | |
2581 | memset(l4kwqe1, 0, sizeof(*l4kwqe1)); | |
2582 | memset(l4kwqe2, 0, sizeof(*l4kwqe2)); | |
2583 | memset(l4kwqe3, 0, sizeof(*l4kwqe3)); | |
2584 | ||
2585 | l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3; | |
2586 | l4kwqe3->flags = | |
2587 | L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT; | |
2588 | l4kwqe3->ka_timeout = csk->ka_timeout; | |
2589 | l4kwqe3->ka_interval = csk->ka_interval; | |
2590 | l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count; | |
2591 | l4kwqe3->tos = csk->tos; | |
2592 | l4kwqe3->ttl = csk->ttl; | |
2593 | l4kwqe3->snd_seq_scale = csk->snd_seq_scale; | |
2594 | l4kwqe3->pmtu = csk->mtu; | |
2595 | l4kwqe3->rcv_buf = csk->rcv_buf; | |
2596 | l4kwqe3->snd_buf = csk->snd_buf; | |
2597 | l4kwqe3->seed = csk->seed; | |
2598 | ||
2599 | wqes[0] = (struct kwqe *) l4kwqe1; | |
2600 | if (test_bit(SK_F_IPV6, &csk->flags)) { | |
2601 | wqes[1] = (struct kwqe *) l4kwqe2; | |
2602 | wqes[2] = (struct kwqe *) l4kwqe3; | |
2603 | num_wqes = 3; | |
2604 | ||
2605 | l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6; | |
2606 | l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2; | |
2607 | l4kwqe2->flags = | |
2608 | L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT | | |
2609 | L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT; | |
2610 | l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]); | |
2611 | l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]); | |
2612 | l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]); | |
2613 | l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]); | |
2614 | l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]); | |
2615 | l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]); | |
2616 | l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) - | |
2617 | sizeof(struct tcphdr); | |
2618 | } else { | |
2619 | wqes[1] = (struct kwqe *) l4kwqe3; | |
2620 | l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) - | |
2621 | sizeof(struct tcphdr); | |
2622 | } | |
2623 | ||
2624 | l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1; | |
2625 | l4kwqe1->flags = | |
2626 | (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) | | |
2627 | L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT; | |
2628 | l4kwqe1->cid = csk->cid; | |
2629 | l4kwqe1->pg_cid = csk->pg_cid; | |
2630 | l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]); | |
2631 | l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]); | |
2632 | l4kwqe1->src_port = be16_to_cpu(csk->src_port); | |
2633 | l4kwqe1->dst_port = be16_to_cpu(csk->dst_port); | |
2634 | if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK) | |
2635 | tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK; | |
2636 | if (csk->tcp_flags & SK_TCP_KEEP_ALIVE) | |
2637 | tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE; | |
2638 | if (csk->tcp_flags & SK_TCP_NAGLE) | |
2639 | tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE; | |
2640 | if (csk->tcp_flags & SK_TCP_TIMESTAMP) | |
2641 | tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP; | |
2642 | if (csk->tcp_flags & SK_TCP_SACK) | |
2643 | tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK; | |
2644 | if (csk->tcp_flags & SK_TCP_SEG_SCALING) | |
2645 | tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING; | |
2646 | ||
2647 | l4kwqe1->tcp_flags = tcp_flags; | |
2648 | ||
2649 | return dev->submit_kwqes(dev, wqes, num_wqes); | |
2650 | } | |
2651 | ||
2652 | static int cnic_cm_close_req(struct cnic_sock *csk) | |
2653 | { | |
2654 | struct cnic_dev *dev = csk->dev; | |
2655 | struct l4_kwq_close_req *l4kwqe; | |
2656 | struct kwqe *wqes[1]; | |
2657 | ||
2658 | l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2; | |
2659 | memset(l4kwqe, 0, sizeof(*l4kwqe)); | |
2660 | wqes[0] = (struct kwqe *) l4kwqe; | |
2661 | ||
2662 | l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE; | |
2663 | l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT; | |
2664 | l4kwqe->cid = csk->cid; | |
2665 | ||
2666 | return dev->submit_kwqes(dev, wqes, 1); | |
2667 | } | |
2668 | ||
2669 | static int cnic_cm_abort_req(struct cnic_sock *csk) | |
2670 | { | |
2671 | struct cnic_dev *dev = csk->dev; | |
2672 | struct l4_kwq_reset_req *l4kwqe; | |
2673 | struct kwqe *wqes[1]; | |
2674 | ||
2675 | l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2; | |
2676 | memset(l4kwqe, 0, sizeof(*l4kwqe)); | |
2677 | wqes[0] = (struct kwqe *) l4kwqe; | |
2678 | ||
2679 | l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET; | |
2680 | l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT; | |
2681 | l4kwqe->cid = csk->cid; | |
2682 | ||
2683 | return dev->submit_kwqes(dev, wqes, 1); | |
2684 | } | |
2685 | ||
2686 | static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid, | |
2687 | u32 l5_cid, struct cnic_sock **csk, void *context) | |
2688 | { | |
2689 | struct cnic_local *cp = dev->cnic_priv; | |
2690 | struct cnic_sock *csk1; | |
2691 | ||
2692 | if (l5_cid >= MAX_CM_SK_TBL_SZ) | |
2693 | return -EINVAL; | |
2694 | ||
2695 | csk1 = &cp->csk_tbl[l5_cid]; | |
2696 | if (atomic_read(&csk1->ref_count)) | |
2697 | return -EAGAIN; | |
2698 | ||
2699 | if (test_and_set_bit(SK_F_INUSE, &csk1->flags)) | |
2700 | return -EBUSY; | |
2701 | ||
2702 | csk1->dev = dev; | |
2703 | csk1->cid = cid; | |
2704 | csk1->l5_cid = l5_cid; | |
2705 | csk1->ulp_type = ulp_type; | |
2706 | csk1->context = context; | |
2707 | ||
2708 | csk1->ka_timeout = DEF_KA_TIMEOUT; | |
2709 | csk1->ka_interval = DEF_KA_INTERVAL; | |
2710 | csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT; | |
2711 | csk1->tos = DEF_TOS; | |
2712 | csk1->ttl = DEF_TTL; | |
2713 | csk1->snd_seq_scale = DEF_SND_SEQ_SCALE; | |
2714 | csk1->rcv_buf = DEF_RCV_BUF; | |
2715 | csk1->snd_buf = DEF_SND_BUF; | |
2716 | csk1->seed = DEF_SEED; | |
2717 | ||
2718 | *csk = csk1; | |
2719 | return 0; | |
2720 | } | |
2721 | ||
2722 | static void cnic_cm_cleanup(struct cnic_sock *csk) | |
2723 | { | |
2724 | if (csk->src_port) { | |
2725 | struct cnic_dev *dev = csk->dev; | |
2726 | struct cnic_local *cp = dev->cnic_priv; | |
2727 | ||
2728 | cnic_free_id(&cp->csk_port_tbl, csk->src_port); | |
2729 | csk->src_port = 0; | |
2730 | } | |
2731 | } | |
2732 | ||
2733 | static void cnic_close_conn(struct cnic_sock *csk) | |
2734 | { | |
2735 | if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) { | |
2736 | cnic_cm_upload_pg(csk); | |
2737 | clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags); | |
2738 | } | |
2739 | cnic_cm_cleanup(csk); | |
2740 | } | |
2741 | ||
2742 | static int cnic_cm_destroy(struct cnic_sock *csk) | |
2743 | { | |
2744 | if (!cnic_in_use(csk)) | |
2745 | return -EINVAL; | |
2746 | ||
2747 | csk_hold(csk); | |
2748 | clear_bit(SK_F_INUSE, &csk->flags); | |
2749 | smp_mb__after_clear_bit(); | |
2750 | while (atomic_read(&csk->ref_count) != 1) | |
2751 | msleep(1); | |
2752 | cnic_cm_cleanup(csk); | |
2753 | ||
2754 | csk->flags = 0; | |
2755 | csk_put(csk); | |
2756 | return 0; | |
2757 | } | |
2758 | ||
2759 | static inline u16 cnic_get_vlan(struct net_device *dev, | |
2760 | struct net_device **vlan_dev) | |
2761 | { | |
2762 | if (dev->priv_flags & IFF_802_1Q_VLAN) { | |
2763 | *vlan_dev = vlan_dev_real_dev(dev); | |
2764 | return vlan_dev_vlan_id(dev); | |
2765 | } | |
2766 | *vlan_dev = dev; | |
2767 | return 0; | |
2768 | } | |
2769 | ||
2770 | static int cnic_get_v4_route(struct sockaddr_in *dst_addr, | |
2771 | struct dst_entry **dst) | |
2772 | { | |
faea56c9 | 2773 | #if defined(CONFIG_INET) |
a4636960 MC |
2774 | struct flowi fl; |
2775 | int err; | |
2776 | struct rtable *rt; | |
2777 | ||
2778 | memset(&fl, 0, sizeof(fl)); | |
2779 | fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr; | |
2780 | ||
2781 | err = ip_route_output_key(&init_net, &rt, &fl); | |
2782 | if (!err) | |
2783 | *dst = &rt->u.dst; | |
2784 | return err; | |
faea56c9 RD |
2785 | #else |
2786 | return -ENETUNREACH; | |
2787 | #endif | |
a4636960 MC |
2788 | } |
2789 | ||
2790 | static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr, | |
2791 | struct dst_entry **dst) | |
2792 | { | |
faea56c9 | 2793 | #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE)) |
a4636960 MC |
2794 | struct flowi fl; |
2795 | ||
2796 | memset(&fl, 0, sizeof(fl)); | |
2797 | ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr); | |
2798 | if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL) | |
2799 | fl.oif = dst_addr->sin6_scope_id; | |
2800 | ||
2801 | *dst = ip6_route_output(&init_net, NULL, &fl); | |
2802 | if (*dst) | |
2803 | return 0; | |
2804 | #endif | |
2805 | ||
2806 | return -ENETUNREACH; | |
2807 | } | |
2808 | ||
2809 | static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr, | |
2810 | int ulp_type) | |
2811 | { | |
2812 | struct cnic_dev *dev = NULL; | |
2813 | struct dst_entry *dst; | |
2814 | struct net_device *netdev = NULL; | |
2815 | int err = -ENETUNREACH; | |
2816 | ||
2817 | if (dst_addr->sin_family == AF_INET) | |
2818 | err = cnic_get_v4_route(dst_addr, &dst); | |
2819 | else if (dst_addr->sin_family == AF_INET6) { | |
2820 | struct sockaddr_in6 *dst_addr6 = | |
2821 | (struct sockaddr_in6 *) dst_addr; | |
2822 | ||
2823 | err = cnic_get_v6_route(dst_addr6, &dst); | |
2824 | } else | |
2825 | return NULL; | |
2826 | ||
2827 | if (err) | |
2828 | return NULL; | |
2829 | ||
2830 | if (!dst->dev) | |
2831 | goto done; | |
2832 | ||
2833 | cnic_get_vlan(dst->dev, &netdev); | |
2834 | ||
2835 | dev = cnic_from_netdev(netdev); | |
2836 | ||
2837 | done: | |
2838 | dst_release(dst); | |
2839 | if (dev) | |
2840 | cnic_put(dev); | |
2841 | return dev; | |
2842 | } | |
2843 | ||
2844 | static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr) | |
2845 | { | |
2846 | struct cnic_dev *dev = csk->dev; | |
2847 | struct cnic_local *cp = dev->cnic_priv; | |
2848 | ||
2849 | return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk); | |
2850 | } | |
2851 | ||
2852 | static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr) | |
2853 | { | |
2854 | struct cnic_dev *dev = csk->dev; | |
2855 | struct cnic_local *cp = dev->cnic_priv; | |
2856 | int is_v6, err, rc = -ENETUNREACH; | |
2857 | struct dst_entry *dst; | |
2858 | struct net_device *realdev; | |
2859 | u32 local_port; | |
2860 | ||
2861 | if (saddr->local.v6.sin6_family == AF_INET6 && | |
2862 | saddr->remote.v6.sin6_family == AF_INET6) | |
2863 | is_v6 = 1; | |
2864 | else if (saddr->local.v4.sin_family == AF_INET && | |
2865 | saddr->remote.v4.sin_family == AF_INET) | |
2866 | is_v6 = 0; | |
2867 | else | |
2868 | return -EINVAL; | |
2869 | ||
2870 | clear_bit(SK_F_IPV6, &csk->flags); | |
2871 | ||
2872 | if (is_v6) { | |
faea56c9 | 2873 | #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE)) |
a4636960 MC |
2874 | set_bit(SK_F_IPV6, &csk->flags); |
2875 | err = cnic_get_v6_route(&saddr->remote.v6, &dst); | |
2876 | if (err) | |
2877 | return err; | |
2878 | ||
2879 | if (!dst || dst->error || !dst->dev) | |
2880 | goto err_out; | |
2881 | ||
2882 | memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr, | |
2883 | sizeof(struct in6_addr)); | |
2884 | csk->dst_port = saddr->remote.v6.sin6_port; | |
2885 | local_port = saddr->local.v6.sin6_port; | |
2886 | #else | |
2887 | return rc; | |
2888 | #endif | |
2889 | ||
2890 | } else { | |
2891 | err = cnic_get_v4_route(&saddr->remote.v4, &dst); | |
2892 | if (err) | |
2893 | return err; | |
2894 | ||
2895 | if (!dst || dst->error || !dst->dev) | |
2896 | goto err_out; | |
2897 | ||
2898 | csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr; | |
2899 | csk->dst_port = saddr->remote.v4.sin_port; | |
2900 | local_port = saddr->local.v4.sin_port; | |
2901 | } | |
2902 | ||
2903 | csk->vlan_id = cnic_get_vlan(dst->dev, &realdev); | |
2904 | if (realdev != dev->netdev) | |
2905 | goto err_out; | |
2906 | ||
2907 | if (local_port >= CNIC_LOCAL_PORT_MIN && | |
2908 | local_port < CNIC_LOCAL_PORT_MAX) { | |
2909 | if (cnic_alloc_id(&cp->csk_port_tbl, local_port)) | |
2910 | local_port = 0; | |
2911 | } else | |
2912 | local_port = 0; | |
2913 | ||
2914 | if (!local_port) { | |
2915 | local_port = cnic_alloc_new_id(&cp->csk_port_tbl); | |
2916 | if (local_port == -1) { | |
2917 | rc = -ENOMEM; | |
2918 | goto err_out; | |
2919 | } | |
2920 | } | |
2921 | csk->src_port = local_port; | |
2922 | ||
2923 | csk->mtu = dst_mtu(dst); | |
2924 | rc = 0; | |
2925 | ||
2926 | err_out: | |
2927 | dst_release(dst); | |
2928 | return rc; | |
2929 | } | |
2930 | ||
2931 | static void cnic_init_csk_state(struct cnic_sock *csk) | |
2932 | { | |
2933 | csk->state = 0; | |
2934 | clear_bit(SK_F_OFFLD_SCHED, &csk->flags); | |
2935 | clear_bit(SK_F_CLOSING, &csk->flags); | |
2936 | } | |
2937 | ||
2938 | static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr) | |
2939 | { | |
2940 | int err = 0; | |
2941 | ||
2942 | if (!cnic_in_use(csk)) | |
2943 | return -EINVAL; | |
2944 | ||
2945 | if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags)) | |
2946 | return -EINVAL; | |
2947 | ||
2948 | cnic_init_csk_state(csk); | |
2949 | ||
2950 | err = cnic_get_route(csk, saddr); | |
2951 | if (err) | |
2952 | goto err_out; | |
2953 | ||
2954 | err = cnic_resolve_addr(csk, saddr); | |
2955 | if (!err) | |
2956 | return 0; | |
2957 | ||
2958 | err_out: | |
2959 | clear_bit(SK_F_CONNECT_START, &csk->flags); | |
2960 | return err; | |
2961 | } | |
2962 | ||
2963 | static int cnic_cm_abort(struct cnic_sock *csk) | |
2964 | { | |
2965 | struct cnic_local *cp = csk->dev->cnic_priv; | |
2966 | u32 opcode; | |
2967 | ||
2968 | if (!cnic_in_use(csk)) | |
2969 | return -EINVAL; | |
2970 | ||
2971 | if (cnic_abort_prep(csk)) | |
2972 | return cnic_cm_abort_req(csk); | |
2973 | ||
2974 | /* Getting here means that we haven't started connect, or | |
2975 | * connect was not successful. | |
2976 | */ | |
2977 | ||
2978 | csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP; | |
2979 | if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) | |
2980 | opcode = csk->state; | |
2981 | else | |
2982 | opcode = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD; | |
2983 | cp->close_conn(csk, opcode); | |
2984 | ||
2985 | return 0; | |
2986 | } | |
2987 | ||
2988 | static int cnic_cm_close(struct cnic_sock *csk) | |
2989 | { | |
2990 | if (!cnic_in_use(csk)) | |
2991 | return -EINVAL; | |
2992 | ||
2993 | if (cnic_close_prep(csk)) { | |
2994 | csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP; | |
2995 | return cnic_cm_close_req(csk); | |
2996 | } | |
2997 | return 0; | |
2998 | } | |
2999 | ||
3000 | static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk, | |
3001 | u8 opcode) | |
3002 | { | |
3003 | struct cnic_ulp_ops *ulp_ops; | |
3004 | int ulp_type = csk->ulp_type; | |
3005 | ||
3006 | rcu_read_lock(); | |
3007 | ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]); | |
3008 | if (ulp_ops) { | |
3009 | if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE) | |
3010 | ulp_ops->cm_connect_complete(csk); | |
3011 | else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP) | |
3012 | ulp_ops->cm_close_complete(csk); | |
3013 | else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) | |
3014 | ulp_ops->cm_remote_abort(csk); | |
3015 | else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP) | |
3016 | ulp_ops->cm_abort_complete(csk); | |
3017 | else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED) | |
3018 | ulp_ops->cm_remote_close(csk); | |
3019 | } | |
3020 | rcu_read_unlock(); | |
3021 | } | |
3022 | ||
3023 | static int cnic_cm_set_pg(struct cnic_sock *csk) | |
3024 | { | |
3025 | if (cnic_offld_prep(csk)) { | |
3026 | if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) | |
3027 | cnic_cm_update_pg(csk); | |
3028 | else | |
3029 | cnic_cm_offload_pg(csk); | |
3030 | } | |
3031 | return 0; | |
3032 | } | |
3033 | ||
3034 | static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe) | |
3035 | { | |
3036 | struct cnic_local *cp = dev->cnic_priv; | |
3037 | u32 l5_cid = kcqe->pg_host_opaque; | |
3038 | u8 opcode = kcqe->op_code; | |
3039 | struct cnic_sock *csk = &cp->csk_tbl[l5_cid]; | |
3040 | ||
3041 | csk_hold(csk); | |
3042 | if (!cnic_in_use(csk)) | |
3043 | goto done; | |
3044 | ||
3045 | if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) { | |
3046 | clear_bit(SK_F_OFFLD_SCHED, &csk->flags); | |
3047 | goto done; | |
3048 | } | |
a9736c08 EW |
3049 | /* Possible PG kcqe status: SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */ |
3050 | if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) { | |
3051 | clear_bit(SK_F_OFFLD_SCHED, &csk->flags); | |
3052 | cnic_cm_upcall(cp, csk, | |
3053 | L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE); | |
3054 | goto done; | |
3055 | } | |
3056 | ||
a4636960 MC |
3057 | csk->pg_cid = kcqe->pg_cid; |
3058 | set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags); | |
3059 | cnic_cm_conn_req(csk); | |
3060 | ||
3061 | done: | |
3062 | csk_put(csk); | |
3063 | } | |
3064 | ||
3065 | static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe) | |
3066 | { | |
3067 | struct cnic_local *cp = dev->cnic_priv; | |
3068 | struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe; | |
3069 | u8 opcode = l4kcqe->op_code; | |
3070 | u32 l5_cid; | |
3071 | struct cnic_sock *csk; | |
3072 | ||
3073 | if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG || | |
3074 | opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) { | |
3075 | cnic_cm_process_offld_pg(dev, l4kcqe); | |
3076 | return; | |
3077 | } | |
3078 | ||
3079 | l5_cid = l4kcqe->conn_id; | |
3080 | if (opcode & 0x80) | |
3081 | l5_cid = l4kcqe->cid; | |
3082 | if (l5_cid >= MAX_CM_SK_TBL_SZ) | |
3083 | return; | |
3084 | ||
3085 | csk = &cp->csk_tbl[l5_cid]; | |
3086 | csk_hold(csk); | |
3087 | ||
3088 | if (!cnic_in_use(csk)) { | |
3089 | csk_put(csk); | |
3090 | return; | |
3091 | } | |
3092 | ||
3093 | switch (opcode) { | |
a9736c08 EW |
3094 | case L5CM_RAMROD_CMD_ID_TCP_CONNECT: |
3095 | if (l4kcqe->status != 0) { | |
3096 | clear_bit(SK_F_OFFLD_SCHED, &csk->flags); | |
3097 | cnic_cm_upcall(cp, csk, | |
3098 | L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE); | |
3099 | } | |
3100 | break; | |
a4636960 MC |
3101 | case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE: |
3102 | if (l4kcqe->status == 0) | |
3103 | set_bit(SK_F_OFFLD_COMPLETE, &csk->flags); | |
3104 | ||
3105 | smp_mb__before_clear_bit(); | |
3106 | clear_bit(SK_F_OFFLD_SCHED, &csk->flags); | |
3107 | cnic_cm_upcall(cp, csk, opcode); | |
3108 | break; | |
3109 | ||
3110 | case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED: | |
3111 | if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) | |
3112 | csk->state = opcode; | |
3113 | /* fall through */ | |
3114 | case L4_KCQE_OPCODE_VALUE_CLOSE_COMP: | |
3115 | case L4_KCQE_OPCODE_VALUE_RESET_COMP: | |
71034ba8 MC |
3116 | case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE: |
3117 | case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD: | |
a4636960 MC |
3118 | cp->close_conn(csk, opcode); |
3119 | break; | |
3120 | ||
3121 | case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED: | |
3122 | cnic_cm_upcall(cp, csk, opcode); | |
3123 | break; | |
3124 | } | |
3125 | csk_put(csk); | |
3126 | } | |
3127 | ||
3128 | static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num) | |
3129 | { | |
3130 | struct cnic_dev *dev = data; | |
3131 | int i; | |
3132 | ||
3133 | for (i = 0; i < num; i++) | |
3134 | cnic_cm_process_kcqe(dev, kcqe[i]); | |
3135 | } | |
3136 | ||
3137 | static struct cnic_ulp_ops cm_ulp_ops = { | |
3138 | .indicate_kcqes = cnic_cm_indicate_kcqe, | |
3139 | }; | |
3140 | ||
3141 | static void cnic_cm_free_mem(struct cnic_dev *dev) | |
3142 | { | |
3143 | struct cnic_local *cp = dev->cnic_priv; | |
3144 | ||
3145 | kfree(cp->csk_tbl); | |
3146 | cp->csk_tbl = NULL; | |
3147 | cnic_free_id_tbl(&cp->csk_port_tbl); | |
3148 | } | |
3149 | ||
3150 | static int cnic_cm_alloc_mem(struct cnic_dev *dev) | |
3151 | { | |
3152 | struct cnic_local *cp = dev->cnic_priv; | |
3153 | ||
3154 | cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ, | |
3155 | GFP_KERNEL); | |
3156 | if (!cp->csk_tbl) | |
3157 | return -ENOMEM; | |
3158 | ||
3159 | if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE, | |
3160 | CNIC_LOCAL_PORT_MIN)) { | |
3161 | cnic_cm_free_mem(dev); | |
3162 | return -ENOMEM; | |
3163 | } | |
3164 | return 0; | |
3165 | } | |
3166 | ||
3167 | static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode) | |
3168 | { | |
3169 | if ((opcode == csk->state) || | |
3170 | (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED && | |
3171 | csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)) { | |
3172 | if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) | |
3173 | return 1; | |
3174 | } | |
3175 | return 0; | |
3176 | } | |
3177 | ||
3178 | static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode) | |
3179 | { | |
3180 | struct cnic_dev *dev = csk->dev; | |
3181 | struct cnic_local *cp = dev->cnic_priv; | |
3182 | ||
3183 | clear_bit(SK_F_CONNECT_START, &csk->flags); | |
3184 | if (cnic_ready_to_close(csk, opcode)) { | |
3185 | cnic_close_conn(csk); | |
3186 | cnic_cm_upcall(cp, csk, opcode); | |
3187 | } | |
3188 | } | |
3189 | ||
3190 | static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev) | |
3191 | { | |
3192 | } | |
3193 | ||
3194 | static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev) | |
3195 | { | |
3196 | u32 seed; | |
3197 | ||
3198 | get_random_bytes(&seed, 4); | |
3199 | cnic_ctx_wr(dev, 45, 0, seed); | |
3200 | return 0; | |
3201 | } | |
3202 | ||
71034ba8 MC |
3203 | static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode) |
3204 | { | |
3205 | struct cnic_dev *dev = csk->dev; | |
3206 | struct cnic_local *cp = dev->cnic_priv; | |
3207 | struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid]; | |
3208 | union l5cm_specific_data l5_data; | |
3209 | u32 cmd = 0; | |
3210 | int close_complete = 0; | |
3211 | ||
3212 | switch (opcode) { | |
3213 | case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED: | |
3214 | case L4_KCQE_OPCODE_VALUE_CLOSE_COMP: | |
3215 | case L4_KCQE_OPCODE_VALUE_RESET_COMP: | |
3216 | if (cnic_ready_to_close(csk, opcode)) | |
3217 | cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE; | |
3218 | break; | |
3219 | case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE: | |
3220 | cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD; | |
3221 | break; | |
3222 | case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD: | |
3223 | close_complete = 1; | |
3224 | break; | |
3225 | } | |
3226 | if (cmd) { | |
3227 | memset(&l5_data, 0, sizeof(l5_data)); | |
3228 | ||
3229 | cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE, | |
3230 | &l5_data); | |
3231 | } else if (close_complete) { | |
3232 | ctx->timestamp = jiffies; | |
3233 | cnic_close_conn(csk); | |
3234 | cnic_cm_upcall(cp, csk, csk->state); | |
3235 | } | |
3236 | } | |
3237 | ||
3238 | static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev) | |
3239 | { | |
3240 | } | |
3241 | ||
3242 | static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev) | |
3243 | { | |
3244 | struct cnic_local *cp = dev->cnic_priv; | |
3245 | int func = CNIC_FUNC(cp); | |
3246 | ||
3247 | cnic_init_bnx2x_mac(dev); | |
3248 | cnic_bnx2x_set_tcp_timestamp(dev, 1); | |
3249 | ||
3250 | CNIC_WR16(dev, BAR_XSTRORM_INTMEM + | |
3251 | XSTORM_ISCSI_LOCAL_VLAN_OFFSET(func), 0); | |
3252 | ||
3253 | CNIC_WR(dev, BAR_XSTRORM_INTMEM + | |
3254 | XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(func), 1); | |
3255 | CNIC_WR(dev, BAR_XSTRORM_INTMEM + | |
3256 | XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(func), | |
3257 | DEF_MAX_DA_COUNT); | |
3258 | ||
3259 | CNIC_WR8(dev, BAR_XSTRORM_INTMEM + | |
3260 | XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(func), DEF_TTL); | |
3261 | CNIC_WR8(dev, BAR_XSTRORM_INTMEM + | |
3262 | XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(func), DEF_TOS); | |
3263 | CNIC_WR8(dev, BAR_XSTRORM_INTMEM + | |
3264 | XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(func), 2); | |
3265 | CNIC_WR(dev, BAR_XSTRORM_INTMEM + | |
3266 | XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(func), DEF_SWS_TIMER); | |
3267 | ||
3268 | CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(func), | |
3269 | DEF_MAX_CWND); | |
3270 | return 0; | |
3271 | } | |
3272 | ||
a4636960 MC |
3273 | static int cnic_cm_open(struct cnic_dev *dev) |
3274 | { | |
3275 | struct cnic_local *cp = dev->cnic_priv; | |
3276 | int err; | |
3277 | ||
3278 | err = cnic_cm_alloc_mem(dev); | |
3279 | if (err) | |
3280 | return err; | |
3281 | ||
3282 | err = cp->start_cm(dev); | |
3283 | ||
3284 | if (err) | |
3285 | goto err_out; | |
3286 | ||
3287 | dev->cm_create = cnic_cm_create; | |
3288 | dev->cm_destroy = cnic_cm_destroy; | |
3289 | dev->cm_connect = cnic_cm_connect; | |
3290 | dev->cm_abort = cnic_cm_abort; | |
3291 | dev->cm_close = cnic_cm_close; | |
3292 | dev->cm_select_dev = cnic_cm_select_dev; | |
3293 | ||
3294 | cp->ulp_handle[CNIC_ULP_L4] = dev; | |
3295 | rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops); | |
3296 | return 0; | |
3297 | ||
3298 | err_out: | |
3299 | cnic_cm_free_mem(dev); | |
3300 | return err; | |
3301 | } | |
3302 | ||
3303 | static int cnic_cm_shutdown(struct cnic_dev *dev) | |
3304 | { | |
3305 | struct cnic_local *cp = dev->cnic_priv; | |
3306 | int i; | |
3307 | ||
3308 | cp->stop_cm(dev); | |
3309 | ||
3310 | if (!cp->csk_tbl) | |
3311 | return 0; | |
3312 | ||
3313 | for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) { | |
3314 | struct cnic_sock *csk = &cp->csk_tbl[i]; | |
3315 | ||
3316 | clear_bit(SK_F_INUSE, &csk->flags); | |
3317 | cnic_cm_cleanup(csk); | |
3318 | } | |
3319 | cnic_cm_free_mem(dev); | |
3320 | ||
3321 | return 0; | |
3322 | } | |
3323 | ||
3324 | static void cnic_init_context(struct cnic_dev *dev, u32 cid) | |
3325 | { | |
3326 | struct cnic_local *cp = dev->cnic_priv; | |
3327 | u32 cid_addr; | |
3328 | int i; | |
3329 | ||
3330 | if (CHIP_NUM(cp) == CHIP_NUM_5709) | |
3331 | return; | |
3332 | ||
3333 | cid_addr = GET_CID_ADDR(cid); | |
3334 | ||
3335 | for (i = 0; i < CTX_SIZE; i += 4) | |
3336 | cnic_ctx_wr(dev, cid_addr, i, 0); | |
3337 | } | |
3338 | ||
3339 | static int cnic_setup_5709_context(struct cnic_dev *dev, int valid) | |
3340 | { | |
3341 | struct cnic_local *cp = dev->cnic_priv; | |
3342 | int ret = 0, i; | |
3343 | u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0; | |
3344 | ||
3345 | if (CHIP_NUM(cp) != CHIP_NUM_5709) | |
3346 | return 0; | |
3347 | ||
3348 | for (i = 0; i < cp->ctx_blks; i++) { | |
3349 | int j; | |
3350 | u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk; | |
3351 | u32 val; | |
3352 | ||
3353 | memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE); | |
3354 | ||
3355 | CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0, | |
3356 | (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit); | |
3357 | CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1, | |
3358 | (u64) cp->ctx_arr[i].mapping >> 32); | |
3359 | CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx | | |
3360 | BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ); | |
3361 | for (j = 0; j < 10; j++) { | |
3362 | ||
3363 | val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL); | |
3364 | if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ)) | |
3365 | break; | |
3366 | udelay(5); | |
3367 | } | |
3368 | if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) { | |
3369 | ret = -EBUSY; | |
3370 | break; | |
3371 | } | |
3372 | } | |
3373 | return ret; | |
3374 | } | |
3375 | ||
3376 | static void cnic_free_irq(struct cnic_dev *dev) | |
3377 | { | |
3378 | struct cnic_local *cp = dev->cnic_priv; | |
3379 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
3380 | ||
3381 | if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { | |
3382 | cp->disable_int_sync(dev); | |
3383 | tasklet_disable(&cp->cnic_irq_task); | |
3384 | free_irq(ethdev->irq_arr[0].vector, dev); | |
3385 | } | |
3386 | } | |
3387 | ||
3388 | static int cnic_init_bnx2_irq(struct cnic_dev *dev) | |
3389 | { | |
3390 | struct cnic_local *cp = dev->cnic_priv; | |
3391 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
3392 | ||
3393 | if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { | |
3394 | int err, i = 0; | |
3395 | int sblk_num = cp->status_blk_num; | |
3396 | u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) + | |
3397 | BNX2_HC_SB_CONFIG_1; | |
3398 | ||
3399 | CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT); | |
3400 | ||
3401 | CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8); | |
3402 | CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220); | |
3403 | CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220); | |
3404 | ||
3405 | cp->bnx2_status_blk = cp->status_blk; | |
3406 | cp->last_status_idx = cp->bnx2_status_blk->status_idx; | |
164165da | 3407 | tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix, |
a4636960 MC |
3408 | (unsigned long) dev); |
3409 | err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, | |
3410 | "cnic", dev); | |
3411 | if (err) { | |
3412 | tasklet_disable(&cp->cnic_irq_task); | |
3413 | return err; | |
3414 | } | |
3415 | while (cp->bnx2_status_blk->status_completion_producer_index && | |
3416 | i < 10) { | |
3417 | CNIC_WR(dev, BNX2_HC_COALESCE_NOW, | |
3418 | 1 << (11 + sblk_num)); | |
3419 | udelay(10); | |
3420 | i++; | |
3421 | barrier(); | |
3422 | } | |
3423 | if (cp->bnx2_status_blk->status_completion_producer_index) { | |
3424 | cnic_free_irq(dev); | |
3425 | goto failed; | |
3426 | } | |
3427 | ||
3428 | } else { | |
3429 | struct status_block *sblk = cp->status_blk; | |
3430 | u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND); | |
3431 | int i = 0; | |
3432 | ||
3433 | while (sblk->status_completion_producer_index && i < 10) { | |
3434 | CNIC_WR(dev, BNX2_HC_COMMAND, | |
3435 | hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT); | |
3436 | udelay(10); | |
3437 | i++; | |
3438 | barrier(); | |
3439 | } | |
3440 | if (sblk->status_completion_producer_index) | |
3441 | goto failed; | |
3442 | ||
3443 | } | |
3444 | return 0; | |
3445 | ||
3446 | failed: | |
ddf79b20 | 3447 | netdev_err(dev->netdev, "KCQ index not resetting to 0\n"); |
a4636960 MC |
3448 | return -EBUSY; |
3449 | } | |
3450 | ||
3451 | static void cnic_enable_bnx2_int(struct cnic_dev *dev) | |
3452 | { | |
3453 | struct cnic_local *cp = dev->cnic_priv; | |
3454 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
3455 | ||
3456 | if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)) | |
3457 | return; | |
3458 | ||
3459 | CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num | | |
3460 | BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx); | |
3461 | } | |
3462 | ||
3463 | static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev) | |
3464 | { | |
3465 | struct cnic_local *cp = dev->cnic_priv; | |
3466 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
3467 | ||
3468 | if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)) | |
3469 | return; | |
3470 | ||
3471 | CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num | | |
3472 | BNX2_PCICFG_INT_ACK_CMD_MASK_INT); | |
3473 | CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD); | |
3474 | synchronize_irq(ethdev->irq_arr[0].vector); | |
3475 | } | |
3476 | ||
3477 | static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev) | |
3478 | { | |
3479 | struct cnic_local *cp = dev->cnic_priv; | |
3480 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
3481 | u32 cid_addr, tx_cid, sb_id; | |
3482 | u32 val, offset0, offset1, offset2, offset3; | |
3483 | int i; | |
3484 | struct tx_bd *txbd; | |
3485 | dma_addr_t buf_map; | |
3486 | struct status_block *s_blk = cp->status_blk; | |
3487 | ||
3488 | sb_id = cp->status_blk_num; | |
3489 | tx_cid = 20; | |
3490 | cnic_init_context(dev, tx_cid); | |
3491 | cnic_init_context(dev, tx_cid + 1); | |
3492 | cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2; | |
3493 | if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { | |
3494 | struct status_block_msix *sblk = cp->status_blk; | |
3495 | ||
3496 | tx_cid = TX_TSS_CID + sb_id - 1; | |
3497 | cnic_init_context(dev, tx_cid); | |
3498 | CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) | | |
3499 | (TX_TSS_CID << 7)); | |
3500 | cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index; | |
3501 | } | |
3502 | cp->tx_cons = *cp->tx_cons_ptr; | |
3503 | ||
3504 | cid_addr = GET_CID_ADDR(tx_cid); | |
3505 | if (CHIP_NUM(cp) == CHIP_NUM_5709) { | |
3506 | u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40; | |
3507 | ||
3508 | for (i = 0; i < PHY_CTX_SIZE; i += 4) | |
3509 | cnic_ctx_wr(dev, cid_addr2, i, 0); | |
3510 | ||
3511 | offset0 = BNX2_L2CTX_TYPE_XI; | |
3512 | offset1 = BNX2_L2CTX_CMD_TYPE_XI; | |
3513 | offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI; | |
3514 | offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI; | |
3515 | } else { | |
3516 | offset0 = BNX2_L2CTX_TYPE; | |
3517 | offset1 = BNX2_L2CTX_CMD_TYPE; | |
3518 | offset2 = BNX2_L2CTX_TBDR_BHADDR_HI; | |
3519 | offset3 = BNX2_L2CTX_TBDR_BHADDR_LO; | |
3520 | } | |
3521 | val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2; | |
3522 | cnic_ctx_wr(dev, cid_addr, offset0, val); | |
3523 | ||
3524 | val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16); | |
3525 | cnic_ctx_wr(dev, cid_addr, offset1, val); | |
3526 | ||
3527 | txbd = (struct tx_bd *) cp->l2_ring; | |
3528 | ||
3529 | buf_map = cp->l2_buf_map; | |
3530 | for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) { | |
3531 | txbd->tx_bd_haddr_hi = (u64) buf_map >> 32; | |
3532 | txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff; | |
3533 | } | |
3534 | val = (u64) cp->l2_ring_map >> 32; | |
3535 | cnic_ctx_wr(dev, cid_addr, offset2, val); | |
3536 | txbd->tx_bd_haddr_hi = val; | |
3537 | ||
3538 | val = (u64) cp->l2_ring_map & 0xffffffff; | |
3539 | cnic_ctx_wr(dev, cid_addr, offset3, val); | |
3540 | txbd->tx_bd_haddr_lo = val; | |
3541 | } | |
3542 | ||
3543 | static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev) | |
3544 | { | |
3545 | struct cnic_local *cp = dev->cnic_priv; | |
3546 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
3547 | u32 cid_addr, sb_id, val, coal_reg, coal_val; | |
3548 | int i; | |
3549 | struct rx_bd *rxbd; | |
3550 | struct status_block *s_blk = cp->status_blk; | |
3551 | ||
3552 | sb_id = cp->status_blk_num; | |
3553 | cnic_init_context(dev, 2); | |
3554 | cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2; | |
3555 | coal_reg = BNX2_HC_COMMAND; | |
3556 | coal_val = CNIC_RD(dev, coal_reg); | |
3557 | if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { | |
3558 | struct status_block_msix *sblk = cp->status_blk; | |
3559 | ||
3560 | cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index; | |
3561 | coal_reg = BNX2_HC_COALESCE_NOW; | |
3562 | coal_val = 1 << (11 + sb_id); | |
3563 | } | |
3564 | i = 0; | |
3565 | while (!(*cp->rx_cons_ptr != 0) && i < 10) { | |
3566 | CNIC_WR(dev, coal_reg, coal_val); | |
3567 | udelay(10); | |
3568 | i++; | |
3569 | barrier(); | |
3570 | } | |
3571 | cp->rx_cons = *cp->rx_cons_ptr; | |
3572 | ||
3573 | cid_addr = GET_CID_ADDR(2); | |
3574 | val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE | | |
3575 | BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8); | |
3576 | cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val); | |
3577 | ||
3578 | if (sb_id == 0) | |
d0549382 | 3579 | val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT; |
a4636960 | 3580 | else |
d0549382 | 3581 | val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id); |
a4636960 MC |
3582 | cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val); |
3583 | ||
3584 | rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE); | |
3585 | for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) { | |
3586 | dma_addr_t buf_map; | |
3587 | int n = (i % cp->l2_rx_ring_size) + 1; | |
3588 | ||
3589 | buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size); | |
3590 | rxbd->rx_bd_len = cp->l2_single_buf_size; | |
3591 | rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END; | |
3592 | rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32; | |
3593 | rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff; | |
3594 | } | |
3595 | val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32; | |
3596 | cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val); | |
3597 | rxbd->rx_bd_haddr_hi = val; | |
3598 | ||
3599 | val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff; | |
3600 | cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val); | |
3601 | rxbd->rx_bd_haddr_lo = val; | |
3602 | ||
3603 | val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD); | |
3604 | cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2)); | |
3605 | } | |
3606 | ||
3607 | static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev) | |
3608 | { | |
3609 | struct kwqe *wqes[1], l2kwqe; | |
3610 | ||
3611 | memset(&l2kwqe, 0, sizeof(l2kwqe)); | |
3612 | wqes[0] = &l2kwqe; | |
3613 | l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) | | |
3614 | (L2_KWQE_OPCODE_VALUE_FLUSH << | |
3615 | KWQE_OPCODE_SHIFT) | 2; | |
3616 | dev->submit_kwqes(dev, wqes, 1); | |
3617 | } | |
3618 | ||
3619 | static void cnic_set_bnx2_mac(struct cnic_dev *dev) | |
3620 | { | |
3621 | struct cnic_local *cp = dev->cnic_priv; | |
3622 | u32 val; | |
3623 | ||
3624 | val = cp->func << 2; | |
3625 | ||
3626 | cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val); | |
3627 | ||
3628 | val = cnic_reg_rd_ind(dev, cp->shmem_base + | |
3629 | BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER); | |
3630 | dev->mac_addr[0] = (u8) (val >> 8); | |
3631 | dev->mac_addr[1] = (u8) val; | |
3632 | ||
3633 | CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val); | |
3634 | ||
3635 | val = cnic_reg_rd_ind(dev, cp->shmem_base + | |
3636 | BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER); | |
3637 | dev->mac_addr[2] = (u8) (val >> 24); | |
3638 | dev->mac_addr[3] = (u8) (val >> 16); | |
3639 | dev->mac_addr[4] = (u8) (val >> 8); | |
3640 | dev->mac_addr[5] = (u8) val; | |
3641 | ||
3642 | CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val); | |
3643 | ||
3644 | val = 4 | BNX2_RPM_SORT_USER2_BC_EN; | |
3645 | if (CHIP_NUM(cp) != CHIP_NUM_5709) | |
3646 | val |= BNX2_RPM_SORT_USER2_PROM_VLAN; | |
3647 | ||
3648 | CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0); | |
3649 | CNIC_WR(dev, BNX2_RPM_SORT_USER2, val); | |
3650 | CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA); | |
3651 | } | |
3652 | ||
3653 | static int cnic_start_bnx2_hw(struct cnic_dev *dev) | |
3654 | { | |
3655 | struct cnic_local *cp = dev->cnic_priv; | |
3656 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
3657 | struct status_block *sblk = cp->status_blk; | |
3658 | u32 val; | |
3659 | int err; | |
3660 | ||
3661 | cnic_set_bnx2_mac(dev); | |
3662 | ||
3663 | val = CNIC_RD(dev, BNX2_MQ_CONFIG); | |
3664 | val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE; | |
3665 | if (BCM_PAGE_BITS > 12) | |
3666 | val |= (12 - 8) << 4; | |
3667 | else | |
3668 | val |= (BCM_PAGE_BITS - 8) << 4; | |
3669 | ||
3670 | CNIC_WR(dev, BNX2_MQ_CONFIG, val); | |
3671 | ||
3672 | CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8); | |
3673 | CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220); | |
3674 | CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220); | |
3675 | ||
3676 | err = cnic_setup_5709_context(dev, 1); | |
3677 | if (err) | |
3678 | return err; | |
3679 | ||
3680 | cnic_init_context(dev, KWQ_CID); | |
3681 | cnic_init_context(dev, KCQ_CID); | |
3682 | ||
3683 | cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID); | |
3684 | cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX; | |
3685 | ||
3686 | cp->max_kwq_idx = MAX_KWQ_IDX; | |
3687 | cp->kwq_prod_idx = 0; | |
3688 | cp->kwq_con_idx = 0; | |
3689 | cp->cnic_local_flags |= CNIC_LCL_FL_KWQ_INIT; | |
3690 | ||
3691 | if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708) | |
3692 | cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15; | |
3693 | else | |
3694 | cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index; | |
3695 | ||
3696 | /* Initialize the kernel work queue context. */ | |
3697 | val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE | | |
3698 | (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ; | |
3699 | cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val); | |
3700 | ||
3701 | val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16; | |
3702 | cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val); | |
3703 | ||
3704 | val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT; | |
3705 | cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val); | |
3706 | ||
3707 | val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32); | |
3708 | cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val); | |
3709 | ||
3710 | val = (u32) cp->kwq_info.pgtbl_map; | |
3711 | cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val); | |
3712 | ||
3713 | cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID); | |
3714 | cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX; | |
3715 | ||
3716 | cp->kcq_prod_idx = 0; | |
3717 | ||
3718 | /* Initialize the kernel complete queue context. */ | |
3719 | val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE | | |
3720 | (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ; | |
3721 | cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val); | |
3722 | ||
3723 | val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16; | |
3724 | cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val); | |
3725 | ||
3726 | val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT; | |
3727 | cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val); | |
3728 | ||
3729 | val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32); | |
3730 | cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val); | |
3731 | ||
3732 | val = (u32) cp->kcq_info.pgtbl_map; | |
3733 | cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val); | |
3734 | ||
3735 | cp->int_num = 0; | |
3736 | if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { | |
3737 | u32 sb_id = cp->status_blk_num; | |
d0549382 | 3738 | u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id); |
a4636960 MC |
3739 | |
3740 | cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT; | |
3741 | cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb); | |
3742 | cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb); | |
3743 | } | |
3744 | ||
3745 | /* Enable Commnad Scheduler notification when we write to the | |
3746 | * host producer index of the kernel contexts. */ | |
3747 | CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2); | |
3748 | ||
3749 | /* Enable Command Scheduler notification when we write to either | |
3750 | * the Send Queue or Receive Queue producer indexes of the kernel | |
3751 | * bypass contexts. */ | |
3752 | CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7); | |
3753 | CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7); | |
3754 | ||
3755 | /* Notify COM when the driver post an application buffer. */ | |
3756 | CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000); | |
3757 | ||
3758 | /* Set the CP and COM doorbells. These two processors polls the | |
3759 | * doorbell for a non zero value before running. This must be done | |
3760 | * after setting up the kernel queue contexts. */ | |
3761 | cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1); | |
3762 | cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1); | |
3763 | ||
3764 | cnic_init_bnx2_tx_ring(dev); | |
3765 | cnic_init_bnx2_rx_ring(dev); | |
3766 | ||
3767 | err = cnic_init_bnx2_irq(dev); | |
3768 | if (err) { | |
ddf79b20 | 3769 | netdev_err(dev->netdev, "cnic_init_irq failed\n"); |
a4636960 MC |
3770 | cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0); |
3771 | cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0); | |
3772 | return err; | |
3773 | } | |
3774 | ||
3775 | return 0; | |
3776 | } | |
3777 | ||
71034ba8 MC |
3778 | static void cnic_setup_bnx2x_context(struct cnic_dev *dev) |
3779 | { | |
3780 | struct cnic_local *cp = dev->cnic_priv; | |
3781 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
3782 | u32 start_offset = ethdev->ctx_tbl_offset; | |
3783 | int i; | |
3784 | ||
3785 | for (i = 0; i < cp->ctx_blks; i++) { | |
3786 | struct cnic_ctx *ctx = &cp->ctx_arr[i]; | |
3787 | dma_addr_t map = ctx->mapping; | |
3788 | ||
3789 | if (cp->ctx_align) { | |
3790 | unsigned long mask = cp->ctx_align - 1; | |
3791 | ||
3792 | map = (map + mask) & ~mask; | |
3793 | } | |
3794 | ||
3795 | cnic_ctx_tbl_wr(dev, start_offset + i, map); | |
3796 | } | |
3797 | } | |
3798 | ||
3799 | static int cnic_init_bnx2x_irq(struct cnic_dev *dev) | |
3800 | { | |
3801 | struct cnic_local *cp = dev->cnic_priv; | |
3802 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
3803 | int err = 0; | |
3804 | ||
164165da | 3805 | tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh, |
71034ba8 MC |
3806 | (unsigned long) dev); |
3807 | if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { | |
3808 | err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, | |
3809 | "cnic", dev); | |
3810 | if (err) | |
3811 | tasklet_disable(&cp->cnic_irq_task); | |
3812 | } | |
3813 | return err; | |
3814 | } | |
3815 | ||
3816 | static void cnic_enable_bnx2x_int(struct cnic_dev *dev) | |
3817 | { | |
3818 | struct cnic_local *cp = dev->cnic_priv; | |
3819 | u8 sb_id = cp->status_blk_num; | |
3820 | int port = CNIC_PORT(cp); | |
3821 | ||
3822 | CNIC_WR8(dev, BAR_CSTRORM_INTMEM + | |
3823 | CSTORM_SB_HC_TIMEOUT_C_OFFSET(port, sb_id, | |
3824 | HC_INDEX_C_ISCSI_EQ_CONS), | |
3825 | 64 / 12); | |
3826 | CNIC_WR16(dev, BAR_CSTRORM_INTMEM + | |
3827 | CSTORM_SB_HC_DISABLE_C_OFFSET(port, sb_id, | |
3828 | HC_INDEX_C_ISCSI_EQ_CONS), 0); | |
3829 | } | |
3830 | ||
3831 | static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev) | |
3832 | { | |
3833 | } | |
3834 | ||
3835 | static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev) | |
3836 | { | |
3837 | struct cnic_local *cp = dev->cnic_priv; | |
3838 | union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) cp->l2_ring; | |
3839 | struct eth_context *context; | |
3840 | struct regpair context_addr; | |
3841 | dma_addr_t buf_map; | |
3842 | int func = CNIC_FUNC(cp); | |
3843 | int port = CNIC_PORT(cp); | |
3844 | int i; | |
3845 | int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp)); | |
3846 | u32 val; | |
3847 | ||
3848 | memset(txbd, 0, BCM_PAGE_SIZE); | |
3849 | ||
3850 | buf_map = cp->l2_buf_map; | |
3851 | for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) { | |
3852 | struct eth_tx_start_bd *start_bd = &txbd->start_bd; | |
3853 | struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd); | |
3854 | ||
3855 | start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32); | |
3856 | start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff); | |
3857 | reg_bd->addr_hi = start_bd->addr_hi; | |
3858 | reg_bd->addr_lo = start_bd->addr_lo + 0x10; | |
3859 | start_bd->nbytes = cpu_to_le16(0x10); | |
3860 | start_bd->nbd = cpu_to_le16(3); | |
3861 | start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD; | |
3862 | start_bd->general_data = (UNICAST_ADDRESS << | |
3863 | ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT); | |
3864 | start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT); | |
3865 | ||
3866 | } | |
3867 | context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 1, &context_addr); | |
3868 | ||
3869 | val = (u64) cp->l2_ring_map >> 32; | |
3870 | txbd->next_bd.addr_hi = cpu_to_le32(val); | |
3871 | ||
3872 | context->xstorm_st_context.tx_bd_page_base_hi = val; | |
3873 | ||
3874 | val = (u64) cp->l2_ring_map & 0xffffffff; | |
3875 | txbd->next_bd.addr_lo = cpu_to_le32(val); | |
3876 | ||
3877 | context->xstorm_st_context.tx_bd_page_base_lo = val; | |
3878 | ||
3879 | context->cstorm_st_context.sb_index_number = | |
3880 | HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS; | |
3881 | context->cstorm_st_context.status_block_id = BNX2X_DEF_SB_ID; | |
3882 | ||
3883 | context->xstorm_st_context.statistics_data = (cli | | |
3884 | XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE); | |
3885 | ||
3886 | context->xstorm_ag_context.cdu_reserved = | |
3887 | CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func), | |
3888 | CDU_REGION_NUMBER_XCM_AG, | |
3889 | ETH_CONNECTION_TYPE); | |
3890 | ||
3891 | /* reset xstorm per client statistics */ | |
3892 | val = BAR_XSTRORM_INTMEM + | |
3893 | XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli); | |
3894 | for (i = 0; i < sizeof(struct xstorm_per_client_stats) / 4; i++) | |
3895 | CNIC_WR(dev, val + i * 4, 0); | |
3896 | ||
3897 | cp->tx_cons_ptr = | |
3898 | &cp->bnx2x_def_status_blk->c_def_status_block.index_values[ | |
3899 | HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS]; | |
3900 | } | |
3901 | ||
3902 | static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev) | |
3903 | { | |
3904 | struct cnic_local *cp = dev->cnic_priv; | |
3905 | struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (cp->l2_ring + | |
3906 | BCM_PAGE_SIZE); | |
3907 | struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *) | |
3908 | (cp->l2_ring + (2 * BCM_PAGE_SIZE)); | |
3909 | struct eth_context *context; | |
3910 | struct regpair context_addr; | |
3911 | int i; | |
3912 | int port = CNIC_PORT(cp); | |
3913 | int func = CNIC_FUNC(cp); | |
3914 | int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp)); | |
3915 | u32 val; | |
3916 | struct tstorm_eth_client_config tstorm_client = {0}; | |
3917 | ||
3918 | for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) { | |
3919 | dma_addr_t buf_map; | |
3920 | int n = (i % cp->l2_rx_ring_size) + 1; | |
3921 | ||
3922 | buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size); | |
3923 | rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32); | |
3924 | rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff); | |
3925 | } | |
3926 | context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 0, &context_addr); | |
3927 | ||
3928 | val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32; | |
3929 | rxbd->addr_hi = cpu_to_le32(val); | |
3930 | ||
3931 | context->ustorm_st_context.common.bd_page_base_hi = val; | |
3932 | ||
3933 | val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff; | |
3934 | rxbd->addr_lo = cpu_to_le32(val); | |
3935 | ||
3936 | context->ustorm_st_context.common.bd_page_base_lo = val; | |
3937 | ||
3938 | context->ustorm_st_context.common.sb_index_numbers = | |
3939 | BNX2X_ISCSI_RX_SB_INDEX_NUM; | |
3940 | context->ustorm_st_context.common.clientId = cli; | |
3941 | context->ustorm_st_context.common.status_block_id = BNX2X_DEF_SB_ID; | |
3942 | context->ustorm_st_context.common.flags = | |
3943 | USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_STATISTICS; | |
3944 | context->ustorm_st_context.common.statistics_counter_id = cli; | |
3945 | context->ustorm_st_context.common.mc_alignment_log_size = 0; | |
3946 | context->ustorm_st_context.common.bd_buff_size = | |
3947 | cp->l2_single_buf_size; | |
3948 | ||
3949 | context->ustorm_ag_context.cdu_usage = | |
3950 | CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func), | |
3951 | CDU_REGION_NUMBER_UCM_AG, | |
3952 | ETH_CONNECTION_TYPE); | |
3953 | ||
3954 | rxcqe += BNX2X_MAX_RCQ_DESC_CNT; | |
3955 | val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) >> 32; | |
3956 | rxcqe->addr_hi = cpu_to_le32(val); | |
3957 | ||
3958 | CNIC_WR(dev, BAR_USTRORM_INTMEM + | |
3959 | USTORM_CQE_PAGE_BASE_OFFSET(port, cli) + 4, val); | |
3960 | ||
3961 | CNIC_WR(dev, BAR_USTRORM_INTMEM + | |
3962 | USTORM_CQE_PAGE_NEXT_OFFSET(port, cli) + 4, val); | |
3963 | ||
3964 | val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff; | |
3965 | rxcqe->addr_lo = cpu_to_le32(val); | |
3966 | ||
3967 | CNIC_WR(dev, BAR_USTRORM_INTMEM + | |
3968 | USTORM_CQE_PAGE_BASE_OFFSET(port, cli), val); | |
3969 | ||
3970 | CNIC_WR(dev, BAR_USTRORM_INTMEM + | |
3971 | USTORM_CQE_PAGE_NEXT_OFFSET(port, cli), val); | |
3972 | ||
3973 | /* client tstorm info */ | |
3974 | tstorm_client.mtu = cp->l2_single_buf_size - 14; | |
3975 | tstorm_client.config_flags = | |
3976 | (TSTORM_ETH_CLIENT_CONFIG_E1HOV_REM_ENABLE | | |
3977 | TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE); | |
3978 | tstorm_client.statistics_counter_id = cli; | |
3979 | ||
3980 | CNIC_WR(dev, BAR_TSTRORM_INTMEM + | |
3981 | TSTORM_CLIENT_CONFIG_OFFSET(port, cli), | |
3982 | ((u32 *)&tstorm_client)[0]); | |
3983 | CNIC_WR(dev, BAR_TSTRORM_INTMEM + | |
3984 | TSTORM_CLIENT_CONFIG_OFFSET(port, cli) + 4, | |
3985 | ((u32 *)&tstorm_client)[1]); | |
3986 | ||
3987 | /* reset tstorm per client statistics */ | |
3988 | val = BAR_TSTRORM_INTMEM + | |
3989 | TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli); | |
3990 | for (i = 0; i < sizeof(struct tstorm_per_client_stats) / 4; i++) | |
3991 | CNIC_WR(dev, val + i * 4, 0); | |
3992 | ||
3993 | /* reset ustorm per client statistics */ | |
3994 | val = BAR_USTRORM_INTMEM + | |
3995 | USTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli); | |
3996 | for (i = 0; i < sizeof(struct ustorm_per_client_stats) / 4; i++) | |
3997 | CNIC_WR(dev, val + i * 4, 0); | |
3998 | ||
3999 | cp->rx_cons_ptr = | |
4000 | &cp->bnx2x_def_status_blk->u_def_status_block.index_values[ | |
4001 | HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS]; | |
4002 | } | |
4003 | ||
4004 | static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev) | |
4005 | { | |
4006 | struct cnic_local *cp = dev->cnic_priv; | |
4007 | u32 base, addr, val; | |
4008 | int port = CNIC_PORT(cp); | |
4009 | ||
4010 | dev->max_iscsi_conn = 0; | |
4011 | base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR); | |
4012 | if (base < 0xa0000 || base >= 0xc0000) | |
4013 | return; | |
4014 | ||
dd2e4dbc | 4015 | addr = BNX2X_SHMEM_ADDR(base, |
71034ba8 MC |
4016 | dev_info.port_hw_config[port].iscsi_mac_upper); |
4017 | ||
dd2e4dbc MC |
4018 | val = CNIC_RD(dev, addr); |
4019 | ||
71034ba8 MC |
4020 | dev->mac_addr[0] = (u8) (val >> 8); |
4021 | dev->mac_addr[1] = (u8) val; | |
4022 | ||
dd2e4dbc | 4023 | addr = BNX2X_SHMEM_ADDR(base, |
71034ba8 MC |
4024 | dev_info.port_hw_config[port].iscsi_mac_lower); |
4025 | ||
dd2e4dbc MC |
4026 | val = CNIC_RD(dev, addr); |
4027 | ||
71034ba8 MC |
4028 | dev->mac_addr[2] = (u8) (val >> 24); |
4029 | dev->mac_addr[3] = (u8) (val >> 16); | |
4030 | dev->mac_addr[4] = (u8) (val >> 8); | |
4031 | dev->mac_addr[5] = (u8) val; | |
4032 | ||
4033 | addr = BNX2X_SHMEM_ADDR(base, validity_map[port]); | |
4034 | val = CNIC_RD(dev, addr); | |
4035 | ||
4036 | if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) { | |
4037 | u16 val16; | |
4038 | ||
4039 | addr = BNX2X_SHMEM_ADDR(base, | |
4040 | drv_lic_key[port].max_iscsi_init_conn); | |
4041 | val16 = CNIC_RD16(dev, addr); | |
4042 | ||
4043 | if (val16) | |
4044 | val16 ^= 0x1e1e; | |
4045 | dev->max_iscsi_conn = val16; | |
4046 | } | |
4047 | if (BNX2X_CHIP_IS_E1H(cp->chip_id)) { | |
4048 | int func = CNIC_FUNC(cp); | |
4049 | ||
4050 | addr = BNX2X_SHMEM_ADDR(base, | |
4051 | mf_cfg.func_mf_config[func].e1hov_tag); | |
4052 | val = CNIC_RD(dev, addr); | |
4053 | val &= FUNC_MF_CFG_E1HOV_TAG_MASK; | |
4054 | if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) { | |
4055 | addr = BNX2X_SHMEM_ADDR(base, | |
4056 | mf_cfg.func_mf_config[func].config); | |
4057 | val = CNIC_RD(dev, addr); | |
4058 | val &= FUNC_MF_CFG_PROTOCOL_MASK; | |
4059 | if (val != FUNC_MF_CFG_PROTOCOL_ISCSI) | |
4060 | dev->max_iscsi_conn = 0; | |
4061 | } | |
4062 | } | |
4063 | } | |
4064 | ||
4065 | static int cnic_start_bnx2x_hw(struct cnic_dev *dev) | |
4066 | { | |
4067 | struct cnic_local *cp = dev->cnic_priv; | |
4068 | int func = CNIC_FUNC(cp), ret, i; | |
4069 | int port = CNIC_PORT(cp); | |
4070 | u16 eq_idx; | |
4071 | u8 sb_id = cp->status_blk_num; | |
4072 | ||
4073 | ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ, | |
4074 | BNX2X_ISCSI_START_CID); | |
4075 | ||
4076 | if (ret) | |
4077 | return -ENOMEM; | |
4078 | ||
4079 | cp->kcq_io_addr = BAR_CSTRORM_INTMEM + | |
4080 | CSTORM_ISCSI_EQ_PROD_OFFSET(func, 0); | |
4081 | cp->kcq_prod_idx = 0; | |
4082 | ||
4083 | cnic_get_bnx2x_iscsi_info(dev); | |
4084 | ||
4085 | /* Only 1 EQ */ | |
4086 | CNIC_WR16(dev, cp->kcq_io_addr, MAX_KCQ_IDX); | |
4087 | CNIC_WR(dev, BAR_CSTRORM_INTMEM + | |
4088 | CSTORM_ISCSI_EQ_CONS_OFFSET(func, 0), 0); | |
4089 | CNIC_WR(dev, BAR_CSTRORM_INTMEM + | |
4090 | CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0), | |
4091 | cp->kcq_info.pg_map_arr[1] & 0xffffffff); | |
4092 | CNIC_WR(dev, BAR_CSTRORM_INTMEM + | |
4093 | CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0) + 4, | |
4094 | (u64) cp->kcq_info.pg_map_arr[1] >> 32); | |
4095 | CNIC_WR(dev, BAR_CSTRORM_INTMEM + | |
4096 | CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0), | |
4097 | cp->kcq_info.pg_map_arr[0] & 0xffffffff); | |
4098 | CNIC_WR(dev, BAR_CSTRORM_INTMEM + | |
4099 | CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0) + 4, | |
4100 | (u64) cp->kcq_info.pg_map_arr[0] >> 32); | |
4101 | CNIC_WR8(dev, BAR_CSTRORM_INTMEM + | |
4102 | CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(func, 0), 1); | |
4103 | CNIC_WR16(dev, BAR_CSTRORM_INTMEM + | |
4104 | CSTORM_ISCSI_EQ_SB_NUM_OFFSET(func, 0), cp->status_blk_num); | |
4105 | CNIC_WR8(dev, BAR_CSTRORM_INTMEM + | |
4106 | CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(func, 0), | |
4107 | HC_INDEX_C_ISCSI_EQ_CONS); | |
4108 | ||
4109 | for (i = 0; i < cp->conn_buf_info.num_pages; i++) { | |
4110 | CNIC_WR(dev, BAR_TSTRORM_INTMEM + | |
4111 | TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i), | |
4112 | cp->conn_buf_info.pgtbl[2 * i]); | |
4113 | CNIC_WR(dev, BAR_TSTRORM_INTMEM + | |
4114 | TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i) + 4, | |
4115 | cp->conn_buf_info.pgtbl[(2 * i) + 1]); | |
4116 | } | |
4117 | ||
4118 | CNIC_WR(dev, BAR_USTRORM_INTMEM + | |
4119 | USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func), | |
4120 | cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff); | |
4121 | CNIC_WR(dev, BAR_USTRORM_INTMEM + | |
4122 | USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func) + 4, | |
4123 | (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32); | |
4124 | ||
4125 | cnic_setup_bnx2x_context(dev); | |
4126 | ||
4127 | eq_idx = CNIC_RD16(dev, BAR_CSTRORM_INTMEM + | |
4128 | CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) + | |
4129 | offsetof(struct cstorm_status_block_c, | |
4130 | index_values[HC_INDEX_C_ISCSI_EQ_CONS])); | |
4131 | if (eq_idx != 0) { | |
ddf79b20 | 4132 | netdev_err(dev->netdev, "EQ cons index %x != 0\n", eq_idx); |
71034ba8 MC |
4133 | return -EBUSY; |
4134 | } | |
4135 | ret = cnic_init_bnx2x_irq(dev); | |
4136 | if (ret) | |
4137 | return ret; | |
4138 | ||
4139 | cnic_init_bnx2x_tx_ring(dev); | |
4140 | cnic_init_bnx2x_rx_ring(dev); | |
4141 | ||
4142 | return 0; | |
4143 | } | |
4144 | ||
86b53606 MC |
4145 | static void cnic_init_rings(struct cnic_dev *dev) |
4146 | { | |
4147 | if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) { | |
4148 | cnic_init_bnx2_tx_ring(dev); | |
4149 | cnic_init_bnx2_rx_ring(dev); | |
71034ba8 MC |
4150 | } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) { |
4151 | struct cnic_local *cp = dev->cnic_priv; | |
71034ba8 MC |
4152 | u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp)); |
4153 | union l5cm_specific_data l5_data; | |
4154 | struct ustorm_eth_rx_producers rx_prods = {0}; | |
c7596b79 | 4155 | u32 off, i; |
71034ba8 MC |
4156 | |
4157 | rx_prods.bd_prod = 0; | |
4158 | rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT; | |
4159 | barrier(); | |
4160 | ||
c7596b79 | 4161 | off = BAR_USTRORM_INTMEM + |
71034ba8 MC |
4162 | USTORM_RX_PRODS_OFFSET(CNIC_PORT(cp), cli); |
4163 | ||
4164 | for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++) | |
c7596b79 | 4165 | CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]); |
71034ba8 MC |
4166 | |
4167 | cnic_init_bnx2x_tx_ring(dev); | |
4168 | cnic_init_bnx2x_rx_ring(dev); | |
4169 | ||
4170 | l5_data.phy_address.lo = cli; | |
4171 | l5_data.phy_address.hi = 0; | |
4172 | cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP, | |
4173 | BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data); | |
4174 | cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 1); | |
86b53606 MC |
4175 | } |
4176 | } | |
4177 | ||
4178 | static void cnic_shutdown_rings(struct cnic_dev *dev) | |
4179 | { | |
4180 | if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) { | |
4181 | cnic_shutdown_bnx2_rx_ring(dev); | |
71034ba8 MC |
4182 | } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) { |
4183 | struct cnic_local *cp = dev->cnic_priv; | |
4184 | u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp)); | |
8b065b67 | 4185 | union l5cm_specific_data l5_data; |
71034ba8 MC |
4186 | |
4187 | cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 0); | |
8b065b67 MC |
4188 | |
4189 | l5_data.phy_address.lo = cli; | |
4190 | l5_data.phy_address.hi = 0; | |
4191 | cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT, | |
4192 | BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data); | |
4193 | msleep(10); | |
1bcdc32c MC |
4194 | |
4195 | memset(&l5_data, 0, sizeof(l5_data)); | |
4196 | cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL, | |
4197 | BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE | | |
4198 | (1 << SPE_HDR_COMMON_RAMROD_SHIFT), &l5_data); | |
4199 | msleep(10); | |
86b53606 MC |
4200 | } |
4201 | } | |
4202 | ||
a3059b12 | 4203 | static int cnic_register_netdev(struct cnic_dev *dev) |
a4636960 MC |
4204 | { |
4205 | struct cnic_local *cp = dev->cnic_priv; | |
4206 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
4207 | int err; | |
4208 | ||
a3059b12 MC |
4209 | if (!ethdev) |
4210 | return -ENODEV; | |
4211 | ||
4212 | if (ethdev->drv_state & CNIC_DRV_STATE_REGD) | |
4213 | return 0; | |
a4636960 MC |
4214 | |
4215 | err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev); | |
a3059b12 | 4216 | if (err) |
ddf79b20 | 4217 | netdev_err(dev->netdev, "register_cnic failed\n"); |
a3059b12 MC |
4218 | |
4219 | return err; | |
4220 | } | |
4221 | ||
4222 | static void cnic_unregister_netdev(struct cnic_dev *dev) | |
4223 | { | |
4224 | struct cnic_local *cp = dev->cnic_priv; | |
4225 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
4226 | ||
4227 | if (!ethdev) | |
4228 | return; | |
4229 | ||
4230 | ethdev->drv_unregister_cnic(dev->netdev); | |
4231 | } | |
4232 | ||
4233 | static int cnic_start_hw(struct cnic_dev *dev) | |
4234 | { | |
4235 | struct cnic_local *cp = dev->cnic_priv; | |
4236 | struct cnic_eth_dev *ethdev = cp->ethdev; | |
4237 | int err; | |
4238 | ||
4239 | if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) | |
4240 | return -EALREADY; | |
a4636960 MC |
4241 | |
4242 | dev->regview = ethdev->io_base; | |
4243 | cp->chip_id = ethdev->chip_id; | |
4244 | pci_dev_get(dev->pcidev); | |
4245 | cp->func = PCI_FUNC(dev->pcidev->devfn); | |
4246 | cp->status_blk = ethdev->irq_arr[0].status_blk; | |
4247 | cp->status_blk_num = ethdev->irq_arr[0].status_blk_num; | |
4248 | ||
4249 | err = cp->alloc_resc(dev); | |
4250 | if (err) { | |
ddf79b20 | 4251 | netdev_err(dev->netdev, "allocate resource failure\n"); |
a4636960 MC |
4252 | goto err1; |
4253 | } | |
4254 | ||
4255 | err = cp->start_hw(dev); | |
4256 | if (err) | |
4257 | goto err1; | |
4258 | ||
4259 | err = cnic_cm_open(dev); | |
4260 | if (err) | |
4261 | goto err1; | |
4262 | ||
4263 | set_bit(CNIC_F_CNIC_UP, &dev->flags); | |
4264 | ||
4265 | cp->enable_int(dev); | |
4266 | ||
4267 | return 0; | |
4268 | ||
4269 | err1: | |
a4636960 MC |
4270 | cp->free_resc(dev); |
4271 | pci_dev_put(dev->pcidev); | |
a4636960 MC |
4272 | return err; |
4273 | } | |
4274 | ||
4275 | static void cnic_stop_bnx2_hw(struct cnic_dev *dev) | |
4276 | { | |
a4636960 MC |
4277 | cnic_disable_bnx2_int_sync(dev); |
4278 | ||
4279 | cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0); | |
4280 | cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0); | |
4281 | ||
4282 | cnic_init_context(dev, KWQ_CID); | |
4283 | cnic_init_context(dev, KCQ_CID); | |
4284 | ||
4285 | cnic_setup_5709_context(dev, 0); | |
4286 | cnic_free_irq(dev); | |
4287 | ||
a4636960 MC |
4288 | cnic_free_resc(dev); |
4289 | } | |
4290 | ||
71034ba8 MC |
4291 | |
4292 | static void cnic_stop_bnx2x_hw(struct cnic_dev *dev) | |
4293 | { | |
4294 | struct cnic_local *cp = dev->cnic_priv; | |
4295 | u8 sb_id = cp->status_blk_num; | |
4296 | int port = CNIC_PORT(cp); | |
4297 | ||
4298 | cnic_free_irq(dev); | |
4299 | CNIC_WR16(dev, BAR_CSTRORM_INTMEM + | |
4300 | CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) + | |
4301 | offsetof(struct cstorm_status_block_c, | |
4302 | index_values[HC_INDEX_C_ISCSI_EQ_CONS]), | |
4303 | 0); | |
4e9c4fd3 MC |
4304 | CNIC_WR(dev, BAR_CSTRORM_INTMEM + |
4305 | CSTORM_ISCSI_EQ_CONS_OFFSET(cp->func, 0), 0); | |
4306 | CNIC_WR16(dev, cp->kcq_io_addr, 0); | |
71034ba8 MC |
4307 | cnic_free_resc(dev); |
4308 | } | |
4309 | ||
a4636960 MC |
4310 | static void cnic_stop_hw(struct cnic_dev *dev) |
4311 | { | |
4312 | if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) { | |
4313 | struct cnic_local *cp = dev->cnic_priv; | |
4314 | ||
4315 | clear_bit(CNIC_F_CNIC_UP, &dev->flags); | |
4316 | rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL); | |
4317 | synchronize_rcu(); | |
4318 | cnic_cm_shutdown(dev); | |
4319 | cp->stop_hw(dev); | |
4320 | pci_dev_put(dev->pcidev); | |
4321 | } | |
4322 | } | |
4323 | ||
4324 | static void cnic_free_dev(struct cnic_dev *dev) | |
4325 | { | |
4326 | int i = 0; | |
4327 | ||
4328 | while ((atomic_read(&dev->ref_count) != 0) && i < 10) { | |
4329 | msleep(100); | |
4330 | i++; | |
4331 | } | |
4332 | if (atomic_read(&dev->ref_count) != 0) | |
ddf79b20 | 4333 | netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n"); |
a4636960 | 4334 | |
ddf79b20 | 4335 | netdev_info(dev->netdev, "Removed CNIC device\n"); |
a4636960 MC |
4336 | dev_put(dev->netdev); |
4337 | kfree(dev); | |
4338 | } | |
4339 | ||
4340 | static struct cnic_dev *cnic_alloc_dev(struct net_device *dev, | |
4341 | struct pci_dev *pdev) | |
4342 | { | |
4343 | struct cnic_dev *cdev; | |
4344 | struct cnic_local *cp; | |
4345 | int alloc_size; | |
4346 | ||
4347 | alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local); | |
4348 | ||
4349 | cdev = kzalloc(alloc_size , GFP_KERNEL); | |
4350 | if (cdev == NULL) { | |
ddf79b20 | 4351 | netdev_err(dev, "allocate dev struct failure\n"); |
a4636960 MC |
4352 | return NULL; |
4353 | } | |
4354 | ||
4355 | cdev->netdev = dev; | |
4356 | cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev); | |
4357 | cdev->register_device = cnic_register_device; | |
4358 | cdev->unregister_device = cnic_unregister_device; | |
4359 | cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv; | |
4360 | ||
4361 | cp = cdev->cnic_priv; | |
4362 | cp->dev = cdev; | |
4363 | cp->uio_dev = -1; | |
4364 | cp->l2_single_buf_size = 0x400; | |
4365 | cp->l2_rx_ring_size = 3; | |
4366 | ||
4367 | spin_lock_init(&cp->cnic_ulp_lock); | |
4368 | ||
ddf79b20 | 4369 | netdev_info(dev, "Added CNIC device\n"); |
a4636960 MC |
4370 | |
4371 | return cdev; | |
4372 | } | |
4373 | ||
4374 | static struct cnic_dev *init_bnx2_cnic(struct net_device *dev) | |
4375 | { | |
4376 | struct pci_dev *pdev; | |
4377 | struct cnic_dev *cdev; | |
4378 | struct cnic_local *cp; | |
4379 | struct cnic_eth_dev *ethdev = NULL; | |
e2ee3616 | 4380 | struct cnic_eth_dev *(*probe)(struct net_device *) = NULL; |
a4636960 | 4381 | |
e2ee3616 | 4382 | probe = symbol_get(bnx2_cnic_probe); |
a4636960 MC |
4383 | if (probe) { |
4384 | ethdev = (*probe)(dev); | |
64c64608 | 4385 | symbol_put(bnx2_cnic_probe); |
a4636960 MC |
4386 | } |
4387 | if (!ethdev) | |
4388 | return NULL; | |
4389 | ||
4390 | pdev = ethdev->pdev; | |
4391 | if (!pdev) | |
4392 | return NULL; | |
4393 | ||
4394 | dev_hold(dev); | |
4395 | pci_dev_get(pdev); | |
4396 | if (pdev->device == PCI_DEVICE_ID_NX2_5709 || | |
4397 | pdev->device == PCI_DEVICE_ID_NX2_5709S) { | |
4398 | u8 rev; | |
4399 | ||
4400 | pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); | |
4401 | if (rev < 0x10) { | |
4402 | pci_dev_put(pdev); | |
4403 | goto cnic_err; | |
4404 | } | |
4405 | } | |
4406 | pci_dev_put(pdev); | |
4407 | ||
4408 | cdev = cnic_alloc_dev(dev, pdev); | |
4409 | if (cdev == NULL) | |
4410 | goto cnic_err; | |
4411 | ||
4412 | set_bit(CNIC_F_BNX2_CLASS, &cdev->flags); | |
4413 | cdev->submit_kwqes = cnic_submit_bnx2_kwqes; | |
4414 | ||
4415 | cp = cdev->cnic_priv; | |
4416 | cp->ethdev = ethdev; | |
4417 | cdev->pcidev = pdev; | |
4418 | ||
4419 | cp->cnic_ops = &cnic_bnx2_ops; | |
4420 | cp->start_hw = cnic_start_bnx2_hw; | |
4421 | cp->stop_hw = cnic_stop_bnx2_hw; | |
4422 | cp->setup_pgtbl = cnic_setup_page_tbl; | |
4423 | cp->alloc_resc = cnic_alloc_bnx2_resc; | |
4424 | cp->free_resc = cnic_free_resc; | |
4425 | cp->start_cm = cnic_cm_init_bnx2_hw; | |
4426 | cp->stop_cm = cnic_cm_stop_bnx2_hw; | |
4427 | cp->enable_int = cnic_enable_bnx2_int; | |
4428 | cp->disable_int_sync = cnic_disable_bnx2_int_sync; | |
4429 | cp->close_conn = cnic_close_bnx2_conn; | |
4430 | cp->next_idx = cnic_bnx2_next_idx; | |
4431 | cp->hw_idx = cnic_bnx2_hw_idx; | |
4432 | return cdev; | |
4433 | ||
4434 | cnic_err: | |
4435 | dev_put(dev); | |
4436 | return NULL; | |
4437 | } | |
4438 | ||
71034ba8 MC |
4439 | static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev) |
4440 | { | |
4441 | struct pci_dev *pdev; | |
4442 | struct cnic_dev *cdev; | |
4443 | struct cnic_local *cp; | |
4444 | struct cnic_eth_dev *ethdev = NULL; | |
4445 | struct cnic_eth_dev *(*probe)(struct net_device *) = NULL; | |
4446 | ||
4447 | probe = symbol_get(bnx2x_cnic_probe); | |
4448 | if (probe) { | |
4449 | ethdev = (*probe)(dev); | |
4450 | symbol_put(bnx2x_cnic_probe); | |
4451 | } | |
4452 | if (!ethdev) | |
4453 | return NULL; | |
4454 | ||
4455 | pdev = ethdev->pdev; | |
4456 | if (!pdev) | |
4457 | return NULL; | |
4458 | ||
4459 | dev_hold(dev); | |
4460 | cdev = cnic_alloc_dev(dev, pdev); | |
4461 | if (cdev == NULL) { | |
4462 | dev_put(dev); | |
4463 | return NULL; | |
4464 | } | |
4465 | ||
4466 | set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags); | |
4467 | cdev->submit_kwqes = cnic_submit_bnx2x_kwqes; | |
4468 | ||
4469 | cp = cdev->cnic_priv; | |
4470 | cp->ethdev = ethdev; | |
4471 | cdev->pcidev = pdev; | |
4472 | ||
4473 | cp->cnic_ops = &cnic_bnx2x_ops; | |
4474 | cp->start_hw = cnic_start_bnx2x_hw; | |
4475 | cp->stop_hw = cnic_stop_bnx2x_hw; | |
4476 | cp->setup_pgtbl = cnic_setup_page_tbl_le; | |
4477 | cp->alloc_resc = cnic_alloc_bnx2x_resc; | |
4478 | cp->free_resc = cnic_free_resc; | |
4479 | cp->start_cm = cnic_cm_init_bnx2x_hw; | |
4480 | cp->stop_cm = cnic_cm_stop_bnx2x_hw; | |
4481 | cp->enable_int = cnic_enable_bnx2x_int; | |
4482 | cp->disable_int_sync = cnic_disable_bnx2x_int_sync; | |
4483 | cp->ack_int = cnic_ack_bnx2x_msix; | |
4484 | cp->close_conn = cnic_close_bnx2x_conn; | |
4485 | cp->next_idx = cnic_bnx2x_next_idx; | |
4486 | cp->hw_idx = cnic_bnx2x_hw_idx; | |
4487 | return cdev; | |
4488 | } | |
4489 | ||
a4636960 MC |
4490 | static struct cnic_dev *is_cnic_dev(struct net_device *dev) |
4491 | { | |
4492 | struct ethtool_drvinfo drvinfo; | |
4493 | struct cnic_dev *cdev = NULL; | |
4494 | ||
4495 | if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) { | |
4496 | memset(&drvinfo, 0, sizeof(drvinfo)); | |
4497 | dev->ethtool_ops->get_drvinfo(dev, &drvinfo); | |
4498 | ||
4499 | if (!strcmp(drvinfo.driver, "bnx2")) | |
4500 | cdev = init_bnx2_cnic(dev); | |
71034ba8 MC |
4501 | if (!strcmp(drvinfo.driver, "bnx2x")) |
4502 | cdev = init_bnx2x_cnic(dev); | |
a4636960 MC |
4503 | if (cdev) { |
4504 | write_lock(&cnic_dev_lock); | |
4505 | list_add(&cdev->list, &cnic_dev_list); | |
4506 | write_unlock(&cnic_dev_lock); | |
4507 | } | |
4508 | } | |
4509 | return cdev; | |
4510 | } | |
4511 | ||
4512 | /** | |
4513 | * netdev event handler | |
4514 | */ | |
4515 | static int cnic_netdev_event(struct notifier_block *this, unsigned long event, | |
4516 | void *ptr) | |
4517 | { | |
4518 | struct net_device *netdev = ptr; | |
4519 | struct cnic_dev *dev; | |
4520 | int if_type; | |
4521 | int new_dev = 0; | |
4522 | ||
4523 | dev = cnic_from_netdev(netdev); | |
4524 | ||
4525 | if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) { | |
4526 | /* Check for the hot-plug device */ | |
4527 | dev = is_cnic_dev(netdev); | |
4528 | if (dev) { | |
4529 | new_dev = 1; | |
4530 | cnic_hold(dev); | |
4531 | } | |
4532 | } | |
4533 | if (dev) { | |
4534 | struct cnic_local *cp = dev->cnic_priv; | |
4535 | ||
4536 | if (new_dev) | |
4537 | cnic_ulp_init(dev); | |
4538 | else if (event == NETDEV_UNREGISTER) | |
4539 | cnic_ulp_exit(dev); | |
6053bbf7 MC |
4540 | |
4541 | if (event == NETDEV_UP) { | |
a3059b12 MC |
4542 | if (cnic_register_netdev(dev) != 0) { |
4543 | cnic_put(dev); | |
4544 | goto done; | |
4545 | } | |
a4636960 MC |
4546 | if (!cnic_start_hw(dev)) |
4547 | cnic_ulp_start(dev); | |
a4636960 MC |
4548 | } |
4549 | ||
4550 | rcu_read_lock(); | |
4551 | for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) { | |
4552 | struct cnic_ulp_ops *ulp_ops; | |
4553 | void *ctx; | |
4554 | ||
4555 | ulp_ops = rcu_dereference(cp->ulp_ops[if_type]); | |
4556 | if (!ulp_ops || !ulp_ops->indicate_netevent) | |
4557 | continue; | |
4558 | ||
4559 | ctx = cp->ulp_handle[if_type]; | |
4560 | ||
4561 | ulp_ops->indicate_netevent(ctx, event); | |
4562 | } | |
4563 | rcu_read_unlock(); | |
4564 | ||
4565 | if (event == NETDEV_GOING_DOWN) { | |
a4636960 MC |
4566 | cnic_ulp_stop(dev); |
4567 | cnic_stop_hw(dev); | |
a3059b12 | 4568 | cnic_unregister_netdev(dev); |
a4636960 MC |
4569 | } else if (event == NETDEV_UNREGISTER) { |
4570 | write_lock(&cnic_dev_lock); | |
4571 | list_del_init(&dev->list); | |
4572 | write_unlock(&cnic_dev_lock); | |
4573 | ||
4574 | cnic_put(dev); | |
4575 | cnic_free_dev(dev); | |
4576 | goto done; | |
4577 | } | |
4578 | cnic_put(dev); | |
4579 | } | |
4580 | done: | |
4581 | return NOTIFY_DONE; | |
4582 | } | |
4583 | ||
4584 | static struct notifier_block cnic_netdev_notifier = { | |
4585 | .notifier_call = cnic_netdev_event | |
4586 | }; | |
4587 | ||
4588 | static void cnic_release(void) | |
4589 | { | |
4590 | struct cnic_dev *dev; | |
4591 | ||
4592 | while (!list_empty(&cnic_dev_list)) { | |
4593 | dev = list_entry(cnic_dev_list.next, struct cnic_dev, list); | |
4594 | if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) { | |
4595 | cnic_ulp_stop(dev); | |
4596 | cnic_stop_hw(dev); | |
4597 | } | |
4598 | ||
4599 | cnic_ulp_exit(dev); | |
a3059b12 | 4600 | cnic_unregister_netdev(dev); |
a4636960 MC |
4601 | list_del_init(&dev->list); |
4602 | cnic_free_dev(dev); | |
4603 | } | |
4604 | } | |
4605 | ||
4606 | static int __init cnic_init(void) | |
4607 | { | |
4608 | int rc = 0; | |
4609 | ||
ddf79b20 | 4610 | pr_info("%s", version); |
a4636960 MC |
4611 | |
4612 | rc = register_netdevice_notifier(&cnic_netdev_notifier); | |
4613 | if (rc) { | |
4614 | cnic_release(); | |
4615 | return rc; | |
4616 | } | |
4617 | ||
4618 | return 0; | |
4619 | } | |
4620 | ||
4621 | static void __exit cnic_exit(void) | |
4622 | { | |
4623 | unregister_netdevice_notifier(&cnic_netdev_notifier); | |
4624 | cnic_release(); | |
4625 | return; | |
4626 | } | |
4627 | ||
4628 | module_init(cnic_init); | |
4629 | module_exit(cnic_exit); |