[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / chelsio / cphy.h

/*****************************************************************************
 *                                                                           *
 * File: cphy.h                                                              *
 * $Revision: 1.7 $                                                          *
 * $Date: 2005/06/21 18:29:47 $                                              *
 * Description:                                                              *
 *  part of the Chelsio 10Gb Ethernet Driver.                                *
 *                                                                           *
 * This program is free software; you can redistribute it and/or modify      *
 * it under the terms of the GNU General Public License, version 2, as       *
 * published by the Free Software Foundation.                                *
 *                                                                           *
 * You should have received a copy of the GNU General Public License along   *
 * with this program; if not, write to the Free Software Foundation, Inc.,   *
 * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.                 *
 *                                                                           *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED    *
 * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF      *
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.                     *
 *                                                                           *
 * http://www.chelsio.com                                                    *
 *                                                                           *
 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc.                    *
 * All rights reserved.                                                      *
 *                                                                           *
 * Maintainers: maintainers@chelsio.com                                      *
 *                                                                           *
 * Authors: Dimitrios Michailidis   <dm@chelsio.com>                         *
 *          Tina Yang               <tainay@chelsio.com>                     *
 *          Felix Marti             <felix@chelsio.com>                      *
 *          Scott Bardone           <sbardone@chelsio.com>                   *
 *          Kurt Ottaway            <kottaway@chelsio.com>                   *
 *          Frank DiMambro          <frank@chelsio.com>                      *
 *                                                                           *
 * History:                                                                  *
 *                                                                           *
 ****************************************************************************/

#ifndef _CXGB_CPHY_H_
#define _CXGB_CPHY_H_

#include "common.h"

struct mdio_ops {
	void (*init)(adapter_t *adapter, const struct board_info *bi);
	int  (*read)(struct net_device *dev, int phy_addr, int mmd_addr,
		     u16 reg_addr);
	int  (*write)(struct net_device *dev, int phy_addr, int mmd_addr,
		      u16 reg_addr, u16 val);
	unsigned mode_support;
};

/* PHY interrupt types */
enum {
	cphy_cause_link_change = 0x1,
	cphy_cause_error = 0x2,
	cphy_cause_fifo_error = 0x3
};

enum {
	PHY_LINK_UP = 0x1,
	PHY_AUTONEG_RDY = 0x2,
	PHY_AUTONEG_EN = 0x4
};

struct cphy;

/* PHY operations */
struct cphy_ops {
	void (*destroy)(struct cphy *);
	int (*reset)(struct cphy *, int wait);

	int (*interrupt_enable)(struct cphy *);
	int (*interrupt_disable)(struct cphy *);
	int (*interrupt_clear)(struct cphy *);
	int (*interrupt_handler)(struct cphy *);

	int (*autoneg_enable)(struct cphy *);
	int (*autoneg_disable)(struct cphy *);
	int (*autoneg_restart)(struct cphy *);

	int (*advertise)(struct cphy *phy, unsigned int advertise_map);
	int (*set_loopback)(struct cphy *, int on);
	int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
	int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
			       int *duplex, int *fc);

	u32 mmds;
};

/* A PHY instance */
struct cphy {
	int state;	/* Link status state machine */
	adapter_t *adapter;                  /* associated adapter */

	struct delayed_work phy_update;

	u16 bmsr;
	int count;
	int act_count;
	int act_on;

	u32 elmer_gpo;

	const struct cphy_ops *ops;            /* PHY operations */
	struct mdio_if_info mdio;
	struct cphy_instance *instance;
};

/* Convenience MDIO read/write wrappers */
static inline int cphy_mdio_read(struct cphy *cphy, int mmd, int reg,
				 unsigned int *valp)
{
	int rc = cphy->mdio.mdio_read(cphy->mdio.dev, cphy->mdio.prtad, mmd,
				      reg);
	*valp = (rc >= 0) ? rc : -1;
	return (rc >= 0) ? 0 : rc;
}

static inline int cphy_mdio_write(struct cphy *cphy, int mmd, int reg,
				  unsigned int val)
{
	return cphy->mdio.mdio_write(cphy->mdio.dev, cphy->mdio.prtad, mmd,
				     reg, val);
}

static inline int simple_mdio_read(struct cphy *cphy, int reg,
				   unsigned int *valp)
{
	return cphy_mdio_read(cphy, MDIO_DEVAD_NONE, reg, valp);
}

static inline int simple_mdio_write(struct cphy *cphy, int reg,
				    unsigned int val)
{
	return cphy_mdio_write(cphy, MDIO_DEVAD_NONE, reg, val);
}

/* Convenience initializer */
static inline void cphy_init(struct cphy *phy, struct net_device *dev,
			     int phy_addr, struct cphy_ops *phy_ops,
			     const struct mdio_ops *mdio_ops)
{
	struct adapter *adapter = netdev_priv(dev);
	phy->adapter = adapter;
	phy->ops     = phy_ops;
	if (mdio_ops) {
		phy->mdio.prtad = phy_addr;
		phy->mdio.mmds = phy_ops->mmds;
		phy->mdio.mode_support = mdio_ops->mode_support;
		phy->mdio.mdio_read = mdio_ops->read;
		phy->mdio.mdio_write = mdio_ops->write;
	}
	phy->mdio.dev = dev;
}

/* Operations of the PHY-instance factory */
struct gphy {
	/* Construct a PHY instance with the given PHY address */
	struct cphy *(*create)(struct net_device *dev, int phy_addr,
			       const struct mdio_ops *mdio_ops);

	/*
	 * Reset the PHY chip.  This resets the whole PHY chip, not individual
	 * ports.
	 */
	int (*reset)(adapter_t *adapter);
};

extern const struct gphy t1_my3126_ops;
extern const struct gphy t1_mv88e1xxx_ops;
extern const struct gphy t1_vsc8244_ops;
extern const struct gphy t1_mv88x201x_ops;

#endif /* _CXGB_CPHY_H_ */
Commit	Line	Data
8199d3a7 CL	1	/*****************************************************************************
	2	* *
	3	* File: cphy.h *
559fb51b SB	4	* $Revision: 1.7 $ *
559fb51b SB	5	* $Date: 2005/06/21 18:29:47 $ *
8199d3a7 CL	6	* Description: *
	7	* part of the Chelsio 10Gb Ethernet Driver. *
	8	* *
	9	* This program is free software; you can redistribute it and/or modify *
	10	* it under the terms of the GNU General Public License, version 2, as *
	11	* published by the Free Software Foundation. *
	12	* *
	13	* You should have received a copy of the GNU General Public License along *
	14	* with this program; if not, write to the Free Software Foundation, Inc., *
	15	* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
	16	* *
	17	* THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED *
	18	* WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF *
	19	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
	20	* *
	21	* http://www.chelsio.com *
	22	* *
	23	* Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
	24	* All rights reserved. *
	25	* *
	26	* Maintainers: maintainers@chelsio.com *
	27	* *
	28	* Authors: Dimitrios Michailidis <dm@chelsio.com> *
	29	* Tina Yang <tainay@chelsio.com> *
	30	* Felix Marti <felix@chelsio.com> *
	31	* Scott Bardone <sbardone@chelsio.com> *
	32	* Kurt Ottaway <kottaway@chelsio.com> *
	33	* Frank DiMambro <frank@chelsio.com> *
	34	* *
	35	* History: *
	36	* *
	37	****************************************************************************/
	38
559fb51b SB	39	#ifndef _CXGB_CPHY_H_
559fb51b SB	40	#define _CXGB_CPHY_H_
8199d3a7 CL	41
	42	#include "common.h"
	43
	44	struct mdio_ops {
	45	void (init)(adapter_t adapter, const struct board_info *bi);
23c3320c BH	46	int (read)(struct net_device dev, int phy_addr, int mmd_addr,
	47	u16 reg_addr);
	48	int (write)(struct net_device dev, int phy_addr, int mmd_addr,
	49	u16 reg_addr, u16 val);
	50	unsigned mode_support;
8199d3a7 CL	51	};
	52
	53	/* PHY interrupt types */
	54	enum {
	55	cphy_cause_link_change = 0x1,
f1d3d38a SH	56	cphy_cause_error = 0x2,
	57	cphy_cause_fifo_error = 0x3
	58	};
	59
	60	enum {
	61	PHY_LINK_UP = 0x1,
	62	PHY_AUTONEG_RDY = 0x2,
	63	PHY_AUTONEG_EN = 0x4
8199d3a7 CL	64	};
	65
	66	struct cphy;
	67
	68	/* PHY operations */
	69	struct cphy_ops {
	70	void (destroy)(struct cphy );
	71	int (reset)(struct cphy , int wait);
	72
	73	int (interrupt_enable)(struct cphy );
	74	int (interrupt_disable)(struct cphy );
	75	int (interrupt_clear)(struct cphy );
	76	int (interrupt_handler)(struct cphy );
	77
	78	int (autoneg_enable)(struct cphy );
	79	int (autoneg_disable)(struct cphy );
	80	int (autoneg_restart)(struct cphy );
	81
	82	int (advertise)(struct cphy phy, unsigned int advertise_map);
	83	int (set_loopback)(struct cphy , int on);
	84	int (set_speed_duplex)(struct cphy phy, int speed, int duplex);
	85	int (get_link_status)(struct cphy phy, int link_ok, int speed,
	86	int duplex, int fc);
23c3320c BH	87
23c3320c BH	88	u32 mmds;
8199d3a7 CL	89	};
	90
	91	/* A PHY instance */
	92	struct cphy {
f1d3d38a	93	int state; /* Link status state machine */
8199d3a7	94	adapter_t adapter; / associated adapter */
f1d3d38a	95
6d5aefb8	96	struct delayed_work phy_update;
f1d3d38a SH	97
	98	u16 bmsr;
	99	int count;
	100	int act_count;
	101	int act_on;
	102
	103	u32 elmer_gpo;
	104
459e536b	105	const struct cphy_ops ops; / PHY operations */
23c3320c	106	struct mdio_if_info mdio;
8199d3a7 CL	107	struct cphy_instance *instance;
	108	};
	109
	110	/* Convenience MDIO read/write wrappers */
23c3320c BH	111	static inline int cphy_mdio_read(struct cphy *cphy, int mmd, int reg,
23c3320c BH	112	unsigned int *valp)
8199d3a7	113	{
23c3320c BH	114	int rc = cphy->mdio.mdio_read(cphy->mdio.dev, cphy->mdio.prtad, mmd,
	115	reg);
	116	*valp = (rc >= 0) ? rc : -1;
	117	return (rc >= 0) ? 0 : rc;
8199d3a7 CL	118	}
8199d3a7 CL	119
23c3320c BH	120	static inline int cphy_mdio_write(struct cphy *cphy, int mmd, int reg,
23c3320c BH	121	unsigned int val)
8199d3a7	122	{
23c3320c BH	123	return cphy->mdio.mdio_write(cphy->mdio.dev, cphy->mdio.prtad, mmd,
23c3320c BH	124	reg, val);
8199d3a7 CL	125	}
	126
	127	static inline int simple_mdio_read(struct cphy *cphy, int reg,
	128	unsigned int *valp)
	129	{
23c3320c	130	return cphy_mdio_read(cphy, MDIO_DEVAD_NONE, reg, valp);
8199d3a7 CL	131	}
	132
	133	static inline int simple_mdio_write(struct cphy *cphy, int reg,
	134	unsigned int val)
	135	{
23c3320c	136	return cphy_mdio_write(cphy, MDIO_DEVAD_NONE, reg, val);
8199d3a7 CL	137	}
	138
	139	/* Convenience initializer */
703cebab	140	static inline void cphy_init(struct cphy phy, struct net_device dev,
8199d3a7	141	int phy_addr, struct cphy_ops *phy_ops,
459e536b	142	const struct mdio_ops *mdio_ops)
8199d3a7	143	{
703cebab	144	struct adapter *adapter = netdev_priv(dev);
8199d3a7	145	phy->adapter = adapter;
8199d3a7 CL	146	phy->ops = phy_ops;
8199d3a7 CL	147	if (mdio_ops) {
23c3320c BH	148	phy->mdio.prtad = phy_addr;
	149	phy->mdio.mmds = phy_ops->mmds;
	150	phy->mdio.mode_support = mdio_ops->mode_support;
	151	phy->mdio.mdio_read = mdio_ops->read;
	152	phy->mdio.mdio_write = mdio_ops->write;
8199d3a7	153	}
703cebab	154	phy->mdio.dev = dev;
8199d3a7 CL	155	}
	156
	157	/* Operations of the PHY-instance factory */
	158	struct gphy {
	159	/* Construct a PHY instance with the given PHY address */
703cebab	160	struct cphy (create)(struct net_device *dev, int phy_addr,
459e536b	161	const struct mdio_ops *mdio_ops);
8199d3a7 CL	162
	163	/*
	164	* Reset the PHY chip. This resets the whole PHY chip, not individual
	165	* ports.
	166	*/
	167	int (reset)(adapter_t adapter);
	168	};
	169
459e536b SH	170	extern const struct gphy t1_my3126_ops;
	171	extern const struct gphy t1_mv88e1xxx_ops;
	172	extern const struct gphy t1_vsc8244_ops;
	173	extern const struct gphy t1_mv88x201x_ops;
559fb51b SB	174
559fb51b SB	175	#endif /* _CXGB_CPHY_H_ */