[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / atl1 / atl1.h

/*
 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
 * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
 * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
 *
 * Derived from Intel e1000 driver
 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the Free
 * Software Foundation; either version 2 of the License, or (at your option)
 * any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc., 59
 * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 */

#ifndef _ATL1_H_
#define _ATL1_H_

#include <linux/types.h>
#include <linux/if_vlan.h>

#include "atl1_hw.h"

/* function prototypes needed by multiple files */
s32 atl1_up(struct atl1_adapter *adapter);
void atl1_down(struct atl1_adapter *adapter);
int atl1_reset(struct atl1_adapter *adapter);
s32 atl1_setup_ring_resources(struct atl1_adapter *adapter);
void atl1_free_ring_resources(struct atl1_adapter *adapter);

extern char atl1_driver_name[];
extern char atl1_driver_version[];
extern const struct ethtool_ops atl1_ethtool_ops;

struct atl1_adapter;

#define ATL1_MAX_INTR		3
#define ATL1_MAX_TX_BUF_LEN	0x3000	/* 12288 bytes */

#define ATL1_DEFAULT_TPD	256
#define ATL1_MAX_TPD		1024
#define ATL1_MIN_TPD		64
#define ATL1_DEFAULT_RFD	512
#define ATL1_MIN_RFD		128
#define ATL1_MAX_RFD		2048

#define ATL1_GET_DESC(R, i, type)	(&(((type *)((R)->desc))[i]))
#define ATL1_RFD_DESC(R, i)	ATL1_GET_DESC(R, i, struct rx_free_desc)
#define ATL1_TPD_DESC(R, i)	ATL1_GET_DESC(R, i, struct tx_packet_desc)
#define ATL1_RRD_DESC(R, i)	ATL1_GET_DESC(R, i, struct rx_return_desc)

/*
 * This detached comment is preserved for documentation purposes only.
 * It was originally attached to some code that got deleted, but seems
 * important enough to keep around...
 *
 * <begin detached comment>
 * Some workarounds require millisecond delays and are run during interrupt
 * context.  Most notably, when establishing link, the phy may need tweaking
 * but cannot process phy register reads/writes faster than millisecond
 * intervals...and we establish link due to a "link status change" interrupt.
 * <end detached comment>
 */

/*
 * atl1_ring_header represents a single, contiguous block of DMA space
 * mapped for the three descriptor rings (tpd, rfd, rrd) and the two
 * message blocks (cmb, smb) described below
 */
struct atl1_ring_header {
	void *desc;		/* virtual address */
	dma_addr_t dma;		/* physical address*/
	unsigned int size;	/* length in bytes */
};

/*
 * atl1_buffer is wrapper around a pointer to a socket buffer
 * so a DMA handle can be stored along with the skb
 */
struct atl1_buffer {
	struct sk_buff *skb;	/* socket buffer */
	u16 length;		/* rx buffer length */
	u16 alloced;		/* 1 if skb allocated */
	dma_addr_t dma;
};

/* transmit packet descriptor (tpd) ring */
struct atl1_tpd_ring {
	void *desc;		/* descriptor ring virtual address */
	dma_addr_t dma;		/* descriptor ring physical address */
	u16 size;		/* descriptor ring length in bytes */
	u16 count;		/* number of descriptors in the ring */
	u16 hw_idx;		/* hardware index */
	atomic_t next_to_clean;
	atomic_t next_to_use;
	struct atl1_buffer *buffer_info;
};

/* receive free descriptor (rfd) ring */
struct atl1_rfd_ring {
	void *desc;		/* descriptor ring virtual address */
	dma_addr_t dma;		/* descriptor ring physical address */
	u16 size;		/* descriptor ring length in bytes */
	u16 count;		/* number of descriptors in the ring */
	atomic_t next_to_use;
	u16 next_to_clean;
	struct atl1_buffer *buffer_info;
};

/* receive return descriptor (rrd) ring */
struct atl1_rrd_ring {
	void *desc;		/* descriptor ring virtual address */
	dma_addr_t dma;		/* descriptor ring physical address */
	unsigned int size;	/* descriptor ring length in bytes */
	u16 count;		/* number of descriptors in the ring */
	u16 next_to_use;
	atomic_t next_to_clean;
};

/* coalescing message block (cmb) */
struct atl1_cmb {
	struct coals_msg_block *cmb;
	dma_addr_t dma;
};

/* statistics message block (smb) */
struct atl1_smb {
	struct stats_msg_block *smb;
	dma_addr_t dma;
};

/* Statistics counters */
struct atl1_sft_stats {
	u64 rx_packets;
	u64 tx_packets;
	u64 rx_bytes;
	u64 tx_bytes;
	u64 multicast;
	u64 collisions;
	u64 rx_errors;
	u64 rx_length_errors;
	u64 rx_crc_errors;
	u64 rx_frame_errors;
	u64 rx_fifo_errors;
	u64 rx_missed_errors;
	u64 tx_errors;
	u64 tx_fifo_errors;
	u64 tx_aborted_errors;
	u64 tx_window_errors;
	u64 tx_carrier_errors;
	u64 tx_pause;		/* num pause packets transmitted. */
	u64 excecol;		/* num tx packets w/ excessive collisions. */
	u64 deffer;		/* num tx packets deferred */
	u64 scc;		/* num packets subsequently transmitted
				 * successfully w/ single prior collision. */
	u64 mcc;		/* num packets subsequently transmitted
				 * successfully w/ multiple prior collisions. */
	u64 latecol;		/* num tx packets  w/ late collisions. */
	u64 tx_underun;		/* num tx packets aborted due to transmit
				 * FIFO underrun, or TRD FIFO underrun */
	u64 tx_trunc;		/* num tx packets truncated due to size
				 * exceeding MTU, regardless whether truncated
				 * by the chip or not. (The name doesn't really
				 * reflect the meaning in this case.) */
	u64 rx_pause;		/* num Pause packets received. */
	u64 rx_rrd_ov;
	u64 rx_trunc;
};

/* hardware structure */
struct atl1_hw {
	u8 __iomem *hw_addr;
	struct atl1_adapter *back;
	enum atl1_dma_order dma_ord;
	enum atl1_dma_rcb rcb_value;
	enum atl1_dma_req_block dmar_block;
	enum atl1_dma_req_block dmaw_block;
	u8 preamble_len;
	u8 max_retry;		/* Retransmission maximum, after which the
				 * packet will be discarded */
	u8 jam_ipg;		/* IPG to start JAM for collision based flow
				 * control in half-duplex mode. In units of
				 * 8-bit time */
	u8 ipgt;		/* Desired back to back inter-packet gap.
				 * The default is 96-bit time */
	u8 min_ifg;		/* Minimum number of IFG to enforce in between
				 * receive frames. Frame gap below such IFP
				 * is dropped */
	u8 ipgr1;		/* 64bit Carrier-Sense window */
	u8 ipgr2;		/* 96-bit IPG window */
	u8 tpd_burst;		/* Number of TPD to prefetch in cache-aligned
				 * burst. Each TPD is 16 bytes long */
	u8 rfd_burst;		/* Number of RFD to prefetch in cache-aligned
				 * burst. Each RFD is 12 bytes long */
	u8 rfd_fetch_gap;
	u8 rrd_burst;		/* Threshold number of RRDs that can be retired
				 * in a burst. Each RRD is 16 bytes long */
	u8 tpd_fetch_th;
	u8 tpd_fetch_gap;
	u16 tx_jumbo_task_th;
	u16 txf_burst;		/* Number of data bytes to read in a cache-
				 * aligned burst. Each SRAM entry is 8 bytes */
	u16 rx_jumbo_th;	/* Jumbo packet size for non-VLAN packet. VLAN
				 * packets should add 4 bytes */
	u16 rx_jumbo_lkah;
	u16 rrd_ret_timer;	/* RRD retirement timer. Decrement by 1 after
				 * every 512ns passes. */
	u16 lcol;		/* Collision Window */

	u16 cmb_tpd;
	u16 cmb_rrd;
	u16 cmb_rx_timer;
	u16 cmb_tx_timer;
	u32 smb_timer;
	u16 media_type;
	u16 autoneg_advertised;

	u16 mii_autoneg_adv_reg;
	u16 mii_1000t_ctrl_reg;

	u32 max_frame_size;
	u32 min_frame_size;

	u16 dev_rev;
	u8 revision_id;

	/* spi flash */
	u8 flash_vendor;

	u8 mac_addr[ETH_ALEN];
	u8 perm_mac_addr[ETH_ALEN];

	bool phy_configured;
};

struct atl1_adapter {
	struct net_device *netdev;
	struct pci_dev *pdev;
	struct net_device_stats net_stats;
	struct atl1_sft_stats soft_stats;
	struct vlan_group *vlgrp;
	u32 rx_buffer_len;
	u32 wol;
	u16 link_speed;
	u16 link_duplex;
	spinlock_t lock;
	struct work_struct tx_timeout_task;
	struct work_struct link_chg_task;
	struct work_struct pcie_dma_to_rst_task;
	struct timer_list watchdog_timer;
	struct timer_list phy_config_timer;
	bool phy_timer_pending;

	/* all descriptor rings' memory */
	struct atl1_ring_header ring_header;

	/* TX */
	struct atl1_tpd_ring tpd_ring;
	spinlock_t mb_lock;

	/* RX */
	struct atl1_rfd_ring rfd_ring;
	struct atl1_rrd_ring rrd_ring;
	u64 hw_csum_err;
	u64 hw_csum_good;

	u16 imt;	/* interrupt moderator timer (2us resolution */
	u16 ict;	/* interrupt clear timer (2us resolution */
	struct mii_if_info mii;		/* MII interface info */

	/* structs defined in atl1_hw.h */
	u32 bd_number;			/* board number */
	bool pci_using_64;
	struct atl1_hw hw;
	struct atl1_smb smb;
	struct atl1_cmb cmb;
};

#endif	/* _ATL1_H_ */
Commit	Line	Data
f3cc28c7 JC	1	/*
	2	* Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
	3	* Copyright(c) 2006 Chris Snook <csnook@redhat.com>
	4	* Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
	5	*
	6	* Derived from Intel e1000 driver
	7	* Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
	8	*
	9	* This program is free software; you can redistribute it and/or modify it
	10	* under the terms of the GNU General Public License as published by the Free
	11	* Software Foundation; either version 2 of the License, or (at your option)
	12	* any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful, but WITHOUT
	15	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	16	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	17	* more details.
	18	*
	19	* You should have received a copy of the GNU General Public License along with
	20	* this program; if not, write to the Free Software Foundation, Inc., 59
	21	* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	22	*/
	23
	24	#ifndef _ATL1_H_
	25	#define _ATL1_H_
	26
	27	#include <linux/types.h>
	28	#include <linux/if_vlan.h>
	29
	30	#include "atl1_hw.h"
	31
	32	/* function prototypes needed by multiple files */
	33	s32 atl1_up(struct atl1_adapter *adapter);
	34	void atl1_down(struct atl1_adapter *adapter);
	35	int atl1_reset(struct atl1_adapter *adapter);
	36	s32 atl1_setup_ring_resources(struct atl1_adapter *adapter);
	37	void atl1_free_ring_resources(struct atl1_adapter *adapter);
	38
	39	extern char atl1_driver_name[];
	40	extern char atl1_driver_version[];
	41	extern const struct ethtool_ops atl1_ethtool_ops;
	42
	43	struct atl1_adapter;
	44
	45	#define ATL1_MAX_INTR 3
2b116145	46	#define ATL1_MAX_TX_BUF_LEN 0x3000 /* 12288 bytes */
f3cc28c7 JC	47
	48	#define ATL1_DEFAULT_TPD 256
	49	#define ATL1_MAX_TPD 1024
	50	#define ATL1_MIN_TPD 64
	51	#define ATL1_DEFAULT_RFD 512
	52	#define ATL1_MIN_RFD 128
	53	#define ATL1_MAX_RFD 2048
	54
	55	#define ATL1_GET_DESC(R, i, type) (&(((type *)((R)->desc))[i]))
	56	#define ATL1_RFD_DESC(R, i) ATL1_GET_DESC(R, i, struct rx_free_desc)
	57	#define ATL1_TPD_DESC(R, i) ATL1_GET_DESC(R, i, struct tx_packet_desc)
	58	#define ATL1_RRD_DESC(R, i) ATL1_GET_DESC(R, i, struct rx_return_desc)
	59
	60	/*
2b116145 JC	61	* This detached comment is preserved for documentation purposes only.
	62	* It was originally attached to some code that got deleted, but seems
	63	* important enough to keep around...
	64	*
	65	* <begin detached comment>
f3cc28c7 JC	66	* Some workarounds require millisecond delays and are run during interrupt
	67	* context. Most notably, when establishing link, the phy may need tweaking
	68	* but cannot process phy register reads/writes faster than millisecond
	69	* intervals...and we establish link due to a "link status change" interrupt.
2b116145 JC	70	* <end detached comment>
	71	*/
	72
	73	/*
	74	* atl1_ring_header represents a single, contiguous block of DMA space
	75	* mapped for the three descriptor rings (tpd, rfd, rrd) and the two
	76	* message blocks (cmb, smb) described below
f3cc28c7	77	*/
2b116145 JC	78	struct atl1_ring_header {
	79	void desc; / virtual address */
	80	dma_addr_t dma; /* physical address*/
	81	unsigned int size; /* length in bytes */
	82	};
f3cc28c7 JC	83
f3cc28c7 JC	84	/*
2b116145 JC	85	* atl1_buffer is wrapper around a pointer to a socket buffer
2b116145 JC	86	* so a DMA handle can be stored along with the skb
f3cc28c7 JC	87	*/
f3cc28c7 JC	88	struct atl1_buffer {
2b116145 JC	89	struct sk_buff skb; / socket buffer */
	90	u16 length; /* rx buffer length */
	91	u16 alloced; /* 1 if skb allocated */
f3cc28c7 JC	92	dma_addr_t dma;
	93	};
	94
2b116145	95	/* transmit packet descriptor (tpd) ring */
f3cc28c7	96	struct atl1_tpd_ring {
2b116145 JC	97	void desc; / descriptor ring virtual address */
	98	dma_addr_t dma; /* descriptor ring physical address */
	99	u16 size; /* descriptor ring length in bytes */
f3cc28c7 JC	100	u16 count; /* number of descriptors in the ring */
	101	u16 hw_idx; /* hardware index */
	102	atomic_t next_to_clean;
	103	atomic_t next_to_use;
	104	struct atl1_buffer *buffer_info;
	105	};
	106
2b116145	107	/* receive free descriptor (rfd) ring */
f3cc28c7	108	struct atl1_rfd_ring {
2b116145 JC	109	void desc; / descriptor ring virtual address */
	110	dma_addr_t dma; /* descriptor ring physical address */
	111	u16 size; /* descriptor ring length in bytes */
	112	u16 count; /* number of descriptors in the ring */
f3cc28c7 JC	113	atomic_t next_to_use;
	114	u16 next_to_clean;
	115	struct atl1_buffer *buffer_info;
	116	};
	117
2b116145	118	/* receive return descriptor (rrd) ring */
f3cc28c7	119	struct atl1_rrd_ring {
2b116145 JC	120	void desc; / descriptor ring virtual address */
	121	dma_addr_t dma; /* descriptor ring physical address */
	122	unsigned int size; /* descriptor ring length in bytes */
	123	u16 count; /* number of descriptors in the ring */
f3cc28c7 JC	124	u16 next_to_use;
	125	atomic_t next_to_clean;
	126	};
	127
2b116145	128	/* coalescing message block (cmb) */
f3cc28c7 JC	129	struct atl1_cmb {
	130	struct coals_msg_block *cmb;
	131	dma_addr_t dma;
	132	};
	133
2b116145	134	/* statistics message block (smb) */
f3cc28c7 JC	135	struct atl1_smb {
	136	struct stats_msg_block *smb;
	137	dma_addr_t dma;
	138	};
	139
	140	/* Statistics counters */
	141	struct atl1_sft_stats {
	142	u64 rx_packets;
	143	u64 tx_packets;
	144	u64 rx_bytes;
	145	u64 tx_bytes;
	146	u64 multicast;
	147	u64 collisions;
	148	u64 rx_errors;
	149	u64 rx_length_errors;
	150	u64 rx_crc_errors;
	151	u64 rx_frame_errors;
	152	u64 rx_fifo_errors;
	153	u64 rx_missed_errors;
	154	u64 tx_errors;
	155	u64 tx_fifo_errors;
	156	u64 tx_aborted_errors;
	157	u64 tx_window_errors;
	158	u64 tx_carrier_errors;
2b116145 JC	159	u64 tx_pause; /* num pause packets transmitted. */
	160	u64 excecol; /* num tx packets w/ excessive collisions. */
	161	u64 deffer; /* num tx packets deferred */
	162	u64 scc; /* num packets subsequently transmitted
	163	* successfully w/ single prior collision. */
	164	u64 mcc; /* num packets subsequently transmitted
	165	* successfully w/ multiple prior collisions. */
f3cc28c7	166	u64 latecol; /* num tx packets w/ late collisions. */
2b116145 JC	167	u64 tx_underun; /* num tx packets aborted due to transmit
	168	* FIFO underrun, or TRD FIFO underrun */
	169	u64 tx_trunc; /* num tx packets truncated due to size
	170	* exceeding MTU, regardless whether truncated
	171	* by the chip or not. (The name doesn't really
	172	* reflect the meaning in this case.) */
f3cc28c7 JC	173	u64 rx_pause; /* num Pause packets received. */
	174	u64 rx_rrd_ov;
	175	u64 rx_trunc;
	176	};
	177
2b116145	178	/* hardware structure */
f3cc28c7 JC	179	struct atl1_hw {
	180	u8 __iomem *hw_addr;
	181	struct atl1_adapter *back;
	182	enum atl1_dma_order dma_ord;
	183	enum atl1_dma_rcb rcb_value;
	184	enum atl1_dma_req_block dmar_block;
	185	enum atl1_dma_req_block dmaw_block;
	186	u8 preamble_len;
2b116145 JC	187	u8 max_retry; /* Retransmission maximum, after which the
	188	* packet will be discarded */
	189	u8 jam_ipg; /* IPG to start JAM for collision based flow
	190	* control in half-duplex mode. In units of
	191	* 8-bit time */
	192	u8 ipgt; /* Desired back to back inter-packet gap.
	193	* The default is 96-bit time */
	194	u8 min_ifg; /* Minimum number of IFG to enforce in between
	195	* receive frames. Frame gap below such IFP
	196	* is dropped */
f3cc28c7 JC	197	u8 ipgr1; /* 64bit Carrier-Sense window */
f3cc28c7 JC	198	u8 ipgr2; /* 96-bit IPG window */
2b116145 JC	199	u8 tpd_burst; /* Number of TPD to prefetch in cache-aligned
	200	* burst. Each TPD is 16 bytes long */
	201	u8 rfd_burst; /* Number of RFD to prefetch in cache-aligned
	202	* burst. Each RFD is 12 bytes long */
f3cc28c7	203	u8 rfd_fetch_gap;
2b116145 JC	204	u8 rrd_burst; /* Threshold number of RRDs that can be retired
2b116145 JC	205	* in a burst. Each RRD is 16 bytes long */
f3cc28c7 JC	206	u8 tpd_fetch_th;
	207	u8 tpd_fetch_gap;
	208	u16 tx_jumbo_task_th;
2b116145 JC	209	u16 txf_burst; /* Number of data bytes to read in a cache-
	210	* aligned burst. Each SRAM entry is 8 bytes */
	211	u16 rx_jumbo_th; /* Jumbo packet size for non-VLAN packet. VLAN
	212	* packets should add 4 bytes */
f3cc28c7	213	u16 rx_jumbo_lkah;
2b116145 JC	214	u16 rrd_ret_timer; /* RRD retirement timer. Decrement by 1 after
2b116145 JC	215	* every 512ns passes. */
f3cc28c7 JC	216	u16 lcol; /* Collision Window */
	217
	218	u16 cmb_tpd;
	219	u16 cmb_rrd;
	220	u16 cmb_rx_timer;
	221	u16 cmb_tx_timer;
	222	u32 smb_timer;
	223	u16 media_type;
	224	u16 autoneg_advertised;
f3cc28c7 JC	225
	226	u16 mii_autoneg_adv_reg;
	227	u16 mii_1000t_ctrl_reg;
	228
f3cc28c7 JC	229	u32 max_frame_size;
f3cc28c7 JC	230	u32 min_frame_size;
f3cc28c7 JC	231
	232	u16 dev_rev;
	233	u8 revision_id;
	234
	235	/* spi flash */
	236	u8 flash_vendor;
	237
f3cc28c7 JC	238	u8 mac_addr[ETH_ALEN];
	239	u8 perm_mac_addr[ETH_ALEN];
	240
f3cc28c7 JC	241	bool phy_configured;
	242	};
	243
	244	struct atl1_adapter {
f3cc28c7 JC	245	struct net_device *netdev;
	246	struct pci_dev *pdev;
	247	struct net_device_stats net_stats;
	248	struct atl1_sft_stats soft_stats;
f3cc28c7 JC	249	struct vlan_group *vlgrp;
	250	u32 rx_buffer_len;
	251	u32 wol;
	252	u16 link_speed;
	253	u16 link_duplex;
	254	spinlock_t lock;
f3cc28c7 JC	255	struct work_struct tx_timeout_task;
	256	struct work_struct link_chg_task;
	257	struct work_struct pcie_dma_to_rst_task;
	258	struct timer_list watchdog_timer;
	259	struct timer_list phy_config_timer;
	260	bool phy_timer_pending;
	261
2b116145	262	/* all descriptor rings' memory */
f3cc28c7 JC	263	struct atl1_ring_header ring_header;
	264
	265	/* TX */
	266	struct atl1_tpd_ring tpd_ring;
	267	spinlock_t mb_lock;
	268
	269	/* RX */
	270	struct atl1_rfd_ring rfd_ring;
	271	struct atl1_rrd_ring rrd_ring;
	272	u64 hw_csum_err;
	273	u64 hw_csum_good;
	274
2b116145 JC	275	u16 imt; /* interrupt moderator timer (2us resolution */
	276	u16 ict; /* interrupt clear timer (2us resolution */
	277	struct mii_if_info mii; /* MII interface info */
f3cc28c7 JC	278
f3cc28c7 JC	279	/* structs defined in atl1_hw.h */
2b116145	280	u32 bd_number; /* board number */
f3cc28c7 JC	281	bool pci_using_64;
	282	struct atl1_hw hw;
	283	struct atl1_smb smb;
	284	struct atl1_cmb cmb;
f3cc28c7 JC	285	};
	286
	287	#endif /* _ATL1_H_ */