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1da177e4 LT |
1 | /* |
2 | * drivers/mtd/nand/toto.c | |
3 | * | |
4 | * Copyright (c) 2003 Texas Instruments | |
5 | * | |
6 | * Derived from drivers/mtd/autcpu12.c | |
7 | * | |
8 | * Copyright (c) 2002 Thomas Gleixner <tgxl@linutronix.de> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * Overview: | |
15 | * This is a device driver for the NAND flash device found on the | |
16 | * TI fido board. It supports 32MiB and 64MiB cards | |
17 | * | |
61b03bd7 | 18 | * $Id: toto.c,v 1.5 2005/11/07 11:14:31 gleixner Exp $ |
1da177e4 LT |
19 | */ |
20 | ||
21 | #include <linux/slab.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/mtd/mtd.h> | |
26 | #include <linux/mtd/nand.h> | |
27 | #include <linux/mtd/partitions.h> | |
28 | #include <asm/io.h> | |
29 | #include <asm/arch/hardware.h> | |
30 | #include <asm/sizes.h> | |
31 | #include <asm/arch/toto.h> | |
32 | #include <asm/arch-omap1510/hardware.h> | |
33 | #include <asm/arch/gpio.h> | |
34 | ||
35 | /* | |
36 | * MTD structure for TOTO board | |
37 | */ | |
38 | static struct mtd_info *toto_mtd = NULL; | |
39 | ||
40 | static unsigned long toto_io_base = OMAP_FLASH_1_BASE; | |
41 | ||
42 | #define CONFIG_NAND_WORKAROUND 1 | |
43 | ||
44 | #define NAND_NCE 0x4000 | |
45 | #define NAND_CLE 0x1000 | |
46 | #define NAND_ALE 0x0002 | |
47 | #define NAND_MASK (NAND_CLE | NAND_ALE | NAND_NCE) | |
48 | ||
49 | #define T_NAND_CTL_CLRALE(iob) gpiosetout(NAND_ALE, 0) | |
50 | #define T_NAND_CTL_SETALE(iob) gpiosetout(NAND_ALE, NAND_ALE) | |
e0c7d767 | 51 | #ifdef CONFIG_NAND_WORKAROUND /* "some" dev boards busted, blue wired to rts2 :( */ |
1da177e4 LT |
52 | #define T_NAND_CTL_CLRCLE(iob) gpiosetout(NAND_CLE, 0); rts2setout(2, 2) |
53 | #define T_NAND_CTL_SETCLE(iob) gpiosetout(NAND_CLE, NAND_CLE); rts2setout(2, 0) | |
54 | #else | |
55 | #define T_NAND_CTL_CLRCLE(iob) gpiosetout(NAND_CLE, 0) | |
56 | #define T_NAND_CTL_SETCLE(iob) gpiosetout(NAND_CLE, NAND_CLE) | |
57 | #endif | |
58 | #define T_NAND_CTL_SETNCE(iob) gpiosetout(NAND_NCE, 0) | |
59 | #define T_NAND_CTL_CLRNCE(iob) gpiosetout(NAND_NCE, NAND_NCE) | |
61b03bd7 | 60 | |
1da177e4 LT |
61 | /* |
62 | * Define partitions for flash devices | |
63 | */ | |
64 | ||
65 | static struct mtd_partition partition_info64M[] = { | |
66 | { .name = "toto kernel partition 1", | |
67 | .offset = 0, | |
68 | .size = 2 * SZ_1M }, | |
69 | { .name = "toto file sys partition 2", | |
70 | .offset = 2 * SZ_1M, | |
71 | .size = 14 * SZ_1M }, | |
72 | { .name = "toto user partition 3", | |
73 | .offset = 16 * SZ_1M, | |
74 | .size = 16 * SZ_1M }, | |
75 | { .name = "toto devboard extra partition 4", | |
76 | .offset = 32 * SZ_1M, | |
77 | .size = 32 * SZ_1M }, | |
78 | }; | |
79 | ||
80 | static struct mtd_partition partition_info32M[] = { | |
81 | { .name = "toto kernel partition 1", | |
82 | .offset = 0, | |
83 | .size = 2 * SZ_1M }, | |
84 | { .name = "toto file sys partition 2", | |
85 | .offset = 2 * SZ_1M, | |
86 | .size = 14 * SZ_1M }, | |
87 | { .name = "toto user partition 3", | |
88 | .offset = 16 * SZ_1M, | |
89 | .size = 16 * SZ_1M }, | |
90 | }; | |
91 | ||
92 | #define NUM_PARTITIONS32M 3 | |
93 | #define NUM_PARTITIONS64M 4 | |
61b03bd7 | 94 | /* |
1da177e4 LT |
95 | * hardware specific access to control-lines |
96 | */ | |
97 | ||
98 | static void toto_hwcontrol(struct mtd_info *mtd, int cmd) | |
99 | { | |
100 | ||
e0c7d767 DW |
101 | udelay(1); /* hopefully enough time for tc make proceding write to clear */ |
102 | switch (cmd) { | |
1da177e4 LT |
103 | case NAND_CTL_SETCLE: T_NAND_CTL_SETCLE(cmd); break; |
104 | case NAND_CTL_CLRCLE: T_NAND_CTL_CLRCLE(cmd); break; | |
105 | ||
106 | case NAND_CTL_SETALE: T_NAND_CTL_SETALE(cmd); break; | |
107 | case NAND_CTL_CLRALE: T_NAND_CTL_CLRALE(cmd); break; | |
108 | ||
109 | case NAND_CTL_SETNCE: T_NAND_CTL_SETNCE(cmd); break; | |
110 | case NAND_CTL_CLRNCE: T_NAND_CTL_CLRNCE(cmd); break; | |
111 | } | |
e0c7d767 | 112 | udelay(1); /* allow time to ensure gpio state to over take memory write */ |
1da177e4 LT |
113 | } |
114 | ||
115 | /* | |
116 | * Main initialization routine | |
117 | */ | |
cead4dbc | 118 | static int __init toto_init(void) |
1da177e4 LT |
119 | { |
120 | struct nand_chip *this; | |
121 | int err = 0; | |
122 | ||
123 | /* Allocate memory for MTD device structure and private data */ | |
e0c7d767 | 124 | toto_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); |
1da177e4 | 125 | if (!toto_mtd) { |
e0c7d767 | 126 | printk(KERN_WARNING "Unable to allocate toto NAND MTD device structure.\n"); |
1da177e4 LT |
127 | err = -ENOMEM; |
128 | goto out; | |
129 | } | |
130 | ||
131 | /* Get pointer to private data */ | |
e0c7d767 | 132 | this = (struct nand_chip *)(&toto_mtd[1]); |
1da177e4 LT |
133 | |
134 | /* Initialize structures */ | |
e0c7d767 DW |
135 | memset(toto_mtd, 0, sizeof(struct mtd_info)); |
136 | memset(this, 0, sizeof(struct nand_chip)); | |
1da177e4 LT |
137 | |
138 | /* Link the private data with the MTD structure */ | |
139 | toto_mtd->priv = this; | |
552d9205 | 140 | toto_mtd->owner = THIS_MODULE; |
1da177e4 LT |
141 | |
142 | /* Set address of NAND IO lines */ | |
143 | this->IO_ADDR_R = toto_io_base; | |
144 | this->IO_ADDR_W = toto_io_base; | |
145 | this->hwcontrol = toto_hwcontrol; | |
146 | this->dev_ready = NULL; | |
147 | /* 25 us command delay time */ | |
61b03bd7 | 148 | this->chip_delay = 30; |
6dfc6d25 | 149 | this->ecc.mode = NAND_ECC_SOFT; |
1da177e4 | 150 | |
e0c7d767 DW |
151 | /* Scan to find existance of the device */ |
152 | if (nand_scan(toto_mtd, 1)) { | |
1da177e4 LT |
153 | err = -ENXIO; |
154 | goto out_mtd; | |
155 | } | |
156 | ||
157 | /* Register the partitions */ | |
e0c7d767 DW |
158 | switch (toto_mtd->size) { |
159 | case SZ_64M: | |
160 | add_mtd_partitions(toto_mtd, partition_info64M, NUM_PARTITIONS64M); | |
161 | break; | |
162 | case SZ_32M: | |
163 | add_mtd_partitions(toto_mtd, partition_info32M, NUM_PARTITIONS32M); | |
164 | break; | |
165 | default:{ | |
166 | printk(KERN_WARNING "Unsupported Nand device\n"); | |
1da177e4 LT |
167 | err = -ENXIO; |
168 | goto out_buf; | |
169 | } | |
170 | } | |
171 | ||
e0c7d767 DW |
172 | gpioreserve(NAND_MASK); /* claim our gpios */ |
173 | archflashwp(0, 0); /* open up flash for writing */ | |
1da177e4 LT |
174 | |
175 | goto out; | |
61b03bd7 | 176 | |
e0c7d767 DW |
177 | out_buf: |
178 | kfree(this->data_buf); | |
179 | out_mtd: | |
180 | kfree(toto_mtd); | |
181 | out: | |
1da177e4 LT |
182 | return err; |
183 | } | |
184 | ||
185 | module_init(toto_init); | |
186 | ||
187 | /* | |
188 | * Clean up routine | |
189 | */ | |
e0c7d767 | 190 | static void __exit toto_cleanup(void) |
1da177e4 LT |
191 | { |
192 | /* Release resources, unregister device */ | |
e0c7d767 | 193 | nand_release(toto_mtd); |
1da177e4 LT |
194 | |
195 | /* Free the MTD device structure */ | |
e0c7d767 | 196 | kfree(toto_mtd); |
1da177e4 LT |
197 | |
198 | /* stop flash writes */ | |
e0c7d767 | 199 | archflashwp(0, 1); |
61b03bd7 | 200 | |
1da177e4 | 201 | /* release gpios to system */ |
e0c7d767 | 202 | gpiorelease(NAND_MASK); |
1da177e4 | 203 | } |
e0c7d767 | 204 | |
1da177e4 LT |
205 | module_exit(toto_cleanup); |
206 | ||
207 | MODULE_LICENSE("GPL"); | |
208 | MODULE_AUTHOR("Richard Woodruff <r-woodruff2@ti.com>"); | |
209 | MODULE_DESCRIPTION("Glue layer for NAND flash on toto board"); |