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1da177e4 LT |
1 | /* |
2 | * drivers/mtd/nand/spia.c | |
3 | * | |
4 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) | |
5 | * | |
6 | * | |
7 | * 10-29-2001 TG change to support hardwarespecific access | |
8 | * to controllines (due to change in nand.c) | |
9 | * page_cache added | |
10 | * | |
61b03bd7 | 11 | * $Id: spia.c,v 1.25 2005/11/07 11:14:31 gleixner Exp $ |
1da177e4 LT |
12 | * |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License version 2 as | |
15 | * published by the Free Software Foundation. | |
16 | * | |
17 | * Overview: | |
18 | * This is a device driver for the NAND flash device found on the | |
19 | * SPIA board which utilizes the Toshiba TC58V64AFT part. This is | |
20 | * a 64Mibit (8MiB x 8 bits) NAND flash device. | |
21 | */ | |
22 | ||
23 | #include <linux/kernel.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/module.h> | |
27 | #include <linux/mtd/mtd.h> | |
28 | #include <linux/mtd/nand.h> | |
29 | #include <linux/mtd/partitions.h> | |
30 | #include <asm/io.h> | |
31 | ||
32 | /* | |
33 | * MTD structure for SPIA board | |
34 | */ | |
35 | static struct mtd_info *spia_mtd = NULL; | |
36 | ||
37 | /* | |
38 | * Values specific to the SPIA board (used with EP7212 processor) | |
39 | */ | |
40 | #define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */ | |
41 | #define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */ | |
e0c7d767 DW |
42 | #define SPIA_PEDR 0x0080 /* |
43 | * IO offset to Port E data register | |
44 | * where the CLE, ALE and NCE pins | |
45 | * are wired to. | |
46 | */ | |
47 | #define SPIA_PEDDR 0x00c0 /* | |
48 | * IO offset to Port E data direction | |
49 | * register so we can control the IO | |
50 | * lines. | |
51 | */ | |
1da177e4 LT |
52 | |
53 | /* | |
54 | * Module stuff | |
55 | */ | |
56 | ||
57 | static int spia_io_base = SPIA_IO_BASE; | |
58 | static int spia_fio_base = SPIA_FIO_BASE; | |
59 | static int spia_pedr = SPIA_PEDR; | |
60 | static int spia_peddr = SPIA_PEDDR; | |
61 | ||
62 | module_param(spia_io_base, int, 0); | |
63 | module_param(spia_fio_base, int, 0); | |
64 | module_param(spia_pedr, int, 0); | |
65 | module_param(spia_peddr, int, 0); | |
66 | ||
67 | /* | |
68 | * Define partitions for flash device | |
69 | */ | |
3c6bee1d | 70 | static const struct mtd_partition partition_info[] = { |
1da177e4 | 71 | { |
e0c7d767 DW |
72 | .name = "SPIA flash partition 1", |
73 | .offset = 0, | |
74 | .size = 2 * 1024 * 1024}, | |
1da177e4 | 75 | { |
e0c7d767 DW |
76 | .name = "SPIA flash partition 2", |
77 | .offset = 2 * 1024 * 1024, | |
78 | .size = 6 * 1024 * 1024} | |
1da177e4 | 79 | }; |
1da177e4 | 80 | |
e0c7d767 | 81 | #define NUM_PARTITIONS 2 |
1da177e4 | 82 | |
61b03bd7 | 83 | /* |
1da177e4 LT |
84 | * hardware specific access to control-lines |
85 | */ | |
e0c7d767 DW |
86 | static void spia_hwcontrol(struct mtd_info *mtd, int cmd) |
87 | { | |
88 | switch (cmd) { | |
1da177e4 LT |
89 | |
90 | case NAND_CTL_SETCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x01; break; | |
91 | case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x01; break; | |
92 | ||
93 | case NAND_CTL_SETALE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x02; break; | |
94 | case NAND_CTL_CLRALE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x02; break; | |
95 | ||
96 | case NAND_CTL_SETNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x04; break; | |
97 | case NAND_CTL_CLRNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x04; break; | |
e0c7d767 | 98 | } |
1da177e4 LT |
99 | } |
100 | ||
101 | /* | |
102 | * Main initialization routine | |
103 | */ | |
cead4dbc | 104 | static int __init spia_init(void) |
1da177e4 LT |
105 | { |
106 | struct nand_chip *this; | |
107 | ||
108 | /* Allocate memory for MTD device structure and private data */ | |
e0c7d767 | 109 | spia_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); |
1da177e4 | 110 | if (!spia_mtd) { |
e0c7d767 | 111 | printk("Unable to allocate SPIA NAND MTD device structure.\n"); |
1da177e4 LT |
112 | return -ENOMEM; |
113 | } | |
114 | ||
115 | /* Get pointer to private data */ | |
e0c7d767 | 116 | this = (struct nand_chip *)(&spia_mtd[1]); |
1da177e4 LT |
117 | |
118 | /* Initialize structures */ | |
e0c7d767 DW |
119 | memset(spia_mtd, 0, sizeof(struct mtd_info)); |
120 | memset(this, 0, sizeof(struct nand_chip)); | |
1da177e4 LT |
121 | |
122 | /* Link the private data with the MTD structure */ | |
123 | spia_mtd->priv = this; | |
552d9205 | 124 | spia_mtd->owner = THIS_MODULE; |
1da177e4 LT |
125 | |
126 | /* | |
127 | * Set GPIO Port E control register so that the pins are configured | |
128 | * to be outputs for controlling the NAND flash. | |
129 | */ | |
e0c7d767 | 130 | (*(volatile unsigned char *)(spia_io_base + spia_peddr)) = 0x07; |
1da177e4 LT |
131 | |
132 | /* Set address of NAND IO lines */ | |
e0c7d767 DW |
133 | this->IO_ADDR_R = (void __iomem *)spia_fio_base; |
134 | this->IO_ADDR_W = (void __iomem *)spia_fio_base; | |
1da177e4 LT |
135 | /* Set address of hardware control function */ |
136 | this->hwcontrol = spia_hwcontrol; | |
137 | /* 15 us command delay time */ | |
61b03bd7 | 138 | this->chip_delay = 15; |
1da177e4 LT |
139 | |
140 | /* Scan to find existence of the device */ | |
e0c7d767 DW |
141 | if (nand_scan(spia_mtd, 1)) { |
142 | kfree(spia_mtd); | |
1da177e4 LT |
143 | return -ENXIO; |
144 | } | |
145 | ||
146 | /* Register the partitions */ | |
147 | add_mtd_partitions(spia_mtd, partition_info, NUM_PARTITIONS); | |
148 | ||
149 | /* Return happy */ | |
150 | return 0; | |
151 | } | |
e0c7d767 | 152 | |
1da177e4 LT |
153 | module_init(spia_init); |
154 | ||
155 | /* | |
156 | * Clean up routine | |
157 | */ | |
e0c7d767 | 158 | static void __exit spia_cleanup(void) |
1da177e4 LT |
159 | { |
160 | /* Release resources, unregister device */ | |
e0c7d767 | 161 | nand_release(spia_mtd); |
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162 | |
163 | /* Free the MTD device structure */ | |
e0c7d767 | 164 | kfree(spia_mtd); |
1da177e4 | 165 | } |
e0c7d767 | 166 | |
1da177e4 | 167 | module_exit(spia_cleanup); |
1da177e4 LT |
168 | |
169 | MODULE_LICENSE("GPL"); | |
170 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com"); | |
171 | MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on SPIA board"); |