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1 | /* |
2 | * twl4030_core.c - driver for TWL4030/TPS659x0 PM and audio CODEC devices | |
3 | * | |
4 | * Copyright (C) 2005-2006 Texas Instruments, Inc. | |
5 | * | |
6 | * Modifications to defer interrupt handling to a kernel thread: | |
7 | * Copyright (C) 2006 MontaVista Software, Inc. | |
8 | * | |
9 | * Based on tlv320aic23.c: | |
10 | * Copyright (c) by Kai Svahn <kai.svahn@nokia.com> | |
11 | * | |
12 | * Code cleanup and modifications to IRQ handler. | |
13 | * by syed khasim <x0khasim@ti.com> | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, write to the Free Software | |
27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
28 | */ | |
29 | ||
30 | #include <linux/kernel_stat.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/mutex.h> | |
33 | #include <linux/interrupt.h> | |
34 | #include <linux/irq.h> | |
35 | #include <linux/random.h> | |
36 | #include <linux/kthread.h> | |
37 | #include <linux/platform_device.h> | |
38 | #include <linux/clk.h> | |
39 | ||
40 | #include <linux/i2c.h> | |
41 | #include <linux/i2c/twl4030.h> | |
42 | ||
43 | ||
44 | /* | |
45 | * The TWL4030 "Triton 2" is one of a family of a multi-function "Power | |
46 | * Management and System Companion Device" chips originally designed for | |
47 | * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C, | |
48 | * often at around 3 Mbit/sec, including for interrupt handling. | |
49 | * | |
50 | * This driver core provides genirq support for the interrupts emitted, | |
51 | * by the various modules, and exports register access primitives. | |
52 | * | |
53 | * FIXME this driver currently requires use of the first interrupt line | |
54 | * (and associated registers). | |
55 | */ | |
56 | ||
57 | #define DRIVER_NAME "twl4030" | |
58 | ||
59 | #if defined(CONFIG_TWL4030_BCI_BATTERY) || \ | |
60 | defined(CONFIG_TWL4030_BCI_BATTERY_MODULE) | |
61 | #define twl_has_bci() true | |
62 | #else | |
63 | #define twl_has_bci() false | |
64 | #endif | |
65 | ||
66 | #if defined(CONFIG_KEYBOARD_TWL4030) || defined(CONFIG_KEYBOARD_TWL4030_MODULE) | |
67 | #define twl_has_keypad() true | |
68 | #else | |
69 | #define twl_has_keypad() false | |
70 | #endif | |
71 | ||
72 | #if defined(CONFIG_GPIO_TWL4030) || defined(CONFIG_GPIO_TWL4030_MODULE) | |
73 | #define twl_has_gpio() true | |
74 | #else | |
75 | #define twl_has_gpio() false | |
76 | #endif | |
77 | ||
78 | #if defined(CONFIG_TWL4030_MADC) || defined(CONFIG_TWL4030_MADC_MODULE) | |
79 | #define twl_has_madc() true | |
80 | #else | |
81 | #define twl_has_madc() false | |
82 | #endif | |
83 | ||
84 | #if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE) | |
85 | #define twl_has_rtc() true | |
86 | #else | |
87 | #define twl_has_rtc() false | |
88 | #endif | |
89 | ||
90 | #if defined(CONFIG_TWL4030_USB) || defined(CONFIG_TWL4030_USB_MODULE) | |
91 | #define twl_has_usb() true | |
92 | #else | |
93 | #define twl_has_usb() false | |
94 | #endif | |
95 | ||
96 | static inline void activate_irq(int irq) | |
97 | { | |
98 | #ifdef CONFIG_ARM | |
99 | /* ARM requires an extra step to clear IRQ_NOREQUEST, which it | |
100 | * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE. | |
101 | */ | |
102 | set_irq_flags(irq, IRQF_VALID); | |
103 | #else | |
104 | /* same effect on other architectures */ | |
105 | set_irq_noprobe(irq); | |
106 | #endif | |
107 | } | |
108 | ||
109 | /* Primary Interrupt Handler on TWL4030 Registers */ | |
110 | ||
111 | /* Register Definitions */ | |
112 | ||
113 | #define REG_PIH_ISR_P1 (0x1) | |
114 | #define REG_PIH_ISR_P2 (0x2) | |
115 | #define REG_PIH_SIR (0x3) | |
116 | ||
117 | /* Triton Core internal information (BEGIN) */ | |
118 | ||
119 | /* Last - for index max*/ | |
120 | #define TWL4030_MODULE_LAST TWL4030_MODULE_SECURED_REG | |
121 | ||
122 | #define TWL4030_NUM_SLAVES 4 | |
123 | ||
124 | ||
125 | /* Base Address defns for twl4030_map[] */ | |
126 | ||
127 | /* subchip/slave 0 - USB ID */ | |
128 | #define TWL4030_BASEADD_USB 0x0000 | |
129 | ||
130 | /* subchip/slave 1 - AUD ID */ | |
131 | #define TWL4030_BASEADD_AUDIO_VOICE 0x0000 | |
132 | #define TWL4030_BASEADD_GPIO 0x0098 | |
133 | #define TWL4030_BASEADD_INTBR 0x0085 | |
134 | #define TWL4030_BASEADD_PIH 0x0080 | |
135 | #define TWL4030_BASEADD_TEST 0x004C | |
136 | ||
137 | /* subchip/slave 2 - AUX ID */ | |
138 | #define TWL4030_BASEADD_INTERRUPTS 0x00B9 | |
139 | #define TWL4030_BASEADD_LED 0x00EE | |
140 | #define TWL4030_BASEADD_MADC 0x0000 | |
141 | #define TWL4030_BASEADD_MAIN_CHARGE 0x0074 | |
142 | #define TWL4030_BASEADD_PRECHARGE 0x00AA | |
143 | #define TWL4030_BASEADD_PWM0 0x00F8 | |
144 | #define TWL4030_BASEADD_PWM1 0x00FB | |
145 | #define TWL4030_BASEADD_PWMA 0x00EF | |
146 | #define TWL4030_BASEADD_PWMB 0x00F1 | |
147 | #define TWL4030_BASEADD_KEYPAD 0x00D2 | |
148 | ||
149 | /* subchip/slave 3 - POWER ID */ | |
150 | #define TWL4030_BASEADD_BACKUP 0x0014 | |
151 | #define TWL4030_BASEADD_INT 0x002E | |
152 | #define TWL4030_BASEADD_PM_MASTER 0x0036 | |
153 | #define TWL4030_BASEADD_PM_RECEIVER 0x005B | |
154 | #define TWL4030_BASEADD_RTC 0x001C | |
155 | #define TWL4030_BASEADD_SECURED_REG 0x0000 | |
156 | ||
157 | /* Triton Core internal information (END) */ | |
158 | ||
159 | ||
160 | /* Few power values */ | |
161 | #define R_CFG_BOOT 0x05 | |
162 | #define R_PROTECT_KEY 0x0E | |
163 | ||
164 | /* access control values for R_PROTECT_KEY */ | |
165 | #define KEY_UNLOCK1 0xce | |
166 | #define KEY_UNLOCK2 0xec | |
167 | #define KEY_LOCK 0x00 | |
168 | ||
169 | /* some fields in R_CFG_BOOT */ | |
170 | #define HFCLK_FREQ_19p2_MHZ (1 << 0) | |
171 | #define HFCLK_FREQ_26_MHZ (2 << 0) | |
172 | #define HFCLK_FREQ_38p4_MHZ (3 << 0) | |
173 | #define HIGH_PERF_SQ (1 << 3) | |
174 | ||
175 | ||
176 | /*----------------------------------------------------------------------*/ | |
177 | ||
178 | /** | |
179 | * struct twl4030_mod_iregs - TWL module IMR/ISR regs to mask/clear at init | |
180 | * @mod_no: TWL4030 module number (e.g., TWL4030_MODULE_GPIO) | |
181 | * @sih_ctrl: address of module SIH_CTRL register | |
182 | * @reg_cnt: number of IMR/ISR regs | |
183 | * @imrs: pointer to array of TWL module interrupt mask register indices | |
184 | * @isrs: pointer to array of TWL module interrupt status register indices | |
185 | * | |
186 | * Ties together TWL4030 modules and lists of IMR/ISR registers to mask/clear | |
187 | * during twl_init_irq(). | |
188 | */ | |
189 | struct twl4030_mod_iregs { | |
190 | const u8 mod_no; | |
191 | const u8 sih_ctrl; | |
192 | const u8 reg_cnt; | |
193 | const u8 *imrs; | |
194 | const u8 *isrs; | |
195 | }; | |
196 | ||
197 | /* TWL4030 INT module interrupt mask registers */ | |
198 | static const u8 __initconst twl4030_int_imr_regs[] = { | |
199 | TWL4030_INT_PWR_IMR1, | |
200 | TWL4030_INT_PWR_IMR2, | |
201 | }; | |
202 | ||
203 | /* TWL4030 INT module interrupt status registers */ | |
204 | static const u8 __initconst twl4030_int_isr_regs[] = { | |
205 | TWL4030_INT_PWR_ISR1, | |
206 | TWL4030_INT_PWR_ISR2, | |
207 | }; | |
208 | ||
209 | /* TWL4030 INTERRUPTS module interrupt mask registers */ | |
210 | static const u8 __initconst twl4030_interrupts_imr_regs[] = { | |
211 | TWL4030_INTERRUPTS_BCIIMR1A, | |
212 | TWL4030_INTERRUPTS_BCIIMR1B, | |
213 | TWL4030_INTERRUPTS_BCIIMR2A, | |
214 | TWL4030_INTERRUPTS_BCIIMR2B, | |
215 | }; | |
216 | ||
217 | /* TWL4030 INTERRUPTS module interrupt status registers */ | |
218 | static const u8 __initconst twl4030_interrupts_isr_regs[] = { | |
219 | TWL4030_INTERRUPTS_BCIISR1A, | |
220 | TWL4030_INTERRUPTS_BCIISR1B, | |
221 | TWL4030_INTERRUPTS_BCIISR2A, | |
222 | TWL4030_INTERRUPTS_BCIISR2B, | |
223 | }; | |
224 | ||
225 | /* TWL4030 MADC module interrupt mask registers */ | |
226 | static const u8 __initconst twl4030_madc_imr_regs[] = { | |
227 | TWL4030_MADC_IMR1, | |
228 | TWL4030_MADC_IMR2, | |
229 | }; | |
230 | ||
231 | /* TWL4030 MADC module interrupt status registers */ | |
232 | static const u8 __initconst twl4030_madc_isr_regs[] = { | |
233 | TWL4030_MADC_ISR1, | |
234 | TWL4030_MADC_ISR2, | |
235 | }; | |
236 | ||
237 | /* TWL4030 keypad module interrupt mask registers */ | |
238 | static const u8 __initconst twl4030_keypad_imr_regs[] = { | |
239 | TWL4030_KEYPAD_KEYP_IMR1, | |
240 | TWL4030_KEYPAD_KEYP_IMR2, | |
241 | }; | |
242 | ||
243 | /* TWL4030 keypad module interrupt status registers */ | |
244 | static const u8 __initconst twl4030_keypad_isr_regs[] = { | |
245 | TWL4030_KEYPAD_KEYP_ISR1, | |
246 | TWL4030_KEYPAD_KEYP_ISR2, | |
247 | }; | |
248 | ||
249 | /* TWL4030 GPIO module interrupt mask registers */ | |
250 | static const u8 __initconst twl4030_gpio_imr_regs[] = { | |
251 | REG_GPIO_IMR1A, | |
252 | REG_GPIO_IMR1B, | |
253 | REG_GPIO_IMR2A, | |
254 | REG_GPIO_IMR2B, | |
255 | REG_GPIO_IMR3A, | |
256 | REG_GPIO_IMR3B, | |
257 | }; | |
258 | ||
259 | /* TWL4030 GPIO module interrupt status registers */ | |
260 | static const u8 __initconst twl4030_gpio_isr_regs[] = { | |
261 | REG_GPIO_ISR1A, | |
262 | REG_GPIO_ISR1B, | |
263 | REG_GPIO_ISR2A, | |
264 | REG_GPIO_ISR2B, | |
265 | REG_GPIO_ISR3A, | |
266 | REG_GPIO_ISR3B, | |
267 | }; | |
268 | ||
269 | /* TWL4030 modules that have IMR/ISR registers that must be masked/cleared */ | |
270 | static const struct twl4030_mod_iregs __initconst twl4030_mod_regs[] = { | |
271 | { | |
272 | .mod_no = TWL4030_MODULE_INT, | |
273 | .sih_ctrl = TWL4030_INT_PWR_SIH_CTRL, | |
274 | .reg_cnt = ARRAY_SIZE(twl4030_int_imr_regs), | |
275 | .imrs = twl4030_int_imr_regs, | |
276 | .isrs = twl4030_int_isr_regs, | |
277 | }, | |
278 | { | |
279 | .mod_no = TWL4030_MODULE_INTERRUPTS, | |
280 | .sih_ctrl = TWL4030_INTERRUPTS_BCISIHCTRL, | |
281 | .reg_cnt = ARRAY_SIZE(twl4030_interrupts_imr_regs), | |
282 | .imrs = twl4030_interrupts_imr_regs, | |
283 | .isrs = twl4030_interrupts_isr_regs, | |
284 | }, | |
285 | { | |
286 | .mod_no = TWL4030_MODULE_MADC, | |
287 | .sih_ctrl = TWL4030_MADC_SIH_CTRL, | |
288 | .reg_cnt = ARRAY_SIZE(twl4030_madc_imr_regs), | |
289 | .imrs = twl4030_madc_imr_regs, | |
290 | .isrs = twl4030_madc_isr_regs, | |
291 | }, | |
292 | { | |
293 | .mod_no = TWL4030_MODULE_KEYPAD, | |
294 | .sih_ctrl = TWL4030_KEYPAD_KEYP_SIH_CTRL, | |
295 | .reg_cnt = ARRAY_SIZE(twl4030_keypad_imr_regs), | |
296 | .imrs = twl4030_keypad_imr_regs, | |
297 | .isrs = twl4030_keypad_isr_regs, | |
298 | }, | |
299 | { | |
300 | .mod_no = TWL4030_MODULE_GPIO, | |
301 | .sih_ctrl = REG_GPIO_SIH_CTRL, | |
302 | .reg_cnt = ARRAY_SIZE(twl4030_gpio_imr_regs), | |
303 | .imrs = twl4030_gpio_imr_regs, | |
304 | .isrs = twl4030_gpio_isr_regs, | |
305 | }, | |
306 | }; | |
307 | ||
308 | /*----------------------------------------------------------------*/ | |
309 | ||
310 | /* is driver active, bound to a chip? */ | |
311 | static bool inuse; | |
312 | ||
313 | /* Structure for each TWL4030 Slave */ | |
314 | struct twl4030_client { | |
315 | struct i2c_client *client; | |
316 | u8 address; | |
317 | ||
318 | /* max numb of i2c_msg required is for read =2 */ | |
319 | struct i2c_msg xfer_msg[2]; | |
320 | ||
321 | /* To lock access to xfer_msg */ | |
322 | struct mutex xfer_lock; | |
323 | }; | |
324 | ||
325 | static struct twl4030_client twl4030_modules[TWL4030_NUM_SLAVES]; | |
326 | ||
327 | ||
328 | /* mapping the module id to slave id and base address */ | |
329 | struct twl4030mapping { | |
330 | unsigned char sid; /* Slave ID */ | |
331 | unsigned char base; /* base address */ | |
332 | }; | |
333 | ||
334 | static struct twl4030mapping twl4030_map[TWL4030_MODULE_LAST + 1] = { | |
335 | /* | |
336 | * NOTE: don't change this table without updating the | |
337 | * <linux/i2c/twl4030.h> defines for TWL4030_MODULE_* | |
338 | * so they continue to match the order in this table. | |
339 | */ | |
340 | ||
341 | { 0, TWL4030_BASEADD_USB }, | |
342 | ||
343 | { 1, TWL4030_BASEADD_AUDIO_VOICE }, | |
344 | { 1, TWL4030_BASEADD_GPIO }, | |
345 | { 1, TWL4030_BASEADD_INTBR }, | |
346 | { 1, TWL4030_BASEADD_PIH }, | |
347 | { 1, TWL4030_BASEADD_TEST }, | |
348 | ||
349 | { 2, TWL4030_BASEADD_KEYPAD }, | |
350 | { 2, TWL4030_BASEADD_MADC }, | |
351 | { 2, TWL4030_BASEADD_INTERRUPTS }, | |
352 | { 2, TWL4030_BASEADD_LED }, | |
353 | { 2, TWL4030_BASEADD_MAIN_CHARGE }, | |
354 | { 2, TWL4030_BASEADD_PRECHARGE }, | |
355 | { 2, TWL4030_BASEADD_PWM0 }, | |
356 | { 2, TWL4030_BASEADD_PWM1 }, | |
357 | { 2, TWL4030_BASEADD_PWMA }, | |
358 | { 2, TWL4030_BASEADD_PWMB }, | |
359 | ||
360 | { 3, TWL4030_BASEADD_BACKUP }, | |
361 | { 3, TWL4030_BASEADD_INT }, | |
362 | { 3, TWL4030_BASEADD_PM_MASTER }, | |
363 | { 3, TWL4030_BASEADD_PM_RECEIVER }, | |
364 | { 3, TWL4030_BASEADD_RTC }, | |
365 | { 3, TWL4030_BASEADD_SECURED_REG }, | |
366 | }; | |
367 | ||
368 | /*----------------------------------------------------------------------*/ | |
369 | ||
370 | /* | |
371 | * TWL4030 doesn't have PIH mask, hence dummy function for mask | |
372 | * and unmask of the (eight) interrupts reported at that level ... | |
373 | * masking is only available from SIH (secondary) modules. | |
374 | */ | |
375 | ||
376 | static void twl4030_i2c_ackirq(unsigned int irq) | |
377 | { | |
378 | } | |
379 | ||
380 | static void twl4030_i2c_disableint(unsigned int irq) | |
381 | { | |
382 | } | |
383 | ||
384 | static void twl4030_i2c_enableint(unsigned int irq) | |
385 | { | |
386 | } | |
387 | ||
388 | static struct irq_chip twl4030_irq_chip = { | |
389 | .name = "twl4030", | |
390 | .ack = twl4030_i2c_ackirq, | |
391 | .mask = twl4030_i2c_disableint, | |
392 | .unmask = twl4030_i2c_enableint, | |
393 | }; | |
394 | ||
395 | /*----------------------------------------------------------------------*/ | |
396 | ||
397 | /* Exported Functions */ | |
398 | ||
399 | /** | |
400 | * twl4030_i2c_write - Writes a n bit register in TWL4030 | |
401 | * @mod_no: module number | |
402 | * @value: an array of num_bytes+1 containing data to write | |
403 | * @reg: register address (just offset will do) | |
404 | * @num_bytes: number of bytes to transfer | |
405 | * | |
406 | * IMPORTANT: for 'value' parameter: Allocate value num_bytes+1 and | |
407 | * valid data starts at Offset 1. | |
408 | * | |
409 | * Returns the result of operation - 0 is success | |
410 | */ | |
411 | int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, u8 num_bytes) | |
412 | { | |
413 | int ret; | |
414 | int sid; | |
415 | struct twl4030_client *twl; | |
416 | struct i2c_msg *msg; | |
417 | ||
418 | if (unlikely(mod_no > TWL4030_MODULE_LAST)) { | |
419 | pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); | |
420 | return -EPERM; | |
421 | } | |
422 | sid = twl4030_map[mod_no].sid; | |
423 | twl = &twl4030_modules[sid]; | |
424 | ||
425 | if (unlikely(!inuse)) { | |
426 | pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid); | |
427 | return -EPERM; | |
428 | } | |
429 | mutex_lock(&twl->xfer_lock); | |
430 | /* | |
431 | * [MSG1]: fill the register address data | |
432 | * fill the data Tx buffer | |
433 | */ | |
434 | msg = &twl->xfer_msg[0]; | |
435 | msg->addr = twl->address; | |
436 | msg->len = num_bytes + 1; | |
437 | msg->flags = 0; | |
438 | msg->buf = value; | |
439 | /* over write the first byte of buffer with the register address */ | |
440 | *value = twl4030_map[mod_no].base + reg; | |
441 | ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 1); | |
442 | mutex_unlock(&twl->xfer_lock); | |
443 | ||
444 | /* i2cTransfer returns num messages.translate it pls.. */ | |
445 | if (ret >= 0) | |
446 | ret = 0; | |
447 | return ret; | |
448 | } | |
449 | EXPORT_SYMBOL(twl4030_i2c_write); | |
450 | ||
451 | /** | |
452 | * twl4030_i2c_read - Reads a n bit register in TWL4030 | |
453 | * @mod_no: module number | |
454 | * @value: an array of num_bytes containing data to be read | |
455 | * @reg: register address (just offset will do) | |
456 | * @num_bytes: number of bytes to transfer | |
457 | * | |
458 | * Returns result of operation - num_bytes is success else failure. | |
459 | */ | |
460 | int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, u8 num_bytes) | |
461 | { | |
462 | int ret; | |
463 | u8 val; | |
464 | int sid; | |
465 | struct twl4030_client *twl; | |
466 | struct i2c_msg *msg; | |
467 | ||
468 | if (unlikely(mod_no > TWL4030_MODULE_LAST)) { | |
469 | pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); | |
470 | return -EPERM; | |
471 | } | |
472 | sid = twl4030_map[mod_no].sid; | |
473 | twl = &twl4030_modules[sid]; | |
474 | ||
475 | if (unlikely(!inuse)) { | |
476 | pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid); | |
477 | return -EPERM; | |
478 | } | |
479 | mutex_lock(&twl->xfer_lock); | |
480 | /* [MSG1] fill the register address data */ | |
481 | msg = &twl->xfer_msg[0]; | |
482 | msg->addr = twl->address; | |
483 | msg->len = 1; | |
484 | msg->flags = 0; /* Read the register value */ | |
485 | val = twl4030_map[mod_no].base + reg; | |
486 | msg->buf = &val; | |
487 | /* [MSG2] fill the data rx buffer */ | |
488 | msg = &twl->xfer_msg[1]; | |
489 | msg->addr = twl->address; | |
490 | msg->flags = I2C_M_RD; /* Read the register value */ | |
491 | msg->len = num_bytes; /* only n bytes */ | |
492 | msg->buf = value; | |
493 | ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 2); | |
494 | mutex_unlock(&twl->xfer_lock); | |
495 | ||
496 | /* i2cTransfer returns num messages.translate it pls.. */ | |
497 | if (ret >= 0) | |
498 | ret = 0; | |
499 | return ret; | |
500 | } | |
501 | EXPORT_SYMBOL(twl4030_i2c_read); | |
502 | ||
503 | /** | |
504 | * twl4030_i2c_write_u8 - Writes a 8 bit register in TWL4030 | |
505 | * @mod_no: module number | |
506 | * @value: the value to be written 8 bit | |
507 | * @reg: register address (just offset will do) | |
508 | * | |
509 | * Returns result of operation - 0 is success | |
510 | */ | |
511 | int twl4030_i2c_write_u8(u8 mod_no, u8 value, u8 reg) | |
512 | { | |
513 | ||
514 | /* 2 bytes offset 1 contains the data offset 0 is used by i2c_write */ | |
515 | u8 temp_buffer[2] = { 0 }; | |
516 | /* offset 1 contains the data */ | |
517 | temp_buffer[1] = value; | |
518 | return twl4030_i2c_write(mod_no, temp_buffer, reg, 1); | |
519 | } | |
520 | EXPORT_SYMBOL(twl4030_i2c_write_u8); | |
521 | ||
522 | /** | |
523 | * twl4030_i2c_read_u8 - Reads a 8 bit register from TWL4030 | |
524 | * @mod_no: module number | |
525 | * @value: the value read 8 bit | |
526 | * @reg: register address (just offset will do) | |
527 | * | |
528 | * Returns result of operation - 0 is success | |
529 | */ | |
530 | int twl4030_i2c_read_u8(u8 mod_no, u8 *value, u8 reg) | |
531 | { | |
532 | return twl4030_i2c_read(mod_no, value, reg, 1); | |
533 | } | |
534 | EXPORT_SYMBOL(twl4030_i2c_read_u8); | |
535 | ||
536 | /*----------------------------------------------------------------------*/ | |
537 | ||
538 | /* | |
539 | * do_twl4030_module_irq() is the desc->handle method for each of the twl4030 | |
540 | * module interrupts that doesn't chain to another irq_chip (GPIO, power, etc). | |
541 | * It executes in kernel thread context. On entry, cpu interrupts are disabled. | |
542 | */ | |
543 | static void do_twl4030_module_irq(unsigned int irq, irq_desc_t *desc) | |
544 | { | |
545 | struct irqaction *action; | |
546 | const unsigned int cpu = smp_processor_id(); | |
547 | ||
548 | /* | |
549 | * Earlier this was desc->triggered = 1; | |
550 | */ | |
551 | desc->status |= IRQ_LEVEL; | |
552 | ||
553 | /* | |
554 | * The desc->handle method would normally call the desc->chip->ack | |
555 | * method here, but we won't bother since our ack method is NULL. | |
556 | */ | |
557 | ||
558 | if (!desc->depth) { | |
559 | kstat_cpu(cpu).irqs[irq]++; | |
560 | ||
561 | action = desc->action; | |
562 | if (action) { | |
563 | int ret; | |
564 | int status = 0; | |
565 | int retval = 0; | |
566 | ||
567 | local_irq_enable(); | |
568 | ||
569 | do { | |
570 | /* Call the ISR with cpu interrupts enabled */ | |
571 | ret = action->handler(irq, action->dev_id); | |
572 | if (ret == IRQ_HANDLED) | |
573 | status |= action->flags; | |
574 | retval |= ret; | |
575 | action = action->next; | |
576 | } while (action); | |
577 | ||
578 | if (status & IRQF_SAMPLE_RANDOM) | |
579 | add_interrupt_randomness(irq); | |
580 | ||
581 | local_irq_disable(); | |
582 | ||
583 | if (retval != IRQ_HANDLED) | |
584 | printk(KERN_ERR "ISR for TWL4030 module" | |
585 | " irq %d can't handle interrupt\n", | |
586 | irq); | |
587 | ||
588 | /* | |
589 | * Here is where we should call the unmask method, but | |
590 | * again we won't bother since it is NULL. | |
591 | */ | |
592 | } else | |
593 | printk(KERN_CRIT "TWL4030 module irq %d has no ISR" | |
594 | " but can't be masked!\n", irq); | |
595 | } else | |
596 | printk(KERN_CRIT "TWL4030 module irq %d is disabled but can't" | |
597 | " be masked!\n", irq); | |
598 | } | |
599 | ||
600 | static unsigned twl4030_irq_base; | |
601 | ||
602 | static struct completion irq_event; | |
603 | ||
604 | /* | |
605 | * This thread processes interrupts reported by the Primary Interrupt Handler. | |
606 | */ | |
607 | static int twl4030_irq_thread(void *data) | |
608 | { | |
609 | long irq = (long)data; | |
610 | irq_desc_t *desc = irq_desc + irq; | |
611 | static unsigned i2c_errors; | |
612 | const static unsigned max_i2c_errors = 100; | |
613 | ||
614 | daemonize("twl4030-irq"); | |
615 | current->flags |= PF_NOFREEZE; | |
616 | ||
617 | while (!kthread_should_stop()) { | |
618 | int ret; | |
619 | int module_irq; | |
620 | u8 pih_isr; | |
621 | ||
622 | /* Wait for IRQ, then read PIH irq status (also blocking) */ | |
623 | wait_for_completion_interruptible(&irq_event); | |
624 | ||
625 | ret = twl4030_i2c_read_u8(TWL4030_MODULE_PIH, &pih_isr, | |
626 | REG_PIH_ISR_P1); | |
627 | if (ret) { | |
628 | pr_warning("%s: I2C error %d reading PIH ISR\n", | |
629 | DRIVER_NAME, ret); | |
630 | if (++i2c_errors >= max_i2c_errors) { | |
631 | printk(KERN_ERR "Maximum I2C error count" | |
632 | " exceeded. Terminating %s.\n", | |
633 | __func__); | |
634 | break; | |
635 | } | |
636 | complete(&irq_event); | |
637 | continue; | |
638 | } | |
639 | ||
640 | /* these handlers deal with the relevant SIH irq status */ | |
641 | local_irq_disable(); | |
642 | for (module_irq = twl4030_irq_base; | |
643 | pih_isr; | |
644 | pih_isr >>= 1, module_irq++) { | |
645 | if (pih_isr & 0x1) { | |
646 | irq_desc_t *d = irq_desc + module_irq; | |
647 | ||
648 | d->handle_irq(module_irq, d); | |
649 | } | |
650 | } | |
651 | local_irq_enable(); | |
652 | ||
653 | desc->chip->unmask(irq); | |
654 | } | |
655 | ||
656 | return 0; | |
657 | } | |
658 | ||
659 | /* | |
660 | * do_twl4030_irq() is the desc->handle method for the twl4030 interrupt. | |
661 | * This is a chained interrupt, so there is no desc->action method for it. | |
662 | * Now we need to query the interrupt controller in the twl4030 to determine | |
663 | * which module is generating the interrupt request. However, we can't do i2c | |
664 | * transactions in interrupt context, so we must defer that work to a kernel | |
665 | * thread. All we do here is acknowledge and mask the interrupt and wakeup | |
666 | * the kernel thread. | |
667 | */ | |
668 | static void do_twl4030_irq(unsigned int irq, irq_desc_t *desc) | |
669 | { | |
670 | const unsigned int cpu = smp_processor_id(); | |
671 | ||
672 | /* | |
673 | * Earlier this was desc->triggered = 1; | |
674 | */ | |
675 | desc->status |= IRQ_LEVEL; | |
676 | ||
677 | /* | |
678 | * Acknowledge, clear _AND_ disable the interrupt. | |
679 | */ | |
680 | desc->chip->ack(irq); | |
681 | ||
682 | if (!desc->depth) { | |
683 | kstat_cpu(cpu).irqs[irq]++; | |
684 | ||
685 | complete(&irq_event); | |
686 | } | |
687 | } | |
688 | ||
689 | static struct task_struct * __init start_twl4030_irq_thread(long irq) | |
690 | { | |
691 | struct task_struct *thread; | |
692 | ||
693 | init_completion(&irq_event); | |
694 | thread = kthread_run(twl4030_irq_thread, (void *)irq, | |
695 | "twl4030 irq %ld", irq); | |
696 | if (!thread) | |
697 | pr_err("%s: could not create twl4030 irq %ld thread!\n", | |
698 | DRIVER_NAME, irq); | |
699 | ||
700 | return thread; | |
701 | } | |
702 | ||
703 | /*----------------------------------------------------------------------*/ | |
704 | ||
705 | static int add_children(struct twl4030_platform_data *pdata) | |
706 | { | |
707 | struct platform_device *pdev = NULL; | |
708 | struct twl4030_client *twl = NULL; | |
709 | int status = 0; | |
710 | ||
711 | if (twl_has_bci() && pdata->bci) { | |
712 | twl = &twl4030_modules[3]; | |
713 | ||
714 | pdev = platform_device_alloc("twl4030_bci", -1); | |
715 | if (!pdev) { | |
716 | pr_debug("%s: can't alloc bci dev\n", DRIVER_NAME); | |
717 | status = -ENOMEM; | |
718 | goto err; | |
719 | } | |
720 | ||
721 | if (status == 0) { | |
722 | pdev->dev.parent = &twl->client->dev; | |
723 | status = platform_device_add_data(pdev, pdata->bci, | |
724 | sizeof(*pdata->bci)); | |
725 | if (status < 0) { | |
726 | dev_dbg(&twl->client->dev, | |
727 | "can't add bci data, %d\n", | |
728 | status); | |
729 | goto err; | |
730 | } | |
731 | } | |
732 | ||
733 | if (status == 0) { | |
734 | struct resource r = { | |
735 | .start = TWL4030_PWRIRQ_CHG_PRES, | |
736 | .flags = IORESOURCE_IRQ, | |
737 | }; | |
738 | ||
739 | status = platform_device_add_resources(pdev, &r, 1); | |
740 | } | |
741 | ||
742 | if (status == 0) | |
743 | status = platform_device_add(pdev); | |
744 | ||
745 | if (status < 0) { | |
746 | platform_device_put(pdev); | |
747 | dev_dbg(&twl->client->dev, | |
748 | "can't create bci dev, %d\n", | |
749 | status); | |
750 | goto err; | |
751 | } | |
752 | } | |
753 | ||
754 | if (twl_has_gpio() && pdata->gpio) { | |
755 | twl = &twl4030_modules[1]; | |
756 | ||
757 | pdev = platform_device_alloc("twl4030_gpio", -1); | |
758 | if (!pdev) { | |
759 | pr_debug("%s: can't alloc gpio dev\n", DRIVER_NAME); | |
760 | status = -ENOMEM; | |
761 | goto err; | |
762 | } | |
763 | ||
764 | /* more driver model init */ | |
765 | if (status == 0) { | |
766 | pdev->dev.parent = &twl->client->dev; | |
767 | /* device_init_wakeup(&pdev->dev, 1); */ | |
768 | ||
769 | status = platform_device_add_data(pdev, pdata->gpio, | |
770 | sizeof(*pdata->gpio)); | |
771 | if (status < 0) { | |
772 | dev_dbg(&twl->client->dev, | |
773 | "can't add gpio data, %d\n", | |
774 | status); | |
775 | goto err; | |
776 | } | |
777 | } | |
778 | ||
779 | /* GPIO module IRQ */ | |
780 | if (status == 0) { | |
781 | struct resource r = { | |
782 | .start = pdata->irq_base + 0, | |
783 | .flags = IORESOURCE_IRQ, | |
784 | }; | |
785 | ||
786 | status = platform_device_add_resources(pdev, &r, 1); | |
787 | } | |
788 | ||
789 | if (status == 0) | |
790 | status = platform_device_add(pdev); | |
791 | ||
792 | if (status < 0) { | |
793 | platform_device_put(pdev); | |
794 | dev_dbg(&twl->client->dev, | |
795 | "can't create gpio dev, %d\n", | |
796 | status); | |
797 | goto err; | |
798 | } | |
799 | } | |
800 | ||
801 | if (twl_has_keypad() && pdata->keypad) { | |
802 | pdev = platform_device_alloc("twl4030_keypad", -1); | |
803 | if (pdev) { | |
804 | twl = &twl4030_modules[2]; | |
805 | pdev->dev.parent = &twl->client->dev; | |
806 | device_init_wakeup(&pdev->dev, 1); | |
807 | status = platform_device_add_data(pdev, pdata->keypad, | |
808 | sizeof(*pdata->keypad)); | |
809 | if (status < 0) { | |
810 | dev_dbg(&twl->client->dev, | |
811 | "can't add keypad data, %d\n", | |
812 | status); | |
813 | platform_device_put(pdev); | |
814 | goto err; | |
815 | } | |
816 | status = platform_device_add(pdev); | |
817 | if (status < 0) { | |
818 | platform_device_put(pdev); | |
819 | dev_dbg(&twl->client->dev, | |
820 | "can't create keypad dev, %d\n", | |
821 | status); | |
822 | goto err; | |
823 | } | |
824 | } else { | |
825 | pr_debug("%s: can't alloc keypad dev\n", DRIVER_NAME); | |
826 | status = -ENOMEM; | |
827 | goto err; | |
828 | } | |
829 | } | |
830 | ||
831 | if (twl_has_madc() && pdata->madc) { | |
832 | pdev = platform_device_alloc("twl4030_madc", -1); | |
833 | if (pdev) { | |
834 | twl = &twl4030_modules[2]; | |
835 | pdev->dev.parent = &twl->client->dev; | |
836 | device_init_wakeup(&pdev->dev, 1); | |
837 | status = platform_device_add_data(pdev, pdata->madc, | |
838 | sizeof(*pdata->madc)); | |
839 | if (status < 0) { | |
840 | platform_device_put(pdev); | |
841 | dev_dbg(&twl->client->dev, | |
842 | "can't add madc data, %d\n", | |
843 | status); | |
844 | goto err; | |
845 | } | |
846 | status = platform_device_add(pdev); | |
847 | if (status < 0) { | |
848 | platform_device_put(pdev); | |
849 | dev_dbg(&twl->client->dev, | |
850 | "can't create madc dev, %d\n", | |
851 | status); | |
852 | goto err; | |
853 | } | |
854 | } else { | |
855 | pr_debug("%s: can't alloc madc dev\n", DRIVER_NAME); | |
856 | status = -ENOMEM; | |
857 | goto err; | |
858 | } | |
859 | } | |
860 | ||
861 | if (twl_has_rtc()) { | |
862 | twl = &twl4030_modules[3]; | |
863 | ||
864 | pdev = platform_device_alloc("twl4030_rtc", -1); | |
865 | if (!pdev) { | |
866 | pr_debug("%s: can't alloc rtc dev\n", DRIVER_NAME); | |
867 | status = -ENOMEM; | |
868 | } else { | |
869 | pdev->dev.parent = &twl->client->dev; | |
870 | device_init_wakeup(&pdev->dev, 1); | |
871 | } | |
872 | ||
873 | /* | |
874 | * REVISIT platform_data here currently might use of | |
875 | * "msecure" line ... but for now we just expect board | |
876 | * setup to tell the chip "we are secure" at all times. | |
877 | * Eventually, Linux might become more aware of such | |
878 | * HW security concerns, and "least privilege". | |
879 | */ | |
880 | ||
881 | /* RTC module IRQ */ | |
882 | if (status == 0) { | |
883 | struct resource r = { | |
884 | /* REVISIT don't hard-wire this stuff */ | |
885 | .start = TWL4030_PWRIRQ_RTC, | |
886 | .flags = IORESOURCE_IRQ, | |
887 | }; | |
888 | ||
889 | status = platform_device_add_resources(pdev, &r, 1); | |
890 | } | |
891 | ||
892 | if (status == 0) | |
893 | status = platform_device_add(pdev); | |
894 | ||
895 | if (status < 0) { | |
896 | platform_device_put(pdev); | |
897 | dev_dbg(&twl->client->dev, | |
898 | "can't create rtc dev, %d\n", | |
899 | status); | |
900 | goto err; | |
901 | } | |
902 | } | |
903 | ||
904 | if (twl_has_usb() && pdata->usb) { | |
905 | twl = &twl4030_modules[0]; | |
906 | ||
907 | pdev = platform_device_alloc("twl4030_usb", -1); | |
908 | if (!pdev) { | |
909 | pr_debug("%s: can't alloc usb dev\n", DRIVER_NAME); | |
910 | status = -ENOMEM; | |
911 | goto err; | |
912 | } | |
913 | ||
914 | if (status == 0) { | |
915 | pdev->dev.parent = &twl->client->dev; | |
916 | device_init_wakeup(&pdev->dev, 1); | |
917 | status = platform_device_add_data(pdev, pdata->usb, | |
918 | sizeof(*pdata->usb)); | |
919 | if (status < 0) { | |
920 | platform_device_put(pdev); | |
921 | dev_dbg(&twl->client->dev, | |
922 | "can't add usb data, %d\n", | |
923 | status); | |
924 | goto err; | |
925 | } | |
926 | } | |
927 | ||
928 | if (status == 0) { | |
929 | struct resource r = { | |
930 | .start = TWL4030_PWRIRQ_USB_PRES, | |
931 | .flags = IORESOURCE_IRQ, | |
932 | }; | |
933 | ||
934 | status = platform_device_add_resources(pdev, &r, 1); | |
935 | } | |
936 | ||
937 | if (status == 0) | |
938 | status = platform_device_add(pdev); | |
939 | ||
940 | if (status < 0) { | |
941 | platform_device_put(pdev); | |
942 | dev_dbg(&twl->client->dev, | |
943 | "can't create usb dev, %d\n", | |
944 | status); | |
945 | } | |
946 | } | |
947 | ||
948 | err: | |
949 | if (status) | |
950 | pr_err("failed to add twl4030's children (status %d)\n", status); | |
951 | return status; | |
952 | } | |
953 | ||
954 | /*----------------------------------------------------------------------*/ | |
955 | ||
956 | /* | |
957 | * These three functions initialize the on-chip clock framework, | |
958 | * letting it generate the right frequencies for USB, MADC, and | |
959 | * other purposes. | |
960 | */ | |
961 | static inline int __init protect_pm_master(void) | |
962 | { | |
963 | int e = 0; | |
964 | ||
965 | e = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_LOCK, | |
966 | R_PROTECT_KEY); | |
967 | return e; | |
968 | } | |
969 | ||
970 | static inline int __init unprotect_pm_master(void) | |
971 | { | |
972 | int e = 0; | |
973 | ||
974 | e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_UNLOCK1, | |
975 | R_PROTECT_KEY); | |
976 | e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_UNLOCK2, | |
977 | R_PROTECT_KEY); | |
978 | return e; | |
979 | } | |
980 | ||
981 | static void __init clocks_init(void) | |
982 | { | |
983 | int e = 0; | |
984 | struct clk *osc; | |
985 | u32 rate; | |
986 | u8 ctrl = HFCLK_FREQ_26_MHZ; | |
987 | ||
988 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) | |
989 | if (cpu_is_omap2430()) | |
990 | osc = clk_get(NULL, "osc_ck"); | |
991 | else | |
992 | osc = clk_get(NULL, "osc_sys_ck"); | |
993 | #else | |
994 | /* REVISIT for non-OMAP systems, pass the clock rate from | |
995 | * board init code, using platform_data. | |
996 | */ | |
997 | osc = ERR_PTR(-EIO); | |
998 | #endif | |
999 | if (IS_ERR(osc)) { | |
1000 | printk(KERN_WARNING "Skipping twl4030 internal clock init and " | |
1001 | "using bootloader value (unknown osc rate)\n"); | |
1002 | return; | |
1003 | } | |
1004 | ||
1005 | rate = clk_get_rate(osc); | |
1006 | clk_put(osc); | |
1007 | ||
1008 | switch (rate) { | |
1009 | case 19200000: | |
1010 | ctrl = HFCLK_FREQ_19p2_MHZ; | |
1011 | break; | |
1012 | case 26000000: | |
1013 | ctrl = HFCLK_FREQ_26_MHZ; | |
1014 | break; | |
1015 | case 38400000: | |
1016 | ctrl = HFCLK_FREQ_38p4_MHZ; | |
1017 | break; | |
1018 | } | |
1019 | ||
1020 | ctrl |= HIGH_PERF_SQ; | |
1021 | e |= unprotect_pm_master(); | |
1022 | /* effect->MADC+USB ck en */ | |
1023 | e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, ctrl, R_CFG_BOOT); | |
1024 | e |= protect_pm_master(); | |
1025 | ||
1026 | if (e < 0) | |
1027 | pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e); | |
1028 | } | |
1029 | ||
1030 | /*----------------------------------------------------------------------*/ | |
1031 | ||
1032 | /** | |
1033 | * twl4030_i2c_clear_isr - clear TWL4030 SIH ISR regs via read + write | |
1034 | * @mod_no: TWL4030 module number | |
1035 | * @reg: register index to clear | |
1036 | * @cor: value of the <module>_SIH_CTRL.COR bit (1 or 0) | |
1037 | * | |
1038 | * Either reads (cor == 1) or writes (cor == 0) to a TWL4030 interrupt | |
1039 | * status register to ensure that any prior interrupts are cleared. | |
1040 | * Returns the status from the I2C read operation. | |
1041 | */ | |
1042 | static int __init twl4030_i2c_clear_isr(u8 mod_no, u8 reg, u8 cor) | |
1043 | { | |
1044 | u8 tmp; | |
1045 | ||
1046 | return (cor) ? twl4030_i2c_read_u8(mod_no, &tmp, reg) : | |
1047 | twl4030_i2c_write_u8(mod_no, 0xff, reg); | |
1048 | } | |
1049 | ||
1050 | /** | |
1051 | * twl4030_read_cor_bit - are TWL module ISRs cleared by reads or writes? | |
1052 | * @mod_no: TWL4030 module number | |
1053 | * @reg: register index to clear | |
1054 | * | |
1055 | * Returns 1 if the TWL4030 SIH interrupt status registers (ISRs) for | |
1056 | * the specified TWL module are cleared by reads, or 0 if cleared by | |
1057 | * writes. | |
1058 | */ | |
1059 | static int twl4030_read_cor_bit(u8 mod_no, u8 reg) | |
1060 | { | |
1061 | u8 tmp = 0; | |
1062 | ||
1063 | WARN_ON(twl4030_i2c_read_u8(mod_no, &tmp, reg) < 0); | |
1064 | ||
1065 | tmp &= TWL4030_SIH_CTRL_COR_MASK; | |
1066 | tmp >>= __ffs(TWL4030_SIH_CTRL_COR_MASK); | |
1067 | ||
1068 | return tmp; | |
1069 | } | |
1070 | ||
1071 | /** | |
1072 | * twl4030_mask_clear_intrs - mask and clear all TWL4030 interrupts | |
1073 | * @t: pointer to twl4030_mod_iregs array | |
1074 | * @t_sz: ARRAY_SIZE(t) (starting at 1) | |
1075 | * | |
1076 | * Mask all TWL4030 interrupt mask registers (IMRs) and clear all | |
1077 | * interrupt status registers (ISRs). No return value, but will WARN if | |
1078 | * any I2C operations fail. | |
1079 | */ | |
1080 | static void __init twl4030_mask_clear_intrs(const struct twl4030_mod_iregs *t, | |
1081 | const u8 t_sz) | |
1082 | { | |
1083 | int i, j; | |
1084 | ||
1085 | /* | |
1086 | * N.B. - further efficiency is possible here. Eight I2C | |
1087 | * operations on BCI and GPIO modules are avoidable if I2C | |
1088 | * burst read/write transactions were implemented. Would | |
1089 | * probably save about 1ms of boot time and a small amount of | |
1090 | * power. | |
1091 | */ | |
1092 | for (i = 0; i < t_sz; i++) { | |
1093 | const struct twl4030_mod_iregs tmr = t[i]; | |
1094 | int cor; | |
1095 | ||
1096 | /* Are ISRs cleared by reads or writes? */ | |
1097 | cor = twl4030_read_cor_bit(tmr.mod_no, tmr.sih_ctrl); | |
1098 | ||
1099 | for (j = 0; j < tmr.reg_cnt; j++) { | |
1100 | ||
1101 | /* Mask interrupts at the TWL4030 */ | |
1102 | WARN_ON(twl4030_i2c_write_u8(tmr.mod_no, 0xff, | |
1103 | tmr.imrs[j]) < 0); | |
1104 | ||
1105 | /* Clear TWL4030 ISRs */ | |
1106 | WARN_ON(twl4030_i2c_clear_isr(tmr.mod_no, | |
1107 | tmr.isrs[j], cor) < 0); | |
1108 | } | |
1109 | } | |
1110 | } | |
1111 | ||
1112 | ||
1113 | static void twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end) | |
1114 | { | |
1115 | int i; | |
1116 | ||
1117 | /* | |
1118 | * Mask and clear all TWL4030 interrupts since initially we do | |
1119 | * not have any TWL4030 module interrupt handlers present | |
1120 | */ | |
1121 | twl4030_mask_clear_intrs(twl4030_mod_regs, | |
1122 | ARRAY_SIZE(twl4030_mod_regs)); | |
1123 | ||
1124 | twl4030_irq_base = irq_base; | |
1125 | ||
1126 | /* install an irq handler for each of the PIH modules */ | |
1127 | for (i = irq_base; i < irq_end; i++) { | |
1128 | set_irq_chip_and_handler(i, &twl4030_irq_chip, | |
1129 | do_twl4030_module_irq); | |
1130 | activate_irq(i); | |
1131 | } | |
1132 | ||
1133 | /* install an irq handler to demultiplex the TWL4030 interrupt */ | |
1134 | set_irq_data(irq_num, start_twl4030_irq_thread(irq_num)); | |
1135 | set_irq_chained_handler(irq_num, do_twl4030_irq); | |
1136 | } | |
1137 | ||
1138 | /*----------------------------------------------------------------------*/ | |
1139 | ||
1140 | static int twl4030_remove(struct i2c_client *client) | |
1141 | { | |
1142 | unsigned i; | |
1143 | ||
1144 | /* FIXME undo twl_init_irq() */ | |
1145 | if (twl4030_irq_base) { | |
1146 | dev_err(&client->dev, "can't yet clean up IRQs?\n"); | |
1147 | return -ENOSYS; | |
1148 | } | |
1149 | ||
1150 | for (i = 0; i < TWL4030_NUM_SLAVES; i++) { | |
1151 | struct twl4030_client *twl = &twl4030_modules[i]; | |
1152 | ||
1153 | if (twl->client && twl->client != client) | |
1154 | i2c_unregister_device(twl->client); | |
1155 | twl4030_modules[i].client = NULL; | |
1156 | } | |
1157 | inuse = false; | |
1158 | return 0; | |
1159 | } | |
1160 | ||
1161 | /* NOTE: this driver only handles a single twl4030/tps659x0 chip */ | |
1162 | static int | |
1163 | twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id) | |
1164 | { | |
1165 | int status; | |
1166 | unsigned i; | |
1167 | struct twl4030_platform_data *pdata = client->dev.platform_data; | |
1168 | ||
1169 | if (!pdata) { | |
1170 | dev_dbg(&client->dev, "no platform data?\n"); | |
1171 | return -EINVAL; | |
1172 | } | |
1173 | ||
1174 | if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) { | |
1175 | dev_dbg(&client->dev, "can't talk I2C?\n"); | |
1176 | return -EIO; | |
1177 | } | |
1178 | ||
1179 | if (inuse || twl4030_irq_base) { | |
1180 | dev_dbg(&client->dev, "driver is already in use\n"); | |
1181 | return -EBUSY; | |
1182 | } | |
1183 | ||
1184 | for (i = 0; i < TWL4030_NUM_SLAVES; i++) { | |
1185 | struct twl4030_client *twl = &twl4030_modules[i]; | |
1186 | ||
1187 | twl->address = client->addr + i; | |
1188 | if (i == 0) | |
1189 | twl->client = client; | |
1190 | else { | |
1191 | twl->client = i2c_new_dummy(client->adapter, | |
1192 | twl->address); | |
1193 | if (!twl->client) { | |
1194 | dev_err(&twl->client->dev, | |
1195 | "can't attach client %d\n", i); | |
1196 | status = -ENOMEM; | |
1197 | goto fail; | |
1198 | } | |
1199 | strlcpy(twl->client->name, id->name, | |
1200 | sizeof(twl->client->name)); | |
1201 | } | |
1202 | mutex_init(&twl->xfer_lock); | |
1203 | } | |
1204 | inuse = true; | |
1205 | ||
1206 | /* setup clock framework */ | |
1207 | clocks_init(); | |
1208 | ||
1209 | /* Maybe init the T2 Interrupt subsystem */ | |
1210 | if (client->irq | |
1211 | && pdata->irq_base | |
1212 | && pdata->irq_end > pdata->irq_base) { | |
1213 | twl_init_irq(client->irq, pdata->irq_base, pdata->irq_end); | |
1214 | dev_info(&client->dev, "IRQ %d chains IRQs %d..%d\n", | |
1215 | client->irq, pdata->irq_base, pdata->irq_end - 1); | |
1216 | } | |
1217 | ||
1218 | status = add_children(pdata); | |
1219 | fail: | |
1220 | if (status < 0) | |
1221 | twl4030_remove(client); | |
1222 | return status; | |
1223 | } | |
1224 | ||
1225 | static const struct i2c_device_id twl4030_ids[] = { | |
1226 | { "twl4030", 0 }, /* "Triton 2" */ | |
1227 | { "tps65950", 0 }, /* catalog version of twl4030 */ | |
1228 | { "tps65930", 0 }, /* fewer LDOs and DACs; no charger */ | |
1229 | { "tps65920", 0 }, /* fewer LDOs; no codec or charger */ | |
1230 | { "twl5030", 0 }, /* T2 updated */ | |
1231 | { /* end of list */ }, | |
1232 | }; | |
1233 | MODULE_DEVICE_TABLE(i2c, twl4030_ids); | |
1234 | ||
1235 | /* One Client Driver , 4 Clients */ | |
1236 | static struct i2c_driver twl4030_driver = { | |
1237 | .driver.name = DRIVER_NAME, | |
1238 | .id_table = twl4030_ids, | |
1239 | .probe = twl4030_probe, | |
1240 | .remove = twl4030_remove, | |
1241 | }; | |
1242 | ||
1243 | static int __init twl4030_init(void) | |
1244 | { | |
1245 | return i2c_add_driver(&twl4030_driver); | |
1246 | } | |
1247 | subsys_initcall(twl4030_init); | |
1248 | ||
1249 | static void __exit twl4030_exit(void) | |
1250 | { | |
1251 | i2c_del_driver(&twl4030_driver); | |
1252 | } | |
1253 | module_exit(twl4030_exit); | |
1254 | ||
1255 | MODULE_AUTHOR("Texas Instruments, Inc."); | |
1256 | MODULE_DESCRIPTION("I2C Core interface for TWL4030"); | |
1257 | MODULE_LICENSE("GPL"); |