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mfd: Add support for STMPE SPI interface
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / mfd / stmpe.c
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27e34995 1/*
1a6e4b74
VK		 2 * ST Microelectronics MFD: stmpe's driver
3 *
27e34995
RV		 4 * Copyright (C) ST-Ericsson SA 2010
5 *
6 * License Terms: GNU General Public License, version 2
7 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
8 */
9
73de16db 10#include <linux/gpio.h>
27e34995 11#include <linux/kernel.h>
27e34995
RV		 12#include <linux/interrupt.h>
13#include <linux/irq.h>
1a6e4b74 14#include <linux/pm.h>
27e34995 15#include <linux/slab.h>
27e34995 16#include <linux/mfd/core.h>
27e34995
RV		 17#include "stmpe.h"
18
19static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
20{
21 return stmpe->variant->enable(stmpe, blocks, true);
22}
23
24static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
25{
26 return stmpe->variant->enable(stmpe, blocks, false);
27}
28
29static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg)
30{
31 int ret;
32
1a6e4b74 33 ret = stmpe->ci->read_byte(stmpe, reg);
27e34995 34 if (ret < 0)
1a6e4b74 35 dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret);
27e34995
RV		 36
37 dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret);
38
39 return ret;
40}
41
42static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
43{
44 int ret;
45
46 dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val);
47
1a6e4b74 48 ret = stmpe->ci->write_byte(stmpe, reg, val);
27e34995 49 if (ret < 0)
1a6e4b74 50 dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret);
27e34995
RV		 51
52 return ret;
53}
54
55static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
56{
57 int ret;
58
59 ret = __stmpe_reg_read(stmpe, reg);
60 if (ret < 0)
61 return ret;
62
63 ret &= ~mask;
64 ret |= val;
65
66 return __stmpe_reg_write(stmpe, reg, ret);
67}
68
69static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
70 u8 *values)
71{
72 int ret;
73
1a6e4b74 74 ret = stmpe->ci->read_block(stmpe, reg, length, values);
27e34995 75 if (ret < 0)
1a6e4b74 76 dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret);
27e34995
RV		 77
78 dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret);
79 stmpe_dump_bytes("stmpe rd: ", values, length);
80
81 return ret;
82}
83
84static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
85 const u8 *values)
86{
87 int ret;
88
89 dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length);
90 stmpe_dump_bytes("stmpe wr: ", values, length);
91
1a6e4b74 92 ret = stmpe->ci->write_block(stmpe, reg, length, values);
27e34995 93 if (ret < 0)
1a6e4b74 94 dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret);
27e34995
RV		 95
96 return ret;
97}
98
99/**
100 * stmpe_enable - enable blocks on an STMPE device
101 * @stmpe: Device to work on
102 * @blocks: Mask of blocks (enum stmpe_block values) to enable
103 */
104int stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
105{
106 int ret;
107
108 mutex_lock(&stmpe->lock);
109 ret = __stmpe_enable(stmpe, blocks);
110 mutex_unlock(&stmpe->lock);
111
112 return ret;
113}
114EXPORT_SYMBOL_GPL(stmpe_enable);
115
116/**
117 * stmpe_disable - disable blocks on an STMPE device
118 * @stmpe: Device to work on
119 * @blocks: Mask of blocks (enum stmpe_block values) to enable
120 */
121int stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
122{
123 int ret;
124
125 mutex_lock(&stmpe->lock);
126 ret = __stmpe_disable(stmpe, blocks);
127 mutex_unlock(&stmpe->lock);
128
129 return ret;
130}
131EXPORT_SYMBOL_GPL(stmpe_disable);
132
133/**
134 * stmpe_reg_read() - read a single STMPE register
135 * @stmpe: Device to read from
136 * @reg: Register to read
137 */
138int stmpe_reg_read(struct stmpe *stmpe, u8 reg)
139{
140 int ret;
141
142 mutex_lock(&stmpe->lock);
143 ret = __stmpe_reg_read(stmpe, reg);
144 mutex_unlock(&stmpe->lock);
145
146 return ret;
147}
148EXPORT_SYMBOL_GPL(stmpe_reg_read);
149
150/**
151 * stmpe_reg_write() - write a single STMPE register
152 * @stmpe: Device to write to
153 * @reg: Register to write
154 * @val: Value to write
155 */
156int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
157{
158 int ret;
159
160 mutex_lock(&stmpe->lock);
161 ret = __stmpe_reg_write(stmpe, reg, val);
162 mutex_unlock(&stmpe->lock);
163
164 return ret;
165}
166EXPORT_SYMBOL_GPL(stmpe_reg_write);
167
168/**
169 * stmpe_set_bits() - set the value of a bitfield in a STMPE register
170 * @stmpe: Device to write to
171 * @reg: Register to write
172 * @mask: Mask of bits to set
173 * @val: Value to set
174 */
175int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
176{
177 int ret;
178
179 mutex_lock(&stmpe->lock);
180 ret = __stmpe_set_bits(stmpe, reg, mask, val);
181 mutex_unlock(&stmpe->lock);
182
183 return ret;
184}
185EXPORT_SYMBOL_GPL(stmpe_set_bits);
186
187/**
188 * stmpe_block_read() - read multiple STMPE registers
189 * @stmpe: Device to read from
190 * @reg: First register
191 * @length: Number of registers
192 * @values: Buffer to write to
193 */
194int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values)
195{
196 int ret;
197
198 mutex_lock(&stmpe->lock);
199 ret = __stmpe_block_read(stmpe, reg, length, values);
200 mutex_unlock(&stmpe->lock);
201
202 return ret;
203}
204EXPORT_SYMBOL_GPL(stmpe_block_read);
205
206/**
207 * stmpe_block_write() - write multiple STMPE registers
208 * @stmpe: Device to write to
209 * @reg: First register
210 * @length: Number of registers
211 * @values: Values to write
212 */
213int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
214 const u8 *values)
215{
216 int ret;
217
218 mutex_lock(&stmpe->lock);
219 ret = __stmpe_block_write(stmpe, reg, length, values);
220 mutex_unlock(&stmpe->lock);
221
222 return ret;
223}
224EXPORT_SYMBOL_GPL(stmpe_block_write);
225
226/**
4dcaa6b6 227 * stmpe_set_altfunc()- set the alternate function for STMPE pins
27e34995
RV		 228 * @stmpe: Device to configure
229 * @pins: Bitmask of pins to affect
230 * @block: block to enable alternate functions for
231 *
232 * @pins is assumed to have a bit set for each of the bits whose alternate
233 * function is to be changed, numbered according to the GPIOXY numbers.
234 *
235 * If the GPIO module is not enabled, this function automatically enables it in
236 * order to perform the change.
237 */
238int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block)
239{
240 struct stmpe_variant_info *variant = stmpe->variant;
241 u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB];
242 int af_bits = variant->af_bits;
243 int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8);
244 int afperreg = 8 / af_bits;
245 int mask = (1 << af_bits) - 1;
246 u8 regs[numregs];
247 int af;
248 int ret;
249
250 mutex_lock(&stmpe->lock);
251
252 ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
253 if (ret < 0)
254 goto out;
255
256 ret = __stmpe_block_read(stmpe, regaddr, numregs, regs);
257 if (ret < 0)
258 goto out;
259
260 af = variant->get_altfunc(stmpe, block);
261
262 while (pins) {
263 int pin = __ffs(pins);
264 int regoffset = numregs - (pin / afperreg) - 1;
265 int pos = (pin % afperreg) * (8 / afperreg);
266
267 regs[regoffset] &= ~(mask << pos);
268 regs[regoffset] |= af << pos;
269
270 pins &= ~(1 << pin);
271 }
272
273 ret = __stmpe_block_write(stmpe, regaddr, numregs, regs);
274
275out:
276 mutex_unlock(&stmpe->lock);
277 return ret;
278}
279EXPORT_SYMBOL_GPL(stmpe_set_altfunc);
280
281/*
282 * GPIO (all variants)
283 */
284
285static struct resource stmpe_gpio_resources[] = {
286 /* Start and end filled dynamically */
287 {
288 .flags = IORESOURCE_IRQ,
289 },
290};
291
292static struct mfd_cell stmpe_gpio_cell = {
293 .name = "stmpe-gpio",
294 .resources = stmpe_gpio_resources,
295 .num_resources = ARRAY_SIZE(stmpe_gpio_resources),
296};
297
298/*
299 * Keypad (1601, 2401, 2403)
300 */
301
302static struct resource stmpe_keypad_resources[] = {
303 {
304 .name = "KEYPAD",
305 .start = 0,
306 .end = 0,
307 .flags = IORESOURCE_IRQ,
308 },
309 {
310 .name = "KEYPAD_OVER",
311 .start = 1,
312 .end = 1,
313 .flags = IORESOURCE_IRQ,
314 },
315};
316
317static struct mfd_cell stmpe_keypad_cell = {
318 .name = "stmpe-keypad",
319 .resources = stmpe_keypad_resources,
320 .num_resources = ARRAY_SIZE(stmpe_keypad_resources),
321};
322
323/*
324 * Touchscreen (STMPE811)
325 */
326
327static struct resource stmpe_ts_resources[] = {
328 {
329 .name = "TOUCH_DET",
330 .start = 0,
331 .end = 0,
332 .flags = IORESOURCE_IRQ,
333 },
334 {
335 .name = "FIFO_TH",
336 .start = 1,
337 .end = 1,
338 .flags = IORESOURCE_IRQ,
339 },
340};
341
342static struct mfd_cell stmpe_ts_cell = {
343 .name = "stmpe-ts",
344 .resources = stmpe_ts_resources,
345 .num_resources = ARRAY_SIZE(stmpe_ts_resources),
346};
347
348/*
349 * STMPE811
350 */
351
352static const u8 stmpe811_regs[] = {
353 [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID,
354 [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL,
355 [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN,
356 [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA,
357 [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA,
358 [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN,
359 [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN,
360 [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR,
361 [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE,
362 [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE,
363 [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF,
364 [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN,
365 [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA,
366 [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED,
367};
368
369static struct stmpe_variant_block stmpe811_blocks[] = {
370 {
371 .cell = &stmpe_gpio_cell,
372 .irq = STMPE811_IRQ_GPIOC,
373 .block = STMPE_BLOCK_GPIO,
374 },
375 {
376 .cell = &stmpe_ts_cell,
377 .irq = STMPE811_IRQ_TOUCH_DET,
378 .block = STMPE_BLOCK_TOUCHSCREEN,
379 },
380};
381
382static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks,
383 bool enable)
384{
385 unsigned int mask = 0;
386
387 if (blocks & STMPE_BLOCK_GPIO)
388 mask |= STMPE811_SYS_CTRL2_GPIO_OFF;
389
390 if (blocks & STMPE_BLOCK_ADC)
391 mask |= STMPE811_SYS_CTRL2_ADC_OFF;
392
393 if (blocks & STMPE_BLOCK_TOUCHSCREEN)
394 mask |= STMPE811_SYS_CTRL2_TSC_OFF;
395
396 return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask,
397 enable ? 0 : mask);
398}
399
400static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
401{
402 /* 0 for touchscreen, 1 for GPIO */
403 return block != STMPE_BLOCK_TOUCHSCREEN;
404}
405
406static struct stmpe_variant_info stmpe811 = {
407 .name = "stmpe811",
408 .id_val = 0x0811,
409 .id_mask = 0xffff,
410 .num_gpios = 8,
411 .af_bits = 1,
412 .regs = stmpe811_regs,
413 .blocks = stmpe811_blocks,
414 .num_blocks = ARRAY_SIZE(stmpe811_blocks),
415 .num_irqs = STMPE811_NR_INTERNAL_IRQS,
416 .enable = stmpe811_enable,
417 .get_altfunc = stmpe811_get_altfunc,
418};
419
420/*
421 * STMPE1601
422 */
423
424static const u8 stmpe1601_regs[] = {
425 [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID,
426 [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB,
427 [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB,
428 [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB,
429 [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB,
430 [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB,
431 [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB,
432 [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB,
433 [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB,
434 [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB,
435 [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB,
436 [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
437 [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB,
438 [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB,
439};
440
441static struct stmpe_variant_block stmpe1601_blocks[] = {
442 {
443 .cell = &stmpe_gpio_cell,
444 .irq = STMPE24XX_IRQ_GPIOC,
445 .block = STMPE_BLOCK_GPIO,
446 },
447 {
448 .cell = &stmpe_keypad_cell,
449 .irq = STMPE24XX_IRQ_KEYPAD,
450 .block = STMPE_BLOCK_KEYPAD,
451 },
452};
453
5981f4e6
SI		 454/* supported autosleep timeout delay (in msecs) */
455static const int stmpe_autosleep_delay[] = {
456 4, 16, 32, 64, 128, 256, 512, 1024,
457};
458
459static int stmpe_round_timeout(int timeout)
460{
461 int i;
462
463 for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) {
464 if (stmpe_autosleep_delay[i] >= timeout)
465 return i;
466 }
467
468 /*
469 * requests for delays longer than supported should not return the
470 * longest supported delay
471 */
472 return -EINVAL;
473}
474
475static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout)
476{
477 int ret;
478
479 if (!stmpe->variant->enable_autosleep)
480 return -ENOSYS;
481
482 mutex_lock(&stmpe->lock);
483 ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout);
484 mutex_unlock(&stmpe->lock);
485
486 return ret;
487}
488
489/*
490 * Both stmpe 1601/2403 support same layout for autosleep
491 */
492static int stmpe1601_autosleep(struct stmpe *stmpe,
493 int autosleep_timeout)
494{
495 int ret, timeout;
496
497 /* choose the best available timeout */
498 timeout = stmpe_round_timeout(autosleep_timeout);
499 if (timeout < 0) {
500 dev_err(stmpe->dev, "invalid timeout\n");
501 return timeout;
502 }
503
504 ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
505 STMPE1601_AUTOSLEEP_TIMEOUT_MASK,
506 timeout);
507 if (ret < 0)
508 return ret;
509
510 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
511 STPME1601_AUTOSLEEP_ENABLE,
512 STPME1601_AUTOSLEEP_ENABLE);
513}
514
27e34995
RV		 515static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks,
516 bool enable)
517{
518 unsigned int mask = 0;
519
520 if (blocks & STMPE_BLOCK_GPIO)
521 mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO;
522
523 if (blocks & STMPE_BLOCK_KEYPAD)
524 mask |= STMPE1601_SYS_CTRL_ENABLE_KPC;
525
526 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask,
527 enable ? mask : 0);
528}
529
530static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
531{
532 switch (block) {
533 case STMPE_BLOCK_PWM:
534 return 2;
535
536 case STMPE_BLOCK_KEYPAD:
537 return 1;
538
539 case STMPE_BLOCK_GPIO:
540 default:
541 return 0;
542 }
543}
544
545static struct stmpe_variant_info stmpe1601 = {
546 .name = "stmpe1601",
547 .id_val = 0x0210,
548 .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */
549 .num_gpios = 16,
550 .af_bits = 2,
551 .regs = stmpe1601_regs,
552 .blocks = stmpe1601_blocks,
553 .num_blocks = ARRAY_SIZE(stmpe1601_blocks),
554 .num_irqs = STMPE1601_NR_INTERNAL_IRQS,
555 .enable = stmpe1601_enable,
556 .get_altfunc = stmpe1601_get_altfunc,
5981f4e6 557 .enable_autosleep = stmpe1601_autosleep,
27e34995
RV		 558};
559
560/*
561 * STMPE24XX
562 */
563
564static const u8 stmpe24xx_regs[] = {
565 [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID,
566 [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB,
567 [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB,
568 [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB,
569 [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB,
570 [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB,
571 [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB,
572 [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB,
573 [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB,
574 [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB,
575 [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB,
576 [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB,
577 [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB,
578 [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB,
579};
580
581static struct stmpe_variant_block stmpe24xx_blocks[] = {
582 {
583 .cell = &stmpe_gpio_cell,
584 .irq = STMPE24XX_IRQ_GPIOC,
585 .block = STMPE_BLOCK_GPIO,
586 },
587 {
588 .cell = &stmpe_keypad_cell,
589 .irq = STMPE24XX_IRQ_KEYPAD,
590 .block = STMPE_BLOCK_KEYPAD,
591 },
592};
593
594static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
595 bool enable)
596{
597 unsigned int mask = 0;
598
599 if (blocks & STMPE_BLOCK_GPIO)
600 mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO;
601
602 if (blocks & STMPE_BLOCK_KEYPAD)
603 mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC;
604
605 return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask,
606 enable ? mask : 0);
607}
608
609static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
610{
611 switch (block) {
612 case STMPE_BLOCK_ROTATOR:
613 return 2;
614
615 case STMPE_BLOCK_KEYPAD:
616 return 1;
617
618 case STMPE_BLOCK_GPIO:
619 default:
620 return 0;
621 }
622}
623
624static struct stmpe_variant_info stmpe2401 = {
625 .name = "stmpe2401",
626 .id_val = 0x0101,
627 .id_mask = 0xffff,
628 .num_gpios = 24,
629 .af_bits = 2,
630 .regs = stmpe24xx_regs,
631 .blocks = stmpe24xx_blocks,
632 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks),
633 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS,
634 .enable = stmpe24xx_enable,
635 .get_altfunc = stmpe24xx_get_altfunc,
636};
637
638static struct stmpe_variant_info stmpe2403 = {
639 .name = "stmpe2403",
640 .id_val = 0x0120,
641 .id_mask = 0xffff,
642 .num_gpios = 24,
643 .af_bits = 2,
644 .regs = stmpe24xx_regs,
645 .blocks = stmpe24xx_blocks,
646 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks),
647 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS,
648 .enable = stmpe24xx_enable,
649 .get_altfunc = stmpe24xx_get_altfunc,
5981f4e6 650 .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */
27e34995
RV		 651};
652
653static struct stmpe_variant_info *stmpe_variant_info[] = {
654 [STMPE811] = &stmpe811,
655 [STMPE1601] = &stmpe1601,
656 [STMPE2401] = &stmpe2401,
657 [STMPE2403] = &stmpe2403,
658};
659
660static irqreturn_t stmpe_irq(int irq, void *data)
661{
662 struct stmpe *stmpe = data;
663 struct stmpe_variant_info *variant = stmpe->variant;
664 int num = DIV_ROUND_UP(variant->num_irqs, 8);
665 u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
666 u8 isr[num];
667 int ret;
668 int i;
669
670 ret = stmpe_block_read(stmpe, israddr, num, isr);
671 if (ret < 0)
672 return IRQ_NONE;
673
674 for (i = 0; i < num; i++) {
675 int bank = num - i - 1;
676 u8 status = isr[i];
677 u8 clear;
678
679 status &= stmpe->ier[bank];
680 if (!status)
681 continue;
682
683 clear = status;
684 while (status) {
685 int bit = __ffs(status);
686 int line = bank * 8 + bit;
687
688 handle_nested_irq(stmpe->irq_base + line);
689 status &= ~(1 << bit);
690 }
691
692 stmpe_reg_write(stmpe, israddr + i, clear);
693 }
694
695 return IRQ_HANDLED;
696}
697
43b8c084 698static void stmpe_irq_lock(struct irq_data *data)
27e34995 699{
43b8c084 700 struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
27e34995
RV		 701
702 mutex_lock(&stmpe->irq_lock);
703}
704
43b8c084 705static void stmpe_irq_sync_unlock(struct irq_data *data)
27e34995 706{
43b8c084 707 struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
27e34995
RV		 708 struct stmpe_variant_info *variant = stmpe->variant;
709 int num = DIV_ROUND_UP(variant->num_irqs, 8);
710 int i;
711
712 for (i = 0; i < num; i++) {
713 u8 new = stmpe->ier[i];
714 u8 old = stmpe->oldier[i];
715
716 if (new == old)
717 continue;
718
719 stmpe->oldier[i] = new;
720 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new);
721 }
722
723 mutex_unlock(&stmpe->irq_lock);
724}
725
43b8c084 726static void stmpe_irq_mask(struct irq_data *data)
27e34995 727{
43b8c084
MB		 728 struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
729 int offset = data->irq - stmpe->irq_base;
27e34995
RV		 730 int regoffset = offset / 8;
731 int mask = 1 << (offset % 8);
732
733 stmpe->ier[regoffset] &= ~mask;
734}
735
43b8c084 736static void stmpe_irq_unmask(struct irq_data *data)
27e34995 737{
43b8c084
MB		 738 struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
739 int offset = data->irq - stmpe->irq_base;
27e34995
RV		 740 int regoffset = offset / 8;
741 int mask = 1 << (offset % 8);
742
743 stmpe->ier[regoffset] |= mask;
744}
745
746static struct irq_chip stmpe_irq_chip = {
747 .name = "stmpe",
43b8c084
MB		 748 .irq_bus_lock = stmpe_irq_lock,
749 .irq_bus_sync_unlock = stmpe_irq_sync_unlock,
750 .irq_mask = stmpe_irq_mask,
751 .irq_unmask = stmpe_irq_unmask,
27e34995
RV		 752};
753
754static int __devinit stmpe_irq_init(struct stmpe *stmpe)
755{
756 int num_irqs = stmpe->variant->num_irqs;
757 int base = stmpe->irq_base;
758 int irq;
759
760 for (irq = base; irq < base + num_irqs; irq++) {
d5bb1221
TG		 761 irq_set_chip_data(irq, stmpe);
762 irq_set_chip_and_handler(irq, &stmpe_irq_chip,
27e34995 763 handle_edge_irq);
d5bb1221 764 irq_set_nested_thread(irq, 1);
27e34995
RV		 765#ifdef CONFIG_ARM
766 set_irq_flags(irq, IRQF_VALID);
767#else
d5bb1221 768 irq_set_noprobe(irq);
27e34995
RV		 769#endif
770 }
771
772 return 0;
773}
774
775static void stmpe_irq_remove(struct stmpe *stmpe)
776{
777 int num_irqs = stmpe->variant->num_irqs;
778 int base = stmpe->irq_base;
779 int irq;
780
781 for (irq = base; irq < base + num_irqs; irq++) {
782#ifdef CONFIG_ARM
783 set_irq_flags(irq, 0);
784#endif
d5bb1221
TG		 785 irq_set_chip_and_handler(irq, NULL, NULL);
786 irq_set_chip_data(irq, NULL);
27e34995
RV		 787 }
788}
789
790static int __devinit stmpe_chip_init(struct stmpe *stmpe)
791{
792 unsigned int irq_trigger = stmpe->pdata->irq_trigger;
5981f4e6 793 int autosleep_timeout = stmpe->pdata->autosleep_timeout;
27e34995
RV		 794 struct stmpe_variant_info *variant = stmpe->variant;
795 u8 icr = STMPE_ICR_LSB_GIM;
796 unsigned int id;
797 u8 data[2];
798 int ret;
799
800 ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID],
801 ARRAY_SIZE(data), data);
802 if (ret < 0)
803 return ret;
804
805 id = (data[0] << 8) | data[1];
806 if ((id & variant->id_mask) != variant->id_val) {
807 dev_err(stmpe->dev, "unknown chip id: %#x\n", id);
808 return -EINVAL;
809 }
810
811 dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id);
812
813 /* Disable all modules -- subdrivers should enable what they need. */
814 ret = stmpe_disable(stmpe, ~0);
815 if (ret)
816 return ret;
817
818 if (irq_trigger == IRQF_TRIGGER_FALLING ||
819 irq_trigger == IRQF_TRIGGER_RISING)
820 icr |= STMPE_ICR_LSB_EDGE;
821
822 if (irq_trigger == IRQF_TRIGGER_RISING ||
823 irq_trigger == IRQF_TRIGGER_HIGH)
824 icr |= STMPE_ICR_LSB_HIGH;
825
826 if (stmpe->pdata->irq_invert_polarity)
827 icr ^= STMPE_ICR_LSB_HIGH;
828
5981f4e6
SI		 829 if (stmpe->pdata->autosleep) {
830 ret = stmpe_autosleep(stmpe, autosleep_timeout);
831 if (ret)
832 return ret;
833 }
834
27e34995
RV		 835 return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr);
836}
837
838static int __devinit stmpe_add_device(struct stmpe *stmpe,
839 struct mfd_cell *cell, int irq)
840{
841 return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
842 NULL, stmpe->irq_base + irq);
843}
844
845static int __devinit stmpe_devices_init(struct stmpe *stmpe)
846{
847 struct stmpe_variant_info *variant = stmpe->variant;
848 unsigned int platform_blocks = stmpe->pdata->blocks;
849 int ret = -EINVAL;
850 int i;
851
852 for (i = 0; i < variant->num_blocks; i++) {
853 struct stmpe_variant_block *block = &variant->blocks[i];
854
855 if (!(platform_blocks & block->block))
856 continue;
857
858 platform_blocks &= ~block->block;
859 ret = stmpe_add_device(stmpe, block->cell, block->irq);
860 if (ret)
861 return ret;
862 }
863
864 if (platform_blocks)
865 dev_warn(stmpe->dev,
866 "platform wants blocks (%#x) not present on variant",
867 platform_blocks);
868
869 return ret;
870}
871
1a6e4b74
VK		 872/* Called from client specific probe routines */
873int stmpe_probe(struct stmpe_client_info *ci, int partnum)
208c4343 874{
1a6e4b74 875 struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev);
27e34995
RV		 876 struct stmpe *stmpe;
877 int ret;
878
879 if (!pdata)
880 return -EINVAL;
881
882 stmpe = kzalloc(sizeof(struct stmpe), GFP_KERNEL);
883 if (!stmpe)
884 return -ENOMEM;
885
886 mutex_init(&stmpe->irq_lock);
887 mutex_init(&stmpe->lock);
888
1a6e4b74
VK		 889 stmpe->dev = ci->dev;
890 stmpe->client = ci->client;
27e34995
RV		 891 stmpe->pdata = pdata;
892 stmpe->irq_base = pdata->irq_base;
1a6e4b74
VK		 893 stmpe->ci = ci;
894 stmpe->partnum = partnum;
895 stmpe->variant = stmpe_variant_info[partnum];
27e34995
RV		 896 stmpe->regs = stmpe->variant->regs;
897 stmpe->num_gpios = stmpe->variant->num_gpios;
1a6e4b74 898 dev_set_drvdata(stmpe->dev, stmpe);
27e34995 899
1a6e4b74
VK		 900 if (ci->init)
901 ci->init(stmpe);
27e34995 902
73de16db
VK		 903 if (pdata->irq_over_gpio) {
904 ret = gpio_request_one(pdata->irq_gpio, GPIOF_DIR_IN, "stmpe");
905 if (ret) {
906 dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n",
907 ret);
908 goto out_free;
909 }
910
911 stmpe->irq = gpio_to_irq(pdata->irq_gpio);
912 } else {
1a6e4b74 913 stmpe->irq = ci->irq;
73de16db
VK		 914 }
915
27e34995
RV		 916 ret = stmpe_chip_init(stmpe);
917 if (ret)
73de16db 918 goto free_gpio;
27e34995
RV		 919
920 ret = stmpe_irq_init(stmpe);
921 if (ret)
73de16db 922 goto free_gpio;
27e34995 923
73de16db 924 ret = request_threaded_irq(stmpe->irq, NULL, stmpe_irq,
1a6e4b74 925 pdata->irq_trigger | IRQF_ONESHOT, "stmpe", stmpe);
27e34995
RV		 926 if (ret) {
927 dev_err(stmpe->dev, "failed to request IRQ: %d\n", ret);
928 goto out_removeirq;
929 }
930
931 ret = stmpe_devices_init(stmpe);
932 if (ret) {
933 dev_err(stmpe->dev, "failed to add children\n");
934 goto out_removedevs;
935 }
936
937 return 0;
938
939out_removedevs:
940 mfd_remove_devices(stmpe->dev);
73de16db 941 free_irq(stmpe->irq, stmpe);
27e34995
RV		 942out_removeirq:
943 stmpe_irq_remove(stmpe);
73de16db
VK		 944free_gpio:
945 if (pdata->irq_over_gpio)
946 gpio_free(pdata->irq_gpio);
27e34995
RV		 947out_free:
948 kfree(stmpe);
949 return ret;
950}
951
1a6e4b74 952int stmpe_remove(struct stmpe *stmpe)
27e34995 953{
27e34995
RV		 954 mfd_remove_devices(stmpe->dev);
955
73de16db 956 free_irq(stmpe->irq, stmpe);
27e34995
RV		 957 stmpe_irq_remove(stmpe);
958
73de16db
VK		 959 if (stmpe->pdata->irq_over_gpio)
960 gpio_free(stmpe->pdata->irq_gpio);
961
27e34995
RV		 962 kfree(stmpe);
963
964 return 0;
965}
966
208c4343 967#ifdef CONFIG_PM
1a6e4b74
VK		 968static int stmpe_suspend(struct device *dev)
969{
970 struct stmpe *stmpe = dev_get_drvdata(dev);
208c4343 971
1a6e4b74
VK		 972 if (device_may_wakeup(dev))
973 enable_irq_wake(stmpe->irq);
27e34995 974
1a6e4b74 975 return 0;
27e34995 976}
27e34995 977
1a6e4b74 978static int stmpe_resume(struct device *dev)
27e34995 979{
1a6e4b74
VK		 980 struct stmpe *stmpe = dev_get_drvdata(dev);
981
982 if (device_may_wakeup(dev))
983 disable_irq_wake(stmpe->irq);
984
985 return 0;
27e34995 986}
27e34995 987
1a6e4b74
VK		 988const struct dev_pm_ops stmpe_dev_pm_ops = {
989 .suspend = stmpe_suspend,
990 .resume = stmpe_resume,
991};
992#endif
kernel source for telekom puls (alcatel/mediatek)