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mfd: cs47l15: Fix an update made to patch file
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / mfd / intel-lpss-pci.c
CommitLineData
4b45efe8
AS		 1/*
2 * Intel LPSS PCI support.
3 *
4 * Copyright (C) 2015, Intel Corporation
5 *
6 * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 * Mika Westerberg <mika.westerberg@linux.intel.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/ioport.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/pm.h>
19#include <linux/pm_runtime.h>
028af594 20#include <linux/property.h>
4b45efe8
AS		 21
22#include "intel-lpss.h"
23
24static int intel_lpss_pci_probe(struct pci_dev *pdev,
25 const struct pci_device_id *id)
26{
27 struct intel_lpss_platform_info *info;
28 int ret;
29
30 ret = pcim_enable_device(pdev);
31 if (ret)
32 return ret;
33
34 info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info),
35 GFP_KERNEL);
36 if (!info)
37 return -ENOMEM;
38
39 info->mem = &pdev->resource[0];
40 info->irq = pdev->irq;
41
42 /* Probably it is enough to set this for iDMA capable devices only */
43 pci_set_master(pdev);
85a9419a 44 pci_try_set_mwi(pdev);
4b45efe8
AS		 45
46 ret = intel_lpss_probe(&pdev->dev, info);
47 if (ret)
48 return ret;
49
50 pm_runtime_put(&pdev->dev);
51 pm_runtime_allow(&pdev->dev);
52
53 return 0;
54}
55
56static void intel_lpss_pci_remove(struct pci_dev *pdev)
57{
58 pm_runtime_forbid(&pdev->dev);
59 pm_runtime_get_sync(&pdev->dev);
60
61 intel_lpss_remove(&pdev->dev);
62}
63
64static INTEL_LPSS_PM_OPS(intel_lpss_pci_pm_ops);
65
66static const struct intel_lpss_platform_info spt_info = {
67 .clk_rate = 120000000,
68};
69
028af594
MW		 70static struct property_entry spt_i2c_properties[] = {
71 PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
72 { },
73};
74
028af594
MW		 75static const struct intel_lpss_platform_info spt_i2c_info = {
76 .clk_rate = 120000000,
f4d05266 77 .properties = spt_i2c_properties,
028af594
MW		 78};
79
ec14c539
AS		 80static struct property_entry uart_properties[] = {
81 PROPERTY_ENTRY_U32("reg-io-width", 4),
82 PROPERTY_ENTRY_U32("reg-shift", 2),
83 PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
84 { },
85};
86
4b45efe8
AS		 87static const struct intel_lpss_platform_info spt_uart_info = {
88 .clk_rate = 120000000,
89 .clk_con_id = "baudclk",
f4d05266 90 .properties = uart_properties,
4b45efe8
AS		 91};
92
ff0a04a6
AS		 93static const struct intel_lpss_platform_info bxt_info = {
94 .clk_rate = 100000000,
95};
96
97static const struct intel_lpss_platform_info bxt_uart_info = {
98 .clk_rate = 100000000,
99 .clk_con_id = "baudclk",
f4d05266 100 .properties = uart_properties,
ff0a04a6
AS		 101};
102
0343b2f4
MW		 103static struct property_entry bxt_i2c_properties[] = {
104 PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42),
105 PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
106 PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
107 { },
108};
109
ff0a04a6
AS		 110static const struct intel_lpss_platform_info bxt_i2c_info = {
111 .clk_rate = 133000000,
f4d05266 112 .properties = bxt_i2c_properties,
ff0a04a6
AS		 113};
114
c50cdd62
JN		 115static struct property_entry apl_i2c_properties[] = {
116 PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 207),
117 PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
118 PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
119 { },
120};
121
122static const struct intel_lpss_platform_info apl_i2c_info = {
123 .clk_rate = 133000000,
124 .properties = apl_i2c_properties,
125};
126
4b45efe8 127static const struct pci_device_id intel_lpss_pci_ids[] = {
023269cc 128 /* BXT A-Step */
ff0a04a6
AS		 129 { PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info },
130 { PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info },
131 { PCI_VDEVICE(INTEL, 0x0ab0), (kernel_ulong_t)&bxt_i2c_info },
132 { PCI_VDEVICE(INTEL, 0x0ab2), (kernel_ulong_t)&bxt_i2c_info },
133 { PCI_VDEVICE(INTEL, 0x0ab4), (kernel_ulong_t)&bxt_i2c_info },
134 { PCI_VDEVICE(INTEL, 0x0ab6), (kernel_ulong_t)&bxt_i2c_info },
135 { PCI_VDEVICE(INTEL, 0x0ab8), (kernel_ulong_t)&bxt_i2c_info },
136 { PCI_VDEVICE(INTEL, 0x0aba), (kernel_ulong_t)&bxt_i2c_info },
137 { PCI_VDEVICE(INTEL, 0x0abc), (kernel_ulong_t)&bxt_uart_info },
138 { PCI_VDEVICE(INTEL, 0x0abe), (kernel_ulong_t)&bxt_uart_info },
139 { PCI_VDEVICE(INTEL, 0x0ac0), (kernel_ulong_t)&bxt_uart_info },
140 { PCI_VDEVICE(INTEL, 0x0ac2), (kernel_ulong_t)&bxt_info },
141 { PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info },
142 { PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info },
143 { PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info },
023269cc
HZ		 144 /* BXT B-Step */
145 { PCI_VDEVICE(INTEL, 0x1aac), (kernel_ulong_t)&bxt_i2c_info },
146 { PCI_VDEVICE(INTEL, 0x1aae), (kernel_ulong_t)&bxt_i2c_info },
147 { PCI_VDEVICE(INTEL, 0x1ab0), (kernel_ulong_t)&bxt_i2c_info },
148 { PCI_VDEVICE(INTEL, 0x1ab2), (kernel_ulong_t)&bxt_i2c_info },
149 { PCI_VDEVICE(INTEL, 0x1ab4), (kernel_ulong_t)&bxt_i2c_info },
150 { PCI_VDEVICE(INTEL, 0x1ab6), (kernel_ulong_t)&bxt_i2c_info },
151 { PCI_VDEVICE(INTEL, 0x1ab8), (kernel_ulong_t)&bxt_i2c_info },
152 { PCI_VDEVICE(INTEL, 0x1aba), (kernel_ulong_t)&bxt_i2c_info },
153 { PCI_VDEVICE(INTEL, 0x1abc), (kernel_ulong_t)&bxt_uart_info },
154 { PCI_VDEVICE(INTEL, 0x1abe), (kernel_ulong_t)&bxt_uart_info },
155 { PCI_VDEVICE(INTEL, 0x1ac0), (kernel_ulong_t)&bxt_uart_info },
156 { PCI_VDEVICE(INTEL, 0x1ac2), (kernel_ulong_t)&bxt_info },
157 { PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info },
158 { PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info },
159 { PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info },
f80e78aa
AS		 160 /* GLK */
161 { PCI_VDEVICE(INTEL, 0x31ac), (kernel_ulong_t)&bxt_i2c_info },
162 { PCI_VDEVICE(INTEL, 0x31ae), (kernel_ulong_t)&bxt_i2c_info },
163 { PCI_VDEVICE(INTEL, 0x31b0), (kernel_ulong_t)&bxt_i2c_info },
164 { PCI_VDEVICE(INTEL, 0x31b2), (kernel_ulong_t)&bxt_i2c_info },
165 { PCI_VDEVICE(INTEL, 0x31b4), (kernel_ulong_t)&bxt_i2c_info },
166 { PCI_VDEVICE(INTEL, 0x31b6), (kernel_ulong_t)&bxt_i2c_info },
167 { PCI_VDEVICE(INTEL, 0x31b8), (kernel_ulong_t)&bxt_i2c_info },
168 { PCI_VDEVICE(INTEL, 0x31ba), (kernel_ulong_t)&bxt_i2c_info },
169 { PCI_VDEVICE(INTEL, 0x31bc), (kernel_ulong_t)&bxt_uart_info },
170 { PCI_VDEVICE(INTEL, 0x31be), (kernel_ulong_t)&bxt_uart_info },
171 { PCI_VDEVICE(INTEL, 0x31c0), (kernel_ulong_t)&bxt_uart_info },
172 { PCI_VDEVICE(INTEL, 0x31ee), (kernel_ulong_t)&bxt_uart_info },
173 { PCI_VDEVICE(INTEL, 0x31c2), (kernel_ulong_t)&bxt_info },
174 { PCI_VDEVICE(INTEL, 0x31c4), (kernel_ulong_t)&bxt_info },
175 { PCI_VDEVICE(INTEL, 0x31c6), (kernel_ulong_t)&bxt_info },
ff0a04a6 176 /* APL */
c50cdd62
JN		 177 { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info },
178 { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info },
179 { PCI_VDEVICE(INTEL, 0x5ab0), (kernel_ulong_t)&apl_i2c_info },
180 { PCI_VDEVICE(INTEL, 0x5ab2), (kernel_ulong_t)&apl_i2c_info },
181 { PCI_VDEVICE(INTEL, 0x5ab4), (kernel_ulong_t)&apl_i2c_info },
182 { PCI_VDEVICE(INTEL, 0x5ab6), (kernel_ulong_t)&apl_i2c_info },
183 { PCI_VDEVICE(INTEL, 0x5ab8), (kernel_ulong_t)&apl_i2c_info },
184 { PCI_VDEVICE(INTEL, 0x5aba), (kernel_ulong_t)&apl_i2c_info },
ff0a04a6
AS		 185 { PCI_VDEVICE(INTEL, 0x5abc), (kernel_ulong_t)&bxt_uart_info },
186 { PCI_VDEVICE(INTEL, 0x5abe), (kernel_ulong_t)&bxt_uart_info },
187 { PCI_VDEVICE(INTEL, 0x5ac0), (kernel_ulong_t)&bxt_uart_info },
188 { PCI_VDEVICE(INTEL, 0x5ac2), (kernel_ulong_t)&bxt_info },
189 { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info },
190 { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info },
191 { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info },
4b45efe8
AS		 192 /* SPT-LP */
193 { PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info },
194 { PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info },
195 { PCI_VDEVICE(INTEL, 0x9d29), (kernel_ulong_t)&spt_info },
196 { PCI_VDEVICE(INTEL, 0x9d2a), (kernel_ulong_t)&spt_info },
028af594
MW		 197 { PCI_VDEVICE(INTEL, 0x9d60), (kernel_ulong_t)&spt_i2c_info },
198 { PCI_VDEVICE(INTEL, 0x9d61), (kernel_ulong_t)&spt_i2c_info },
199 { PCI_VDEVICE(INTEL, 0x9d62), (kernel_ulong_t)&spt_i2c_info },
200 { PCI_VDEVICE(INTEL, 0x9d63), (kernel_ulong_t)&spt_i2c_info },
201 { PCI_VDEVICE(INTEL, 0x9d64), (kernel_ulong_t)&spt_i2c_info },
202 { PCI_VDEVICE(INTEL, 0x9d65), (kernel_ulong_t)&spt_i2c_info },
4b45efe8 203 { PCI_VDEVICE(INTEL, 0x9d66), (kernel_ulong_t)&spt_uart_info },
b418bbff
AS		 204 /* CNL-LP */
205 { PCI_VDEVICE(INTEL, 0x9da8), (kernel_ulong_t)&spt_uart_info },
206 { PCI_VDEVICE(INTEL, 0x9da9), (kernel_ulong_t)&spt_uart_info },
207 { PCI_VDEVICE(INTEL, 0x9daa), (kernel_ulong_t)&spt_info },
208 { PCI_VDEVICE(INTEL, 0x9dab), (kernel_ulong_t)&spt_info },
209 { PCI_VDEVICE(INTEL, 0x9dfb), (kernel_ulong_t)&spt_info },
210 { PCI_VDEVICE(INTEL, 0x9dc5), (kernel_ulong_t)&spt_i2c_info },
211 { PCI_VDEVICE(INTEL, 0x9dc6), (kernel_ulong_t)&spt_i2c_info },
212 { PCI_VDEVICE(INTEL, 0x9dc7), (kernel_ulong_t)&spt_uart_info },
213 { PCI_VDEVICE(INTEL, 0x9de8), (kernel_ulong_t)&spt_i2c_info },
214 { PCI_VDEVICE(INTEL, 0x9de9), (kernel_ulong_t)&spt_i2c_info },
215 { PCI_VDEVICE(INTEL, 0x9dea), (kernel_ulong_t)&spt_i2c_info },
216 { PCI_VDEVICE(INTEL, 0x9deb), (kernel_ulong_t)&spt_i2c_info },
4b45efe8
AS		 217 /* SPT-H */
218 { PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info },
219 { PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info },
220 { PCI_VDEVICE(INTEL, 0xa129), (kernel_ulong_t)&spt_info },
221 { PCI_VDEVICE(INTEL, 0xa12a), (kernel_ulong_t)&spt_info },
028af594
MW		 222 { PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_i2c_info },
223 { PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_i2c_info },
e4b91470 224 { PCI_VDEVICE(INTEL, 0xa162), (kernel_ulong_t)&spt_i2c_info },
4b45efe8 225 { PCI_VDEVICE(INTEL, 0xa166), (kernel_ulong_t)&spt_uart_info },
77fc5ff6 226 /* KBL-H */
2c8c3416
JN		 227 { PCI_VDEVICE(INTEL, 0xa2a7), (kernel_ulong_t)&spt_uart_info },
228 { PCI_VDEVICE(INTEL, 0xa2a8), (kernel_ulong_t)&spt_uart_info },
229 { PCI_VDEVICE(INTEL, 0xa2a9), (kernel_ulong_t)&spt_info },
230 { PCI_VDEVICE(INTEL, 0xa2aa), (kernel_ulong_t)&spt_info },
231 { PCI_VDEVICE(INTEL, 0xa2e0), (kernel_ulong_t)&spt_i2c_info },
232 { PCI_VDEVICE(INTEL, 0xa2e1), (kernel_ulong_t)&spt_i2c_info },
233 { PCI_VDEVICE(INTEL, 0xa2e2), (kernel_ulong_t)&spt_i2c_info },
234 { PCI_VDEVICE(INTEL, 0xa2e3), (kernel_ulong_t)&spt_i2c_info },
235 { PCI_VDEVICE(INTEL, 0xa2e6), (kernel_ulong_t)&spt_uart_info },
b418bbff
AS		 236 /* CNL-H */
237 { PCI_VDEVICE(INTEL, 0xa328), (kernel_ulong_t)&spt_uart_info },
238 { PCI_VDEVICE(INTEL, 0xa329), (kernel_ulong_t)&spt_uart_info },
239 { PCI_VDEVICE(INTEL, 0xa32a), (kernel_ulong_t)&spt_info },
240 { PCI_VDEVICE(INTEL, 0xa32b), (kernel_ulong_t)&spt_info },
241 { PCI_VDEVICE(INTEL, 0xa37b), (kernel_ulong_t)&spt_info },
242 { PCI_VDEVICE(INTEL, 0xa347), (kernel_ulong_t)&spt_uart_info },
243 { PCI_VDEVICE(INTEL, 0xa368), (kernel_ulong_t)&spt_i2c_info },
244 { PCI_VDEVICE(INTEL, 0xa369), (kernel_ulong_t)&spt_i2c_info },
245 { PCI_VDEVICE(INTEL, 0xa36a), (kernel_ulong_t)&spt_i2c_info },
246 { PCI_VDEVICE(INTEL, 0xa36b), (kernel_ulong_t)&spt_i2c_info },
4b45efe8
AS		 247 { }
248};
249MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids);
250
251static struct pci_driver intel_lpss_pci_driver = {
252 .name = "intel-lpss",
253 .id_table = intel_lpss_pci_ids,
254 .probe = intel_lpss_pci_probe,
255 .remove = intel_lpss_pci_remove,
256 .driver = {
257 .pm = &intel_lpss_pci_pm_ops,
258 },
259};
260
261module_pci_driver(intel_lpss_pci_driver);
262
263MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
264MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
265MODULE_DESCRIPTION("Intel LPSS PCI driver");
266MODULE_LICENSE("GPL v2");