[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / vpx3220.c

/*
 * vpx3220a, vpx3216b & vpx3214c video decoder driver version 0.0.1
 *
 * Copyright (C) 2001 Laurent Pinchart <lpinchart@freegates.be>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/types.h>
#include <asm/uaccess.h>
#include <linux/i2c.h>
#include <linux/videodev2.h>
#include <media/v4l2-device.h>
#include <media/v4l2-chip-ident.h>
#include <media/v4l2-i2c-drv.h>

MODULE_DESCRIPTION("vpx3220a/vpx3216b/vpx3214c video decoder driver");
MODULE_AUTHOR("Laurent Pinchart");
MODULE_LICENSE("GPL");

static int debug;
module_param(debug, int, 0);
MODULE_PARM_DESC(debug, "Debug level (0-1)");


#define VPX_TIMEOUT_COUNT  10

/* ----------------------------------------------------------------------- */

struct vpx3220 {
	struct v4l2_subdev sd;
	unsigned char reg[255];

	v4l2_std_id norm;
	int ident;
	int input;
	int enable;
	int bright;
	int contrast;
	int hue;
	int sat;
};

static inline struct vpx3220 *to_vpx3220(struct v4l2_subdev *sd)
{
	return container_of(sd, struct vpx3220, sd);
}

static char *inputs[] = { "internal", "composite", "svideo" };

/* ----------------------------------------------------------------------- */

static inline int vpx3220_write(struct v4l2_subdev *sd, u8 reg, u8 value)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);
	struct vpx3220 *decoder = i2c_get_clientdata(client);

	decoder->reg[reg] = value;
	return i2c_smbus_write_byte_data(client, reg, value);
}

static inline int vpx3220_read(struct v4l2_subdev *sd, u8 reg)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);

	return i2c_smbus_read_byte_data(client, reg);
}

static int vpx3220_fp_status(struct v4l2_subdev *sd)
{
	unsigned char status;
	unsigned int i;

	for (i = 0; i < VPX_TIMEOUT_COUNT; i++) {
		status = vpx3220_read(sd, 0x29);

		if (!(status & 4))
			return 0;

		udelay(10);

		if (need_resched())
			cond_resched();
	}

	return -1;
}

static int vpx3220_fp_write(struct v4l2_subdev *sd, u8 fpaddr, u16 data)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);

	/* Write the 16-bit address to the FPWR register */
	if (i2c_smbus_write_word_data(client, 0x27, swab16(fpaddr)) == -1) {
		v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
		return -1;
	}

	if (vpx3220_fp_status(sd) < 0)
		return -1;

	/* Write the 16-bit data to the FPDAT register */
	if (i2c_smbus_write_word_data(client, 0x28, swab16(data)) == -1) {
		v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
		return -1;
	}

	return 0;
}

static u16 vpx3220_fp_read(struct v4l2_subdev *sd, u16 fpaddr)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);
	s16 data;

	/* Write the 16-bit address to the FPRD register */
	if (i2c_smbus_write_word_data(client, 0x26, swab16(fpaddr)) == -1) {
		v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
		return -1;
	}

	if (vpx3220_fp_status(sd) < 0)
		return -1;

	/* Read the 16-bit data from the FPDAT register */
	data = i2c_smbus_read_word_data(client, 0x28);
	if (data == -1) {
		v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
		return -1;
	}

	return swab16(data);
}

static int vpx3220_write_block(struct v4l2_subdev *sd, const u8 *data, unsigned int len)
{
	u8 reg;
	int ret = -1;

	while (len >= 2) {
		reg = *data++;
		ret = vpx3220_write(sd, reg, *data++);
		if (ret < 0)
			break;
		len -= 2;
	}

	return ret;
}

static int vpx3220_write_fp_block(struct v4l2_subdev *sd,
		const u16 *data, unsigned int len)
{
	u8 reg;
	int ret = 0;

	while (len > 1) {
		reg = *data++;
		ret |= vpx3220_fp_write(sd, reg, *data++);
		len -= 2;
	}

	return ret;
}

/* ---------------------------------------------------------------------- */

static const unsigned short init_ntsc[] = {
	0x1c, 0x00,		/* NTSC tint angle */
	0x88, 17,		/* Window 1 vertical */
	0x89, 240,		/* Vertical lines in */
	0x8a, 240,		/* Vertical lines out */
	0x8b, 000,		/* Horizontal begin */
	0x8c, 640,		/* Horizontal length */
	0x8d, 640,		/* Number of pixels */
	0x8f, 0xc00,		/* Disable window 2 */
	0xf0, 0x73,		/* 13.5 MHz transport, Forced
				 * mode, latch windows */
	0xf2, 0x13,		/* NTSC M, composite input */
	0xe7, 0x1e1,		/* Enable vertical standard
				 * locking @ 240 lines */
};

static const unsigned short init_pal[] = {
	0x88, 23,		/* Window 1 vertical begin */
	0x89, 288,		/* Vertical lines in (16 lines
				 * skipped by the VFE) */
	0x8a, 288,		/* Vertical lines out (16 lines
				 * skipped by the VFE) */
	0x8b, 16,		/* Horizontal begin */
	0x8c, 768,		/* Horizontal length */
	0x8d, 784, 		/* Number of pixels
				 * Must be >= Horizontal begin + Horizontal length */
	0x8f, 0xc00,		/* Disable window 2 */
	0xf0, 0x77,		/* 13.5 MHz transport, Forced
				 * mode, latch windows */
	0xf2, 0x3d1,		/* PAL B,G,H,I, composite input */
	0xe7, 0x241,		/* PAL/SECAM set to 288 lines */
};

static const unsigned short init_secam[] = {
	0x88, 23,		/* Window 1 vertical begin */
	0x89, 288,		/* Vertical lines in (16 lines
				 * skipped by the VFE) */
	0x8a, 288,		/* Vertical lines out (16 lines
				 * skipped by the VFE) */
	0x8b, 16,		/* Horizontal begin */
	0x8c, 768,		/* Horizontal length */
	0x8d, 784,		/* Number of pixels
				 * Must be >= Horizontal begin + Horizontal length */
	0x8f, 0xc00,		/* Disable window 2 */
	0xf0, 0x77,		/* 13.5 MHz transport, Forced
				 * mode, latch windows */
	0xf2, 0x3d5,		/* SECAM, composite input */
	0xe7, 0x241,		/* PAL/SECAM set to 288 lines */
};

static const unsigned char init_common[] = {
	0xf2, 0x00,		/* Disable all outputs */
	0x33, 0x0d,		/* Luma : VIN2, Chroma : CIN
				 * (clamp off) */
	0xd8, 0xa8,		/* HREF/VREF active high, VREF
				 * pulse = 2, Odd/Even flag */
	0x20, 0x03,		/* IF compensation 0dB/oct */
	0xe0, 0xff,		/* Open up all comparators */
	0xe1, 0x00,
	0xe2, 0x7f,
	0xe3, 0x80,
	0xe4, 0x7f,
	0xe5, 0x80,
	0xe6, 0x00,		/* Brightness set to 0 */
	0xe7, 0xe0,		/* Contrast to 1.0, noise shaping
				 * 10 to 8 2-bit error diffusion */
	0xe8, 0xf8,		/* YUV422, CbCr binary offset,
				 * ... (p.32) */
	0xea, 0x18,		/* LLC2 connected, output FIFO
				 * reset with VACTintern */
	0xf0, 0x8a,		/* Half full level to 10, bus
				 * shuffler [7:0, 23:16, 15:8] */
	0xf1, 0x18,		/* Single clock, sync mode, no
				 * FE delay, no HLEN counter */
	0xf8, 0x12,		/* Port A, PIXCLK, HF# & FE#
				 * strength to 2 */
	0xf9, 0x24,		/* Port B, HREF, VREF, PREF &
				 * ALPHA strength to 4 */
};

static const unsigned short init_fp[] = {
	0x59, 0,
	0xa0, 2070,		/* ACC reference */
	0xa3, 0,
	0xa4, 0,
	0xa8, 30,
	0xb2, 768,
	0xbe, 27,
	0x58, 0,
	0x26, 0,
	0x4b, 0x298,		/* PLL gain */
};


static int vpx3220_init(struct v4l2_subdev *sd, u32 val)
{
	struct vpx3220 *decoder = to_vpx3220(sd);

	vpx3220_write_block(sd, init_common, sizeof(init_common));
	vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
	if (decoder->norm & V4L2_STD_NTSC)
		vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
	else if (decoder->norm & V4L2_STD_PAL)
		vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
	else if (decoder->norm & V4L2_STD_SECAM)
		vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
	else
		vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
	return 0;
}

static int vpx3220_status(struct v4l2_subdev *sd, u32 *pstatus, v4l2_std_id *pstd)
{
	int res = V4L2_IN_ST_NO_SIGNAL, status;
	v4l2_std_id std = 0;

	status = vpx3220_fp_read(sd, 0x0f3);

	v4l2_dbg(1, debug, sd, "status: 0x%04x\n", status);

	if (status < 0)
		return status;

	if ((status & 0x20) == 0) {
		res = 0;

		switch (status & 0x18) {
		case 0x00:
		case 0x10:
		case 0x14:
		case 0x18:
			std = V4L2_STD_PAL;
			break;

		case 0x08:
			std = V4L2_STD_SECAM;
			break;

		case 0x04:
		case 0x0c:
		case 0x1c:
			std = V4L2_STD_NTSC;
			break;
		}
	}
	if (pstd)
		*pstd = std;
	if (pstatus)
		*pstatus = status;
	return 0;
}

static int vpx3220_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
{
	v4l2_dbg(1, debug, sd, "querystd\n");
	return vpx3220_status(sd, NULL, std);
}

static int vpx3220_g_input_status(struct v4l2_subdev *sd, u32 *status)
{
	v4l2_dbg(1, debug, sd, "g_input_status\n");
	return vpx3220_status(sd, status, NULL);
}

static int vpx3220_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
{
	struct vpx3220 *decoder = to_vpx3220(sd);
	int temp_input;

	/* Here we back up the input selection because it gets
	   overwritten when we fill the registers with the
	   choosen video norm */
	temp_input = vpx3220_fp_read(sd, 0xf2);

	v4l2_dbg(1, debug, sd, "s_std %llx\n", (unsigned long long)std);
	if (std & V4L2_STD_NTSC) {
		vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
		v4l2_dbg(1, debug, sd, "norm switched to NTSC\n");
	} else if (std & V4L2_STD_PAL) {
		vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
		v4l2_dbg(1, debug, sd, "norm switched to PAL\n");
	} else if (std & V4L2_STD_SECAM) {
		vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
		v4l2_dbg(1, debug, sd, "norm switched to SECAM\n");
	} else {
		return -EINVAL;
	}

	decoder->norm = std;

	/* And here we set the backed up video input again */
	vpx3220_fp_write(sd, 0xf2, temp_input | 0x0010);
	udelay(10);
	return 0;
}

static int vpx3220_s_routing(struct v4l2_subdev *sd, const struct v4l2_routing *route)
{
	int data;

	/* RJ:   route->input = 0: ST8 (PCTV) input
		 route->input = 1: COMPOSITE  input
		 route->input = 2: SVHS       input  */

	const int input[3][2] = {
		{0x0c, 0},
		{0x0d, 0},
		{0x0e, 1}
	};

	if (route->input < 0 || route->input > 2)
		return -EINVAL;

	v4l2_dbg(1, debug, sd, "input switched to %s\n", inputs[route->input]);

	vpx3220_write(sd, 0x33, input[route->input][0]);

	data = vpx3220_fp_read(sd, 0xf2) & ~(0x0020);
	if (data < 0)
		return data;
	/* 0x0010 is required to latch the setting */
	vpx3220_fp_write(sd, 0xf2,
			data | (input[route->input][1] << 5) | 0x0010);

	udelay(10);
	return 0;
}

static int vpx3220_s_stream(struct v4l2_subdev *sd, int enable)
{
	v4l2_dbg(1, debug, sd, "s_stream %s\n", enable ? "on" : "off");

	vpx3220_write(sd, 0xf2, (enable ? 0x1b : 0x00));
	return 0;
}

static int vpx3220_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
{
	switch (qc->id) {
	case V4L2_CID_BRIGHTNESS:
		v4l2_ctrl_query_fill(qc, -128, 127, 1, 0);
		break;

	case V4L2_CID_CONTRAST:
		v4l2_ctrl_query_fill(qc, 0, 63, 1, 32);
		break;

	case V4L2_CID_SATURATION:
		v4l2_ctrl_query_fill(qc, 0, 4095, 1, 2048);
		break;

	case V4L2_CID_HUE:
		v4l2_ctrl_query_fill(qc, -512, 511, 1, 0);
		break;

	default:
		return -EINVAL;
	}
	return 0;
}

static int vpx3220_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
{
	struct vpx3220 *decoder = to_vpx3220(sd);

	switch (ctrl->id) {
	case V4L2_CID_BRIGHTNESS:
		ctrl->value = decoder->bright;
		break;
	case V4L2_CID_CONTRAST:
		ctrl->value = decoder->contrast;
		break;
	case V4L2_CID_SATURATION:
		ctrl->value = decoder->sat;
		break;
	case V4L2_CID_HUE:
		ctrl->value = decoder->hue;
		break;
	default:
		return -EINVAL;
	}
	return 0;
}

static int vpx3220_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
{
	struct vpx3220 *decoder = to_vpx3220(sd);

	switch (ctrl->id) {
	case V4L2_CID_BRIGHTNESS:
		if (decoder->bright != ctrl->value) {
			decoder->bright = ctrl->value;
			vpx3220_write(sd, 0xe6, decoder->bright);
		}
		break;
	case V4L2_CID_CONTRAST:
		if (decoder->contrast != ctrl->value) {
			/* Bit 7 and 8 is for noise shaping */
			decoder->contrast = ctrl->value;
			vpx3220_write(sd, 0xe7, decoder->contrast + 192);
		}
		break;
	case V4L2_CID_SATURATION:
		if (decoder->sat != ctrl->value) {
			decoder->sat = ctrl->value;
			vpx3220_fp_write(sd, 0xa0, decoder->sat);
		}
		break;
	case V4L2_CID_HUE:
		if (decoder->hue != ctrl->value) {
			decoder->hue = ctrl->value;
			vpx3220_fp_write(sd, 0x1c, decoder->hue);
		}
		break;
	default:
		return -EINVAL;
	}
	return 0;
}

static int vpx3220_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
{
	struct vpx3220 *decoder = to_vpx3220(sd);
	struct i2c_client *client = v4l2_get_subdevdata(sd);

	return v4l2_chip_ident_i2c_client(client, chip, decoder->ident, 0);
}

/* ----------------------------------------------------------------------- */

static const struct v4l2_subdev_core_ops vpx3220_core_ops = {
	.g_chip_ident = vpx3220_g_chip_ident,
	.init = vpx3220_init,
	.g_ctrl = vpx3220_g_ctrl,
	.s_ctrl = vpx3220_s_ctrl,
	.queryctrl = vpx3220_queryctrl,
	.s_std = vpx3220_s_std,
};

static const struct v4l2_subdev_video_ops vpx3220_video_ops = {
	.s_routing = vpx3220_s_routing,
	.s_stream = vpx3220_s_stream,
	.querystd = vpx3220_querystd,
	.g_input_status = vpx3220_g_input_status,
};

static const struct v4l2_subdev_ops vpx3220_ops = {
	.core = &vpx3220_core_ops,
	.video = &vpx3220_video_ops,
};

/* -----------------------------------------------------------------------
 * Client management code
 */

static int vpx3220_probe(struct i2c_client *client,
			const struct i2c_device_id *id)
{
	struct vpx3220 *decoder;
	struct v4l2_subdev *sd;
	const char *name = NULL;
	u8 ver;
	u16 pn;

	/* Check if the adapter supports the needed features */
	if (!i2c_check_functionality(client->adapter,
		I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
		return -ENODEV;

	decoder = kzalloc(sizeof(struct vpx3220), GFP_KERNEL);
	if (decoder == NULL)
		return -ENOMEM;
	sd = &decoder->sd;
	v4l2_i2c_subdev_init(sd, client, &vpx3220_ops);
	decoder->norm = V4L2_STD_PAL;
	decoder->input = 0;
	decoder->enable = 1;
	decoder->bright = 32768;
	decoder->contrast = 32768;
	decoder->hue = 32768;
	decoder->sat = 32768;

	ver = i2c_smbus_read_byte_data(client, 0x00);
	pn = (i2c_smbus_read_byte_data(client, 0x02) << 8) +
		i2c_smbus_read_byte_data(client, 0x01);
	decoder->ident = V4L2_IDENT_VPX3220A;
	if (ver == 0xec) {
		switch (pn) {
		case 0x4680:
			name = "vpx3220a";
			break;
		case 0x4260:
			name = "vpx3216b";
			decoder->ident = V4L2_IDENT_VPX3216B;
			break;
		case 0x4280:
			name = "vpx3214c";
			decoder->ident = V4L2_IDENT_VPX3214C;
			break;
		}
	}
	if (name)
		v4l2_info(sd, "%s found @ 0x%x (%s)\n", name,
			client->addr << 1, client->adapter->name);
	else
		v4l2_info(sd, "chip (%02x:%04x) found @ 0x%x (%s)\n",
			ver, pn, client->addr << 1, client->adapter->name);

	vpx3220_write_block(sd, init_common, sizeof(init_common));
	vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
	/* Default to PAL */
	vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
	return 0;
}

static int vpx3220_remove(struct i2c_client *client)
{
	struct v4l2_subdev *sd = i2c_get_clientdata(client);

	v4l2_device_unregister_subdev(sd);
	kfree(to_vpx3220(sd));
	return 0;
}

static const struct i2c_device_id vpx3220_id[] = {
	{ "vpx3220a", 0 },
	{ "vpx3216b", 0 },
	{ "vpx3214c", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, vpx3220_id);

static struct v4l2_i2c_driver_data v4l2_i2c_data = {
	.name = "vpx3220",
	.probe = vpx3220_probe,
	.remove = vpx3220_remove,
	.id_table = vpx3220_id,
};
Commit	Line	Data
d56410e0	1	/*
1da177e4 LT	2	* vpx3220a, vpx3216b & vpx3214c video decoder driver version 0.0.1
	3	*
	4	* Copyright (C) 2001 Laurent Pinchart <lpinchart@freegates.be>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	19	*/
	20
	21	#include <linux/module.h>
	22	#include <linux/init.h>
	23	#include <linux/delay.h>
	24	#include <linux/types.h>
1da177e4	25	#include <asm/uaccess.h>
1da177e4	26	#include <linux/i2c.h>
107063c6	27	#include <linux/videodev2.h>
7e5eaadc HV	28	#include <media/v4l2-device.h>
7e5eaadc HV	29	#include <media/v4l2-chip-ident.h>
2d26698e	30	#include <media/v4l2-i2c-drv.h>
1da177e4	31
23848b65 HV	32	MODULE_DESCRIPTION("vpx3220a/vpx3216b/vpx3214c video decoder driver");
	33	MODULE_AUTHOR("Laurent Pinchart");
	34	MODULE_LICENSE("GPL");
1da177e4	35
ff699e6b	36	static int debug;
1da177e4 LT	37	module_param(debug, int, 0);
	38	MODULE_PARM_DESC(debug, "Debug level (0-1)");
	39
7e5eaadc	40
1da177e4 LT	41	#define VPX_TIMEOUT_COUNT 10
	42
	43	/* ----------------------------------------------------------------------- */
	44
	45	struct vpx3220 {
7e5eaadc	46	struct v4l2_subdev sd;
1da177e4 LT	47	unsigned char reg[255];
1da177e4 LT	48
107063c6	49	v4l2_std_id norm;
7e5eaadc	50	int ident;
1da177e4 LT	51	int input;
	52	int enable;
	53	int bright;
	54	int contrast;
	55	int hue;
	56	int sat;
	57	};
	58
7e5eaadc HV	59	static inline struct vpx3220 to_vpx3220(struct v4l2_subdev sd)
	60	{
	61	return container_of(sd, struct vpx3220, sd);
	62	}
	63
1da177e4 LT	64	static char *inputs[] = { "internal", "composite", "svideo" };
	65
	66	/* ----------------------------------------------------------------------- */
23848b65	67
7e5eaadc	68	static inline int vpx3220_write(struct v4l2_subdev *sd, u8 reg, u8 value)
1da177e4	69	{
7e5eaadc	70	struct i2c_client *client = v4l2_get_subdevdata(sd);
1da177e4 LT	71	struct vpx3220 *decoder = i2c_get_clientdata(client);
	72
	73	decoder->reg[reg] = value;
	74	return i2c_smbus_write_byte_data(client, reg, value);
	75	}
	76
7e5eaadc	77	static inline int vpx3220_read(struct v4l2_subdev *sd, u8 reg)
1da177e4	78	{
7e5eaadc HV	79	struct i2c_client *client = v4l2_get_subdevdata(sd);
7e5eaadc HV	80
1da177e4 LT	81	return i2c_smbus_read_byte_data(client, reg);
	82	}
	83
7e5eaadc	84	static int vpx3220_fp_status(struct v4l2_subdev *sd)
1da177e4 LT	85	{
	86	unsigned char status;
	87	unsigned int i;
	88
	89	for (i = 0; i < VPX_TIMEOUT_COUNT; i++) {
7e5eaadc	90	status = vpx3220_read(sd, 0x29);
1da177e4 LT	91
	92	if (!(status & 4))
	93	return 0;
	94
	95	udelay(10);
	96
	97	if (need_resched())
	98	cond_resched();
	99	}
	100
	101	return -1;
	102	}
	103
7e5eaadc	104	static int vpx3220_fp_write(struct v4l2_subdev *sd, u8 fpaddr, u16 data)
1da177e4	105	{
7e5eaadc HV	106	struct i2c_client *client = v4l2_get_subdevdata(sd);
7e5eaadc HV	107
1da177e4 LT	108	/* Write the 16-bit address to the FPWR register */
1da177e4 LT	109	if (i2c_smbus_write_word_data(client, 0x27, swab16(fpaddr)) == -1) {
7e5eaadc	110	v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
1da177e4 LT	111	return -1;
	112	}
	113
7e5eaadc	114	if (vpx3220_fp_status(sd) < 0)
1da177e4 LT	115	return -1;
	116
	117	/* Write the 16-bit data to the FPDAT register */
	118	if (i2c_smbus_write_word_data(client, 0x28, swab16(data)) == -1) {
7e5eaadc	119	v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
1da177e4 LT	120	return -1;
	121	}
	122
	123	return 0;
	124	}
	125
7e5eaadc	126	static u16 vpx3220_fp_read(struct v4l2_subdev *sd, u16 fpaddr)
1da177e4	127	{
7e5eaadc	128	struct i2c_client *client = v4l2_get_subdevdata(sd);
1da177e4 LT	129	s16 data;
	130
	131	/* Write the 16-bit address to the FPRD register */
	132	if (i2c_smbus_write_word_data(client, 0x26, swab16(fpaddr)) == -1) {
7e5eaadc	133	v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
1da177e4 LT	134	return -1;
	135	}
	136
7e5eaadc	137	if (vpx3220_fp_status(sd) < 0)
1da177e4 LT	138	return -1;
	139
	140	/* Read the 16-bit data from the FPDAT register */
	141	data = i2c_smbus_read_word_data(client, 0x28);
	142	if (data == -1) {
7e5eaadc	143	v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
1da177e4 LT	144	return -1;
	145	}
	146
	147	return swab16(data);
	148	}
	149
7e5eaadc	150	static int vpx3220_write_block(struct v4l2_subdev sd, const u8 data, unsigned int len)
1da177e4 LT	151	{
	152	u8 reg;
	153	int ret = -1;
	154
	155	while (len >= 2) {
	156	reg = *data++;
7e5eaadc	157	ret = vpx3220_write(sd, reg, *data++);
23848b65	158	if (ret < 0)
1da177e4 LT	159	break;
	160	len -= 2;
	161	}
	162
	163	return ret;
	164	}
	165
7e5eaadc	166	static int vpx3220_write_fp_block(struct v4l2_subdev *sd,
23848b65	167	const u16 *data, unsigned int len)
1da177e4 LT	168	{
	169	u8 reg;
	170	int ret = 0;
	171
	172	while (len > 1) {
	173	reg = *data++;
7e5eaadc	174	ret \|= vpx3220_fp_write(sd, reg, *data++);
1da177e4 LT	175	len -= 2;
	176	}
	177
	178	return ret;
	179	}
	180
	181	/* ---------------------------------------------------------------------- */
	182
	183	static const unsigned short init_ntsc[] = {
	184	0x1c, 0x00, /* NTSC tint angle */
	185	0x88, 17, /* Window 1 vertical */
	186	0x89, 240, /* Vertical lines in */
	187	0x8a, 240, /* Vertical lines out */
	188	0x8b, 000, /* Horizontal begin */
	189	0x8c, 640, /* Horizontal length */
	190	0x8d, 640, /* Number of pixels */
	191	0x8f, 0xc00, /* Disable window 2 */
9b3acc21	192	0xf0, 0x73, /* 13.5 MHz transport, Forced
1da177e4 LT	193	* mode, latch windows */
	194	0xf2, 0x13, /* NTSC M, composite input */
	195	0xe7, 0x1e1, /* Enable vertical standard
	196	* locking @ 240 lines */
	197	};
	198
	199	static const unsigned short init_pal[] = {
	200	0x88, 23, /* Window 1 vertical begin */
9b3acc21	201	0x89, 288, /* Vertical lines in (16 lines
1da177e4	202	* skipped by the VFE) */
9b3acc21	203	0x8a, 288, /* Vertical lines out (16 lines
1da177e4 LT	204	* skipped by the VFE) */
	205	0x8b, 16, /* Horizontal begin */
	206	0x8c, 768, /* Horizontal length */
	207	0x8d, 784, /* Number of pixels
	208	* Must be >= Horizontal begin + Horizontal length */
	209	0x8f, 0xc00, /* Disable window 2 */
9b3acc21	210	0xf0, 0x77, /* 13.5 MHz transport, Forced
1da177e4 LT	211	* mode, latch windows */
1da177e4 LT	212	0xf2, 0x3d1, /* PAL B,G,H,I, composite input */
9b3acc21	213	0xe7, 0x241, /* PAL/SECAM set to 288 lines */
1da177e4 LT	214	};
	215
	216	static const unsigned short init_secam[] = {
9b3acc21 RB	217	0x88, 23, /* Window 1 vertical begin */
9b3acc21 RB	218	0x89, 288, /* Vertical lines in (16 lines
1da177e4	219	* skipped by the VFE) */
9b3acc21	220	0x8a, 288, /* Vertical lines out (16 lines
1da177e4 LT	221	* skipped by the VFE) */
	222	0x8b, 16, /* Horizontal begin */
	223	0x8c, 768, /* Horizontal length */
	224	0x8d, 784, /* Number of pixels
	225	* Must be >= Horizontal begin + Horizontal length */
	226	0x8f, 0xc00, /* Disable window 2 */
9b3acc21	227	0xf0, 0x77, /* 13.5 MHz transport, Forced
1da177e4 LT	228	* mode, latch windows */
1da177e4 LT	229	0xf2, 0x3d5, /* SECAM, composite input */
9b3acc21	230	0xe7, 0x241, /* PAL/SECAM set to 288 lines */
1da177e4 LT	231	};
	232
	233	static const unsigned char init_common[] = {
	234	0xf2, 0x00, /* Disable all outputs */
	235	0x33, 0x0d, /* Luma : VIN2, Chroma : CIN
	236	* (clamp off) */
	237	0xd8, 0xa8, /* HREF/VREF active high, VREF
	238	* pulse = 2, Odd/Even flag */
	239	0x20, 0x03, /* IF compensation 0dB/oct */
	240	0xe0, 0xff, /* Open up all comparators */
	241	0xe1, 0x00,
	242	0xe2, 0x7f,
	243	0xe3, 0x80,
	244	0xe4, 0x7f,
	245	0xe5, 0x80,
	246	0xe6, 0x00, /* Brightness set to 0 */
	247	0xe7, 0xe0, /* Contrast to 1.0, noise shaping
	248	* 10 to 8 2-bit error diffusion */
	249	0xe8, 0xf8, /* YUV422, CbCr binary offset,
	250	* ... (p.32) */
	251	0xea, 0x18, /* LLC2 connected, output FIFO
	252	* reset with VACTintern */
	253	0xf0, 0x8a, /* Half full level to 10, bus
	254	* shuffler [7:0, 23:16, 15:8] */
	255	0xf1, 0x18, /* Single clock, sync mode, no
	256	* FE delay, no HLEN counter */
	257	0xf8, 0x12, /* Port A, PIXCLK, HF# & FE#
	258	* strength to 2 */
	259	0xf9, 0x24, /* Port B, HREF, VREF, PREF &
	260	* ALPHA strength to 4 */
	261	};
	262
	263	static const unsigned short init_fp[] = {
	264	0x59, 0,
	265	0xa0, 2070, /* ACC reference */
	266	0xa3, 0,
	267	0xa4, 0,
	268	0xa8, 30,
	269	0xb2, 768,
	270	0xbe, 27,
	271	0x58, 0,
	272	0x26, 0,
	273	0x4b, 0x298, /* PLL gain */
	274	};
	275
1da177e4	276
7e5eaadc	277	static int vpx3220_init(struct v4l2_subdev *sd, u32 val)
1da177e4	278	{
7e5eaadc HV	279	struct vpx3220 *decoder = to_vpx3220(sd);
	280
	281	vpx3220_write_block(sd, init_common, sizeof(init_common));
	282	vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
	283	if (decoder->norm & V4L2_STD_NTSC)
	284	vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
	285	else if (decoder->norm & V4L2_STD_PAL)
	286	vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
	287	else if (decoder->norm & V4L2_STD_SECAM)
	288	vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
	289	else
	290	vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
	291	return 0;
	292	}
1da177e4	293
7e5eaadc HV	294	static int vpx3220_status(struct v4l2_subdev sd, u32 pstatus, v4l2_std_id *pstd)
	295	{
	296	int res = V4L2_IN_ST_NO_SIGNAL, status;
	297	v4l2_std_id std = 0;
1da177e4	298
7e5eaadc	299	status = vpx3220_fp_read(sd, 0x0f3);
1da177e4	300
7e5eaadc	301	v4l2_dbg(1, debug, sd, "status: 0x%04x\n", status);
1da177e4	302
7e5eaadc HV	303	if (status < 0)
7e5eaadc HV	304	return status;
1da177e4	305
7e5eaadc HV	306	if ((status & 0x20) == 0) {
7e5eaadc HV	307	res = 0;
1da177e4	308
7e5eaadc HV	309	switch (status & 0x18) {
	310	case 0x00:
	311	case 0x10:
	312	case 0x14:
	313	case 0x18:
	314	std = V4L2_STD_PAL;
	315	break;
1da177e4	316
7e5eaadc HV	317	case 0x08:
	318	std = V4L2_STD_SECAM;
	319	break;
1da177e4	320
7e5eaadc HV	321	case 0x04:
	322	case 0x0c:
	323	case 0x1c:
	324	std = V4L2_STD_NTSC;
	325	break;
1da177e4	326	}
23848b65	327	}
7e5eaadc HV	328	if (pstd)
	329	*pstd = std;
	330	if (pstatus)
	331	*pstatus = status;
	332	return 0;
	333	}
1da177e4	334
7e5eaadc HV	335	static int vpx3220_querystd(struct v4l2_subdev sd, v4l2_std_id std)
7e5eaadc HV	336	{
bccfa449	337	v4l2_dbg(1, debug, sd, "querystd\n");
7e5eaadc HV	338	return vpx3220_status(sd, NULL, std);
7e5eaadc HV	339	}
107063c6	340
7e5eaadc HV	341	static int vpx3220_g_input_status(struct v4l2_subdev sd, u32 status)
7e5eaadc HV	342	{
bccfa449	343	v4l2_dbg(1, debug, sd, "g_input_status\n");
7e5eaadc HV	344	return vpx3220_status(sd, status, NULL);
7e5eaadc HV	345	}
de21eb63	346
7e5eaadc HV	347	static int vpx3220_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
	348	{
	349	struct vpx3220 *decoder = to_vpx3220(sd);
	350	int temp_input;
	351
	352	/* Here we back up the input selection because it gets
	353	overwritten when we fill the registers with the
	354	choosen video norm */
	355	temp_input = vpx3220_fp_read(sd, 0xf2);
	356
bccfa449	357	v4l2_dbg(1, debug, sd, "s_std %llx\n", (unsigned long long)std);
7e5eaadc HV	358	if (std & V4L2_STD_NTSC) {
	359	vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
	360	v4l2_dbg(1, debug, sd, "norm switched to NTSC\n");
	361	} else if (std & V4L2_STD_PAL) {
	362	vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
	363	v4l2_dbg(1, debug, sd, "norm switched to PAL\n");
	364	} else if (std & V4L2_STD_SECAM) {
	365	vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
	366	v4l2_dbg(1, debug, sd, "norm switched to SECAM\n");
	367	} else {
	368	return -EINVAL;
23848b65	369	}
1da177e4	370
7e5eaadc	371	decoder->norm = std;
1da177e4	372
7e5eaadc HV	373	/* And here we set the backed up video input again */
	374	vpx3220_fp_write(sd, 0xf2, temp_input \| 0x0010);
	375	udelay(10);
	376	return 0;
	377	}
1da177e4	378
7e5eaadc HV	379	static int vpx3220_s_routing(struct v4l2_subdev sd, const struct v4l2_routing route)
	380	{
	381	int data;
1da177e4	382
7e5eaadc HV	383	/* RJ: route->input = 0: ST8 (PCTV) input
	384	route->input = 1: COMPOSITE input
	385	route->input = 2: SVHS input */
1da177e4	386
7e5eaadc HV	387	const int input[3][2] = {
	388	{0x0c, 0},
	389	{0x0d, 0},
	390	{0x0e, 1}
	391	};
1da177e4	392
7e5eaadc HV	393	if (route->input < 0 \|\| route->input > 2)
7e5eaadc HV	394	return -EINVAL;
1da177e4	395
7e5eaadc	396	v4l2_dbg(1, debug, sd, "input switched to %s\n", inputs[route->input]);
1da177e4	397
7e5eaadc	398	vpx3220_write(sd, 0x33, input[route->input][0]);
1da177e4	399
7e5eaadc HV	400	data = vpx3220_fp_read(sd, 0xf2) & ~(0x0020);
	401	if (data < 0)
	402	return data;
	403	/* 0x0010 is required to latch the setting */
	404	vpx3220_fp_write(sd, 0xf2,
	405	data \| (input[route->input][1] << 5) \| 0x0010);
1da177e4	406
7e5eaadc HV	407	udelay(10);
	408	return 0;
	409	}
1da177e4	410
7e5eaadc HV	411	static int vpx3220_s_stream(struct v4l2_subdev *sd, int enable)
7e5eaadc HV	412	{
bccfa449	413	v4l2_dbg(1, debug, sd, "s_stream %s\n", enable ? "on" : "off");
1da177e4	414
7e5eaadc HV	415	vpx3220_write(sd, 0xf2, (enable ? 0x1b : 0x00));
	416	return 0;
	417	}
107063c6	418
7e5eaadc HV	419	static int vpx3220_queryctrl(struct v4l2_subdev sd, struct v4l2_queryctrl qc)
	420	{
	421	switch (qc->id) {
	422	case V4L2_CID_BRIGHTNESS:
	423	v4l2_ctrl_query_fill(qc, -128, 127, 1, 0);
	424	break;
107063c6	425
7e5eaadc HV	426	case V4L2_CID_CONTRAST:
	427	v4l2_ctrl_query_fill(qc, 0, 63, 1, 32);
	428	break;
1da177e4	429
7e5eaadc HV	430	case V4L2_CID_SATURATION:
	431	v4l2_ctrl_query_fill(qc, 0, 4095, 1, 2048);
	432	break;
107063c6	433
7e5eaadc HV	434	case V4L2_CID_HUE:
7e5eaadc HV	435	v4l2_ctrl_query_fill(qc, -512, 511, 1, 0);
1da177e4	436	break;
7e5eaadc HV	437
	438	default:
	439	return -EINVAL;
23848b65	440	}
7e5eaadc HV	441	return 0;
7e5eaadc HV	442	}
1da177e4	443
7e5eaadc HV	444	static int vpx3220_g_ctrl(struct v4l2_subdev sd, struct v4l2_control ctrl)
	445	{
	446	struct vpx3220 *decoder = to_vpx3220(sd);
1da177e4	447
7e5eaadc HV	448	switch (ctrl->id) {
	449	case V4L2_CID_BRIGHTNESS:
	450	ctrl->value = decoder->bright;
	451	break;
	452	case V4L2_CID_CONTRAST:
	453	ctrl->value = decoder->contrast;
107063c6	454	break;
7e5eaadc HV	455	case V4L2_CID_SATURATION:
	456	ctrl->value = decoder->sat;
	457	break;
	458	case V4L2_CID_HUE:
	459	ctrl->value = decoder->hue;
	460	break;
	461	default:
	462	return -EINVAL;
107063c6	463	}
7e5eaadc HV	464	return 0;
7e5eaadc HV	465	}
107063c6	466
7e5eaadc HV	467	static int vpx3220_s_ctrl(struct v4l2_subdev sd, struct v4l2_control ctrl)
	468	{
	469	struct vpx3220 *decoder = to_vpx3220(sd);
107063c6	470
7e5eaadc HV	471	switch (ctrl->id) {
	472	case V4L2_CID_BRIGHTNESS:
	473	if (decoder->bright != ctrl->value) {
	474	decoder->bright = ctrl->value;
	475	vpx3220_write(sd, 0xe6, decoder->bright);
	476	}
	477	break;
	478	case V4L2_CID_CONTRAST:
	479	if (decoder->contrast != ctrl->value) {
	480	/* Bit 7 and 8 is for noise shaping */
	481	decoder->contrast = ctrl->value;
	482	vpx3220_write(sd, 0xe7, decoder->contrast + 192);
	483	}
	484	break;
	485	case V4L2_CID_SATURATION:
	486	if (decoder->sat != ctrl->value) {
	487	decoder->sat = ctrl->value;
	488	vpx3220_fp_write(sd, 0xa0, decoder->sat);
	489	}
	490	break;
	491	case V4L2_CID_HUE:
	492	if (decoder->hue != ctrl->value) {
	493	decoder->hue = ctrl->value;
	494	vpx3220_fp_write(sd, 0x1c, decoder->hue);
1da177e4	495	}
1da177e4	496	break;
1da177e4 LT	497	default:
	498	return -EINVAL;
	499	}
1da177e4 LT	500	return 0;
	501	}
	502
7e5eaadc	503	static int vpx3220_g_chip_ident(struct v4l2_subdev sd, struct v4l2_dbg_chip_ident chip)
1da177e4	504	{
7e5eaadc HV	505	struct vpx3220 *decoder = to_vpx3220(sd);
7e5eaadc HV	506	struct i2c_client *client = v4l2_get_subdevdata(sd);
1da177e4	507
7e5eaadc	508	return v4l2_chip_ident_i2c_client(client, chip, decoder->ident, 0);
1da177e4 LT	509	}
1da177e4 LT	510
7e5eaadc HV	511	/* ----------------------------------------------------------------------- */
	512
	513	static const struct v4l2_subdev_core_ops vpx3220_core_ops = {
	514	.g_chip_ident = vpx3220_g_chip_ident,
	515	.init = vpx3220_init,
	516	.g_ctrl = vpx3220_g_ctrl,
	517	.s_ctrl = vpx3220_s_ctrl,
	518	.queryctrl = vpx3220_queryctrl,
7e5eaadc HV	519	.s_std = vpx3220_s_std,
	520	};
	521
	522	static const struct v4l2_subdev_video_ops vpx3220_video_ops = {
	523	.s_routing = vpx3220_s_routing,
	524	.s_stream = vpx3220_s_stream,
	525	.querystd = vpx3220_querystd,
	526	.g_input_status = vpx3220_g_input_status,
	527	};
	528
	529	static const struct v4l2_subdev_ops vpx3220_ops = {
	530	.core = &vpx3220_core_ops,
7e5eaadc HV	531	.video = &vpx3220_video_ops,
	532	};
	533
1da177e4	534	/* -----------------------------------------------------------------------
c84e6036	535	* Client management code
1da177e4 LT	536	*/
1da177e4 LT	537
23848b65 HV	538	static int vpx3220_probe(struct i2c_client *client,
23848b65 HV	539	const struct i2c_device_id *id)
1da177e4	540	{
1da177e4	541	struct vpx3220 *decoder;
7e5eaadc	542	struct v4l2_subdev *sd;
23848b65 HV	543	const char *name = NULL;
	544	u8 ver;
	545	u16 pn;
1da177e4 LT	546
1da177e4 LT	547	/* Check if the adapter supports the needed features */
23848b65 HV	548	if (!i2c_check_functionality(client->adapter,
	549	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA))
	550	return -ENODEV;
1da177e4	551
7408187d	552	decoder = kzalloc(sizeof(struct vpx3220), GFP_KERNEL);
23848b65	553	if (decoder == NULL)
1da177e4	554	return -ENOMEM;
7e5eaadc HV	555	sd = &decoder->sd;
7e5eaadc HV	556	v4l2_i2c_subdev_init(sd, client, &vpx3220_ops);
107063c6	557	decoder->norm = V4L2_STD_PAL;
1da177e4 LT	558	decoder->input = 0;
	559	decoder->enable = 1;
	560	decoder->bright = 32768;
	561	decoder->contrast = 32768;
	562	decoder->hue = 32768;
	563	decoder->sat = 32768;
1da177e4	564
23848b65 HV	565	ver = i2c_smbus_read_byte_data(client, 0x00);
	566	pn = (i2c_smbus_read_byte_data(client, 0x02) << 8) +
	567	i2c_smbus_read_byte_data(client, 0x01);
7e5eaadc	568	decoder->ident = V4L2_IDENT_VPX3220A;
23848b65 HV	569	if (ver == 0xec) {
	570	switch (pn) {
	571	case 0x4680:
	572	name = "vpx3220a";
	573	break;
	574	case 0x4260:
	575	name = "vpx3216b";
7e5eaadc	576	decoder->ident = V4L2_IDENT_VPX3216B;
23848b65 HV	577	break;
	578	case 0x4280:
	579	name = "vpx3214c";
7e5eaadc	580	decoder->ident = V4L2_IDENT_VPX3214C;
23848b65 HV	581	break;
23848b65 HV	582	}
1da177e4	583	}
23848b65	584	if (name)
7e5eaadc	585	v4l2_info(sd, "%s found @ 0x%x (%s)\n", name,
23848b65 HV	586	client->addr << 1, client->adapter->name);
23848b65 HV	587	else
7e5eaadc	588	v4l2_info(sd, "chip (%02x:%04x) found @ 0x%x (%s)\n",
23848b65	589	ver, pn, client->addr << 1, client->adapter->name);
1da177e4	590
7e5eaadc HV	591	vpx3220_write_block(sd, init_common, sizeof(init_common));
	592	vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
	593	/* Default to PAL */
	594	vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
1da177e4 LT	595	return 0;
	596	}
	597
23848b65	598	static int vpx3220_remove(struct i2c_client *client)
1da177e4	599	{
7e5eaadc HV	600	struct v4l2_subdev *sd = i2c_get_clientdata(client);
	601
	602	v4l2_device_unregister_subdev(sd);
	603	kfree(to_vpx3220(sd));
23848b65	604	return 0;
1da177e4 LT	605	}
1da177e4 LT	606
23848b65 HV	607	static const struct i2c_device_id vpx3220_id[] = {
	608	{ "vpx3220a", 0 },
	609	{ "vpx3216b", 0 },
	610	{ "vpx3214c", 0 },
	611	{ }
	612	};
	613	MODULE_DEVICE_TABLE(i2c, vpx3220_id);
1da177e4	614
23848b65 HV	615	static struct v4l2_i2c_driver_data v4l2_i2c_data = {
23848b65 HV	616	.name = "vpx3220",
23848b65 HV	617	.probe = vpx3220_probe,
	618	.remove = vpx3220_remove,
	619	.id_table = vpx3220_id,
1da177e4	620	};