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V4L/DVB (7578a): V4L: V4L2 soc_camera driver for PXA270
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / pxa_camera.c
CommitLineData
3bc43840
GL		 1/*
2 * V4L2 Driver for PXA camera host
3 *
4 * Copyright (C) 2006, Sascha Hauer, Pengutronix
5 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#include <asm/io.h>
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/delay.h>
18#include <linux/dma-mapping.h>
19#include <linux/errno.h>
20#include <linux/fs.h>
21#include <linux/interrupt.h>
22#include <linux/kernel.h>
23#include <linux/mm.h>
24#include <linux/moduleparam.h>
25#include <linux/time.h>
26#include <linux/version.h>
27#include <linux/device.h>
28#include <linux/platform_device.h>
29#include <linux/mutex.h>
30#include <linux/clk.h>
31
32#include <media/v4l2-common.h>
33#include <media/v4l2-dev.h>
34#include <media/soc_camera.h>
35
36#include <linux/videodev2.h>
37
38#include <asm/dma.h>
39#include <asm/arch/pxa-regs.h>
40#include <asm/arch/camera.h>
41
42#define PXA_CAM_VERSION_CODE KERNEL_VERSION(0, 0, 5)
43#define PXA_CAM_DRV_NAME "pxa27x-camera"
44
45#define CICR0_IRQ_MASK (CICR0_TOM | CICR0_RDAVM | CICR0_FEM | CICR0_EOLM | \
46 CICR0_PERRM | CICR0_QDM | CICR0_CDM | CICR0_SOFM | \
47 CICR0_EOFM | CICR0_FOM)
48
49static DEFINE_MUTEX(camera_lock);
50
51/*
52 * Structures
53 */
54
55/* buffer for one video frame */
56struct pxa_buffer {
57 /* common v4l buffer stuff -- must be first */
58 struct videobuf_buffer vb;
59
60 const struct soc_camera_data_format *fmt;
61
62 /* our descriptor list needed for the PXA DMA engine */
63 dma_addr_t sg_dma;
64 struct pxa_dma_desc *sg_cpu;
65 size_t sg_size;
66 int inwork;
67};
68
69struct pxa_framebuffer_queue {
70 dma_addr_t sg_last_dma;
71 struct pxa_dma_desc *sg_last_cpu;
72};
73
74struct pxa_camera_dev {
75 struct device *dev;
76 /* PXA27x is only supposed to handle one camera on its Quick Capture
77 * interface. If anyone ever builds hardware to enable more than
78 * one camera, they will have to modify this driver too */
79 struct soc_camera_device *icd;
80 struct clk *clk;
81
82 unsigned int irq;
83 void __iomem *base;
84 unsigned int dma_chan_y;
85
86 enum v4l2_buf_type type;
87
88 struct pxacamera_platform_data *pdata;
89 struct resource *res;
90 unsigned long platform_flags;
91 unsigned long platform_mclk_10khz;
92
93 struct list_head capture;
94
95 spinlock_t lock;
96
97 int dma_running;
98
99 struct pxa_buffer *active;
100};
101
102static const char *pxa_cam_driver_description = "PXA_Camera";
103
104static unsigned int vid_limit = 16; /* Video memory limit, in Mb */
105
106/*
107 * Videobuf operations
108 */
109static int
110pxa_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
111 unsigned int *size)
112{
113 struct soc_camera_device *icd = vq->priv_data;
114
115 dev_dbg(&icd->dev, "count=%d, size=%d\n", *count, *size);
116
117 *size = icd->width * icd->height * ((icd->current_fmt->depth + 7) >> 3);
118
119 if (0 == *count)
120 *count = 32;
121 while (*size * *count > vid_limit * 1024 * 1024)
122 (*count)--;
123
124 return 0;
125}
126
127static void free_buffer(struct videobuf_queue *vq, struct pxa_buffer *buf)
128{
129 struct soc_camera_device *icd = vq->priv_data;
130 struct soc_camera_host *ici =
131 to_soc_camera_host(icd->dev.parent);
132 struct pxa_camera_dev *pcdev = ici->priv;
133 struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb);
134
135 BUG_ON(in_interrupt());
136
137 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __FUNCTION__,
138 &buf->vb, buf->vb.baddr, buf->vb.bsize);
139
140 /* This waits until this buffer is out of danger, i.e., until it is no
141 * longer in STATE_QUEUED or STATE_ACTIVE */
142 videobuf_waiton(&buf->vb, 0, 0);
143 videobuf_dma_unmap(vq, dma);
144 videobuf_dma_free(dma);
145
146 if (buf->sg_cpu)
147 dma_free_coherent(pcdev->dev, buf->sg_size, buf->sg_cpu,
148 buf->sg_dma);
149 buf->sg_cpu = NULL;
150
151 buf->vb.state = VIDEOBUF_NEEDS_INIT;
152}
153
154static int
155pxa_videobuf_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb,
156 enum v4l2_field field)
157{
158 struct soc_camera_device *icd = vq->priv_data;
159 struct soc_camera_host *ici =
160 to_soc_camera_host(icd->dev.parent);
161 struct pxa_camera_dev *pcdev = ici->priv;
162 struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb);
163 int i, ret;
164
165 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __FUNCTION__,
166 vb, vb->baddr, vb->bsize);
167
168 /* Added list head initialization on alloc */
169 WARN_ON(!list_empty(&vb->queue));
170
171#ifdef DEBUG
172 /* This can be useful if you want to see if we actually fill
173 * the buffer with something */
174 memset((void *)vb->baddr, 0xaa, vb->bsize);
175#endif
176
177 BUG_ON(NULL == icd->current_fmt);
178
179 /* I think, in buf_prepare you only have to protect global data,
180 * the actual buffer is yours */
181 buf->inwork = 1;
182
183 if (buf->fmt != icd->current_fmt ||
184 vb->width != icd->width ||
185 vb->height != icd->height ||
186 vb->field != field) {
187 buf->fmt = icd->current_fmt;
188 vb->width = icd->width;
189 vb->height = icd->height;
190 vb->field = field;
191 vb->state = VIDEOBUF_NEEDS_INIT;
192 }
193
194 vb->size = vb->width * vb->height * ((buf->fmt->depth + 7) >> 3);
195 if (0 != vb->baddr && vb->bsize < vb->size) {
196 ret = -EINVAL;
197 goto out;
198 }
199
200 if (vb->state == VIDEOBUF_NEEDS_INIT) {
201 unsigned int size = vb->size;
202 struct videobuf_dmabuf *dma = videobuf_to_dma(vb);
203
204 ret = videobuf_iolock(vq, vb, NULL);
205 if (ret)
206 goto fail;
207
208 if (buf->sg_cpu)
209 dma_free_coherent(pcdev->dev, buf->sg_size, buf->sg_cpu,
210 buf->sg_dma);
211
212 buf->sg_size = (dma->sglen + 1) * sizeof(struct pxa_dma_desc);
213 buf->sg_cpu = dma_alloc_coherent(pcdev->dev, buf->sg_size,
214 &buf->sg_dma, GFP_KERNEL);
215 if (!buf->sg_cpu) {
216 ret = -ENOMEM;
217 goto fail;
218 }
219
220 dev_dbg(&icd->dev, "nents=%d size: %d sg=0x%p\n",
221 dma->sglen, size, dma->sglist);
222 for (i = 0; i < dma->sglen; i++) {
223 struct scatterlist *sg = dma->sglist;
224 unsigned int dma_len = sg_dma_len(&sg[i]), xfer_len;
225
226 /* CIBR0 */
227 buf->sg_cpu[i].dsadr = pcdev->res->start + 0x28;
228 buf->sg_cpu[i].dtadr = sg_dma_address(&sg[i]);
229 /* PXA270 Developer's Manual 27.4.4.1:
230 * round up to 8 bytes */
231 xfer_len = (min(dma_len, size) + 7) & ~7;
232 if (xfer_len & 7)
233 dev_err(&icd->dev, "Unaligned buffer: "
234 "dma_len %u, size %u\n", dma_len, size);
235 buf->sg_cpu[i].dcmd = DCMD_FLOWSRC | DCMD_BURST8 |
236 DCMD_INCTRGADDR | xfer_len;
237 size -= dma_len;
238 buf->sg_cpu[i].ddadr = buf->sg_dma + (i + 1) *
239 sizeof(struct pxa_dma_desc);
240 }
241 buf->sg_cpu[dma->sglen - 1].ddadr = DDADR_STOP;
242 buf->sg_cpu[dma->sglen - 1].dcmd |= DCMD_ENDIRQEN;
243
244 vb->state = VIDEOBUF_PREPARED;
245 }
246
247 buf->inwork = 0;
248
249 return 0;
250
251fail:
252 free_buffer(vq, buf);
253out:
254 buf->inwork = 0;
255 return ret;
256}
257
258static void
259pxa_videobuf_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
260{
261 struct soc_camera_device *icd = vq->priv_data;
262 struct soc_camera_host *ici =
263 to_soc_camera_host(icd->dev.parent);
264 struct pxa_camera_dev *pcdev = ici->priv;
265 struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb);
266 struct pxa_buffer *active = pcdev->active;
267 struct videobuf_dmabuf *dma = videobuf_to_dma(vb);
268 int nents = dma->sglen;
269 unsigned long flags;
270
271 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __FUNCTION__,
272 vb, vb->baddr, vb->bsize);
273 spin_lock_irqsave(&pcdev->lock, flags);
274
275 list_add_tail(&vb->queue, &pcdev->capture);
276
277 vb->state = VIDEOBUF_ACTIVE;
278
279 if (!pcdev->active) {
280 CIFR |= CIFR_RESET_F;
281 DDADR(pcdev->dma_chan_y) = buf->sg_dma;
282 DCSR(pcdev->dma_chan_y) = DCSR_RUN;
283 pcdev->active = buf;
284 CICR0 |= CICR0_ENB;
285 } else {
286 struct videobuf_dmabuf *active_dma =
287 videobuf_to_dma(&active->vb);
288 /* Stop DMA engine */
289 DCSR(pcdev->dma_chan_y) = 0;
290
291 /* Add the descriptors we just initialized to the currently
292 * running chain
293 */
294 active->sg_cpu[active_dma->sglen - 1].ddadr = buf->sg_dma;
295
296 /* Setup a dummy descriptor with the DMA engines current
297 * state
298 */
299 /* CIBR0 */
300 buf->sg_cpu[nents].dsadr = pcdev->res->start + 0x28;
301 buf->sg_cpu[nents].dtadr = DTADR(pcdev->dma_chan_y);
302 buf->sg_cpu[nents].dcmd = DCMD(pcdev->dma_chan_y);
303
304 if (DDADR(pcdev->dma_chan_y) == DDADR_STOP) {
305 /* The DMA engine is on the last descriptor, set the
306 * next descriptors address to the descriptors
307 * we just initialized
308 */
309 buf->sg_cpu[nents].ddadr = buf->sg_dma;
310 } else {
311 buf->sg_cpu[nents].ddadr = DDADR(pcdev->dma_chan_y);
312 }
313
314 /* The next descriptor is the dummy descriptor */
315 DDADR(pcdev->dma_chan_y) = buf->sg_dma + nents *
316 sizeof(struct pxa_dma_desc);
317
318#ifdef DEBUG
319 if (CISR & CISR_IFO_0) {
320 dev_warn(pcdev->dev, "FIFO overrun\n");
321 DDADR(pcdev->dma_chan_y) = pcdev->active->sg_dma;
322
323 CICR0 &= ~CICR0_ENB;
324 CIFR |= CIFR_RESET_F;
325 DCSR(pcdev->dma_chan_y) = DCSR_RUN;
326 CICR0 |= CICR0_ENB;
327 } else
328#endif
329 DCSR(pcdev->dma_chan_y) = DCSR_RUN;
330 }
331
332 spin_unlock_irqrestore(&pcdev->lock, flags);
333
334}
335
336static void pxa_videobuf_release(struct videobuf_queue *vq,
337 struct videobuf_buffer *vb)
338{
339 struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb);
340#ifdef DEBUG
341 struct soc_camera_device *icd = vq->priv_data;
342
343 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __FUNCTION__,
344 vb, vb->baddr, vb->bsize);
345
346 switch (vb->state) {
347 case VIDEOBUF_ACTIVE:
348 dev_dbg(&icd->dev, "%s (active)\n", __FUNCTION__);
349 break;
350 case VIDEOBUF_QUEUED:
351 dev_dbg(&icd->dev, "%s (queued)\n", __FUNCTION__);
352 break;
353 case VIDEOBUF_PREPARED:
354 dev_dbg(&icd->dev, "%s (prepared)\n", __FUNCTION__);
355 break;
356 default:
357 dev_dbg(&icd->dev, "%s (unknown)\n", __FUNCTION__);
358 break;
359 }
360#endif
361
362 free_buffer(vq, buf);
363}
364
365static void pxa_camera_dma_irq_y(int channel, void *data)
366{
367 struct pxa_camera_dev *pcdev = data;
368 struct pxa_buffer *buf;
369 unsigned long flags;
370 unsigned int status;
371 struct videobuf_buffer *vb;
372
373 spin_lock_irqsave(&pcdev->lock, flags);
374
375 status = DCSR(pcdev->dma_chan_y);
376 if (status & DCSR_BUSERR) {
377 dev_err(pcdev->dev, "%s: Bus Error\n", __FUNCTION__);
378 DCSR(pcdev->dma_chan_y) |= DCSR_BUSERR;
379 goto out;
380 }
381
382 if (!(status & DCSR_ENDINTR)) {
383 dev_err(pcdev->dev, "%s: unknown dma interrupt source. "
384 "status: 0x%08x\n", __FUNCTION__, status);
385 goto out;
386 }
387
388 DCSR(pcdev->dma_chan_y) |= DCSR_ENDINTR;
389
390 if (!pcdev->active) {
391 dev_err(pcdev->dev, "%s: no active buf\n", __FUNCTION__);
392 goto out;
393 }
394
395 vb = &pcdev->active->vb;
396 buf = container_of(vb, struct pxa_buffer, vb);
397 WARN_ON(buf->inwork || list_empty(&vb->queue));
398 dev_dbg(pcdev->dev, "%s (vb=0x%p) 0x%08lx %d\n", __FUNCTION__,
399 vb, vb->baddr, vb->bsize);
400
401 /* _init is used to debug races, see comment in pxa_is_reqbufs() */
402 list_del_init(&vb->queue);
403 vb->state = VIDEOBUF_DONE;
404 do_gettimeofday(&vb->ts);
405 vb->field_count++;
406 wake_up(&vb->done);
407
408 if (list_empty(&pcdev->capture)) {
409 pcdev->active = NULL;
410 DCSR(pcdev->dma_chan_y) = 0;
411 CICR0 &= ~CICR0_ENB;
412 goto out;
413 }
414
415 pcdev->active = list_entry(pcdev->capture.next, struct pxa_buffer,
416 vb.queue);
417
418out:
419 spin_unlock_irqrestore(&pcdev->lock, flags);
420}
421
422static struct videobuf_queue_ops pxa_video_ops = {
423 .buf_setup = pxa_videobuf_setup,
424 .buf_prepare = pxa_videobuf_prepare,
425 .buf_queue = pxa_videobuf_queue,
426 .buf_release = pxa_videobuf_release,
427};
428
429static int mclk_get_divisor(struct pxa_camera_dev *pcdev)
430{
431 unsigned int mclk_10khz = pcdev->platform_mclk_10khz;
432 unsigned long div;
433 unsigned long lcdclk;
434
435 lcdclk = clk_get_rate(pcdev->clk) / 10000;
436
437 /* We verify platform_mclk_10khz != 0, so if anyone breaks it, here
438 * they get a nice Oops */
439 div = (lcdclk + 2 * mclk_10khz - 1) / (2 * mclk_10khz) - 1;
440
441 dev_dbg(pcdev->dev, "LCD clock %lukHz, target freq %dkHz, "
442 "divisor %lu\n", lcdclk * 10, mclk_10khz * 10, div);
443
444 return div;
445}
446
447static void pxa_is_activate(struct pxa_camera_dev *pcdev)
448{
449 struct pxacamera_platform_data *pdata = pcdev->pdata;
450 u32 cicr4 = 0;
451
452 dev_dbg(pcdev->dev, "Registered platform device at %p data %p\n",
453 pcdev, pdata);
454
455 if (pdata && pdata->init) {
456 dev_dbg(pcdev->dev, "%s: Init gpios\n", __FUNCTION__);
457 pdata->init(pcdev->dev);
458 }
459
460 if (pdata && pdata->power) {
461 dev_dbg(pcdev->dev, "%s: Power on camera\n", __FUNCTION__);
462 pdata->power(pcdev->dev, 1);
463 }
464
465 if (pdata && pdata->reset) {
466 dev_dbg(pcdev->dev, "%s: Releasing camera reset\n",
467 __FUNCTION__);
468 pdata->reset(pcdev->dev, 1);
469 }
470
471 CICR0 = 0x3FF; /* disable all interrupts */
472
473 if (pcdev->platform_flags & PXA_CAMERA_PCLK_EN)
474 cicr4 |= CICR4_PCLK_EN;
475 if (pcdev->platform_flags & PXA_CAMERA_MCLK_EN)
476 cicr4 |= CICR4_MCLK_EN;
477 if (pcdev->platform_flags & PXA_CAMERA_PCP)
478 cicr4 |= CICR4_PCP;
479 if (pcdev->platform_flags & PXA_CAMERA_HSP)
480 cicr4 |= CICR4_HSP;
481 if (pcdev->platform_flags & PXA_CAMERA_VSP)
482 cicr4 |= CICR4_VSP;
483
484 CICR4 = mclk_get_divisor(pcdev) | cicr4;
485
486 clk_enable(pcdev->clk);
487}
488
489static void pxa_is_deactivate(struct pxa_camera_dev *pcdev)
490{
491 struct pxacamera_platform_data *board = pcdev->pdata;
492
493 clk_disable(pcdev->clk);
494
495 if (board && board->reset) {
496 dev_dbg(pcdev->dev, "%s: Asserting camera reset\n",
497 __FUNCTION__);
498 board->reset(pcdev->dev, 0);
499 }
500
501 if (board && board->power) {
502 dev_dbg(pcdev->dev, "%s: Power off camera\n", __FUNCTION__);
503 board->power(pcdev->dev, 0);
504 }
505}
506
507static irqreturn_t pxa_camera_irq(int irq, void *data)
508{
509 struct pxa_camera_dev *pcdev = data;
510 unsigned int status = CISR;
511
512 dev_dbg(pcdev->dev, "Camera interrupt status 0x%x\n", status);
513
514 CISR = status;
515
516 return IRQ_HANDLED;
517}
518
519/* The following two functions absolutely depend on the fact, that
520 * there can be only one camera on PXA quick capture interface */
521static int pxa_is_add_device(struct soc_camera_device *icd)
522{
523 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
524 struct pxa_camera_dev *pcdev = ici->priv;
525 int ret;
526
527 mutex_lock(&camera_lock);
528
529 if (pcdev->icd) {
530 ret = -EBUSY;
531 goto ebusy;
532 }
533
534 dev_info(&icd->dev, "PXA Camera driver attached to camera %d\n",
535 icd->devnum);
536
537 pxa_is_activate(pcdev);
538 ret = icd->ops->init(icd);
539
540 if (!ret)
541 pcdev->icd = icd;
542
543ebusy:
544 mutex_unlock(&camera_lock);
545
546 return ret;
547}
548
549static void pxa_is_remove_device(struct soc_camera_device *icd)
550{
551 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
552 struct pxa_camera_dev *pcdev = ici->priv;
553
554 BUG_ON(icd != pcdev->icd);
555
556 dev_info(&icd->dev, "PXA Camera driver detached from camera %d\n",
557 icd->devnum);
558
559 /* disable capture, disable interrupts */
560 CICR0 = 0x3ff;
561 /* Stop DMA engine */
562 DCSR(pcdev->dma_chan_y) = 0;
563
564 icd->ops->release(icd);
565
566 pxa_is_deactivate(pcdev);
567
568 pcdev->icd = NULL;
569}
570
571static int pxa_is_set_capture_format(struct soc_camera_device *icd,
572 __u32 pixfmt, struct v4l2_rect *rect)
573{
574 struct soc_camera_host *ici =
575 to_soc_camera_host(icd->dev.parent);
576 struct pxa_camera_dev *pcdev = ici->priv;
577 unsigned int datawidth = 0, dw, bpp;
578 u32 cicr0, cicr4 = 0;
579 int ret;
580
581 /* If requested data width is supported by the platform, use it */
582 switch (icd->cached_datawidth) {
583 case 10:
584 if (pcdev->platform_flags & PXA_CAMERA_DATAWIDTH_10)
585 datawidth = IS_DATAWIDTH_10;
586 break;
587 case 9:
588 if (pcdev->platform_flags & PXA_CAMERA_DATAWIDTH_9)
589 datawidth = IS_DATAWIDTH_9;
590 break;
591 case 8:
592 if (pcdev->platform_flags & PXA_CAMERA_DATAWIDTH_8)
593 datawidth = IS_DATAWIDTH_8;
594 }
595 if (!datawidth)
596 return -EINVAL;
597
598 ret = icd->ops->set_capture_format(icd, pixfmt, rect,
599 datawidth |
600 (pcdev->platform_flags & PXA_CAMERA_MASTER ?
601 IS_MASTER : 0) |
602 (pcdev->platform_flags & PXA_CAMERA_HSP ?
603 0 : IS_HSYNC_ACTIVE_HIGH) |
604 (pcdev->platform_flags & PXA_CAMERA_VSP ?
605 0 : IS_VSYNC_ACTIVE_HIGH) |
606 (pcdev->platform_flags & PXA_CAMERA_PCP ?
607 0 : IS_PCLK_SAMPLE_RISING));
608 if (ret < 0)
609 return ret;
610
611 /* Datawidth is now guaranteed to be equal to one of the three values.
612 * We fix bit-per-pixel equal to data-width... */
613 switch (datawidth) {
614 case IS_DATAWIDTH_10:
615 icd->cached_datawidth = 10;
616 dw = 4;
617 bpp = 0x40;
618 break;
619 case IS_DATAWIDTH_9:
620 icd->cached_datawidth = 9;
621 dw = 3;
622 bpp = 0x20;
623 break;
624 default:
625 /* Actually it can only be 8 now,
626 * default is just to silence compiler warnings */
627 case IS_DATAWIDTH_8:
628 icd->cached_datawidth = 8;
629 dw = 2;
630 bpp = 0;
631 }
632
633 if (pcdev->platform_flags & PXA_CAMERA_PCLK_EN)
634 cicr4 |= CICR4_PCLK_EN;
635 if (pcdev->platform_flags & PXA_CAMERA_MCLK_EN)
636 cicr4 |= CICR4_MCLK_EN;
637 if (pcdev->platform_flags & PXA_CAMERA_PCP)
638 cicr4 |= CICR4_PCP;
639 if (pcdev->platform_flags & PXA_CAMERA_HSP)
640 cicr4 |= CICR4_HSP;
641 if (pcdev->platform_flags & PXA_CAMERA_VSP)
642 cicr4 |= CICR4_VSP;
643
644 cicr0 = CICR0;
645 if (cicr0 & CICR0_ENB)
646 CICR0 = cicr0 & ~CICR0_ENB;
647 CICR1 = CICR1_PPL_VAL(rect->width - 1) | bpp | dw;
648 CICR2 = 0;
649 CICR3 = CICR3_LPF_VAL(rect->height - 1) |
650 CICR3_BFW_VAL(min((unsigned short)255, icd->y_skip_top));
651 CICR4 = mclk_get_divisor(pcdev) | cicr4;
652
653 /* CIF interrupts are not used, only DMA */
654 CICR0 = (pcdev->platform_flags & PXA_CAMERA_MASTER ?
655 0 : (CICR0_SL_CAP_EN | CICR0_SIM_SP)) |
656 CICR0_DMAEN | CICR0_IRQ_MASK | (cicr0 & CICR0_ENB);
657
658 return 0;
659}
660
661static int pxa_is_try_fmt_cap(struct soc_camera_host *ici,
662 struct v4l2_format *f)
663{
664 /* limit to pxa hardware capabilities */
665 if (f->fmt.pix.height < 32)
666 f->fmt.pix.height = 32;
667 if (f->fmt.pix.height > 2048)
668 f->fmt.pix.height = 2048;
669 if (f->fmt.pix.width < 48)
670 f->fmt.pix.width = 48;
671 if (f->fmt.pix.width > 2048)
672 f->fmt.pix.width = 2048;
673 f->fmt.pix.width &= ~0x01;
674
675 return 0;
676}
677
678static int pxa_is_reqbufs(struct soc_camera_file *icf,
679 struct v4l2_requestbuffers *p)
680{
681 int i;
682
683 /* This is for locking debugging only. I removed spinlocks and now I
684 * check whether .prepare is ever called on a linked buffer, or whether
685 * a dma IRQ can occur for an in-work or unlinked buffer. Until now
686 * it hadn't triggered */
687 for (i = 0; i < p->count; i++) {
688 struct pxa_buffer *buf = container_of(icf->vb_vidq.bufs[i],
689 struct pxa_buffer, vb);
690 buf->inwork = 0;
691 INIT_LIST_HEAD(&buf->vb.queue);
692 }
693
694 return 0;
695}
696
697static unsigned int pxa_is_poll(struct file *file, poll_table *pt)
698{
699 struct soc_camera_file *icf = file->private_data;
700 struct pxa_buffer *buf;
701
702 buf = list_entry(icf->vb_vidq.stream.next, struct pxa_buffer,
703 vb.stream);
704
705 poll_wait(file, &buf->vb.done, pt);
706
707 if (buf->vb.state == VIDEOBUF_DONE ||
708 buf->vb.state == VIDEOBUF_ERROR)
709 return POLLIN|POLLRDNORM;
710
711 return 0;
712}
713
714static int pxa_is_querycap(struct soc_camera_host *ici,
715 struct v4l2_capability *cap)
716{
717 /* cap->name is set by the firendly caller:-> */
718 strlcpy(cap->card, pxa_cam_driver_description, sizeof(cap->card));
719 cap->version = PXA_CAM_VERSION_CODE;
720 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
721
722 return 0;
723}
724
725/* Should beallocated dynamically too, but we have only one. */
726static struct soc_camera_host pxa_soc_camera_host = {
727 .drv_name = PXA_CAM_DRV_NAME,
728 .vbq_ops = &pxa_video_ops,
729 .add = pxa_is_add_device,
730 .remove = pxa_is_remove_device,
731 .msize = sizeof(struct pxa_buffer),
732 .set_capture_format = pxa_is_set_capture_format,
733 .try_fmt_cap = pxa_is_try_fmt_cap,
734 .reqbufs = pxa_is_reqbufs,
735 .poll = pxa_is_poll,
736 .querycap = pxa_is_querycap,
737};
738
739static int pxa_camera_probe(struct platform_device *pdev)
740{
741 struct pxa_camera_dev *pcdev;
742 struct resource *res;
743 void __iomem *base;
744 unsigned int irq;
745 int err = 0;
746
747 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
748 irq = platform_get_irq(pdev, 0);
749 if (!res || !irq) {
750 err = -ENODEV;
751 goto exit;
752 }
753
754 pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
755 if (!pcdev) {
756 dev_err(&pdev->dev, "%s: Could not allocate pcdev\n",
757 __FUNCTION__);
758 err = -ENOMEM;
759 goto exit;
760 }
761
762 pcdev->clk = clk_get(&pdev->dev, "CAMCLK");
763 if (IS_ERR(pcdev->clk)) {
764 err = PTR_ERR(pcdev->clk);
765 goto exit_kfree;
766 }
767
768 dev_set_drvdata(&pdev->dev, pcdev);
769 pcdev->res = res;
770
771 pcdev->pdata = pdev->dev.platform_data;
772 pcdev->platform_flags = pcdev->pdata->flags;
773 if (!pcdev->platform_flags & (PXA_CAMERA_DATAWIDTH_8 |
774 PXA_CAMERA_DATAWIDTH_9 | PXA_CAMERA_DATAWIDTH_10)) {
775 /* Platform hasn't set available data widths. This is bad.
776 * Warn and use a default. */
777 dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
778 "data widths, using default 10 bit\n");
779 pcdev->platform_flags |= PXA_CAMERA_DATAWIDTH_10;
780 }
781 pcdev->platform_mclk_10khz = pcdev->pdata->mclk_10khz;
782 if (!pcdev->platform_mclk_10khz) {
783 dev_warn(&pdev->dev,
784 "mclk_10khz == 0! Please, fix your platform data. "
785 "Using default 20MHz\n");
786 pcdev->platform_mclk_10khz = 2000;
787 }
788
789 INIT_LIST_HEAD(&pcdev->capture);
790 spin_lock_init(&pcdev->lock);
791
792 /*
793 * Request the regions.
794 */
795 if (!request_mem_region(res->start, res->end - res->start + 1,
796 PXA_CAM_DRV_NAME)) {
797 err = -EBUSY;
798 goto exit_clk;
799 }
800
801 base = ioremap(res->start, res->end - res->start + 1);
802 if (!base) {
803 err = -ENOMEM;
804 goto exit_release;
805 }
806 pcdev->irq = irq;
807 pcdev->base = base;
808 pcdev->dev = &pdev->dev;
809
810 /* request dma */
811 pcdev->dma_chan_y = pxa_request_dma("CI_Y", DMA_PRIO_HIGH,
812 pxa_camera_dma_irq_y, pcdev);
813 if (pcdev->dma_chan_y < 0) {
814 dev_err(pcdev->dev, "Can't request DMA for Y\n");
815 err = -ENOMEM;
816 goto exit_iounmap;
817 }
818 dev_dbg(pcdev->dev, "got DMA channel %d\n", pcdev->dma_chan_y);
819
820 DRCMR68 = pcdev->dma_chan_y | DRCMR_MAPVLD;
821
822 /* request irq */
823 err = request_irq(pcdev->irq, pxa_camera_irq, 0, PXA_CAM_DRV_NAME,
824 pcdev);
825 if (err) {
826 dev_err(pcdev->dev, "Camera interrupt register failed \n");
827 goto exit_free_dma;
828 }
829
830 pxa_soc_camera_host.priv = pcdev;
831 pxa_soc_camera_host.dev.parent = &pdev->dev;
832 pxa_soc_camera_host.nr = pdev->id;
833 err = soc_camera_host_register(&pxa_soc_camera_host, THIS_MODULE);
834 if (err)
835 goto exit_free_irq;
836
837 return 0;
838
839exit_free_irq:
840 free_irq(pcdev->irq, pcdev);
841exit_free_dma:
842 pxa_free_dma(pcdev->dma_chan_y);
843exit_iounmap:
844 iounmap(base);
845exit_release:
846 release_mem_region(res->start, res->end - res->start + 1);
847exit_clk:
848 clk_put(pcdev->clk);
849exit_kfree:
850 kfree(pcdev);
851exit:
852 return err;
853}
854
855static int __devexit pxa_camera_remove(struct platform_device *pdev)
856{
857 struct pxa_camera_dev *pcdev = platform_get_drvdata(pdev);
858 struct resource *res;
859
860 clk_put(pcdev->clk);
861
862 pxa_free_dma(pcdev->dma_chan_y);
863 free_irq(pcdev->irq, pcdev);
864
865 soc_camera_host_unregister(&pxa_soc_camera_host);
866
867 iounmap(pcdev->base);
868
869 res = pcdev->res;
870 release_mem_region(res->start, res->end - res->start + 1);
871
872 kfree(pcdev);
873
874 dev_info(&pdev->dev, "%s: PXA Camera driver unloaded\n", __FUNCTION__);
875
876 return 0;
877}
878
879/*
880 * Suspend the Camera Module.
881 */
882static int pxa_camera_suspend(struct platform_device *pdev, pm_message_t level)
883{
884 struct pxa_camera_dev *pcdev = platform_get_drvdata(pdev);
885
886 dev_info(&pdev->dev, "camera suspend\n");
887 disable_irq(pcdev->irq);
888 return 0;
889}
890
891/*
892 * Resume the Camera Module.
893 */
894static int pxa_camera_resume(struct platform_device *pdev)
895{
896 struct pxa_camera_dev *pcdev = platform_get_drvdata(pdev);
897
898 dev_info(&pdev->dev, "camera resume\n");
899 enable_irq(pcdev->irq);
900
901/* if (pcdev) { */ /* FIXME: dev in use? */
902/* DRCMR68 = pcdev->dma_chan_y | DRCMR_MAPVLD; */
903/* DRCMR69 = pcdev->dma_chan_cb | DRCMR_MAPVLD; */
904/* DRCMR70 = pcdev->dma_chan_cr | DRCMR_MAPVLD; */
905/* } */
906
907 return 0;
908}
909
910
911static struct platform_driver pxa_camera_driver = {
912 .driver = {
913 .name = PXA_CAM_DRV_NAME,
914 },
915 .probe = pxa_camera_probe,
916 .remove = __exit_p(pxa_camera_remove),
917 .suspend = pxa_camera_suspend,
918 .resume = pxa_camera_resume,
919};
920
921
922static int __devinit pxa_camera_init(void)
923{
924 return platform_driver_register(&pxa_camera_driver);
925}
926
927static void __exit pxa_camera_exit(void)
928{
929 return platform_driver_unregister(&pxa_camera_driver);
930}
931
932module_init(pxa_camera_init);
933module_exit(pxa_camera_exit);
934
935MODULE_DESCRIPTION("PXA27x SoC Camera Host driver");
936MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>");
937MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)