[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / pvrusb2 / pvrusb2-encoder.c

/*
 *
 *
 *  Copyright (C) 2005 Mike Isely <isely@pobox.com>
 *  Copyright (C) 2004 Aurelien Alleaume <slts@free.fr>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#include <linux/device.h>   // for linux/firmware.h
#include <linux/firmware.h>
#include "pvrusb2-util.h"
#include "pvrusb2-encoder.h"
#include "pvrusb2-hdw-internal.h"
#include "pvrusb2-debug.h"
#include "pvrusb2-fx2-cmd.h"


/* Firmware mailbox flags - definitions found from ivtv */
#define IVTV_MBOX_FIRMWARE_DONE 0x00000004
#define IVTV_MBOX_DRIVER_DONE 0x00000002
#define IVTV_MBOX_DRIVER_BUSY 0x00000001

#define MBOX_BASE 0x44


static int pvr2_encoder_write_words(struct pvr2_hdw *hdw,
				    unsigned int offs,
				    const u32 *data, unsigned int dlen)
{
	unsigned int idx,addr;
	unsigned int bAddr;
	int ret;
	unsigned int chunkCnt;

	/*

	Format: First byte must be 0x01.  Remaining 32 bit words are
	spread out into chunks of 7 bytes each, with the first 4 bytes
	being the data word (little endian), and the next 3 bytes
	being the address where that data word is to be written (big
	endian).  Repeat request for additional words, with offset
	adjusted accordingly.

	*/
	while (dlen) {
		chunkCnt = 8;
		if (chunkCnt > dlen) chunkCnt = dlen;
		memset(hdw->cmd_buffer,0,sizeof(hdw->cmd_buffer));
		bAddr = 0;
		hdw->cmd_buffer[bAddr++] = FX2CMD_MEM_WRITE_DWORD;
		for (idx = 0; idx < chunkCnt; idx++) {
			addr = idx + offs;
			hdw->cmd_buffer[bAddr+6] = (addr & 0xffu);
			hdw->cmd_buffer[bAddr+5] = ((addr>>8) & 0xffu);
			hdw->cmd_buffer[bAddr+4] = ((addr>>16) & 0xffu);
			PVR2_DECOMPOSE_LE(hdw->cmd_buffer, bAddr,data[idx]);
			bAddr += 7;
		}
		ret = pvr2_send_request(hdw,
					hdw->cmd_buffer,1+(chunkCnt*7),
					NULL,0);
		if (ret) return ret;
		data += chunkCnt;
		dlen -= chunkCnt;
		offs += chunkCnt;
	}

	return 0;
}


static int pvr2_encoder_read_words(struct pvr2_hdw *hdw,
				   unsigned int offs,
				   u32 *data, unsigned int dlen)
{
	unsigned int idx;
	int ret;
	unsigned int chunkCnt;

	/*

	Format: First byte must be 0x02 (status check) or 0x28 (read
	back block of 32 bit words).  Next 6 bytes must be zero,
	followed by a single byte of MBOX_BASE+offset for portion to
	be read.  Returned data is packed set of 32 bits words that
	were read.

	*/

	while (dlen) {
		chunkCnt = 16;
		if (chunkCnt > dlen) chunkCnt = dlen;
		if (chunkCnt < 16) chunkCnt = 1;
		hdw->cmd_buffer[0] =
			((chunkCnt == 1) ?
			 FX2CMD_MEM_READ_DWORD : FX2CMD_MEM_READ_64BYTES);
		hdw->cmd_buffer[1] = 0;
		hdw->cmd_buffer[2] = 0;
		hdw->cmd_buffer[3] = 0;
		hdw->cmd_buffer[4] = 0;
		hdw->cmd_buffer[5] = ((offs>>16) & 0xffu);
		hdw->cmd_buffer[6] = ((offs>>8) & 0xffu);
		hdw->cmd_buffer[7] = (offs & 0xffu);
		ret = pvr2_send_request(hdw,
					hdw->cmd_buffer,8,
					hdw->cmd_buffer,
					(chunkCnt == 1 ? 4 : 16 * 4));
		if (ret) return ret;

		for (idx = 0; idx < chunkCnt; idx++) {
			data[idx] = PVR2_COMPOSE_LE(hdw->cmd_buffer,idx*4);
		}
		data += chunkCnt;
		dlen -= chunkCnt;
		offs += chunkCnt;
	}

	return 0;
}


/* This prototype is set up to be compatible with the
   cx2341x_mbox_func prototype in cx2341x.h, which should be in
   kernels 2.6.18 or later.  We do this so that we can enable
   cx2341x.ko to write to our encoder (by handing it a pointer to this
   function).  For earlier kernels this doesn't really matter. */
static int pvr2_encoder_cmd(void *ctxt,
			    u32 cmd,
			    int arg_cnt_send,
			    int arg_cnt_recv,
			    u32 *argp)
{
	unsigned int poll_count;
	unsigned int try_count = 0;
	int retry_flag;
	int ret = 0;
	unsigned int idx;
	/* These sizes look to be limited by the FX2 firmware implementation */
	u32 wrData[16];
	u32 rdData[16];
	struct pvr2_hdw *hdw = (struct pvr2_hdw *)ctxt;


	/*

	The encoder seems to speak entirely using blocks 32 bit words.
	In ivtv driver terms, this is a mailbox at MBOX_BASE which we
	populate with data and watch what the hardware does with it.
	The first word is a set of flags used to control the
	transaction, the second word is the command to execute, the
	third byte is zero (ivtv driver suggests that this is some
	kind of return value), and the fourth byte is a specified
	timeout (windows driver always uses 0x00060000 except for one
	case when it is zero).  All successive words are the argument
	words for the command.

	First, write out the entire set of words, with the first word
	being zero.

	Next, write out just the first word again, but set it to
	IVTV_MBOX_DRIVER_DONE | IVTV_DRIVER_BUSY this time (which
	probably means "go").

	Next, read back the return count words.  Check the first word,
	which should have IVTV_MBOX_FIRMWARE_DONE set.  If however
	that bit is not set, then the command isn't done so repeat the
	read until it is set.

	Finally, write out just the first word again, but set it to
	0x0 this time (which probably means "idle").

	*/

	if (arg_cnt_send > (ARRAY_SIZE(wrData) - 4)) {
		pvr2_trace(
			PVR2_TRACE_ERROR_LEGS,
			"Failed to write cx23416 command"
			" - too many input arguments"
			" (was given %u limit %lu)",
			arg_cnt_send, (long unsigned) ARRAY_SIZE(wrData) - 4);
		return -EINVAL;
	}

	if (arg_cnt_recv > (ARRAY_SIZE(rdData) - 4)) {
		pvr2_trace(
			PVR2_TRACE_ERROR_LEGS,
			"Failed to write cx23416 command"
			" - too many return arguments"
			" (was given %u limit %lu)",
			arg_cnt_recv, (long unsigned) ARRAY_SIZE(rdData) - 4);
		return -EINVAL;
	}


	LOCK_TAKE(hdw->ctl_lock); do {

		if (!hdw->state_encoder_ok) {
			ret = -EIO;
			break;
		}

		retry_flag = 0;
		try_count++;
		ret = 0;
		wrData[0] = 0;
		wrData[1] = cmd;
		wrData[2] = 0;
		wrData[3] = 0x00060000;
		for (idx = 0; idx < arg_cnt_send; idx++) {
			wrData[idx+4] = argp[idx];
		}
		for (; idx < ARRAY_SIZE(wrData) - 4; idx++) {
			wrData[idx+4] = 0;
		}

		ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,idx);
		if (ret) break;
		wrData[0] = IVTV_MBOX_DRIVER_DONE|IVTV_MBOX_DRIVER_BUSY;
		ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1);
		if (ret) break;
		poll_count = 0;
		while (1) {
			poll_count++;
			ret = pvr2_encoder_read_words(hdw,MBOX_BASE,rdData,
						      arg_cnt_recv+4);
			if (ret) {
				break;
			}
			if (rdData[0] & IVTV_MBOX_FIRMWARE_DONE) {
				break;
			}
			if (rdData[0] && (poll_count < 1000)) continue;
			if (!rdData[0]) {
				retry_flag = !0;
				pvr2_trace(
					PVR2_TRACE_ERROR_LEGS,
					"Encoder timed out waiting for us"
					"; arranging to retry");
			} else {
				pvr2_trace(
					PVR2_TRACE_ERROR_LEGS,
					"***WARNING*** device's encoder"
					" appears to be stuck"
					" (status=0x%08x)",rdData[0]);
			}
			pvr2_trace(
				PVR2_TRACE_ERROR_LEGS,
				"Encoder command: 0x%02x",cmd);
			for (idx = 4; idx < arg_cnt_send; idx++) {
				pvr2_trace(
					PVR2_TRACE_ERROR_LEGS,
					"Encoder arg%d: 0x%08x",
					idx-3,wrData[idx]);
			}
			ret = -EBUSY;
			break;
		}
		if (retry_flag) {
			if (try_count < 20) continue;
			pvr2_trace(
				PVR2_TRACE_ERROR_LEGS,
				"Too many retries...");
			ret = -EBUSY;
		}
		if (ret) {
			del_timer_sync(&hdw->encoder_run_timer);
			hdw->state_encoder_ok = 0;
			pvr2_trace(PVR2_TRACE_STBITS,
				   "State bit %s <-- %s",
				   "state_encoder_ok",
				   (hdw->state_encoder_ok ? "true" : "false"));
			if (hdw->state_encoder_runok) {
				hdw->state_encoder_runok = 0;
				pvr2_trace(PVR2_TRACE_STBITS,
				   "State bit %s <-- %s",
					   "state_encoder_runok",
					   (hdw->state_encoder_runok ?
					    "true" : "false"));
			}
			pvr2_trace(
				PVR2_TRACE_ERROR_LEGS,
				"Giving up on command."
				"  This is normally recovered via a firmware"
				" reload and re-initialization; concern"
				" is only warranted if this happens repeatedly"
				" and rapidly.");
			break;
		}
		wrData[0] = 0x7;
		for (idx = 0; idx < arg_cnt_recv; idx++) {
			argp[idx] = rdData[idx+4];
		}

		wrData[0] = 0x0;
		ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1);
		if (ret) break;

	} while(0); LOCK_GIVE(hdw->ctl_lock);

	return ret;
}


static int pvr2_encoder_vcmd(struct pvr2_hdw *hdw, int cmd,
			     int args, ...)
{
	va_list vl;
	unsigned int idx;
	u32 data[12];

	if (args > ARRAY_SIZE(data)) {
		pvr2_trace(
			PVR2_TRACE_ERROR_LEGS,
			"Failed to write cx23416 command"
			" - too many arguments"
			" (was given %u limit %lu)",
			args, (long unsigned) ARRAY_SIZE(data));
		return -EINVAL;
	}

	va_start(vl, args);
	for (idx = 0; idx < args; idx++) {
		data[idx] = va_arg(vl, u32);
	}
	va_end(vl);

	return pvr2_encoder_cmd(hdw,cmd,args,0,data);
}


/* This implements some extra setup for the encoder that seems to be
   specific to the PVR USB2 hardware. */
static int pvr2_encoder_prep_config(struct pvr2_hdw *hdw)
{
	int ret = 0;
	int encMisc3Arg = 0;

#if 0
	/* This inexplicable bit happens in the Hauppauge windows
	   driver (for both 24xxx and 29xxx devices).  However I
	   currently see no difference in behavior with or without
	   this stuff.  Leave this here as a note of its existence,
	   but don't use it. */
	LOCK_TAKE(hdw->ctl_lock); do {
		u32 dat[1];
		dat[0] = 0x80000640;
		pvr2_encoder_write_words(hdw,0x01fe,dat,1);
		pvr2_encoder_write_words(hdw,0x023e,dat,1);
	} while(0); LOCK_GIVE(hdw->ctl_lock);
#endif

	/* Mike Isely <isely@pobox.com> 26-Jan-2006 The windows driver
	   sends the following list of ENC_MISC commands (for both
	   24xxx and 29xxx devices).  Meanings are not entirely clear,
	   however without the ENC_MISC(3,1) command then we risk
	   random perpetual video corruption whenever the video input
	   breaks up for a moment (like when switching channels). */


#if 0
	/* This ENC_MISC(5,0) command seems to hurt 29xxx sync
	   performance on channel changes, but is not a problem on
	   24xxx devices. */
	ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 5,0,0,0);
#endif

	/* This ENC_MISC(3,encMisc3Arg) command is critical - without
	   it there will eventually be video corruption.  Also, the
	   saa7115 case is strange - the Windows driver is passing 1
	   regardless of device type but if we have 1 for saa7115
	   devices the video turns sluggish.  */
	if (hdw->hdw_desc->flag_has_cx25840) {
		encMisc3Arg = 1;
	} else {
		encMisc3Arg = 0;
	}
	ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 3,
				 encMisc3Arg,0,0);

	ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 8,0,0,0);

#if 0
	/* This ENC_MISC(4,1) command is poisonous, so it is commented
	   out.  But I'm leaving it here anyway to document its
	   existence in the Windows driver.  The effect of this
	   command is that apps displaying the stream become sluggish
	   with stuttering video. */
	ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 4,1,0,0);
#endif

	ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 0,3,0,0);
	ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4,15,0,0,0);

	/* prevent the PTSs from slowly drifting away in the generated
	   MPEG stream */
	ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC, 2, 4, 1);

	return ret;
}

int pvr2_encoder_adjust(struct pvr2_hdw *hdw)
{
	int ret;
	ret = cx2341x_update(hdw,pvr2_encoder_cmd,
			     (hdw->enc_cur_valid ? &hdw->enc_cur_state : NULL),
			     &hdw->enc_ctl_state);
	if (ret) {
		pvr2_trace(PVR2_TRACE_ERROR_LEGS,
			   "Error from cx2341x module code=%d",ret);
	} else {
		memcpy(&hdw->enc_cur_state,&hdw->enc_ctl_state,
		       sizeof(struct cx2341x_mpeg_params));
		hdw->enc_cur_valid = !0;
	}
	return ret;
}


int pvr2_encoder_configure(struct pvr2_hdw *hdw)
{
	int ret;
	int val;
	pvr2_trace(PVR2_TRACE_ENCODER,"pvr2_encoder_configure"
		   " (cx2341x module)");
	hdw->enc_ctl_state.port = CX2341X_PORT_STREAMING;
	hdw->enc_ctl_state.width = hdw->res_hor_val;
	hdw->enc_ctl_state.height = hdw->res_ver_val;
	hdw->enc_ctl_state.is_50hz = ((hdw->std_mask_cur & V4L2_STD_525_60) ?
				      0 : 1);

	ret = 0;

	ret |= pvr2_encoder_prep_config(hdw);

	/* saa7115: 0xf0 */
	val = 0xf0;
	if (hdw->hdw_desc->flag_has_cx25840) {
		/* ivtv cx25840: 0x140 */
		val = 0x140;
	}

	if (!ret) ret = pvr2_encoder_vcmd(
		hdw,CX2341X_ENC_SET_NUM_VSYNC_LINES, 2,
		val, val);

	/* setup firmware to notify us about some events (don't know why...) */
	if (!ret) ret = pvr2_encoder_vcmd(
		hdw,CX2341X_ENC_SET_EVENT_NOTIFICATION, 4,
		0, 0, 0x10000000, 0xffffffff);

	if (!ret) ret = pvr2_encoder_vcmd(
		hdw,CX2341X_ENC_SET_VBI_LINE, 5,
		0xffffffff,0,0,0,0);

	if (ret) {
		pvr2_trace(PVR2_TRACE_ERROR_LEGS,
			   "Failed to configure cx23416");
		return ret;
	}

	ret = pvr2_encoder_adjust(hdw);
	if (ret) return ret;

	ret = pvr2_encoder_vcmd(
		hdw, CX2341X_ENC_INITIALIZE_INPUT, 0);

	if (ret) {
		pvr2_trace(PVR2_TRACE_ERROR_LEGS,
			   "Failed to initialize cx23416 video input");
		return ret;
	}

	return 0;
}


int pvr2_encoder_start(struct pvr2_hdw *hdw)
{
	int status;

	/* unmask some interrupts */
	pvr2_write_register(hdw, 0x0048, 0xbfffffff);

	pvr2_encoder_vcmd(hdw,CX2341X_ENC_MUTE_VIDEO,1,
			  hdw->input_val == PVR2_CVAL_INPUT_RADIO ? 1 : 0);

	switch (hdw->active_stream_type) {
	case pvr2_config_vbi:
		status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
					   0x01,0x14);
		break;
	case pvr2_config_mpeg:
		status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
					   0,0x13);
		break;
	default: /* Unhandled cases for now */
		status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
					   0,0x13);
		break;
	}
	return status;
}

int pvr2_encoder_stop(struct pvr2_hdw *hdw)
{
	int status;

	/* mask all interrupts */
	pvr2_write_register(hdw, 0x0048, 0xffffffff);

	switch (hdw->active_stream_type) {
	case pvr2_config_vbi:
		status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
					   0x01,0x01,0x14);
		break;
	case pvr2_config_mpeg:
		status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
					   0x01,0,0x13);
		break;
	default: /* Unhandled cases for now */
		status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
					   0x01,0,0x13);
		break;
	}

	return status;
}


/*
  Stuff for Emacs to see, in order to encourage consistent editing style:
  *** Local Variables: ***
  *** mode: c ***
  *** fill-column: 70 ***
  *** tab-width: 8 ***
  *** c-basic-offset: 8 ***
  *** End: ***
  */
Commit	Line	Data
d855497e MI	1	/*
d855497e MI	2	*
d855497e MI	3	*
	4	* Copyright (C) 2005 Mike Isely <isely@pobox.com>
	5	* Copyright (C) 2004 Aurelien Alleaume <slts@free.fr>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*
	20	*/
	21
	22	#include <linux/device.h> // for linux/firmware.h
	23	#include <linux/firmware.h>
d855497e MI	24	#include "pvrusb2-util.h"
	25	#include "pvrusb2-encoder.h"
	26	#include "pvrusb2-hdw-internal.h"
	27	#include "pvrusb2-debug.h"
8d364363	28	#include "pvrusb2-fx2-cmd.h"
d855497e	29
d855497e MI	30
	31
	32	/* Firmware mailbox flags - definitions found from ivtv */
	33	#define IVTV_MBOX_FIRMWARE_DONE 0x00000004
	34	#define IVTV_MBOX_DRIVER_DONE 0x00000002
	35	#define IVTV_MBOX_DRIVER_BUSY 0x00000001
	36
c43000ef MI	37	#define MBOX_BASE 0x44
c43000ef MI	38
d855497e	39
eacbe7c5	40	static int pvr2_encoder_write_words(struct pvr2_hdw *hdw,
c43000ef	41	unsigned int offs,
d855497e MI	42	const u32 *data, unsigned int dlen)
d855497e MI	43	{
c43000ef MI	44	unsigned int idx,addr;
c43000ef MI	45	unsigned int bAddr;
d855497e	46	int ret;
d855497e MI	47	unsigned int chunkCnt;
	48
	49	/*
	50
	51	Format: First byte must be 0x01. Remaining 32 bit words are
c43000ef MI	52	spread out into chunks of 7 bytes each, with the first 4 bytes
	53	being the data word (little endian), and the next 3 bytes
	54	being the address where that data word is to be written (big
	55	endian). Repeat request for additional words, with offset
	56	adjusted accordingly.
d855497e MI	57
	58	*/
	59	while (dlen) {
	60	chunkCnt = 8;
	61	if (chunkCnt > dlen) chunkCnt = dlen;
	62	memset(hdw->cmd_buffer,0,sizeof(hdw->cmd_buffer));
c43000ef MI	63	bAddr = 0;
c43000ef MI	64	hdw->cmd_buffer[bAddr++] = FX2CMD_MEM_WRITE_DWORD;
d855497e	65	for (idx = 0; idx < chunkCnt; idx++) {
c43000ef MI	66	addr = idx + offs;
	67	hdw->cmd_buffer[bAddr+6] = (addr & 0xffu);
	68	hdw->cmd_buffer[bAddr+5] = ((addr>>8) & 0xffu);
	69	hdw->cmd_buffer[bAddr+4] = ((addr>>16) & 0xffu);
	70	PVR2_DECOMPOSE_LE(hdw->cmd_buffer, bAddr,data[idx]);
	71	bAddr += 7;
d855497e MI	72	}
	73	ret = pvr2_send_request(hdw,
	74	hdw->cmd_buffer,1+(chunkCnt*7),
a0fd1cb1	75	NULL,0);
d855497e MI	76	if (ret) return ret;
	77	data += chunkCnt;
	78	dlen -= chunkCnt;
	79	offs += chunkCnt;
	80	}
	81
	82	return 0;
	83	}
	84
	85
c43000ef MI	86	static int pvr2_encoder_read_words(struct pvr2_hdw *hdw,
c43000ef MI	87	unsigned int offs,
d855497e MI	88	u32 *data, unsigned int dlen)
	89	{
	90	unsigned int idx;
	91	int ret;
d855497e MI	92	unsigned int chunkCnt;
	93
	94	/*
	95
	96	Format: First byte must be 0x02 (status check) or 0x28 (read
	97	back block of 32 bit words). Next 6 bytes must be zero,
c43000ef MI	98	followed by a single byte of MBOX_BASE+offset for portion to
	99	be read. Returned data is packed set of 32 bits words that
	100	were read.
d855497e MI	101
	102	*/
	103
	104	while (dlen) {
	105	chunkCnt = 16;
	106	if (chunkCnt > dlen) chunkCnt = dlen;
c43000ef	107	if (chunkCnt < 16) chunkCnt = 1;
8d364363	108	hdw->cmd_buffer[0] =
c43000ef MI	109	((chunkCnt == 1) ?
	110	FX2CMD_MEM_READ_DWORD : FX2CMD_MEM_READ_64BYTES);
	111	hdw->cmd_buffer[1] = 0;
	112	hdw->cmd_buffer[2] = 0;
	113	hdw->cmd_buffer[3] = 0;
	114	hdw->cmd_buffer[4] = 0;
	115	hdw->cmd_buffer[5] = ((offs>>16) & 0xffu);
	116	hdw->cmd_buffer[6] = ((offs>>8) & 0xffu);
	117	hdw->cmd_buffer[7] = (offs & 0xffu);
d855497e MI	118	ret = pvr2_send_request(hdw,
d855497e MI	119	hdw->cmd_buffer,8,
c43000ef MI	120	hdw->cmd_buffer,
c43000ef MI	121	(chunkCnt == 1 ? 4 : 16 * 4));
d855497e MI	122	if (ret) return ret;
	123
	124	for (idx = 0; idx < chunkCnt; idx++) {
	125	data[idx] = PVR2_COMPOSE_LE(hdw->cmd_buffer,idx*4);
	126	}
	127	data += chunkCnt;
	128	dlen -= chunkCnt;
	129	offs += chunkCnt;
	130	}
	131
	132	return 0;
	133	}
	134
	135
eacbe7c5 MI	136	/* This prototype is set up to be compatible with the
	137	cx2341x_mbox_func prototype in cx2341x.h, which should be in
	138	kernels 2.6.18 or later. We do this so that we can enable
	139	cx2341x.ko to write to our encoder (by handing it a pointer to this
	140	function). For earlier kernels this doesn't really matter. */
	141	static int pvr2_encoder_cmd(void *ctxt,
ea48c13a	142	u32 cmd,
eacbe7c5 MI	143	int arg_cnt_send,
	144	int arg_cnt_recv,
	145	u32 *argp)
d855497e MI	146	{
d855497e MI	147	unsigned int poll_count;
c43000ef MI	148	unsigned int try_count = 0;
c43000ef MI	149	int retry_flag;
d855497e	150	int ret = 0;
d855497e	151	unsigned int idx;
eacbe7c5	152	/* These sizes look to be limited by the FX2 firmware implementation */
d855497e	153	u32 wrData[16];
eacbe7c5 MI	154	u32 rdData[16];
eacbe7c5 MI	155	struct pvr2_hdw hdw = (struct pvr2_hdw )ctxt;
d855497e	156
c05c0462	157
d855497e MI	158	/*
	159
	160	The encoder seems to speak entirely using blocks 32 bit words.
c43000ef MI	161	In ivtv driver terms, this is a mailbox at MBOX_BASE which we
	162	populate with data and watch what the hardware does with it.
	163	The first word is a set of flags used to control the
	164	transaction, the second word is the command to execute, the
	165	third byte is zero (ivtv driver suggests that this is some
	166	kind of return value), and the fourth byte is a specified
	167	timeout (windows driver always uses 0x00060000 except for one
	168	case when it is zero). All successive words are the argument
	169	words for the command.
d855497e MI	170
	171	First, write out the entire set of words, with the first word
	172	being zero.
	173
	174	Next, write out just the first word again, but set it to
	175	IVTV_MBOX_DRIVER_DONE \| IVTV_DRIVER_BUSY this time (which
	176	probably means "go").
	177
c43000ef	178	Next, read back the return count words. Check the first word,
d855497e MI	179	which should have IVTV_MBOX_FIRMWARE_DONE set. If however
d855497e MI	180	that bit is not set, then the command isn't done so repeat the
c43000ef	181	read until it is set.
d855497e MI	182
	183	Finally, write out just the first word again, but set it to
	184	0x0 this time (which probably means "idle").
	185
	186	*/
	187
eca8ebfc	188	if (arg_cnt_send > (ARRAY_SIZE(wrData) - 4)) {
eacbe7c5 MI	189	pvr2_trace(
	190	PVR2_TRACE_ERROR_LEGS,
	191	"Failed to write cx23416 command"
	192	" - too many input arguments"
69b04f0d MCC	193	" (was given %u limit %lu)",
69b04f0d MCC	194	arg_cnt_send, (long unsigned) ARRAY_SIZE(wrData) - 4);
eacbe7c5 MI	195	return -EINVAL;
	196	}
	197
eca8ebfc	198	if (arg_cnt_recv > (ARRAY_SIZE(rdData) - 4)) {
eacbe7c5 MI	199	pvr2_trace(
	200	PVR2_TRACE_ERROR_LEGS,
	201	"Failed to write cx23416 command"
	202	" - too many return arguments"
69b04f0d MCC	203	" (was given %u limit %lu)",
69b04f0d MCC	204	arg_cnt_recv, (long unsigned) ARRAY_SIZE(rdData) - 4);
eacbe7c5 MI	205	return -EINVAL;
	206	}
	207
d855497e MI	208
	209	LOCK_TAKE(hdw->ctl_lock); do {
	210
681c7399	211	if (!hdw->state_encoder_ok) {
9a607f01 MI	212	ret = -EIO;
	213	break;
	214	}
	215
c43000ef MI	216	retry_flag = 0;
	217	try_count++;
	218	ret = 0;
d855497e MI	219	wrData[0] = 0;
	220	wrData[1] = cmd;
	221	wrData[2] = 0;
	222	wrData[3] = 0x00060000;
eacbe7c5 MI	223	for (idx = 0; idx < arg_cnt_send; idx++) {
eacbe7c5 MI	224	wrData[idx+4] = argp[idx];
d855497e	225	}
eca8ebfc	226	for (; idx < ARRAY_SIZE(wrData) - 4; idx++) {
eacbe7c5	227	wrData[idx+4] = 0;
d855497e MI	228	}
d855497e MI	229
c43000ef	230	ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,idx);
d855497e MI	231	if (ret) break;
d855497e MI	232	wrData[0] = IVTV_MBOX_DRIVER_DONE\|IVTV_MBOX_DRIVER_BUSY;
c43000ef	233	ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1);
d855497e MI	234	if (ret) break;
	235	poll_count = 0;
	236	while (1) {
c43000ef MI	237	poll_count++;
	238	ret = pvr2_encoder_read_words(hdw,MBOX_BASE,rdData,
	239	arg_cnt_recv+4);
	240	if (ret) {
	241	break;
	242	}
d855497e MI	243	if (rdData[0] & IVTV_MBOX_FIRMWARE_DONE) {
	244	break;
	245	}
c43000ef MI	246	if (rdData[0] && (poll_count < 1000)) continue;
	247	if (!rdData[0]) {
	248	retry_flag = !0;
	249	pvr2_trace(
	250	PVR2_TRACE_ERROR_LEGS,
	251	"Encoder timed out waiting for us"
	252	"; arranging to retry");
	253	} else {
d855497e MI	254	pvr2_trace(
	255	PVR2_TRACE_ERROR_LEGS,
	256	"*WARNING* device's encoder"
	257	" appears to be stuck"
201779f5	258	" (status=0x%08x)",rdData[0]);
c43000ef MI	259	}
	260	pvr2_trace(
	261	PVR2_TRACE_ERROR_LEGS,
	262	"Encoder command: 0x%02x",cmd);
	263	for (idx = 4; idx < arg_cnt_send; idx++) {
d855497e MI	264	pvr2_trace(
d855497e MI	265	PVR2_TRACE_ERROR_LEGS,
c43000ef MI	266	"Encoder arg%d: 0x%08x",
c43000ef MI	267	idx-3,wrData[idx]);
d855497e	268	}
c43000ef MI	269	ret = -EBUSY;
	270	break;
	271	}
	272	if (retry_flag) {
	273	if (try_count < 20) continue;
	274	pvr2_trace(
	275	PVR2_TRACE_ERROR_LEGS,
	276	"Too many retries...");
	277	ret = -EBUSY;
	278	}
	279	if (ret) {
d913d630	280	del_timer_sync(&hdw->encoder_run_timer);
681c7399 MI	281	hdw->state_encoder_ok = 0;
	282	pvr2_trace(PVR2_TRACE_STBITS,
	283	"State bit %s <-- %s",
	284	"state_encoder_ok",
	285	(hdw->state_encoder_ok ? "true" : "false"));
d913d630 MI	286	if (hdw->state_encoder_runok) {
	287	hdw->state_encoder_runok = 0;
	288	pvr2_trace(PVR2_TRACE_STBITS,
	289	"State bit %s <-- %s",
	290	"state_encoder_runok",
	291	(hdw->state_encoder_runok ?
	292	"true" : "false"));
	293	}
c43000ef MI	294	pvr2_trace(
	295	PVR2_TRACE_ERROR_LEGS,
	296	"Giving up on command."
1b33185f MI	297	" This is normally recovered via a firmware"
	298	" reload and re-initialization; concern"
	299	" is only warranted if this happens repeatedly"
	300	" and rapidly.");
c43000ef	301	break;
d855497e	302	}
d855497e	303	wrData[0] = 0x7;
eacbe7c5 MI	304	for (idx = 0; idx < arg_cnt_recv; idx++) {
eacbe7c5 MI	305	argp[idx] = rdData[idx+4];
d855497e MI	306	}
	307
	308	wrData[0] = 0x0;
c43000ef	309	ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1);
d855497e MI	310	if (ret) break;
	311
	312	} while(0); LOCK_GIVE(hdw->ctl_lock);
	313
	314	return ret;
	315	}
	316
eacbe7c5 MI	317
	318	static int pvr2_encoder_vcmd(struct pvr2_hdw *hdw, int cmd,
	319	int args, ...)
	320	{
	321	va_list vl;
	322	unsigned int idx;
	323	u32 data[12];
	324
eca8ebfc	325	if (args > ARRAY_SIZE(data)) {
eacbe7c5 MI	326	pvr2_trace(
	327	PVR2_TRACE_ERROR_LEGS,
	328	"Failed to write cx23416 command"
	329	" - too many arguments"
69b04f0d MCC	330	" (was given %u limit %lu)",
69b04f0d MCC	331	args, (long unsigned) ARRAY_SIZE(data));
eacbe7c5 MI	332	return -EINVAL;
	333	}
	334
	335	va_start(vl, args);
	336	for (idx = 0; idx < args; idx++) {
	337	data[idx] = va_arg(vl, u32);
	338	}
	339	va_end(vl);
	340
	341	return pvr2_encoder_cmd(hdw,cmd,args,0,data);
	342	}
	343
6fe7d2c4 MI	344
	345	/* This implements some extra setup for the encoder that seems to be
	346	specific to the PVR USB2 hardware. */
5948e52c	347	static int pvr2_encoder_prep_config(struct pvr2_hdw *hdw)
6fe7d2c4 MI	348	{
	349	int ret = 0;
	350	int encMisc3Arg = 0;
	351
	352	#if 0
e86da6f0	353	/* This inexplicable bit happens in the Hauppauge windows
6fe7d2c4 MI	354	driver (for both 24xxx and 29xxx devices). However I
	355	currently see no difference in behavior with or without
	356	this stuff. Leave this here as a note of its existence,
	357	but don't use it. */
	358	LOCK_TAKE(hdw->ctl_lock); do {
	359	u32 dat[1];
	360	dat[0] = 0x80000640;
	361	pvr2_encoder_write_words(hdw,0x01fe,dat,1);
	362	pvr2_encoder_write_words(hdw,0x023e,dat,1);
	363	} while(0); LOCK_GIVE(hdw->ctl_lock);
	364	#endif
	365
	366	/* Mike Isely <isely@pobox.com> 26-Jan-2006 The windows driver
	367	sends the following list of ENC_MISC commands (for both
	368	24xxx and 29xxx devices). Meanings are not entirely clear,
	369	however without the ENC_MISC(3,1) command then we risk
	370	random perpetual video corruption whenever the video input
	371	breaks up for a moment (like when switching channels). */
	372
	373
	374	#if 0
	375	/* This ENC_MISC(5,0) command seems to hurt 29xxx sync
	376	performance on channel changes, but is not a problem on
	377	24xxx devices. */
	378	ret \|= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 5,0,0,0);
	379	#endif
	380
	381	/* This ENC_MISC(3,encMisc3Arg) command is critical - without
	382	it there will eventually be video corruption. Also, the
989eb154 MI	383	saa7115 case is strange - the Windows driver is passing 1
	384	regardless of device type but if we have 1 for saa7115
	385	devices the video turns sluggish. */
	386	if (hdw->hdw_desc->flag_has_cx25840) {
	387	encMisc3Arg = 1;
	388	} else {
	389	encMisc3Arg = 0;
6fe7d2c4 MI	390	}
	391	ret \|= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 3,
	392	encMisc3Arg,0,0);
	393
	394	ret \|= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 8,0,0,0);
	395
	396	#if 0
	397	/* This ENC_MISC(4,1) command is poisonous, so it is commented
	398	out. But I'm leaving it here anyway to document its
	399	existence in the Windows driver. The effect of this
	400	command is that apps displaying the stream become sluggish
	401	with stuttering video. */
	402	ret \|= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 4,1,0,0);
	403	#endif
	404
	405	ret \|= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 0,3,0,0);
	406	ret \|= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4,15,0,0,0);
	407
3f93d1ad BD	408	/* prevent the PTSs from slowly drifting away in the generated
	409	MPEG stream */
	410	ret \|= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC, 2, 4, 1);
	411
6fe7d2c4 MI	412	return ret;
	413	}
	414
681c7399 MI	415	int pvr2_encoder_adjust(struct pvr2_hdw *hdw)
	416	{
	417	int ret;
	418	ret = cx2341x_update(hdw,pvr2_encoder_cmd,
	419	(hdw->enc_cur_valid ? &hdw->enc_cur_state : NULL),
	420	&hdw->enc_ctl_state);
	421	if (ret) {
	422	pvr2_trace(PVR2_TRACE_ERROR_LEGS,
	423	"Error from cx2341x module code=%d",ret);
	424	} else {
	425	memcpy(&hdw->enc_cur_state,&hdw->enc_ctl_state,
	426	sizeof(struct cx2341x_mpeg_params));
	427	hdw->enc_cur_valid = !0;
	428	}
	429	return ret;
	430	}
	431
	432
d855497e MI	433	int pvr2_encoder_configure(struct pvr2_hdw *hdw)
d855497e MI	434	{
b30d2441	435	int ret;
db71b7df	436	int val;
b30d2441 MI	437	pvr2_trace(PVR2_TRACE_ENCODER,"pvr2_encoder_configure"
	438	" (cx2341x module)");
	439	hdw->enc_ctl_state.port = CX2341X_PORT_STREAMING;
	440	hdw->enc_ctl_state.width = hdw->res_hor_val;
	441	hdw->enc_ctl_state.height = hdw->res_ver_val;
db71b7df	442	hdw->enc_ctl_state.is_50hz = ((hdw->std_mask_cur & V4L2_STD_525_60) ?
b30d2441	443	0 : 1);
d855497e	444
b30d2441 MI	445	ret = 0;
b30d2441 MI	446
6fe7d2c4 MI	447	ret \|= pvr2_encoder_prep_config(hdw);
6fe7d2c4 MI	448
db71b7df MI	449	/* saa7115: 0xf0 */
db71b7df MI	450	val = 0xf0;
989eb154	451	if (hdw->hdw_desc->flag_has_cx25840) {
db71b7df MI	452	/* ivtv cx25840: 0x140 */
	453	val = 0x140;
	454	}
	455
b30d2441 MI	456	if (!ret) ret = pvr2_encoder_vcmd(
b30d2441 MI	457	hdw,CX2341X_ENC_SET_NUM_VSYNC_LINES, 2,
db71b7df	458	val, val);
d855497e MI	459
d855497e MI	460	/* setup firmware to notify us about some events (don't know why...) */
b30d2441 MI	461	if (!ret) ret = pvr2_encoder_vcmd(
	462	hdw,CX2341X_ENC_SET_EVENT_NOTIFICATION, 4,
	463	0, 0, 0x10000000, 0xffffffff);
	464
	465	if (!ret) ret = pvr2_encoder_vcmd(
	466	hdw,CX2341X_ENC_SET_VBI_LINE, 5,
	467	0xffffffff,0,0,0,0);
	468
	469	if (ret) {
	470	pvr2_trace(PVR2_TRACE_ERROR_LEGS,
58f56cbe	471	"Failed to configure cx23416");
b30d2441 MI	472	return ret;
b30d2441 MI	473	}
d855497e	474
681c7399 MI	475	ret = pvr2_encoder_adjust(hdw);
681c7399 MI	476	if (ret) return ret;
d855497e	477
681c7399	478	ret = pvr2_encoder_vcmd(
b30d2441	479	hdw, CX2341X_ENC_INITIALIZE_INPUT, 0);
d855497e	480
b30d2441 MI	481	if (ret) {
b30d2441 MI	482	pvr2_trace(PVR2_TRACE_ERROR_LEGS,
58f56cbe	483	"Failed to initialize cx23416 video input");
b30d2441	484	return ret;
d855497e MI	485	}
d855497e MI	486
b30d2441	487	return 0;
d855497e MI	488	}
d855497e MI	489
b30d2441	490
d855497e MI	491	int pvr2_encoder_start(struct pvr2_hdw *hdw)
	492	{
	493	int status;
	494
	495	/* unmask some interrupts */
	496	pvr2_write_register(hdw, 0x0048, 0xbfffffff);
	497
275b2e28 PK	498	pvr2_encoder_vcmd(hdw,CX2341X_ENC_MUTE_VIDEO,1,
	499	hdw->input_val == PVR2_CVAL_INPUT_RADIO ? 1 : 0);
	500
681c7399	501	switch (hdw->active_stream_type) {
16eb40d3	502	case pvr2_config_vbi:
eacbe7c5 MI	503	status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
eacbe7c5 MI	504	0x01,0x14);
16eb40d3 MI	505	break;
16eb40d3 MI	506	case pvr2_config_mpeg:
eacbe7c5 MI	507	status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
eacbe7c5 MI	508	0,0x13);
16eb40d3 MI	509	break;
16eb40d3 MI	510	default: /* Unhandled cases for now */
eacbe7c5 MI	511	status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
eacbe7c5 MI	512	0,0x13);
16eb40d3	513	break;
d855497e	514	}
d855497e MI	515	return status;
	516	}
	517
	518	int pvr2_encoder_stop(struct pvr2_hdw *hdw)
	519	{
	520	int status;
	521
	522	/* mask all interrupts */
	523	pvr2_write_register(hdw, 0x0048, 0xffffffff);
	524
681c7399	525	switch (hdw->active_stream_type) {
16eb40d3	526	case pvr2_config_vbi:
eacbe7c5 MI	527	status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
eacbe7c5 MI	528	0x01,0x01,0x14);
16eb40d3 MI	529	break;
16eb40d3 MI	530	case pvr2_config_mpeg:
eacbe7c5 MI	531	status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
eacbe7c5 MI	532	0x01,0,0x13);
16eb40d3 MI	533	break;
16eb40d3 MI	534	default: /* Unhandled cases for now */
eacbe7c5 MI	535	status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
eacbe7c5 MI	536	0x01,0,0x13);
16eb40d3	537	break;
d855497e MI	538	}
d855497e MI	539
d855497e MI	540	return status;
	541	}
	542
	543
	544	/*
	545	Stuff for Emacs to see, in order to encourage consistent editing style:
	546	* Local Variables: *
	547	* mode: c *
	548	* fill-column: 70 *
	549	* tab-width: 8 *
	550	* c-basic-offset: 8 *
	551	* End: *
	552	*/