V4L/DVB (5467): Add suspend/resume support to the Cafe CCIC
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / ov7670.c
CommitLineData
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1/*
2 * A V4L2 driver for OmniVision OV7670 cameras.
3 *
4 * Copyright 2006 One Laptop Per Child Association, Inc. Written
5 * by Jonathan Corbet with substantial inspiration from Mark
6 * McClelland's ovcamchip code.
7 *
8 * This file may be distributed under the terms of the GNU General
9 * Public License, version 2.
10 */
11#include <linux/init.h>
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/slab.h>
15#include <linux/delay.h>
16#include <linux/videodev.h>
17#include <media/v4l2-common.h>
3434eb7e 18#include <media/v4l2-chip-ident.h>
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19#include <linux/i2c.h>
20
21
5e614475 22MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
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23MODULE_DESCRIPTION("A low-level driver for OmniVision ov7670 sensors");
24MODULE_LICENSE("GPL");
25
26/*
27 * Basic window sizes. These probably belong somewhere more globally
28 * useful.
29 */
30#define VGA_WIDTH 640
31#define VGA_HEIGHT 480
32#define QVGA_WIDTH 320
33#define QVGA_HEIGHT 240
34#define CIF_WIDTH 352
35#define CIF_HEIGHT 288
36#define QCIF_WIDTH 176
37#define QCIF_HEIGHT 144
38
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39/*
40 * Our nominal (default) frame rate.
41 */
42#define OV7670_FRAME_RATE 30
43
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44/*
45 * The 7670 sits on i2c with ID 0x42
46 */
47#define OV7670_I2C_ADDR 0x42
48
49/* Registers */
50#define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
51#define REG_BLUE 0x01 /* blue gain */
52#define REG_RED 0x02 /* red gain */
53#define REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
54#define REG_COM1 0x04 /* Control 1 */
55#define COM1_CCIR656 0x40 /* CCIR656 enable */
56#define REG_BAVE 0x05 /* U/B Average level */
57#define REG_GbAVE 0x06 /* Y/Gb Average level */
58#define REG_AECHH 0x07 /* AEC MS 5 bits */
59#define REG_RAVE 0x08 /* V/R Average level */
60#define REG_COM2 0x09 /* Control 2 */
61#define COM2_SSLEEP 0x10 /* Soft sleep mode */
62#define REG_PID 0x0a /* Product ID MSB */
63#define REG_VER 0x0b /* Product ID LSB */
64#define REG_COM3 0x0c /* Control 3 */
65#define COM3_SWAP 0x40 /* Byte swap */
66#define COM3_SCALEEN 0x08 /* Enable scaling */
67#define COM3_DCWEN 0x04 /* Enable downsamp/crop/window */
68#define REG_COM4 0x0d /* Control 4 */
69#define REG_COM5 0x0e /* All "reserved" */
70#define REG_COM6 0x0f /* Control 6 */
71#define REG_AECH 0x10 /* More bits of AEC value */
72#define REG_CLKRC 0x11 /* Clocl control */
73#define CLK_EXT 0x40 /* Use external clock directly */
74#define CLK_SCALE 0x3f /* Mask for internal clock scale */
75#define REG_COM7 0x12 /* Control 7 */
76#define COM7_RESET 0x80 /* Register reset */
77#define COM7_FMT_MASK 0x38
78#define COM7_FMT_VGA 0x00
79#define COM7_FMT_CIF 0x20 /* CIF format */
80#define COM7_FMT_QVGA 0x10 /* QVGA format */
81#define COM7_FMT_QCIF 0x08 /* QCIF format */
82#define COM7_RGB 0x04 /* bits 0 and 2 - RGB format */
83#define COM7_YUV 0x00 /* YUV */
84#define COM7_BAYER 0x01 /* Bayer format */
85#define COM7_PBAYER 0x05 /* "Processed bayer" */
86#define REG_COM8 0x13 /* Control 8 */
87#define COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
88#define COM8_AECSTEP 0x40 /* Unlimited AEC step size */
89#define COM8_BFILT 0x20 /* Band filter enable */
90#define COM8_AGC 0x04 /* Auto gain enable */
91#define COM8_AWB 0x02 /* White balance enable */
92#define COM8_AEC 0x01 /* Auto exposure enable */
93#define REG_COM9 0x14 /* Control 9 - gain ceiling */
94#define REG_COM10 0x15 /* Control 10 */
95#define COM10_HSYNC 0x40 /* HSYNC instead of HREF */
96#define COM10_PCLK_HB 0x20 /* Suppress PCLK on horiz blank */
97#define COM10_HREF_REV 0x08 /* Reverse HREF */
98#define COM10_VS_LEAD 0x04 /* VSYNC on clock leading edge */
99#define COM10_VS_NEG 0x02 /* VSYNC negative */
100#define COM10_HS_NEG 0x01 /* HSYNC negative */
101#define REG_HSTART 0x17 /* Horiz start high bits */
102#define REG_HSTOP 0x18 /* Horiz stop high bits */
103#define REG_VSTART 0x19 /* Vert start high bits */
104#define REG_VSTOP 0x1a /* Vert stop high bits */
105#define REG_PSHFT 0x1b /* Pixel delay after HREF */
106#define REG_MIDH 0x1c /* Manuf. ID high */
107#define REG_MIDL 0x1d /* Manuf. ID low */
108#define REG_MVFP 0x1e /* Mirror / vflip */
109#define MVFP_MIRROR 0x20 /* Mirror image */
110#define MVFP_FLIP 0x10 /* Vertical flip */
111
112#define REG_AEW 0x24 /* AGC upper limit */
113#define REG_AEB 0x25 /* AGC lower limit */
114#define REG_VPT 0x26 /* AGC/AEC fast mode op region */
115#define REG_HSYST 0x30 /* HSYNC rising edge delay */
116#define REG_HSYEN 0x31 /* HSYNC falling edge delay */
117#define REG_HREF 0x32 /* HREF pieces */
118#define REG_TSLB 0x3a /* lots of stuff */
119#define TSLB_YLAST 0x04 /* UYVY or VYUY - see com13 */
120#define REG_COM11 0x3b /* Control 11 */
121#define COM11_NIGHT 0x80 /* NIght mode enable */
122#define COM11_NMFR 0x60 /* Two bit NM frame rate */
123#define COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
124#define COM11_50HZ 0x08 /* Manual 50Hz select */
125#define COM11_EXP 0x02
126#define REG_COM12 0x3c /* Control 12 */
127#define COM12_HREF 0x80 /* HREF always */
128#define REG_COM13 0x3d /* Control 13 */
129#define COM13_GAMMA 0x80 /* Gamma enable */
130#define COM13_UVSAT 0x40 /* UV saturation auto adjustment */
131#define COM13_UVSWAP 0x01 /* V before U - w/TSLB */
132#define REG_COM14 0x3e /* Control 14 */
133#define COM14_DCWEN 0x10 /* DCW/PCLK-scale enable */
134#define REG_EDGE 0x3f /* Edge enhancement factor */
135#define REG_COM15 0x40 /* Control 15 */
136#define COM15_R10F0 0x00 /* Data range 10 to F0 */
137#define COM15_R01FE 0x80 /* 01 to FE */
138#define COM15_R00FF 0xc0 /* 00 to FF */
139#define COM15_RGB565 0x10 /* RGB565 output */
140#define COM15_RGB555 0x30 /* RGB555 output */
141#define REG_COM16 0x41 /* Control 16 */
142#define COM16_AWBGAIN 0x08 /* AWB gain enable */
143#define REG_COM17 0x42 /* Control 17 */
144#define COM17_AECWIN 0xc0 /* AEC window - must match COM4 */
145#define COM17_CBAR 0x08 /* DSP Color bar */
146
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147/*
148 * This matrix defines how the colors are generated, must be
149 * tweaked to adjust hue and saturation.
150 *
151 * Order: v-red, v-green, v-blue, u-red, u-green, u-blue
152 *
153 * They are nine-bit signed quantities, with the sign bit
154 * stored in 0x58. Sign for v-red is bit 0, and up from there.
155 */
156#define REG_CMATRIX_BASE 0x4f
157#define CMATRIX_LEN 6
158#define REG_CMATRIX_SIGN 0x58
159
160
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161#define REG_BRIGHT 0x55 /* Brightness */
162#define REG_CONTRAS 0x56 /* Contrast control */
163
164#define REG_GFIX 0x69 /* Fix gain control */
165
166#define REG_RGB444 0x8c /* RGB 444 control */
167#define R444_ENABLE 0x02 /* Turn on RGB444, overrides 5x5 */
168#define R444_RGBX 0x01 /* Empty nibble at end */
169
170#define REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
171#define REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
172
173#define REG_BD50MAX 0xa5 /* 50hz banding step limit */
174#define REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
175#define REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
176#define REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
177#define REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
178#define REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
179#define REG_BD60MAX 0xab /* 60hz banding step limit */
180
181
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182/*
183 * Information we maintain about a known sensor.
184 */
185struct ov7670_format_struct; /* coming later */
186struct ov7670_info {
187 struct ov7670_format_struct *fmt; /* Current format */
188 unsigned char sat; /* Saturation value */
189 int hue; /* Hue value */
190};
191
192
193
194
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195/*
196 * The default register settings, as obtained from OmniVision. There
197 * is really no making sense of most of these - lots of "reserved" values
198 * and such.
199 *
200 * These settings give VGA YUYV.
201 */
202
203struct regval_list {
204 unsigned char reg_num;
205 unsigned char value;
206};
207
208static struct regval_list ov7670_default_regs[] = {
209 { REG_COM7, COM7_RESET },
210/*
211 * Clock scale: 3 = 15fps
212 * 2 = 20fps
213 * 1 = 30fps
214 */
f9a76156 215 { REG_CLKRC, 0x1 }, /* OV: clock scale (30 fps) */
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216 { REG_TSLB, 0x04 }, /* OV */
217 { REG_COM7, 0 }, /* VGA */
218 /*
219 * Set the hardware window. These values from OV don't entirely
220 * make sense - hstop is less than hstart. But they work...
221 */
222 { REG_HSTART, 0x13 }, { REG_HSTOP, 0x01 },
223 { REG_HREF, 0xb6 }, { REG_VSTART, 0x02 },
224 { REG_VSTOP, 0x7a }, { REG_VREF, 0x0a },
225
226 { REG_COM3, 0 }, { REG_COM14, 0 },
227 /* Mystery scaling numbers */
228 { 0x70, 0x3a }, { 0x71, 0x35 },
229 { 0x72, 0x11 }, { 0x73, 0xf0 },
230 { 0xa2, 0x02 }, { REG_COM10, 0x0 },
231
232 /* Gamma curve values */
233 { 0x7a, 0x20 }, { 0x7b, 0x10 },
234 { 0x7c, 0x1e }, { 0x7d, 0x35 },
235 { 0x7e, 0x5a }, { 0x7f, 0x69 },
236 { 0x80, 0x76 }, { 0x81, 0x80 },
237 { 0x82, 0x88 }, { 0x83, 0x8f },
238 { 0x84, 0x96 }, { 0x85, 0xa3 },
239 { 0x86, 0xaf }, { 0x87, 0xc4 },
240 { 0x88, 0xd7 }, { 0x89, 0xe8 },
241
242 /* AGC and AEC parameters. Note we start by disabling those features,
243 then turn them only after tweaking the values. */
244 { REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT },
245 { REG_GAIN, 0 }, { REG_AECH, 0 },
246 { REG_COM4, 0x40 }, /* magic reserved bit */
247 { REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
248 { REG_BD50MAX, 0x05 }, { REG_BD60MAX, 0x07 },
249 { REG_AEW, 0x95 }, { REG_AEB, 0x33 },
250 { REG_VPT, 0xe3 }, { REG_HAECC1, 0x78 },
251 { REG_HAECC2, 0x68 }, { 0xa1, 0x03 }, /* magic */
252 { REG_HAECC3, 0xd8 }, { REG_HAECC4, 0xd8 },
253 { REG_HAECC5, 0xf0 }, { REG_HAECC6, 0x90 },
254 { REG_HAECC7, 0x94 },
255 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC },
256
257 /* Almost all of these are magic "reserved" values. */
258 { REG_COM5, 0x61 }, { REG_COM6, 0x4b },
259 { 0x16, 0x02 }, { REG_MVFP, 0x07|MVFP_MIRROR },
260 { 0x21, 0x02 }, { 0x22, 0x91 },
261 { 0x29, 0x07 }, { 0x33, 0x0b },
262 { 0x35, 0x0b }, { 0x37, 0x1d },
263 { 0x38, 0x71 }, { 0x39, 0x2a },
264 { REG_COM12, 0x78 }, { 0x4d, 0x40 },
265 { 0x4e, 0x20 }, { REG_GFIX, 0 },
266 { 0x6b, 0x4a }, { 0x74, 0x10 },
267 { 0x8d, 0x4f }, { 0x8e, 0 },
268 { 0x8f, 0 }, { 0x90, 0 },
269 { 0x91, 0 }, { 0x96, 0 },
270 { 0x9a, 0 }, { 0xb0, 0x84 },
271 { 0xb1, 0x0c }, { 0xb2, 0x0e },
272 { 0xb3, 0x82 }, { 0xb8, 0x0a },
273
274 /* More reserved magic, some of which tweaks white balance */
275 { 0x43, 0x0a }, { 0x44, 0xf0 },
276 { 0x45, 0x34 }, { 0x46, 0x58 },
277 { 0x47, 0x28 }, { 0x48, 0x3a },
278 { 0x59, 0x88 }, { 0x5a, 0x88 },
279 { 0x5b, 0x44 }, { 0x5c, 0x67 },
280 { 0x5d, 0x49 }, { 0x5e, 0x0e },
281 { 0x6c, 0x0a }, { 0x6d, 0x55 },
282 { 0x6e, 0x11 }, { 0x6f, 0x9f }, /* "9e for advance AWB" */
283 { 0x6a, 0x40 }, { REG_BLUE, 0x40 },
284 { REG_RED, 0x60 },
285 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC|COM8_AWB },
286
287 /* Matrix coefficients */
288 { 0x4f, 0x80 }, { 0x50, 0x80 },
289 { 0x51, 0 }, { 0x52, 0x22 },
290 { 0x53, 0x5e }, { 0x54, 0x80 },
291 { 0x58, 0x9e },
292
293 { REG_COM16, COM16_AWBGAIN }, { REG_EDGE, 0 },
294 { 0x75, 0x05 }, { 0x76, 0xe1 },
295 { 0x4c, 0 }, { 0x77, 0x01 },
296 { REG_COM13, 0xc3 }, { 0x4b, 0x09 },
297 { 0xc9, 0x60 }, { REG_COM16, 0x38 },
298 { 0x56, 0x40 },
299
c8f5b2f5 300 { 0x34, 0x11 }, { REG_COM11, COM11_EXP|COM11_HZAUTO },
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301 { 0xa4, 0x88 }, { 0x96, 0 },
302 { 0x97, 0x30 }, { 0x98, 0x20 },
303 { 0x99, 0x30 }, { 0x9a, 0x84 },
304 { 0x9b, 0x29 }, { 0x9c, 0x03 },
305 { 0x9d, 0x4c }, { 0x9e, 0x3f },
306 { 0x78, 0x04 },
307
308 /* Extra-weird stuff. Some sort of multiplexor register */
309 { 0x79, 0x01 }, { 0xc8, 0xf0 },
310 { 0x79, 0x0f }, { 0xc8, 0x00 },
311 { 0x79, 0x10 }, { 0xc8, 0x7e },
312 { 0x79, 0x0a }, { 0xc8, 0x80 },
313 { 0x79, 0x0b }, { 0xc8, 0x01 },
314 { 0x79, 0x0c }, { 0xc8, 0x0f },
315 { 0x79, 0x0d }, { 0xc8, 0x20 },
316 { 0x79, 0x09 }, { 0xc8, 0x80 },
317 { 0x79, 0x02 }, { 0xc8, 0xc0 },
318 { 0x79, 0x03 }, { 0xc8, 0x40 },
319 { 0x79, 0x05 }, { 0xc8, 0x30 },
320 { 0x79, 0x26 },
321
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322 { 0xff, 0xff }, /* END MARKER */
323};
324
325
326/*
327 * Here we'll try to encapsulate the changes for just the output
328 * video format.
329 *
330 * RGB656 and YUV422 come from OV; RGB444 is homebrewed.
331 *
332 * IMPORTANT RULE: the first entry must be for COM7, see ov7670_s_fmt for why.
333 */
334
335
336static struct regval_list ov7670_fmt_yuv422[] = {
337 { REG_COM7, 0x0 }, /* Selects YUV mode */
338 { REG_RGB444, 0 }, /* No RGB444 please */
339 { REG_COM1, 0 },
340 { REG_COM15, COM15_R00FF },
341 { REG_COM9, 0x18 }, /* 4x gain ceiling; 0x8 is reserved bit */
342 { 0x4f, 0x80 }, /* "matrix coefficient 1" */
343 { 0x50, 0x80 }, /* "matrix coefficient 2" */
f9a76156 344 { 0x51, 0 }, /* vb */
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345 { 0x52, 0x22 }, /* "matrix coefficient 4" */
346 { 0x53, 0x5e }, /* "matrix coefficient 5" */
347 { 0x54, 0x80 }, /* "matrix coefficient 6" */
348 { REG_COM13, COM13_GAMMA|COM13_UVSAT },
349 { 0xff, 0xff },
350};
351
352static struct regval_list ov7670_fmt_rgb565[] = {
353 { REG_COM7, COM7_RGB }, /* Selects RGB mode */
354 { REG_RGB444, 0 }, /* No RGB444 please */
355 { REG_COM1, 0x0 },
356 { REG_COM15, COM15_RGB565 },
357 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
358 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
359 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
f9a76156 360 { 0x51, 0 }, /* vb */
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361 { 0x52, 0x3d }, /* "matrix coefficient 4" */
362 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
363 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
364 { REG_COM13, COM13_GAMMA|COM13_UVSAT },
365 { 0xff, 0xff },
366};
367
368static struct regval_list ov7670_fmt_rgb444[] = {
369 { REG_COM7, COM7_RGB }, /* Selects RGB mode */
370 { REG_RGB444, R444_ENABLE }, /* Enable xxxxrrrr ggggbbbb */
371 { REG_COM1, 0x40 }, /* Magic reserved bit */
372 { REG_COM15, COM15_R01FE|COM15_RGB565 }, /* Data range needed? */
373 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
374 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
375 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
f9a76156 376 { 0x51, 0 }, /* vb */
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377 { 0x52, 0x3d }, /* "matrix coefficient 4" */
378 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
379 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
380 { REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2 }, /* Magic rsvd bit */
381 { 0xff, 0xff },
382};
383
384
385
386
387/*
388 * Low-level register I/O.
389 */
390
391static int ov7670_read(struct i2c_client *c, unsigned char reg,
392 unsigned char *value)
393{
394 int ret;
395
396 ret = i2c_smbus_read_byte_data(c, reg);
f9a76156 397 if (ret >= 0)
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398 *value = (unsigned char) ret;
399 return ret;
400}
401
402
403static int ov7670_write(struct i2c_client *c, unsigned char reg,
404 unsigned char value)
405{
406 return i2c_smbus_write_byte_data(c, reg, value);
407}
408
409
410/*
411 * Write a list of register settings; ff/ff stops the process.
412 */
413static int ov7670_write_array(struct i2c_client *c, struct regval_list *vals)
414{
415 while (vals->reg_num != 0xff || vals->value != 0xff) {
416 int ret = ov7670_write(c, vals->reg_num, vals->value);
417 if (ret < 0)
418 return ret;
419 vals++;
420 }
421 return 0;
422}
423
424
425/*
426 * Stuff that knows about the sensor.
427 */
428static void ov7670_reset(struct i2c_client *client)
429{
430 ov7670_write(client, REG_COM7, COM7_RESET);
431 msleep(1);
432}
433
434
435static int ov7670_init(struct i2c_client *client)
436{
437 return ov7670_write_array(client, ov7670_default_regs);
438}
439
440
441
442static int ov7670_detect(struct i2c_client *client)
443{
444 unsigned char v;
445 int ret;
446
447 ret = ov7670_init(client);
448 if (ret < 0)
449 return ret;
450 ret = ov7670_read(client, REG_MIDH, &v);
451 if (ret < 0)
452 return ret;
453 if (v != 0x7f) /* OV manuf. id. */
454 return -ENODEV;
455 ret = ov7670_read(client, REG_MIDL, &v);
456 if (ret < 0)
457 return ret;
458 if (v != 0xa2)
459 return -ENODEV;
460 /*
461 * OK, we know we have an OmniVision chip...but which one?
462 */
463 ret = ov7670_read(client, REG_PID, &v);
464 if (ret < 0)
465 return ret;
466 if (v != 0x76) /* PID + VER = 0x76 / 0x73 */
467 return -ENODEV;
468 ret = ov7670_read(client, REG_VER, &v);
469 if (ret < 0)
470 return ret;
471 if (v != 0x73) /* PID + VER = 0x76 / 0x73 */
472 return -ENODEV;
473 return 0;
474}
475
476
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477/*
478 * Store information about the video data format. The color matrix
479 * is deeply tied into the format, so keep the relevant values here.
480 * The magic matrix nubmers come from OmniVision.
481 */
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482static struct ov7670_format_struct {
483 __u8 *desc;
484 __u32 pixelformat;
485 struct regval_list *regs;
f9a76156 486 int cmatrix[CMATRIX_LEN];
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487} ov7670_formats[] = {
488 {
489 .desc = "YUYV 4:2:2",
490 .pixelformat = V4L2_PIX_FMT_YUYV,
491 .regs = ov7670_fmt_yuv422,
f9a76156 492 .cmatrix = { 128, -128, 0, -34, -94, 128 },
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493 },
494 {
495 .desc = "RGB 444",
496 .pixelformat = V4L2_PIX_FMT_RGB444,
497 .regs = ov7670_fmt_rgb444,
f9a76156 498 .cmatrix = { 179, -179, 0, -61, -176, 228 },
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499 },
500 {
501 .desc = "RGB 565",
502 .pixelformat = V4L2_PIX_FMT_RGB565,
503 .regs = ov7670_fmt_rgb565,
f9a76156 504 .cmatrix = { 179, -179, 0, -61, -176, 228 },
111f3356 505 },
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506};
507#define N_OV7670_FMTS (sizeof(ov7670_formats)/sizeof(ov7670_formats[0]))
508
509/*
510 * All formats we support are 2 bytes/pixel.
511 */
512#define BYTES_PER_PIXEL 2
513
514/*
515 * Then there is the issue of window sizes. Try to capture the info here.
516 */
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517
518/*
519 * QCIF mode is done (by OV) in a very strange way - it actually looks like
520 * VGA with weird scaling options - they do *not* use the canned QCIF mode
521 * which is allegedly provided by the sensor. So here's the weird register
522 * settings.
523 */
524static struct regval_list ov7670_qcif_regs[] = {
525 { REG_COM3, COM3_SCALEEN|COM3_DCWEN },
526 { REG_COM3, COM3_DCWEN },
527 { REG_COM14, COM14_DCWEN | 0x01},
528 { 0x73, 0xf1 },
529 { 0xa2, 0x52 },
530 { 0x7b, 0x1c },
531 { 0x7c, 0x28 },
532 { 0x7d, 0x3c },
533 { 0x7f, 0x69 },
534 { REG_COM9, 0x38 },
535 { 0xa1, 0x0b },
536 { 0x74, 0x19 },
537 { 0x9a, 0x80 },
538 { 0x43, 0x14 },
539 { REG_COM13, 0xc0 },
540 { 0xff, 0xff },
541};
542
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543static struct ov7670_win_size {
544 int width;
545 int height;
546 unsigned char com7_bit;
547 int hstart; /* Start/stop values for the camera. Note */
548 int hstop; /* that they do not always make complete */
549 int vstart; /* sense to humans, but evidently the sensor */
550 int vstop; /* will do the right thing... */
f9a76156 551 struct regval_list *regs; /* Regs to tweak */
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552/* h/vref stuff */
553} ov7670_win_sizes[] = {
554 /* VGA */
555 {
556 .width = VGA_WIDTH,
557 .height = VGA_HEIGHT,
558 .com7_bit = COM7_FMT_VGA,
559 .hstart = 158, /* These values from */
560 .hstop = 14, /* Omnivision */
561 .vstart = 10,
562 .vstop = 490,
f9a76156 563 .regs = NULL,
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564 },
565 /* CIF */
566 {
567 .width = CIF_WIDTH,
568 .height = CIF_HEIGHT,
569 .com7_bit = COM7_FMT_CIF,
570 .hstart = 170, /* Empirically determined */
571 .hstop = 90,
572 .vstart = 14,
573 .vstop = 494,
f9a76156 574 .regs = NULL,
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575 },
576 /* QVGA */
577 {
578 .width = QVGA_WIDTH,
579 .height = QVGA_HEIGHT,
580 .com7_bit = COM7_FMT_QVGA,
581 .hstart = 164, /* Empirically determined */
582 .hstop = 20,
583 .vstart = 14,
584 .vstop = 494,
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585 .regs = NULL,
586 },
587 /* QCIF */
588 {
589 .width = QCIF_WIDTH,
590 .height = QCIF_HEIGHT,
591 .com7_bit = COM7_FMT_VGA, /* see comment above */
592 .hstart = 456, /* Empirically determined */
593 .hstop = 24,
594 .vstart = 14,
595 .vstop = 494,
596 .regs = ov7670_qcif_regs,
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597 },
598};
599
600#define N_WIN_SIZES (sizeof(ov7670_win_sizes)/sizeof(ov7670_win_sizes[0]))
601
602
603/*
604 * Store a set of start/stop values into the camera.
605 */
606static int ov7670_set_hw(struct i2c_client *client, int hstart, int hstop,
607 int vstart, int vstop)
608{
609 int ret;
610 unsigned char v;
611/*
612 * Horizontal: 11 bits, top 8 live in hstart and hstop. Bottom 3 of
613 * hstart are in href[2:0], bottom 3 of hstop in href[5:3]. There is
614 * a mystery "edge offset" value in the top two bits of href.
615 */
616 ret = ov7670_write(client, REG_HSTART, (hstart >> 3) & 0xff);
617 ret += ov7670_write(client, REG_HSTOP, (hstop >> 3) & 0xff);
618 ret += ov7670_read(client, REG_HREF, &v);
619 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x7);
620 msleep(10);
621 ret += ov7670_write(client, REG_HREF, v);
622/*
623 * Vertical: similar arrangement, but only 10 bits.
624 */
625 ret += ov7670_write(client, REG_VSTART, (vstart >> 2) & 0xff);
626 ret += ov7670_write(client, REG_VSTOP, (vstop >> 2) & 0xff);
627 ret += ov7670_read(client, REG_VREF, &v);
628 v = (v & 0xf0) | ((vstop & 0x3) << 2) | (vstart & 0x3);
629 msleep(10);
630 ret += ov7670_write(client, REG_VREF, v);
631 return ret;
632}
633
634
635static int ov7670_enum_fmt(struct i2c_client *c, struct v4l2_fmtdesc *fmt)
636{
637 struct ov7670_format_struct *ofmt;
638
639 if (fmt->index >= N_OV7670_FMTS)
640 return -EINVAL;
641
642 ofmt = ov7670_formats + fmt->index;
643 fmt->flags = 0;
644 strcpy(fmt->description, ofmt->desc);
645 fmt->pixelformat = ofmt->pixelformat;
646 return 0;
647}
648
649
650static int ov7670_try_fmt(struct i2c_client *c, struct v4l2_format *fmt,
651 struct ov7670_format_struct **ret_fmt,
652 struct ov7670_win_size **ret_wsize)
653{
654 int index;
655 struct ov7670_win_size *wsize;
656 struct v4l2_pix_format *pix = &fmt->fmt.pix;
657
658 for (index = 0; index < N_OV7670_FMTS; index++)
659 if (ov7670_formats[index].pixelformat == pix->pixelformat)
660 break;
661 if (index >= N_OV7670_FMTS)
662 return -EINVAL;
663 if (ret_fmt != NULL)
664 *ret_fmt = ov7670_formats + index;
665 /*
666 * Fields: the OV devices claim to be progressive.
667 */
668 if (pix->field == V4L2_FIELD_ANY)
669 pix->field = V4L2_FIELD_NONE;
670 else if (pix->field != V4L2_FIELD_NONE)
671 return -EINVAL;
672 /*
673 * Round requested image size down to the nearest
674 * we support, but not below the smallest.
675 */
676 for (wsize = ov7670_win_sizes; wsize < ov7670_win_sizes + N_WIN_SIZES;
677 wsize++)
678 if (pix->width >= wsize->width && pix->height >= wsize->height)
679 break;
f9a76156 680 if (wsize >= ov7670_win_sizes + N_WIN_SIZES)
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681 wsize--; /* Take the smallest one */
682 if (ret_wsize != NULL)
683 *ret_wsize = wsize;
684 /*
685 * Note the size we'll actually handle.
686 */
687 pix->width = wsize->width;
688 pix->height = wsize->height;
689 pix->bytesperline = pix->width*BYTES_PER_PIXEL;
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690 pix->sizeimage = pix->height*pix->bytesperline;
691 return 0;
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692}
693
694/*
695 * Set a format.
696 */
697static int ov7670_s_fmt(struct i2c_client *c, struct v4l2_format *fmt)
698{
699 int ret;
700 struct ov7670_format_struct *ovfmt;
701 struct ov7670_win_size *wsize;
f9a76156 702 struct ov7670_info *info = i2c_get_clientdata(c);
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703 unsigned char com7;
704
705 ret = ov7670_try_fmt(c, fmt, &ovfmt, &wsize);
706 if (ret)
707 return ret;
708 /*
709 * COM7 is a pain in the ass, it doesn't like to be read then
710 * quickly written afterward. But we have everything we need
711 * to set it absolutely here, as long as the format-specific
712 * register sets list it first.
713 */
714 com7 = ovfmt->regs[0].value;
715 com7 |= wsize->com7_bit;
716 ov7670_write(c, REG_COM7, com7);
717 /*
718 * Now write the rest of the array. Also store start/stops
719 */
720 ov7670_write_array(c, ovfmt->regs + 1);
721 ov7670_set_hw(c, wsize->hstart, wsize->hstop, wsize->vstart,
722 wsize->vstop);
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723 ret = 0;
724 if (wsize->regs)
725 ret = ov7670_write_array(c, wsize->regs);
726 info->fmt = ovfmt;
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727 return 0;
728}
729
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730/*
731 * Implement G/S_PARM. There is a "high quality" mode we could try
732 * to do someday; for now, we just do the frame rate tweak.
733 */
734static int ov7670_g_parm(struct i2c_client *c, struct v4l2_streamparm *parms)
735{
736 struct v4l2_captureparm *cp = &parms->parm.capture;
737 unsigned char clkrc;
738 int ret;
739
740 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
741 return -EINVAL;
742 ret = ov7670_read(c, REG_CLKRC, &clkrc);
743 if (ret < 0)
744 return ret;
745 memset(cp, 0, sizeof(struct v4l2_captureparm));
746 cp->capability = V4L2_CAP_TIMEPERFRAME;
747 cp->timeperframe.numerator = 1;
748 cp->timeperframe.denominator = OV7670_FRAME_RATE;
749 if ((clkrc & CLK_EXT) == 0 && (clkrc & CLK_SCALE) > 1)
750 cp->timeperframe.denominator /= (clkrc & CLK_SCALE);
751 return 0;
752}
753
754static int ov7670_s_parm(struct i2c_client *c, struct v4l2_streamparm *parms)
755{
756 struct v4l2_captureparm *cp = &parms->parm.capture;
757 struct v4l2_fract *tpf = &cp->timeperframe;
758 unsigned char clkrc;
759 int ret, div;
760
761 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
762 return -EINVAL;
763 if (cp->extendedmode != 0)
764 return -EINVAL;
765 /*
766 * CLKRC has a reserved bit, so let's preserve it.
767 */
768 ret = ov7670_read(c, REG_CLKRC, &clkrc);
769 if (ret < 0)
770 return ret;
771 if (tpf->numerator == 0 || tpf->denominator == 0)
772 div = 1; /* Reset to full rate */
773 else
774 div = (tpf->numerator*OV7670_FRAME_RATE)/tpf->denominator;
775 if (div == 0)
776 div = 1;
777 else if (div > CLK_SCALE)
778 div = CLK_SCALE;
779 clkrc = (clkrc & 0x80) | div;
780 tpf->numerator = 1;
781 tpf->denominator = OV7670_FRAME_RATE/div;
782 return ov7670_write(c, REG_CLKRC, clkrc);
783}
784
785
786
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787/*
788 * Code for dealing with controls.
789 */
790
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791
792
793
794
795static int ov7670_store_cmatrix(struct i2c_client *client,
796 int matrix[CMATRIX_LEN])
797{
798 int i, ret;
799 unsigned char signbits;
800
801 /*
802 * Weird crap seems to exist in the upper part of
803 * the sign bits register, so let's preserve it.
804 */
805 ret = ov7670_read(client, REG_CMATRIX_SIGN, &signbits);
806 signbits &= 0xc0;
807
808 for (i = 0; i < CMATRIX_LEN; i++) {
809 unsigned char raw;
810
811 if (matrix[i] < 0) {
812 signbits |= (1 << i);
813 if (matrix[i] < -255)
814 raw = 0xff;
815 else
816 raw = (-1 * matrix[i]) & 0xff;
817 }
818 else {
819 if (matrix[i] > 255)
820 raw = 0xff;
821 else
822 raw = matrix[i] & 0xff;
823 }
824 ret += ov7670_write(client, REG_CMATRIX_BASE + i, raw);
825 }
826 ret += ov7670_write(client, REG_CMATRIX_SIGN, signbits);
827 return ret;
828}
829
830
831/*
832 * Hue also requires messing with the color matrix. It also requires
833 * trig functions, which tend not to be well supported in the kernel.
834 * So here is a simple table of sine values, 0-90 degrees, in steps
835 * of five degrees. Values are multiplied by 1000.
836 *
837 * The following naive approximate trig functions require an argument
838 * carefully limited to -180 <= theta <= 180.
839 */
840#define SIN_STEP 5
841static const int ov7670_sin_table[] = {
842 0, 87, 173, 258, 342, 422,
843 499, 573, 642, 707, 766, 819,
844 866, 906, 939, 965, 984, 996,
845 1000
846};
847
848static int ov7670_sine(int theta)
849{
850 int chs = 1;
851 int sine;
852
853 if (theta < 0) {
854 theta = -theta;
855 chs = -1;
856 }
857 if (theta <= 90)
858 sine = ov7670_sin_table[theta/SIN_STEP];
859 else {
860 theta -= 90;
861 sine = 1000 - ov7670_sin_table[theta/SIN_STEP];
862 }
863 return sine*chs;
864}
865
866static int ov7670_cosine(int theta)
867{
868 theta = 90 - theta;
869 if (theta > 180)
870 theta -= 360;
871 else if (theta < -180)
872 theta += 360;
873 return ov7670_sine(theta);
874}
875
876
877
878
879static void ov7670_calc_cmatrix(struct ov7670_info *info,
880 int matrix[CMATRIX_LEN])
881{
882 int i;
883 /*
884 * Apply the current saturation setting first.
885 */
886 for (i = 0; i < CMATRIX_LEN; i++)
887 matrix[i] = (info->fmt->cmatrix[i]*info->sat) >> 7;
888 /*
889 * Then, if need be, rotate the hue value.
890 */
891 if (info->hue != 0) {
892 int sinth, costh, tmpmatrix[CMATRIX_LEN];
893
894 memcpy(tmpmatrix, matrix, CMATRIX_LEN*sizeof(int));
895 sinth = ov7670_sine(info->hue);
896 costh = ov7670_cosine(info->hue);
897
898 matrix[0] = (matrix[3]*sinth + matrix[0]*costh)/1000;
899 matrix[1] = (matrix[4]*sinth + matrix[1]*costh)/1000;
900 matrix[2] = (matrix[5]*sinth + matrix[2]*costh)/1000;
901 matrix[3] = (matrix[3]*costh - matrix[0]*sinth)/1000;
902 matrix[4] = (matrix[4]*costh - matrix[1]*sinth)/1000;
903 matrix[5] = (matrix[5]*costh - matrix[2]*sinth)/1000;
904 }
905}
906
907
908
909static int ov7670_t_sat(struct i2c_client *client, int value)
910{
911 struct ov7670_info *info = i2c_get_clientdata(client);
912 int matrix[CMATRIX_LEN];
913 int ret;
914
915 info->sat = value;
916 ov7670_calc_cmatrix(info, matrix);
917 ret = ov7670_store_cmatrix(client, matrix);
918 return ret;
919}
920
921static int ov7670_q_sat(struct i2c_client *client, __s32 *value)
922{
923 struct ov7670_info *info = i2c_get_clientdata(client);
924
925 *value = info->sat;
926 return 0;
927}
928
929static int ov7670_t_hue(struct i2c_client *client, int value)
930{
931 struct ov7670_info *info = i2c_get_clientdata(client);
932 int matrix[CMATRIX_LEN];
933 int ret;
934
935 if (value < -180 || value > 180)
936 return -EINVAL;
937 info->hue = value;
938 ov7670_calc_cmatrix(info, matrix);
939 ret = ov7670_store_cmatrix(client, matrix);
940 return ret;
941}
942
943
944static int ov7670_q_hue(struct i2c_client *client, __s32 *value)
945{
946 struct ov7670_info *info = i2c_get_clientdata(client);
947
948 *value = info->hue;
949 return 0;
950}
951
952
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953/*
954 * Some weird registers seem to store values in a sign/magnitude format!
955 */
956static unsigned char ov7670_sm_to_abs(unsigned char v)
957{
958 if ((v & 0x80) == 0)
959 return v + 128;
960 else
961 return 128 - (v & 0x7f);
962}
963
964
965static unsigned char ov7670_abs_to_sm(unsigned char v)
966{
967 if (v > 127)
968 return v & 0x7f;
969 else
970 return (128 - v) | 0x80;
971}
972
f9a76156 973static int ov7670_t_brightness(struct i2c_client *client, int value)
111f3356 974{
f9a76156 975 unsigned char com8, v;
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976 int ret;
977
978 ov7670_read(client, REG_COM8, &com8);
979 com8 &= ~COM8_AEC;
980 ov7670_write(client, REG_COM8, com8);
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981 v = ov7670_abs_to_sm(value);
982 ret = ov7670_write(client, REG_BRIGHT, v);
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983 return ret;
984}
985
f9a76156 986static int ov7670_q_brightness(struct i2c_client *client, __s32 *value)
111f3356 987{
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988 unsigned char v;
989 int ret = ov7670_read(client, REG_BRIGHT, &v);
990
991 *value = ov7670_sm_to_abs(v);
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992 return ret;
993}
994
f9a76156 995static int ov7670_t_contrast(struct i2c_client *client, int value)
111f3356 996{
f9a76156 997 return ov7670_write(client, REG_CONTRAS, (unsigned char) value);
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998}
999
f9a76156 1000static int ov7670_q_contrast(struct i2c_client *client, __s32 *value)
111f3356 1001{
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1002 unsigned char v;
1003 int ret = ov7670_read(client, REG_CONTRAS, &v);
1004
1005 *value = v;
1006 return ret;
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1007}
1008
f9a76156 1009static int ov7670_q_hflip(struct i2c_client *client, __s32 *value)
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1010{
1011 int ret;
1012 unsigned char v;
1013
1014 ret = ov7670_read(client, REG_MVFP, &v);
1015 *value = (v & MVFP_MIRROR) == MVFP_MIRROR;
1016 return ret;
1017}
1018
1019
f9a76156 1020static int ov7670_t_hflip(struct i2c_client *client, int value)
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1021{
1022 unsigned char v;
1023 int ret;
1024
1025 ret = ov7670_read(client, REG_MVFP, &v);
1026 if (value)
1027 v |= MVFP_MIRROR;
1028 else
1029 v &= ~MVFP_MIRROR;
1030 msleep(10); /* FIXME */
1031 ret += ov7670_write(client, REG_MVFP, v);
1032 return ret;
1033}
1034
1035
1036
f9a76156 1037static int ov7670_q_vflip(struct i2c_client *client, __s32 *value)
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1038{
1039 int ret;
1040 unsigned char v;
1041
1042 ret = ov7670_read(client, REG_MVFP, &v);
1043 *value = (v & MVFP_FLIP) == MVFP_FLIP;
1044 return ret;
1045}
1046
1047
f9a76156 1048static int ov7670_t_vflip(struct i2c_client *client, int value)
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1049{
1050 unsigned char v;
1051 int ret;
1052
1053 ret = ov7670_read(client, REG_MVFP, &v);
1054 if (value)
1055 v |= MVFP_FLIP;
1056 else
1057 v &= ~MVFP_FLIP;
1058 msleep(10); /* FIXME */
1059 ret += ov7670_write(client, REG_MVFP, v);
1060 return ret;
1061}
1062
1063
1064static struct ov7670_control {
1065 struct v4l2_queryctrl qc;
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1066 int (*query)(struct i2c_client *c, __s32 *value);
1067 int (*tweak)(struct i2c_client *c, int value);
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1068} ov7670_controls[] =
1069{
1070 {
1071 .qc = {
1072 .id = V4L2_CID_BRIGHTNESS,
1073 .type = V4L2_CTRL_TYPE_INTEGER,
1074 .name = "Brightness",
1075 .minimum = 0,
1076 .maximum = 255,
1077 .step = 1,
1078 .default_value = 0x80,
1079 .flags = V4L2_CTRL_FLAG_SLIDER
1080 },
1081 .tweak = ov7670_t_brightness,
1082 .query = ov7670_q_brightness,
1083 },
1084 {
1085 .qc = {
1086 .id = V4L2_CID_CONTRAST,
1087 .type = V4L2_CTRL_TYPE_INTEGER,
1088 .name = "Contrast",
1089 .minimum = 0,
1090 .maximum = 127,
1091 .step = 1,
1092 .default_value = 0x40, /* XXX ov7670 spec */
1093 .flags = V4L2_CTRL_FLAG_SLIDER
1094 },
1095 .tweak = ov7670_t_contrast,
1096 .query = ov7670_q_contrast,
1097 },
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1098 {
1099 .qc = {
1100 .id = V4L2_CID_SATURATION,
1101 .type = V4L2_CTRL_TYPE_INTEGER,
1102 .name = "Saturation",
1103 .minimum = 0,
1104 .maximum = 256,
1105 .step = 1,
1106 .default_value = 0x80,
1107 .flags = V4L2_CTRL_FLAG_SLIDER
1108 },
1109 .tweak = ov7670_t_sat,
1110 .query = ov7670_q_sat,
1111 },
1112 {
1113 .qc = {
1114 .id = V4L2_CID_HUE,
1115 .type = V4L2_CTRL_TYPE_INTEGER,
1116 .name = "HUE",
1117 .minimum = -180,
1118 .maximum = 180,
1119 .step = 5,
1120 .default_value = 0,
1121 .flags = V4L2_CTRL_FLAG_SLIDER
1122 },
1123 .tweak = ov7670_t_hue,
1124 .query = ov7670_q_hue,
1125 },
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1126 {
1127 .qc = {
1128 .id = V4L2_CID_VFLIP,
1129 .type = V4L2_CTRL_TYPE_BOOLEAN,
1130 .name = "Vertical flip",
1131 .minimum = 0,
1132 .maximum = 1,
1133 .step = 1,
1134 .default_value = 0,
1135 },
1136 .tweak = ov7670_t_vflip,
1137 .query = ov7670_q_vflip,
1138 },
1139 {
1140 .qc = {
1141 .id = V4L2_CID_HFLIP,
1142 .type = V4L2_CTRL_TYPE_BOOLEAN,
1143 .name = "Horizontal mirror",
1144 .minimum = 0,
1145 .maximum = 1,
1146 .step = 1,
1147 .default_value = 0,
1148 },
1149 .tweak = ov7670_t_hflip,
1150 .query = ov7670_q_hflip,
1151 },
1152};
1153#define N_CONTROLS (sizeof(ov7670_controls)/sizeof(ov7670_controls[0]))
1154
1155static struct ov7670_control *ov7670_find_control(__u32 id)
1156{
1157 int i;
1158
1159 for (i = 0; i < N_CONTROLS; i++)
1160 if (ov7670_controls[i].qc.id == id)
1161 return ov7670_controls + i;
1162 return NULL;
1163}
1164
1165
1166static int ov7670_queryctrl(struct i2c_client *client,
1167 struct v4l2_queryctrl *qc)
1168{
1169 struct ov7670_control *ctrl = ov7670_find_control(qc->id);
1170
1171 if (ctrl == NULL)
1172 return -EINVAL;
1173 *qc = ctrl->qc;
1174 return 0;
1175}
1176
1177static int ov7670_g_ctrl(struct i2c_client *client, struct v4l2_control *ctrl)
1178{
1179 struct ov7670_control *octrl = ov7670_find_control(ctrl->id);
1180 int ret;
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1181
1182 if (octrl == NULL)
1183 return -EINVAL;
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1184 ret = octrl->query(client, &ctrl->value);
1185 if (ret >= 0)
111f3356 1186 return 0;
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1187 return ret;
1188}
1189
1190static int ov7670_s_ctrl(struct i2c_client *client, struct v4l2_control *ctrl)
1191{
1192 struct ov7670_control *octrl = ov7670_find_control(ctrl->id);
f9a76156 1193 int ret;
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1194
1195 if (octrl == NULL)
1196 return -EINVAL;
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1197 ret = octrl->tweak(client, ctrl->value);
1198 if (ret >= 0)
1199 return 0;
1200 return ret;
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1201}
1202
1203
1204
1205
1206
1207
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1208/*
1209 * Basic i2c stuff.
1210 */
1211static struct i2c_driver ov7670_driver;
1212
1213static int ov7670_attach(struct i2c_adapter *adapter)
1214{
1215 int ret;
1216 struct i2c_client *client;
f9a76156 1217 struct ov7670_info *info;
111f3356 1218
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1219 /*
1220 * For now: only deal with adapters we recognize.
1221 */
1222 if (adapter->id != I2C_HW_SMBUS_CAFE)
1223 return -ENODEV;
1224
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JC
1225 client = kzalloc(sizeof (struct i2c_client), GFP_KERNEL);
1226 if (! client)
1227 return -ENOMEM;
1228 client->adapter = adapter;
1229 client->addr = OV7670_I2C_ADDR;
1230 client->driver = &ov7670_driver,
1231 strcpy(client->name, "OV7670");
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JC
1232 /*
1233 * Set up our info structure.
1234 */
1235 info = kzalloc(sizeof (struct ov7670_info), GFP_KERNEL);
1236 if (! info) {
1237 ret = -ENOMEM;
1238 goto out_free;
1239 }
1240 info->fmt = &ov7670_formats[0];
1241 info->sat = 128; /* Review this */
1242 i2c_set_clientdata(client, info);
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JC
1243
1244 /*
1245 * Make sure it's an ov7670
1246 */
1247 ret = ov7670_detect(client);
111f3356 1248 if (ret)
f9a76156 1249 goto out_free_info;
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JC
1250 i2c_attach_client(client);
1251 return 0;
1252
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JC
1253 out_free_info:
1254 kfree(info);
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1255 out_free:
1256 kfree(client);
1257 return ret;
1258}
1259
1260
1261static int ov7670_detach(struct i2c_client *client)
1262{
1263 i2c_detach_client(client);
f9a76156 1264 kfree(i2c_get_clientdata(client));
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JC
1265 kfree(client);
1266 return 0;
1267}
1268
1269
1270static int ov7670_command(struct i2c_client *client, unsigned int cmd,
1271 void *arg)
1272{
1273 switch (cmd) {
3434eb7e
HV
1274 case VIDIOC_G_CHIP_IDENT:
1275 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_OV7670, 0);
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1276
1277 case VIDIOC_INT_RESET:
1278 ov7670_reset(client);
1279 return 0;
1280
1281 case VIDIOC_INT_INIT:
1282 return ov7670_init(client);
1283
1284 case VIDIOC_ENUM_FMT:
1285 return ov7670_enum_fmt(client, (struct v4l2_fmtdesc *) arg);
1286 case VIDIOC_TRY_FMT:
1287 return ov7670_try_fmt(client, (struct v4l2_format *) arg, NULL, NULL);
1288 case VIDIOC_S_FMT:
1289 return ov7670_s_fmt(client, (struct v4l2_format *) arg);
1290 case VIDIOC_QUERYCTRL:
1291 return ov7670_queryctrl(client, (struct v4l2_queryctrl *) arg);
1292 case VIDIOC_S_CTRL:
1293 return ov7670_s_ctrl(client, (struct v4l2_control *) arg);
1294 case VIDIOC_G_CTRL:
1295 return ov7670_g_ctrl(client, (struct v4l2_control *) arg);
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JC
1296 case VIDIOC_S_PARM:
1297 return ov7670_s_parm(client, (struct v4l2_streamparm *) arg);
1298 case VIDIOC_G_PARM:
1299 return ov7670_g_parm(client, (struct v4l2_streamparm *) arg);
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1300 }
1301 return -EINVAL;
1302}
1303
1304
1305
1306static struct i2c_driver ov7670_driver = {
1307 .driver = {
1308 .name = "ov7670",
1309 },
1310 .id = I2C_DRIVERID_OV7670,
1311 .class = I2C_CLASS_CAM_DIGITAL,
1312 .attach_adapter = ov7670_attach,
1313 .detach_client = ov7670_detach,
1314 .command = ov7670_command,
1315};
1316
1317
1318/*
1319 * Module initialization
1320 */
1321static int __init ov7670_mod_init(void)
1322{
1323 printk(KERN_NOTICE "OmniVision ov7670 sensor driver, at your service\n");
1324 return i2c_add_driver(&ov7670_driver);
1325}
1326
1327static void __exit ov7670_mod_exit(void)
1328{
1329 i2c_del_driver(&ov7670_driver);
1330}
1331
1332module_init(ov7670_mod_init);
1333module_exit(ov7670_mod_exit);