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V4L/DVB (12509): sh: prepare board-ap325rxa.c for v4l2-subdev conversion
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / mx3_camera.c
CommitLineData
4f67130a
GL		 1/*
2 * V4L2 Driver for i.MX3x camera host
3 *
4 * Copyright (C) 2008
5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/version.h>
15#include <linux/videodev2.h>
16#include <linux/platform_device.h>
17#include <linux/clk.h>
18#include <linux/vmalloc.h>
19#include <linux/interrupt.h>
20
21#include <media/v4l2-common.h>
22#include <media/v4l2-dev.h>
23#include <media/videobuf-dma-contig.h>
24#include <media/soc_camera.h>
25
26#include <mach/ipu.h>
27#include <mach/mx3_camera.h>
28
29#define MX3_CAM_DRV_NAME "mx3-camera"
30
31/* CMOS Sensor Interface Registers */
32#define CSI_REG_START 0x60
33
34#define CSI_SENS_CONF (0x60 - CSI_REG_START)
35#define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
36#define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
37#define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
38#define CSI_TST_CTRL (0x70 - CSI_REG_START)
39#define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
40#define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
41#define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
42#define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
43#define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
44
45#define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
46#define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
47#define CSI_SENS_CONF_DATA_POL_SHIFT 2
48#define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
49#define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
50#define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
51#define CSI_SENS_CONF_DATA_FMT_SHIFT 8
52#define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
53#define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
54#define CSI_SENS_CONF_DIVRATIO_SHIFT 16
55
56#define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
57#define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
58#define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
59
60#define MAX_VIDEO_MEM 16
61
62struct mx3_camera_buffer {
63 /* common v4l buffer stuff -- must be first */
64 struct videobuf_buffer vb;
65 const struct soc_camera_data_format *fmt;
66
67 /* One descriptot per scatterlist (per frame) */
68 struct dma_async_tx_descriptor *txd;
69
70 /* We have to "build" a scatterlist ourselves - one element per frame */
71 struct scatterlist sg;
72};
73
74/**
75 * struct mx3_camera_dev - i.MX3x camera (CSI) object
76 * @dev: camera device, to which the coherent buffer is attached
77 * @icd: currently attached camera sensor
78 * @clk: pointer to clock
79 * @base: remapped register base address
80 * @pdata: platform data
81 * @platform_flags: platform flags
82 * @mclk: master clock frequency in Hz
83 * @capture: list of capture videobuffers
84 * @lock: protects video buffer lists
85 * @active: active video buffer
86 * @idmac_channel: array of pointers to IPU DMAC DMA channels
87 * @soc_host: embedded soc_host object
88 */
89struct mx3_camera_dev {
4f67130a
GL		 90 /*
91 * i.MX3x is only supposed to handle one camera on its Camera Sensor
92 * Interface. If anyone ever builds hardware to enable more than one
93 * camera _simultaneously_, they will have to modify this driver too
94 */
95 struct soc_camera_device *icd;
96 struct clk *clk;
97
98 void __iomem *base;
99
100 struct mx3_camera_pdata *pdata;
101
102 unsigned long platform_flags;
103 unsigned long mclk;
104
105 struct list_head capture;
106 spinlock_t lock; /* Protects video buffer lists */
107 struct mx3_camera_buffer *active;
108
109 /* IDMAC / dmaengine interface */
110 struct idmac_channel *idmac_channel[1]; /* We need one channel */
111
112 struct soc_camera_host soc_host;
113};
114
115struct dma_chan_request {
116 struct mx3_camera_dev *mx3_cam;
117 enum ipu_channel id;
118};
119
120static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt);
121
122static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
123{
124 return __raw_readl(mx3->base + reg);
125}
126
127static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
128{
129 __raw_writel(value, mx3->base + reg);
130}
131
132/* Called from the IPU IDMAC ISR */
133static void mx3_cam_dma_done(void *arg)
134{
135 struct idmac_tx_desc *desc = to_tx_desc(arg);
136 struct dma_chan *chan = desc->txd.chan;
137 struct idmac_channel *ichannel = to_idmac_chan(chan);
138 struct mx3_camera_dev *mx3_cam = ichannel->client;
139 struct videobuf_buffer *vb;
140
141 dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
142 desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
143
144 spin_lock(&mx3_cam->lock);
145 if (mx3_cam->active) {
146 vb = &mx3_cam->active->vb;
147
148 list_del_init(&vb->queue);
149 vb->state = VIDEOBUF_DONE;
150 do_gettimeofday(&vb->ts);
151 vb->field_count++;
152 wake_up(&vb->done);
153 }
154
155 if (list_empty(&mx3_cam->capture)) {
156 mx3_cam->active = NULL;
157 spin_unlock(&mx3_cam->lock);
158
159 /*
160 * stop capture - without further buffers IPU_CHA_BUF0_RDY will
161 * not get updated
162 */
163 return;
164 }
165
166 mx3_cam->active = list_entry(mx3_cam->capture.next,
167 struct mx3_camera_buffer, vb.queue);
168 mx3_cam->active->vb.state = VIDEOBUF_ACTIVE;
169 spin_unlock(&mx3_cam->lock);
170}
171
172static void free_buffer(struct videobuf_queue *vq, struct mx3_camera_buffer *buf)
173{
174 struct soc_camera_device *icd = vq->priv_data;
175 struct videobuf_buffer *vb = &buf->vb;
176 struct dma_async_tx_descriptor *txd = buf->txd;
177 struct idmac_channel *ichan;
178
179 BUG_ON(in_interrupt());
180
181 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
182 vb, vb->baddr, vb->bsize);
183
184 /*
185 * This waits until this buffer is out of danger, i.e., until it is no
186 * longer in STATE_QUEUED or STATE_ACTIVE
187 */
188 videobuf_waiton(vb, 0, 0);
189 if (txd) {
190 ichan = to_idmac_chan(txd->chan);
191 async_tx_ack(txd);
192 }
193 videobuf_dma_contig_free(vq, vb);
194 buf->txd = NULL;
195
196 vb->state = VIDEOBUF_NEEDS_INIT;
197}
198
199/*
200 * Videobuf operations
201 */
202
203/*
204 * Calculate the __buffer__ (not data) size and number of buffers.
205 * Called with .vb_lock held
206 */
207static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
208 unsigned int *size)
209{
210 struct soc_camera_device *icd = vq->priv_data;
211 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
212 struct mx3_camera_dev *mx3_cam = ici->priv;
213 /*
214 * bits-per-pixel (depth) as specified in camera's pixel format does
215 * not necessarily match what the camera interface writes to RAM, but
216 * it should be good enough for now.
217 */
218 unsigned int bpp = DIV_ROUND_UP(icd->current_fmt->depth, 8);
219
220 if (!mx3_cam->idmac_channel[0])
221 return -EINVAL;
222
223 *size = icd->width * icd->height * bpp;
224
225 if (!*count)
226 *count = 32;
227
228 if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
229 *count = MAX_VIDEO_MEM * 1024 * 1024 / *size;
230
231 return 0;
232}
233
234/* Called with .vb_lock held */
235static int mx3_videobuf_prepare(struct videobuf_queue *vq,
236 struct videobuf_buffer *vb, enum v4l2_field field)
237{
238 struct soc_camera_device *icd = vq->priv_data;
239 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
240 struct mx3_camera_dev *mx3_cam = ici->priv;
241 struct mx3_camera_buffer *buf =
242 container_of(vb, struct mx3_camera_buffer, vb);
243 /* current_fmt _must_ always be set */
244 size_t new_size = icd->width * icd->height *
245 ((icd->current_fmt->depth + 7) >> 3);
246 int ret;
247
248 /*
249 * I think, in buf_prepare you only have to protect global data,
250 * the actual buffer is yours
251 */
252
253 if (buf->fmt != icd->current_fmt ||
254 vb->width != icd->width ||
255 vb->height != icd->height ||
256 vb->field != field) {
257 buf->fmt = icd->current_fmt;
258 vb->width = icd->width;
259 vb->height = icd->height;
260 vb->field = field;
261 if (vb->state != VIDEOBUF_NEEDS_INIT)
262 free_buffer(vq, buf);
263 }
264
265 if (vb->baddr && vb->bsize < new_size) {
266 /* User provided buffer, but it is too small */
267 ret = -ENOMEM;
268 goto out;
269 }
270
271 if (vb->state == VIDEOBUF_NEEDS_INIT) {
272 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
273 struct scatterlist *sg = &buf->sg;
274
275 /*
276 * The total size of video-buffers that will be allocated / mapped.
277 * *size that we calculated in videobuf_setup gets assigned to
278 * vb->bsize, and now we use the same calculation to get vb->size.
279 */
280 vb->size = new_size;
281
282 /* This actually (allocates and) maps buffers */
283 ret = videobuf_iolock(vq, vb, NULL);
284 if (ret)
285 goto fail;
286
287 /*
288 * We will have to configure the IDMAC channel. It has two slots
289 * for DMA buffers, we shall enter the first two buffers there,
290 * and then submit new buffers in DMA-ready interrupts
291 */
292 sg_init_table(sg, 1);
293 sg_dma_address(sg) = videobuf_to_dma_contig(vb);
294 sg_dma_len(sg) = vb->size;
295
296 buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
297 &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE,
298 DMA_PREP_INTERRUPT);
299 if (!buf->txd) {
300 ret = -EIO;
301 goto fail;
302 }
303
304 buf->txd->callback_param = buf->txd;
305 buf->txd->callback = mx3_cam_dma_done;
306
307 vb->state = VIDEOBUF_PREPARED;
308 }
309
310 return 0;
311
312fail:
313 free_buffer(vq, buf);
314out:
315 return ret;
316}
317
318static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
319{
320 /* Add more formats as need arises and test possibilities appear... */
321 switch (fourcc) {
322 case V4L2_PIX_FMT_RGB565:
323 return IPU_PIX_FMT_RGB565;
324 case V4L2_PIX_FMT_RGB24:
325 return IPU_PIX_FMT_RGB24;
326 case V4L2_PIX_FMT_RGB332:
327 return IPU_PIX_FMT_RGB332;
328 case V4L2_PIX_FMT_YUV422P:
329 return IPU_PIX_FMT_YVU422P;
330 default:
331 return IPU_PIX_FMT_GENERIC;
332 }
333}
334
2dd54a54
GL		 335/*
336 * Called with .vb_lock mutex held and
337 * under spinlock_irqsave(&mx3_cam->lock, ...)
338 */
4f67130a
GL		 339static void mx3_videobuf_queue(struct videobuf_queue *vq,
340 struct videobuf_buffer *vb)
341{
342 struct soc_camera_device *icd = vq->priv_data;
343 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
344 struct mx3_camera_dev *mx3_cam = ici->priv;
345 struct mx3_camera_buffer *buf =
346 container_of(vb, struct mx3_camera_buffer, vb);
347 struct dma_async_tx_descriptor *txd = buf->txd;
348 struct idmac_channel *ichan = to_idmac_chan(txd->chan);
349 struct idmac_video_param *video = &ichan->params.video;
350 const struct soc_camera_data_format *data_fmt = icd->current_fmt;
351 dma_cookie_t cookie;
2dd54a54
GL		 352
353 BUG_ON(!irqs_disabled());
4f67130a
GL		 354
355 /* This is the configuration of one sg-element */
356 video->out_pixel_fmt = fourcc_to_ipu_pix(data_fmt->fourcc);
357 video->out_width = icd->width;
358 video->out_height = icd->height;
359 video->out_stride = icd->width;
360
361#ifdef DEBUG
362 /* helps to see what DMA actually has written */
363 memset((void *)vb->baddr, 0xaa, vb->bsize);
364#endif
365
4f67130a
GL		 366 list_add_tail(&vb->queue, &mx3_cam->capture);
367
368 if (!mx3_cam->active) {
369 mx3_cam->active = buf;
370 vb->state = VIDEOBUF_ACTIVE;
371 } else {
372 vb->state = VIDEOBUF_QUEUED;
373 }
374
2dd54a54 375 spin_unlock_irq(&mx3_cam->lock);
4f67130a
GL		 376
377 cookie = txd->tx_submit(txd);
378 dev_dbg(&icd->dev, "Submitted cookie %d DMA 0x%08x\n", cookie, sg_dma_address(&buf->sg));
2dd54a54
GL		 379
380 spin_lock_irq(&mx3_cam->lock);
381
4f67130a
GL		 382 if (cookie >= 0)
383 return;
384
385 /* Submit error */
386 vb->state = VIDEOBUF_PREPARED;
387
4f67130a
GL		 388 list_del_init(&vb->queue);
389
390 if (mx3_cam->active == buf)
391 mx3_cam->active = NULL;
4f67130a
GL		 392}
393
394/* Called with .vb_lock held */
395static void mx3_videobuf_release(struct videobuf_queue *vq,
396 struct videobuf_buffer *vb)
397{
398 struct soc_camera_device *icd = vq->priv_data;
399 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
400 struct mx3_camera_dev *mx3_cam = ici->priv;
401 struct mx3_camera_buffer *buf =
402 container_of(vb, struct mx3_camera_buffer, vb);
403 unsigned long flags;
404
405 dev_dbg(&icd->dev, "Release%s DMA 0x%08x (state %d), queue %sempty\n",
406 mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
407 vb->state, list_empty(&vb->queue) ? "" : "not ");
408 spin_lock_irqsave(&mx3_cam->lock, flags);
409 if ((vb->state == VIDEOBUF_ACTIVE || vb->state == VIDEOBUF_QUEUED) &&
410 !list_empty(&vb->queue)) {
411 vb->state = VIDEOBUF_ERROR;
412
413 list_del_init(&vb->queue);
414 if (mx3_cam->active == buf)
415 mx3_cam->active = NULL;
416 }
417 spin_unlock_irqrestore(&mx3_cam->lock, flags);
418 free_buffer(vq, buf);
419}
420
421static struct videobuf_queue_ops mx3_videobuf_ops = {
422 .buf_setup = mx3_videobuf_setup,
423 .buf_prepare = mx3_videobuf_prepare,
424 .buf_queue = mx3_videobuf_queue,
425 .buf_release = mx3_videobuf_release,
426};
427
428static void mx3_camera_init_videobuf(struct videobuf_queue *q,
429 struct soc_camera_device *icd)
430{
431 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
432 struct mx3_camera_dev *mx3_cam = ici->priv;
433
eff505fa 434 videobuf_queue_dma_contig_init(q, &mx3_videobuf_ops, ici->dev,
4f67130a
GL		 435 &mx3_cam->lock,
436 V4L2_BUF_TYPE_VIDEO_CAPTURE,
437 V4L2_FIELD_NONE,
438 sizeof(struct mx3_camera_buffer), icd);
439}
440
441/* First part of ipu_csi_init_interface() */
442static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,
443 struct soc_camera_device *icd)
444{
445 u32 conf;
446 long rate;
447
448 /* Set default size: ipu_csi_set_window_size() */
449 csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
450 /* ...and position to 0:0: ipu_csi_set_window_pos() */
451 conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
452 csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
453
454 /* We use only gated clock synchronisation mode so far */
455 conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
456
457 /* Set generic data, platform-biggest bus-width */
458 conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
459
460 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
461 conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
462 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
463 conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
464 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
465 conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
466 else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
467 conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
468
469 if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
470 conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
471 if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
472 conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
473 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
474 conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
475 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
476 conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
477 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
478 conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
479 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
480 conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
481
482 /* ipu_csi_init_interface() */
483 csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
484
485 clk_enable(mx3_cam->clk);
486 rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
487 dev_dbg(&icd->dev, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
488 if (rate)
489 clk_set_rate(mx3_cam->clk, rate);
490}
491
492/* Called with .video_lock held */
493static int mx3_camera_add_device(struct soc_camera_device *icd)
494{
495 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
496 struct mx3_camera_dev *mx3_cam = ici->priv;
497 int ret;
498
499 if (mx3_cam->icd) {
500 ret = -EBUSY;
501 goto ebusy;
502 }
503
504 mx3_camera_activate(mx3_cam, icd);
505 ret = icd->ops->init(icd);
40e2e092 506 if (ret < 0)
4f67130a 507 goto einit;
4f67130a
GL		 508
509 mx3_cam->icd = icd;
510
40e2e092
GL		 511 dev_info(&icd->dev, "MX3 Camera driver attached to camera %d\n",
512 icd->devnum);
513
514 return 0;
515
4f67130a 516einit:
40e2e092 517 clk_disable(mx3_cam->clk);
4f67130a 518ebusy:
4f67130a
GL		 519
520 return ret;
521}
522
523/* Called with .video_lock held */
524static void mx3_camera_remove_device(struct soc_camera_device *icd)
525{
526 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
527 struct mx3_camera_dev *mx3_cam = ici->priv;
528 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
529
530 BUG_ON(icd != mx3_cam->icd);
531
532 if (*ichan) {
533 dma_release_channel(&(*ichan)->dma_chan);
534 *ichan = NULL;
535 }
536
537 icd->ops->release(icd);
538
539 clk_disable(mx3_cam->clk);
540
541 mx3_cam->icd = NULL;
542
543 dev_info(&icd->dev, "MX3 Camera driver detached from camera %d\n",
544 icd->devnum);
545}
546
547static bool channel_change_requested(struct soc_camera_device *icd,
09e231b3 548 struct v4l2_rect *rect)
4f67130a
GL		 549{
550 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
551 struct mx3_camera_dev *mx3_cam = ici->priv;
552 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
553
09e231b3
GL		 554 /* Do buffers have to be re-allocated or channel re-configured? */
555 return ichan && rect->width * rect->height > icd->width * icd->height;
4f67130a
GL		 556}
557
558static int test_platform_param(struct mx3_camera_dev *mx3_cam,
559 unsigned char buswidth, unsigned long *flags)
560{
561 /*
562 * Platform specified synchronization and pixel clock polarities are
563 * only a recommendation and are only used during probing. MX3x
564 * camera interface only works in master mode, i.e., uses HSYNC and
565 * VSYNC signals from the sensor
566 */
567 *flags = SOCAM_MASTER |
568 SOCAM_HSYNC_ACTIVE_HIGH |
569 SOCAM_HSYNC_ACTIVE_LOW |
570 SOCAM_VSYNC_ACTIVE_HIGH |
571 SOCAM_VSYNC_ACTIVE_LOW |
572 SOCAM_PCLK_SAMPLE_RISING |
573 SOCAM_PCLK_SAMPLE_FALLING |
574 SOCAM_DATA_ACTIVE_HIGH |
575 SOCAM_DATA_ACTIVE_LOW;
576
577 /* If requested data width is supported by the platform, use it or any
578 * possible lower value - i.MX31 is smart enough to schift bits */
579 switch (buswidth) {
580 case 15:
581 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15))
582 return -EINVAL;
583 *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
584 SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
585 break;
586 case 10:
587 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10))
588 return -EINVAL;
589 *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
590 SOCAM_DATAWIDTH_4;
591 break;
592 case 8:
593 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8))
594 return -EINVAL;
595 *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
596 break;
597 case 4:
598 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4))
599 return -EINVAL;
600 *flags |= SOCAM_DATAWIDTH_4;
601 break;
602 default:
eff505fa
GL		 603 dev_info(mx3_cam->soc_host.dev, "Unsupported bus width %d\n",
604 buswidth);
4f67130a
GL		 605 return -EINVAL;
606 }
607
608 return 0;
609}
610
611static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
612 const unsigned int depth)
613{
614 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
615 struct mx3_camera_dev *mx3_cam = ici->priv;
616 unsigned long bus_flags, camera_flags;
617 int ret = test_platform_param(mx3_cam, depth, &bus_flags);
618
eff505fa 619 dev_dbg(ici->dev, "requested bus width %d bit: %d\n", depth, ret);
4f67130a
GL		 620
621 if (ret < 0)
622 return ret;
623
624 camera_flags = icd->ops->query_bus_param(icd);
625
626 ret = soc_camera_bus_param_compatible(camera_flags, bus_flags);
627 if (ret < 0)
628 dev_warn(&icd->dev, "Flags incompatible: camera %lx, host %lx\n",
629 camera_flags, bus_flags);
630
631 return ret;
632}
633
634static bool chan_filter(struct dma_chan *chan, void *arg)
635{
636 struct dma_chan_request *rq = arg;
637 struct mx3_camera_pdata *pdata;
638
639 if (!rq)
640 return false;
641
eff505fa 642 pdata = rq->mx3_cam->soc_host.dev->platform_data;
4f67130a
GL		 643
644 return rq->id == chan->chan_id &&
645 pdata->dma_dev == chan->device->dev;
646}
647
648static const struct soc_camera_data_format mx3_camera_formats[] = {
649 {
650 .name = "Bayer (sRGB) 8 bit",
651 .depth = 8,
652 .fourcc = V4L2_PIX_FMT_SBGGR8,
653 .colorspace = V4L2_COLORSPACE_SRGB,
654 }, {
655 .name = "Monochrome 8 bit",
656 .depth = 8,
657 .fourcc = V4L2_PIX_FMT_GREY,
658 .colorspace = V4L2_COLORSPACE_JPEG,
659 },
660};
661
662static bool buswidth_supported(struct soc_camera_host *ici, int depth)
663{
664 struct mx3_camera_dev *mx3_cam = ici->priv;
665
666 switch (depth) {
667 case 4:
668 return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4);
669 case 8:
670 return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8);
671 case 10:
672 return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10);
673 case 15:
674 return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15);
675 }
676 return false;
677}
678
679static int mx3_camera_get_formats(struct soc_camera_device *icd, int idx,
680 struct soc_camera_format_xlate *xlate)
681{
682 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
683 int formats = 0, buswidth, ret;
684
685 buswidth = icd->formats[idx].depth;
686
687 if (!buswidth_supported(ici, buswidth))
688 return 0;
689
690 ret = mx3_camera_try_bus_param(icd, buswidth);
691 if (ret < 0)
692 return 0;
693
694 switch (icd->formats[idx].fourcc) {
695 case V4L2_PIX_FMT_SGRBG10:
696 formats++;
697 if (xlate) {
698 xlate->host_fmt = &mx3_camera_formats[0];
699 xlate->cam_fmt = icd->formats + idx;
700 xlate->buswidth = buswidth;
701 xlate++;
eff505fa 702 dev_dbg(ici->dev, "Providing format %s using %s\n",
4f67130a
GL		 703 mx3_camera_formats[0].name,
704 icd->formats[idx].name);
705 }
706 goto passthrough;
707 case V4L2_PIX_FMT_Y16:
708 formats++;
709 if (xlate) {
710 xlate->host_fmt = &mx3_camera_formats[1];
711 xlate->cam_fmt = icd->formats + idx;
712 xlate->buswidth = buswidth;
713 xlate++;
eff505fa 714 dev_dbg(ici->dev, "Providing format %s using %s\n",
4f67130a
GL		 715 mx3_camera_formats[0].name,
716 icd->formats[idx].name);
717 }
718 default:
719passthrough:
720 /* Generic pass-through */
721 formats++;
722 if (xlate) {
723 xlate->host_fmt = icd->formats + idx;
724 xlate->cam_fmt = icd->formats + idx;
725 xlate->buswidth = buswidth;
726 xlate++;
eff505fa 727 dev_dbg(ici->dev,
4f67130a
GL		 728 "Providing format %s in pass-through mode\n",
729 icd->formats[idx].name);
730 }
731 }
732
733 return formats;
734}
735
09e231b3
GL		 736static void configure_geometry(struct mx3_camera_dev *mx3_cam,
737 struct v4l2_rect *rect)
4f67130a 738{
4f67130a 739 u32 ctrl, width_field, height_field;
4f67130a
GL		 740
741 /* Setup frame size - this cannot be changed on-the-fly... */
742 width_field = rect->width - 1;
743 height_field = rect->height - 1;
744 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
745
746 csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
747 csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
748
749 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
750
751 /* ...and position */
752 ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
753 /* Sensor does the cropping */
754 csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
755
756 /*
757 * No need to free resources here if we fail, we'll see if we need to
758 * do this next time we are called
759 */
09e231b3
GL		 760}
761
762static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
763{
764 dma_cap_mask_t mask;
765 struct dma_chan *chan;
766 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
767 /* We have to use IDMAC_IC_7 for Bayer / generic data */
768 struct dma_chan_request rq = {.mx3_cam = mx3_cam,
769 .id = IDMAC_IC_7};
770
771 if (*ichan) {
772 struct videobuf_buffer *vb, *_vb;
773 dma_release_channel(&(*ichan)->dma_chan);
774 *ichan = NULL;
775 mx3_cam->active = NULL;
776 list_for_each_entry_safe(vb, _vb, &mx3_cam->capture, queue) {
777 list_del_init(&vb->queue);
778 vb->state = VIDEOBUF_ERROR;
779 wake_up(&vb->done);
780 }
781 }
782
783 dma_cap_zero(mask);
784 dma_cap_set(DMA_SLAVE, mask);
785 dma_cap_set(DMA_PRIVATE, mask);
786 chan = dma_request_channel(mask, chan_filter, &rq);
787 if (!chan)
788 return -EBUSY;
789
790 *ichan = to_idmac_chan(chan);
791 (*ichan)->client = mx3_cam;
792
793 return 0;
794}
795
796static int mx3_camera_set_crop(struct soc_camera_device *icd,
797 struct v4l2_rect *rect)
798{
799 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
800 struct mx3_camera_dev *mx3_cam = ici->priv;
801
802 /*
803 * We now know pixel formats and can decide upon DMA-channel(s)
804 * So far only direct camera-to-memory is supported
805 */
806 if (channel_change_requested(icd, rect)) {
807 int ret = acquire_dma_channel(mx3_cam);
808 if (ret < 0)
809 return ret;
810 }
811
812 configure_geometry(mx3_cam, rect);
813
814 return icd->ops->set_crop(icd, rect);
815}
816
817static int mx3_camera_set_fmt(struct soc_camera_device *icd,
818 struct v4l2_format *f)
819{
820 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
821 struct mx3_camera_dev *mx3_cam = ici->priv;
822 const struct soc_camera_format_xlate *xlate;
823 struct v4l2_pix_format *pix = &f->fmt.pix;
824 struct v4l2_rect rect = {
825 .left = icd->x_current,
826 .top = icd->y_current,
827 .width = pix->width,
828 .height = pix->height,
829 };
830 int ret;
831
832 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
833 if (!xlate) {
eff505fa 834 dev_warn(ici->dev, "Format %x not found\n", pix->pixelformat);
09e231b3
GL		 835 return -EINVAL;
836 }
837
838 ret = acquire_dma_channel(mx3_cam);
839 if (ret < 0)
840 return ret;
841
842 /*
843 * Might have to perform a complete interface initialisation like in
844 * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
845 * mxc_v4l2_s_fmt()
846 */
847
848 configure_geometry(mx3_cam, &rect);
4f67130a 849
09e231b3
GL		 850 ret = icd->ops->set_fmt(icd, f);
851 if (!ret) {
4f67130a
GL		 852 icd->buswidth = xlate->buswidth;
853 icd->current_fmt = xlate->host_fmt;
854 }
855
856 return ret;
857}
858
859static int mx3_camera_try_fmt(struct soc_camera_device *icd,
860 struct v4l2_format *f)
861{
862 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
863 const struct soc_camera_format_xlate *xlate;
864 struct v4l2_pix_format *pix = &f->fmt.pix;
865 __u32 pixfmt = pix->pixelformat;
866 enum v4l2_field field;
867 int ret;
868
869 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
870 if (pixfmt && !xlate) {
eff505fa 871 dev_warn(ici->dev, "Format %x not found\n", pixfmt);
4f67130a
GL		 872 return -EINVAL;
873 }
874
875 /* limit to MX3 hardware capabilities */
876 if (pix->height > 4096)
877 pix->height = 4096;
878 if (pix->width > 4096)
879 pix->width = 4096;
880
881 pix->bytesperline = pix->width *
882 DIV_ROUND_UP(xlate->host_fmt->depth, 8);
883 pix->sizeimage = pix->height * pix->bytesperline;
884
885 /* camera has to see its format, but the user the original one */
886 pix->pixelformat = xlate->cam_fmt->fourcc;
887 /* limit to sensor capabilities */
888 ret = icd->ops->try_fmt(icd, f);
889 pix->pixelformat = xlate->host_fmt->fourcc;
890
891 field = pix->field;
892
893 if (field == V4L2_FIELD_ANY) {
894 pix->field = V4L2_FIELD_NONE;
895 } else if (field != V4L2_FIELD_NONE) {
896 dev_err(&icd->dev, "Field type %d unsupported.\n", field);
897 return -EINVAL;
898 }
899
900 return ret;
901}
902
903static int mx3_camera_reqbufs(struct soc_camera_file *icf,
904 struct v4l2_requestbuffers *p)
905{
906 return 0;
907}
908
909static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
910{
911 struct soc_camera_file *icf = file->private_data;
912
913 return videobuf_poll_stream(file, &icf->vb_vidq, pt);
914}
915
916static int mx3_camera_querycap(struct soc_camera_host *ici,
917 struct v4l2_capability *cap)
918{
919 /* cap->name is set by the firendly caller:-> */
920 strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
921 cap->version = KERNEL_VERSION(0, 2, 2);
922 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
923
924 return 0;
925}
926
927static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
928{
929 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
930 struct mx3_camera_dev *mx3_cam = ici->priv;
931 unsigned long bus_flags, camera_flags, common_flags;
932 u32 dw, sens_conf;
933 int ret = test_platform_param(mx3_cam, icd->buswidth, &bus_flags);
934 const struct soc_camera_format_xlate *xlate;
935
936 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
937 if (!xlate) {
eff505fa 938 dev_warn(ici->dev, "Format %x not found\n", pixfmt);
4f67130a
GL		 939 return -EINVAL;
940 }
941
eff505fa 942 dev_dbg(ici->dev, "requested bus width %d bit: %d\n",
4f67130a
GL		 943 icd->buswidth, ret);
944
945 if (ret < 0)
946 return ret;
947
948 camera_flags = icd->ops->query_bus_param(icd);
949
950 common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
40e2e092
GL		 951 dev_dbg(ici->dev, "Flags cam: 0x%lx host: 0x%lx common: 0x%lx\n",
952 camera_flags, bus_flags, common_flags);
4f67130a 953 if (!common_flags) {
40e2e092 954 dev_dbg(ici->dev, "no common flags");
4f67130a
GL		 955 return -EINVAL;
956 }
957
958 /* Make choices, based on platform preferences */
959 if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
960 (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
961 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
962 common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
963 else
964 common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
965 }
966
967 if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
968 (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
969 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
970 common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
971 else
972 common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
973 }
974
975 if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
976 (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
977 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
978 common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
979 else
980 common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
981 }
982
983 if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
984 (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
985 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
986 common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
987 else
988 common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
989 }
990
991 /* Make the camera work in widest common mode, we'll take care of
992 * the rest */
993 if (common_flags & SOCAM_DATAWIDTH_15)
994 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
995 SOCAM_DATAWIDTH_15;
996 else if (common_flags & SOCAM_DATAWIDTH_10)
997 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
998 SOCAM_DATAWIDTH_10;
999 else if (common_flags & SOCAM_DATAWIDTH_8)
1000 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1001 SOCAM_DATAWIDTH_8;
1002 else
1003 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1004 SOCAM_DATAWIDTH_4;
1005
1006 ret = icd->ops->set_bus_param(icd, common_flags);
40e2e092
GL		 1007 if (ret < 0) {
1008 dev_dbg(ici->dev, "camera set_bus_param(%lx) returned %d\n",
1009 common_flags, ret);
4f67130a 1010 return ret;
40e2e092 1011 }
4f67130a
GL		 1012
1013 /*
1014 * So far only gated clock mode is supported. Add a line
1015 * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
1016 * below and select the required mode when supporting other
1017 * synchronisation protocols.
1018 */
1019 sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
1020 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
1021 (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
1022 (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
1023 (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
1024 (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
1025 (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
1026
1027 /* TODO: Support RGB and YUV formats */
1028
1029 /* This has been set in mx3_camera_activate(), but we clear it above */
1030 sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
1031
1032 if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
1033 sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
1034 if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
1035 sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
1036 if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
1037 sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
1038 if (common_flags & SOCAM_DATA_ACTIVE_LOW)
1039 sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
1040
1041 /* Just do what we're asked to do */
1042 switch (xlate->host_fmt->depth) {
1043 case 4:
1044 dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1045 break;
1046 case 8:
1047 dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1048 break;
1049 case 10:
1050 dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1051 break;
1052 default:
1053 /*
1054 * Actually it can only be 15 now, default is just to silence
1055 * compiler warnings
1056 */
1057 case 15:
1058 dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1059 }
1060
1061 csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
1062
eff505fa 1063 dev_dbg(ici->dev, "Set SENS_CONF to %x\n", sens_conf | dw);
4f67130a
GL		 1064
1065 return 0;
1066}
1067
1068static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
1069 .owner = THIS_MODULE,
1070 .add = mx3_camera_add_device,
1071 .remove = mx3_camera_remove_device,
09e231b3 1072 .set_crop = mx3_camera_set_crop,
4f67130a
GL		 1073 .set_fmt = mx3_camera_set_fmt,
1074 .try_fmt = mx3_camera_try_fmt,
1075 .get_formats = mx3_camera_get_formats,
1076 .init_videobuf = mx3_camera_init_videobuf,
1077 .reqbufs = mx3_camera_reqbufs,
1078 .poll = mx3_camera_poll,
1079 .querycap = mx3_camera_querycap,
1080 .set_bus_param = mx3_camera_set_bus_param,
1081};
1082
e36bc31f 1083static int __devinit mx3_camera_probe(struct platform_device *pdev)
4f67130a
GL		 1084{
1085 struct mx3_camera_dev *mx3_cam;
1086 struct resource *res;
1087 void __iomem *base;
1088 int err = 0;
1089 struct soc_camera_host *soc_host;
1090
1091 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1092 if (!res) {
1093 err = -ENODEV;
1094 goto egetres;
1095 }
1096
1097 mx3_cam = vmalloc(sizeof(*mx3_cam));
1098 if (!mx3_cam) {
1099 dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
1100 err = -ENOMEM;
1101 goto ealloc;
1102 }
1103 memset(mx3_cam, 0, sizeof(*mx3_cam));
1104
b71df97a 1105 mx3_cam->clk = clk_get(&pdev->dev, NULL);
4f67130a
GL		 1106 if (IS_ERR(mx3_cam->clk)) {
1107 err = PTR_ERR(mx3_cam->clk);
1108 goto eclkget;
1109 }
1110
4f67130a
GL		 1111 mx3_cam->pdata = pdev->dev.platform_data;
1112 mx3_cam->platform_flags = mx3_cam->pdata->flags;
1113 if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
1114 MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
1115 MX3_CAMERA_DATAWIDTH_15))) {
1116 /* Platform hasn't set available data widths. This is bad.
1117 * Warn and use a default. */
1118 dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
1119 "data widths, using default 8 bit\n");
1120 mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
1121 }
1122
1123 mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
1124 if (!mx3_cam->mclk) {
1125 dev_warn(&pdev->dev,
1126 "mclk_10khz == 0! Please, fix your platform data. "
1127 "Using default 20MHz\n");
1128 mx3_cam->mclk = 20000000;
1129 }
1130
1131 /* list of video-buffers */
1132 INIT_LIST_HEAD(&mx3_cam->capture);
1133 spin_lock_init(&mx3_cam->lock);
1134
40e2e092 1135 base = ioremap(res->start, resource_size(res));
4f67130a 1136 if (!base) {
40e2e092 1137 pr_err("Couldn't map %x@%x\n", resource_size(res), res->start);
4f67130a
GL		 1138 err = -ENOMEM;
1139 goto eioremap;
1140 }
1141
1142 mx3_cam->base = base;
4f67130a
GL		 1143
1144 soc_host = &mx3_cam->soc_host;
1145 soc_host->drv_name = MX3_CAM_DRV_NAME;
1146 soc_host->ops = &mx3_soc_camera_host_ops;
1147 soc_host->priv = mx3_cam;
eff505fa 1148 soc_host->dev = &pdev->dev;
4f67130a 1149 soc_host->nr = pdev->id;
eff505fa 1150
4f67130a
GL		 1151 err = soc_camera_host_register(soc_host);
1152 if (err)
1153 goto ecamhostreg;
1154
1155 /* IDMAC interface */
1156 dmaengine_get();
1157
1158 return 0;
1159
1160ecamhostreg:
1161 iounmap(base);
1162eioremap:
1163 clk_put(mx3_cam->clk);
1164eclkget:
1165 vfree(mx3_cam);
1166ealloc:
1167egetres:
1168 return err;
1169}
1170
1171static int __devexit mx3_camera_remove(struct platform_device *pdev)
1172{
eff505fa
GL		 1173 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
1174 struct mx3_camera_dev *mx3_cam = container_of(soc_host,
1175 struct mx3_camera_dev, soc_host);
4f67130a
GL		 1176
1177 clk_put(mx3_cam->clk);
1178
eff505fa 1179 soc_camera_host_unregister(soc_host);
4f67130a
GL		 1180
1181 iounmap(mx3_cam->base);
1182
1183 /*
1184 * The channel has either not been allocated,
1185 * or should have been released
1186 */
1187 if (WARN_ON(mx3_cam->idmac_channel[0]))
1188 dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
1189
1190 vfree(mx3_cam);
1191
1192 dmaengine_put();
1193
1194 dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n");
1195
1196 return 0;
1197}
1198
1199static struct platform_driver mx3_camera_driver = {
1200 .driver = {
1201 .name = MX3_CAM_DRV_NAME,
1202 },
1203 .probe = mx3_camera_probe,
e36bc31f 1204 .remove = __devexit_p(mx3_camera_remove),
4f67130a
GL		 1205};
1206
1207
e36bc31f 1208static int __init mx3_camera_init(void)
4f67130a
GL		 1209{
1210 return platform_driver_register(&mx3_camera_driver);
1211}
1212
1213static void __exit mx3_camera_exit(void)
1214{
1215 platform_driver_unregister(&mx3_camera_driver);
1216}
1217
1218module_init(mx3_camera_init);
1219module_exit(mx3_camera_exit);
1220
1221MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1222MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
1223MODULE_LICENSE("GPL v2");
40e2e092 1224MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);
kernel source for telekom puls (alcatel/mediatek)