projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
V4L/DVB (9327): v4l: use video_device.num instead of minor in video%d
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / ivtv / ivtvfb.c
CommitLineData
32db7754
HV		 1/*
2 On Screen Display cx23415 Framebuffer driver
3
4 This module presents the cx23415 OSD (onscreen display) framebuffer memory
5 as a standard Linux /dev/fb style framebuffer device. The framebuffer has
be383bd3 6 support for 8, 16 & 32 bpp packed pixel formats with alpha channel. In 16bpp
32db7754
HV		 7 mode, there is a choice of a three color depths (12, 15 or 16 bits), but no
8 local alpha. The colorspace is selectable between rgb & yuv.
9 Depending on the TV standard configured in the ivtv module at load time,
10 the initial resolution is either 640x400 (NTSC) or 640x480 (PAL) at 8bpp.
11 Video timings are locked to ensure a vertical refresh rate of 50Hz (PAL)
12 or 59.94 (NTSC)
13
14 Copyright (c) 2003 Matt T. Yourst <yourst@yourst.com>
15
16 Derived from drivers/video/vesafb.c
17 Portions (c) 1998 Gerd Knorr <kraxel@goldbach.in-berlin.de>
18
19 2.6 kernel port:
20 Copyright (C) 2004 Matthias Badaire
21
22 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
23
24 Copyright (C) 2006 Ian Armstrong <ian@iarmst.demon.co.uk>
25
26 This program is free software; you can redistribute it and/or modify
27 it under the terms of the GNU General Public License as published by
28 the Free Software Foundation; either version 2 of the License, or
29 (at your option) any later version.
30
31 This program is distributed in the hope that it will be useful,
32 but WITHOUT ANY WARRANTY; without even the implied warranty of
33 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34 GNU General Public License for more details.
35
36 You should have received a copy of the GNU General Public License
37 along with this program; if not, write to the Free Software
38 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
39 */
40
41#include <linux/module.h>
42#include <linux/kernel.h>
32db7754 43#include <linux/fb.h>
0f45b8c5 44#include <linux/ivtvfb.h>
32db7754
HV		 45
46#ifdef CONFIG_MTRR
47#include <asm/mtrr.h>
48#endif
49
50#include "ivtv-driver.h"
32db7754 51#include "ivtv-udma.h"
32db7754 52#include "ivtv-mailbox.h"
32db7754
HV		 53
54/* card parameters */
641ed49d
HV		 55static int ivtvfb_card_id = -1;
56static int ivtvfb_debug = 0;
32db7754 57static int osd_laced;
32db7754
HV		 58static int osd_depth;
59static int osd_upper;
60static int osd_left;
61static int osd_yres;
62static int osd_xres;
63
641ed49d
HV		 64module_param(ivtvfb_card_id, int, 0444);
65module_param_named(debug,ivtvfb_debug, int, 0644);
32db7754 66module_param(osd_laced, bool, 0444);
32db7754
HV		 67module_param(osd_depth, int, 0444);
68module_param(osd_upper, int, 0444);
69module_param(osd_left, int, 0444);
70module_param(osd_yres, int, 0444);
71module_param(osd_xres, int, 0444);
72
641ed49d 73MODULE_PARM_DESC(ivtvfb_card_id,
32db7754
HV		 74 "Only use framebuffer of the specified ivtv card (0-31)\n"
75 "\t\t\tdefault -1: initialize all available framebuffers");
76
77MODULE_PARM_DESC(debug,
78 "Debug level (bitmask). Default: errors only\n"
79 "\t\t\t(debug = 3 gives full debugging)");
80
32db7754
HV		 81/* Why upper, left, xres, yres, depth, laced ? To match terminology used
82 by fbset.
83 Why start at 1 for left & upper coordinate ? Because X doesn't allow 0 */
84
85MODULE_PARM_DESC(osd_laced,
86 "Interlaced mode\n"
87 "\t\t\t0=off\n"
88 "\t\t\t1=on\n"
89 "\t\t\tdefault off");
90
91MODULE_PARM_DESC(osd_depth,
be383bd3 92 "Bits per pixel - 8, 16, 32\n"
32db7754
HV		 93 "\t\t\tdefault 8");
94
95MODULE_PARM_DESC(osd_upper,
96 "Vertical start position\n"
97 "\t\t\tdefault 0 (Centered)");
98
99MODULE_PARM_DESC(osd_left,
100 "Horizontal start position\n"
101 "\t\t\tdefault 0 (Centered)");
102
103MODULE_PARM_DESC(osd_yres,
104 "Display height\n"
105 "\t\t\tdefault 480 (PAL)\n"
106 "\t\t\t 400 (NTSC)");
107
108MODULE_PARM_DESC(osd_xres,
109 "Display width\n"
110 "\t\t\tdefault 640");
111
112MODULE_AUTHOR("Kevin Thayer, Chris Kennedy, Hans Verkuil, John Harvey, Ian Armstrong");
113MODULE_LICENSE("GPL");
114
115/* --------------------------------------------------------------------- */
116
641ed49d
HV		 117#define IVTVFB_DBGFLG_WARN (1 << 0)
118#define IVTVFB_DBGFLG_INFO (1 << 1)
32db7754 119
641ed49d 120#define IVTVFB_DEBUG(x, type, fmt, args...) \
32db7754 121 do { \
641ed49d 122 if ((x) & ivtvfb_debug) \
7b3a0d49 123 printk(KERN_INFO "ivtvfb%d " type ": " fmt, itv->num , ## args); \
32db7754 124 } while (0)
641ed49d
HV		 125#define IVTVFB_DEBUG_WARN(fmt, args...) IVTVFB_DEBUG(IVTVFB_DBGFLG_WARN, "warning", fmt , ## args)
126#define IVTVFB_DEBUG_INFO(fmt, args...) IVTVFB_DEBUG(IVTVFB_DBGFLG_INFO, "info", fmt , ## args)
32db7754
HV		 127
128/* Standard kernel messages */
641ed49d
HV		 129#define IVTVFB_ERR(fmt, args...) printk(KERN_ERR "ivtvfb%d: " fmt, itv->num , ## args)
130#define IVTVFB_WARN(fmt, args...) printk(KERN_WARNING "ivtvfb%d: " fmt, itv->num , ## args)
131#define IVTVFB_INFO(fmt, args...) printk(KERN_INFO "ivtvfb%d: " fmt, itv->num , ## args)
32db7754
HV		 132
133/* --------------------------------------------------------------------- */
134
135#define IVTV_OSD_MAX_WIDTH 720
136#define IVTV_OSD_MAX_HEIGHT 576
137
138#define IVTV_OSD_BPP_8 0x00
139#define IVTV_OSD_BPP_16_444 0x03
140#define IVTV_OSD_BPP_16_555 0x02
141#define IVTV_OSD_BPP_16_565 0x01
142#define IVTV_OSD_BPP_32 0x04
143
144struct osd_info {
32db7754
HV		 145 /* Physical base address */
146 unsigned long video_pbase;
147 /* Relative base address (relative to start of decoder memory) */
148 u32 video_rbase;
149 /* Mapped base address */
150 volatile char __iomem *video_vbase;
151 /* Buffer size */
152 u32 video_buffer_size;
153
154#ifdef CONFIG_MTRR
155 /* video_base rounded down as required by hardware MTRRs */
156 unsigned long fb_start_aligned_physaddr;
157 /* video_base rounded up as required by hardware MTRRs */
158 unsigned long fb_end_aligned_physaddr;
159#endif
160
161 /* Store the buffer offset */
162 int set_osd_coords_x;
163 int set_osd_coords_y;
164
165 /* Current dimensions (NOT VISIBLE SIZE!) */
166 int display_width;
167 int display_height;
168 int display_byte_stride;
169
170 /* Current bits per pixel */
171 int bits_per_pixel;
172 int bytes_per_pixel;
173
174 /* Frame buffer stuff */
175 struct fb_info ivtvfb_info;
176 struct fb_var_screeninfo ivtvfb_defined;
177 struct fb_fix_screeninfo ivtvfb_fix;
178};
179
180struct ivtv_osd_coords {
181 unsigned long offset;
182 unsigned long max_offset;
183 int pixel_stride;
184 int lines;
185 int x;
186 int y;
187};
188
189/* --------------------------------------------------------------------- */
190
191/* ivtv API calls for framebuffer related support */
192
641ed49d 193static int ivtvfb_get_framebuffer(struct ivtv *itv, u32 *fbbase,
32db7754
HV		 194 u32 *fblength)
195{
196 u32 data[CX2341X_MBOX_MAX_DATA];
197 int rc;
198
199 rc = ivtv_vapi_result(itv, data, CX2341X_OSD_GET_FRAMEBUFFER, 0);
200 *fbbase = data[0];
201 *fblength = data[1];
202 return rc;
203}
204
641ed49d 205static int ivtvfb_get_osd_coords(struct ivtv *itv,
32db7754
HV		 206 struct ivtv_osd_coords *osd)
207{
be383bd3 208 struct osd_info *oi = itv->osd_info;
32db7754
HV		 209 u32 data[CX2341X_MBOX_MAX_DATA];
210
211 ivtv_vapi_result(itv, data, CX2341X_OSD_GET_OSD_COORDS, 0);
212
be383bd3
HV		 213 osd->offset = data[0] - oi->video_rbase;
214 osd->max_offset = oi->display_width * oi->display_height * 4;
32db7754
HV		 215 osd->pixel_stride = data[1];
216 osd->lines = data[2];
217 osd->x = data[3];
218 osd->y = data[4];
219 return 0;
220}
221
641ed49d 222static int ivtvfb_set_osd_coords(struct ivtv *itv, const struct ivtv_osd_coords *osd)
32db7754 223{
be383bd3
HV		 224 struct osd_info *oi = itv->osd_info;
225
226 oi->display_width = osd->pixel_stride;
227 oi->display_byte_stride = osd->pixel_stride * oi->bytes_per_pixel;
228 oi->set_osd_coords_x += osd->x;
229 oi->set_osd_coords_y = osd->y;
32db7754
HV		 230
231 return ivtv_vapi(itv, CX2341X_OSD_SET_OSD_COORDS, 5,
be383bd3 232 osd->offset + oi->video_rbase,
32db7754
HV		 233 osd->pixel_stride,
234 osd->lines, osd->x, osd->y);
235}
236
641ed49d 237static int ivtvfb_set_display_window(struct ivtv *itv, struct v4l2_rect *ivtv_window)
32db7754 238{
32db7754
HV		 239 int osd_height_limit = itv->is_50hz ? 576 : 480;
240
241 /* Only fail if resolution too high, otherwise fudge the start coords. */
242 if ((ivtv_window->height > osd_height_limit) || (ivtv_window->width > IVTV_OSD_MAX_WIDTH))
243 return -EINVAL;
244
245 /* Ensure we don't exceed display limits */
246 if (ivtv_window->top + ivtv_window->height > osd_height_limit) {
641ed49d 247 IVTVFB_DEBUG_WARN("ivtv_ioctl_fb_set_display_window - Invalid height setting (%d, %d)\n",
32db7754
HV		 248 ivtv_window->top, ivtv_window->height);
249 ivtv_window->top = osd_height_limit - ivtv_window->height;
250 }
251
252 if (ivtv_window->left + ivtv_window->width > IVTV_OSD_MAX_WIDTH) {
641ed49d 253 IVTVFB_DEBUG_WARN("ivtv_ioctl_fb_set_display_window - Invalid width setting (%d, %d)\n",
32db7754
HV		 254 ivtv_window->left, ivtv_window->width);
255 ivtv_window->left = IVTV_OSD_MAX_WIDTH - ivtv_window->width;
256 }
257
258 /* Set the OSD origin */
259 write_reg((ivtv_window->top << 16) | ivtv_window->left, 0x02a04);
260
261 /* How much to display */
262 write_reg(((ivtv_window->top+ivtv_window->height) << 16) | (ivtv_window->left+ivtv_window->width), 0x02a08);
263
264 /* Pass this info back the yuv handler */
265 itv->yuv_info.osd_vis_w = ivtv_window->width;
266 itv->yuv_info.osd_vis_h = ivtv_window->height;
267 itv->yuv_info.osd_x_offset = ivtv_window->left;
268 itv->yuv_info.osd_y_offset = ivtv_window->top;
269
270 return 0;
271}
272
641ed49d 273static int ivtvfb_prep_dec_dma_to_device(struct ivtv *itv,
32db7754
HV		 274 unsigned long ivtv_dest_addr, void __user *userbuf,
275 int size_in_bytes)
276{
277 DEFINE_WAIT(wait);
32db7754
HV		 278 int got_sig = 0;
279
280 mutex_lock(&itv->udma.lock);
281 /* Map User DMA */
282 if (ivtv_udma_setup(itv, ivtv_dest_addr, userbuf, size_in_bytes) <= 0) {
283 mutex_unlock(&itv->udma.lock);
641ed49d 284 IVTVFB_WARN("ivtvfb_prep_dec_dma_to_device, "
32db7754
HV		 285 "Error with get_user_pages: %d bytes, %d pages returned\n",
286 size_in_bytes, itv->udma.page_count);
287
288 /* get_user_pages must have failed completely */
289 return -EIO;
290 }
291
641ed49d 292 IVTVFB_DEBUG_INFO("ivtvfb_prep_dec_dma_to_device, %d bytes, %d pages\n",
32db7754
HV		 293 size_in_bytes, itv->udma.page_count);
294
295 ivtv_udma_prepare(itv);
296 prepare_to_wait(&itv->dma_waitq, &wait, TASK_INTERRUPTIBLE);
297 /* if no UDMA is pending and no UDMA is in progress, then the DMA
298 is finished */
299 while (itv->i_flags & (IVTV_F_I_UDMA_PENDING | IVTV_F_I_UDMA)) {
300 /* don't interrupt if the DMA is in progress but break off
301 a still pending DMA. */
302 got_sig = signal_pending(current);
303 if (got_sig && test_and_clear_bit(IVTV_F_I_UDMA_PENDING, &itv->i_flags))
304 break;
305 got_sig = 0;
306 schedule();
307 }
308 finish_wait(&itv->dma_waitq, &wait);
309
310 /* Unmap Last DMA Xfer */
311 ivtv_udma_unmap(itv);
312 mutex_unlock(&itv->udma.lock);
313 if (got_sig) {
314 IVTV_DEBUG_INFO("User stopped OSD\n");
315 return -EINTR;
316 }
317
c777549f 318 return 0;
32db7754
HV		 319}
320
641ed49d 321static int ivtvfb_prep_frame(struct ivtv *itv, int cmd, void __user *source,
be383bd3 322 unsigned long dest_offset, int count)
32db7754
HV		 323{
324 DEFINE_WAIT(wait);
aaf9fa21 325 struct osd_info *oi = itv->osd_info;
32db7754
HV		 326
327 /* Nothing to do */
328 if (count == 0) {
641ed49d 329 IVTVFB_DEBUG_WARN("ivtvfb_prep_frame: Nothing to do. count = 0\n");
32db7754
HV		 330 return -EINVAL;
331 }
332
333 /* Check Total FB Size */
aaf9fa21 334 if ((dest_offset + count) > oi->video_buffer_size) {
641ed49d 335 IVTVFB_WARN("ivtvfb_prep_frame: Overflowing the framebuffer %ld, only %d available\n",
aaf9fa21 336 dest_offset + count, oi->video_buffer_size);
32db7754
HV		 337 return -E2BIG;
338 }
339
340 /* Not fatal, but will have undesirable results */
341 if ((unsigned long)source & 3)
641ed49d 342 IVTVFB_WARN("ivtvfb_prep_frame: Source address not 32 bit aligned (0x%08lx)\n",
be383bd3 343 (unsigned long)source);
32db7754
HV		 344
345 if (dest_offset & 3)
641ed49d 346 IVTVFB_WARN("ivtvfb_prep_frame: Dest offset not 32 bit aligned (%ld)\n", dest_offset);
32db7754
HV		 347
348 if (count & 3)
641ed49d 349 IVTVFB_WARN("ivtvfb_prep_frame: Count not a multiple of 4 (%d)\n", count);
32db7754
HV		 350
351 /* Check Source */
352 if (!access_ok(VERIFY_READ, source + dest_offset, count)) {
641ed49d 353 IVTVFB_WARN("Invalid userspace pointer 0x%08lx\n",
32db7754
HV		 354 (unsigned long)source);
355
641ed49d 356 IVTVFB_DEBUG_WARN("access_ok() failed for offset 0x%08lx source 0x%08lx count %d\n",
32db7754
HV		 357 dest_offset, (unsigned long)source,
358 count);
359 return -EINVAL;
360 }
361
362 /* OSD Address to send DMA to */
33c0fcad 363 dest_offset += IVTV_DECODER_OFFSET + oi->video_rbase;
32db7754
HV		 364
365 /* Fill Buffers */
641ed49d 366 return ivtvfb_prep_dec_dma_to_device(itv, dest_offset, source, count);
32db7754
HV		 367}
368
4cbeb371 369static ssize_t ivtvfb_write(struct fb_info *info, const char __user *buf,
4ee0e42b 370 size_t count, loff_t *ppos)
4cbeb371
IA		 371{
372 unsigned long p = *ppos;
373 void *dst;
374 int err = 0;
c777549f 375 int dma_err;
4cbeb371
IA		 376 unsigned long total_size;
377 struct ivtv *itv = (struct ivtv *) info->par;
378 unsigned long dma_offset =
379 IVTV_DECODER_OFFSET + itv->osd_info->video_rbase;
380 unsigned long dma_size;
381 u16 lead = 0, tail = 0;
382
383 if (info->state != FBINFO_STATE_RUNNING)
384 return -EPERM;
385
386 total_size = info->screen_size;
387
388 if (total_size == 0)
389 total_size = info->fix.smem_len;
390
391 if (p > total_size)
392 return -EFBIG;
393
394 if (count > total_size) {
395 err = -EFBIG;
396 count = total_size;
397 }
398
399 if (count + p > total_size) {
400 if (!err)
401 err = -ENOSPC;
4cbeb371
IA		 402 count = total_size - p;
403 }
404
405 dst = (void __force *) (info->screen_base + p);
406
407 if (info->fbops->fb_sync)
408 info->fbops->fb_sync(info);
409
c777549f
IA		 410 /* If transfer size > threshold and both src/dst
411 addresses are aligned, use DMA */
412 if (count >= 4096 &&
413 ((unsigned long)buf & 3) == ((unsigned long)dst & 3)) {
414 /* Odd address = can't DMA. Align */
415 if ((unsigned long)dst & 3) {
416 lead = 4 - ((unsigned long)dst & 3);
417 if (copy_from_user(dst, buf, lead))
418 return -EFAULT;
419 buf += lead;
420 dst += lead;
4cbeb371 421 }
c777549f
IA		 422 /* DMA resolution is 32 bits */
423 if ((count - lead) & 3)
424 tail = (count - lead) & 3;
425 /* DMA the data */
426 dma_size = count - lead - tail;
427 dma_err = ivtvfb_prep_dec_dma_to_device(itv,
428 p + lead + dma_offset, (void __user *)buf, dma_size);
429 if (dma_err)
430 return dma_err;
431 dst += dma_size;
432 buf += dma_size;
433 /* Copy any leftover data */
434 if (tail && copy_from_user(dst, buf, tail))
435 return -EFAULT;
436 } else if (copy_from_user(dst, buf, count)) {
437 return -EFAULT;
4cbeb371
IA		 438 }
439
440 if (!err)
441 *ppos += count;
442
443 return (err) ? err : count;
444}
445
32db7754
HV		 446static int ivtvfb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
447{
448 DEFINE_WAIT(wait);
449 struct ivtv *itv = (struct ivtv *)info->par;
be383bd3 450 int rc = 0;
32db7754
HV		 451
452 switch (cmd) {
32db7754
HV		 453 case FBIOGET_VBLANK: {
454 struct fb_vblank vblank;
455 u32 trace;
456
457 vblank.flags = FB_VBLANK_HAVE_COUNT |FB_VBLANK_HAVE_VCOUNT |
458 FB_VBLANK_HAVE_VSYNC;
be383bd3 459 trace = read_reg(0x028c0) >> 16;
c777549f
IA		 460 if (itv->is_50hz && trace > 312)
461 trace -= 312;
462 else if (itv->is_60hz && trace > 262)
463 trace -= 262;
464 if (trace == 1)
465 vblank.flags |= FB_VBLANK_VSYNCING;
a158f355 466 vblank.count = itv->last_vsync_field;
32db7754
HV		 467 vblank.vcount = trace;
468 vblank.hcount = 0;
469 if (copy_to_user((void __user *)arg, &vblank, sizeof(vblank)))
470 return -EFAULT;
471 return 0;
472 }
473
be383bd3 474 case FBIO_WAITFORVSYNC:
32db7754 475 prepare_to_wait(&itv->vsync_waitq, &wait, TASK_INTERRUPTIBLE);
c777549f
IA		 476 if (!schedule_timeout(msecs_to_jiffies(50)))
477 rc = -ETIMEDOUT;
be383bd3 478 finish_wait(&itv->vsync_waitq, &wait);
32db7754 479 return rc;
32db7754 480
d715e766
HV		 481 case IVTVFB_IOC_DMA_FRAME: {
482 struct ivtvfb_dma_frame args;
32db7754 483
641ed49d 484 IVTVFB_DEBUG_INFO("IVTVFB_IOC_DMA_FRAME\n");
32db7754
HV		 485 if (copy_from_user(&args, (void __user *)arg, sizeof(args)))
486 return -EFAULT;
487
641ed49d 488 return ivtvfb_prep_frame(itv, cmd, args.source, args.dest_offset, args.count);
32db7754
HV		 489 }
490
491 default:
641ed49d 492 IVTVFB_DEBUG_INFO("Unknown ioctl %08x\n", cmd);
32db7754
HV		 493 return -EINVAL;
494 }
495 return 0;
496}
497
498/* Framebuffer device handling */
499
500static int ivtvfb_set_var(struct ivtv *itv, struct fb_var_screeninfo *var)
501{
aaf9fa21 502 struct osd_info *oi = itv->osd_info;
32db7754
HV		 503 struct ivtv_osd_coords ivtv_osd;
504 struct v4l2_rect ivtv_window;
aaf9fa21 505 int osd_mode = -1;
32db7754 506
641ed49d 507 IVTVFB_DEBUG_INFO("ivtvfb_set_var\n");
32db7754
HV		 508
509 /* Select color space */
510 if (var->nonstd) /* YUV */
be383bd3 511 write_reg(read_reg(0x02a00) | 0x0002000, 0x02a00);
32db7754 512 else /* RGB */
be383bd3 513 write_reg(read_reg(0x02a00) & ~0x0002000, 0x02a00);
32db7754 514
aaf9fa21 515 /* Set the color mode */
32db7754
HV		 516 switch (var->bits_per_pixel) {
517 case 8:
aaf9fa21 518 osd_mode = IVTV_OSD_BPP_8;
32db7754
HV		 519 break;
520 case 32:
aaf9fa21 521 osd_mode = IVTV_OSD_BPP_32;
32db7754
HV		 522 break;
523 case 16:
524 switch (var->green.length) {
525 case 4:
aaf9fa21 526 osd_mode = IVTV_OSD_BPP_16_444;
32db7754
HV		 527 break;
528 case 5:
aaf9fa21 529 osd_mode = IVTV_OSD_BPP_16_555;
32db7754
HV		 530 break;
531 case 6:
aaf9fa21 532 osd_mode = IVTV_OSD_BPP_16_565;
32db7754
HV		 533 break;
534 default:
641ed49d 535 IVTVFB_DEBUG_WARN("ivtvfb_set_var - Invalid bpp\n");
32db7754
HV		 536 }
537 break;
538 default:
641ed49d 539 IVTVFB_DEBUG_WARN("ivtvfb_set_var - Invalid bpp\n");
32db7754
HV		 540 }
541
6659e3ed
IA		 542 /* Set video mode. Although rare, the display can become scrambled even
543 if we don't change mode. Always 'bounce' to osd_mode via mode 0 */
544 if (osd_mode != -1) {
aaf9fa21
IA		 545 ivtv_vapi(itv, CX2341X_OSD_SET_PIXEL_FORMAT, 1, 0);
546 ivtv_vapi(itv, CX2341X_OSD_SET_PIXEL_FORMAT, 1, osd_mode);
aaf9fa21
IA		 547 }
548
549 oi->bits_per_pixel = var->bits_per_pixel;
550 oi->bytes_per_pixel = var->bits_per_pixel / 8;
32db7754
HV		 551
552 /* Set the flicker filter */
553 switch (var->vmode & FB_VMODE_MASK) {
554 case FB_VMODE_NONINTERLACED: /* Filter on */
555 ivtv_vapi(itv, CX2341X_OSD_SET_FLICKER_STATE, 1, 1);
556 break;
557 case FB_VMODE_INTERLACED: /* Filter off */
558 ivtv_vapi(itv, CX2341X_OSD_SET_FLICKER_STATE, 1, 0);
559 break;
560 default:
641ed49d 561 IVTVFB_DEBUG_WARN("ivtvfb_set_var - Invalid video mode\n");
32db7754
HV		 562 }
563
564 /* Read the current osd info */
641ed49d 565 ivtvfb_get_osd_coords(itv, &ivtv_osd);
32db7754
HV		 566
567 /* Now set the OSD to the size we want */
568 ivtv_osd.pixel_stride = var->xres_virtual;
569 ivtv_osd.lines = var->yres_virtual;
570 ivtv_osd.x = 0;
571 ivtv_osd.y = 0;
641ed49d 572 ivtvfb_set_osd_coords(itv, &ivtv_osd);
32db7754
HV		 573
574 /* Can't seem to find the right API combo for this.
575 Use another function which does what we need through direct register access. */
576 ivtv_window.width = var->xres;
577 ivtv_window.height = var->yres;
578
579 /* Minimum margin cannot be 0, as X won't allow such a mode */
be383bd3
HV		 580 if (!var->upper_margin) var->upper_margin++;
581 if (!var->left_margin) var->left_margin++;
32db7754
HV		 582 ivtv_window.top = var->upper_margin - 1;
583 ivtv_window.left = var->left_margin - 1;
584
641ed49d 585 ivtvfb_set_display_window(itv, &ivtv_window);
32db7754 586
77aded6b
IA		 587 /* Pass screen size back to yuv handler */
588 itv->yuv_info.osd_full_w = ivtv_osd.pixel_stride;
589 itv->yuv_info.osd_full_h = ivtv_osd.lines;
590
32db7754
HV		 591 /* Force update of yuv registers */
592 itv->yuv_info.yuv_forced_update = 1;
593
641ed49d 594 IVTVFB_DEBUG_INFO("Display size: %dx%d (virtual %dx%d) @ %dbpp\n",
be383bd3
HV		 595 var->xres, var->yres,
596 var->xres_virtual, var->yres_virtual,
597 var->bits_per_pixel);
32db7754 598
641ed49d 599 IVTVFB_DEBUG_INFO("Display position: %d, %d\n",
be383bd3 600 var->left_margin, var->upper_margin);
32db7754 601
641ed49d 602 IVTVFB_DEBUG_INFO("Display filter: %s\n",
be383bd3 603 (var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED ? "on" : "off");
641ed49d 604 IVTVFB_DEBUG_INFO("Color space: %s\n", var->nonstd ? "YUV" : "RGB");
32db7754
HV		 605
606 return 0;
607}
608
609static int ivtvfb_get_fix(struct ivtv *itv, struct fb_fix_screeninfo *fix)
610{
be383bd3
HV		 611 struct osd_info *oi = itv->osd_info;
612
641ed49d 613 IVTVFB_DEBUG_INFO("ivtvfb_get_fix\n");
32db7754 614 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
cebfadff 615 strlcpy(fix->id, "cx23415 TV out", sizeof(fix->id));
be383bd3
HV		 616 fix->smem_start = oi->video_pbase;
617 fix->smem_len = oi->video_buffer_size;
32db7754 618 fix->type = FB_TYPE_PACKED_PIXELS;
be383bd3 619 fix->visual = (oi->bits_per_pixel == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
32db7754
HV		 620 fix->xpanstep = 1;
621 fix->ypanstep = 1;
622 fix->ywrapstep = 0;
be383bd3 623 fix->line_length = oi->display_byte_stride;
32db7754
HV		 624 fix->accel = FB_ACCEL_NONE;
625 return 0;
626}
627
628/* Check the requested display mode, returning -EINVAL if we can't
629 handle it. */
630
631static int _ivtvfb_check_var(struct fb_var_screeninfo *var, struct ivtv *itv)
632{
be383bd3 633 struct osd_info *oi = itv->osd_info;
68a341a5
IA		 634 int osd_height_limit;
635 u32 pixclock, hlimit, vlimit;
32db7754 636
641ed49d 637 IVTVFB_DEBUG_INFO("ivtvfb_check_var\n");
32db7754 638
68a341a5
IA		 639 /* Set base references for mode calcs. */
640 if (itv->is_50hz) {
641 pixclock = 84316;
642 hlimit = 776;
643 vlimit = 591;
644 osd_height_limit = 576;
645 }
646 else {
647 pixclock = 83926;
648 hlimit = 776;
649 vlimit = 495;
650 osd_height_limit = 480;
651 }
652
32db7754
HV		 653 if (var->bits_per_pixel == 8 || var->bits_per_pixel == 32) {
654 var->transp.offset = 24;
655 var->transp.length = 8;
656 var->red.offset = 16;
657 var->red.length = 8;
658 var->green.offset = 8;
659 var->green.length = 8;
660 var->blue.offset = 0;
661 var->blue.length = 8;
662 }
663 else if (var->bits_per_pixel == 16) {
664 /* To find out the true mode, check green length */
665 switch (var->green.length) {
666 case 4:
32db7754
HV		 667 var->red.offset = 8;
668 var->red.length = 4;
669 var->green.offset = 4;
670 var->green.length = 4;
671 var->blue.offset = 0;
672 var->blue.length = 4;
459a52fa
HV		 673 var->transp.offset = 12;
674 var->transp.length = 1;
32db7754
HV		 675 break;
676 case 5:
32db7754
HV		 677 var->red.offset = 10;
678 var->red.length = 5;
679 var->green.offset = 5;
680 var->green.length = 5;
681 var->blue.offset = 0;
682 var->blue.length = 5;
459a52fa
HV		 683 var->transp.offset = 15;
684 var->transp.length = 1;
32db7754
HV		 685 break;
686 default:
32db7754
HV		 687 var->red.offset = 11;
688 var->red.length = 5;
689 var->green.offset = 5;
690 var->green.length = 6;
691 var->blue.offset = 0;
692 var->blue.length = 5;
459a52fa
HV		 693 var->transp.offset = 0;
694 var->transp.length = 0;
32db7754
HV		 695 break;
696 }
697 }
698 else {
641ed49d 699 IVTVFB_DEBUG_WARN("Invalid colour mode: %d\n", var->bits_per_pixel);
32db7754
HV		 700 return -EINVAL;
701 }
702
703 /* Check the resolution */
6b1ec9da
IA		 704 if (var->xres > IVTV_OSD_MAX_WIDTH || var->yres > osd_height_limit) {
705 IVTVFB_DEBUG_WARN("Invalid resolution: %dx%d\n",
706 var->xres, var->yres);
707 return -EINVAL;
32db7754 708 }
32db7754 709
6b1ec9da
IA		 710 /* Max horizontal size is 1023 @ 32bpp, 2046 & 16bpp, 4092 @ 8bpp */
711 if (var->xres_virtual > 4095 / (var->bits_per_pixel / 8) ||
712 var->xres_virtual * var->yres_virtual * (var->bits_per_pixel / 8) > oi->video_buffer_size ||
713 var->xres_virtual < var->xres ||
714 var->yres_virtual < var->yres) {
715 IVTVFB_DEBUG_WARN("Invalid virtual resolution: %dx%d\n",
716 var->xres_virtual, var->yres_virtual);
717 return -EINVAL;
32db7754
HV		 718 }
719
720 /* Some extra checks if in 8 bit mode */
721 if (var->bits_per_pixel == 8) {
722 /* Width must be a multiple of 4 */
723 if (var->xres & 3) {
641ed49d 724 IVTVFB_DEBUG_WARN("Invalid resolution for 8bpp: %d\n", var->xres);
32db7754
HV		 725 return -EINVAL;
726 }
727 if (var->xres_virtual & 3) {
641ed49d 728 IVTVFB_DEBUG_WARN("Invalid virtual resolution for 8bpp: %d)\n", var->xres_virtual);
32db7754
HV		 729 return -EINVAL;
730 }
731 }
732 else if (var->bits_per_pixel == 16) {
733 /* Width must be a multiple of 2 */
734 if (var->xres & 1) {
641ed49d 735 IVTVFB_DEBUG_WARN("Invalid resolution for 16bpp: %d\n", var->xres);
32db7754
HV		 736 return -EINVAL;
737 }
738 if (var->xres_virtual & 1) {
641ed49d 739 IVTVFB_DEBUG_WARN("Invalid virtual resolution for 16bpp: %d)\n", var->xres_virtual);
32db7754
HV		 740 return -EINVAL;
741 }
742 }
743
744 /* Now check the offsets */
745 if (var->xoffset >= var->xres_virtual || var->yoffset >= var->yres_virtual) {
641ed49d 746 IVTVFB_DEBUG_WARN("Invalid offset: %d (%d) %d (%d)\n",
be383bd3 747 var->xoffset, var->xres_virtual, var->yoffset, var->yres_virtual);
32db7754
HV		 748 return -EINVAL;
749 }
750
751 /* Check pixel format */
752 if (var->nonstd > 1) {
641ed49d 753 IVTVFB_DEBUG_WARN("Invalid nonstd % d\n", var->nonstd);
32db7754
HV		 754 return -EINVAL;
755 }
756
757 /* Check video mode */
758 if (((var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED) &&
759 ((var->vmode & FB_VMODE_MASK) != FB_VMODE_INTERLACED)) {
641ed49d 760 IVTVFB_DEBUG_WARN("Invalid video mode: %d\n", var->vmode & FB_VMODE_MASK);
32db7754
HV		 761 return -EINVAL;
762 }
763
764 /* Check the left & upper margins
765 If the margins are too large, just center the screen
766 (enforcing margins causes too many problems) */
767
768 if (var->left_margin + var->xres > IVTV_OSD_MAX_WIDTH + 1) {
769 var->left_margin = 1 + ((IVTV_OSD_MAX_WIDTH - var->xres) / 2);
770 }
771 if (var->upper_margin + var->yres > (itv->is_50hz ? 577 : 481)) {
772 var->upper_margin = 1 + (((itv->is_50hz ? 576 : 480) - var->yres) / 2);
773 }
774
775 /* Maintain overall 'size' for a constant refresh rate */
68a341a5
IA		 776 var->right_margin = hlimit - var->left_margin - var->xres;
777 var->lower_margin = vlimit - var->upper_margin - var->yres;
32db7754
HV		 778
779 /* Fixed sync times */
780 var->hsync_len = 24;
781 var->vsync_len = 2;
782
783 /* Non-interlaced / interlaced mode is used to switch the OSD filter
784 on or off. Adjust the clock timings to maintain a constant
785 vertical refresh rate. */
32db7754 786 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED)
68a341a5
IA		 787 var->pixclock = pixclock / 2;
788 else
789 var->pixclock = pixclock;
32db7754 790
37f89f95
HV		 791 itv->osd_rect.width = var->xres;
792 itv->osd_rect.height = var->yres;
793
641ed49d 794 IVTVFB_DEBUG_INFO("Display size: %dx%d (virtual %dx%d) @ %dbpp\n",
be383bd3
HV		 795 var->xres, var->yres,
796 var->xres_virtual, var->yres_virtual,
32db7754
HV		 797 var->bits_per_pixel);
798
641ed49d 799 IVTVFB_DEBUG_INFO("Display position: %d, %d\n",
be383bd3 800 var->left_margin, var->upper_margin);
32db7754 801
641ed49d 802 IVTVFB_DEBUG_INFO("Display filter: %s\n",
be383bd3 803 (var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED ? "on" : "off");
641ed49d 804 IVTVFB_DEBUG_INFO("Color space: %s\n", var->nonstd ? "YUV" : "RGB");
32db7754
HV		 805 return 0;
806}
807
808static int ivtvfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
809{
810 struct ivtv *itv = (struct ivtv *) info->par;
641ed49d 811 IVTVFB_DEBUG_INFO("ivtvfb_check_var\n");
be383bd3 812 return _ivtvfb_check_var(var, itv);
32db7754
HV		 813}
814
815static int ivtvfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
816{
817 u32 osd_pan_index;
818 struct ivtv *itv = (struct ivtv *) info->par;
819
820 osd_pan_index = (var->xoffset + (var->yoffset * var->xres_virtual))*var->bits_per_pixel/8;
be383bd3 821 write_reg(osd_pan_index, 0x02A0C);
32db7754
HV		 822
823 /* Pass this info back the yuv handler */
824 itv->yuv_info.osd_x_pan = var->xoffset;
825 itv->yuv_info.osd_y_pan = var->yoffset;
826 /* Force update of yuv registers */
827 itv->yuv_info.yuv_forced_update = 1;
828 return 0;
829}
830
831static int ivtvfb_set_par(struct fb_info *info)
832{
833 int rc = 0;
834 struct ivtv *itv = (struct ivtv *) info->par;
835
641ed49d 836 IVTVFB_DEBUG_INFO("ivtvfb_set_par\n");
32db7754
HV		 837
838 rc = ivtvfb_set_var(itv, &info->var);
839 ivtvfb_pan_display(&info->var, info);
be383bd3 840 ivtvfb_get_fix(itv, &info->fix);
32db7754
HV		 841 return rc;
842}
843
844static int ivtvfb_setcolreg(unsigned regno, unsigned red, unsigned green,
845 unsigned blue, unsigned transp,
846 struct fb_info *info)
847{
848 u32 color, *palette;
be383bd3 849 struct ivtv *itv = (struct ivtv *)info->par;
32db7754
HV		 850
851 if (regno >= info->cmap.len)
852 return -EINVAL;
853
854 color = ((transp & 0xFF00) << 16) |((red & 0xFF00) << 8) | (green & 0xFF00) | ((blue & 0xFF00) >> 8);
855 if (info->var.bits_per_pixel <= 8) {
856 write_reg(regno, 0x02a30);
857 write_reg(color, 0x02a34);
be383bd3 858 return 0;
32db7754 859 }
be383bd3
HV		 860 if (regno >= 16)
861 return -EINVAL;
32db7754 862
be383bd3
HV		 863 palette = info->pseudo_palette;
864 if (info->var.bits_per_pixel == 16) {
865 switch (info->var.green.length) {
866 case 4:
867 color = ((red & 0xf000) >> 4) |
868 ((green & 0xf000) >> 8) |
869 ((blue & 0xf000) >> 12);
870 break;
871 case 5:
872 color = ((red & 0xf800) >> 1) |
873 ((green & 0xf800) >> 6) |
874 ((blue & 0xf800) >> 11);
875 break;
876 case 6:
877 color = (red & 0xf800 ) |
878 ((green & 0xfc00) >> 5) |
879 ((blue & 0xf800) >> 11);
880 break;
32db7754 881 }
32db7754 882 }
be383bd3 883 palette[regno] = color;
32db7754
HV		 884 return 0;
885}
886
887/* We don't really support blanking. All this does is enable or
888 disable the OSD. */
889static int ivtvfb_blank(int blank_mode, struct fb_info *info)
890{
891 struct ivtv *itv = (struct ivtv *)info->par;
892
641ed49d 893 IVTVFB_DEBUG_INFO("Set blanking mode : %d\n", blank_mode);
32db7754
HV		 894 switch (blank_mode) {
895 case FB_BLANK_UNBLANK:
896 ivtv_vapi(itv, CX2341X_OSD_SET_STATE, 1, 1);
897 break;
898 case FB_BLANK_NORMAL:
899 case FB_BLANK_HSYNC_SUSPEND:
900 case FB_BLANK_VSYNC_SUSPEND:
901 case FB_BLANK_POWERDOWN:
902 ivtv_vapi(itv, CX2341X_OSD_SET_STATE, 1, 0);
903 break;
904 }
905 return 0;
906}
907
908static struct fb_ops ivtvfb_ops = {
909 .owner = THIS_MODULE,
4cbeb371 910 .fb_write = ivtvfb_write,
32db7754
HV		 911 .fb_check_var = ivtvfb_check_var,
912 .fb_set_par = ivtvfb_set_par,
913 .fb_setcolreg = ivtvfb_setcolreg,
914 .fb_fillrect = cfb_fillrect,
915 .fb_copyarea = cfb_copyarea,
916 .fb_imageblit = cfb_imageblit,
917 .fb_cursor = NULL,
918 .fb_ioctl = ivtvfb_ioctl,
919 .fb_pan_display = ivtvfb_pan_display,
920 .fb_blank = ivtvfb_blank,
921};
922
923/* Initialization */
924
925
926/* Setup our initial video mode */
927static int ivtvfb_init_vidmode(struct ivtv *itv)
928{
be383bd3 929 struct osd_info *oi = itv->osd_info;
32db7754 930 struct v4l2_rect start_window;
be383bd3 931 int max_height;
32db7754 932
32db7754
HV		 933 /* Color mode */
934
6b1ec9da
IA		 935 if (osd_depth != 8 && osd_depth != 16 && osd_depth != 32)
936 osd_depth = 8;
be383bd3
HV		 937 oi->bits_per_pixel = osd_depth;
938 oi->bytes_per_pixel = oi->bits_per_pixel / 8;
32db7754
HV		 939
940 /* Horizontal size & position */
941
6b1ec9da
IA		 942 if (osd_xres > 720)
943 osd_xres = 720;
32db7754
HV		 944
945 /* Must be a multiple of 4 for 8bpp & 2 for 16bpp */
946 if (osd_depth == 8)
947 osd_xres &= ~3;
948 else if (osd_depth == 16)
949 osd_xres &= ~1;
950
6b1ec9da 951 start_window.width = osd_xres ? osd_xres : 640;
32db7754
HV		 952
953 /* Check horizontal start (osd_left). */
954 if (osd_left && osd_left + start_window.width > 721) {
641ed49d 955 IVTVFB_ERR("Invalid osd_left - assuming default\n");
32db7754
HV		 956 osd_left = 0;
957 }
958
959 /* Hardware coords start at 0, user coords start at 1. */
be383bd3 960 osd_left--;
32db7754 961
be383bd3 962 start_window.left = osd_left >= 0 ? osd_left : ((IVTV_OSD_MAX_WIDTH - start_window.width) / 2);
32db7754 963
be383bd3
HV		 964 oi->display_byte_stride =
965 start_window.width * oi->bytes_per_pixel;
32db7754
HV		 966
967 /* Vertical size & position */
968
969 max_height = itv->is_50hz ? 576 : 480;
970
be383bd3
HV		 971 if (osd_yres > max_height)
972 osd_yres = max_height;
32db7754 973
6b1ec9da 974 start_window.height = osd_yres ? osd_yres : itv->is_50hz ? 480 : 400;
32db7754
HV		 975
976 /* Check vertical start (osd_upper). */
977 if (osd_upper + start_window.height > max_height + 1) {
641ed49d 978 IVTVFB_ERR("Invalid osd_upper - assuming default\n");
32db7754
HV		 979 osd_upper = 0;
980 }
981
982 /* Hardware coords start at 0, user coords start at 1. */
be383bd3 983 osd_upper--;
32db7754
HV		 984
985 start_window.top = osd_upper >= 0 ? osd_upper : ((max_height - start_window.height) / 2);
986
be383bd3
HV		 987 oi->display_width = start_window.width;
988 oi->display_height = start_window.height;
32db7754
HV		 989
990 /* Generate a valid fb_var_screeninfo */
991
be383bd3
HV		 992 oi->ivtvfb_defined.xres = oi->display_width;
993 oi->ivtvfb_defined.yres = oi->display_height;
994 oi->ivtvfb_defined.xres_virtual = oi->display_width;
995 oi->ivtvfb_defined.yres_virtual = oi->display_height;
996 oi->ivtvfb_defined.bits_per_pixel = oi->bits_per_pixel;
997 oi->ivtvfb_defined.vmode = (osd_laced ? FB_VMODE_INTERLACED : FB_VMODE_NONINTERLACED);
998 oi->ivtvfb_defined.left_margin = start_window.left + 1;
999 oi->ivtvfb_defined.upper_margin = start_window.top + 1;
1000 oi->ivtvfb_defined.accel_flags = FB_ACCEL_NONE;
1001 oi->ivtvfb_defined.nonstd = 0;
32db7754
HV		 1002
1003 /* We've filled in the most data, let the usual mode check
1004 routine fill in the rest. */
be383bd3 1005 _ivtvfb_check_var(&oi->ivtvfb_defined, itv);
32db7754
HV		 1006
1007 /* Generate valid fb_fix_screeninfo */
1008
be383bd3 1009 ivtvfb_get_fix(itv, &oi->ivtvfb_fix);
32db7754
HV		 1010
1011 /* Generate valid fb_info */
1012
be383bd3
HV		 1013 oi->ivtvfb_info.node = -1;
1014 oi->ivtvfb_info.flags = FBINFO_FLAG_DEFAULT;
1015 oi->ivtvfb_info.fbops = &ivtvfb_ops;
1016 oi->ivtvfb_info.par = itv;
1017 oi->ivtvfb_info.var = oi->ivtvfb_defined;
1018 oi->ivtvfb_info.fix = oi->ivtvfb_fix;
1019 oi->ivtvfb_info.screen_base = (u8 __iomem *)oi->video_vbase;
1020 oi->ivtvfb_info.fbops = &ivtvfb_ops;
32db7754
HV		 1021
1022 /* Supply some monitor specs. Bogus values will do for now */
be383bd3
HV		 1023 oi->ivtvfb_info.monspecs.hfmin = 8000;
1024 oi->ivtvfb_info.monspecs.hfmax = 70000;
1025 oi->ivtvfb_info.monspecs.vfmin = 10;
1026 oi->ivtvfb_info.monspecs.vfmax = 100;
32db7754
HV		 1027
1028 /* Allocate color map */
be383bd3 1029 if (fb_alloc_cmap(&oi->ivtvfb_info.cmap, 256, 1)) {
641ed49d 1030 IVTVFB_ERR("abort, unable to alloc cmap\n");
32db7754
HV		 1031 return -ENOMEM;
1032 }
1033
1034 /* Allocate the pseudo palette */
3f98387e
HV		 1035 oi->ivtvfb_info.pseudo_palette =
1036 kmalloc(sizeof(u32) * 16, GFP_KERNEL|__GFP_NOWARN);
32db7754 1037
be383bd3 1038 if (!oi->ivtvfb_info.pseudo_palette) {
641ed49d 1039 IVTVFB_ERR("abort, unable to alloc pseudo pallete\n");
32db7754
HV		 1040 return -ENOMEM;
1041 }
1042
1043 return 0;
1044}
1045
1046/* Find OSD buffer base & size. Add to mtrr. Zero osd buffer. */
1047
1048static int ivtvfb_init_io(struct ivtv *itv)
1049{
be383bd3
HV		 1050 struct osd_info *oi = itv->osd_info;
1051
26e9d599 1052 mutex_lock(&itv->serialize_lock);
6e5eb591 1053 if (ivtv_init_on_first_open(itv)) {
26e9d599 1054 mutex_unlock(&itv->serialize_lock);
641ed49d 1055 IVTVFB_ERR("Failed to initialize ivtv\n");
6e5eb591
HV		 1056 return -ENXIO;
1057 }
26e9d599 1058 mutex_unlock(&itv->serialize_lock);
6e5eb591 1059
641ed49d 1060 ivtvfb_get_framebuffer(itv, &oi->video_rbase, &oi->video_buffer_size);
32db7754
HV		 1061
1062 /* The osd buffer size depends on the number of video buffers allocated
1063 on the PVR350 itself. For now we'll hardcode the smallest osd buffer
1064 size to prevent any overlap. */
be383bd3 1065 oi->video_buffer_size = 1704960;
32db7754 1066
be383bd3
HV		 1067 oi->video_pbase = itv->base_addr + IVTV_DECODER_OFFSET + oi->video_rbase;
1068 oi->video_vbase = itv->dec_mem + oi->video_rbase;
32db7754 1069
be383bd3 1070 if (!oi->video_vbase) {
641ed49d 1071 IVTVFB_ERR("abort, video memory 0x%x @ 0x%lx isn't mapped!\n",
be383bd3 1072 oi->video_buffer_size, oi->video_pbase);
32db7754
HV		 1073 return -EIO;
1074 }
1075
641ed49d 1076 IVTVFB_INFO("Framebuffer at 0x%lx, mapped to 0x%p, size %dk\n",
be383bd3
HV		 1077 oi->video_pbase, oi->video_vbase,
1078 oi->video_buffer_size / 1024);
32db7754
HV		 1079
1080#ifdef CONFIG_MTRR
1081 {
1082 /* Find the largest power of two that maps the whole buffer */
1083 int size_shift = 31;
1084
be383bd3 1085 while (!(oi->video_buffer_size & (1 << size_shift))) {
32db7754
HV		 1086 size_shift--;
1087 }
1088 size_shift++;
be383bd3
HV		 1089 oi->fb_start_aligned_physaddr = oi->video_pbase & ~((1 << size_shift) - 1);
1090 oi->fb_end_aligned_physaddr = oi->video_pbase + oi->video_buffer_size;
1091 oi->fb_end_aligned_physaddr += (1 << size_shift) - 1;
1092 oi->fb_end_aligned_physaddr &= ~((1 << size_shift) - 1);
1093 if (mtrr_add(oi->fb_start_aligned_physaddr,
1094 oi->fb_end_aligned_physaddr - oi->fb_start_aligned_physaddr,
32db7754 1095 MTRR_TYPE_WRCOMB, 1) < 0) {
641ed49d 1096 IVTVFB_INFO("disabled mttr\n");
be383bd3
HV		 1097 oi->fb_start_aligned_physaddr = 0;
1098 oi->fb_end_aligned_physaddr = 0;
32db7754
HV		 1099 }
1100 }
be383bd3 1101#endif
32db7754
HV		 1102
1103 /* Blank the entire osd. */
be383bd3 1104 memset_io(oi->video_vbase, 0, oi->video_buffer_size);
32db7754
HV		 1105
1106 return 0;
1107}
1108
1109/* Release any memory we've grabbed & remove mtrr entry */
1110static void ivtvfb_release_buffers (struct ivtv *itv)
1111{
be383bd3
HV		 1112 struct osd_info *oi = itv->osd_info;
1113
32db7754 1114 /* Release cmap */
13628032
AB		 1115 if (oi->ivtvfb_info.cmap.len)
1116 fb_dealloc_cmap(&oi->ivtvfb_info.cmap);
32db7754
HV		 1117
1118 /* Release pseudo palette */
be383bd3
HV		 1119 if (oi->ivtvfb_info.pseudo_palette)
1120 kfree(oi->ivtvfb_info.pseudo_palette);
32db7754
HV		 1121
1122#ifdef CONFIG_MTRR
be383bd3
HV		 1123 if (oi->fb_end_aligned_physaddr) {
1124 mtrr_del(-1, oi->fb_start_aligned_physaddr,
1125 oi->fb_end_aligned_physaddr - oi->fb_start_aligned_physaddr);
1126 }
1127#endif
32db7754 1128
be383bd3 1129 kfree(oi);
32db7754
HV		 1130 itv->osd_info = NULL;
1131}
1132
1133/* Initialize the specified card */
1134
be383bd3 1135static int ivtvfb_init_card(struct ivtv *itv)
32db7754
HV		 1136{
1137 int rc;
1138
1139 if (itv->osd_info) {
641ed49d 1140 IVTVFB_ERR("Card %d already initialised\n", ivtvfb_card_id);
32db7754
HV		 1141 return -EBUSY;
1142 }
1143
3f98387e
HV		 1144 itv->osd_info = kzalloc(sizeof(struct osd_info),
1145 GFP_ATOMIC|__GFP_NOWARN);
14d5deba 1146 if (itv->osd_info == NULL) {
641ed49d 1147 IVTVFB_ERR("Failed to allocate memory for osd_info\n");
32db7754
HV		 1148 return -ENOMEM;
1149 }
1150
1151 /* Find & setup the OSD buffer */
be383bd3 1152 if ((rc = ivtvfb_init_io(itv)))
32db7754
HV		 1153 return rc;
1154
1155 /* Set the startup video mode information */
be383bd3 1156 if ((rc = ivtvfb_init_vidmode(itv))) {
32db7754
HV		 1157 ivtvfb_release_buffers(itv);
1158 return rc;
1159 }
1160
1161 /* Register the framebuffer */
1162 if (register_framebuffer(&itv->osd_info->ivtvfb_info) < 0) {
1163 ivtvfb_release_buffers(itv);
1164 return -EINVAL;
1165 }
1166
1167 itv->osd_video_pbase = itv->osd_info->video_pbase;
1168
1169 /* Set the card to the requested mode */
1170 ivtvfb_set_par(&itv->osd_info->ivtvfb_info);
1171
1172 /* Set color 0 to black */
1173 write_reg(0, 0x02a30);
1174 write_reg(0, 0x02a34);
1175
1176 /* Enable the osd */
1177 ivtvfb_blank(FB_BLANK_UNBLANK, &itv->osd_info->ivtvfb_info);
1178
32db7754
HV		 1179 /* Allocate DMA */
1180 ivtv_udma_alloc(itv);
1181 return 0;
1182
1183}
1184
1185static int __init ivtvfb_init(void)
1186{
1187 struct ivtv *itv;
1188 int i, registered = 0;
1189
641ed49d
HV		 1190 if (ivtvfb_card_id < -1 || ivtvfb_card_id >= IVTV_MAX_CARDS) {
1191 printk(KERN_ERR "ivtvfb: ivtvfb_card_id parameter is out of range (valid range: -1 - %d)\n",
32db7754
HV		 1192 IVTV_MAX_CARDS - 1);
1193 return -EINVAL;
1194 }
1195
1196 /* Locate & initialise all cards supporting an OSD. */
1197 for (i = 0; i < ivtv_cards_active; i++) {
641ed49d 1198 if (ivtvfb_card_id != -1 && i != ivtvfb_card_id)
32db7754
HV		 1199 continue;
1200 itv = ivtv_cards[i];
1201 if (itv && (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT)) {
1202 if (ivtvfb_init_card(itv) == 0) {
641ed49d 1203 IVTVFB_INFO("Framebuffer registered on ivtv card id %d\n", i);
32db7754
HV		 1204 registered++;
1205 }
1206 }
1207 }
1208 if (!registered) {
7b3a0d49 1209 printk(KERN_ERR "ivtvfb: no cards found");
32db7754
HV		 1210 return -ENODEV;
1211 }
1212 return 0;
1213}
1214
1215static void ivtvfb_cleanup(void)
1216{
1217 struct ivtv *itv;
1218 int i;
1219
7b3a0d49 1220 printk(KERN_INFO "ivtvfb: Unloading framebuffer module\n");
32db7754
HV		 1221
1222 for (i = 0; i < ivtv_cards_active; i++) {
1223 itv = ivtv_cards[i];
1224 if (itv && (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT) && itv->osd_info) {
d343d7f9
HV		 1225 if (unregister_framebuffer(&itv->osd_info->ivtvfb_info)) {
1226 IVTVFB_WARN("Framebuffer %d is in use, cannot unload\n", i);
1227 return;
1228 }
641ed49d 1229 IVTVFB_DEBUG_INFO("Unregister framebuffer %d\n", i);
32db7754 1230 ivtvfb_blank(FB_BLANK_POWERDOWN, &itv->osd_info->ivtvfb_info);
32db7754
HV		 1231 ivtvfb_release_buffers(itv);
1232 itv->osd_video_pbase = 0;
1233 }
1234 }
1235}
1236
1237module_init(ivtvfb_init);
1238module_exit(ivtvfb_cleanup);
kernel source for telekom puls (alcatel/mediatek)