Commit | Line | Data |
---|---|---|
a6c2ba28 | 1 | /* |
0e7072ef | 2 | em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices |
a6c2ba28 AM |
3 | |
4 | Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com> | |
4ac97914 | 5 | Ludovico Cavedon <cavedon@sssup.it> |
2e7c6dc3 | 6 | Mauro Carvalho Chehab <mchehab@infradead.org> |
a6c2ba28 AM |
7 | |
8 | Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de> | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2 of the License, or | |
13 | (at your option) any later version. | |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with this program; if not, write to the Free Software | |
22 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
3acf2809 MCC |
25 | #ifndef _EM28XX_H |
26 | #define _EM28XX_H | |
a6c2ba28 | 27 | |
cb77d010 | 28 | #include <linux/videodev2.h> |
ad0ebb96 | 29 | #include <media/videobuf-vmalloc.h> |
f2cf250a | 30 | #include <media/v4l2-device.h> |
ad0ebb96 | 31 | |
a6c2ba28 | 32 | #include <linux/i2c.h> |
3593cab5 | 33 | #include <linux/mutex.h> |
d5e52653 | 34 | #include <media/ir-kbd-i2c.h> |
3aefb79a MCC |
35 | #if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE) |
36 | #include <media/videobuf-dvb.h> | |
37 | #endif | |
3ca9c093 | 38 | #include "tuner-xc2028.h" |
2ba890ec | 39 | #include "em28xx-reg.h" |
3aefb79a MCC |
40 | |
41 | /* Boards supported by driver */ | |
42 | #define EM2800_BOARD_UNKNOWN 0 | |
43 | #define EM2820_BOARD_UNKNOWN 1 | |
44 | #define EM2820_BOARD_TERRATEC_CINERGY_250 2 | |
45 | #define EM2820_BOARD_PINNACLE_USB_2 3 | |
46 | #define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4 | |
47 | #define EM2820_BOARD_MSI_VOX_USB_2 5 | |
48 | #define EM2800_BOARD_TERRATEC_CINERGY_200 6 | |
49 | #define EM2800_BOARD_LEADTEK_WINFAST_USBII 7 | |
50 | #define EM2800_BOARD_KWORLD_USB2800 8 | |
51 | #define EM2820_BOARD_PINNACLE_DVC_90 9 | |
52 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10 | |
53 | #define EM2880_BOARD_TERRATEC_HYBRID_XS 11 | |
54 | #define EM2820_BOARD_KWORLD_PVRTV2800RF 12 | |
55 | #define EM2880_BOARD_TERRATEC_PRODIGY_XS 13 | |
56 | #define EM2820_BOARD_PROLINK_PLAYTV_USB2 14 | |
57 | #define EM2800_BOARD_VGEAR_POCKETTV 15 | |
10ac6603 | 58 | #define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16 |
4fd305b2 | 59 | #define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17 |
17d9d558 | 60 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18 |
3ed58baf | 61 | #define EM2860_BOARD_SAA711X_REFERENCE_DESIGN 19 |
e14b3658 | 62 | #define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20 |
59d07f1b | 63 | #define EM2800_BOARD_GRABBEEX_USB2800 21 |
95b86a9a DSL |
64 | #define EM2750_BOARD_UNKNOWN 22 |
65 | #define EM2750_BOARD_DLCW_130 23 | |
66 | #define EM2820_BOARD_DLINK_USB_TV 24 | |
67 | #define EM2820_BOARD_GADMEI_UTV310 25 | |
68 | #define EM2820_BOARD_HERCULES_SMART_TV_USB2 26 | |
69 | #define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27 | |
70 | #define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28 | |
95b86a9a DSL |
71 | #define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30 |
72 | #define EM2821_BOARD_USBGEAR_VD204 31 | |
73 | #define EM2821_BOARD_SUPERCOMP_USB_2 32 | |
95b86a9a DSL |
74 | #define EM2860_BOARD_TERRATEC_HYBRID_XS 34 |
75 | #define EM2860_BOARD_TYPHOON_DVD_MAKER 35 | |
76 | #define EM2860_BOARD_NETGMBH_CAM 36 | |
77 | #define EM2860_BOARD_GADMEI_UTV330 37 | |
78 | #define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38 | |
79 | #define EM2861_BOARD_KWORLD_PVRTV_300U 39 | |
80 | #define EM2861_BOARD_PLEXTOR_PX_TV100U 40 | |
81 | #define EM2870_BOARD_KWORLD_350U 41 | |
82 | #define EM2870_BOARD_KWORLD_355U 42 | |
83 | #define EM2870_BOARD_TERRATEC_XS 43 | |
84 | #define EM2870_BOARD_TERRATEC_XS_MT2060 44 | |
85 | #define EM2870_BOARD_PINNACLE_PCTV_DVB 45 | |
86 | #define EM2870_BOARD_COMPRO_VIDEOMATE 46 | |
87 | #define EM2880_BOARD_KWORLD_DVB_305U 47 | |
88 | #define EM2880_BOARD_KWORLD_DVB_310U 48 | |
89 | #define EM2880_BOARD_MSI_DIGIVOX_AD 49 | |
90 | #define EM2880_BOARD_MSI_DIGIVOX_AD_II 50 | |
91 | #define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51 | |
92 | #define EM2881_BOARD_DNT_DA2_HYBRID 52 | |
93 | #define EM2881_BOARD_PINNACLE_HYBRID_PRO 53 | |
94 | #define EM2882_BOARD_KWORLD_VS_DVBT 54 | |
95 | #define EM2882_BOARD_TERRATEC_HYBRID_XS 55 | |
96 | #define EM2882_BOARD_PINNACLE_HYBRID_PRO 56 | |
6e7b9ea0 | 97 | #define EM2883_BOARD_KWORLD_HYBRID_330U 57 |
ee281b85 | 98 | #define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58 |
f89bc329 | 99 | #define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60 |
1e1addd5 | 100 | #define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61 |
f7fe3e6f | 101 | #define EM2820_BOARD_GADMEI_TVR200 62 |
56ee3807 MCC |
102 | #define EM2860_BOARD_KAIOMY_TVNPC_U2 63 |
103 | #define EM2860_BOARD_EASYCAP 64 | |
f74a61e3 | 104 | #define EM2820_BOARD_IODATA_GVMVP_SZ 65 |
e5db5d44 | 105 | #define EM2880_BOARD_EMPIRE_DUAL_TV 66 |
4557af9c | 106 | #define EM2860_BOARD_TERRATEC_GRABBY 67 |
766ed64d | 107 | #define EM2860_BOARD_TERRATEC_AV350 68 |
d7de5d8f | 108 | #define EM2882_BOARD_KWORLD_ATSC_315U 69 |
3aefb79a MCC |
109 | |
110 | /* Limits minimum and default number of buffers */ | |
111 | #define EM28XX_MIN_BUF 4 | |
112 | #define EM28XX_DEF_BUF 8 | |
a6c2ba28 | 113 | |
c4a98793 MCC |
114 | /*Limits the max URB message size */ |
115 | #define URB_MAX_CTRL_SIZE 80 | |
116 | ||
95b86a9a DSL |
117 | /* Params for validated field */ |
118 | #define EM28XX_BOARD_NOT_VALIDATED 1 | |
119 | #define EM28XX_BOARD_VALIDATED 0 | |
120 | ||
22cff7b3 DSL |
121 | /* Params for em28xx_cmd() audio */ |
122 | #define EM28XX_START_AUDIO 1 | |
123 | #define EM28XX_STOP_AUDIO 0 | |
124 | ||
596d92d5 | 125 | /* maximum number of em28xx boards */ |
3687e1e6 | 126 | #define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */ |
596d92d5 | 127 | |
a6c2ba28 | 128 | /* maximum number of frames that can be queued */ |
3acf2809 | 129 | #define EM28XX_NUM_FRAMES 5 |
a6c2ba28 | 130 | /* number of frames that get used for v4l2_read() */ |
3acf2809 | 131 | #define EM28XX_NUM_READ_FRAMES 2 |
a6c2ba28 AM |
132 | |
133 | /* number of buffers for isoc transfers */ | |
3acf2809 | 134 | #define EM28XX_NUM_BUFS 5 |
a6c2ba28 | 135 | |
d5e52653 MCC |
136 | /* number of packets for each buffer |
137 | windows requests only 40 packets .. so we better do the same | |
138 | this is what I found out for all alternate numbers there! | |
139 | */ | |
3acf2809 | 140 | #define EM28XX_NUM_PACKETS 40 |
a6c2ba28 | 141 | |
a6c2ba28 | 142 | /* default alternate; 0 means choose the best */ |
3acf2809 | 143 | #define EM28XX_PINOUT 0 |
a6c2ba28 | 144 | |
3acf2809 | 145 | #define EM28XX_INTERLACED_DEFAULT 1 |
a6c2ba28 AM |
146 | |
147 | /* | |
148 | #define (use usbview if you want to get the other alternate number infos) | |
149 | #define | |
150 | #define alternate number 2 | |
151 | #define Endpoint Address: 82 | |
152 | Direction: in | |
153 | Attribute: 1 | |
154 | Type: Isoc | |
155 | Max Packet Size: 1448 | |
156 | Interval: 125us | |
157 | ||
158 | alternate number 7 | |
159 | ||
160 | Endpoint Address: 82 | |
161 | Direction: in | |
162 | Attribute: 1 | |
163 | Type: Isoc | |
164 | Max Packet Size: 3072 | |
165 | Interval: 125us | |
166 | */ | |
167 | ||
168 | /* time to wait when stopping the isoc transfer */ | |
a1a6ee74 NS |
169 | #define EM28XX_URB_TIMEOUT \ |
170 | msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS) | |
a6c2ba28 | 171 | |
596d92d5 MCC |
172 | /* time in msecs to wait for i2c writes to finish */ |
173 | #define EM2800_I2C_WRITE_TIMEOUT 20 | |
174 | ||
3aefb79a | 175 | enum em28xx_mode { |
2fe3e2ee | 176 | EM28XX_SUSPEND, |
3aefb79a MCC |
177 | EM28XX_ANALOG_MODE, |
178 | EM28XX_DIGITAL_MODE, | |
179 | }; | |
180 | ||
3acf2809 | 181 | enum em28xx_stream_state { |
a6c2ba28 AM |
182 | STREAM_OFF, |
183 | STREAM_INTERRUPT, | |
184 | STREAM_ON, | |
185 | }; | |
186 | ||
579f72e4 AT |
187 | struct em28xx; |
188 | ||
ad0ebb96 MCC |
189 | struct em28xx_usb_isoc_ctl { |
190 | /* max packet size of isoc transaction */ | |
191 | int max_pkt_size; | |
192 | ||
193 | /* number of allocated urbs */ | |
194 | int num_bufs; | |
195 | ||
196 | /* urb for isoc transfers */ | |
197 | struct urb **urb; | |
198 | ||
199 | /* transfer buffers for isoc transfer */ | |
200 | char **transfer_buffer; | |
201 | ||
202 | /* Last buffer command and region */ | |
203 | u8 cmd; | |
204 | int pos, size, pktsize; | |
205 | ||
206 | /* Last field: ODD or EVEN? */ | |
207 | int field; | |
208 | ||
209 | /* Stores incomplete commands */ | |
210 | u32 tmp_buf; | |
211 | int tmp_buf_len; | |
212 | ||
213 | /* Stores already requested buffers */ | |
214 | struct em28xx_buffer *buf; | |
215 | ||
216 | /* Stores the number of received fields */ | |
217 | int nfields; | |
579f72e4 AT |
218 | |
219 | /* isoc urb callback */ | |
220 | int (*isoc_copy) (struct em28xx *dev, struct urb *urb); | |
221 | ||
ad0ebb96 MCC |
222 | }; |
223 | ||
bddcf633 | 224 | /* Struct to enumberate video formats */ |
ad0ebb96 MCC |
225 | struct em28xx_fmt { |
226 | char *name; | |
227 | u32 fourcc; /* v4l2 format id */ | |
bddcf633 MCC |
228 | int depth; |
229 | int reg; | |
ad0ebb96 MCC |
230 | }; |
231 | ||
232 | /* buffer for one video frame */ | |
233 | struct em28xx_buffer { | |
234 | /* common v4l buffer stuff -- must be first */ | |
235 | struct videobuf_buffer vb; | |
236 | ||
a6c2ba28 | 237 | struct list_head frame; |
a6c2ba28 | 238 | int top_field; |
ad0ebb96 MCC |
239 | int receiving; |
240 | }; | |
241 | ||
242 | struct em28xx_dmaqueue { | |
243 | struct list_head active; | |
244 | struct list_head queued; | |
ad0ebb96 MCC |
245 | |
246 | wait_queue_head_t wq; | |
247 | ||
248 | /* Counters to control buffer fill */ | |
249 | int pos; | |
a6c2ba28 AM |
250 | }; |
251 | ||
252 | /* io methods */ | |
3acf2809 | 253 | enum em28xx_io_method { |
a6c2ba28 AM |
254 | IO_NONE, |
255 | IO_READ, | |
256 | IO_MMAP, | |
257 | }; | |
258 | ||
259 | /* inputs */ | |
260 | ||
3acf2809 MCC |
261 | #define MAX_EM28XX_INPUT 4 |
262 | enum enum28xx_itype { | |
263 | EM28XX_VMUX_COMPOSITE1 = 1, | |
264 | EM28XX_VMUX_COMPOSITE2, | |
265 | EM28XX_VMUX_COMPOSITE3, | |
266 | EM28XX_VMUX_COMPOSITE4, | |
267 | EM28XX_VMUX_SVIDEO, | |
268 | EM28XX_VMUX_TELEVISION, | |
269 | EM28XX_VMUX_CABLE, | |
270 | EM28XX_VMUX_DVB, | |
271 | EM28XX_VMUX_DEBUG, | |
272 | EM28XX_RADIO, | |
a6c2ba28 AM |
273 | }; |
274 | ||
35643943 MCC |
275 | enum em28xx_ac97_mode { |
276 | EM28XX_NO_AC97 = 0, | |
277 | EM28XX_AC97_EM202, | |
209acc02 | 278 | EM28XX_AC97_SIGMATEL, |
35643943 MCC |
279 | EM28XX_AC97_OTHER, |
280 | }; | |
281 | ||
282 | struct em28xx_audio_mode { | |
283 | enum em28xx_ac97_mode ac97; | |
284 | ||
285 | u16 ac97_feat; | |
16c7bcad | 286 | u32 ac97_vendor_id; |
35643943 MCC |
287 | |
288 | unsigned int has_audio:1; | |
289 | ||
290 | unsigned int i2s_3rates:1; | |
291 | unsigned int i2s_5rates:1; | |
5c2231c8 DH |
292 | }; |
293 | ||
5faff789 MCC |
294 | /* em28xx has two audio inputs: tuner and line in. |
295 | However, on most devices, an auxiliary AC97 codec device is used. | |
296 | The AC97 device may have several different inputs and outputs, | |
297 | depending on their model. So, it is possible to use AC97 mixer to | |
298 | address more than two different entries. | |
299 | */ | |
539c96d0 | 300 | enum em28xx_amux { |
5faff789 MCC |
301 | /* This is the only entry for em28xx tuner input */ |
302 | EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */ | |
303 | ||
304 | EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */ | |
305 | ||
306 | /* Some less-common mixer setups */ | |
307 | EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */ | |
308 | EM28XX_AMUX_PHONE, | |
309 | EM28XX_AMUX_MIC, | |
310 | EM28XX_AMUX_CD, | |
311 | EM28XX_AMUX_AUX, | |
312 | EM28XX_AMUX_PCM_OUT, | |
539c96d0 MCC |
313 | }; |
314 | ||
35ae6f04 | 315 | enum em28xx_aout { |
8866f9cf | 316 | /* AC97 outputs */ |
e879b8eb MCC |
317 | EM28XX_AOUT_MASTER = 1 << 0, |
318 | EM28XX_AOUT_LINE = 1 << 1, | |
319 | EM28XX_AOUT_MONO = 1 << 2, | |
320 | EM28XX_AOUT_LFE = 1 << 3, | |
321 | EM28XX_AOUT_SURR = 1 << 4, | |
8866f9cf MCC |
322 | |
323 | /* PCM IN Mixer - used by AC97_RECORD_SELECT register */ | |
324 | EM28XX_AOUT_PCM_IN = 1 << 7, | |
325 | ||
326 | /* Bits 10-8 are used to indicate the PCM IN record select */ | |
327 | EM28XX_AOUT_PCM_MIC_PCM = 0 << 8, | |
328 | EM28XX_AOUT_PCM_CD = 1 << 8, | |
329 | EM28XX_AOUT_PCM_VIDEO = 2 << 8, | |
330 | EM28XX_AOUT_PCM_AUX = 3 << 8, | |
331 | EM28XX_AOUT_PCM_LINE = 4 << 8, | |
332 | EM28XX_AOUT_PCM_STEREO = 5 << 8, | |
333 | EM28XX_AOUT_PCM_MONO = 6 << 8, | |
334 | EM28XX_AOUT_PCM_PHONE = 7 << 8, | |
35ae6f04 MCC |
335 | }; |
336 | ||
32929fb4 | 337 | static inline int ac97_return_record_select(int a_out) |
8866f9cf MCC |
338 | { |
339 | return (a_out & 0x700) >> 8; | |
340 | } | |
341 | ||
122b77e5 MCC |
342 | struct em28xx_reg_seq { |
343 | int reg; | |
344 | unsigned char val, mask; | |
345 | int sleep; | |
346 | }; | |
347 | ||
3acf2809 MCC |
348 | struct em28xx_input { |
349 | enum enum28xx_itype type; | |
a6c2ba28 | 350 | unsigned int vmux; |
539c96d0 | 351 | enum em28xx_amux amux; |
35ae6f04 | 352 | enum em28xx_aout aout; |
122b77e5 | 353 | struct em28xx_reg_seq *gpio; |
a6c2ba28 AM |
354 | }; |
355 | ||
3acf2809 | 356 | #define INPUT(nr) (&em28xx_boards[dev->model].input[nr]) |
a6c2ba28 | 357 | |
3acf2809 | 358 | enum em28xx_decoder { |
1ed1dd54 | 359 | EM28XX_NODECODER, |
3acf2809 | 360 | EM28XX_TVP5150, |
ec5de990 | 361 | EM28XX_SAA711X, |
a6c2ba28 AM |
362 | }; |
363 | ||
df7fa09c MCC |
364 | enum em28xx_adecoder { |
365 | EM28XX_NOADECODER = 0, | |
366 | EM28XX_TVAUDIO, | |
367 | }; | |
368 | ||
3acf2809 | 369 | struct em28xx_board { |
a6c2ba28 | 370 | char *name; |
505b6d0b | 371 | int vchannels; |
a6c2ba28 | 372 | int tuner_type; |
66767920 | 373 | int tuner_addr; |
a6c2ba28 AM |
374 | |
375 | /* i2c flags */ | |
376 | unsigned int tda9887_conf; | |
377 | ||
017ab4b1 | 378 | /* GPIO sequences */ |
122b77e5 | 379 | struct em28xx_reg_seq *dvb_gpio; |
2fe3e2ee | 380 | struct em28xx_reg_seq *suspend_gpio; |
017ab4b1 | 381 | struct em28xx_reg_seq *tuner_gpio; |
2bd1d9eb | 382 | struct em28xx_reg_seq *mute_gpio; |
122b77e5 | 383 | |
74f38a82 | 384 | unsigned int is_em2800:1; |
a6c2ba28 | 385 | unsigned int has_msp34xx:1; |
5add9a6f | 386 | unsigned int mts_firmware:1; |
c8793b03 | 387 | unsigned int max_range_640_480:1; |
3aefb79a | 388 | unsigned int has_dvb:1; |
a9fc52bc | 389 | unsigned int has_snapshot_button:1; |
95b86a9a | 390 | unsigned int valid:1; |
3abee53e | 391 | |
a2070c66 | 392 | unsigned char xclk, i2c_speed; |
f2cf250a DSL |
393 | unsigned char radio_addr; |
394 | unsigned short tvaudio_addr; | |
a2070c66 | 395 | |
3acf2809 | 396 | enum em28xx_decoder decoder; |
df7fa09c | 397 | enum em28xx_adecoder adecoder; |
a6c2ba28 | 398 | |
3acf2809 | 399 | struct em28xx_input input[MAX_EM28XX_INPUT]; |
0be43754 | 400 | struct em28xx_input radio; |
4b92253a | 401 | IR_KEYTAB_TYPE *ir_codes; |
a6c2ba28 AM |
402 | }; |
403 | ||
3acf2809 | 404 | struct em28xx_eeprom { |
a6c2ba28 AM |
405 | u32 id; /* 0x9567eb1a */ |
406 | u16 vendor_ID; | |
407 | u16 product_ID; | |
408 | ||
409 | u16 chip_conf; | |
410 | ||
411 | u16 board_conf; | |
412 | ||
413 | u16 string1, string2, string3; | |
414 | ||
415 | u8 string_idx_table; | |
416 | }; | |
417 | ||
418 | /* device states */ | |
3acf2809 | 419 | enum em28xx_dev_state { |
a6c2ba28 AM |
420 | DEV_INITIALIZED = 0x01, |
421 | DEV_DISCONNECTED = 0x02, | |
422 | DEV_MISCONFIGURED = 0x04, | |
423 | }; | |
424 | ||
6d79468d MCC |
425 | #define EM28XX_AUDIO_BUFS 5 |
426 | #define EM28XX_NUM_AUDIO_PACKETS 64 | |
427 | #define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */ | |
428 | #define EM28XX_CAPTURE_STREAM_EN 1 | |
3aefb79a MCC |
429 | |
430 | /* em28xx extensions */ | |
6d79468d | 431 | #define EM28XX_AUDIO 0x10 |
3aefb79a | 432 | #define EM28XX_DVB 0x20 |
6d79468d MCC |
433 | |
434 | struct em28xx_audio { | |
435 | char name[50]; | |
436 | char *transfer_buffer[EM28XX_AUDIO_BUFS]; | |
437 | struct urb *urb[EM28XX_AUDIO_BUFS]; | |
438 | struct usb_device *udev; | |
439 | unsigned int capture_transfer_done; | |
440 | struct snd_pcm_substream *capture_pcm_substream; | |
441 | ||
442 | unsigned int hwptr_done_capture; | |
443 | struct snd_card *sndcard; | |
444 | ||
c744dff2 | 445 | int users; |
6d79468d MCC |
446 | enum em28xx_stream_state capture_stream; |
447 | spinlock_t slock; | |
448 | }; | |
449 | ||
52284c3e MCC |
450 | struct em28xx; |
451 | ||
452 | struct em28xx_fh { | |
453 | struct em28xx *dev; | |
454 | unsigned int stream_on:1; /* Locks streams */ | |
455 | int radio; | |
456 | ||
457 | struct videobuf_queue vb_vidq; | |
458 | ||
459 | enum v4l2_buf_type type; | |
460 | }; | |
461 | ||
a6c2ba28 | 462 | /* main device struct */ |
3acf2809 | 463 | struct em28xx { |
a6c2ba28 AM |
464 | /* generic device properties */ |
465 | char name[30]; /* name (including minor) of the device */ | |
466 | int model; /* index in the device_data struct */ | |
e5589bef | 467 | int devno; /* marks the number of this device */ |
600bd7f0 | 468 | enum em28xx_chip_id chip_id; |
505b6d0b | 469 | |
f2cf250a | 470 | struct v4l2_device v4l2_dev; |
505b6d0b MCC |
471 | struct em28xx_board board; |
472 | ||
a225452e | 473 | unsigned int stream_on:1; /* Locks streams */ |
d7448a8d | 474 | unsigned int has_audio_class:1; |
24a613e4 | 475 | unsigned int has_alsa_audio:1; |
a2070c66 | 476 | |
bddcf633 MCC |
477 | struct em28xx_fmt *format; |
478 | ||
a924a499 MCC |
479 | struct em28xx_IR *ir; |
480 | ||
89b329ef MCC |
481 | /* Some older em28xx chips needs a waiting time after writing */ |
482 | unsigned int wait_after_write; | |
483 | ||
74f38a82 MCC |
484 | struct list_head devlist; |
485 | ||
9bb13a6d MCC |
486 | u32 i2s_speed; /* I2S speed for audio digital stream */ |
487 | ||
35643943 | 488 | struct em28xx_audio_mode audio_mode; |
a6c2ba28 AM |
489 | |
490 | int tuner_type; /* type of the tuner */ | |
491 | int tuner_addr; /* tuner address */ | |
492 | int tda9887_conf; | |
493 | /* i2c i/o */ | |
494 | struct i2c_adapter i2c_adap; | |
495 | struct i2c_client i2c_client; | |
496 | /* video for linux */ | |
497 | int users; /* user count for exclusive use */ | |
498 | struct video_device *vdev; /* video for linux device struct */ | |
7d497f8a | 499 | v4l2_std_id norm; /* selected tv norm */ |
a6c2ba28 AM |
500 | int ctl_freq; /* selected frequency */ |
501 | unsigned int ctl_input; /* selected input */ | |
95b86a9a | 502 | unsigned int ctl_ainput;/* selected audio input */ |
35ae6f04 | 503 | unsigned int ctl_aoutput;/* selected audio output */ |
a6c2ba28 AM |
504 | int mute; |
505 | int volume; | |
506 | /* frame properties */ | |
a6c2ba28 AM |
507 | int width; /* current frame width */ |
508 | int height; /* current frame height */ | |
d45b9b8a HV |
509 | unsigned hscale; /* horizontal scale factor (see datasheet) */ |
510 | unsigned vscale; /* vertical scale factor (see datasheet) */ | |
a6c2ba28 | 511 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ |
9e31ced8 | 512 | unsigned int video_bytesread; /* Number of bytes read */ |
a6c2ba28 | 513 | |
03910cc3 | 514 | unsigned long hash; /* eeprom hash - for boards with generic ID */ |
6ea54d93 DSL |
515 | unsigned long i2c_hash; /* i2c devicelist hash - |
516 | for boards with generic ID */ | |
03910cc3 | 517 | |
9baed99e | 518 | struct em28xx_audio adev; |
6d79468d | 519 | |
a6c2ba28 | 520 | /* states */ |
3acf2809 | 521 | enum em28xx_dev_state state; |
3acf2809 | 522 | enum em28xx_io_method io; |
9e31ced8 | 523 | |
d7448a8d MCC |
524 | struct work_struct request_module_wk; |
525 | ||
a6c2ba28 | 526 | /* locks */ |
5a80415b | 527 | struct mutex lock; |
f2a2e491 | 528 | struct mutex ctrl_urb_lock; /* protects urb_buf */ |
d7aa8020 | 529 | /* spinlock_t queue_lock; */ |
a6c2ba28 AM |
530 | struct list_head inqueue, outqueue; |
531 | wait_queue_head_t open, wait_frame, wait_stream; | |
532 | struct video_device *vbi_dev; | |
0be43754 | 533 | struct video_device *radio_dev; |
a6c2ba28 AM |
534 | |
535 | unsigned char eedata[256]; | |
536 | ||
ad0ebb96 MCC |
537 | /* Isoc control struct */ |
538 | struct em28xx_dmaqueue vidq; | |
539 | struct em28xx_usb_isoc_ctl isoc_ctl; | |
540 | spinlock_t slock; | |
541 | ||
a6c2ba28 AM |
542 | /* usb transfer */ |
543 | struct usb_device *udev; /* the usb device */ | |
544 | int alt; /* alternate */ | |
545 | int max_pkt_size; /* max packet size of isoc transaction */ | |
9d4d9c05 MCC |
546 | int num_alt; /* Number of alternative settings */ |
547 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ | |
3acf2809 | 548 | struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */ |
a1a6ee74 NS |
549 | char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc |
550 | transfer */ | |
c4a98793 MCC |
551 | char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */ |
552 | ||
a6c2ba28 | 553 | /* helper funcs that call usb_control_msg */ |
6ea54d93 | 554 | int (*em28xx_write_regs) (struct em28xx *dev, u16 reg, |
a6c2ba28 | 555 | char *buf, int len); |
6ea54d93 DSL |
556 | int (*em28xx_read_reg) (struct em28xx *dev, u16 reg); |
557 | int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg, | |
558 | char *buf, int len); | |
559 | int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg, | |
a6c2ba28 | 560 | char *buf, int len); |
6ea54d93 | 561 | int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg); |
3aefb79a MCC |
562 | |
563 | enum em28xx_mode mode; | |
564 | ||
6a1acc3b DH |
565 | /* register numbers for GPO/GPIO registers */ |
566 | u16 reg_gpo_num, reg_gpio_num; | |
567 | ||
c67ec53f MCC |
568 | /* Caches GPO and GPIO registers */ |
569 | unsigned char reg_gpo, reg_gpio; | |
570 | ||
a9fc52bc DH |
571 | /* Snapshot button */ |
572 | char snapshot_button_path[30]; /* path of the input dev */ | |
573 | struct input_dev *sbutton_input_dev; | |
574 | struct delayed_work sbutton_query_work; | |
575 | ||
3421b778 | 576 | struct em28xx_dvb *dvb; |
a6c2ba28 AM |
577 | }; |
578 | ||
6d79468d MCC |
579 | struct em28xx_ops { |
580 | struct list_head next; | |
581 | char *name; | |
582 | int id; | |
583 | int (*init)(struct em28xx *); | |
584 | int (*fini)(struct em28xx *); | |
a3a048ce MCC |
585 | }; |
586 | ||
3acf2809 | 587 | /* Provided by em28xx-i2c.c */ |
fad7b958 | 588 | void em28xx_do_i2c_scan(struct em28xx *dev); |
f2cf250a DSL |
589 | int em28xx_i2c_register(struct em28xx *dev); |
590 | int em28xx_i2c_unregister(struct em28xx *dev); | |
a6c2ba28 | 591 | |
3acf2809 | 592 | /* Provided by em28xx-core.c */ |
a6c2ba28 | 593 | |
3acf2809 MCC |
594 | u32 em28xx_request_buffers(struct em28xx *dev, u32 count); |
595 | void em28xx_queue_unusedframes(struct em28xx *dev); | |
596 | void em28xx_release_buffers(struct em28xx *dev); | |
a6c2ba28 | 597 | |
3acf2809 | 598 | int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, |
a6c2ba28 | 599 | char *buf, int len); |
3acf2809 MCC |
600 | int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg); |
601 | int em28xx_read_reg(struct em28xx *dev, u16 reg); | |
602 | int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, | |
a6c2ba28 | 603 | int len); |
3acf2809 | 604 | int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len); |
b6972489 DH |
605 | int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val); |
606 | ||
531c98e7 MCC |
607 | int em28xx_read_ac97(struct em28xx *dev, u8 reg); |
608 | int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val); | |
609 | ||
3acf2809 | 610 | int em28xx_audio_analog_set(struct em28xx *dev); |
35643943 | 611 | int em28xx_audio_setup(struct em28xx *dev); |
539c96d0 | 612 | |
3acf2809 MCC |
613 | int em28xx_colorlevels_set_default(struct em28xx *dev); |
614 | int em28xx_capture_start(struct em28xx *dev, int start); | |
bddcf633 | 615 | int em28xx_set_outfmt(struct em28xx *dev); |
3acf2809 | 616 | int em28xx_resolution_set(struct em28xx *dev); |
3acf2809 | 617 | int em28xx_set_alternate(struct em28xx *dev); |
579f72e4 AT |
618 | int em28xx_init_isoc(struct em28xx *dev, int max_packets, |
619 | int num_bufs, int max_pkt_size, | |
c67ec53f | 620 | int (*isoc_copy) (struct em28xx *dev, struct urb *urb)); |
579f72e4 | 621 | void em28xx_uninit_isoc(struct em28xx *dev); |
d18e2fda | 622 | int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev); |
c67ec53f MCC |
623 | int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode); |
624 | int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio); | |
1a23f81b MCC |
625 | void em28xx_wake_i2c(struct em28xx *dev); |
626 | void em28xx_remove_from_devlist(struct em28xx *dev); | |
627 | void em28xx_add_into_devlist(struct em28xx *dev); | |
bec43661 | 628 | struct em28xx *em28xx_get_device(int minor, |
1a23f81b MCC |
629 | enum v4l2_buf_type *fh_type, |
630 | int *has_radio); | |
6d79468d MCC |
631 | int em28xx_register_extension(struct em28xx_ops *dev); |
632 | void em28xx_unregister_extension(struct em28xx_ops *dev); | |
1a23f81b MCC |
633 | void em28xx_init_extension(struct em28xx *dev); |
634 | void em28xx_close_extension(struct em28xx *dev); | |
635 | ||
636 | /* Provided by em28xx-video.c */ | |
1a23f81b MCC |
637 | int em28xx_register_analog_devices(struct em28xx *dev); |
638 | void em28xx_release_analog_resources(struct em28xx *dev); | |
6d79468d | 639 | |
3acf2809 | 640 | /* Provided by em28xx-cards.c */ |
6ea54d93 | 641 | extern int em2800_variant_detect(struct usb_device *udev, int model); |
a94e95b4 | 642 | extern void em28xx_pre_card_setup(struct em28xx *dev); |
3acf2809 MCC |
643 | extern void em28xx_card_setup(struct em28xx *dev); |
644 | extern struct em28xx_board em28xx_boards[]; | |
645 | extern struct usb_device_id em28xx_id_table[]; | |
646 | extern const unsigned int em28xx_bcount; | |
c668f32d | 647 | void em28xx_register_i2c_ir(struct em28xx *dev); |
d7cba043 | 648 | int em28xx_tuner_callback(void *ptr, int component, int command, int arg); |
1a23f81b | 649 | void em28xx_release_resources(struct em28xx *dev); |
c8793b03 MCC |
650 | |
651 | /* Provided by em28xx-input.c */ | |
c8793b03 MCC |
652 | int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); |
653 | int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); | |
654 | int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key, | |
655 | u32 *ir_raw); | |
a9fc52bc DH |
656 | void em28xx_register_snapshot_button(struct em28xx *dev); |
657 | void em28xx_deregister_snapshot_button(struct em28xx *dev); | |
a6c2ba28 | 658 | |
a924a499 MCC |
659 | int em28xx_ir_init(struct em28xx *dev); |
660 | int em28xx_ir_fini(struct em28xx *dev); | |
661 | ||
a6c2ba28 AM |
662 | /* printk macros */ |
663 | ||
3acf2809 | 664 | #define em28xx_err(fmt, arg...) do {\ |
f85c657f | 665 | printk(KERN_ERR fmt , ##arg); } while (0) |
a6c2ba28 | 666 | |
3acf2809 | 667 | #define em28xx_errdev(fmt, arg...) do {\ |
4ac97914 | 668 | printk(KERN_ERR "%s: "fmt,\ |
f85c657f | 669 | dev->name , ##arg); } while (0) |
a6c2ba28 | 670 | |
3acf2809 | 671 | #define em28xx_info(fmt, arg...) do {\ |
4ac97914 | 672 | printk(KERN_INFO "%s: "fmt,\ |
f85c657f | 673 | dev->name , ##arg); } while (0) |
3acf2809 | 674 | #define em28xx_warn(fmt, arg...) do {\ |
4ac97914 | 675 | printk(KERN_WARNING "%s: "fmt,\ |
f85c657f | 676 | dev->name , ##arg); } while (0) |
a6c2ba28 | 677 | |
6ea54d93 | 678 | static inline int em28xx_compression_disable(struct em28xx *dev) |
a6c2ba28 AM |
679 | { |
680 | /* side effect of disabling scaler and mixer */ | |
2a29a0d7 | 681 | return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00); |
a6c2ba28 AM |
682 | } |
683 | ||
6ea54d93 | 684 | static inline int em28xx_contrast_get(struct em28xx *dev) |
a6c2ba28 | 685 | { |
41facaa4 | 686 | return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f; |
a6c2ba28 AM |
687 | } |
688 | ||
6ea54d93 | 689 | static inline int em28xx_brightness_get(struct em28xx *dev) |
a6c2ba28 | 690 | { |
41facaa4 | 691 | return em28xx_read_reg(dev, EM28XX_R21_YOFFSET); |
a6c2ba28 AM |
692 | } |
693 | ||
6ea54d93 | 694 | static inline int em28xx_saturation_get(struct em28xx *dev) |
a6c2ba28 | 695 | { |
41facaa4 | 696 | return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f; |
a6c2ba28 AM |
697 | } |
698 | ||
6ea54d93 | 699 | static inline int em28xx_u_balance_get(struct em28xx *dev) |
a6c2ba28 | 700 | { |
41facaa4 | 701 | return em28xx_read_reg(dev, EM28XX_R23_UOFFSET); |
a6c2ba28 AM |
702 | } |
703 | ||
6ea54d93 | 704 | static inline int em28xx_v_balance_get(struct em28xx *dev) |
a6c2ba28 | 705 | { |
41facaa4 | 706 | return em28xx_read_reg(dev, EM28XX_R24_VOFFSET); |
a6c2ba28 AM |
707 | } |
708 | ||
6ea54d93 | 709 | static inline int em28xx_gamma_get(struct em28xx *dev) |
a6c2ba28 | 710 | { |
41facaa4 | 711 | return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f; |
a6c2ba28 AM |
712 | } |
713 | ||
6ea54d93 | 714 | static inline int em28xx_contrast_set(struct em28xx *dev, s32 val) |
a6c2ba28 AM |
715 | { |
716 | u8 tmp = (u8) val; | |
41facaa4 | 717 | return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1); |
a6c2ba28 AM |
718 | } |
719 | ||
6ea54d93 | 720 | static inline int em28xx_brightness_set(struct em28xx *dev, s32 val) |
a6c2ba28 AM |
721 | { |
722 | u8 tmp = (u8) val; | |
41facaa4 | 723 | return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1); |
a6c2ba28 AM |
724 | } |
725 | ||
6ea54d93 | 726 | static inline int em28xx_saturation_set(struct em28xx *dev, s32 val) |
a6c2ba28 AM |
727 | { |
728 | u8 tmp = (u8) val; | |
41facaa4 | 729 | return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1); |
a6c2ba28 AM |
730 | } |
731 | ||
6ea54d93 | 732 | static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val) |
a6c2ba28 AM |
733 | { |
734 | u8 tmp = (u8) val; | |
41facaa4 | 735 | return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1); |
a6c2ba28 AM |
736 | } |
737 | ||
6ea54d93 | 738 | static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val) |
a6c2ba28 AM |
739 | { |
740 | u8 tmp = (u8) val; | |
41facaa4 | 741 | return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1); |
a6c2ba28 AM |
742 | } |
743 | ||
6ea54d93 | 744 | static inline int em28xx_gamma_set(struct em28xx *dev, s32 val) |
a6c2ba28 AM |
745 | { |
746 | u8 tmp = (u8) val; | |
41facaa4 | 747 | return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1); |
a6c2ba28 AM |
748 | } |
749 | ||
750 | /*FIXME: maxw should be dependent of alt mode */ | |
6ea54d93 | 751 | static inline unsigned int norm_maxw(struct em28xx *dev) |
30556b23 | 752 | { |
505b6d0b | 753 | if (dev->board.max_range_640_480) |
7d497f8a | 754 | return 640; |
c8793b03 | 755 | else |
7d497f8a | 756 | return 720; |
30556b23 MR |
757 | } |
758 | ||
6ea54d93 | 759 | static inline unsigned int norm_maxh(struct em28xx *dev) |
a6c2ba28 | 760 | { |
505b6d0b | 761 | if (dev->board.max_range_640_480) |
7d497f8a | 762 | return 480; |
c8793b03 | 763 | else |
7d497f8a | 764 | return (dev->norm & V4L2_STD_625_50) ? 576 : 480; |
a6c2ba28 | 765 | } |
a6c2ba28 | 766 | #endif |