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V4L/DVB (10135): v4l2: introduce v4l2_file_operations.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / em28xx / em28xx.h
CommitLineData
a6c2ba28 1/*
0e7072ef 2 em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices
a6c2ba28
AM		 3
4 Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com>
4ac97914 5 Ludovico Cavedon <cavedon@sssup.it>
2e7c6dc3 6 Mauro Carvalho Chehab <mchehab@infradead.org>
a6c2ba28
AM		 7
8 Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
3acf2809
MCC		 25#ifndef _EM28XX_H
26#define _EM28XX_H
a6c2ba28 27
cb77d010 28#include <linux/videodev2.h>
ad0ebb96
MCC		 29#include <media/videobuf-vmalloc.h>
30
a6c2ba28 31#include <linux/i2c.h>
3593cab5 32#include <linux/mutex.h>
d5e52653 33#include <media/ir-kbd-i2c.h>
3aefb79a
MCC		 34#if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE)
35#include <media/videobuf-dvb.h>
36#endif
3ca9c093 37#include "tuner-xc2028.h"
2ba890ec 38#include "em28xx-reg.h"
3aefb79a
MCC		 39
40/* Boards supported by driver */
41#define EM2800_BOARD_UNKNOWN 0
42#define EM2820_BOARD_UNKNOWN 1
43#define EM2820_BOARD_TERRATEC_CINERGY_250 2
44#define EM2820_BOARD_PINNACLE_USB_2 3
45#define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4
46#define EM2820_BOARD_MSI_VOX_USB_2 5
47#define EM2800_BOARD_TERRATEC_CINERGY_200 6
48#define EM2800_BOARD_LEADTEK_WINFAST_USBII 7
49#define EM2800_BOARD_KWORLD_USB2800 8
50#define EM2820_BOARD_PINNACLE_DVC_90 9
51#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10
52#define EM2880_BOARD_TERRATEC_HYBRID_XS 11
53#define EM2820_BOARD_KWORLD_PVRTV2800RF 12
54#define EM2880_BOARD_TERRATEC_PRODIGY_XS 13
55#define EM2820_BOARD_PROLINK_PLAYTV_USB2 14
56#define EM2800_BOARD_VGEAR_POCKETTV 15
10ac6603 57#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16
4fd305b2 58#define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17
17d9d558 59#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18
a9fc52bc 60#define EM2860_BOARD_POINTNIX_INTRAORAL_CAMERA 19
e14b3658 61#define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20
59d07f1b 62#define EM2800_BOARD_GRABBEEX_USB2800 21
95b86a9a
DSL		 63#define EM2750_BOARD_UNKNOWN 22
64#define EM2750_BOARD_DLCW_130 23
65#define EM2820_BOARD_DLINK_USB_TV 24
66#define EM2820_BOARD_GADMEI_UTV310 25
67#define EM2820_BOARD_HERCULES_SMART_TV_USB2 26
68#define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27
69#define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28
95b86a9a
DSL		 70#define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30
71#define EM2821_BOARD_USBGEAR_VD204 31
72#define EM2821_BOARD_SUPERCOMP_USB_2 32
73#define EM2821_BOARD_PROLINK_PLAYTV_USB2 33
74#define EM2860_BOARD_TERRATEC_HYBRID_XS 34
75#define EM2860_BOARD_TYPHOON_DVD_MAKER 35
76#define EM2860_BOARD_NETGMBH_CAM 36
77#define EM2860_BOARD_GADMEI_UTV330 37
78#define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38
79#define EM2861_BOARD_KWORLD_PVRTV_300U 39
80#define EM2861_BOARD_PLEXTOR_PX_TV100U 40
81#define EM2870_BOARD_KWORLD_350U 41
82#define EM2870_BOARD_KWORLD_355U 42
83#define EM2870_BOARD_TERRATEC_XS 43
84#define EM2870_BOARD_TERRATEC_XS_MT2060 44
85#define EM2870_BOARD_PINNACLE_PCTV_DVB 45
86#define EM2870_BOARD_COMPRO_VIDEOMATE 46
87#define EM2880_BOARD_KWORLD_DVB_305U 47
88#define EM2880_BOARD_KWORLD_DVB_310U 48
89#define EM2880_BOARD_MSI_DIGIVOX_AD 49
90#define EM2880_BOARD_MSI_DIGIVOX_AD_II 50
91#define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51
92#define EM2881_BOARD_DNT_DA2_HYBRID 52
93#define EM2881_BOARD_PINNACLE_HYBRID_PRO 53
94#define EM2882_BOARD_KWORLD_VS_DVBT 54
95#define EM2882_BOARD_TERRATEC_HYBRID_XS 55
96#define EM2882_BOARD_PINNACLE_HYBRID_PRO 56
97#define EM2883_BOARD_KWORLD_HYBRID_A316 57
ee281b85 98#define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58
f89bc329 99#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60
1e1addd5 100#define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61
3aefb79a
MCC		 101
102/* Limits minimum and default number of buffers */
103#define EM28XX_MIN_BUF 4
104#define EM28XX_DEF_BUF 8
a6c2ba28 105
c4a98793
MCC		 106/*Limits the max URB message size */
107#define URB_MAX_CTRL_SIZE 80
108
95b86a9a
DSL		 109/* Params for validated field */
110#define EM28XX_BOARD_NOT_VALIDATED 1
111#define EM28XX_BOARD_VALIDATED 0
112
596d92d5 113/* maximum number of em28xx boards */
3687e1e6 114#define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */
596d92d5 115
a6c2ba28 116/* maximum number of frames that can be queued */
3acf2809 117#define EM28XX_NUM_FRAMES 5
a6c2ba28 118/* number of frames that get used for v4l2_read() */
3acf2809 119#define EM28XX_NUM_READ_FRAMES 2
a6c2ba28
AM		 120
121/* number of buffers for isoc transfers */
3acf2809 122#define EM28XX_NUM_BUFS 5
a6c2ba28 123
d5e52653
MCC		 124/* number of packets for each buffer
125 windows requests only 40 packets .. so we better do the same
126 this is what I found out for all alternate numbers there!
127 */
3acf2809 128#define EM28XX_NUM_PACKETS 40
a6c2ba28 129
a6c2ba28 130/* default alternate; 0 means choose the best */
3acf2809 131#define EM28XX_PINOUT 0
a6c2ba28 132
3acf2809 133#define EM28XX_INTERLACED_DEFAULT 1
a6c2ba28
AM		 134
135/*
136#define (use usbview if you want to get the other alternate number infos)
137#define
138#define alternate number 2
139#define Endpoint Address: 82
140 Direction: in
141 Attribute: 1
142 Type: Isoc
143 Max Packet Size: 1448
144 Interval: 125us
145
146 alternate number 7
147
148 Endpoint Address: 82
149 Direction: in
150 Attribute: 1
151 Type: Isoc
152 Max Packet Size: 3072
153 Interval: 125us
154*/
155
156/* time to wait when stopping the isoc transfer */
3acf2809 157#define EM28XX_URB_TIMEOUT msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS)
a6c2ba28 158
596d92d5
MCC		 159/* time in msecs to wait for i2c writes to finish */
160#define EM2800_I2C_WRITE_TIMEOUT 20
161
3aefb79a 162enum em28xx_mode {
2fe3e2ee 163 EM28XX_SUSPEND,
3aefb79a
MCC		 164 EM28XX_ANALOG_MODE,
165 EM28XX_DIGITAL_MODE,
166};
167
3acf2809 168enum em28xx_stream_state {
a6c2ba28
AM		 169 STREAM_OFF,
170 STREAM_INTERRUPT,
171 STREAM_ON,
172};
173
579f72e4
AT		 174struct em28xx;
175
ad0ebb96
MCC		 176struct em28xx_usb_isoc_ctl {
177 /* max packet size of isoc transaction */
178 int max_pkt_size;
179
180 /* number of allocated urbs */
181 int num_bufs;
182
183 /* urb for isoc transfers */
184 struct urb **urb;
185
186 /* transfer buffers for isoc transfer */
187 char **transfer_buffer;
188
189 /* Last buffer command and region */
190 u8 cmd;
191 int pos, size, pktsize;
192
193 /* Last field: ODD or EVEN? */
194 int field;
195
196 /* Stores incomplete commands */
197 u32 tmp_buf;
198 int tmp_buf_len;
199
200 /* Stores already requested buffers */
201 struct em28xx_buffer *buf;
202
203 /* Stores the number of received fields */
204 int nfields;
579f72e4
AT		 205
206 /* isoc urb callback */
207 int (*isoc_copy) (struct em28xx *dev, struct urb *urb);
208
ad0ebb96
MCC		 209};
210
bddcf633 211/* Struct to enumberate video formats */
ad0ebb96
MCC		 212struct em28xx_fmt {
213 char *name;
214 u32 fourcc; /* v4l2 format id */
bddcf633
MCC		 215 int depth;
216 int reg;
ad0ebb96
MCC		 217};
218
219/* buffer for one video frame */
220struct em28xx_buffer {
221 /* common v4l buffer stuff -- must be first */
222 struct videobuf_buffer vb;
223
a6c2ba28 224 struct list_head frame;
a6c2ba28 225 int top_field;
ad0ebb96
MCC		 226 int receiving;
227};
228
229struct em28xx_dmaqueue {
230 struct list_head active;
231 struct list_head queued;
ad0ebb96
MCC		 232
233 wait_queue_head_t wq;
234
235 /* Counters to control buffer fill */
236 int pos;
a6c2ba28
AM		 237};
238
239/* io methods */
3acf2809 240enum em28xx_io_method {
a6c2ba28
AM		 241 IO_NONE,
242 IO_READ,
243 IO_MMAP,
244};
245
246/* inputs */
247
3acf2809
MCC		 248#define MAX_EM28XX_INPUT 4
249enum enum28xx_itype {
250 EM28XX_VMUX_COMPOSITE1 = 1,
251 EM28XX_VMUX_COMPOSITE2,
252 EM28XX_VMUX_COMPOSITE3,
253 EM28XX_VMUX_COMPOSITE4,
254 EM28XX_VMUX_SVIDEO,
255 EM28XX_VMUX_TELEVISION,
256 EM28XX_VMUX_CABLE,
257 EM28XX_VMUX_DVB,
258 EM28XX_VMUX_DEBUG,
259 EM28XX_RADIO,
a6c2ba28
AM		 260};
261
35643943
MCC		 262enum em28xx_ac97_mode {
263 EM28XX_NO_AC97 = 0,
264 EM28XX_AC97_EM202,
209acc02 265 EM28XX_AC97_SIGMATEL,
35643943
MCC		 266 EM28XX_AC97_OTHER,
267};
268
269struct em28xx_audio_mode {
270 enum em28xx_ac97_mode ac97;
271
272 u16 ac97_feat;
16c7bcad 273 u32 ac97_vendor_id;
35643943
MCC		 274
275 unsigned int has_audio:1;
276
277 unsigned int i2s_3rates:1;
278 unsigned int i2s_5rates:1;
5c2231c8
DH		 279};
280
5faff789
MCC		 281/* em28xx has two audio inputs: tuner and line in.
282 However, on most devices, an auxiliary AC97 codec device is used.
283 The AC97 device may have several different inputs and outputs,
284 depending on their model. So, it is possible to use AC97 mixer to
285 address more than two different entries.
286 */
539c96d0 287enum em28xx_amux {
5faff789
MCC		 288 /* This is the only entry for em28xx tuner input */
289 EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */
290
291 EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */
292
293 /* Some less-common mixer setups */
294 EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */
295 EM28XX_AMUX_PHONE,
296 EM28XX_AMUX_MIC,
297 EM28XX_AMUX_CD,
298 EM28XX_AMUX_AUX,
299 EM28XX_AMUX_PCM_OUT,
539c96d0
MCC		 300};
301
35ae6f04 302enum em28xx_aout {
e879b8eb
MCC		 303 EM28XX_AOUT_MASTER = 1 << 0,
304 EM28XX_AOUT_LINE = 1 << 1,
305 EM28XX_AOUT_MONO = 1 << 2,
306 EM28XX_AOUT_LFE = 1 << 3,
307 EM28XX_AOUT_SURR = 1 << 4,
35ae6f04
MCC		 308};
309
122b77e5
MCC		 310struct em28xx_reg_seq {
311 int reg;
312 unsigned char val, mask;
313 int sleep;
314};
315
3acf2809
MCC		 316struct em28xx_input {
317 enum enum28xx_itype type;
a6c2ba28 318 unsigned int vmux;
539c96d0 319 enum em28xx_amux amux;
35ae6f04 320 enum em28xx_aout aout;
122b77e5 321 struct em28xx_reg_seq *gpio;
a6c2ba28
AM		 322};
323
3acf2809 324#define INPUT(nr) (&em28xx_boards[dev->model].input[nr])
a6c2ba28 325
3acf2809 326enum em28xx_decoder {
1ed1dd54 327 EM28XX_NODECODER,
3acf2809 328 EM28XX_TVP5150,
ec5de990 329 EM28XX_SAA711X,
a6c2ba28
AM		 330};
331
3acf2809 332struct em28xx_board {
a6c2ba28 333 char *name;
505b6d0b 334 int vchannels;
a6c2ba28 335 int tuner_type;
66767920 336 int tuner_addr;
a6c2ba28
AM		 337
338 /* i2c flags */
339 unsigned int tda9887_conf;
340
017ab4b1 341 /* GPIO sequences */
122b77e5 342 struct em28xx_reg_seq *dvb_gpio;
2fe3e2ee 343 struct em28xx_reg_seq *suspend_gpio;
017ab4b1 344 struct em28xx_reg_seq *tuner_gpio;
122b77e5 345
74f38a82 346 unsigned int is_em2800:1;
a6c2ba28 347 unsigned int has_msp34xx:1;
5add9a6f 348 unsigned int mts_firmware:1;
c8793b03 349 unsigned int max_range_640_480:1;
3aefb79a 350 unsigned int has_dvb:1;
a9fc52bc 351 unsigned int has_snapshot_button:1;
95b86a9a 352 unsigned int valid:1;
3abee53e 353
a2070c66
MCC		 354 unsigned char xclk, i2c_speed;
355
3acf2809 356 enum em28xx_decoder decoder;
a6c2ba28 357
3acf2809 358 struct em28xx_input input[MAX_EM28XX_INPUT];
0be43754 359 struct em28xx_input radio;
4b92253a 360 IR_KEYTAB_TYPE *ir_codes;
a6c2ba28
AM		 361};
362
3acf2809 363struct em28xx_eeprom {
a6c2ba28
AM		 364 u32 id; /* 0x9567eb1a */
365 u16 vendor_ID;
366 u16 product_ID;
367
368 u16 chip_conf;
369
370 u16 board_conf;
371
372 u16 string1, string2, string3;
373
374 u8 string_idx_table;
375};
376
377/* device states */
3acf2809 378enum em28xx_dev_state {
a6c2ba28
AM		 379 DEV_INITIALIZED = 0x01,
380 DEV_DISCONNECTED = 0x02,
381 DEV_MISCONFIGURED = 0x04,
382};
383
6d79468d
MCC		 384#define EM28XX_AUDIO_BUFS 5
385#define EM28XX_NUM_AUDIO_PACKETS 64
386#define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */
387#define EM28XX_CAPTURE_STREAM_EN 1
3aefb79a
MCC		 388
389/* em28xx extensions */
6d79468d 390#define EM28XX_AUDIO 0x10
3aefb79a 391#define EM28XX_DVB 0x20
6d79468d
MCC		 392
393struct em28xx_audio {
394 char name[50];
395 char *transfer_buffer[EM28XX_AUDIO_BUFS];
396 struct urb *urb[EM28XX_AUDIO_BUFS];
397 struct usb_device *udev;
398 unsigned int capture_transfer_done;
399 struct snd_pcm_substream *capture_pcm_substream;
400
401 unsigned int hwptr_done_capture;
402 struct snd_card *sndcard;
403
404 int users, shutdown;
405 enum em28xx_stream_state capture_stream;
406 spinlock_t slock;
407};
408
52284c3e
MCC		 409struct em28xx;
410
411struct em28xx_fh {
412 struct em28xx *dev;
413 unsigned int stream_on:1; /* Locks streams */
414 int radio;
415
416 struct videobuf_queue vb_vidq;
417
418 enum v4l2_buf_type type;
419};
420
a6c2ba28 421/* main device struct */
3acf2809 422struct em28xx {
a6c2ba28
AM		 423 /* generic device properties */
424 char name[30]; /* name (including minor) of the device */
425 int model; /* index in the device_data struct */
e5589bef 426 int devno; /* marks the number of this device */
600bd7f0 427 enum em28xx_chip_id chip_id;
505b6d0b
MCC		 428
429 struct em28xx_board board;
430
a225452e 431 unsigned int stream_on:1; /* Locks streams */
d7448a8d 432 unsigned int has_audio_class:1;
24a613e4 433 unsigned int has_alsa_audio:1;
a2070c66 434
bddcf633
MCC		 435 struct em28xx_fmt *format;
436
a924a499
MCC		 437 struct em28xx_IR *ir;
438
89b329ef
MCC		 439 /* Some older em28xx chips needs a waiting time after writing */
440 unsigned int wait_after_write;
441
74f38a82
MCC		 442 struct list_head devlist;
443
9bb13a6d
MCC		 444 u32 i2s_speed; /* I2S speed for audio digital stream */
445
35643943 446 struct em28xx_audio_mode audio_mode;
a6c2ba28
AM		 447
448 int tuner_type; /* type of the tuner */
449 int tuner_addr; /* tuner address */
450 int tda9887_conf;
451 /* i2c i/o */
452 struct i2c_adapter i2c_adap;
453 struct i2c_client i2c_client;
454 /* video for linux */
455 int users; /* user count for exclusive use */
456 struct video_device *vdev; /* video for linux device struct */
7d497f8a 457 v4l2_std_id norm; /* selected tv norm */
a6c2ba28
AM		 458 int ctl_freq; /* selected frequency */
459 unsigned int ctl_input; /* selected input */
95b86a9a 460 unsigned int ctl_ainput;/* selected audio input */
35ae6f04 461 unsigned int ctl_aoutput;/* selected audio output */
a6c2ba28
AM		 462 int mute;
463 int volume;
464 /* frame properties */
a6c2ba28
AM		 465 int width; /* current frame width */
466 int height; /* current frame height */
d45b9b8a
HV		 467 unsigned hscale; /* horizontal scale factor (see datasheet) */
468 unsigned vscale; /* vertical scale factor (see datasheet) */
a6c2ba28 469 int interlaced; /* 1=interlace fileds, 0=just top fileds */
9e31ced8 470 unsigned int video_bytesread; /* Number of bytes read */
a6c2ba28 471
03910cc3 472 unsigned long hash; /* eeprom hash - for boards with generic ID */
6ea54d93
DSL		 473 unsigned long i2c_hash; /* i2c devicelist hash -
474 for boards with generic ID */
03910cc3 475
6d79468d
MCC		 476 struct em28xx_audio *adev;
477
a6c2ba28 478 /* states */
3acf2809 479 enum em28xx_dev_state state;
3acf2809 480 enum em28xx_io_method io;
9e31ced8 481
d7448a8d
MCC		 482 struct work_struct request_module_wk;
483
a6c2ba28 484 /* locks */
5a80415b 485 struct mutex lock;
f2a2e491 486 struct mutex ctrl_urb_lock; /* protects urb_buf */
d7aa8020 487 /* spinlock_t queue_lock; */
a6c2ba28
AM		 488 struct list_head inqueue, outqueue;
489 wait_queue_head_t open, wait_frame, wait_stream;
490 struct video_device *vbi_dev;
0be43754 491 struct video_device *radio_dev;
a6c2ba28
AM		 492
493 unsigned char eedata[256];
494
ad0ebb96
MCC		 495 /* Isoc control struct */
496 struct em28xx_dmaqueue vidq;
497 struct em28xx_usb_isoc_ctl isoc_ctl;
498 spinlock_t slock;
499
a6c2ba28
AM		 500 /* usb transfer */
501 struct usb_device *udev; /* the usb device */
502 int alt; /* alternate */
503 int max_pkt_size; /* max packet size of isoc transaction */
9d4d9c05
MCC		 504 int num_alt; /* Number of alternative settings */
505 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
3acf2809
MCC		 506 struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */
507 char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc transfer */
c4a98793
MCC		 508 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
509
a6c2ba28 510 /* helper funcs that call usb_control_msg */
6ea54d93 511 int (*em28xx_write_regs) (struct em28xx *dev, u16 reg,
a6c2ba28 512 char *buf, int len);
6ea54d93
DSL		 513 int (*em28xx_read_reg) (struct em28xx *dev, u16 reg);
514 int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg,
515 char *buf, int len);
516 int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 517 char *buf, int len);
6ea54d93 518 int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg);
3aefb79a
MCC		 519
520 enum em28xx_mode mode;
521
6a1acc3b
DH		 522 /* register numbers for GPO/GPIO registers */
523 u16 reg_gpo_num, reg_gpio_num;
524
c67ec53f
MCC		 525 /* Caches GPO and GPIO registers */
526 unsigned char reg_gpo, reg_gpio;
527
a9fc52bc
DH		 528 /* Snapshot button */
529 char snapshot_button_path[30]; /* path of the input dev */
530 struct input_dev *sbutton_input_dev;
531 struct delayed_work sbutton_query_work;
532
3421b778 533 struct em28xx_dvb *dvb;
a6c2ba28
AM		 534};
535
6d79468d
MCC		 536struct em28xx_ops {
537 struct list_head next;
538 char *name;
539 int id;
540 int (*init)(struct em28xx *);
541 int (*fini)(struct em28xx *);
a3a048ce
MCC		 542};
543
3acf2809 544/* Provided by em28xx-i2c.c */
a6c2ba28 545
3acf2809 546void em28xx_i2c_call_clients(struct em28xx *dev, unsigned int cmd, void *arg);
fad7b958 547void em28xx_do_i2c_scan(struct em28xx *dev);
3acf2809
MCC		 548int em28xx_i2c_register(struct em28xx *dev);
549int em28xx_i2c_unregister(struct em28xx *dev);
a6c2ba28 550
3acf2809 551/* Provided by em28xx-core.c */
a6c2ba28 552
3acf2809
MCC		 553u32 em28xx_request_buffers(struct em28xx *dev, u32 count);
554void em28xx_queue_unusedframes(struct em28xx *dev);
555void em28xx_release_buffers(struct em28xx *dev);
a6c2ba28 556
3acf2809 557int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 558 char *buf, int len);
3acf2809
MCC		 559int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg);
560int em28xx_read_reg(struct em28xx *dev, u16 reg);
561int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
a6c2ba28 562 int len);
3acf2809 563int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len);
b6972489
DH		 564int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val);
565
531c98e7
MCC		 566int em28xx_read_ac97(struct em28xx *dev, u8 reg);
567int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val);
568
3acf2809 569int em28xx_audio_analog_set(struct em28xx *dev);
35643943 570int em28xx_audio_setup(struct em28xx *dev);
539c96d0 571
3acf2809
MCC		 572int em28xx_colorlevels_set_default(struct em28xx *dev);
573int em28xx_capture_start(struct em28xx *dev, int start);
bddcf633 574int em28xx_set_outfmt(struct em28xx *dev);
3acf2809 575int em28xx_resolution_set(struct em28xx *dev);
3acf2809 576int em28xx_set_alternate(struct em28xx *dev);
579f72e4
AT		 577int em28xx_init_isoc(struct em28xx *dev, int max_packets,
578 int num_bufs, int max_pkt_size,
c67ec53f 579 int (*isoc_copy) (struct em28xx *dev, struct urb *urb));
579f72e4 580void em28xx_uninit_isoc(struct em28xx *dev);
c67ec53f
MCC		 581int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode);
582int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio);
1a23f81b
MCC		 583void em28xx_wake_i2c(struct em28xx *dev);
584void em28xx_remove_from_devlist(struct em28xx *dev);
585void em28xx_add_into_devlist(struct em28xx *dev);
bec43661 586struct em28xx *em28xx_get_device(int minor,
1a23f81b
MCC		 587 enum v4l2_buf_type *fh_type,
588 int *has_radio);
6d79468d
MCC		 589int em28xx_register_extension(struct em28xx_ops *dev);
590void em28xx_unregister_extension(struct em28xx_ops *dev);
1a23f81b
MCC		 591void em28xx_init_extension(struct em28xx *dev);
592void em28xx_close_extension(struct em28xx *dev);
593
594/* Provided by em28xx-video.c */
1a23f81b
MCC		 595int em28xx_register_analog_devices(struct em28xx *dev);
596void em28xx_release_analog_resources(struct em28xx *dev);
6d79468d 597
3acf2809 598/* Provided by em28xx-cards.c */
6ea54d93 599extern int em2800_variant_detect(struct usb_device *udev, int model);
a94e95b4 600extern void em28xx_pre_card_setup(struct em28xx *dev);
3acf2809
MCC		 601extern void em28xx_card_setup(struct em28xx *dev);
602extern struct em28xx_board em28xx_boards[];
603extern struct usb_device_id em28xx_id_table[];
604extern const unsigned int em28xx_bcount;
c8793b03 605void em28xx_set_ir(struct em28xx *dev, struct IR_i2c *ir);
d7cba043 606int em28xx_tuner_callback(void *ptr, int component, int command, int arg);
1a23f81b 607void em28xx_release_resources(struct em28xx *dev);
c8793b03
MCC		 608
609/* Provided by em28xx-input.c */
c8793b03
MCC		 610int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
611int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
612int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,
613 u32 *ir_raw);
a9fc52bc
DH		 614void em28xx_register_snapshot_button(struct em28xx *dev);
615void em28xx_deregister_snapshot_button(struct em28xx *dev);
a6c2ba28 616
a924a499
MCC		 617int em28xx_ir_init(struct em28xx *dev);
618int em28xx_ir_fini(struct em28xx *dev);
619
a6c2ba28
AM		 620/* printk macros */
621
3acf2809 622#define em28xx_err(fmt, arg...) do {\
f85c657f 623 printk(KERN_ERR fmt , ##arg); } while (0)
a6c2ba28 624
3acf2809 625#define em28xx_errdev(fmt, arg...) do {\
4ac97914 626 printk(KERN_ERR "%s: "fmt,\
f85c657f 627 dev->name , ##arg); } while (0)
a6c2ba28 628
3acf2809 629#define em28xx_info(fmt, arg...) do {\
4ac97914 630 printk(KERN_INFO "%s: "fmt,\
f85c657f 631 dev->name , ##arg); } while (0)
3acf2809 632#define em28xx_warn(fmt, arg...) do {\
4ac97914 633 printk(KERN_WARNING "%s: "fmt,\
f85c657f 634 dev->name , ##arg); } while (0)
a6c2ba28 635
6ea54d93 636static inline int em28xx_compression_disable(struct em28xx *dev)
a6c2ba28
AM		 637{
638 /* side effect of disabling scaler and mixer */
2a29a0d7 639 return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
a6c2ba28
AM		 640}
641
6ea54d93 642static inline int em28xx_contrast_get(struct em28xx *dev)
a6c2ba28 643{
41facaa4 644 return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f;
a6c2ba28
AM		 645}
646
6ea54d93 647static inline int em28xx_brightness_get(struct em28xx *dev)
a6c2ba28 648{
41facaa4 649 return em28xx_read_reg(dev, EM28XX_R21_YOFFSET);
a6c2ba28
AM		 650}
651
6ea54d93 652static inline int em28xx_saturation_get(struct em28xx *dev)
a6c2ba28 653{
41facaa4 654 return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f;
a6c2ba28
AM		 655}
656
6ea54d93 657static inline int em28xx_u_balance_get(struct em28xx *dev)
a6c2ba28 658{
41facaa4 659 return em28xx_read_reg(dev, EM28XX_R23_UOFFSET);
a6c2ba28
AM		 660}
661
6ea54d93 662static inline int em28xx_v_balance_get(struct em28xx *dev)
a6c2ba28 663{
41facaa4 664 return em28xx_read_reg(dev, EM28XX_R24_VOFFSET);
a6c2ba28
AM		 665}
666
6ea54d93 667static inline int em28xx_gamma_get(struct em28xx *dev)
a6c2ba28 668{
41facaa4 669 return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f;
a6c2ba28
AM		 670}
671
6ea54d93 672static inline int em28xx_contrast_set(struct em28xx *dev, s32 val)
a6c2ba28
AM		 673{
674 u8 tmp = (u8) val;
41facaa4 675 return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1);
a6c2ba28
AM		 676}
677
6ea54d93 678static inline int em28xx_brightness_set(struct em28xx *dev, s32 val)
a6c2ba28
AM		 679{
680 u8 tmp = (u8) val;
41facaa4 681 return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1);
a6c2ba28
AM		 682}
683
6ea54d93 684static inline int em28xx_saturation_set(struct em28xx *dev, s32 val)
a6c2ba28
AM		 685{
686 u8 tmp = (u8) val;
41facaa4 687 return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1);
a6c2ba28
AM		 688}
689
6ea54d93 690static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val)
a6c2ba28
AM		 691{
692 u8 tmp = (u8) val;
41facaa4 693 return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1);
a6c2ba28
AM		 694}
695
6ea54d93 696static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val)
a6c2ba28
AM		 697{
698 u8 tmp = (u8) val;
41facaa4 699 return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1);
a6c2ba28
AM		 700}
701
6ea54d93 702static inline int em28xx_gamma_set(struct em28xx *dev, s32 val)
a6c2ba28
AM		 703{
704 u8 tmp = (u8) val;
41facaa4 705 return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1);
a6c2ba28
AM		 706}
707
708/*FIXME: maxw should be dependent of alt mode */
6ea54d93 709static inline unsigned int norm_maxw(struct em28xx *dev)
30556b23 710{
505b6d0b 711 if (dev->board.max_range_640_480)
7d497f8a 712 return 640;
c8793b03 713 else
7d497f8a 714 return 720;
30556b23
MR		 715}
716
6ea54d93 717static inline unsigned int norm_maxh(struct em28xx *dev)
a6c2ba28 718{
505b6d0b 719 if (dev->board.max_range_640_480)
7d497f8a 720 return 480;
c8793b03 721 else
7d497f8a 722 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
a6c2ba28 723}
a6c2ba28 724#endif
kernel source for telekom puls (alcatel/mediatek)