[media] em28xx: initial support for HAUPPAUGE HVR-930C again
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / em28xx / em28xx.h
CommitLineData
a6c2ba28 1/*
0e7072ef 2 em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices
a6c2ba28
AM
3
4 Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com>
4ac97914 5 Ludovico Cavedon <cavedon@sssup.it>
2e7c6dc3 6 Mauro Carvalho Chehab <mchehab@infradead.org>
a6c2ba28
AM
7
8 Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
3acf2809
MCC
25#ifndef _EM28XX_H
26#define _EM28XX_H
a6c2ba28 27
39a96b4c
MCC
28#include <linux/workqueue.h>
29#include <linux/i2c.h>
30#include <linux/mutex.h>
cb77d010 31#include <linux/videodev2.h>
39a96b4c 32
ad0ebb96 33#include <media/videobuf-vmalloc.h>
f2cf250a 34#include <media/v4l2-device.h>
d5e52653 35#include <media/ir-kbd-i2c.h>
6bda9644 36#include <media/rc-core.h>
3aefb79a
MCC
37#if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE)
38#include <media/videobuf-dvb.h>
39#endif
3ca9c093 40#include "tuner-xc2028.h"
82e7dbbd 41#include "xc5000.h"
2ba890ec 42#include "em28xx-reg.h"
3aefb79a
MCC
43
44/* Boards supported by driver */
45#define EM2800_BOARD_UNKNOWN 0
46#define EM2820_BOARD_UNKNOWN 1
47#define EM2820_BOARD_TERRATEC_CINERGY_250 2
48#define EM2820_BOARD_PINNACLE_USB_2 3
49#define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4
50#define EM2820_BOARD_MSI_VOX_USB_2 5
51#define EM2800_BOARD_TERRATEC_CINERGY_200 6
52#define EM2800_BOARD_LEADTEK_WINFAST_USBII 7
53#define EM2800_BOARD_KWORLD_USB2800 8
54#define EM2820_BOARD_PINNACLE_DVC_90 9
55#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10
56#define EM2880_BOARD_TERRATEC_HYBRID_XS 11
57#define EM2820_BOARD_KWORLD_PVRTV2800RF 12
58#define EM2880_BOARD_TERRATEC_PRODIGY_XS 13
59#define EM2820_BOARD_PROLINK_PLAYTV_USB2 14
60#define EM2800_BOARD_VGEAR_POCKETTV 15
10ac6603 61#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16
4fd305b2 62#define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17
17d9d558 63#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18
3ed58baf 64#define EM2860_BOARD_SAA711X_REFERENCE_DESIGN 19
e14b3658 65#define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20
59d07f1b 66#define EM2800_BOARD_GRABBEEX_USB2800 21
95b86a9a
DSL
67#define EM2750_BOARD_UNKNOWN 22
68#define EM2750_BOARD_DLCW_130 23
69#define EM2820_BOARD_DLINK_USB_TV 24
70#define EM2820_BOARD_GADMEI_UTV310 25
71#define EM2820_BOARD_HERCULES_SMART_TV_USB2 26
72#define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27
73#define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28
443fed9f 74#define EM2860_BOARD_TVP5150_REFERENCE_DESIGN 29
95b86a9a
DSL
75#define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30
76#define EM2821_BOARD_USBGEAR_VD204 31
77#define EM2821_BOARD_SUPERCOMP_USB_2 32
8298f2f8 78#define EM2860_BOARD_ELGATO_VIDEO_CAPTURE 33
95b86a9a
DSL
79#define EM2860_BOARD_TERRATEC_HYBRID_XS 34
80#define EM2860_BOARD_TYPHOON_DVD_MAKER 35
81#define EM2860_BOARD_NETGMBH_CAM 36
82#define EM2860_BOARD_GADMEI_UTV330 37
83#define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38
84#define EM2861_BOARD_KWORLD_PVRTV_300U 39
85#define EM2861_BOARD_PLEXTOR_PX_TV100U 40
86#define EM2870_BOARD_KWORLD_350U 41
87#define EM2870_BOARD_KWORLD_355U 42
88#define EM2870_BOARD_TERRATEC_XS 43
89#define EM2870_BOARD_TERRATEC_XS_MT2060 44
90#define EM2870_BOARD_PINNACLE_PCTV_DVB 45
91#define EM2870_BOARD_COMPRO_VIDEOMATE 46
92#define EM2880_BOARD_KWORLD_DVB_305U 47
93#define EM2880_BOARD_KWORLD_DVB_310U 48
94#define EM2880_BOARD_MSI_DIGIVOX_AD 49
95#define EM2880_BOARD_MSI_DIGIVOX_AD_II 50
96#define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51
97#define EM2881_BOARD_DNT_DA2_HYBRID 52
98#define EM2881_BOARD_PINNACLE_HYBRID_PRO 53
99#define EM2882_BOARD_KWORLD_VS_DVBT 54
100#define EM2882_BOARD_TERRATEC_HYBRID_XS 55
09bc1942 101#define EM2882_BOARD_PINNACLE_HYBRID_PRO_330E 56
6e7b9ea0 102#define EM2883_BOARD_KWORLD_HYBRID_330U 57
ee281b85 103#define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58
f89bc329 104#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60
1e1addd5 105#define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61
f7fe3e6f 106#define EM2820_BOARD_GADMEI_TVR200 62
56ee3807
MCC
107#define EM2860_BOARD_KAIOMY_TVNPC_U2 63
108#define EM2860_BOARD_EASYCAP 64
f74a61e3 109#define EM2820_BOARD_IODATA_GVMVP_SZ 65
e5db5d44 110#define EM2880_BOARD_EMPIRE_DUAL_TV 66
4557af9c 111#define EM2860_BOARD_TERRATEC_GRABBY 67
766ed64d 112#define EM2860_BOARD_TERRATEC_AV350 68
d7de5d8f 113#define EM2882_BOARD_KWORLD_ATSC_315U 69
19859229 114#define EM2882_BOARD_EVGA_INDTUBE 70
02e7804b 115#define EM2820_BOARD_SILVERCREST_WEBCAM 71
6d888a66 116#define EM2861_BOARD_GADMEI_UTV330PLUS 72
285eb1a4 117#define EM2870_BOARD_REDDO_DVB_C_USB_BOX 73
694a101e 118#define EM2800_BOARD_VC211A 74
7ca7ef60 119#define EM2882_BOARD_DIKOM_DK300 75
7e48b30a 120#define EM2870_BOARD_KWORLD_A340 76
fec528b7 121#define EM2874_BOARD_LEADERSHIP_ISDBT 77
d6a5f921 122#define EM28174_BOARD_PCTV_290E 78
fec528b7 123#define EM2884_BOARD_TERRATEC_H5 79
36588715 124#define EM28174_BOARD_PCTV_460E 80
82e7dbbd 125#define EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C 81
3aefb79a
MCC
126
127/* Limits minimum and default number of buffers */
128#define EM28XX_MIN_BUF 4
129#define EM28XX_DEF_BUF 8
a6c2ba28 130
c4a98793
MCC
131/*Limits the max URB message size */
132#define URB_MAX_CTRL_SIZE 80
133
95b86a9a
DSL
134/* Params for validated field */
135#define EM28XX_BOARD_NOT_VALIDATED 1
136#define EM28XX_BOARD_VALIDATED 0
137
22cff7b3
DSL
138/* Params for em28xx_cmd() audio */
139#define EM28XX_START_AUDIO 1
140#define EM28XX_STOP_AUDIO 0
141
596d92d5 142/* maximum number of em28xx boards */
3687e1e6 143#define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */
596d92d5 144
a6c2ba28 145/* maximum number of frames that can be queued */
3acf2809 146#define EM28XX_NUM_FRAMES 5
a6c2ba28 147/* number of frames that get used for v4l2_read() */
3acf2809 148#define EM28XX_NUM_READ_FRAMES 2
a6c2ba28
AM
149
150/* number of buffers for isoc transfers */
3acf2809 151#define EM28XX_NUM_BUFS 5
a6c2ba28 152
d5e52653 153/* number of packets for each buffer
33c02fac 154 windows requests only 64 packets .. so we better do the same
d5e52653
MCC
155 this is what I found out for all alternate numbers there!
156 */
33c02fac 157#define EM28XX_NUM_PACKETS 64
a6c2ba28 158
3acf2809 159#define EM28XX_INTERLACED_DEFAULT 1
a6c2ba28
AM
160
161/*
162#define (use usbview if you want to get the other alternate number infos)
163#define
164#define alternate number 2
165#define Endpoint Address: 82
166 Direction: in
167 Attribute: 1
168 Type: Isoc
169 Max Packet Size: 1448
170 Interval: 125us
171
172 alternate number 7
173
174 Endpoint Address: 82
175 Direction: in
176 Attribute: 1
177 Type: Isoc
178 Max Packet Size: 3072
179 Interval: 125us
180*/
181
182/* time to wait when stopping the isoc transfer */
a1a6ee74
NS
183#define EM28XX_URB_TIMEOUT \
184 msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS)
a6c2ba28 185
596d92d5
MCC
186/* time in msecs to wait for i2c writes to finish */
187#define EM2800_I2C_WRITE_TIMEOUT 20
188
3aefb79a 189enum em28xx_mode {
2fe3e2ee 190 EM28XX_SUSPEND,
3aefb79a
MCC
191 EM28XX_ANALOG_MODE,
192 EM28XX_DIGITAL_MODE,
193};
194
a6c2ba28 195
579f72e4
AT
196struct em28xx;
197
ad0ebb96
MCC
198struct em28xx_usb_isoc_ctl {
199 /* max packet size of isoc transaction */
200 int max_pkt_size;
201
202 /* number of allocated urbs */
203 int num_bufs;
204
205 /* urb for isoc transfers */
206 struct urb **urb;
207
208 /* transfer buffers for isoc transfer */
209 char **transfer_buffer;
210
211 /* Last buffer command and region */
212 u8 cmd;
213 int pos, size, pktsize;
214
215 /* Last field: ODD or EVEN? */
216 int field;
217
218 /* Stores incomplete commands */
219 u32 tmp_buf;
220 int tmp_buf_len;
221
222 /* Stores already requested buffers */
28abf083
DH
223 struct em28xx_buffer *vid_buf;
224 struct em28xx_buffer *vbi_buf;
ad0ebb96
MCC
225
226 /* Stores the number of received fields */
227 int nfields;
579f72e4
AT
228
229 /* isoc urb callback */
230 int (*isoc_copy) (struct em28xx *dev, struct urb *urb);
231
ad0ebb96
MCC
232};
233
bddcf633 234/* Struct to enumberate video formats */
ad0ebb96
MCC
235struct em28xx_fmt {
236 char *name;
237 u32 fourcc; /* v4l2 format id */
bddcf633
MCC
238 int depth;
239 int reg;
ad0ebb96
MCC
240};
241
242/* buffer for one video frame */
243struct em28xx_buffer {
244 /* common v4l buffer stuff -- must be first */
245 struct videobuf_buffer vb;
246
a6c2ba28 247 struct list_head frame;
a6c2ba28 248 int top_field;
ad0ebb96
MCC
249 int receiving;
250};
251
252struct em28xx_dmaqueue {
253 struct list_head active;
254 struct list_head queued;
ad0ebb96
MCC
255
256 wait_queue_head_t wq;
257
258 /* Counters to control buffer fill */
259 int pos;
a6c2ba28
AM
260};
261
262/* io methods */
3acf2809 263enum em28xx_io_method {
a6c2ba28
AM
264 IO_NONE,
265 IO_READ,
266 IO_MMAP,
267};
268
269/* inputs */
270
3acf2809
MCC
271#define MAX_EM28XX_INPUT 4
272enum enum28xx_itype {
273 EM28XX_VMUX_COMPOSITE1 = 1,
274 EM28XX_VMUX_COMPOSITE2,
275 EM28XX_VMUX_COMPOSITE3,
276 EM28XX_VMUX_COMPOSITE4,
277 EM28XX_VMUX_SVIDEO,
278 EM28XX_VMUX_TELEVISION,
279 EM28XX_VMUX_CABLE,
280 EM28XX_VMUX_DVB,
281 EM28XX_VMUX_DEBUG,
282 EM28XX_RADIO,
a6c2ba28
AM
283};
284
35643943
MCC
285enum em28xx_ac97_mode {
286 EM28XX_NO_AC97 = 0,
287 EM28XX_AC97_EM202,
209acc02 288 EM28XX_AC97_SIGMATEL,
35643943
MCC
289 EM28XX_AC97_OTHER,
290};
291
292struct em28xx_audio_mode {
293 enum em28xx_ac97_mode ac97;
294
295 u16 ac97_feat;
16c7bcad 296 u32 ac97_vendor_id;
35643943
MCC
297
298 unsigned int has_audio:1;
299
300 unsigned int i2s_3rates:1;
301 unsigned int i2s_5rates:1;
5c2231c8
DH
302};
303
5faff789
MCC
304/* em28xx has two audio inputs: tuner and line in.
305 However, on most devices, an auxiliary AC97 codec device is used.
306 The AC97 device may have several different inputs and outputs,
307 depending on their model. So, it is possible to use AC97 mixer to
308 address more than two different entries.
309 */
539c96d0 310enum em28xx_amux {
5faff789
MCC
311 /* This is the only entry for em28xx tuner input */
312 EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */
313
314 EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */
315
316 /* Some less-common mixer setups */
317 EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */
318 EM28XX_AMUX_PHONE,
319 EM28XX_AMUX_MIC,
320 EM28XX_AMUX_CD,
321 EM28XX_AMUX_AUX,
322 EM28XX_AMUX_PCM_OUT,
539c96d0
MCC
323};
324
35ae6f04 325enum em28xx_aout {
8866f9cf 326 /* AC97 outputs */
e879b8eb
MCC
327 EM28XX_AOUT_MASTER = 1 << 0,
328 EM28XX_AOUT_LINE = 1 << 1,
329 EM28XX_AOUT_MONO = 1 << 2,
330 EM28XX_AOUT_LFE = 1 << 3,
331 EM28XX_AOUT_SURR = 1 << 4,
8866f9cf
MCC
332
333 /* PCM IN Mixer - used by AC97_RECORD_SELECT register */
334 EM28XX_AOUT_PCM_IN = 1 << 7,
335
336 /* Bits 10-8 are used to indicate the PCM IN record select */
337 EM28XX_AOUT_PCM_MIC_PCM = 0 << 8,
338 EM28XX_AOUT_PCM_CD = 1 << 8,
339 EM28XX_AOUT_PCM_VIDEO = 2 << 8,
340 EM28XX_AOUT_PCM_AUX = 3 << 8,
341 EM28XX_AOUT_PCM_LINE = 4 << 8,
342 EM28XX_AOUT_PCM_STEREO = 5 << 8,
343 EM28XX_AOUT_PCM_MONO = 6 << 8,
344 EM28XX_AOUT_PCM_PHONE = 7 << 8,
35ae6f04
MCC
345};
346
32929fb4 347static inline int ac97_return_record_select(int a_out)
8866f9cf
MCC
348{
349 return (a_out & 0x700) >> 8;
350}
351
122b77e5
MCC
352struct em28xx_reg_seq {
353 int reg;
354 unsigned char val, mask;
355 int sleep;
356};
357
3acf2809
MCC
358struct em28xx_input {
359 enum enum28xx_itype type;
a6c2ba28 360 unsigned int vmux;
539c96d0 361 enum em28xx_amux amux;
35ae6f04 362 enum em28xx_aout aout;
122b77e5 363 struct em28xx_reg_seq *gpio;
a6c2ba28
AM
364};
365
3acf2809 366#define INPUT(nr) (&em28xx_boards[dev->model].input[nr])
a6c2ba28 367
3acf2809 368enum em28xx_decoder {
527f09a9 369 EM28XX_NODECODER = 0,
3acf2809 370 EM28XX_TVP5150,
ec5de990 371 EM28XX_SAA711X,
527f09a9
MCC
372};
373
374enum em28xx_sensor {
375 EM28XX_NOSENSOR = 0,
02e7804b 376 EM28XX_MT9V011,
b80fd2d8 377 EM28XX_MT9M001,
f2e26ae7 378 EM28XX_MT9M111,
a6c2ba28
AM
379};
380
df7fa09c
MCC
381enum em28xx_adecoder {
382 EM28XX_NOADECODER = 0,
383 EM28XX_TVAUDIO,
384};
385
3acf2809 386struct em28xx_board {
a6c2ba28 387 char *name;
505b6d0b 388 int vchannels;
a6c2ba28 389 int tuner_type;
66767920 390 int tuner_addr;
a6c2ba28
AM
391
392 /* i2c flags */
393 unsigned int tda9887_conf;
394
017ab4b1 395 /* GPIO sequences */
122b77e5 396 struct em28xx_reg_seq *dvb_gpio;
2fe3e2ee 397 struct em28xx_reg_seq *suspend_gpio;
017ab4b1 398 struct em28xx_reg_seq *tuner_gpio;
2bd1d9eb 399 struct em28xx_reg_seq *mute_gpio;
122b77e5 400
74f38a82 401 unsigned int is_em2800:1;
a6c2ba28 402 unsigned int has_msp34xx:1;
5add9a6f 403 unsigned int mts_firmware:1;
c8793b03 404 unsigned int max_range_640_480:1;
3aefb79a 405 unsigned int has_dvb:1;
a9fc52bc 406 unsigned int has_snapshot_button:1;
c43221df 407 unsigned int is_webcam:1;
95b86a9a 408 unsigned int valid:1;
ac07bb73 409 unsigned int has_ir_i2c:1;
3abee53e 410
a2070c66 411 unsigned char xclk, i2c_speed;
f2cf250a
DSL
412 unsigned char radio_addr;
413 unsigned short tvaudio_addr;
a2070c66 414
3acf2809 415 enum em28xx_decoder decoder;
df7fa09c 416 enum em28xx_adecoder adecoder;
a6c2ba28 417
3acf2809 418 struct em28xx_input input[MAX_EM28XX_INPUT];
0be43754 419 struct em28xx_input radio;
02858eed 420 char *ir_codes;
a6c2ba28
AM
421};
422
3acf2809 423struct em28xx_eeprom {
a6c2ba28
AM
424 u32 id; /* 0x9567eb1a */
425 u16 vendor_ID;
426 u16 product_ID;
427
428 u16 chip_conf;
429
430 u16 board_conf;
431
432 u16 string1, string2, string3;
433
434 u8 string_idx_table;
435};
436
437/* device states */
3acf2809 438enum em28xx_dev_state {
a6c2ba28
AM
439 DEV_INITIALIZED = 0x01,
440 DEV_DISCONNECTED = 0x02,
441 DEV_MISCONFIGURED = 0x04,
442};
443
6d79468d
MCC
444#define EM28XX_AUDIO_BUFS 5
445#define EM28XX_NUM_AUDIO_PACKETS 64
446#define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */
447#define EM28XX_CAPTURE_STREAM_EN 1
3aefb79a
MCC
448
449/* em28xx extensions */
6d79468d 450#define EM28XX_AUDIO 0x10
3aefb79a 451#define EM28XX_DVB 0x20
6d79468d 452
8c873d31
DH
453/* em28xx resource types (used for res_get/res_lock etc */
454#define EM28XX_RESOURCE_VIDEO 0x01
455#define EM28XX_RESOURCE_VBI 0x02
456
6d79468d
MCC
457struct em28xx_audio {
458 char name[50];
459 char *transfer_buffer[EM28XX_AUDIO_BUFS];
460 struct urb *urb[EM28XX_AUDIO_BUFS];
461 struct usb_device *udev;
462 unsigned int capture_transfer_done;
463 struct snd_pcm_substream *capture_pcm_substream;
464
465 unsigned int hwptr_done_capture;
466 struct snd_card *sndcard;
467
c744dff2 468 int users;
6d79468d
MCC
469 spinlock_t slock;
470};
471
52284c3e
MCC
472struct em28xx;
473
474struct em28xx_fh {
475 struct em28xx *dev;
52284c3e 476 int radio;
8c873d31 477 unsigned int resources;
52284c3e
MCC
478
479 struct videobuf_queue vb_vidq;
28abf083 480 struct videobuf_queue vb_vbiq;
52284c3e
MCC
481
482 enum v4l2_buf_type type;
483};
484
a6c2ba28 485/* main device struct */
3acf2809 486struct em28xx {
a6c2ba28
AM
487 /* generic device properties */
488 char name[30]; /* name (including minor) of the device */
489 int model; /* index in the device_data struct */
e5589bef 490 int devno; /* marks the number of this device */
600bd7f0 491 enum em28xx_chip_id chip_id;
505b6d0b 492
4f83e7b3
MCC
493 int audio_ifnum;
494
f2cf250a 495 struct v4l2_device v4l2_dev;
505b6d0b
MCC
496 struct em28xx_board board;
497
d36bb4e7 498 /* Webcam specific fields */
527f09a9 499 enum em28xx_sensor em28xx_sensor;
55699964 500 int sensor_xres, sensor_yres;
d36bb4e7 501 int sensor_xtal;
527f09a9 502
c2a6b54a
MCC
503 /* Allows progressive (e. g. non-interlaced) mode */
504 int progressive;
505
579d3152
MCC
506 /* Vinmode/Vinctl used at the driver */
507 int vinmode, vinctl;
508
d7448a8d 509 unsigned int has_audio_class:1;
24a613e4 510 unsigned int has_alsa_audio:1;
4f83e7b3 511 unsigned int is_audio_only:1;
a2070c66 512
39a96b4c
MCC
513 /* Controls audio streaming */
514 struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */
515 atomic_t stream_started; /* stream should be running if true */
516
bddcf633
MCC
517 struct em28xx_fmt *format;
518
a924a499
MCC
519 struct em28xx_IR *ir;
520
89b329ef
MCC
521 /* Some older em28xx chips needs a waiting time after writing */
522 unsigned int wait_after_write;
523
74f38a82
MCC
524 struct list_head devlist;
525
9bb13a6d
MCC
526 u32 i2s_speed; /* I2S speed for audio digital stream */
527
35643943 528 struct em28xx_audio_mode audio_mode;
a6c2ba28
AM
529
530 int tuner_type; /* type of the tuner */
531 int tuner_addr; /* tuner address */
532 int tda9887_conf;
533 /* i2c i/o */
534 struct i2c_adapter i2c_adap;
535 struct i2c_client i2c_client;
536 /* video for linux */
537 int users; /* user count for exclusive use */
538 struct video_device *vdev; /* video for linux device struct */
7d497f8a 539 v4l2_std_id norm; /* selected tv norm */
a6c2ba28
AM
540 int ctl_freq; /* selected frequency */
541 unsigned int ctl_input; /* selected input */
95b86a9a 542 unsigned int ctl_ainput;/* selected audio input */
35ae6f04 543 unsigned int ctl_aoutput;/* selected audio output */
a6c2ba28
AM
544 int mute;
545 int volume;
546 /* frame properties */
a6c2ba28
AM
547 int width; /* current frame width */
548 int height; /* current frame height */
d45b9b8a
HV
549 unsigned hscale; /* horizontal scale factor (see datasheet) */
550 unsigned vscale; /* vertical scale factor (see datasheet) */
a6c2ba28 551 int interlaced; /* 1=interlace fileds, 0=just top fileds */
9e31ced8 552 unsigned int video_bytesread; /* Number of bytes read */
a6c2ba28 553
03910cc3 554 unsigned long hash; /* eeprom hash - for boards with generic ID */
6ea54d93
DSL
555 unsigned long i2c_hash; /* i2c devicelist hash -
556 for boards with generic ID */
03910cc3 557
9baed99e 558 struct em28xx_audio adev;
6d79468d 559
a6c2ba28 560 /* states */
3acf2809 561 enum em28xx_dev_state state;
3acf2809 562 enum em28xx_io_method io;
9e31ced8 563
da52a55c
DH
564 /* vbi related state tracking */
565 int capture_type;
566 int vbi_read;
567 unsigned char cur_field;
66d9cbad
DH
568 unsigned int vbi_width;
569 unsigned int vbi_height; /* lines per field */
da52a55c 570
d7448a8d
MCC
571 struct work_struct request_module_wk;
572
a6c2ba28 573 /* locks */
5a80415b 574 struct mutex lock;
f2a2e491 575 struct mutex ctrl_urb_lock; /* protects urb_buf */
d7aa8020 576 /* spinlock_t queue_lock; */
a6c2ba28
AM
577 struct list_head inqueue, outqueue;
578 wait_queue_head_t open, wait_frame, wait_stream;
579 struct video_device *vbi_dev;
0be43754 580 struct video_device *radio_dev;
a6c2ba28 581
8c873d31
DH
582 /* resources in use */
583 unsigned int resources;
584
a6c2ba28
AM
585 unsigned char eedata[256];
586
ad0ebb96
MCC
587 /* Isoc control struct */
588 struct em28xx_dmaqueue vidq;
28abf083 589 struct em28xx_dmaqueue vbiq;
ad0ebb96
MCC
590 struct em28xx_usb_isoc_ctl isoc_ctl;
591 spinlock_t slock;
592
a6c2ba28
AM
593 /* usb transfer */
594 struct usb_device *udev; /* the usb device */
595 int alt; /* alternate */
596 int max_pkt_size; /* max packet size of isoc transaction */
9d4d9c05
MCC
597 int num_alt; /* Number of alternative settings */
598 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
3acf2809 599 struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */
a1a6ee74
NS
600 char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc
601 transfer */
c4a98793
MCC
602 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
603
a6c2ba28 604 /* helper funcs that call usb_control_msg */
6ea54d93 605 int (*em28xx_write_regs) (struct em28xx *dev, u16 reg,
a6c2ba28 606 char *buf, int len);
6ea54d93
DSL
607 int (*em28xx_read_reg) (struct em28xx *dev, u16 reg);
608 int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg,
609 char *buf, int len);
610 int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 611 char *buf, int len);
6ea54d93 612 int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg);
3aefb79a
MCC
613
614 enum em28xx_mode mode;
615
6a1acc3b
DH
616 /* register numbers for GPO/GPIO registers */
617 u16 reg_gpo_num, reg_gpio_num;
618
c67ec53f
MCC
619 /* Caches GPO and GPIO registers */
620 unsigned char reg_gpo, reg_gpio;
621
a9fc52bc
DH
622 /* Snapshot button */
623 char snapshot_button_path[30]; /* path of the input dev */
624 struct input_dev *sbutton_input_dev;
625 struct delayed_work sbutton_query_work;
626
3421b778 627 struct em28xx_dvb *dvb;
d2ebd0f8
MCC
628
629 /* I2C keyboard data */
d2ebd0f8 630 struct IR_i2c_init_data init_data;
a6c2ba28
AM
631};
632
6d79468d
MCC
633struct em28xx_ops {
634 struct list_head next;
635 char *name;
636 int id;
637 int (*init)(struct em28xx *);
638 int (*fini)(struct em28xx *);
a3a048ce
MCC
639};
640
3acf2809 641/* Provided by em28xx-i2c.c */
fad7b958 642void em28xx_do_i2c_scan(struct em28xx *dev);
f2cf250a
DSL
643int em28xx_i2c_register(struct em28xx *dev);
644int em28xx_i2c_unregister(struct em28xx *dev);
a6c2ba28 645
3acf2809 646/* Provided by em28xx-core.c */
a6c2ba28 647
3acf2809
MCC
648u32 em28xx_request_buffers(struct em28xx *dev, u32 count);
649void em28xx_queue_unusedframes(struct em28xx *dev);
650void em28xx_release_buffers(struct em28xx *dev);
a6c2ba28 651
3acf2809 652int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 653 char *buf, int len);
3acf2809
MCC
654int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg);
655int em28xx_read_reg(struct em28xx *dev, u16 reg);
656int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
a6c2ba28 657 int len);
3acf2809 658int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len);
b6972489 659int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val);
1bad429e
MCC
660int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
661 u8 bitmask);
b6972489 662
531c98e7
MCC
663int em28xx_read_ac97(struct em28xx *dev, u8 reg);
664int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val);
665
3acf2809 666int em28xx_audio_analog_set(struct em28xx *dev);
35643943 667int em28xx_audio_setup(struct em28xx *dev);
539c96d0 668
3acf2809
MCC
669int em28xx_colorlevels_set_default(struct em28xx *dev);
670int em28xx_capture_start(struct em28xx *dev, int start);
da52a55c 671int em28xx_vbi_supported(struct em28xx *dev);
bddcf633 672int em28xx_set_outfmt(struct em28xx *dev);
3acf2809 673int em28xx_resolution_set(struct em28xx *dev);
3acf2809 674int em28xx_set_alternate(struct em28xx *dev);
579f72e4
AT
675int em28xx_init_isoc(struct em28xx *dev, int max_packets,
676 int num_bufs, int max_pkt_size,
c67ec53f 677 int (*isoc_copy) (struct em28xx *dev, struct urb *urb));
579f72e4 678void em28xx_uninit_isoc(struct em28xx *dev);
d18e2fda 679int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev);
c67ec53f
MCC
680int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode);
681int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio);
1a23f81b 682void em28xx_wake_i2c(struct em28xx *dev);
6d79468d
MCC
683int em28xx_register_extension(struct em28xx_ops *dev);
684void em28xx_unregister_extension(struct em28xx_ops *dev);
1a23f81b
MCC
685void em28xx_init_extension(struct em28xx *dev);
686void em28xx_close_extension(struct em28xx *dev);
687
688/* Provided by em28xx-video.c */
1a23f81b
MCC
689int em28xx_register_analog_devices(struct em28xx *dev);
690void em28xx_release_analog_resources(struct em28xx *dev);
6d79468d 691
3acf2809 692/* Provided by em28xx-cards.c */
6ea54d93 693extern int em2800_variant_detect(struct usb_device *udev, int model);
a94e95b4 694extern void em28xx_pre_card_setup(struct em28xx *dev);
3acf2809
MCC
695extern void em28xx_card_setup(struct em28xx *dev);
696extern struct em28xx_board em28xx_boards[];
697extern struct usb_device_id em28xx_id_table[];
698extern const unsigned int em28xx_bcount;
c668f32d 699void em28xx_register_i2c_ir(struct em28xx *dev);
d7cba043 700int em28xx_tuner_callback(void *ptr, int component, int command, int arg);
1a23f81b 701void em28xx_release_resources(struct em28xx *dev);
c8793b03
MCC
702
703/* Provided by em28xx-input.c */
5b89ecf9
MCC
704
705#ifdef CONFIG_VIDEO_EM28XX_RC
706
c8793b03
MCC
707int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
708int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
709int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,
710 u32 *ir_raw);
ca39d84d
MA
711int em28xx_get_key_winfast_usbii_deluxe(struct IR_i2c *ir, u32 *ir_key,
712 u32 *ir_raw);
a9fc52bc
DH
713void em28xx_register_snapshot_button(struct em28xx *dev);
714void em28xx_deregister_snapshot_button(struct em28xx *dev);
a6c2ba28 715
a924a499
MCC
716int em28xx_ir_init(struct em28xx *dev);
717int em28xx_ir_fini(struct em28xx *dev);
718
5b89ecf9
MCC
719#else
720
721#define em28xx_get_key_terratec NULL
722#define em28xx_get_key_em_haup NULL
723#define em28xx_get_key_pinnacle_usb_grey NULL
724#define em28xx_get_key_winfast_usbii_deluxe NULL
725
726static inline void em28xx_register_snapshot_button(struct em28xx *dev) {}
727static inline void em28xx_deregister_snapshot_button(struct em28xx *dev) {}
728static inline int em28xx_ir_init(struct em28xx *dev) { return 0; }
729static inline int em28xx_ir_fini(struct em28xx *dev) { return 0; }
730
731#endif
732
28abf083
DH
733/* Provided by em28xx-vbi.c */
734extern struct videobuf_queue_ops em28xx_vbi_qops;
735
a6c2ba28
AM
736/* printk macros */
737
3acf2809 738#define em28xx_err(fmt, arg...) do {\
f85c657f 739 printk(KERN_ERR fmt , ##arg); } while (0)
a6c2ba28 740
3acf2809 741#define em28xx_errdev(fmt, arg...) do {\
4ac97914 742 printk(KERN_ERR "%s: "fmt,\
f85c657f 743 dev->name , ##arg); } while (0)
a6c2ba28 744
3acf2809 745#define em28xx_info(fmt, arg...) do {\
4ac97914 746 printk(KERN_INFO "%s: "fmt,\
f85c657f 747 dev->name , ##arg); } while (0)
3acf2809 748#define em28xx_warn(fmt, arg...) do {\
4ac97914 749 printk(KERN_WARNING "%s: "fmt,\
f85c657f 750 dev->name , ##arg); } while (0)
a6c2ba28 751
6ea54d93 752static inline int em28xx_compression_disable(struct em28xx *dev)
a6c2ba28
AM
753{
754 /* side effect of disabling scaler and mixer */
2a29a0d7 755 return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
a6c2ba28
AM
756}
757
6ea54d93 758static inline int em28xx_contrast_get(struct em28xx *dev)
a6c2ba28 759{
41facaa4 760 return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f;
a6c2ba28
AM
761}
762
6ea54d93 763static inline int em28xx_brightness_get(struct em28xx *dev)
a6c2ba28 764{
41facaa4 765 return em28xx_read_reg(dev, EM28XX_R21_YOFFSET);
a6c2ba28
AM
766}
767
6ea54d93 768static inline int em28xx_saturation_get(struct em28xx *dev)
a6c2ba28 769{
41facaa4 770 return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f;
a6c2ba28
AM
771}
772
6ea54d93 773static inline int em28xx_u_balance_get(struct em28xx *dev)
a6c2ba28 774{
41facaa4 775 return em28xx_read_reg(dev, EM28XX_R23_UOFFSET);
a6c2ba28
AM
776}
777
6ea54d93 778static inline int em28xx_v_balance_get(struct em28xx *dev)
a6c2ba28 779{
41facaa4 780 return em28xx_read_reg(dev, EM28XX_R24_VOFFSET);
a6c2ba28
AM
781}
782
6ea54d93 783static inline int em28xx_gamma_get(struct em28xx *dev)
a6c2ba28 784{
41facaa4 785 return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f;
a6c2ba28
AM
786}
787
6ea54d93 788static inline int em28xx_contrast_set(struct em28xx *dev, s32 val)
a6c2ba28
AM
789{
790 u8 tmp = (u8) val;
41facaa4 791 return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1);
a6c2ba28
AM
792}
793
6ea54d93 794static inline int em28xx_brightness_set(struct em28xx *dev, s32 val)
a6c2ba28
AM
795{
796 u8 tmp = (u8) val;
41facaa4 797 return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1);
a6c2ba28
AM
798}
799
6ea54d93 800static inline int em28xx_saturation_set(struct em28xx *dev, s32 val)
a6c2ba28
AM
801{
802 u8 tmp = (u8) val;
41facaa4 803 return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1);
a6c2ba28
AM
804}
805
6ea54d93 806static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val)
a6c2ba28
AM
807{
808 u8 tmp = (u8) val;
41facaa4 809 return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1);
a6c2ba28
AM
810}
811
6ea54d93 812static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val)
a6c2ba28
AM
813{
814 u8 tmp = (u8) val;
41facaa4 815 return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1);
a6c2ba28
AM
816}
817
6ea54d93 818static inline int em28xx_gamma_set(struct em28xx *dev, s32 val)
a6c2ba28
AM
819{
820 u8 tmp = (u8) val;
41facaa4 821 return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1);
a6c2ba28
AM
822}
823
824/*FIXME: maxw should be dependent of alt mode */
6ea54d93 825static inline unsigned int norm_maxw(struct em28xx *dev)
30556b23 826{
55699964
MCC
827 if (dev->board.is_webcam)
828 return dev->sensor_xres;
829
1ca31892 830 if (dev->board.max_range_640_480 || dev->board.is_em2800)
7d497f8a 831 return 640;
55699964
MCC
832
833 return 720;
30556b23
MR
834}
835
6ea54d93 836static inline unsigned int norm_maxh(struct em28xx *dev)
a6c2ba28 837{
55699964
MCC
838 if (dev->board.is_webcam)
839 return dev->sensor_yres;
840
505b6d0b 841 if (dev->board.max_range_640_480)
7d497f8a 842 return 480;
55699964
MCC
843
844 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
a6c2ba28 845}
a6c2ba28 846#endif