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[media] Add initial support for Terratec H5
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / em28xx / em28xx-dvb.c
CommitLineData
3aefb79a
MCC		 1/*
2 DVB device driver for em28xx
3
fec528b7 4 (c) 2008-2011 Mauro Carvalho Chehab <mchehab@infradead.org>
3aefb79a 5
bdfbf952
DH		 6 (c) 2008 Devin Heitmueller <devin.heitmueller@gmail.com>
7 - Fixes for the driver to properly work with HVR-950
4fd305b2 8 - Fixes for the driver to properly work with Pinnacle PCTV HD Pro Stick
e14b3658 9 - Fixes for the driver to properly work with AMD ATI TV Wonder HD 600
bdfbf952 10
3421b778
AT		 11 (c) 2008 Aidan Thornton <makosoft@googlemail.com>
12
13 Based on cx88-dvb, saa7134-dvb and videobuf-dvb originally written by:
3aefb79a
MCC		 14 (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
15 (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
16
17 This program is free software; you can redistribute it and/or modify
18 it under the terms of the GNU General Public License as published by
19 the Free Software Foundation; either version 2 of the License.
20 */
21
22#include <linux/kernel.h>
5a0e3ad6 23#include <linux/slab.h>
3aefb79a
MCC		 24#include <linux/usb.h>
25
26#include "em28xx.h"
27#include <media/v4l2-common.h>
28#include <media/videobuf-vmalloc.h>
d7de5d8f
FM		 29#include <media/tuner.h>
30#include "tuner-simple.h"
3aefb79a
MCC		 31
32#include "lgdt330x.h"
7e48b30a 33#include "lgdt3305.h"
7e6388a1 34#include "zl10353.h"
6e7b9ea0 35#include "s5h1409.h"
4fb202a8
DH		 36#include "mt352.h"
37#include "mt352_priv.h" /* FIXME */
285eb1a4 38#include "tda1002x.h"
7e48b30a 39#include "tda18271.h"
ca3dfd6a 40#include "s921.h"
75e2b869 41#include "drxd.h"
d6a5f921 42#include "cxd2820r.h"
fec528b7
MCC		 43#include "tda18271c2dd.h"
44#include "drxk.h"
3aefb79a
MCC		 45
46MODULE_DESCRIPTION("driver for em28xx based DVB cards");
47MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
48MODULE_LICENSE("GPL");
49
50static unsigned int debug;
51module_param(debug, int, 0644);
52MODULE_PARM_DESC(debug, "enable debug messages [dvb]");
53
54DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
55
56#define dprintk(level, fmt, arg...) do { \
57if (debug >= level) \
3421b778 58 printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->name, ## arg); \
3aefb79a
MCC		 59} while (0)
60
3421b778 61#define EM28XX_DVB_NUM_BUFS 5
3421b778
AT		 62#define EM28XX_DVB_MAX_PACKETS 64
63
64struct em28xx_dvb {
f71095be 65 struct dvb_frontend *fe[2];
3421b778
AT		 66
67 /* feed count management */
68 struct mutex lock;
69 int nfeeds;
70
71 /* general boilerplate stuff */
72 struct dvb_adapter adapter;
73 struct dvb_demux demux;
74 struct dmxdev dmxdev;
75 struct dmx_frontend fe_hw;
76 struct dmx_frontend fe_mem;
77 struct dvb_net net;
fec528b7
MCC		 78
79 /* Due to DRX-D - probably need changes */
80 int (*gate_ctrl)(struct dvb_frontend *, int);
81 struct semaphore pll_mutex;
3421b778
AT		 82};
83
84
85static inline void print_err_status(struct em28xx *dev,
86 int packet, int status)
3aefb79a 87{
3421b778 88 char *errmsg = "Unknown";
3aefb79a 89
3421b778
AT		 90 switch (status) {
91 case -ENOENT:
92 errmsg = "unlinked synchronuously";
93 break;
94 case -ECONNRESET:
95 errmsg = "unlinked asynchronuously";
96 break;
97 case -ENOSR:
98 errmsg = "Buffer error (overrun)";
99 break;
100 case -EPIPE:
101 errmsg = "Stalled (device not responding)";
102 break;
103 case -EOVERFLOW:
104 errmsg = "Babble (bad cable?)";
105 break;
106 case -EPROTO:
107 errmsg = "Bit-stuff error (bad cable?)";
108 break;
109 case -EILSEQ:
110 errmsg = "CRC/Timeout (could be anything)";
111 break;
112 case -ETIME:
113 errmsg = "Device does not respond";
114 break;
115 }
116 if (packet < 0) {
117 dprintk(1, "URB status %d [%s].\n", status, errmsg);
118 } else {
6ea54d93
DSL		 119 dprintk(1, "URB packet %d, status %d [%s].\n",
120 packet, status, errmsg);
3421b778
AT		 121 }
122}
3aefb79a 123
3421b778
AT		 124static inline int dvb_isoc_copy(struct em28xx *dev, struct urb *urb)
125{
126 int i;
3aefb79a 127
3421b778
AT		 128 if (!dev)
129 return 0;
3aefb79a 130
3421b778
AT		 131 if ((dev->state & DEV_DISCONNECTED) || (dev->state & DEV_MISCONFIGURED))
132 return 0;
133
134 if (urb->status < 0) {
135 print_err_status(dev, -1, urb->status);
136 if (urb->status == -ENOENT)
137 return 0;
138 }
139
140 for (i = 0; i < urb->number_of_packets; i++) {
141 int status = urb->iso_frame_desc[i].status;
142
143 if (status < 0) {
144 print_err_status(dev, i, status);
145 if (urb->iso_frame_desc[i].status != -EPROTO)
146 continue;
147 }
148
149 dvb_dmx_swfilter(&dev->dvb->demux, urb->transfer_buffer +
150 urb->iso_frame_desc[i].offset,
151 urb->iso_frame_desc[i].actual_length);
152 }
153
154 return 0;
155}
156
6ea54d93
DSL		 157static int start_streaming(struct em28xx_dvb *dvb)
158{
c67ec53f 159 int rc;
3421b778 160 struct em28xx *dev = dvb->adapter.priv;
d18e2fda 161 int max_dvb_packet_size;
3421b778
AT		 162
163 usb_set_interface(dev->udev, 0, 1);
c67ec53f
MCC		 164 rc = em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
165 if (rc < 0)
166 return rc;
3421b778 167
d18e2fda
DH		 168 max_dvb_packet_size = em28xx_isoc_dvb_max_packetsize(dev);
169
3421b778 170 return em28xx_init_isoc(dev, EM28XX_DVB_MAX_PACKETS,
d18e2fda 171 EM28XX_DVB_NUM_BUFS, max_dvb_packet_size,
c67ec53f 172 dvb_isoc_copy);
3421b778
AT		 173}
174
6ea54d93
DSL		 175static int stop_streaming(struct em28xx_dvb *dvb)
176{
3421b778
AT		 177 struct em28xx *dev = dvb->adapter.priv;
178
179 em28xx_uninit_isoc(dev);
c67ec53f 180
2fe3e2ee 181 em28xx_set_mode(dev, EM28XX_SUSPEND);
c67ec53f 182
3aefb79a
MCC		 183 return 0;
184}
185
3421b778
AT		 186static int start_feed(struct dvb_demux_feed *feed)
187{
188 struct dvb_demux *demux = feed->demux;
189 struct em28xx_dvb *dvb = demux->priv;
190 int rc, ret;
191
192 if (!demux->dmx.frontend)
193 return -EINVAL;
194
195 mutex_lock(&dvb->lock);
196 dvb->nfeeds++;
197 rc = dvb->nfeeds;
198
199 if (dvb->nfeeds == 1) {
200 ret = start_streaming(dvb);
6ea54d93
DSL		 201 if (ret < 0)
202 rc = ret;
3421b778
AT		 203 }
204
205 mutex_unlock(&dvb->lock);
206 return rc;
207}
208
209static int stop_feed(struct dvb_demux_feed *feed)
210{
211 struct dvb_demux *demux = feed->demux;
212 struct em28xx_dvb *dvb = demux->priv;
213 int err = 0;
214
215 mutex_lock(&dvb->lock);
216 dvb->nfeeds--;
6ea54d93
DSL		 217
218 if (0 == dvb->nfeeds)
3421b778 219 err = stop_streaming(dvb);
6ea54d93 220
3421b778
AT		 221 mutex_unlock(&dvb->lock);
222 return err;
223}
224
225
e3569abc
MCC		 226
227/* ------------------------------------------------------------------ */
228static int em28xx_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
229{
230 struct em28xx *dev = fe->dvb->priv;
231
232 if (acquire)
233 return em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
234 else
2fe3e2ee 235 return em28xx_set_mode(dev, EM28XX_SUSPEND);
e3569abc
MCC		 236}
237
3aefb79a
MCC		 238/* ------------------------------------------------------------------ */
239
227ad4ab
MCC		 240static struct lgdt330x_config em2880_lgdt3303_dev = {
241 .demod_address = 0x0e,
242 .demod_chip = LGDT3303,
243};
3aefb79a 244
7e48b30a
JW		 245static struct lgdt3305_config em2870_lgdt3304_dev = {
246 .i2c_addr = 0x0e,
247 .demod_chip = LGDT3304,
248 .spectral_inversion = 1,
249 .deny_i2c_rptr = 1,
250 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
251 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
252 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
253 .vsb_if_khz = 3250,
254 .qam_if_khz = 4000,
255};
256
ca3dfd6a
MCC		 257static struct s921_config sharp_isdbt = {
258 .demod_address = 0x30 >> 1
259};
260
7e6388a1
AT		 261static struct zl10353_config em28xx_zl10353_with_xc3028 = {
262 .demod_address = (0x1e >> 1),
263 .no_tuner = 1,
264 .parallel_ts = 1,
265 .if2 = 45600,
266};
267
6e7b9ea0
RK		 268static struct s5h1409_config em28xx_s5h1409_with_xc3028 = {
269 .demod_address = 0x32 >> 1,
270 .output_mode = S5H1409_PARALLEL_OUTPUT,
271 .gpio = S5H1409_GPIO_OFF,
272 .inversion = S5H1409_INVERSION_OFF,
273 .status_mode = S5H1409_DEMODLOCKING,
274 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
275};
276
7e48b30a
JW		 277static struct tda18271_std_map kworld_a340_std_map = {
278 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 0,
279 .if_lvl = 1, .rfagc_top = 0x37, },
280 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 1,
281 .if_lvl = 1, .rfagc_top = 0x37, },
282};
283
284static struct tda18271_config kworld_a340_config = {
285 .std_map = &kworld_a340_std_map,
286};
287
a84f79ae 288static struct zl10353_config em28xx_zl10353_xc3028_no_i2c_gate = {
f797608c
DH		 289 .demod_address = (0x1e >> 1),
290 .no_tuner = 1,
291 .disable_i2c_gate_ctrl = 1,
292 .parallel_ts = 1,
293 .if2 = 45600,
294};
295
75e2b869
DH		 296static struct drxd_config em28xx_drxd = {
297 .index = 0, .demod_address = 0x70, .demod_revision = 0xa2,
298 .demoda_address = 0x00, .pll_address = 0x00,
299 .pll_type = DRXD_PLL_NONE, .clock = 12000, .insert_rs_byte = 1,
300 .pll_set = NULL, .osc_deviation = NULL, .IF = 42800000,
6b142b3c 301 .disable_i2c_gate_ctrl = 1,
17d9d558 302};
17d9d558 303
fec528b7
MCC		 304#define TERRATEC_H5_DRXK_I2C_ADDR 0x29
305
306struct drxk_config terratec_h5_drxk = {
307 .adr = 0x29,
308};
309
310static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
311{
312 struct em28xx_dvb *dvb = fe->sec_priv;
313 int status;
314
315 if (!dvb)
316 return -EINVAL;
317
318 if (enable) {
319 down(&dvb->pll_mutex);
320 status = dvb->gate_ctrl(fe, 1);
321 } else {
322 status = dvb->gate_ctrl(fe, 0);
323 up(&dvb->pll_mutex);
324 }
325 return status;
326}
327
328static void terratec_h5_init(struct em28xx *dev)
329{
330 int i;
331 struct em28xx_reg_seq terratec_h5_init[] = {
332 {EM28XX_R08_GPIO, 0xff, 0xff, 10},
333 {EM2874_R80_GPIO, 0xf6, 0xff, 100},
334 {EM2874_R80_GPIO, 0xf2, 0xff, 50},
335 {EM2874_R80_GPIO, 0xf6, 0xff, 100},
336 { -1, -1, -1, -1},
337 };
338 struct em28xx_reg_seq terratec_h5_end[] = {
339 {EM2874_R80_GPIO, 0xe6, 0xff, 100},
340 {EM2874_R80_GPIO, 0xa6, 0xff, 50},
341 {EM2874_R80_GPIO, 0xe6, 0xff, 100},
342 { -1, -1, -1, -1},
343 };
344 struct {
345 unsigned char r[4];
346 int len;
347 } regs[] = {
348 {{ 0x06, 0x02, 0x00, 0x31 }, 4},
349 {{ 0x01, 0x02 }, 2},
350 {{ 0x01, 0x02, 0x00, 0xc6 }, 4},
351 {{ 0x01, 0x00 }, 2},
352 {{ 0x01, 0x00, 0xff, 0xaf }, 4},
353 {{ 0x01, 0x00, 0x03, 0xa0 }, 4},
354 {{ 0x01, 0x00 }, 2},
355 {{ 0x01, 0x00, 0x73, 0xaf }, 4},
356 {{ 0x04, 0x00 }, 2},
357 {{ 0x00, 0x04 }, 2},
358 {{ 0x00, 0x04, 0x00, 0x0a }, 4},
359 {{ 0x04, 0x14 }, 2},
360 {{ 0x04, 0x14, 0x00, 0x00 }, 4},
361 };
362
363 em28xx_gpio_set(dev, terratec_h5_init);
364 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
365 msleep(10);
366 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45);
367 msleep(10);
368
369 dev->i2c_client.addr = 0x82 >> 1;
370
371 for (i = 0; i < ARRAY_SIZE(regs); i++)
372 i2c_master_send(&dev->i2c_client, regs[i].r, regs[i].len);
373 em28xx_gpio_set(dev, terratec_h5_end);
374};
375
4fb202a8
DH		 376static int mt352_terratec_xs_init(struct dvb_frontend *fe)
377{
378 /* Values extracted from a USB trace of the Terratec Windows driver */
379 static u8 clock_config[] = { CLOCK_CTL, 0x38, 0x2c };
380 static u8 reset[] = { RESET, 0x80 };
381 static u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
382 static u8 agc_cfg[] = { AGC_TARGET, 0x28, 0xa0 };
383 static u8 input_freq_cfg[] = { INPUT_FREQ_1, 0x31, 0xb8 };
384 static u8 rs_err_cfg[] = { RS_ERR_PER_1, 0x00, 0x4d };
385 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
386 static u8 trl_nom_cfg[] = { TRL_NOMINAL_RATE_1, 0x64, 0x00 };
387 static u8 tps_given_cfg[] = { TPS_GIVEN_1, 0x40, 0x80, 0x50 };
ff69786b 388 static u8 tuner_go[] = { TUNER_GO, 0x01};
4fb202a8
DH		 389
390 mt352_write(fe, clock_config, sizeof(clock_config));
391 udelay(200);
392 mt352_write(fe, reset, sizeof(reset));
393 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
394 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
395 mt352_write(fe, input_freq_cfg, sizeof(input_freq_cfg));
396 mt352_write(fe, rs_err_cfg, sizeof(rs_err_cfg));
397 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
398 mt352_write(fe, trl_nom_cfg, sizeof(trl_nom_cfg));
399 mt352_write(fe, tps_given_cfg, sizeof(tps_given_cfg));
400 mt352_write(fe, tuner_go, sizeof(tuner_go));
401 return 0;
402}
403
404static struct mt352_config terratec_xs_mt352_cfg = {
405 .demod_address = (0x1e >> 1),
406 .no_tuner = 1,
407 .if2 = 45600,
408 .demod_init = mt352_terratec_xs_init,
409};
410
285eb1a4
AP		 411static struct tda10023_config em28xx_tda10023_config = {
412 .demod_address = 0x0c,
413 .invert = 1,
414};
415
d6a5f921
AP		 416static struct cxd2820r_config em28xx_cxd2820r_config = {
417 .i2c_address = (0xd8 >> 1),
418 .ts_mode = CXD2820R_TS_SERIAL,
419 .if_dvbt_6 = 3300,
420 .if_dvbt_7 = 3500,
421 .if_dvbt_8 = 4000,
422 .if_dvbt2_6 = 3300,
423 .if_dvbt2_7 = 3500,
424 .if_dvbt2_8 = 4000,
425 .if_dvbc = 5000,
426
427 /* enable LNA for DVB-T2 and DVB-C */
428 .gpio_dvbt2[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L,
429 .gpio_dvbc[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L,
430};
431
432static struct tda18271_config em28xx_cxd2820r_tda18271_config = {
433 .output_opt = TDA18271_OUTPUT_LT_OFF,
434};
435
3aefb79a
MCC		 436/* ------------------------------------------------------------------ */
437
438static int attach_xc3028(u8 addr, struct em28xx *dev)
439{
440 struct dvb_frontend *fe;
3ca9c093
MCC		 441 struct xc2028_config cfg;
442
6ea54d93 443 memset(&cfg, 0, sizeof(cfg));
3ca9c093
MCC		 444 cfg.i2c_adap = &dev->i2c_adap;
445 cfg.i2c_addr = addr;
3ca9c093 446
f71095be 447 if (!dev->dvb->fe[0]) {
480be185
FR		 448 em28xx_errdev("/2: dvb frontend not attached. "
449 "Can't attach xc3028\n");
3aefb79a
MCC		 450 return -EINVAL;
451 }
452
f71095be 453 fe = dvb_attach(xc2028_attach, dev->dvb->fe[0], &cfg);
3aefb79a 454 if (!fe) {
480be185 455 em28xx_errdev("/2: xc3028 attach failed\n");
f71095be
AP		 456 dvb_frontend_detach(dev->dvb->fe[0]);
457 dev->dvb->fe[0] = NULL;
3aefb79a
MCC		 458 return -EINVAL;
459 }
460
480be185 461 em28xx_info("%s/2: xc3028 attached\n", dev->name);
3aefb79a
MCC		 462
463 return 0;
464}
465
3421b778
AT		 466/* ------------------------------------------------------------------ */
467
d45b9b8a 468static int register_dvb(struct em28xx_dvb *dvb,
3421b778
AT		 469 struct module *module,
470 struct em28xx *dev,
471 struct device *device)
3aefb79a 472{
3421b778 473 int result;
3aefb79a 474
3421b778 475 mutex_init(&dvb->lock);
3aefb79a 476
3421b778
AT		 477 /* register adapter */
478 result = dvb_register_adapter(&dvb->adapter, dev->name, module, device,
479 adapter_nr);
480 if (result < 0) {
481 printk(KERN_WARNING "%s: dvb_register_adapter failed (errno = %d)\n",
482 dev->name, result);
483 goto fail_adapter;
484 }
e3569abc
MCC		 485
486 /* Ensure all frontends negotiate bus access */
f71095be
AP		 487 dvb->fe[0]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl;
488 if (dvb->fe[1])
489 dvb->fe[1]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl;
e3569abc 490
3421b778
AT		 491 dvb->adapter.priv = dev;
492
493 /* register frontend */
f71095be 494 result = dvb_register_frontend(&dvb->adapter, dvb->fe[0]);
3421b778
AT		 495 if (result < 0) {
496 printk(KERN_WARNING "%s: dvb_register_frontend failed (errno = %d)\n",
497 dev->name, result);
f71095be
AP		 498 goto fail_frontend0;
499 }
500
501 /* register 2nd frontend */
502 if (dvb->fe[1]) {
503 result = dvb_register_frontend(&dvb->adapter, dvb->fe[1]);
504 if (result < 0) {
505 printk(KERN_WARNING "%s: 2nd dvb_register_frontend failed (errno = %d)\n",
506 dev->name, result);
507 goto fail_frontend1;
508 }
3421b778
AT		 509 }
510
511 /* register demux stuff */
512 dvb->demux.dmx.capabilities =
513 DMX_TS_FILTERING | DMX_SECTION_FILTERING |
514 DMX_MEMORY_BASED_FILTERING;
515 dvb->demux.priv = dvb;
516 dvb->demux.filternum = 256;
517 dvb->demux.feednum = 256;
518 dvb->demux.start_feed = start_feed;
519 dvb->demux.stop_feed = stop_feed;
e3569abc 520
3421b778
AT		 521 result = dvb_dmx_init(&dvb->demux);
522 if (result < 0) {
523 printk(KERN_WARNING "%s: dvb_dmx_init failed (errno = %d)\n",
524 dev->name, result);
525 goto fail_dmx;
526 }
527
528 dvb->dmxdev.filternum = 256;
529 dvb->dmxdev.demux = &dvb->demux.dmx;
530 dvb->dmxdev.capabilities = 0;
531 result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter);
532 if (result < 0) {
533 printk(KERN_WARNING "%s: dvb_dmxdev_init failed (errno = %d)\n",
534 dev->name, result);
535 goto fail_dmxdev;
536 }
52284c3e 537
3421b778
AT		 538 dvb->fe_hw.source = DMX_FRONTEND_0;
539 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw);
540 if (result < 0) {
541 printk(KERN_WARNING "%s: add_frontend failed (DMX_FRONTEND_0, errno = %d)\n",
542 dev->name, result);
543 goto fail_fe_hw;
544 }
545
546 dvb->fe_mem.source = DMX_MEMORY_FE;
547 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem);
548 if (result < 0) {
549 printk(KERN_WARNING "%s: add_frontend failed (DMX_MEMORY_FE, errno = %d)\n",
550 dev->name, result);
551 goto fail_fe_mem;
552 }
553
554 result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw);
555 if (result < 0) {
556 printk(KERN_WARNING "%s: connect_frontend failed (errno = %d)\n",
557 dev->name, result);
558 goto fail_fe_conn;
559 }
560
561 /* register network adapter */
562 dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx);
563 return 0;
564
565fail_fe_conn:
566 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
567fail_fe_mem:
568 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
569fail_fe_hw:
570 dvb_dmxdev_release(&dvb->dmxdev);
571fail_dmxdev:
572 dvb_dmx_release(&dvb->demux);
573fail_dmx:
f71095be
AP		 574 if (dvb->fe[1])
575 dvb_unregister_frontend(dvb->fe[1]);
576 dvb_unregister_frontend(dvb->fe[0]);
577fail_frontend1:
578 if (dvb->fe[1])
579 dvb_frontend_detach(dvb->fe[1]);
580fail_frontend0:
581 dvb_frontend_detach(dvb->fe[0]);
3421b778
AT		 582 dvb_unregister_adapter(&dvb->adapter);
583fail_adapter:
584 return result;
585}
586
587static void unregister_dvb(struct em28xx_dvb *dvb)
588{
589 dvb_net_release(&dvb->net);
590 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
591 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
592 dvb_dmxdev_release(&dvb->dmxdev);
593 dvb_dmx_release(&dvb->demux);
f71095be
AP		 594 if (dvb->fe[1])
595 dvb_unregister_frontend(dvb->fe[1]);
596 dvb_unregister_frontend(dvb->fe[0]);
597 if (dvb->fe[1])
598 dvb_frontend_detach(dvb->fe[1]);
599 dvb_frontend_detach(dvb->fe[0]);
3421b778
AT		 600 dvb_unregister_adapter(&dvb->adapter);
601}
602
3421b778
AT		 603static int dvb_init(struct em28xx *dev)
604{
605 int result = 0;
606 struct em28xx_dvb *dvb;
607
505b6d0b 608 if (!dev->board.has_dvb) {
df619181 609 /* This device does not support the extension */
ca3dfd6a 610 printk(KERN_INFO "em28xx_dvb: This device does not support the extension\n");
df619181
DH		 611 return 0;
612 }
613
3421b778 614 dvb = kzalloc(sizeof(struct em28xx_dvb), GFP_KERNEL);
6ea54d93
DSL		 615
616 if (dvb == NULL) {
480be185 617 em28xx_info("em28xx_dvb: memory allocation failed\n");
3421b778
AT		 618 return -ENOMEM;
619 }
620 dev->dvb = dvb;
f71095be 621 dvb->fe[0] = dvb->fe[1] = NULL;
3aefb79a 622
5013318c 623 mutex_lock(&dev->lock);
c67ec53f 624 em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
3aefb79a
MCC		 625 /* init frontend */
626 switch (dev->model) {
ebaefdb7 627 case EM2874_BOARD_LEADERSHIP_ISDBT:
f71095be 628 dvb->fe[0] = dvb_attach(s921_attach,
ca3dfd6a
MCC		 629 &sharp_isdbt, &dev->i2c_adap);
630
f71095be 631 if (!dvb->fe[0]) {
ca3dfd6a
MCC		 632 result = -EINVAL;
633 goto out_free;
634 }
635
636 break;
f89bc329 637 case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850:
10ac6603 638 case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950:
4fd305b2 639 case EM2880_BOARD_PINNACLE_PCTV_HD_PRO:
e14b3658 640 case EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600:
f71095be 641 dvb->fe[0] = dvb_attach(lgdt330x_attach,
3421b778
AT		 642 &em2880_lgdt3303_dev,
643 &dev->i2c_adap);
644 if (attach_xc3028(0x61, dev) < 0) {
645 result = -EINVAL;
646 goto out_free;
647 }
227ad4ab 648 break;
46510b56 649 case EM2880_BOARD_KWORLD_DVB_310U:
f71095be 650 dvb->fe[0] = dvb_attach(zl10353_attach,
3421b778
AT		 651 &em28xx_zl10353_with_xc3028,
652 &dev->i2c_adap);
653 if (attach_xc3028(0x61, dev) < 0) {
654 result = -EINVAL;
655 goto out_free;
656 }
7e6388a1 657 break;
a84f79ae 658 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900:
ec994d05 659 case EM2882_BOARD_TERRATEC_HYBRID_XS:
01a5fd6f 660 case EM2880_BOARD_EMPIRE_DUAL_TV:
f71095be 661 dvb->fe[0] = dvb_attach(zl10353_attach,
a84f79ae
DH		 662 &em28xx_zl10353_xc3028_no_i2c_gate,
663 &dev->i2c_adap);
664 if (attach_xc3028(0x61, dev) < 0) {
665 result = -EINVAL;
666 goto out_free;
667 }
668 break;
f797608c 669 case EM2880_BOARD_TERRATEC_HYBRID_XS:
65638011 670 case EM2880_BOARD_TERRATEC_HYBRID_XS_FR:
d5b3ba9c 671 case EM2881_BOARD_PINNACLE_HYBRID_PRO:
7ca7ef60 672 case EM2882_BOARD_DIKOM_DK300:
811fab62 673 case EM2882_BOARD_KWORLD_VS_DVBT:
f71095be 674 dvb->fe[0] = dvb_attach(zl10353_attach,
a84f79ae 675 &em28xx_zl10353_xc3028_no_i2c_gate,
f797608c 676 &dev->i2c_adap);
f71095be 677 if (dvb->fe[0] == NULL) {
f797608c
DH		 678 /* This board could have either a zl10353 or a mt352.
679 If the chip id isn't for zl10353, try mt352 */
f71095be 680 dvb->fe[0] = dvb_attach(mt352_attach,
4fb202a8
DH		 681 &terratec_xs_mt352_cfg,
682 &dev->i2c_adap);
f797608c 683 }
4fb202a8 684
f797608c
DH		 685 if (attach_xc3028(0x61, dev) < 0) {
686 result = -EINVAL;
687 goto out_free;
688 }
689 break;
6e7b9ea0 690 case EM2883_BOARD_KWORLD_HYBRID_330U:
19859229 691 case EM2882_BOARD_EVGA_INDTUBE:
f71095be 692 dvb->fe[0] = dvb_attach(s5h1409_attach,
6e7b9ea0
RK		 693 &em28xx_s5h1409_with_xc3028,
694 &dev->i2c_adap);
695 if (attach_xc3028(0x61, dev) < 0) {
696 result = -EINVAL;
697 goto out_free;
698 }
699 break;
d7de5d8f 700 case EM2882_BOARD_KWORLD_ATSC_315U:
f71095be 701 dvb->fe[0] = dvb_attach(lgdt330x_attach,
d7de5d8f
FM		 702 &em2880_lgdt3303_dev,
703 &dev->i2c_adap);
f71095be
AP		 704 if (dvb->fe[0] != NULL) {
705 if (!dvb_attach(simple_tuner_attach, dvb->fe[0],
d7de5d8f
FM		 706 &dev->i2c_adap, 0x61, TUNER_THOMSON_DTT761X)) {
707 result = -EINVAL;
708 goto out_free;
709 }
710 }
711 break;
17d9d558 712 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2:
ad9b4bb2 713 case EM2882_BOARD_PINNACLE_HYBRID_PRO_330E:
f71095be 714 dvb->fe[0] = dvb_attach(drxd_attach, &em28xx_drxd, NULL,
75e2b869 715 &dev->i2c_adap, &dev->udev->dev);
17d9d558
DH		 716 if (attach_xc3028(0x61, dev) < 0) {
717 result = -EINVAL;
718 goto out_free;
719 }
720 break;
285eb1a4
AP		 721 case EM2870_BOARD_REDDO_DVB_C_USB_BOX:
722 /* Philips CU1216L NIM (Philips TDA10023 + Infineon TUA6034) */
f71095be 723 dvb->fe[0] = dvb_attach(tda10023_attach,
285eb1a4
AP		 724 &em28xx_tda10023_config,
725 &dev->i2c_adap, 0x48);
f71095be
AP		 726 if (dvb->fe[0]) {
727 if (!dvb_attach(simple_tuner_attach, dvb->fe[0],
285eb1a4
AP		 728 &dev->i2c_adap, 0x60, TUNER_PHILIPS_CU1216L)) {
729 result = -EINVAL;
730 goto out_free;
731 }
732 }
733 break;
7e48b30a 734 case EM2870_BOARD_KWORLD_A340:
f71095be 735 dvb->fe[0] = dvb_attach(lgdt3305_attach,
7e48b30a
JW		 736 &em2870_lgdt3304_dev,
737 &dev->i2c_adap);
f71095be
AP		 738 if (dvb->fe[0] != NULL)
739 dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
7e48b30a
JW		 740 &dev->i2c_adap, &kworld_a340_config);
741 break;
d6a5f921
AP		 742 case EM28174_BOARD_PCTV_290E:
743 /* MFE
744 * FE 0 = DVB-T/T2 + FE 1 = DVB-C, both sharing same tuner. */
745 /* FE 0 */
746 dvb->fe[0] = dvb_attach(cxd2820r_attach,
747 &em28xx_cxd2820r_config, &dev->i2c_adap, NULL);
748 if (dvb->fe[0]) {
749 struct i2c_adapter *i2c_tuner;
750 i2c_tuner = cxd2820r_get_tuner_i2c_adapter(dvb->fe[0]);
751 /* FE 0 attach tuner */
752 if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
753 i2c_tuner, &em28xx_cxd2820r_tda18271_config)) {
754 dvb_frontend_detach(dvb->fe[0]);
755 result = -EINVAL;
756 goto out_free;
757 }
758 /* FE 1. This dvb_attach() cannot fail. */
759 dvb->fe[1] = dvb_attach(cxd2820r_attach, NULL, NULL,
760 dvb->fe[0]);
761 dvb->fe[1]->id = 1;
762 /* FE 1 attach tuner */
763 if (!dvb_attach(tda18271_attach, dvb->fe[1], 0x60,
764 i2c_tuner, &em28xx_cxd2820r_tda18271_config)) {
765 dvb_frontend_detach(dvb->fe[1]);
766 /* leave FE 0 still active */
767 }
768 }
fec528b7
MCC		 769 break;
770 case EM2884_BOARD_TERRATEC_H5:
771 terratec_h5_init(dev);
772
773 /* dvb->fe[1] will be DVB-C, and dvb->fe[0] will be DVB-T */
774 dvb->fe[0] = dvb_attach(drxk_attach, &terratec_h5_drxk, &dev->i2c_adap, &dvb->fe[1]);
775 if (!dvb->fe[0] || !dvb->fe[1]) {
776 result = -EINVAL;
777 goto out_free;
778 }
779 /* FIXME: do we need a pll semaphore? */
780 dvb->fe[0]->sec_priv = dvb;
781 sema_init(&dvb->pll_mutex, 1);
782 dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl;
783 dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl;
784 dvb->fe[1]->ops.i2c_gate_ctrl = drxk_gate_ctrl;
785 dvb->fe[1]->id = 1;
786
787 /* Attach tda18271 */
788 if (dvb->fe[0]->ops.i2c_gate_ctrl)
789 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1);
790 if (!dvb_attach(tda18271c2dd_attach, dvb->fe[0], &dev->i2c_adap, 0x60)) {
791 result = -EINVAL;
792 goto out_free;
793 }
794 if (dvb->fe[0]->ops.i2c_gate_ctrl)
795 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0);
796 if (dvb->fe[1]->ops.i2c_gate_ctrl)
797 dvb->fe[1]->ops.i2c_gate_ctrl(dvb->fe[1], 1);
798
d6a5f921 799 break;
3aefb79a 800 default:
480be185
FR		 801 em28xx_errdev("/2: The frontend of your DVB/ATSC card"
802 " isn't supported yet\n");
3aefb79a
MCC		 803 break;
804 }
f71095be 805 if (NULL == dvb->fe[0]) {
480be185 806 em28xx_errdev("/2: frontend initialization failed\n");
3421b778
AT		 807 result = -EINVAL;
808 goto out_free;
3aefb79a 809 }
d7cba043 810 /* define general-purpose callback pointer */
f71095be 811 dvb->fe[0]->callback = em28xx_tuner_callback;
3aefb79a
MCC		 812
813 /* register everything */
3421b778
AT		 814 result = register_dvb(dvb, THIS_MODULE, dev, &dev->udev->dev);
815
6ea54d93 816 if (result < 0)
3421b778 817 goto out_free;
3421b778 818
480be185 819 em28xx_info("Successfully loaded em28xx-dvb\n");
5013318c
MCC		 820ret:
821 em28xx_set_mode(dev, EM28XX_SUSPEND);
822 mutex_unlock(&dev->lock);
823 return result;
3421b778
AT		 824
825out_free:
826 kfree(dvb);
827 dev->dvb = NULL;
5013318c 828 goto ret;
3aefb79a
MCC		 829}
830
831static int dvb_fini(struct em28xx *dev)
832{
505b6d0b 833 if (!dev->board.has_dvb) {
df619181
DH		 834 /* This device does not support the extension */
835 return 0;
836 }
837
3421b778
AT		 838 if (dev->dvb) {
839 unregister_dvb(dev->dvb);
19f48cb1 840 kfree(dev->dvb);
3421b778
AT		 841 dev->dvb = NULL;
842 }
3aefb79a
MCC		 843
844 return 0;
845}
846
847static struct em28xx_ops dvb_ops = {
848 .id = EM28XX_DVB,
849 .name = "Em28xx dvb Extension",
850 .init = dvb_init,
851 .fini = dvb_fini,
852};
853
854static int __init em28xx_dvb_register(void)
855{
856 return em28xx_register_extension(&dvb_ops);
857}
858
859static void __exit em28xx_dvb_unregister(void)
860{
861 em28xx_unregister_extension(&dvb_ops);
862}
863
864module_init(em28xx_dvb_register);
865module_exit(em28xx_dvb_unregister);
kernel source for telekom puls (alcatel/mediatek)