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[media] tda10071: NXP TDA10071 DVB-S/S2 driver
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / em28xx / em28xx-dvb.c
CommitLineData
3aefb79a
MCC		 1/*
2 DVB device driver for em28xx
3
fec528b7 4 (c) 2008-2011 Mauro Carvalho Chehab <mchehab@infradead.org>
3aefb79a 5
bdfbf952
DH		 6 (c) 2008 Devin Heitmueller <devin.heitmueller@gmail.com>
7 - Fixes for the driver to properly work with HVR-950
4fd305b2 8 - Fixes for the driver to properly work with Pinnacle PCTV HD Pro Stick
e14b3658 9 - Fixes for the driver to properly work with AMD ATI TV Wonder HD 600
bdfbf952 10
3421b778
AT		 11 (c) 2008 Aidan Thornton <makosoft@googlemail.com>
12
13 Based on cx88-dvb, saa7134-dvb and videobuf-dvb originally written by:
3aefb79a
MCC		 14 (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
15 (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
16
17 This program is free software; you can redistribute it and/or modify
18 it under the terms of the GNU General Public License as published by
19 the Free Software Foundation; either version 2 of the License.
20 */
21
22#include <linux/kernel.h>
5a0e3ad6 23#include <linux/slab.h>
3aefb79a
MCC		 24#include <linux/usb.h>
25
26#include "em28xx.h"
27#include <media/v4l2-common.h>
28#include <media/videobuf-vmalloc.h>
d7de5d8f
FM		 29#include <media/tuner.h>
30#include "tuner-simple.h"
3aefb79a
MCC		 31
32#include "lgdt330x.h"
7e48b30a 33#include "lgdt3305.h"
7e6388a1 34#include "zl10353.h"
6e7b9ea0 35#include "s5h1409.h"
4fb202a8
DH		 36#include "mt352.h"
37#include "mt352_priv.h" /* FIXME */
285eb1a4 38#include "tda1002x.h"
7e48b30a 39#include "tda18271.h"
ca3dfd6a 40#include "s921.h"
75e2b869 41#include "drxd.h"
d6a5f921 42#include "cxd2820r.h"
fec528b7
MCC		 43#include "tda18271c2dd.h"
44#include "drxk.h"
3aefb79a
MCC		 45
46MODULE_DESCRIPTION("driver for em28xx based DVB cards");
47MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
48MODULE_LICENSE("GPL");
49
50static unsigned int debug;
51module_param(debug, int, 0644);
52MODULE_PARM_DESC(debug, "enable debug messages [dvb]");
53
54DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
55
56#define dprintk(level, fmt, arg...) do { \
57if (debug >= level) \
3421b778 58 printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->name, ## arg); \
3aefb79a
MCC		 59} while (0)
60
3421b778 61#define EM28XX_DVB_NUM_BUFS 5
3421b778
AT		 62#define EM28XX_DVB_MAX_PACKETS 64
63
64struct em28xx_dvb {
f71095be 65 struct dvb_frontend *fe[2];
3421b778
AT		 66
67 /* feed count management */
68 struct mutex lock;
69 int nfeeds;
70
71 /* general boilerplate stuff */
72 struct dvb_adapter adapter;
73 struct dvb_demux demux;
74 struct dmxdev dmxdev;
75 struct dmx_frontend fe_hw;
76 struct dmx_frontend fe_mem;
77 struct dvb_net net;
fec528b7 78
c4c3a3d3 79 /* Due to DRX-K - probably need changes */
fec528b7
MCC		 80 int (*gate_ctrl)(struct dvb_frontend *, int);
81 struct semaphore pll_mutex;
c4c3a3d3 82 bool dont_attach_fe1;
3421b778
AT		 83};
84
85
86static inline void print_err_status(struct em28xx *dev,
87 int packet, int status)
3aefb79a 88{
3421b778 89 char *errmsg = "Unknown";
3aefb79a 90
3421b778
AT		 91 switch (status) {
92 case -ENOENT:
93 errmsg = "unlinked synchronuously";
94 break;
95 case -ECONNRESET:
96 errmsg = "unlinked asynchronuously";
97 break;
98 case -ENOSR:
99 errmsg = "Buffer error (overrun)";
100 break;
101 case -EPIPE:
102 errmsg = "Stalled (device not responding)";
103 break;
104 case -EOVERFLOW:
105 errmsg = "Babble (bad cable?)";
106 break;
107 case -EPROTO:
108 errmsg = "Bit-stuff error (bad cable?)";
109 break;
110 case -EILSEQ:
111 errmsg = "CRC/Timeout (could be anything)";
112 break;
113 case -ETIME:
114 errmsg = "Device does not respond";
115 break;
116 }
117 if (packet < 0) {
118 dprintk(1, "URB status %d [%s].\n", status, errmsg);
119 } else {
6ea54d93
DSL		 120 dprintk(1, "URB packet %d, status %d [%s].\n",
121 packet, status, errmsg);
3421b778
AT		 122 }
123}
3aefb79a 124
f2d0c1c6 125static inline int em28xx_dvb_isoc_copy(struct em28xx *dev, struct urb *urb)
3421b778
AT		 126{
127 int i;
3aefb79a 128
3421b778
AT		 129 if (!dev)
130 return 0;
3aefb79a 131
3421b778
AT		 132 if ((dev->state & DEV_DISCONNECTED) || (dev->state & DEV_MISCONFIGURED))
133 return 0;
134
135 if (urb->status < 0) {
136 print_err_status(dev, -1, urb->status);
137 if (urb->status == -ENOENT)
138 return 0;
139 }
140
141 for (i = 0; i < urb->number_of_packets; i++) {
142 int status = urb->iso_frame_desc[i].status;
143
144 if (status < 0) {
145 print_err_status(dev, i, status);
146 if (urb->iso_frame_desc[i].status != -EPROTO)
147 continue;
148 }
149
150 dvb_dmx_swfilter(&dev->dvb->demux, urb->transfer_buffer +
151 urb->iso_frame_desc[i].offset,
152 urb->iso_frame_desc[i].actual_length);
153 }
154
155 return 0;
156}
157
f2d0c1c6 158static int em28xx_start_streaming(struct em28xx_dvb *dvb)
6ea54d93 159{
c67ec53f 160 int rc;
3421b778 161 struct em28xx *dev = dvb->adapter.priv;
d18e2fda 162 int max_dvb_packet_size;
3421b778
AT		 163
164 usb_set_interface(dev->udev, 0, 1);
c67ec53f
MCC		 165 rc = em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
166 if (rc < 0)
167 return rc;
3421b778 168
d18e2fda 169 max_dvb_packet_size = em28xx_isoc_dvb_max_packetsize(dev);
f7acc4bb
MCC		 170 if (max_dvb_packet_size < 0)
171 return max_dvb_packet_size;
172 dprintk(1, "Using %d buffers each with %d bytes\n",
173 EM28XX_DVB_NUM_BUFS,
174 max_dvb_packet_size);
d18e2fda 175
3421b778 176 return em28xx_init_isoc(dev, EM28XX_DVB_MAX_PACKETS,
d18e2fda 177 EM28XX_DVB_NUM_BUFS, max_dvb_packet_size,
f2d0c1c6 178 em28xx_dvb_isoc_copy);
3421b778
AT		 179}
180
f2d0c1c6 181static int em28xx_stop_streaming(struct em28xx_dvb *dvb)
6ea54d93 182{
3421b778
AT		 183 struct em28xx *dev = dvb->adapter.priv;
184
185 em28xx_uninit_isoc(dev);
c67ec53f 186
2fe3e2ee 187 em28xx_set_mode(dev, EM28XX_SUSPEND);
c67ec53f 188
3aefb79a
MCC		 189 return 0;
190}
191
f2d0c1c6 192static int em28xx_start_feed(struct dvb_demux_feed *feed)
3421b778
AT		 193{
194 struct dvb_demux *demux = feed->demux;
195 struct em28xx_dvb *dvb = demux->priv;
196 int rc, ret;
197
198 if (!demux->dmx.frontend)
199 return -EINVAL;
200
201 mutex_lock(&dvb->lock);
202 dvb->nfeeds++;
203 rc = dvb->nfeeds;
204
205 if (dvb->nfeeds == 1) {
f2d0c1c6 206 ret = em28xx_start_streaming(dvb);
6ea54d93
DSL		 207 if (ret < 0)
208 rc = ret;
3421b778
AT		 209 }
210
211 mutex_unlock(&dvb->lock);
212 return rc;
213}
214
f2d0c1c6 215static int em28xx_stop_feed(struct dvb_demux_feed *feed)
3421b778
AT		 216{
217 struct dvb_demux *demux = feed->demux;
218 struct em28xx_dvb *dvb = demux->priv;
219 int err = 0;
220
221 mutex_lock(&dvb->lock);
222 dvb->nfeeds--;
6ea54d93
DSL		 223
224 if (0 == dvb->nfeeds)
f2d0c1c6 225 err = em28xx_stop_streaming(dvb);
6ea54d93 226
3421b778
AT		 227 mutex_unlock(&dvb->lock);
228 return err;
229}
230
231
e3569abc
MCC		 232
233/* ------------------------------------------------------------------ */
234static int em28xx_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
235{
236 struct em28xx *dev = fe->dvb->priv;
237
238 if (acquire)
239 return em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
240 else
2fe3e2ee 241 return em28xx_set_mode(dev, EM28XX_SUSPEND);
e3569abc
MCC		 242}
243
3aefb79a
MCC		 244/* ------------------------------------------------------------------ */
245
227ad4ab
MCC		 246static struct lgdt330x_config em2880_lgdt3303_dev = {
247 .demod_address = 0x0e,
248 .demod_chip = LGDT3303,
249};
3aefb79a 250
7e48b30a
JW		 251static struct lgdt3305_config em2870_lgdt3304_dev = {
252 .i2c_addr = 0x0e,
253 .demod_chip = LGDT3304,
254 .spectral_inversion = 1,
255 .deny_i2c_rptr = 1,
256 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
257 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
258 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
259 .vsb_if_khz = 3250,
260 .qam_if_khz = 4000,
261};
262
ca3dfd6a
MCC		 263static struct s921_config sharp_isdbt = {
264 .demod_address = 0x30 >> 1
265};
266
7e6388a1
AT		 267static struct zl10353_config em28xx_zl10353_with_xc3028 = {
268 .demod_address = (0x1e >> 1),
269 .no_tuner = 1,
270 .parallel_ts = 1,
271 .if2 = 45600,
272};
273
6e7b9ea0
RK		 274static struct s5h1409_config em28xx_s5h1409_with_xc3028 = {
275 .demod_address = 0x32 >> 1,
276 .output_mode = S5H1409_PARALLEL_OUTPUT,
277 .gpio = S5H1409_GPIO_OFF,
278 .inversion = S5H1409_INVERSION_OFF,
279 .status_mode = S5H1409_DEMODLOCKING,
280 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
281};
282
7e48b30a
JW		 283static struct tda18271_std_map kworld_a340_std_map = {
284 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 0,
285 .if_lvl = 1, .rfagc_top = 0x37, },
286 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 1,
287 .if_lvl = 1, .rfagc_top = 0x37, },
288};
289
290static struct tda18271_config kworld_a340_config = {
291 .std_map = &kworld_a340_std_map,
292};
293
a84f79ae 294static struct zl10353_config em28xx_zl10353_xc3028_no_i2c_gate = {
f797608c
DH		 295 .demod_address = (0x1e >> 1),
296 .no_tuner = 1,
297 .disable_i2c_gate_ctrl = 1,
298 .parallel_ts = 1,
299 .if2 = 45600,
300};
301
75e2b869
DH		 302static struct drxd_config em28xx_drxd = {
303 .index = 0, .demod_address = 0x70, .demod_revision = 0xa2,
304 .demoda_address = 0x00, .pll_address = 0x00,
305 .pll_type = DRXD_PLL_NONE, .clock = 12000, .insert_rs_byte = 1,
306 .pll_set = NULL, .osc_deviation = NULL, .IF = 42800000,
6b142b3c 307 .disable_i2c_gate_ctrl = 1,
17d9d558 308};
17d9d558 309
fec528b7
MCC		 310struct drxk_config terratec_h5_drxk = {
311 .adr = 0x29,
e4f4f875 312 .single_master = 1,
f1fe1b75 313 .no_i2c_bridge = 1,
8b9456ae 314 .microcode_name = "dvb-usb-terratec-h5-drxk.fw",
fec528b7
MCC		 315};
316
317static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
318{
319 struct em28xx_dvb *dvb = fe->sec_priv;
320 int status;
321
322 if (!dvb)
323 return -EINVAL;
324
325 if (enable) {
326 down(&dvb->pll_mutex);
327 status = dvb->gate_ctrl(fe, 1);
328 } else {
329 status = dvb->gate_ctrl(fe, 0);
330 up(&dvb->pll_mutex);
331 }
332 return status;
333}
334
335static void terratec_h5_init(struct em28xx *dev)
336{
337 int i;
338 struct em28xx_reg_seq terratec_h5_init[] = {
339 {EM28XX_R08_GPIO, 0xff, 0xff, 10},
340 {EM2874_R80_GPIO, 0xf6, 0xff, 100},
341 {EM2874_R80_GPIO, 0xf2, 0xff, 50},
342 {EM2874_R80_GPIO, 0xf6, 0xff, 100},
343 { -1, -1, -1, -1},
344 };
345 struct em28xx_reg_seq terratec_h5_end[] = {
346 {EM2874_R80_GPIO, 0xe6, 0xff, 100},
347 {EM2874_R80_GPIO, 0xa6, 0xff, 50},
348 {EM2874_R80_GPIO, 0xe6, 0xff, 100},
349 { -1, -1, -1, -1},
350 };
351 struct {
352 unsigned char r[4];
353 int len;
354 } regs[] = {
355 {{ 0x06, 0x02, 0x00, 0x31 }, 4},
356 {{ 0x01, 0x02 }, 2},
357 {{ 0x01, 0x02, 0x00, 0xc6 }, 4},
358 {{ 0x01, 0x00 }, 2},
359 {{ 0x01, 0x00, 0xff, 0xaf }, 4},
360 {{ 0x01, 0x00, 0x03, 0xa0 }, 4},
361 {{ 0x01, 0x00 }, 2},
362 {{ 0x01, 0x00, 0x73, 0xaf }, 4},
363 {{ 0x04, 0x00 }, 2},
364 {{ 0x00, 0x04 }, 2},
365 {{ 0x00, 0x04, 0x00, 0x0a }, 4},
366 {{ 0x04, 0x14 }, 2},
367 {{ 0x04, 0x14, 0x00, 0x00 }, 4},
368 };
369
370 em28xx_gpio_set(dev, terratec_h5_init);
371 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
372 msleep(10);
373 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45);
374 msleep(10);
375
376 dev->i2c_client.addr = 0x82 >> 1;
377
378 for (i = 0; i < ARRAY_SIZE(regs); i++)
379 i2c_master_send(&dev->i2c_client, regs[i].r, regs[i].len);
380 em28xx_gpio_set(dev, terratec_h5_end);
381};
382
f2d0c1c6 383static int em28xx_mt352_terratec_xs_init(struct dvb_frontend *fe)
4fb202a8
DH		 384{
385 /* Values extracted from a USB trace of the Terratec Windows driver */
386 static u8 clock_config[] = { CLOCK_CTL, 0x38, 0x2c };
387 static u8 reset[] = { RESET, 0x80 };
388 static u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
389 static u8 agc_cfg[] = { AGC_TARGET, 0x28, 0xa0 };
390 static u8 input_freq_cfg[] = { INPUT_FREQ_1, 0x31, 0xb8 };
391 static u8 rs_err_cfg[] = { RS_ERR_PER_1, 0x00, 0x4d };
392 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
393 static u8 trl_nom_cfg[] = { TRL_NOMINAL_RATE_1, 0x64, 0x00 };
394 static u8 tps_given_cfg[] = { TPS_GIVEN_1, 0x40, 0x80, 0x50 };
ff69786b 395 static u8 tuner_go[] = { TUNER_GO, 0x01};
4fb202a8
DH		 396
397 mt352_write(fe, clock_config, sizeof(clock_config));
398 udelay(200);
399 mt352_write(fe, reset, sizeof(reset));
400 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
401 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
402 mt352_write(fe, input_freq_cfg, sizeof(input_freq_cfg));
403 mt352_write(fe, rs_err_cfg, sizeof(rs_err_cfg));
404 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
405 mt352_write(fe, trl_nom_cfg, sizeof(trl_nom_cfg));
406 mt352_write(fe, tps_given_cfg, sizeof(tps_given_cfg));
407 mt352_write(fe, tuner_go, sizeof(tuner_go));
408 return 0;
409}
410
411static struct mt352_config terratec_xs_mt352_cfg = {
412 .demod_address = (0x1e >> 1),
413 .no_tuner = 1,
414 .if2 = 45600,
f2d0c1c6 415 .demod_init = em28xx_mt352_terratec_xs_init,
4fb202a8
DH		 416};
417
285eb1a4
AP		 418static struct tda10023_config em28xx_tda10023_config = {
419 .demod_address = 0x0c,
420 .invert = 1,
421};
422
d6a5f921
AP		 423static struct cxd2820r_config em28xx_cxd2820r_config = {
424 .i2c_address = (0xd8 >> 1),
425 .ts_mode = CXD2820R_TS_SERIAL,
426 .if_dvbt_6 = 3300,
427 .if_dvbt_7 = 3500,
428 .if_dvbt_8 = 4000,
429 .if_dvbt2_6 = 3300,
430 .if_dvbt2_7 = 3500,
431 .if_dvbt2_8 = 4000,
432 .if_dvbc = 5000,
433
434 /* enable LNA for DVB-T2 and DVB-C */
435 .gpio_dvbt2[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L,
436 .gpio_dvbc[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L,
437};
438
439static struct tda18271_config em28xx_cxd2820r_tda18271_config = {
440 .output_opt = TDA18271_OUTPUT_LT_OFF,
0db4bf42 441 .gate = TDA18271_GATE_DIGITAL,
d6a5f921
AP		 442};
443
3aefb79a
MCC		 444/* ------------------------------------------------------------------ */
445
f2d0c1c6 446static int em28xx_attach_xc3028(u8 addr, struct em28xx *dev)
3aefb79a
MCC		 447{
448 struct dvb_frontend *fe;
3ca9c093
MCC		 449 struct xc2028_config cfg;
450
6ea54d93 451 memset(&cfg, 0, sizeof(cfg));
3ca9c093
MCC		 452 cfg.i2c_adap = &dev->i2c_adap;
453 cfg.i2c_addr = addr;
3ca9c093 454
f71095be 455 if (!dev->dvb->fe[0]) {
480be185
FR		 456 em28xx_errdev("/2: dvb frontend not attached. "
457 "Can't attach xc3028\n");
3aefb79a
MCC		 458 return -EINVAL;
459 }
460
f71095be 461 fe = dvb_attach(xc2028_attach, dev->dvb->fe[0], &cfg);
3aefb79a 462 if (!fe) {
480be185 463 em28xx_errdev("/2: xc3028 attach failed\n");
f71095be
AP		 464 dvb_frontend_detach(dev->dvb->fe[0]);
465 dev->dvb->fe[0] = NULL;
3aefb79a
MCC		 466 return -EINVAL;
467 }
468
480be185 469 em28xx_info("%s/2: xc3028 attached\n", dev->name);
3aefb79a
MCC		 470
471 return 0;
472}
473
3421b778
AT		 474/* ------------------------------------------------------------------ */
475
f2d0c1c6
JW		 476static int em28xx_register_dvb(struct em28xx_dvb *dvb, struct module *module,
477 struct em28xx *dev, struct device *device)
3aefb79a 478{
3421b778 479 int result;
3aefb79a 480
3421b778 481 mutex_init(&dvb->lock);
3aefb79a 482
3421b778
AT		 483 /* register adapter */
484 result = dvb_register_adapter(&dvb->adapter, dev->name, module, device,
485 adapter_nr);
486 if (result < 0) {
487 printk(KERN_WARNING "%s: dvb_register_adapter failed (errno = %d)\n",
488 dev->name, result);
489 goto fail_adapter;
490 }
e3569abc
MCC		 491
492 /* Ensure all frontends negotiate bus access */
f71095be
AP		 493 dvb->fe[0]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl;
494 if (dvb->fe[1])
495 dvb->fe[1]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl;
e3569abc 496
3421b778
AT		 497 dvb->adapter.priv = dev;
498
499 /* register frontend */
f71095be 500 result = dvb_register_frontend(&dvb->adapter, dvb->fe[0]);
3421b778
AT		 501 if (result < 0) {
502 printk(KERN_WARNING "%s: dvb_register_frontend failed (errno = %d)\n",
503 dev->name, result);
f71095be
AP		 504 goto fail_frontend0;
505 }
506
507 /* register 2nd frontend */
508 if (dvb->fe[1]) {
509 result = dvb_register_frontend(&dvb->adapter, dvb->fe[1]);
510 if (result < 0) {
511 printk(KERN_WARNING "%s: 2nd dvb_register_frontend failed (errno = %d)\n",
512 dev->name, result);
513 goto fail_frontend1;
514 }
3421b778
AT		 515 }
516
517 /* register demux stuff */
518 dvb->demux.dmx.capabilities =
519 DMX_TS_FILTERING | DMX_SECTION_FILTERING |
520 DMX_MEMORY_BASED_FILTERING;
521 dvb->demux.priv = dvb;
522 dvb->demux.filternum = 256;
523 dvb->demux.feednum = 256;
f2d0c1c6
JW		 524 dvb->demux.start_feed = em28xx_start_feed;
525 dvb->demux.stop_feed = em28xx_stop_feed;
e3569abc 526
3421b778
AT		 527 result = dvb_dmx_init(&dvb->demux);
528 if (result < 0) {
529 printk(KERN_WARNING "%s: dvb_dmx_init failed (errno = %d)\n",
530 dev->name, result);
531 goto fail_dmx;
532 }
533
534 dvb->dmxdev.filternum = 256;
535 dvb->dmxdev.demux = &dvb->demux.dmx;
536 dvb->dmxdev.capabilities = 0;
537 result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter);
538 if (result < 0) {
539 printk(KERN_WARNING "%s: dvb_dmxdev_init failed (errno = %d)\n",
540 dev->name, result);
541 goto fail_dmxdev;
542 }
52284c3e 543
3421b778
AT		 544 dvb->fe_hw.source = DMX_FRONTEND_0;
545 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw);
546 if (result < 0) {
547 printk(KERN_WARNING "%s: add_frontend failed (DMX_FRONTEND_0, errno = %d)\n",
548 dev->name, result);
549 goto fail_fe_hw;
550 }
551
552 dvb->fe_mem.source = DMX_MEMORY_FE;
553 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem);
554 if (result < 0) {
555 printk(KERN_WARNING "%s: add_frontend failed (DMX_MEMORY_FE, errno = %d)\n",
556 dev->name, result);
557 goto fail_fe_mem;
558 }
559
560 result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw);
561 if (result < 0) {
562 printk(KERN_WARNING "%s: connect_frontend failed (errno = %d)\n",
563 dev->name, result);
564 goto fail_fe_conn;
565 }
566
567 /* register network adapter */
568 dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx);
569 return 0;
570
571fail_fe_conn:
572 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
573fail_fe_mem:
574 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
575fail_fe_hw:
576 dvb_dmxdev_release(&dvb->dmxdev);
577fail_dmxdev:
578 dvb_dmx_release(&dvb->demux);
579fail_dmx:
f71095be
AP		 580 if (dvb->fe[1])
581 dvb_unregister_frontend(dvb->fe[1]);
582 dvb_unregister_frontend(dvb->fe[0]);
583fail_frontend1:
584 if (dvb->fe[1])
585 dvb_frontend_detach(dvb->fe[1]);
586fail_frontend0:
587 dvb_frontend_detach(dvb->fe[0]);
3421b778
AT		 588 dvb_unregister_adapter(&dvb->adapter);
589fail_adapter:
590 return result;
591}
592
f2d0c1c6 593static void em28xx_unregister_dvb(struct em28xx_dvb *dvb)
3421b778
AT		 594{
595 dvb_net_release(&dvb->net);
596 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
597 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
598 dvb_dmxdev_release(&dvb->dmxdev);
599 dvb_dmx_release(&dvb->demux);
f71095be
AP		 600 if (dvb->fe[1])
601 dvb_unregister_frontend(dvb->fe[1]);
602 dvb_unregister_frontend(dvb->fe[0]);
c4c3a3d3 603 if (dvb->fe[1] && !dvb->dont_attach_fe1)
f71095be
AP		 604 dvb_frontend_detach(dvb->fe[1]);
605 dvb_frontend_detach(dvb->fe[0]);
3421b778
AT		 606 dvb_unregister_adapter(&dvb->adapter);
607}
608
f2d0c1c6 609static int em28xx_dvb_init(struct em28xx *dev)
3421b778 610{
e3645437 611 int result = 0, mfe_shared = 0;
3421b778
AT		 612 struct em28xx_dvb *dvb;
613
505b6d0b 614 if (!dev->board.has_dvb) {
df619181 615 /* This device does not support the extension */
ca3dfd6a 616 printk(KERN_INFO "em28xx_dvb: This device does not support the extension\n");
df619181
DH		 617 return 0;
618 }
619
3421b778 620 dvb = kzalloc(sizeof(struct em28xx_dvb), GFP_KERNEL);
6ea54d93
DSL		 621
622 if (dvb == NULL) {
480be185 623 em28xx_info("em28xx_dvb: memory allocation failed\n");
3421b778
AT		 624 return -ENOMEM;
625 }
626 dev->dvb = dvb;
f71095be 627 dvb->fe[0] = dvb->fe[1] = NULL;
3aefb79a 628
5013318c 629 mutex_lock(&dev->lock);
c67ec53f 630 em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
3aefb79a
MCC		 631 /* init frontend */
632 switch (dev->model) {
ebaefdb7 633 case EM2874_BOARD_LEADERSHIP_ISDBT:
f71095be 634 dvb->fe[0] = dvb_attach(s921_attach,
ca3dfd6a
MCC		 635 &sharp_isdbt, &dev->i2c_adap);
636
f71095be 637 if (!dvb->fe[0]) {
ca3dfd6a
MCC		 638 result = -EINVAL;
639 goto out_free;
640 }
641
642 break;
f89bc329 643 case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850:
10ac6603 644 case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950:
4fd305b2 645 case EM2880_BOARD_PINNACLE_PCTV_HD_PRO:
e14b3658 646 case EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600:
f71095be 647 dvb->fe[0] = dvb_attach(lgdt330x_attach,
3421b778
AT		 648 &em2880_lgdt3303_dev,
649 &dev->i2c_adap);
f2d0c1c6 650 if (em28xx_attach_xc3028(0x61, dev) < 0) {
3421b778
AT		 651 result = -EINVAL;
652 goto out_free;
653 }
227ad4ab 654 break;
46510b56 655 case EM2880_BOARD_KWORLD_DVB_310U:
f71095be 656 dvb->fe[0] = dvb_attach(zl10353_attach,
3421b778
AT		 657 &em28xx_zl10353_with_xc3028,
658 &dev->i2c_adap);
f2d0c1c6 659 if (em28xx_attach_xc3028(0x61, dev) < 0) {
3421b778
AT		 660 result = -EINVAL;
661 goto out_free;
662 }
7e6388a1 663 break;
a84f79ae 664 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900:
ec994d05 665 case EM2882_BOARD_TERRATEC_HYBRID_XS:
01a5fd6f 666 case EM2880_BOARD_EMPIRE_DUAL_TV:
f71095be 667 dvb->fe[0] = dvb_attach(zl10353_attach,
a84f79ae
DH		 668 &em28xx_zl10353_xc3028_no_i2c_gate,
669 &dev->i2c_adap);
f2d0c1c6 670 if (em28xx_attach_xc3028(0x61, dev) < 0) {
a84f79ae
DH		 671 result = -EINVAL;
672 goto out_free;
673 }
674 break;
f797608c 675 case EM2880_BOARD_TERRATEC_HYBRID_XS:
65638011 676 case EM2880_BOARD_TERRATEC_HYBRID_XS_FR:
d5b3ba9c 677 case EM2881_BOARD_PINNACLE_HYBRID_PRO:
7ca7ef60 678 case EM2882_BOARD_DIKOM_DK300:
811fab62 679 case EM2882_BOARD_KWORLD_VS_DVBT:
f71095be 680 dvb->fe[0] = dvb_attach(zl10353_attach,
a84f79ae 681 &em28xx_zl10353_xc3028_no_i2c_gate,
f797608c 682 &dev->i2c_adap);
f71095be 683 if (dvb->fe[0] == NULL) {
f797608c
DH		 684 /* This board could have either a zl10353 or a mt352.
685 If the chip id isn't for zl10353, try mt352 */
f71095be 686 dvb->fe[0] = dvb_attach(mt352_attach,
4fb202a8
DH		 687 &terratec_xs_mt352_cfg,
688 &dev->i2c_adap);
f797608c 689 }
4fb202a8 690
f2d0c1c6 691 if (em28xx_attach_xc3028(0x61, dev) < 0) {
f797608c
DH		 692 result = -EINVAL;
693 goto out_free;
694 }
695 break;
6e7b9ea0 696 case EM2883_BOARD_KWORLD_HYBRID_330U:
19859229 697 case EM2882_BOARD_EVGA_INDTUBE:
f71095be 698 dvb->fe[0] = dvb_attach(s5h1409_attach,
6e7b9ea0
RK		 699 &em28xx_s5h1409_with_xc3028,
700 &dev->i2c_adap);
f2d0c1c6 701 if (em28xx_attach_xc3028(0x61, dev) < 0) {
6e7b9ea0
RK		 702 result = -EINVAL;
703 goto out_free;
704 }
705 break;
d7de5d8f 706 case EM2882_BOARD_KWORLD_ATSC_315U:
f71095be 707 dvb->fe[0] = dvb_attach(lgdt330x_attach,
d7de5d8f
FM		 708 &em2880_lgdt3303_dev,
709 &dev->i2c_adap);
f71095be
AP		 710 if (dvb->fe[0] != NULL) {
711 if (!dvb_attach(simple_tuner_attach, dvb->fe[0],
d7de5d8f
FM		 712 &dev->i2c_adap, 0x61, TUNER_THOMSON_DTT761X)) {
713 result = -EINVAL;
714 goto out_free;
715 }
716 }
717 break;
17d9d558 718 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2:
ad9b4bb2 719 case EM2882_BOARD_PINNACLE_HYBRID_PRO_330E:
f71095be 720 dvb->fe[0] = dvb_attach(drxd_attach, &em28xx_drxd, NULL,
75e2b869 721 &dev->i2c_adap, &dev->udev->dev);
f2d0c1c6 722 if (em28xx_attach_xc3028(0x61, dev) < 0) {
17d9d558
DH		 723 result = -EINVAL;
724 goto out_free;
725 }
726 break;
285eb1a4
AP		 727 case EM2870_BOARD_REDDO_DVB_C_USB_BOX:
728 /* Philips CU1216L NIM (Philips TDA10023 + Infineon TUA6034) */
f71095be 729 dvb->fe[0] = dvb_attach(tda10023_attach,
285eb1a4
AP		 730 &em28xx_tda10023_config,
731 &dev->i2c_adap, 0x48);
f71095be
AP		 732 if (dvb->fe[0]) {
733 if (!dvb_attach(simple_tuner_attach, dvb->fe[0],
285eb1a4
AP		 734 &dev->i2c_adap, 0x60, TUNER_PHILIPS_CU1216L)) {
735 result = -EINVAL;
736 goto out_free;
737 }
738 }
739 break;
7e48b30a 740 case EM2870_BOARD_KWORLD_A340:
f71095be 741 dvb->fe[0] = dvb_attach(lgdt3305_attach,
7e48b30a
JW		 742 &em2870_lgdt3304_dev,
743 &dev->i2c_adap);
f71095be
AP		 744 if (dvb->fe[0] != NULL)
745 dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
7e48b30a
JW		 746 &dev->i2c_adap, &kworld_a340_config);
747 break;
d6a5f921
AP		 748 case EM28174_BOARD_PCTV_290E:
749 /* MFE
750 * FE 0 = DVB-T/T2 + FE 1 = DVB-C, both sharing same tuner. */
751 /* FE 0 */
752 dvb->fe[0] = dvb_attach(cxd2820r_attach,
753 &em28xx_cxd2820r_config, &dev->i2c_adap, NULL);
754 if (dvb->fe[0]) {
d6a5f921
AP		 755 /* FE 0 attach tuner */
756 if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
0db4bf42 757 &dev->i2c_adap, &em28xx_cxd2820r_tda18271_config)) {
d6a5f921
AP		 758 dvb_frontend_detach(dvb->fe[0]);
759 result = -EINVAL;
760 goto out_free;
761 }
762 /* FE 1. This dvb_attach() cannot fail. */
763 dvb->fe[1] = dvb_attach(cxd2820r_attach, NULL, NULL,
764 dvb->fe[0]);
765 dvb->fe[1]->id = 1;
766 /* FE 1 attach tuner */
767 if (!dvb_attach(tda18271_attach, dvb->fe[1], 0x60,
0db4bf42 768 &dev->i2c_adap, &em28xx_cxd2820r_tda18271_config)) {
d6a5f921
AP		 769 dvb_frontend_detach(dvb->fe[1]);
770 /* leave FE 0 still active */
771 }
e3645437
AP		 772
773 mfe_shared = 1;
d6a5f921 774 }
fec528b7
MCC		 775 break;
776 case EM2884_BOARD_TERRATEC_H5:
777 terratec_h5_init(dev);
778
c4c3a3d3
MCC		 779 dvb->dont_attach_fe1 = 1;
780
fec528b7 781 dvb->fe[0] = dvb_attach(drxk_attach, &terratec_h5_drxk, &dev->i2c_adap, &dvb->fe[1]);
c4c3a3d3 782 if (!dvb->fe[0]) {
fec528b7
MCC		 783 result = -EINVAL;
784 goto out_free;
785 }
c4c3a3d3 786
fec528b7
MCC		 787 /* FIXME: do we need a pll semaphore? */
788 dvb->fe[0]->sec_priv = dvb;
789 sema_init(&dvb->pll_mutex, 1);
790 dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl;
791 dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl;
fec528b7
MCC		 792 dvb->fe[1]->id = 1;
793
c4c3a3d3 794 /* Attach tda18271 to DVB-C frontend */
fec528b7
MCC		 795 if (dvb->fe[0]->ops.i2c_gate_ctrl)
796 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1);
797 if (!dvb_attach(tda18271c2dd_attach, dvb->fe[0], &dev->i2c_adap, 0x60)) {
798 result = -EINVAL;
799 goto out_free;
800 }
801 if (dvb->fe[0]->ops.i2c_gate_ctrl)
802 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0);
c4c3a3d3
MCC		 803
804 /* Hack - needed by drxk/tda18271c2dd */
805 dvb->fe[1]->tuner_priv = dvb->fe[0]->tuner_priv;
806 memcpy(&dvb->fe[1]->ops.tuner_ops,
807 &dvb->fe[0]->ops.tuner_ops,
808 sizeof(dvb->fe[0]->ops.tuner_ops));
fec528b7 809
d6a5f921 810 break;
3aefb79a 811 default:
480be185
FR		 812 em28xx_errdev("/2: The frontend of your DVB/ATSC card"
813 " isn't supported yet\n");
3aefb79a
MCC		 814 break;
815 }
f71095be 816 if (NULL == dvb->fe[0]) {
480be185 817 em28xx_errdev("/2: frontend initialization failed\n");
3421b778
AT		 818 result = -EINVAL;
819 goto out_free;
3aefb79a 820 }
d7cba043 821 /* define general-purpose callback pointer */
f71095be 822 dvb->fe[0]->callback = em28xx_tuner_callback;
3aefb79a
MCC		 823
824 /* register everything */
f2d0c1c6 825 result = em28xx_register_dvb(dvb, THIS_MODULE, dev, &dev->udev->dev);
3421b778 826
6ea54d93 827 if (result < 0)
3421b778 828 goto out_free;
3421b778 829
e3645437
AP		 830 /* MFE lock */
831 dvb->adapter.mfe_shared = mfe_shared;
832
480be185 833 em28xx_info("Successfully loaded em28xx-dvb\n");
5013318c
MCC		 834ret:
835 em28xx_set_mode(dev, EM28XX_SUSPEND);
836 mutex_unlock(&dev->lock);
837 return result;
3421b778
AT		 838
839out_free:
840 kfree(dvb);
841 dev->dvb = NULL;
5013318c 842 goto ret;
3aefb79a
MCC		 843}
844
0b8bd83c
CR		 845static inline void prevent_sleep(struct dvb_frontend_ops *ops)
846{
847 ops->set_voltage = NULL;
848 ops->sleep = NULL;
849 ops->tuner_ops.sleep = NULL;
850}
851
f2d0c1c6 852static int em28xx_dvb_fini(struct em28xx *dev)
3aefb79a 853{
505b6d0b 854 if (!dev->board.has_dvb) {
df619181
DH		 855 /* This device does not support the extension */
856 return 0;
857 }
858
3421b778 859 if (dev->dvb) {
0b8bd83c
CR		 860 struct em28xx_dvb *dvb = dev->dvb;
861
862 if (dev->state & DEV_DISCONNECTED) {
863 /* We cannot tell the device to sleep
864 * once it has been unplugged. */
865 if (dvb->fe[0])
866 prevent_sleep(&dvb->fe[0]->ops);
867 if (dvb->fe[1])
868 prevent_sleep(&dvb->fe[1]->ops);
869 }
870
871 em28xx_unregister_dvb(dvb);
872 kfree(dvb);
3421b778
AT		 873 dev->dvb = NULL;
874 }
3aefb79a
MCC		 875
876 return 0;
877}
878
879static struct em28xx_ops dvb_ops = {
880 .id = EM28XX_DVB,
881 .name = "Em28xx dvb Extension",
f2d0c1c6
JW		 882 .init = em28xx_dvb_init,
883 .fini = em28xx_dvb_fini,
3aefb79a
MCC		 884};
885
886static int __init em28xx_dvb_register(void)
887{
888 return em28xx_register_extension(&dvb_ops);
889}
890
891static void __exit em28xx_dvb_unregister(void)
892{
893 em28xx_unregister_extension(&dvb_ops);
894}
895
896module_init(em28xx_dvb_register);
897module_exit(em28xx_dvb_unregister);
kernel source for telekom puls (alcatel/mediatek)