[media] easycap: fix warnings: variable set but not used
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / em28xx / em28xx-dvb.c
CommitLineData
3aefb79a
MCC
1/*
2 DVB device driver for em28xx
3
fec528b7 4 (c) 2008-2011 Mauro Carvalho Chehab <mchehab@infradead.org>
3aefb79a 5
bdfbf952
DH
6 (c) 2008 Devin Heitmueller <devin.heitmueller@gmail.com>
7 - Fixes for the driver to properly work with HVR-950
4fd305b2 8 - Fixes for the driver to properly work with Pinnacle PCTV HD Pro Stick
e14b3658 9 - Fixes for the driver to properly work with AMD ATI TV Wonder HD 600
bdfbf952 10
3421b778
AT
11 (c) 2008 Aidan Thornton <makosoft@googlemail.com>
12
13 Based on cx88-dvb, saa7134-dvb and videobuf-dvb originally written by:
3aefb79a
MCC
14 (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
15 (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
16
17 This program is free software; you can redistribute it and/or modify
18 it under the terms of the GNU General Public License as published by
19 the Free Software Foundation; either version 2 of the License.
20 */
21
22#include <linux/kernel.h>
5a0e3ad6 23#include <linux/slab.h>
3aefb79a
MCC
24#include <linux/usb.h>
25
26#include "em28xx.h"
27#include <media/v4l2-common.h>
28#include <media/videobuf-vmalloc.h>
d7de5d8f
FM
29#include <media/tuner.h>
30#include "tuner-simple.h"
3aefb79a
MCC
31
32#include "lgdt330x.h"
7e48b30a 33#include "lgdt3305.h"
7e6388a1 34#include "zl10353.h"
6e7b9ea0 35#include "s5h1409.h"
4fb202a8
DH
36#include "mt352.h"
37#include "mt352_priv.h" /* FIXME */
285eb1a4 38#include "tda1002x.h"
7e48b30a 39#include "tda18271.h"
ca3dfd6a 40#include "s921.h"
75e2b869 41#include "drxd.h"
d6a5f921 42#include "cxd2820r.h"
fec528b7
MCC
43#include "tda18271c2dd.h"
44#include "drxk.h"
36588715
AP
45#include "tda10071.h"
46#include "a8293.h"
3aefb79a
MCC
47
48MODULE_DESCRIPTION("driver for em28xx based DVB cards");
49MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
50MODULE_LICENSE("GPL");
51
52static unsigned int debug;
53module_param(debug, int, 0644);
54MODULE_PARM_DESC(debug, "enable debug messages [dvb]");
55
56DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
57
58#define dprintk(level, fmt, arg...) do { \
59if (debug >= level) \
3421b778 60 printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->name, ## arg); \
3aefb79a
MCC
61} while (0)
62
3421b778 63#define EM28XX_DVB_NUM_BUFS 5
3421b778
AT
64#define EM28XX_DVB_MAX_PACKETS 64
65
66struct em28xx_dvb {
f71095be 67 struct dvb_frontend *fe[2];
3421b778
AT
68
69 /* feed count management */
70 struct mutex lock;
71 int nfeeds;
72
73 /* general boilerplate stuff */
74 struct dvb_adapter adapter;
75 struct dvb_demux demux;
76 struct dmxdev dmxdev;
77 struct dmx_frontend fe_hw;
78 struct dmx_frontend fe_mem;
79 struct dvb_net net;
fec528b7 80
c4c3a3d3 81 /* Due to DRX-K - probably need changes */
fec528b7
MCC
82 int (*gate_ctrl)(struct dvb_frontend *, int);
83 struct semaphore pll_mutex;
c4c3a3d3 84 bool dont_attach_fe1;
3421b778
AT
85};
86
87
88static inline void print_err_status(struct em28xx *dev,
89 int packet, int status)
3aefb79a 90{
3421b778 91 char *errmsg = "Unknown";
3aefb79a 92
3421b778
AT
93 switch (status) {
94 case -ENOENT:
95 errmsg = "unlinked synchronuously";
96 break;
97 case -ECONNRESET:
98 errmsg = "unlinked asynchronuously";
99 break;
100 case -ENOSR:
101 errmsg = "Buffer error (overrun)";
102 break;
103 case -EPIPE:
104 errmsg = "Stalled (device not responding)";
105 break;
106 case -EOVERFLOW:
107 errmsg = "Babble (bad cable?)";
108 break;
109 case -EPROTO:
110 errmsg = "Bit-stuff error (bad cable?)";
111 break;
112 case -EILSEQ:
113 errmsg = "CRC/Timeout (could be anything)";
114 break;
115 case -ETIME:
116 errmsg = "Device does not respond";
117 break;
118 }
119 if (packet < 0) {
120 dprintk(1, "URB status %d [%s].\n", status, errmsg);
121 } else {
6ea54d93
DSL
122 dprintk(1, "URB packet %d, status %d [%s].\n",
123 packet, status, errmsg);
3421b778
AT
124 }
125}
3aefb79a 126
f2d0c1c6 127static inline int em28xx_dvb_isoc_copy(struct em28xx *dev, struct urb *urb)
3421b778
AT
128{
129 int i;
3aefb79a 130
3421b778
AT
131 if (!dev)
132 return 0;
3aefb79a 133
3421b778
AT
134 if ((dev->state & DEV_DISCONNECTED) || (dev->state & DEV_MISCONFIGURED))
135 return 0;
136
137 if (urb->status < 0) {
138 print_err_status(dev, -1, urb->status);
139 if (urb->status == -ENOENT)
140 return 0;
141 }
142
143 for (i = 0; i < urb->number_of_packets; i++) {
144 int status = urb->iso_frame_desc[i].status;
145
146 if (status < 0) {
147 print_err_status(dev, i, status);
148 if (urb->iso_frame_desc[i].status != -EPROTO)
149 continue;
150 }
151
152 dvb_dmx_swfilter(&dev->dvb->demux, urb->transfer_buffer +
153 urb->iso_frame_desc[i].offset,
154 urb->iso_frame_desc[i].actual_length);
155 }
156
157 return 0;
158}
159
f2d0c1c6 160static int em28xx_start_streaming(struct em28xx_dvb *dvb)
6ea54d93 161{
c67ec53f 162 int rc;
3421b778 163 struct em28xx *dev = dvb->adapter.priv;
d18e2fda 164 int max_dvb_packet_size;
3421b778
AT
165
166 usb_set_interface(dev->udev, 0, 1);
c67ec53f
MCC
167 rc = em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
168 if (rc < 0)
169 return rc;
3421b778 170
d18e2fda 171 max_dvb_packet_size = em28xx_isoc_dvb_max_packetsize(dev);
f7acc4bb
MCC
172 if (max_dvb_packet_size < 0)
173 return max_dvb_packet_size;
174 dprintk(1, "Using %d buffers each with %d bytes\n",
175 EM28XX_DVB_NUM_BUFS,
176 max_dvb_packet_size);
d18e2fda 177
3421b778 178 return em28xx_init_isoc(dev, EM28XX_DVB_MAX_PACKETS,
d18e2fda 179 EM28XX_DVB_NUM_BUFS, max_dvb_packet_size,
f2d0c1c6 180 em28xx_dvb_isoc_copy);
3421b778
AT
181}
182
f2d0c1c6 183static int em28xx_stop_streaming(struct em28xx_dvb *dvb)
6ea54d93 184{
3421b778
AT
185 struct em28xx *dev = dvb->adapter.priv;
186
187 em28xx_uninit_isoc(dev);
c67ec53f 188
2fe3e2ee 189 em28xx_set_mode(dev, EM28XX_SUSPEND);
c67ec53f 190
3aefb79a
MCC
191 return 0;
192}
193
f2d0c1c6 194static int em28xx_start_feed(struct dvb_demux_feed *feed)
3421b778
AT
195{
196 struct dvb_demux *demux = feed->demux;
197 struct em28xx_dvb *dvb = demux->priv;
198 int rc, ret;
199
200 if (!demux->dmx.frontend)
201 return -EINVAL;
202
203 mutex_lock(&dvb->lock);
204 dvb->nfeeds++;
205 rc = dvb->nfeeds;
206
207 if (dvb->nfeeds == 1) {
f2d0c1c6 208 ret = em28xx_start_streaming(dvb);
6ea54d93
DSL
209 if (ret < 0)
210 rc = ret;
3421b778
AT
211 }
212
213 mutex_unlock(&dvb->lock);
214 return rc;
215}
216
f2d0c1c6 217static int em28xx_stop_feed(struct dvb_demux_feed *feed)
3421b778
AT
218{
219 struct dvb_demux *demux = feed->demux;
220 struct em28xx_dvb *dvb = demux->priv;
221 int err = 0;
222
223 mutex_lock(&dvb->lock);
224 dvb->nfeeds--;
6ea54d93
DSL
225
226 if (0 == dvb->nfeeds)
f2d0c1c6 227 err = em28xx_stop_streaming(dvb);
6ea54d93 228
3421b778
AT
229 mutex_unlock(&dvb->lock);
230 return err;
231}
232
233
e3569abc
MCC
234
235/* ------------------------------------------------------------------ */
236static int em28xx_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
237{
238 struct em28xx *dev = fe->dvb->priv;
239
240 if (acquire)
241 return em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
242 else
2fe3e2ee 243 return em28xx_set_mode(dev, EM28XX_SUSPEND);
e3569abc
MCC
244}
245
3aefb79a
MCC
246/* ------------------------------------------------------------------ */
247
227ad4ab
MCC
248static struct lgdt330x_config em2880_lgdt3303_dev = {
249 .demod_address = 0x0e,
250 .demod_chip = LGDT3303,
251};
3aefb79a 252
7e48b30a
JW
253static struct lgdt3305_config em2870_lgdt3304_dev = {
254 .i2c_addr = 0x0e,
255 .demod_chip = LGDT3304,
256 .spectral_inversion = 1,
257 .deny_i2c_rptr = 1,
258 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
259 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
260 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
261 .vsb_if_khz = 3250,
262 .qam_if_khz = 4000,
263};
264
ca3dfd6a
MCC
265static struct s921_config sharp_isdbt = {
266 .demod_address = 0x30 >> 1
267};
268
7e6388a1
AT
269static struct zl10353_config em28xx_zl10353_with_xc3028 = {
270 .demod_address = (0x1e >> 1),
271 .no_tuner = 1,
272 .parallel_ts = 1,
273 .if2 = 45600,
274};
275
6e7b9ea0
RK
276static struct s5h1409_config em28xx_s5h1409_with_xc3028 = {
277 .demod_address = 0x32 >> 1,
278 .output_mode = S5H1409_PARALLEL_OUTPUT,
279 .gpio = S5H1409_GPIO_OFF,
280 .inversion = S5H1409_INVERSION_OFF,
281 .status_mode = S5H1409_DEMODLOCKING,
282 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
283};
284
7e48b30a
JW
285static struct tda18271_std_map kworld_a340_std_map = {
286 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 0,
287 .if_lvl = 1, .rfagc_top = 0x37, },
288 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 1,
289 .if_lvl = 1, .rfagc_top = 0x37, },
290};
291
292static struct tda18271_config kworld_a340_config = {
293 .std_map = &kworld_a340_std_map,
294};
295
a84f79ae 296static struct zl10353_config em28xx_zl10353_xc3028_no_i2c_gate = {
f797608c
DH
297 .demod_address = (0x1e >> 1),
298 .no_tuner = 1,
299 .disable_i2c_gate_ctrl = 1,
300 .parallel_ts = 1,
301 .if2 = 45600,
302};
303
75e2b869
DH
304static struct drxd_config em28xx_drxd = {
305 .index = 0, .demod_address = 0x70, .demod_revision = 0xa2,
306 .demoda_address = 0x00, .pll_address = 0x00,
307 .pll_type = DRXD_PLL_NONE, .clock = 12000, .insert_rs_byte = 1,
308 .pll_set = NULL, .osc_deviation = NULL, .IF = 42800000,
6b142b3c 309 .disable_i2c_gate_ctrl = 1,
17d9d558 310};
17d9d558 311
fec528b7
MCC
312struct drxk_config terratec_h5_drxk = {
313 .adr = 0x29,
e4f4f875 314 .single_master = 1,
f1fe1b75 315 .no_i2c_bridge = 1,
8b9456ae 316 .microcode_name = "dvb-usb-terratec-h5-drxk.fw",
fec528b7
MCC
317};
318
82e7dbbd
EDP
319struct drxk_config hauppauge_930c_drxk = {
320 .adr = 0x29,
321 .single_master = 1,
322 .no_i2c_bridge = 1,
323 .microcode_name = "dvb-usb-hauppauge-hvr930c-drxk.fw",
324 .chunk_size = 56,
325};
326
fec528b7
MCC
327static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
328{
329 struct em28xx_dvb *dvb = fe->sec_priv;
330 int status;
331
332 if (!dvb)
333 return -EINVAL;
334
335 if (enable) {
336 down(&dvb->pll_mutex);
337 status = dvb->gate_ctrl(fe, 1);
338 } else {
339 status = dvb->gate_ctrl(fe, 0);
340 up(&dvb->pll_mutex);
341 }
342 return status;
343}
344
82e7dbbd
EDP
345static void hauppauge_hvr930c_init(struct em28xx *dev)
346{
347 int i;
348
349 struct em28xx_reg_seq hauppauge_hvr930c_init[] = {
de72405f
MCC
350 {EM2874_R80_GPIO, 0xff, 0xff, 0x65},
351 {EM2874_R80_GPIO, 0xfb, 0xff, 0x32},
352 {EM2874_R80_GPIO, 0xff, 0xff, 0xb8},
82e7dbbd
EDP
353 { -1, -1, -1, -1},
354 };
355 struct em28xx_reg_seq hauppauge_hvr930c_end[] = {
de72405f
MCC
356 {EM2874_R80_GPIO, 0xef, 0xff, 0x01},
357 {EM2874_R80_GPIO, 0xaf, 0xff, 0x65},
358 {EM2874_R80_GPIO, 0xef, 0xff, 0x76},
359 {EM2874_R80_GPIO, 0xef, 0xff, 0x01},
360 {EM2874_R80_GPIO, 0xcf, 0xff, 0x0b},
361 {EM2874_R80_GPIO, 0xef, 0xff, 0x40},
362
363 {EM2874_R80_GPIO, 0xcf, 0xff, 0x65},
364 {EM2874_R80_GPIO, 0xef, 0xff, 0x65},
365 {EM2874_R80_GPIO, 0xcf, 0xff, 0x0b},
366 {EM2874_R80_GPIO, 0xef, 0xff, 0x65},
82e7dbbd 367
82e7dbbd
EDP
368 { -1, -1, -1, -1},
369 };
370
82e7dbbd
EDP
371 struct {
372 unsigned char r[4];
373 int len;
374 } regs[] = {
375 {{ 0x06, 0x02, 0x00, 0x31 }, 4},
376 {{ 0x01, 0x02 }, 2},
377 {{ 0x01, 0x02, 0x00, 0xc6 }, 4},
378 {{ 0x01, 0x00 }, 2},
379 {{ 0x01, 0x00, 0xff, 0xaf }, 4},
380 {{ 0x01, 0x00, 0x03, 0xa0 }, 4},
381 {{ 0x01, 0x00 }, 2},
382 {{ 0x01, 0x00, 0x73, 0xaf }, 4},
383 {{ 0x04, 0x00 }, 2},
384 {{ 0x00, 0x04 }, 2},
385 {{ 0x00, 0x04, 0x00, 0x0a }, 4},
386 {{ 0x04, 0x14 }, 2},
387 {{ 0x04, 0x14, 0x00, 0x00 }, 4},
388 };
389
390 em28xx_gpio_set(dev, hauppauge_hvr930c_init);
391 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
392 msleep(10);
393 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44);
394 msleep(10);
395
396 dev->i2c_client.addr = 0x82 >> 1;
397
398 for (i = 0; i < ARRAY_SIZE(regs); i++)
399 i2c_master_send(&dev->i2c_client, regs[i].r, regs[i].len);
400 em28xx_gpio_set(dev, hauppauge_hvr930c_end);
401
402 msleep(100);
403
404 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44);
405 msleep(30);
406
82e7dbbd
EDP
407 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45);
408 msleep(10);
409
410}
411
fec528b7
MCC
412static void terratec_h5_init(struct em28xx *dev)
413{
414 int i;
415 struct em28xx_reg_seq terratec_h5_init[] = {
416 {EM28XX_R08_GPIO, 0xff, 0xff, 10},
417 {EM2874_R80_GPIO, 0xf6, 0xff, 100},
418 {EM2874_R80_GPIO, 0xf2, 0xff, 50},
419 {EM2874_R80_GPIO, 0xf6, 0xff, 100},
420 { -1, -1, -1, -1},
421 };
422 struct em28xx_reg_seq terratec_h5_end[] = {
423 {EM2874_R80_GPIO, 0xe6, 0xff, 100},
424 {EM2874_R80_GPIO, 0xa6, 0xff, 50},
425 {EM2874_R80_GPIO, 0xe6, 0xff, 100},
426 { -1, -1, -1, -1},
427 };
428 struct {
429 unsigned char r[4];
430 int len;
431 } regs[] = {
432 {{ 0x06, 0x02, 0x00, 0x31 }, 4},
433 {{ 0x01, 0x02 }, 2},
434 {{ 0x01, 0x02, 0x00, 0xc6 }, 4},
435 {{ 0x01, 0x00 }, 2},
436 {{ 0x01, 0x00, 0xff, 0xaf }, 4},
437 {{ 0x01, 0x00, 0x03, 0xa0 }, 4},
438 {{ 0x01, 0x00 }, 2},
439 {{ 0x01, 0x00, 0x73, 0xaf }, 4},
440 {{ 0x04, 0x00 }, 2},
441 {{ 0x00, 0x04 }, 2},
442 {{ 0x00, 0x04, 0x00, 0x0a }, 4},
443 {{ 0x04, 0x14 }, 2},
444 {{ 0x04, 0x14, 0x00, 0x00 }, 4},
445 };
446
447 em28xx_gpio_set(dev, terratec_h5_init);
448 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
449 msleep(10);
450 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45);
451 msleep(10);
452
453 dev->i2c_client.addr = 0x82 >> 1;
454
455 for (i = 0; i < ARRAY_SIZE(regs); i++)
456 i2c_master_send(&dev->i2c_client, regs[i].r, regs[i].len);
457 em28xx_gpio_set(dev, terratec_h5_end);
458};
459
f2d0c1c6 460static int em28xx_mt352_terratec_xs_init(struct dvb_frontend *fe)
4fb202a8
DH
461{
462 /* Values extracted from a USB trace of the Terratec Windows driver */
463 static u8 clock_config[] = { CLOCK_CTL, 0x38, 0x2c };
464 static u8 reset[] = { RESET, 0x80 };
465 static u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
466 static u8 agc_cfg[] = { AGC_TARGET, 0x28, 0xa0 };
467 static u8 input_freq_cfg[] = { INPUT_FREQ_1, 0x31, 0xb8 };
468 static u8 rs_err_cfg[] = { RS_ERR_PER_1, 0x00, 0x4d };
469 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
470 static u8 trl_nom_cfg[] = { TRL_NOMINAL_RATE_1, 0x64, 0x00 };
471 static u8 tps_given_cfg[] = { TPS_GIVEN_1, 0x40, 0x80, 0x50 };
ff69786b 472 static u8 tuner_go[] = { TUNER_GO, 0x01};
4fb202a8
DH
473
474 mt352_write(fe, clock_config, sizeof(clock_config));
475 udelay(200);
476 mt352_write(fe, reset, sizeof(reset));
477 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
478 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
479 mt352_write(fe, input_freq_cfg, sizeof(input_freq_cfg));
480 mt352_write(fe, rs_err_cfg, sizeof(rs_err_cfg));
481 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
482 mt352_write(fe, trl_nom_cfg, sizeof(trl_nom_cfg));
483 mt352_write(fe, tps_given_cfg, sizeof(tps_given_cfg));
484 mt352_write(fe, tuner_go, sizeof(tuner_go));
485 return 0;
486}
487
488static struct mt352_config terratec_xs_mt352_cfg = {
489 .demod_address = (0x1e >> 1),
490 .no_tuner = 1,
491 .if2 = 45600,
f2d0c1c6 492 .demod_init = em28xx_mt352_terratec_xs_init,
4fb202a8
DH
493};
494
285eb1a4
AP
495static struct tda10023_config em28xx_tda10023_config = {
496 .demod_address = 0x0c,
497 .invert = 1,
498};
499
d6a5f921
AP
500static struct cxd2820r_config em28xx_cxd2820r_config = {
501 .i2c_address = (0xd8 >> 1),
502 .ts_mode = CXD2820R_TS_SERIAL,
d6a5f921
AP
503
504 /* enable LNA for DVB-T2 and DVB-C */
505 .gpio_dvbt2[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L,
506 .gpio_dvbc[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L,
507};
508
509static struct tda18271_config em28xx_cxd2820r_tda18271_config = {
510 .output_opt = TDA18271_OUTPUT_LT_OFF,
0db4bf42 511 .gate = TDA18271_GATE_DIGITAL,
d6a5f921
AP
512};
513
36588715
AP
514static const struct tda10071_config em28xx_tda10071_config = {
515 .i2c_address = 0x55, /* (0xaa >> 1) */
516 .i2c_wr_max = 64,
517 .ts_mode = TDA10071_TS_SERIAL,
518 .spec_inv = 0,
519 .xtal = 40444000, /* 40.444 MHz */
520 .pll_multiplier = 20,
521};
522
523static const struct a8293_config em28xx_a8293_config = {
524 .i2c_addr = 0x08, /* (0x10 >> 1) */
525};
526
3aefb79a
MCC
527/* ------------------------------------------------------------------ */
528
f2d0c1c6 529static int em28xx_attach_xc3028(u8 addr, struct em28xx *dev)
3aefb79a
MCC
530{
531 struct dvb_frontend *fe;
3ca9c093
MCC
532 struct xc2028_config cfg;
533
6ea54d93 534 memset(&cfg, 0, sizeof(cfg));
3ca9c093
MCC
535 cfg.i2c_adap = &dev->i2c_adap;
536 cfg.i2c_addr = addr;
3ca9c093 537
f71095be 538 if (!dev->dvb->fe[0]) {
480be185
FR
539 em28xx_errdev("/2: dvb frontend not attached. "
540 "Can't attach xc3028\n");
3aefb79a
MCC
541 return -EINVAL;
542 }
543
f71095be 544 fe = dvb_attach(xc2028_attach, dev->dvb->fe[0], &cfg);
3aefb79a 545 if (!fe) {
480be185 546 em28xx_errdev("/2: xc3028 attach failed\n");
f71095be
AP
547 dvb_frontend_detach(dev->dvb->fe[0]);
548 dev->dvb->fe[0] = NULL;
3aefb79a
MCC
549 return -EINVAL;
550 }
551
480be185 552 em28xx_info("%s/2: xc3028 attached\n", dev->name);
3aefb79a
MCC
553
554 return 0;
555}
556
3421b778
AT
557/* ------------------------------------------------------------------ */
558
f2d0c1c6
JW
559static int em28xx_register_dvb(struct em28xx_dvb *dvb, struct module *module,
560 struct em28xx *dev, struct device *device)
3aefb79a 561{
3421b778 562 int result;
3aefb79a 563
3421b778 564 mutex_init(&dvb->lock);
3aefb79a 565
3421b778
AT
566 /* register adapter */
567 result = dvb_register_adapter(&dvb->adapter, dev->name, module, device,
568 adapter_nr);
569 if (result < 0) {
570 printk(KERN_WARNING "%s: dvb_register_adapter failed (errno = %d)\n",
571 dev->name, result);
572 goto fail_adapter;
573 }
e3569abc
MCC
574
575 /* Ensure all frontends negotiate bus access */
f71095be
AP
576 dvb->fe[0]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl;
577 if (dvb->fe[1])
578 dvb->fe[1]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl;
e3569abc 579
3421b778
AT
580 dvb->adapter.priv = dev;
581
582 /* register frontend */
f71095be 583 result = dvb_register_frontend(&dvb->adapter, dvb->fe[0]);
3421b778
AT
584 if (result < 0) {
585 printk(KERN_WARNING "%s: dvb_register_frontend failed (errno = %d)\n",
586 dev->name, result);
f71095be
AP
587 goto fail_frontend0;
588 }
589
590 /* register 2nd frontend */
591 if (dvb->fe[1]) {
592 result = dvb_register_frontend(&dvb->adapter, dvb->fe[1]);
593 if (result < 0) {
594 printk(KERN_WARNING "%s: 2nd dvb_register_frontend failed (errno = %d)\n",
595 dev->name, result);
596 goto fail_frontend1;
597 }
3421b778
AT
598 }
599
600 /* register demux stuff */
601 dvb->demux.dmx.capabilities =
602 DMX_TS_FILTERING | DMX_SECTION_FILTERING |
603 DMX_MEMORY_BASED_FILTERING;
604 dvb->demux.priv = dvb;
605 dvb->demux.filternum = 256;
606 dvb->demux.feednum = 256;
f2d0c1c6
JW
607 dvb->demux.start_feed = em28xx_start_feed;
608 dvb->demux.stop_feed = em28xx_stop_feed;
e3569abc 609
3421b778
AT
610 result = dvb_dmx_init(&dvb->demux);
611 if (result < 0) {
612 printk(KERN_WARNING "%s: dvb_dmx_init failed (errno = %d)\n",
613 dev->name, result);
614 goto fail_dmx;
615 }
616
617 dvb->dmxdev.filternum = 256;
618 dvb->dmxdev.demux = &dvb->demux.dmx;
619 dvb->dmxdev.capabilities = 0;
620 result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter);
621 if (result < 0) {
622 printk(KERN_WARNING "%s: dvb_dmxdev_init failed (errno = %d)\n",
623 dev->name, result);
624 goto fail_dmxdev;
625 }
52284c3e 626
3421b778
AT
627 dvb->fe_hw.source = DMX_FRONTEND_0;
628 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw);
629 if (result < 0) {
630 printk(KERN_WARNING "%s: add_frontend failed (DMX_FRONTEND_0, errno = %d)\n",
631 dev->name, result);
632 goto fail_fe_hw;
633 }
634
635 dvb->fe_mem.source = DMX_MEMORY_FE;
636 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem);
637 if (result < 0) {
638 printk(KERN_WARNING "%s: add_frontend failed (DMX_MEMORY_FE, errno = %d)\n",
639 dev->name, result);
640 goto fail_fe_mem;
641 }
642
643 result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw);
644 if (result < 0) {
645 printk(KERN_WARNING "%s: connect_frontend failed (errno = %d)\n",
646 dev->name, result);
647 goto fail_fe_conn;
648 }
649
650 /* register network adapter */
651 dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx);
652 return 0;
653
654fail_fe_conn:
655 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
656fail_fe_mem:
657 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
658fail_fe_hw:
659 dvb_dmxdev_release(&dvb->dmxdev);
660fail_dmxdev:
661 dvb_dmx_release(&dvb->demux);
662fail_dmx:
f71095be
AP
663 if (dvb->fe[1])
664 dvb_unregister_frontend(dvb->fe[1]);
665 dvb_unregister_frontend(dvb->fe[0]);
666fail_frontend1:
667 if (dvb->fe[1])
668 dvb_frontend_detach(dvb->fe[1]);
669fail_frontend0:
670 dvb_frontend_detach(dvb->fe[0]);
3421b778
AT
671 dvb_unregister_adapter(&dvb->adapter);
672fail_adapter:
673 return result;
674}
675
f2d0c1c6 676static void em28xx_unregister_dvb(struct em28xx_dvb *dvb)
3421b778
AT
677{
678 dvb_net_release(&dvb->net);
679 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
680 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
681 dvb_dmxdev_release(&dvb->dmxdev);
682 dvb_dmx_release(&dvb->demux);
f71095be
AP
683 if (dvb->fe[1])
684 dvb_unregister_frontend(dvb->fe[1]);
685 dvb_unregister_frontend(dvb->fe[0]);
c4c3a3d3 686 if (dvb->fe[1] && !dvb->dont_attach_fe1)
f71095be
AP
687 dvb_frontend_detach(dvb->fe[1]);
688 dvb_frontend_detach(dvb->fe[0]);
3421b778
AT
689 dvb_unregister_adapter(&dvb->adapter);
690}
691
f2d0c1c6 692static int em28xx_dvb_init(struct em28xx *dev)
3421b778 693{
e3645437 694 int result = 0, mfe_shared = 0;
3421b778
AT
695 struct em28xx_dvb *dvb;
696
505b6d0b 697 if (!dev->board.has_dvb) {
df619181 698 /* This device does not support the extension */
ca3dfd6a 699 printk(KERN_INFO "em28xx_dvb: This device does not support the extension\n");
df619181
DH
700 return 0;
701 }
702
3421b778 703 dvb = kzalloc(sizeof(struct em28xx_dvb), GFP_KERNEL);
6ea54d93
DSL
704
705 if (dvb == NULL) {
480be185 706 em28xx_info("em28xx_dvb: memory allocation failed\n");
3421b778
AT
707 return -ENOMEM;
708 }
709 dev->dvb = dvb;
f71095be 710 dvb->fe[0] = dvb->fe[1] = NULL;
3aefb79a 711
5013318c 712 mutex_lock(&dev->lock);
c67ec53f 713 em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
3aefb79a
MCC
714 /* init frontend */
715 switch (dev->model) {
ebaefdb7 716 case EM2874_BOARD_LEADERSHIP_ISDBT:
f71095be 717 dvb->fe[0] = dvb_attach(s921_attach,
ca3dfd6a
MCC
718 &sharp_isdbt, &dev->i2c_adap);
719
f71095be 720 if (!dvb->fe[0]) {
ca3dfd6a
MCC
721 result = -EINVAL;
722 goto out_free;
723 }
724
725 break;
f89bc329 726 case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850:
10ac6603 727 case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950:
4fd305b2 728 case EM2880_BOARD_PINNACLE_PCTV_HD_PRO:
e14b3658 729 case EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600:
f71095be 730 dvb->fe[0] = dvb_attach(lgdt330x_attach,
3421b778
AT
731 &em2880_lgdt3303_dev,
732 &dev->i2c_adap);
f2d0c1c6 733 if (em28xx_attach_xc3028(0x61, dev) < 0) {
3421b778
AT
734 result = -EINVAL;
735 goto out_free;
736 }
227ad4ab 737 break;
46510b56 738 case EM2880_BOARD_KWORLD_DVB_310U:
f71095be 739 dvb->fe[0] = dvb_attach(zl10353_attach,
3421b778
AT
740 &em28xx_zl10353_with_xc3028,
741 &dev->i2c_adap);
f2d0c1c6 742 if (em28xx_attach_xc3028(0x61, dev) < 0) {
3421b778
AT
743 result = -EINVAL;
744 goto out_free;
745 }
7e6388a1 746 break;
a84f79ae 747 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900:
ec994d05 748 case EM2882_BOARD_TERRATEC_HYBRID_XS:
01a5fd6f 749 case EM2880_BOARD_EMPIRE_DUAL_TV:
f71095be 750 dvb->fe[0] = dvb_attach(zl10353_attach,
a84f79ae
DH
751 &em28xx_zl10353_xc3028_no_i2c_gate,
752 &dev->i2c_adap);
f2d0c1c6 753 if (em28xx_attach_xc3028(0x61, dev) < 0) {
a84f79ae
DH
754 result = -EINVAL;
755 goto out_free;
756 }
757 break;
f797608c 758 case EM2880_BOARD_TERRATEC_HYBRID_XS:
65638011 759 case EM2880_BOARD_TERRATEC_HYBRID_XS_FR:
d5b3ba9c 760 case EM2881_BOARD_PINNACLE_HYBRID_PRO:
7ca7ef60 761 case EM2882_BOARD_DIKOM_DK300:
811fab62 762 case EM2882_BOARD_KWORLD_VS_DVBT:
f71095be 763 dvb->fe[0] = dvb_attach(zl10353_attach,
a84f79ae 764 &em28xx_zl10353_xc3028_no_i2c_gate,
f797608c 765 &dev->i2c_adap);
f71095be 766 if (dvb->fe[0] == NULL) {
f797608c
DH
767 /* This board could have either a zl10353 or a mt352.
768 If the chip id isn't for zl10353, try mt352 */
f71095be 769 dvb->fe[0] = dvb_attach(mt352_attach,
4fb202a8
DH
770 &terratec_xs_mt352_cfg,
771 &dev->i2c_adap);
f797608c 772 }
4fb202a8 773
f2d0c1c6 774 if (em28xx_attach_xc3028(0x61, dev) < 0) {
f797608c
DH
775 result = -EINVAL;
776 goto out_free;
777 }
778 break;
6e7b9ea0 779 case EM2883_BOARD_KWORLD_HYBRID_330U:
19859229 780 case EM2882_BOARD_EVGA_INDTUBE:
f71095be 781 dvb->fe[0] = dvb_attach(s5h1409_attach,
6e7b9ea0
RK
782 &em28xx_s5h1409_with_xc3028,
783 &dev->i2c_adap);
f2d0c1c6 784 if (em28xx_attach_xc3028(0x61, dev) < 0) {
6e7b9ea0
RK
785 result = -EINVAL;
786 goto out_free;
787 }
788 break;
d7de5d8f 789 case EM2882_BOARD_KWORLD_ATSC_315U:
f71095be 790 dvb->fe[0] = dvb_attach(lgdt330x_attach,
d7de5d8f
FM
791 &em2880_lgdt3303_dev,
792 &dev->i2c_adap);
f71095be
AP
793 if (dvb->fe[0] != NULL) {
794 if (!dvb_attach(simple_tuner_attach, dvb->fe[0],
d7de5d8f
FM
795 &dev->i2c_adap, 0x61, TUNER_THOMSON_DTT761X)) {
796 result = -EINVAL;
797 goto out_free;
798 }
799 }
800 break;
17d9d558 801 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2:
ad9b4bb2 802 case EM2882_BOARD_PINNACLE_HYBRID_PRO_330E:
f71095be 803 dvb->fe[0] = dvb_attach(drxd_attach, &em28xx_drxd, NULL,
75e2b869 804 &dev->i2c_adap, &dev->udev->dev);
f2d0c1c6 805 if (em28xx_attach_xc3028(0x61, dev) < 0) {
17d9d558
DH
806 result = -EINVAL;
807 goto out_free;
808 }
809 break;
285eb1a4
AP
810 case EM2870_BOARD_REDDO_DVB_C_USB_BOX:
811 /* Philips CU1216L NIM (Philips TDA10023 + Infineon TUA6034) */
f71095be 812 dvb->fe[0] = dvb_attach(tda10023_attach,
285eb1a4
AP
813 &em28xx_tda10023_config,
814 &dev->i2c_adap, 0x48);
f71095be
AP
815 if (dvb->fe[0]) {
816 if (!dvb_attach(simple_tuner_attach, dvb->fe[0],
285eb1a4
AP
817 &dev->i2c_adap, 0x60, TUNER_PHILIPS_CU1216L)) {
818 result = -EINVAL;
819 goto out_free;
820 }
821 }
822 break;
7e48b30a 823 case EM2870_BOARD_KWORLD_A340:
f71095be 824 dvb->fe[0] = dvb_attach(lgdt3305_attach,
7e48b30a
JW
825 &em2870_lgdt3304_dev,
826 &dev->i2c_adap);
f71095be
AP
827 if (dvb->fe[0] != NULL)
828 dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
7e48b30a
JW
829 &dev->i2c_adap, &kworld_a340_config);
830 break;
d6a5f921
AP
831 case EM28174_BOARD_PCTV_290E:
832 /* MFE
833 * FE 0 = DVB-T/T2 + FE 1 = DVB-C, both sharing same tuner. */
834 /* FE 0 */
835 dvb->fe[0] = dvb_attach(cxd2820r_attach,
836 &em28xx_cxd2820r_config, &dev->i2c_adap, NULL);
837 if (dvb->fe[0]) {
d6a5f921
AP
838 /* FE 0 attach tuner */
839 if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
0db4bf42 840 &dev->i2c_adap, &em28xx_cxd2820r_tda18271_config)) {
d6a5f921
AP
841 dvb_frontend_detach(dvb->fe[0]);
842 result = -EINVAL;
843 goto out_free;
844 }
845 /* FE 1. This dvb_attach() cannot fail. */
846 dvb->fe[1] = dvb_attach(cxd2820r_attach, NULL, NULL,
847 dvb->fe[0]);
848 dvb->fe[1]->id = 1;
849 /* FE 1 attach tuner */
850 if (!dvb_attach(tda18271_attach, dvb->fe[1], 0x60,
0db4bf42 851 &dev->i2c_adap, &em28xx_cxd2820r_tda18271_config)) {
d6a5f921
AP
852 dvb_frontend_detach(dvb->fe[1]);
853 /* leave FE 0 still active */
854 }
e3645437
AP
855
856 mfe_shared = 1;
d6a5f921 857 }
82e7dbbd
EDP
858 break;
859 case EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C:
8503232f
MCC
860 {
861 struct xc5000_config cfg;
82e7dbbd
EDP
862 hauppauge_hvr930c_init(dev);
863
864 dvb->dont_attach_fe1 = 1;
865
de72405f
MCC
866 dvb->fe[0] = dvb_attach(drxk_attach,
867 &hauppauge_930c_drxk, &dev->i2c_adap,
868 &dvb->fe[1]);
82e7dbbd
EDP
869 if (!dvb->fe[0]) {
870 result = -EINVAL;
871 goto out_free;
872 }
873 /* FIXME: do we need a pll semaphore? */
874 dvb->fe[0]->sec_priv = dvb;
875 sema_init(&dvb->pll_mutex, 1);
876 dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl;
877 dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl;
878 dvb->fe[1]->id = 1;
879
880 /* Attach xc5000 */
82e7dbbd
EDP
881 memset(&cfg, 0, sizeof(cfg));
882 cfg.i2c_address = 0x61;
de72405f 883 cfg.if_khz = 4000;
82e7dbbd
EDP
884
885 if (dvb->fe[0]->ops.i2c_gate_ctrl)
886 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1);
de72405f
MCC
887 if (!dvb_attach(xc5000_attach, dvb->fe[0], &dev->i2c_adap,
888 &cfg)) {
82e7dbbd
EDP
889 result = -EINVAL;
890 goto out_free;
891 }
892
893 if (dvb->fe[0]->ops.i2c_gate_ctrl)
894 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0);
895
896 /* Hack - needed by drxk/tda18271c2dd */
897 dvb->fe[1]->tuner_priv = dvb->fe[0]->tuner_priv;
898 memcpy(&dvb->fe[1]->ops.tuner_ops,
899 &dvb->fe[0]->ops.tuner_ops,
900 sizeof(dvb->fe[0]->ops.tuner_ops));
901
fec528b7 902 break;
8503232f 903 }
fec528b7
MCC
904 case EM2884_BOARD_TERRATEC_H5:
905 terratec_h5_init(dev);
906
c4c3a3d3
MCC
907 dvb->dont_attach_fe1 = 1;
908
fec528b7 909 dvb->fe[0] = dvb_attach(drxk_attach, &terratec_h5_drxk, &dev->i2c_adap, &dvb->fe[1]);
c4c3a3d3 910 if (!dvb->fe[0]) {
fec528b7
MCC
911 result = -EINVAL;
912 goto out_free;
913 }
914 /* FIXME: do we need a pll semaphore? */
915 dvb->fe[0]->sec_priv = dvb;
916 sema_init(&dvb->pll_mutex, 1);
917 dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl;
918 dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl;
fec528b7
MCC
919 dvb->fe[1]->id = 1;
920
c4c3a3d3 921 /* Attach tda18271 to DVB-C frontend */
fec528b7
MCC
922 if (dvb->fe[0]->ops.i2c_gate_ctrl)
923 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1);
924 if (!dvb_attach(tda18271c2dd_attach, dvb->fe[0], &dev->i2c_adap, 0x60)) {
925 result = -EINVAL;
926 goto out_free;
927 }
928 if (dvb->fe[0]->ops.i2c_gate_ctrl)
929 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0);
c4c3a3d3
MCC
930
931 /* Hack - needed by drxk/tda18271c2dd */
932 dvb->fe[1]->tuner_priv = dvb->fe[0]->tuner_priv;
933 memcpy(&dvb->fe[1]->ops.tuner_ops,
934 &dvb->fe[0]->ops.tuner_ops,
935 sizeof(dvb->fe[0]->ops.tuner_ops));
fec528b7 936
d6a5f921 937 break;
36588715
AP
938 case EM28174_BOARD_PCTV_460E:
939 /* attach demod */
940 dvb->fe[0] = dvb_attach(tda10071_attach,
941 &em28xx_tda10071_config, &dev->i2c_adap);
942
943 /* attach SEC */
944 if (dvb->fe[0])
945 dvb_attach(a8293_attach, dvb->fe[0], &dev->i2c_adap,
946 &em28xx_a8293_config);
947 break;
3aefb79a 948 default:
480be185
FR
949 em28xx_errdev("/2: The frontend of your DVB/ATSC card"
950 " isn't supported yet\n");
3aefb79a
MCC
951 break;
952 }
f71095be 953 if (NULL == dvb->fe[0]) {
480be185 954 em28xx_errdev("/2: frontend initialization failed\n");
3421b778
AT
955 result = -EINVAL;
956 goto out_free;
3aefb79a 957 }
d7cba043 958 /* define general-purpose callback pointer */
f71095be 959 dvb->fe[0]->callback = em28xx_tuner_callback;
82e7dbbd 960 if (dvb->fe[1])
de72405f 961 dvb->fe[1]->callback = em28xx_tuner_callback;
3aefb79a
MCC
962
963 /* register everything */
f2d0c1c6 964 result = em28xx_register_dvb(dvb, THIS_MODULE, dev, &dev->udev->dev);
3421b778 965
6ea54d93 966 if (result < 0)
3421b778 967 goto out_free;
3421b778 968
e3645437
AP
969 /* MFE lock */
970 dvb->adapter.mfe_shared = mfe_shared;
971
480be185 972 em28xx_info("Successfully loaded em28xx-dvb\n");
5013318c
MCC
973ret:
974 em28xx_set_mode(dev, EM28XX_SUSPEND);
975 mutex_unlock(&dev->lock);
976 return result;
3421b778
AT
977
978out_free:
979 kfree(dvb);
980 dev->dvb = NULL;
5013318c 981 goto ret;
3aefb79a
MCC
982}
983
0b8bd83c
CR
984static inline void prevent_sleep(struct dvb_frontend_ops *ops)
985{
986 ops->set_voltage = NULL;
987 ops->sleep = NULL;
988 ops->tuner_ops.sleep = NULL;
989}
990
f2d0c1c6 991static int em28xx_dvb_fini(struct em28xx *dev)
3aefb79a 992{
505b6d0b 993 if (!dev->board.has_dvb) {
df619181
DH
994 /* This device does not support the extension */
995 return 0;
996 }
997
3421b778 998 if (dev->dvb) {
0b8bd83c
CR
999 struct em28xx_dvb *dvb = dev->dvb;
1000
1001 if (dev->state & DEV_DISCONNECTED) {
1002 /* We cannot tell the device to sleep
1003 * once it has been unplugged. */
1004 if (dvb->fe[0])
1005 prevent_sleep(&dvb->fe[0]->ops);
1006 if (dvb->fe[1])
1007 prevent_sleep(&dvb->fe[1]->ops);
1008 }
1009
1010 em28xx_unregister_dvb(dvb);
1011 kfree(dvb);
3421b778
AT
1012 dev->dvb = NULL;
1013 }
3aefb79a
MCC
1014
1015 return 0;
1016}
1017
1018static struct em28xx_ops dvb_ops = {
1019 .id = EM28XX_DVB,
1020 .name = "Em28xx dvb Extension",
f2d0c1c6
JW
1021 .init = em28xx_dvb_init,
1022 .fini = em28xx_dvb_fini,
3aefb79a
MCC
1023};
1024
1025static int __init em28xx_dvb_register(void)
1026{
1027 return em28xx_register_extension(&dvb_ops);
1028}
1029
1030static void __exit em28xx_dvb_unregister(void)
1031{
1032 em28xx_unregister_extension(&dvb_ops);
1033}
1034
1035module_init(em28xx_dvb_register);
1036module_exit(em28xx_dvb_unregister);