Commit | Line | Data |
---|---|---|
3aefb79a MCC |
1 | /* |
2 | DVB device driver for em28xx | |
3 | ||
4 | (c) 2008 Mauro Carvalho Chehab <mchehab@infradead.org> | |
5 | ||
bdfbf952 DH |
6 | (c) 2008 Devin Heitmueller <devin.heitmueller@gmail.com> |
7 | - Fixes for the driver to properly work with HVR-950 | |
4fd305b2 | 8 | - Fixes for the driver to properly work with Pinnacle PCTV HD Pro Stick |
e14b3658 | 9 | - Fixes for the driver to properly work with AMD ATI TV Wonder HD 600 |
bdfbf952 | 10 | |
3421b778 AT |
11 | (c) 2008 Aidan Thornton <makosoft@googlemail.com> |
12 | ||
13 | Based on cx88-dvb, saa7134-dvb and videobuf-dvb originally written by: | |
3aefb79a MCC |
14 | (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au> |
15 | (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
16 | ||
17 | This program is free software; you can redistribute it and/or modify | |
18 | it under the terms of the GNU General Public License as published by | |
19 | the Free Software Foundation; either version 2 of the License. | |
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
5a0e3ad6 | 23 | #include <linux/slab.h> |
3aefb79a MCC |
24 | #include <linux/usb.h> |
25 | ||
26 | #include "em28xx.h" | |
27 | #include <media/v4l2-common.h> | |
28 | #include <media/videobuf-vmalloc.h> | |
d7de5d8f FM |
29 | #include <media/tuner.h> |
30 | #include "tuner-simple.h" | |
3aefb79a MCC |
31 | |
32 | #include "lgdt330x.h" | |
7e48b30a | 33 | #include "lgdt3305.h" |
7e6388a1 | 34 | #include "zl10353.h" |
6e7b9ea0 | 35 | #include "s5h1409.h" |
4fb202a8 DH |
36 | #include "mt352.h" |
37 | #include "mt352_priv.h" /* FIXME */ | |
285eb1a4 | 38 | #include "tda1002x.h" |
7e48b30a | 39 | #include "tda18271.h" |
3aefb79a MCC |
40 | |
41 | MODULE_DESCRIPTION("driver for em28xx based DVB cards"); | |
42 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); | |
43 | MODULE_LICENSE("GPL"); | |
44 | ||
45 | static unsigned int debug; | |
46 | module_param(debug, int, 0644); | |
47 | MODULE_PARM_DESC(debug, "enable debug messages [dvb]"); | |
48 | ||
49 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); | |
50 | ||
51 | #define dprintk(level, fmt, arg...) do { \ | |
52 | if (debug >= level) \ | |
3421b778 | 53 | printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->name, ## arg); \ |
3aefb79a MCC |
54 | } while (0) |
55 | ||
3421b778 | 56 | #define EM28XX_DVB_NUM_BUFS 5 |
3421b778 AT |
57 | #define EM28XX_DVB_MAX_PACKETS 64 |
58 | ||
59 | struct em28xx_dvb { | |
60 | struct dvb_frontend *frontend; | |
61 | ||
62 | /* feed count management */ | |
63 | struct mutex lock; | |
64 | int nfeeds; | |
65 | ||
66 | /* general boilerplate stuff */ | |
67 | struct dvb_adapter adapter; | |
68 | struct dvb_demux demux; | |
69 | struct dmxdev dmxdev; | |
70 | struct dmx_frontend fe_hw; | |
71 | struct dmx_frontend fe_mem; | |
72 | struct dvb_net net; | |
73 | }; | |
74 | ||
75 | ||
76 | static inline void print_err_status(struct em28xx *dev, | |
77 | int packet, int status) | |
3aefb79a | 78 | { |
3421b778 | 79 | char *errmsg = "Unknown"; |
3aefb79a | 80 | |
3421b778 AT |
81 | switch (status) { |
82 | case -ENOENT: | |
83 | errmsg = "unlinked synchronuously"; | |
84 | break; | |
85 | case -ECONNRESET: | |
86 | errmsg = "unlinked asynchronuously"; | |
87 | break; | |
88 | case -ENOSR: | |
89 | errmsg = "Buffer error (overrun)"; | |
90 | break; | |
91 | case -EPIPE: | |
92 | errmsg = "Stalled (device not responding)"; | |
93 | break; | |
94 | case -EOVERFLOW: | |
95 | errmsg = "Babble (bad cable?)"; | |
96 | break; | |
97 | case -EPROTO: | |
98 | errmsg = "Bit-stuff error (bad cable?)"; | |
99 | break; | |
100 | case -EILSEQ: | |
101 | errmsg = "CRC/Timeout (could be anything)"; | |
102 | break; | |
103 | case -ETIME: | |
104 | errmsg = "Device does not respond"; | |
105 | break; | |
106 | } | |
107 | if (packet < 0) { | |
108 | dprintk(1, "URB status %d [%s].\n", status, errmsg); | |
109 | } else { | |
6ea54d93 DSL |
110 | dprintk(1, "URB packet %d, status %d [%s].\n", |
111 | packet, status, errmsg); | |
3421b778 AT |
112 | } |
113 | } | |
3aefb79a | 114 | |
3421b778 AT |
115 | static inline int dvb_isoc_copy(struct em28xx *dev, struct urb *urb) |
116 | { | |
117 | int i; | |
3aefb79a | 118 | |
3421b778 AT |
119 | if (!dev) |
120 | return 0; | |
3aefb79a | 121 | |
3421b778 AT |
122 | if ((dev->state & DEV_DISCONNECTED) || (dev->state & DEV_MISCONFIGURED)) |
123 | return 0; | |
124 | ||
125 | if (urb->status < 0) { | |
126 | print_err_status(dev, -1, urb->status); | |
127 | if (urb->status == -ENOENT) | |
128 | return 0; | |
129 | } | |
130 | ||
131 | for (i = 0; i < urb->number_of_packets; i++) { | |
132 | int status = urb->iso_frame_desc[i].status; | |
133 | ||
134 | if (status < 0) { | |
135 | print_err_status(dev, i, status); | |
136 | if (urb->iso_frame_desc[i].status != -EPROTO) | |
137 | continue; | |
138 | } | |
139 | ||
140 | dvb_dmx_swfilter(&dev->dvb->demux, urb->transfer_buffer + | |
141 | urb->iso_frame_desc[i].offset, | |
142 | urb->iso_frame_desc[i].actual_length); | |
143 | } | |
144 | ||
145 | return 0; | |
146 | } | |
147 | ||
6ea54d93 DSL |
148 | static int start_streaming(struct em28xx_dvb *dvb) |
149 | { | |
c67ec53f | 150 | int rc; |
3421b778 | 151 | struct em28xx *dev = dvb->adapter.priv; |
d18e2fda | 152 | int max_dvb_packet_size; |
3421b778 AT |
153 | |
154 | usb_set_interface(dev->udev, 0, 1); | |
c67ec53f MCC |
155 | rc = em28xx_set_mode(dev, EM28XX_DIGITAL_MODE); |
156 | if (rc < 0) | |
157 | return rc; | |
3421b778 | 158 | |
d18e2fda DH |
159 | max_dvb_packet_size = em28xx_isoc_dvb_max_packetsize(dev); |
160 | ||
3421b778 | 161 | return em28xx_init_isoc(dev, EM28XX_DVB_MAX_PACKETS, |
d18e2fda | 162 | EM28XX_DVB_NUM_BUFS, max_dvb_packet_size, |
c67ec53f | 163 | dvb_isoc_copy); |
3421b778 AT |
164 | } |
165 | ||
6ea54d93 DSL |
166 | static int stop_streaming(struct em28xx_dvb *dvb) |
167 | { | |
3421b778 AT |
168 | struct em28xx *dev = dvb->adapter.priv; |
169 | ||
170 | em28xx_uninit_isoc(dev); | |
c67ec53f | 171 | |
2fe3e2ee | 172 | em28xx_set_mode(dev, EM28XX_SUSPEND); |
c67ec53f | 173 | |
3aefb79a MCC |
174 | return 0; |
175 | } | |
176 | ||
3421b778 AT |
177 | static int start_feed(struct dvb_demux_feed *feed) |
178 | { | |
179 | struct dvb_demux *demux = feed->demux; | |
180 | struct em28xx_dvb *dvb = demux->priv; | |
181 | int rc, ret; | |
182 | ||
183 | if (!demux->dmx.frontend) | |
184 | return -EINVAL; | |
185 | ||
186 | mutex_lock(&dvb->lock); | |
187 | dvb->nfeeds++; | |
188 | rc = dvb->nfeeds; | |
189 | ||
190 | if (dvb->nfeeds == 1) { | |
191 | ret = start_streaming(dvb); | |
6ea54d93 DSL |
192 | if (ret < 0) |
193 | rc = ret; | |
3421b778 AT |
194 | } |
195 | ||
196 | mutex_unlock(&dvb->lock); | |
197 | return rc; | |
198 | } | |
199 | ||
200 | static int stop_feed(struct dvb_demux_feed *feed) | |
201 | { | |
202 | struct dvb_demux *demux = feed->demux; | |
203 | struct em28xx_dvb *dvb = demux->priv; | |
204 | int err = 0; | |
205 | ||
206 | mutex_lock(&dvb->lock); | |
207 | dvb->nfeeds--; | |
6ea54d93 DSL |
208 | |
209 | if (0 == dvb->nfeeds) | |
3421b778 | 210 | err = stop_streaming(dvb); |
6ea54d93 | 211 | |
3421b778 AT |
212 | mutex_unlock(&dvb->lock); |
213 | return err; | |
214 | } | |
215 | ||
216 | ||
e3569abc MCC |
217 | |
218 | /* ------------------------------------------------------------------ */ | |
219 | static int em28xx_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire) | |
220 | { | |
221 | struct em28xx *dev = fe->dvb->priv; | |
222 | ||
223 | if (acquire) | |
224 | return em28xx_set_mode(dev, EM28XX_DIGITAL_MODE); | |
225 | else | |
2fe3e2ee | 226 | return em28xx_set_mode(dev, EM28XX_SUSPEND); |
e3569abc MCC |
227 | } |
228 | ||
3aefb79a MCC |
229 | /* ------------------------------------------------------------------ */ |
230 | ||
227ad4ab MCC |
231 | static struct lgdt330x_config em2880_lgdt3303_dev = { |
232 | .demod_address = 0x0e, | |
233 | .demod_chip = LGDT3303, | |
234 | }; | |
3aefb79a | 235 | |
7e48b30a JW |
236 | static struct lgdt3305_config em2870_lgdt3304_dev = { |
237 | .i2c_addr = 0x0e, | |
238 | .demod_chip = LGDT3304, | |
239 | .spectral_inversion = 1, | |
240 | .deny_i2c_rptr = 1, | |
241 | .mpeg_mode = LGDT3305_MPEG_PARALLEL, | |
242 | .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE, | |
243 | .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, | |
244 | .vsb_if_khz = 3250, | |
245 | .qam_if_khz = 4000, | |
246 | }; | |
247 | ||
7e6388a1 AT |
248 | static struct zl10353_config em28xx_zl10353_with_xc3028 = { |
249 | .demod_address = (0x1e >> 1), | |
250 | .no_tuner = 1, | |
251 | .parallel_ts = 1, | |
252 | .if2 = 45600, | |
253 | }; | |
254 | ||
6e7b9ea0 RK |
255 | static struct s5h1409_config em28xx_s5h1409_with_xc3028 = { |
256 | .demod_address = 0x32 >> 1, | |
257 | .output_mode = S5H1409_PARALLEL_OUTPUT, | |
258 | .gpio = S5H1409_GPIO_OFF, | |
259 | .inversion = S5H1409_INVERSION_OFF, | |
260 | .status_mode = S5H1409_DEMODLOCKING, | |
261 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK | |
262 | }; | |
263 | ||
7e48b30a JW |
264 | static struct tda18271_std_map kworld_a340_std_map = { |
265 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 0, | |
266 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
267 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 1, | |
268 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
269 | }; | |
270 | ||
271 | static struct tda18271_config kworld_a340_config = { | |
272 | .std_map = &kworld_a340_std_map, | |
273 | }; | |
274 | ||
a84f79ae | 275 | static struct zl10353_config em28xx_zl10353_xc3028_no_i2c_gate = { |
f797608c DH |
276 | .demod_address = (0x1e >> 1), |
277 | .no_tuner = 1, | |
278 | .disable_i2c_gate_ctrl = 1, | |
279 | .parallel_ts = 1, | |
280 | .if2 = 45600, | |
281 | }; | |
282 | ||
17d9d558 DH |
283 | #ifdef EM28XX_DRX397XD_SUPPORT |
284 | /* [TODO] djh - not sure yet what the device config needs to contain */ | |
285 | static struct drx397xD_config em28xx_drx397xD_with_xc3028 = { | |
286 | .demod_address = (0xe0 >> 1), | |
287 | }; | |
288 | #endif | |
289 | ||
4fb202a8 DH |
290 | static int mt352_terratec_xs_init(struct dvb_frontend *fe) |
291 | { | |
292 | /* Values extracted from a USB trace of the Terratec Windows driver */ | |
293 | static u8 clock_config[] = { CLOCK_CTL, 0x38, 0x2c }; | |
294 | static u8 reset[] = { RESET, 0x80 }; | |
295 | static u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 }; | |
296 | static u8 agc_cfg[] = { AGC_TARGET, 0x28, 0xa0 }; | |
297 | static u8 input_freq_cfg[] = { INPUT_FREQ_1, 0x31, 0xb8 }; | |
298 | static u8 rs_err_cfg[] = { RS_ERR_PER_1, 0x00, 0x4d }; | |
299 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; | |
300 | static u8 trl_nom_cfg[] = { TRL_NOMINAL_RATE_1, 0x64, 0x00 }; | |
301 | static u8 tps_given_cfg[] = { TPS_GIVEN_1, 0x40, 0x80, 0x50 }; | |
ff69786b | 302 | static u8 tuner_go[] = { TUNER_GO, 0x01}; |
4fb202a8 DH |
303 | |
304 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
305 | udelay(200); | |
306 | mt352_write(fe, reset, sizeof(reset)); | |
307 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
308 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
309 | mt352_write(fe, input_freq_cfg, sizeof(input_freq_cfg)); | |
310 | mt352_write(fe, rs_err_cfg, sizeof(rs_err_cfg)); | |
311 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
312 | mt352_write(fe, trl_nom_cfg, sizeof(trl_nom_cfg)); | |
313 | mt352_write(fe, tps_given_cfg, sizeof(tps_given_cfg)); | |
314 | mt352_write(fe, tuner_go, sizeof(tuner_go)); | |
315 | return 0; | |
316 | } | |
317 | ||
318 | static struct mt352_config terratec_xs_mt352_cfg = { | |
319 | .demod_address = (0x1e >> 1), | |
320 | .no_tuner = 1, | |
321 | .if2 = 45600, | |
322 | .demod_init = mt352_terratec_xs_init, | |
323 | }; | |
324 | ||
285eb1a4 AP |
325 | static struct tda10023_config em28xx_tda10023_config = { |
326 | .demod_address = 0x0c, | |
327 | .invert = 1, | |
328 | }; | |
329 | ||
3aefb79a MCC |
330 | /* ------------------------------------------------------------------ */ |
331 | ||
332 | static int attach_xc3028(u8 addr, struct em28xx *dev) | |
333 | { | |
334 | struct dvb_frontend *fe; | |
3ca9c093 MCC |
335 | struct xc2028_config cfg; |
336 | ||
6ea54d93 | 337 | memset(&cfg, 0, sizeof(cfg)); |
3ca9c093 MCC |
338 | cfg.i2c_adap = &dev->i2c_adap; |
339 | cfg.i2c_addr = addr; | |
3ca9c093 | 340 | |
3421b778 | 341 | if (!dev->dvb->frontend) { |
480be185 FR |
342 | em28xx_errdev("/2: dvb frontend not attached. " |
343 | "Can't attach xc3028\n"); | |
3aefb79a MCC |
344 | return -EINVAL; |
345 | } | |
346 | ||
3421b778 | 347 | fe = dvb_attach(xc2028_attach, dev->dvb->frontend, &cfg); |
3aefb79a | 348 | if (!fe) { |
480be185 | 349 | em28xx_errdev("/2: xc3028 attach failed\n"); |
3421b778 | 350 | dvb_frontend_detach(dev->dvb->frontend); |
3421b778 | 351 | dev->dvb->frontend = NULL; |
3aefb79a MCC |
352 | return -EINVAL; |
353 | } | |
354 | ||
480be185 | 355 | em28xx_info("%s/2: xc3028 attached\n", dev->name); |
3aefb79a MCC |
356 | |
357 | return 0; | |
358 | } | |
359 | ||
3421b778 AT |
360 | /* ------------------------------------------------------------------ */ |
361 | ||
d45b9b8a | 362 | static int register_dvb(struct em28xx_dvb *dvb, |
3421b778 AT |
363 | struct module *module, |
364 | struct em28xx *dev, | |
365 | struct device *device) | |
3aefb79a | 366 | { |
3421b778 | 367 | int result; |
3aefb79a | 368 | |
3421b778 | 369 | mutex_init(&dvb->lock); |
3aefb79a | 370 | |
3421b778 AT |
371 | /* register adapter */ |
372 | result = dvb_register_adapter(&dvb->adapter, dev->name, module, device, | |
373 | adapter_nr); | |
374 | if (result < 0) { | |
375 | printk(KERN_WARNING "%s: dvb_register_adapter failed (errno = %d)\n", | |
376 | dev->name, result); | |
377 | goto fail_adapter; | |
378 | } | |
e3569abc MCC |
379 | |
380 | /* Ensure all frontends negotiate bus access */ | |
381 | dvb->frontend->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl; | |
382 | ||
3421b778 AT |
383 | dvb->adapter.priv = dev; |
384 | ||
385 | /* register frontend */ | |
386 | result = dvb_register_frontend(&dvb->adapter, dvb->frontend); | |
387 | if (result < 0) { | |
388 | printk(KERN_WARNING "%s: dvb_register_frontend failed (errno = %d)\n", | |
389 | dev->name, result); | |
390 | goto fail_frontend; | |
391 | } | |
392 | ||
393 | /* register demux stuff */ | |
394 | dvb->demux.dmx.capabilities = | |
395 | DMX_TS_FILTERING | DMX_SECTION_FILTERING | | |
396 | DMX_MEMORY_BASED_FILTERING; | |
397 | dvb->demux.priv = dvb; | |
398 | dvb->demux.filternum = 256; | |
399 | dvb->demux.feednum = 256; | |
400 | dvb->demux.start_feed = start_feed; | |
401 | dvb->demux.stop_feed = stop_feed; | |
e3569abc | 402 | |
3421b778 AT |
403 | result = dvb_dmx_init(&dvb->demux); |
404 | if (result < 0) { | |
405 | printk(KERN_WARNING "%s: dvb_dmx_init failed (errno = %d)\n", | |
406 | dev->name, result); | |
407 | goto fail_dmx; | |
408 | } | |
409 | ||
410 | dvb->dmxdev.filternum = 256; | |
411 | dvb->dmxdev.demux = &dvb->demux.dmx; | |
412 | dvb->dmxdev.capabilities = 0; | |
413 | result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter); | |
414 | if (result < 0) { | |
415 | printk(KERN_WARNING "%s: dvb_dmxdev_init failed (errno = %d)\n", | |
416 | dev->name, result); | |
417 | goto fail_dmxdev; | |
418 | } | |
52284c3e | 419 | |
3421b778 AT |
420 | dvb->fe_hw.source = DMX_FRONTEND_0; |
421 | result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw); | |
422 | if (result < 0) { | |
423 | printk(KERN_WARNING "%s: add_frontend failed (DMX_FRONTEND_0, errno = %d)\n", | |
424 | dev->name, result); | |
425 | goto fail_fe_hw; | |
426 | } | |
427 | ||
428 | dvb->fe_mem.source = DMX_MEMORY_FE; | |
429 | result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem); | |
430 | if (result < 0) { | |
431 | printk(KERN_WARNING "%s: add_frontend failed (DMX_MEMORY_FE, errno = %d)\n", | |
432 | dev->name, result); | |
433 | goto fail_fe_mem; | |
434 | } | |
435 | ||
436 | result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw); | |
437 | if (result < 0) { | |
438 | printk(KERN_WARNING "%s: connect_frontend failed (errno = %d)\n", | |
439 | dev->name, result); | |
440 | goto fail_fe_conn; | |
441 | } | |
442 | ||
443 | /* register network adapter */ | |
444 | dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx); | |
445 | return 0; | |
446 | ||
447 | fail_fe_conn: | |
448 | dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem); | |
449 | fail_fe_mem: | |
450 | dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw); | |
451 | fail_fe_hw: | |
452 | dvb_dmxdev_release(&dvb->dmxdev); | |
453 | fail_dmxdev: | |
454 | dvb_dmx_release(&dvb->demux); | |
455 | fail_dmx: | |
456 | dvb_unregister_frontend(dvb->frontend); | |
457 | fail_frontend: | |
458 | dvb_frontend_detach(dvb->frontend); | |
459 | dvb_unregister_adapter(&dvb->adapter); | |
460 | fail_adapter: | |
461 | return result; | |
462 | } | |
463 | ||
464 | static void unregister_dvb(struct em28xx_dvb *dvb) | |
465 | { | |
466 | dvb_net_release(&dvb->net); | |
467 | dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem); | |
468 | dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw); | |
469 | dvb_dmxdev_release(&dvb->dmxdev); | |
470 | dvb_dmx_release(&dvb->demux); | |
471 | dvb_unregister_frontend(dvb->frontend); | |
472 | dvb_frontend_detach(dvb->frontend); | |
473 | dvb_unregister_adapter(&dvb->adapter); | |
474 | } | |
475 | ||
476 | ||
477 | static int dvb_init(struct em28xx *dev) | |
478 | { | |
479 | int result = 0; | |
480 | struct em28xx_dvb *dvb; | |
481 | ||
505b6d0b | 482 | if (!dev->board.has_dvb) { |
df619181 DH |
483 | /* This device does not support the extension */ |
484 | return 0; | |
485 | } | |
486 | ||
3421b778 | 487 | dvb = kzalloc(sizeof(struct em28xx_dvb), GFP_KERNEL); |
6ea54d93 DSL |
488 | |
489 | if (dvb == NULL) { | |
480be185 | 490 | em28xx_info("em28xx_dvb: memory allocation failed\n"); |
3421b778 AT |
491 | return -ENOMEM; |
492 | } | |
493 | dev->dvb = dvb; | |
3aefb79a | 494 | |
5013318c | 495 | mutex_lock(&dev->lock); |
c67ec53f | 496 | em28xx_set_mode(dev, EM28XX_DIGITAL_MODE); |
3aefb79a MCC |
497 | /* init frontend */ |
498 | switch (dev->model) { | |
f89bc329 | 499 | case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850: |
10ac6603 | 500 | case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950: |
4fd305b2 | 501 | case EM2880_BOARD_PINNACLE_PCTV_HD_PRO: |
e14b3658 | 502 | case EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600: |
3421b778 AT |
503 | dvb->frontend = dvb_attach(lgdt330x_attach, |
504 | &em2880_lgdt3303_dev, | |
505 | &dev->i2c_adap); | |
506 | if (attach_xc3028(0x61, dev) < 0) { | |
507 | result = -EINVAL; | |
508 | goto out_free; | |
509 | } | |
227ad4ab | 510 | break; |
46510b56 | 511 | case EM2880_BOARD_KWORLD_DVB_310U: |
3421b778 AT |
512 | dvb->frontend = dvb_attach(zl10353_attach, |
513 | &em28xx_zl10353_with_xc3028, | |
514 | &dev->i2c_adap); | |
515 | if (attach_xc3028(0x61, dev) < 0) { | |
516 | result = -EINVAL; | |
517 | goto out_free; | |
518 | } | |
7e6388a1 | 519 | break; |
a84f79ae | 520 | case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900: |
ec994d05 | 521 | case EM2882_BOARD_TERRATEC_HYBRID_XS: |
01a5fd6f | 522 | case EM2880_BOARD_EMPIRE_DUAL_TV: |
a84f79ae DH |
523 | dvb->frontend = dvb_attach(zl10353_attach, |
524 | &em28xx_zl10353_xc3028_no_i2c_gate, | |
525 | &dev->i2c_adap); | |
526 | if (attach_xc3028(0x61, dev) < 0) { | |
527 | result = -EINVAL; | |
528 | goto out_free; | |
529 | } | |
530 | break; | |
f797608c | 531 | case EM2880_BOARD_TERRATEC_HYBRID_XS: |
65638011 | 532 | case EM2880_BOARD_TERRATEC_HYBRID_XS_FR: |
d5b3ba9c | 533 | case EM2881_BOARD_PINNACLE_HYBRID_PRO: |
7ca7ef60 | 534 | case EM2882_BOARD_DIKOM_DK300: |
811fab62 | 535 | case EM2882_BOARD_KWORLD_VS_DVBT: |
f797608c | 536 | dvb->frontend = dvb_attach(zl10353_attach, |
a84f79ae | 537 | &em28xx_zl10353_xc3028_no_i2c_gate, |
f797608c DH |
538 | &dev->i2c_adap); |
539 | if (dvb->frontend == NULL) { | |
540 | /* This board could have either a zl10353 or a mt352. | |
541 | If the chip id isn't for zl10353, try mt352 */ | |
4fb202a8 DH |
542 | dvb->frontend = dvb_attach(mt352_attach, |
543 | &terratec_xs_mt352_cfg, | |
544 | &dev->i2c_adap); | |
f797608c | 545 | } |
4fb202a8 | 546 | |
f797608c DH |
547 | if (attach_xc3028(0x61, dev) < 0) { |
548 | result = -EINVAL; | |
549 | goto out_free; | |
550 | } | |
551 | break; | |
6e7b9ea0 | 552 | case EM2883_BOARD_KWORLD_HYBRID_330U: |
19859229 | 553 | case EM2882_BOARD_EVGA_INDTUBE: |
6e7b9ea0 RK |
554 | dvb->frontend = dvb_attach(s5h1409_attach, |
555 | &em28xx_s5h1409_with_xc3028, | |
556 | &dev->i2c_adap); | |
557 | if (attach_xc3028(0x61, dev) < 0) { | |
558 | result = -EINVAL; | |
559 | goto out_free; | |
560 | } | |
561 | break; | |
d7de5d8f FM |
562 | case EM2882_BOARD_KWORLD_ATSC_315U: |
563 | dvb->frontend = dvb_attach(lgdt330x_attach, | |
564 | &em2880_lgdt3303_dev, | |
565 | &dev->i2c_adap); | |
566 | if (dvb->frontend != NULL) { | |
567 | if (!dvb_attach(simple_tuner_attach, dvb->frontend, | |
568 | &dev->i2c_adap, 0x61, TUNER_THOMSON_DTT761X)) { | |
569 | result = -EINVAL; | |
570 | goto out_free; | |
571 | } | |
572 | } | |
573 | break; | |
17d9d558 DH |
574 | case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2: |
575 | #ifdef EM28XX_DRX397XD_SUPPORT | |
576 | /* We don't have the config structure properly populated, so | |
577 | this is commented out for now */ | |
578 | dvb->frontend = dvb_attach(drx397xD_attach, | |
579 | &em28xx_drx397xD_with_xc3028, | |
580 | &dev->i2c_adap); | |
581 | if (attach_xc3028(0x61, dev) < 0) { | |
582 | result = -EINVAL; | |
583 | goto out_free; | |
584 | } | |
585 | break; | |
586 | #endif | |
285eb1a4 AP |
587 | case EM2870_BOARD_REDDO_DVB_C_USB_BOX: |
588 | /* Philips CU1216L NIM (Philips TDA10023 + Infineon TUA6034) */ | |
589 | dvb->frontend = dvb_attach(tda10023_attach, | |
590 | &em28xx_tda10023_config, | |
591 | &dev->i2c_adap, 0x48); | |
592 | if (dvb->frontend) { | |
593 | if (!dvb_attach(simple_tuner_attach, dvb->frontend, | |
594 | &dev->i2c_adap, 0x60, TUNER_PHILIPS_CU1216L)) { | |
595 | result = -EINVAL; | |
596 | goto out_free; | |
597 | } | |
598 | } | |
599 | break; | |
7e48b30a JW |
600 | case EM2870_BOARD_KWORLD_A340: |
601 | dvb->frontend = dvb_attach(lgdt3305_attach, | |
602 | &em2870_lgdt3304_dev, | |
603 | &dev->i2c_adap); | |
604 | if (dvb->frontend != NULL) | |
605 | dvb_attach(tda18271_attach, dvb->frontend, 0x60, | |
606 | &dev->i2c_adap, &kworld_a340_config); | |
607 | break; | |
3aefb79a | 608 | default: |
480be185 FR |
609 | em28xx_errdev("/2: The frontend of your DVB/ATSC card" |
610 | " isn't supported yet\n"); | |
3aefb79a MCC |
611 | break; |
612 | } | |
3421b778 | 613 | if (NULL == dvb->frontend) { |
480be185 | 614 | em28xx_errdev("/2: frontend initialization failed\n"); |
3421b778 AT |
615 | result = -EINVAL; |
616 | goto out_free; | |
3aefb79a | 617 | } |
d7cba043 MK |
618 | /* define general-purpose callback pointer */ |
619 | dvb->frontend->callback = em28xx_tuner_callback; | |
3aefb79a MCC |
620 | |
621 | /* register everything */ | |
3421b778 AT |
622 | result = register_dvb(dvb, THIS_MODULE, dev, &dev->udev->dev); |
623 | ||
6ea54d93 | 624 | if (result < 0) |
3421b778 | 625 | goto out_free; |
3421b778 | 626 | |
480be185 | 627 | em28xx_info("Successfully loaded em28xx-dvb\n"); |
5013318c MCC |
628 | ret: |
629 | em28xx_set_mode(dev, EM28XX_SUSPEND); | |
630 | mutex_unlock(&dev->lock); | |
631 | return result; | |
3421b778 AT |
632 | |
633 | out_free: | |
634 | kfree(dvb); | |
635 | dev->dvb = NULL; | |
5013318c | 636 | goto ret; |
3aefb79a MCC |
637 | } |
638 | ||
639 | static int dvb_fini(struct em28xx *dev) | |
640 | { | |
505b6d0b | 641 | if (!dev->board.has_dvb) { |
df619181 DH |
642 | /* This device does not support the extension */ |
643 | return 0; | |
644 | } | |
645 | ||
3421b778 AT |
646 | if (dev->dvb) { |
647 | unregister_dvb(dev->dvb); | |
19f48cb1 | 648 | kfree(dev->dvb); |
3421b778 AT |
649 | dev->dvb = NULL; |
650 | } | |
3aefb79a MCC |
651 | |
652 | return 0; | |
653 | } | |
654 | ||
655 | static struct em28xx_ops dvb_ops = { | |
656 | .id = EM28XX_DVB, | |
657 | .name = "Em28xx dvb Extension", | |
658 | .init = dvb_init, | |
659 | .fini = dvb_fini, | |
660 | }; | |
661 | ||
662 | static int __init em28xx_dvb_register(void) | |
663 | { | |
664 | return em28xx_register_extension(&dvb_ops); | |
665 | } | |
666 | ||
667 | static void __exit em28xx_dvb_unregister(void) | |
668 | { | |
669 | em28xx_unregister_extension(&dvb_ops); | |
670 | } | |
671 | ||
672 | module_init(em28xx_dvb_register); | |
673 | module_exit(em28xx_dvb_unregister); |