Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * v4l2 device driver for cx2388x based TV cards | |
4 | * | |
5 | * (c) 2003,04 Gerd Knorr <kraxel@bytesex.org> [SUSE Labs] | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/pci.h> | |
23 | #include <linux/i2c.h> | |
24 | #include <linux/i2c-algo-bit.h> | |
98f30ed0 | 25 | #include <linux/videodev2.h> |
1da177e4 LT |
26 | #include <linux/kdev_t.h> |
27 | ||
9467fe12 | 28 | #include <media/v4l2-device.h> |
1da177e4 LT |
29 | #include <media/tuner.h> |
30 | #include <media/tveeprom.h> | |
c1accaa2 | 31 | #include <media/videobuf-dma-sg.h> |
38f9d308 | 32 | #include <media/v4l2-chip-ident.h> |
f022156b | 33 | #include <media/cx2341x.h> |
ba366a23 | 34 | #include <media/videobuf-dvb.h> |
44243fc2 | 35 | #include <media/ir-kbd-i2c.h> |
6951803c | 36 | #include <media/wm8775.h> |
1da177e4 LT |
37 | |
38 | #include "btcx-risc.h" | |
39 | #include "cx88-reg.h" | |
99e09eac | 40 | #include "tuner-xc2028.h" |
1da177e4 | 41 | |
10b89ee3 | 42 | #include <linux/version.h> |
3593cab5 | 43 | #include <linux/mutex.h> |
92f4fc10 | 44 | #define CX88_VERSION_CODE KERNEL_VERSION(0, 0, 8) |
1da177e4 | 45 | |
1da177e4 LT |
46 | #define UNSET (-1U) |
47 | ||
48 | #define CX88_MAXBOARDS 8 | |
49 | ||
e52e98a7 MCC |
50 | /* Max number of inputs by card */ |
51 | #define MAX_CX88_INPUT 8 | |
52 | ||
1da177e4 LT |
53 | /* ----------------------------------------------------------- */ |
54 | /* defines and enums */ | |
55 | ||
5910e820 MCC |
56 | /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM/LC */ |
57 | #define CX88_NORMS (V4L2_STD_ALL \ | |
58 | & ~V4L2_STD_PAL_H \ | |
59 | & ~V4L2_STD_NTSC_M_KR \ | |
60 | & ~V4L2_STD_SECAM_LC) | |
63ab1bdc | 61 | |
1da177e4 LT |
62 | #define FORMAT_FLAGS_PACKED 0x01 |
63 | #define FORMAT_FLAGS_PLANAR 0x02 | |
64 | ||
65 | #define VBI_LINE_COUNT 17 | |
66 | #define VBI_LINE_LENGTH 2048 | |
67 | ||
e878cf3a MB |
68 | #define AUD_RDS_LINES 4 |
69 | ||
1da177e4 LT |
70 | /* need "shadow" registers for some write-only ones ... */ |
71 | #define SHADOW_AUD_VOL_CTL 1 | |
72 | #define SHADOW_AUD_BAL_CTL 2 | |
cef4e7af | 73 | #define SHADOW_MAX 3 |
1da177e4 | 74 | |
b45009b0 MCC |
75 | /* FM Radio deemphasis type */ |
76 | enum cx88_deemph_type { | |
77 | FM_NO_DEEMPH = 0, | |
78 | FM_DEEMPH_50, | |
79 | FM_DEEMPH_75 | |
80 | }; | |
81 | ||
3a5ba52a ST |
82 | enum cx88_board_type { |
83 | CX88_BOARD_NONE = 0, | |
48d5e803 MK |
84 | CX88_MPEG_DVB, |
85 | CX88_MPEG_BLACKBIRD | |
3a5ba52a ST |
86 | }; |
87 | ||
6c5be74c ST |
88 | enum cx8802_board_access { |
89 | CX8802_DRVCTL_SHARED = 1, | |
90 | CX8802_DRVCTL_EXCLUSIVE = 2, | |
91 | }; | |
92 | ||
1da177e4 LT |
93 | /* ----------------------------------------------------------- */ |
94 | /* tv norms */ | |
95 | ||
63ab1bdc | 96 | static unsigned int inline norm_maxw(v4l2_std_id norm) |
1da177e4 | 97 | { |
63ab1bdc | 98 | return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768; |
1da177e4 LT |
99 | } |
100 | ||
41ef7c1e | 101 | |
63ab1bdc | 102 | static unsigned int inline norm_maxh(v4l2_std_id norm) |
1da177e4 | 103 | { |
63ab1bdc | 104 | return (norm & V4L2_STD_625_50) ? 576 : 480; |
1da177e4 LT |
105 | } |
106 | ||
107 | /* ----------------------------------------------------------- */ | |
108 | /* static data */ | |
109 | ||
110 | struct cx8800_fmt { | |
2e4e98e7 | 111 | const char *name; |
1da177e4 LT |
112 | u32 fourcc; /* v4l2 format id */ |
113 | int depth; | |
114 | int flags; | |
115 | u32 cxformat; | |
116 | }; | |
117 | ||
118 | struct cx88_ctrl { | |
119 | struct v4l2_queryctrl v; | |
120 | u32 off; | |
121 | u32 reg; | |
122 | u32 sreg; | |
123 | u32 mask; | |
124 | u32 shift; | |
125 | }; | |
126 | ||
127 | /* ----------------------------------------------------------- */ | |
128 | /* SRAM memory management data (see cx88-core.c) */ | |
129 | ||
130 | #define SRAM_CH21 0 /* video */ | |
131 | #define SRAM_CH22 1 | |
132 | #define SRAM_CH23 2 | |
133 | #define SRAM_CH24 3 /* vbi */ | |
134 | #define SRAM_CH25 4 /* audio */ | |
135 | #define SRAM_CH26 5 | |
136 | #define SRAM_CH28 6 /* mpeg */ | |
e878cf3a | 137 | #define SRAM_CH27 7 /* audio rds */ |
1da177e4 LT |
138 | /* more */ |
139 | ||
140 | struct sram_channel { | |
2e4e98e7 | 141 | const char *name; |
1da177e4 LT |
142 | u32 cmds_start; |
143 | u32 ctrl_start; | |
144 | u32 cdt; | |
145 | u32 fifo_start; | |
146 | u32 fifo_size; | |
147 | u32 ptr1_reg; | |
148 | u32 ptr2_reg; | |
149 | u32 cnt1_reg; | |
150 | u32 cnt2_reg; | |
151 | }; | |
2e4e98e7 | 152 | extern const struct sram_channel const cx88_sram_channels[]; |
1da177e4 LT |
153 | |
154 | /* ----------------------------------------------------------- */ | |
155 | /* card configuration */ | |
156 | ||
157 | #define CX88_BOARD_NOAUTO UNSET | |
158 | #define CX88_BOARD_UNKNOWN 0 | |
159 | #define CX88_BOARD_HAUPPAUGE 1 | |
160 | #define CX88_BOARD_GDI 2 | |
161 | #define CX88_BOARD_PIXELVIEW 3 | |
162 | #define CX88_BOARD_ATI_WONDER_PRO 4 | |
163 | #define CX88_BOARD_WINFAST2000XP_EXPERT 5 | |
7418f346 | 164 | #define CX88_BOARD_AVERTV_STUDIO_303 6 |
1da177e4 LT |
165 | #define CX88_BOARD_MSI_TVANYWHERE_MASTER 7 |
166 | #define CX88_BOARD_WINFAST_DV2000 8 | |
167 | #define CX88_BOARD_LEADTEK_PVR2000 9 | |
168 | #define CX88_BOARD_IODATA_GVVCP3PCI 10 | |
169 | #define CX88_BOARD_PROLINK_PLAYTVPVR 11 | |
170 | #define CX88_BOARD_ASUS_PVR_416 12 | |
171 | #define CX88_BOARD_MSI_TVANYWHERE 13 | |
172 | #define CX88_BOARD_KWORLD_DVB_T 14 | |
173 | #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1 15 | |
174 | #define CX88_BOARD_KWORLD_LTV883 16 | |
a82decf6 | 175 | #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q 17 |
1da177e4 LT |
176 | #define CX88_BOARD_HAUPPAUGE_DVB_T1 18 |
177 | #define CX88_BOARD_CONEXANT_DVB_T1 19 | |
178 | #define CX88_BOARD_PROVIDEO_PV259 20 | |
179 | #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS 21 | |
180 | #define CX88_BOARD_PCHDTV_HD3000 22 | |
181 | #define CX88_BOARD_DNTV_LIVE_DVB_T 23 | |
182 | #define CX88_BOARD_HAUPPAUGE_ROSLYN 24 | |
a82decf6 | 183 | #define CX88_BOARD_DIGITALLOGIC_MEC 25 |
1da177e4 | 184 | #define CX88_BOARD_IODATA_GVBCTV7E 26 |
239df2e2 | 185 | #define CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO 27 |
b45009b0 | 186 | #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T 28 |
a82decf6 | 187 | #define CX88_BOARD_ADSTECH_DVB_T_PCI 29 |
e057ee11 | 188 | #define CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1 30 |
9fef07ca | 189 | #define CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD 31 |
d45170ed | 190 | #define CX88_BOARD_AVERMEDIA_ULTRATV_MC_550 32 |
0bcc37c3 | 191 | #define CX88_BOARD_KWORLD_VSTREAM_EXPERT_DVD 33 |
e976f937 | 192 | #define CX88_BOARD_ATI_HDTVWONDER 34 |
2b5200a7 | 193 | #define CX88_BOARD_WINFAST_DTV1000 35 |
7418f346 | 194 | #define CX88_BOARD_AVERTV_303 36 |
0fa14aa6 ST |
195 | #define CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1 37 |
196 | #define CX88_BOARD_HAUPPAUGE_NOVASE2_S1 38 | |
0e0351e3 | 197 | #define CX88_BOARD_KWORLD_DVBS_100 39 |
611900c1 ST |
198 | #define CX88_BOARD_HAUPPAUGE_HVR1100 40 |
199 | #define CX88_BOARD_HAUPPAUGE_HVR1100LP 41 | |
fc40b261 | 200 | #define CX88_BOARD_DNTV_LIVE_DVB_T_PRO 42 |
f39624fd | 201 | #define CX88_BOARD_KWORLD_DVB_T_CX22702 43 |
43eabb4e | 202 | #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL 44 |
44256de1 | 203 | #define CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT 45 |
780dfef3 | 204 | #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID 46 |
da215d22 | 205 | #define CX88_BOARD_PCHDTV_HD5500 47 |
b3038304 | 206 | #define CX88_BOARD_KWORLD_MCE200_DELUXE 48 |
a3124622 | 207 | #define CX88_BOARD_PIXELVIEW_PLAYTV_P7000 49 |
be4f4519 | 208 | #define CX88_BOARD_NPGTECH_REALTV_TOP10FM 50 |
4bd6e9d9 | 209 | #define CX88_BOARD_WINFAST_DTV2000H 51 |
c02a34f4 | 210 | #define CX88_BOARD_GENIATECH_DVBS 52 |
ad10c930 | 211 | #define CX88_BOARD_HAUPPAUGE_HVR3000 53 |
d1009bd7 | 212 | #define CX88_BOARD_NORWOOD_MICRO 54 |
2acadefa | 213 | #define CX88_BOARD_TE_DTV_250_OEM_SWANN 55 |
aa481a65 | 214 | #define CX88_BOARD_HAUPPAUGE_HVR1300 56 |
7cb47a14 | 215 | #define CX88_BOARD_ADSTECH_PTV_390 57 |
60464da8 | 216 | #define CX88_BOARD_PINNACLE_PCTV_HD_800i 58 |
5c00fac0 | 217 | #define CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO 59 |
9507901e MCC |
218 | #define CX88_BOARD_PINNACLE_HYBRID_PCTV 60 |
219 | #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL 61 | |
220 | #define CX88_BOARD_POWERCOLOR_REAL_ANGEL 62 | |
221 | #define CX88_BOARD_GENIATECH_X8000_MT 63 | |
b3fb91d2 | 222 | #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO 64 |
1117d6ba | 223 | #define CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD 65 |
2422a9b3 | 224 | #define CX88_BOARD_PROLINK_PV_8000GT 66 |
99e09eac | 225 | #define CX88_BOARD_KWORLD_ATSC_120 67 |
5bd1b663 ST |
226 | #define CX88_BOARD_HAUPPAUGE_HVR4000 68 |
227 | #define CX88_BOARD_HAUPPAUGE_HVR4000LITE 69 | |
af832623 | 228 | #define CX88_BOARD_TEVII_S460 70 |
4cd7fb87 | 229 | #define CX88_BOARD_OMICOM_SS4_PCI 71 |
ee73042c | 230 | #define CX88_BOARD_TBS_8920 72 |
e4aab64c | 231 | #define CX88_BOARD_TEVII_S420 73 |
a31d2bb7 | 232 | #define CX88_BOARD_PROLINK_PV_GLOBAL_XTREME 74 |
57f51dbc | 233 | #define CX88_BOARD_PROF_7300 75 |
4b29631d IL |
234 | #define CX88_BOARD_SATTRADE_ST4200 76 |
235 | #define CX88_BOARD_TBS_8910 77 | |
cd3cde12 | 236 | #define CX88_BOARD_PROF_6200 78 |
70101a27 | 237 | #define CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII 79 |
501d8cd4 | 238 | #define CX88_BOARD_HAUPPAUGE_IRONLY 80 |
3047a176 | 239 | #define CX88_BOARD_WINFAST_DTV1800H 81 |
4d14c833 | 240 | #define CX88_BOARD_WINFAST_DTV2000H_J 82 |
b699c271 | 241 | #define CX88_BOARD_PROF_7301 83 |
4f3ca2f1 | 242 | #define CX88_BOARD_SAMSUNG_SMT_7020 84 |
111ac84a | 243 | #define CX88_BOARD_TWINHAN_VP1027_DVBS 85 |
0cb73639 | 244 | #define CX88_BOARD_TEVII_S464 86 |
1da177e4 LT |
245 | |
246 | enum cx88_itype { | |
247 | CX88_VMUX_COMPOSITE1 = 1, | |
248 | CX88_VMUX_COMPOSITE2, | |
249 | CX88_VMUX_COMPOSITE3, | |
250 | CX88_VMUX_COMPOSITE4, | |
251 | CX88_VMUX_SVIDEO, | |
252 | CX88_VMUX_TELEVISION, | |
253 | CX88_VMUX_CABLE, | |
254 | CX88_VMUX_DVB, | |
255 | CX88_VMUX_DEBUG, | |
256 | CX88_RADIO, | |
257 | }; | |
258 | ||
259 | struct cx88_input { | |
260 | enum cx88_itype type; | |
1da177e4 | 261 | u32 gpio0, gpio1, gpio2, gpio3; |
c252b051 | 262 | unsigned int vmux:2; |
923ac7f7 | 263 | unsigned int audioroute:4; |
1da177e4 LT |
264 | }; |
265 | ||
266 | struct cx88_board { | |
2e4e98e7 | 267 | const char *name; |
1da177e4 | 268 | unsigned int tuner_type; |
b45009b0 MCC |
269 | unsigned int radio_type; |
270 | unsigned char tuner_addr; | |
271 | unsigned char radio_addr; | |
1da177e4 | 272 | int tda9887_conf; |
e52e98a7 | 273 | struct cx88_input input[MAX_CX88_INPUT]; |
1da177e4 | 274 | struct cx88_input radio; |
3a5ba52a | 275 | enum cx88_board_type mpeg; |
38f9d308 | 276 | unsigned int audio_chip; |
363c35fc | 277 | int num_frontends; |
6951803c LR |
278 | |
279 | /* Used for I2S devices */ | |
280 | int i2sinputcntl; | |
1da177e4 LT |
281 | }; |
282 | ||
283 | struct cx88_subid { | |
284 | u16 subvendor; | |
285 | u16 subdevice; | |
286 | u32 card; | |
287 | }; | |
288 | ||
d06b49ed | 289 | enum cx88_tvaudio { |
290 | WW_NONE = 1, | |
291 | WW_BTSC, | |
292 | WW_BG, | |
293 | WW_DK, | |
294 | WW_I, | |
295 | WW_L, | |
296 | WW_EIAJ, | |
297 | WW_I2SPT, | |
298 | WW_FM, | |
299 | WW_I2SADC, | |
300 | WW_M | |
301 | }; | |
302 | ||
6a59d64c | 303 | #define INPUT(nr) (core->board.input[nr]) |
1da177e4 LT |
304 | |
305 | /* ----------------------------------------------------------- */ | |
306 | /* device / file handle status */ | |
307 | ||
308 | #define RESOURCE_OVERLAY 1 | |
309 | #define RESOURCE_VIDEO 2 | |
310 | #define RESOURCE_VBI 4 | |
311 | ||
d044189d | 312 | #define BUFFER_TIMEOUT msecs_to_jiffies(2000) |
1da177e4 LT |
313 | |
314 | /* buffer for one video frame */ | |
315 | struct cx88_buffer { | |
316 | /* common v4l buffer stuff -- must be first */ | |
317 | struct videobuf_buffer vb; | |
318 | ||
319 | /* cx88 specific */ | |
320 | unsigned int bpl; | |
321 | struct btcx_riscmem risc; | |
2e4e98e7 | 322 | const struct cx8800_fmt *fmt; |
1da177e4 LT |
323 | u32 count; |
324 | }; | |
325 | ||
326 | struct cx88_dmaqueue { | |
327 | struct list_head active; | |
328 | struct list_head queued; | |
329 | struct timer_list timeout; | |
330 | struct btcx_riscmem stopper; | |
331 | u32 count; | |
332 | }; | |
333 | ||
334 | struct cx88_core { | |
335 | struct list_head devlist; | |
336 | atomic_t refcount; | |
337 | ||
338 | /* board name */ | |
339 | int nr; | |
340 | char name[32]; | |
341 | ||
342 | /* pci stuff */ | |
343 | int pci_bus; | |
344 | int pci_slot; | |
4ac97914 MCC |
345 | u32 __iomem *lmmio; |
346 | u8 __iomem *bmmio; | |
1da177e4 LT |
347 | u32 shadow[SHADOW_MAX]; |
348 | int pci_irqmask; | |
349 | ||
350 | /* i2c i/o */ | |
351 | struct i2c_adapter i2c_adap; | |
352 | struct i2c_algo_bit_data i2c_algo; | |
353 | struct i2c_client i2c_client; | |
354 | u32 i2c_state, i2c_rc; | |
355 | ||
356 | /* config info -- analog */ | |
9467fe12 | 357 | struct v4l2_device v4l2_dev; |
b8341e1d | 358 | struct i2c_client *i2c_rtc; |
6a59d64c TP |
359 | unsigned int boardnr; |
360 | struct cx88_board board; | |
1da177e4 | 361 | |
0345c387 ST |
362 | /* Supported V4L _STD_ tuner formats */ |
363 | unsigned int tuner_formats; | |
364 | ||
1da177e4 | 365 | /* config info -- dvb */ |
5a3ebe87 | 366 | #if defined(CONFIG_VIDEO_CX88_DVB) || defined(CONFIG_VIDEO_CX88_DVB_MODULE) |
e32fadc4 | 367 | int (*prev_set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage); |
05ad3907 | 368 | #endif |
77f56279 | 369 | void (*gate_ctrl)(struct cx88_core *core, int open); |
1da177e4 LT |
370 | |
371 | /* state info */ | |
372 | struct task_struct *kthread; | |
63ab1bdc | 373 | v4l2_std_id tvnorm; |
d06b49ed | 374 | enum cx88_tvaudio tvaudio; |
1da177e4 LT |
375 | u32 audiomode_manual; |
376 | u32 audiomode_current; | |
377 | u32 input; | |
378 | u32 astat; | |
b1706b91 | 379 | u32 use_nicam; |
e878cf3a | 380 | unsigned long last_change; |
1da177e4 LT |
381 | |
382 | /* IR remote control state */ | |
383 | struct cx88_IR *ir; | |
e52e98a7 | 384 | |
44243fc2 MCC |
385 | /* I2C remote data */ |
386 | struct IR_i2c_init_data init_data; | |
6951803c | 387 | struct wm8775_platform_data wm8775_data; |
44243fc2 | 388 | |
3593cab5 | 389 | struct mutex lock; |
e52e98a7 MCC |
390 | /* various v4l controls */ |
391 | u32 freq; | |
8d115931 | 392 | int users; |
f4bd4be8 | 393 | int mpeg_users; |
611900c1 ST |
394 | |
395 | /* cx88-video needs to access cx8802 for hybrid tuner pll access. */ | |
396 | struct cx8802_dev *dvbdev; | |
6c5be74c | 397 | enum cx88_board_type active_type_id; |
27d0fe18 | 398 | int active_ref; |
363c35fc | 399 | int active_fe_id; |
1da177e4 LT |
400 | }; |
401 | ||
9467fe12 HV |
402 | static inline struct cx88_core *to_core(struct v4l2_device *v4l2_dev) |
403 | { | |
404 | return container_of(v4l2_dev, struct cx88_core, v4l2_dev); | |
405 | } | |
406 | ||
6951803c LR |
407 | #define WM8775_GID (1 << 0) |
408 | ||
409 | #define call_hw(core, grpid, o, f, args...) \ | |
b8341e1d HV |
410 | do { \ |
411 | if (!core->i2c_rc) { \ | |
412 | if (core->gate_ctrl) \ | |
413 | core->gate_ctrl(core, 1); \ | |
6951803c | 414 | v4l2_device_call_all(&core->v4l2_dev, grpid, o, f, ##args); \ |
b8341e1d HV |
415 | if (core->gate_ctrl) \ |
416 | core->gate_ctrl(core, 0); \ | |
417 | } \ | |
418 | } while (0) | |
419 | ||
6951803c LR |
420 | #define call_all(core, o, f, args...) call_hw(core, 0, o, f, ##args) |
421 | ||
1da177e4 LT |
422 | struct cx8800_dev; |
423 | struct cx8802_dev; | |
424 | ||
425 | /* ----------------------------------------------------------- */ | |
426 | /* function 0: video stuff */ | |
427 | ||
428 | struct cx8800_fh { | |
429 | struct cx8800_dev *dev; | |
430 | enum v4l2_buf_type type; | |
431 | int radio; | |
432 | unsigned int resources; | |
433 | ||
434 | /* video overlay */ | |
435 | struct v4l2_window win; | |
436 | struct v4l2_clip *clips; | |
437 | unsigned int nclips; | |
438 | ||
439 | /* video capture */ | |
2e4e98e7 | 440 | const struct cx8800_fmt *fmt; |
1da177e4 LT |
441 | unsigned int width,height; |
442 | struct videobuf_queue vidq; | |
443 | ||
444 | /* vbi capture */ | |
445 | struct videobuf_queue vbiq; | |
446 | }; | |
447 | ||
448 | struct cx8800_suspend_state { | |
449 | int disabled; | |
450 | }; | |
451 | ||
452 | struct cx8800_dev { | |
453 | struct cx88_core *core; | |
e52e98a7 | 454 | spinlock_t slock; |
1da177e4 LT |
455 | |
456 | /* various device info */ | |
457 | unsigned int resources; | |
458 | struct video_device *video_dev; | |
459 | struct video_device *vbi_dev; | |
460 | struct video_device *radio_dev; | |
461 | ||
462 | /* pci i/o */ | |
463 | struct pci_dev *pci; | |
464 | unsigned char pci_rev,pci_lat; | |
465 | ||
1da177e4 LT |
466 | |
467 | /* capture queues */ | |
468 | struct cx88_dmaqueue vidq; | |
469 | struct cx88_dmaqueue vbiq; | |
470 | ||
471 | /* various v4l controls */ | |
1da177e4 LT |
472 | |
473 | /* other global state info */ | |
474 | struct cx8800_suspend_state state; | |
475 | }; | |
476 | ||
477 | /* ----------------------------------------------------------- */ | |
478 | /* function 1: audio/alsa stuff */ | |
e52e98a7 | 479 | /* =============> moved to cx88-alsa.c <====================== */ |
1da177e4 | 480 | |
1da177e4 LT |
481 | |
482 | /* ----------------------------------------------------------- */ | |
483 | /* function 2: mpeg stuff */ | |
484 | ||
485 | struct cx8802_fh { | |
486 | struct cx8802_dev *dev; | |
487 | struct videobuf_queue mpegq; | |
488 | }; | |
489 | ||
490 | struct cx8802_suspend_state { | |
491 | int disabled; | |
492 | }; | |
493 | ||
6c5be74c ST |
494 | struct cx8802_driver { |
495 | struct cx88_core *core; | |
081c2fc8 TP |
496 | |
497 | /* List of drivers attached to device */ | |
498 | struct list_head drvlist; | |
6c5be74c ST |
499 | |
500 | /* Type of driver and access required */ | |
501 | enum cx88_board_type type_id; | |
502 | enum cx8802_board_access hw_access; | |
503 | ||
504 | /* MPEG 8802 internal only */ | |
505 | int (*suspend)(struct pci_dev *pci_dev, pm_message_t state); | |
506 | int (*resume)(struct pci_dev *pci_dev); | |
507 | ||
1fe70e96 JN |
508 | /* Callers to the following functions must hold core->lock */ |
509 | ||
1d6213ab JN |
510 | /* MPEG 8802 -> mini driver - Driver probe and configuration */ |
511 | int (*probe)(struct cx8802_driver *drv); | |
6c5be74c ST |
512 | int (*remove)(struct cx8802_driver *drv); |
513 | ||
514 | /* MPEG 8802 -> mini driver - Access for hardware control */ | |
515 | int (*advise_acquire)(struct cx8802_driver *drv); | |
516 | int (*advise_release)(struct cx8802_driver *drv); | |
517 | ||
518 | /* MPEG 8802 <- mini driver - Access for hardware control */ | |
519 | int (*request_acquire)(struct cx8802_driver *drv); | |
520 | int (*request_release)(struct cx8802_driver *drv); | |
521 | }; | |
522 | ||
1da177e4 LT |
523 | struct cx8802_dev { |
524 | struct cx88_core *core; | |
e52e98a7 | 525 | spinlock_t slock; |
1da177e4 LT |
526 | |
527 | /* pci i/o */ | |
528 | struct pci_dev *pci; | |
529 | unsigned char pci_rev,pci_lat; | |
530 | ||
531 | /* dma queues */ | |
532 | struct cx88_dmaqueue mpegq; | |
533 | u32 ts_packet_size; | |
534 | u32 ts_packet_count; | |
535 | ||
536 | /* other global state info */ | |
537 | struct cx8802_suspend_state state; | |
538 | ||
539 | /* for blackbird only */ | |
540 | struct list_head devlist; | |
7717cbed TP |
541 | #if defined(CONFIG_VIDEO_CX88_BLACKBIRD) || \ |
542 | defined(CONFIG_VIDEO_CX88_BLACKBIRD_MODULE) | |
1da177e4 LT |
543 | struct video_device *mpeg_dev; |
544 | u32 mailbox; | |
545 | int width; | |
546 | int height; | |
f9e54e0c | 547 | unsigned char mpeg_active; /* nonzero if mpeg encoder is active */ |
1da177e4 | 548 | |
7717cbed TP |
549 | /* mpeg params */ |
550 | struct cx2341x_mpeg_params params; | |
551 | #endif | |
552 | ||
5a3ebe87 | 553 | #if defined(CONFIG_VIDEO_CX88_DVB) || defined(CONFIG_VIDEO_CX88_DVB_MODULE) |
1da177e4 | 554 | /* for dvb only */ |
363c35fc | 555 | struct videobuf_dvb_frontends frontends; |
f0ad9097 | 556 | #endif |
fc40b261 | 557 | |
f0ad9097 TP |
558 | #if defined(CONFIG_VIDEO_CX88_VP3054) || \ |
559 | defined(CONFIG_VIDEO_CX88_VP3054_MODULE) | |
560 | /* For VP3045 secondary I2C bus support */ | |
561 | struct vp3054_i2c_state *vp3054; | |
05ad3907 | 562 | #endif |
1da177e4 LT |
563 | /* for switching modulation types */ |
564 | unsigned char ts_gen_cntrl; | |
31629424 | 565 | |
8a317a87 | 566 | /* List of attached drivers; must hold core->lock to access */ |
081c2fc8 | 567 | struct list_head drvlist; |
8a317a87 | 568 | |
081c2fc8 | 569 | struct work_struct request_module_wk; |
1da177e4 LT |
570 | }; |
571 | ||
572 | /* ----------------------------------------------------------- */ | |
573 | ||
574 | #define cx_read(reg) readl(core->lmmio + ((reg)>>2)) | |
575 | #define cx_write(reg,value) writel((value), core->lmmio + ((reg)>>2)) | |
576 | #define cx_writeb(reg,value) writeb((value), core->bmmio + (reg)) | |
577 | ||
578 | #define cx_andor(reg,mask,value) \ | |
579 | writel((readl(core->lmmio+((reg)>>2)) & ~(mask)) |\ | |
580 | ((value) & (mask)), core->lmmio+((reg)>>2)) | |
581 | #define cx_set(reg,bit) cx_andor((reg),(bit),(bit)) | |
582 | #define cx_clear(reg,bit) cx_andor((reg),(bit),0) | |
583 | ||
584 | #define cx_wait(d) { if (need_resched()) schedule(); else udelay(d); } | |
585 | ||
586 | /* shadow registers */ | |
587 | #define cx_sread(sreg) (core->shadow[sreg]) | |
588 | #define cx_swrite(sreg,reg,value) \ | |
589 | (core->shadow[sreg] = value, \ | |
590 | writel(core->shadow[sreg], core->lmmio + ((reg)>>2))) | |
591 | #define cx_sandor(sreg,reg,mask,value) \ | |
592 | (core->shadow[sreg] = (core->shadow[sreg] & ~(mask)) | ((value) & (mask)), \ | |
593 | writel(core->shadow[sreg], core->lmmio + ((reg)>>2))) | |
594 | ||
595 | /* ----------------------------------------------------------- */ | |
596 | /* cx88-core.c */ | |
597 | ||
2e4e98e7 | 598 | extern void cx88_print_irqbits(const char *name, const char *tag, const char *strings[], |
66623a04 | 599 | int len, u32 bits, u32 mask); |
1da177e4 LT |
600 | |
601 | extern int cx88_core_irq(struct cx88_core *core, u32 status); | |
602 | extern void cx88_wakeup(struct cx88_core *core, | |
603 | struct cx88_dmaqueue *q, u32 count); | |
604 | extern void cx88_shutdown(struct cx88_core *core); | |
605 | extern int cx88_reset(struct cx88_core *core); | |
606 | ||
607 | extern int | |
608 | cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc, | |
609 | struct scatterlist *sglist, | |
610 | unsigned int top_offset, unsigned int bottom_offset, | |
611 | unsigned int bpl, unsigned int padding, unsigned int lines); | |
612 | extern int | |
613 | cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc, | |
614 | struct scatterlist *sglist, unsigned int bpl, | |
05b27233 | 615 | unsigned int lines, unsigned int lpi); |
1da177e4 LT |
616 | extern int |
617 | cx88_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc, | |
618 | u32 reg, u32 mask, u32 value); | |
619 | extern void | |
c7b0ac05 | 620 | cx88_free_buffer(struct videobuf_queue *q, struct cx88_buffer *buf); |
1da177e4 LT |
621 | |
622 | extern void cx88_risc_disasm(struct cx88_core *core, | |
623 | struct btcx_riscmem *risc); | |
624 | extern int cx88_sram_channel_setup(struct cx88_core *core, | |
2e4e98e7 | 625 | const struct sram_channel *ch, |
1da177e4 LT |
626 | unsigned int bpl, u32 risc); |
627 | extern void cx88_sram_channel_dump(struct cx88_core *core, | |
2e4e98e7 | 628 | const struct sram_channel *ch); |
1da177e4 LT |
629 | |
630 | extern int cx88_set_scale(struct cx88_core *core, unsigned int width, | |
631 | unsigned int height, enum v4l2_field field); | |
63ab1bdc | 632 | extern int cx88_set_tvnorm(struct cx88_core *core, v4l2_std_id norm); |
1da177e4 LT |
633 | |
634 | extern struct video_device *cx88_vdev_init(struct cx88_core *core, | |
635 | struct pci_dev *pci, | |
2e4e98e7 | 636 | const struct video_device *template_, |
637 | const char *type); | |
1da177e4 LT |
638 | extern struct cx88_core* cx88_core_get(struct pci_dev *pci); |
639 | extern void cx88_core_put(struct cx88_core *core, | |
640 | struct pci_dev *pci); | |
641 | ||
6f502b8a MCC |
642 | extern int cx88_start_audio_dma(struct cx88_core *core); |
643 | extern int cx88_stop_audio_dma(struct cx88_core *core); | |
644 | ||
645 | ||
1da177e4 LT |
646 | /* ----------------------------------------------------------- */ |
647 | /* cx88-vbi.c */ | |
648 | ||
8d87cb9f MCC |
649 | /* Can be used as g_vbi_fmt, try_vbi_fmt and s_vbi_fmt */ |
650 | int cx8800_vbi_fmt (struct file *file, void *priv, | |
651 | struct v4l2_format *f); | |
652 | ||
b45009b0 MCC |
653 | /* |
654 | int cx8800_start_vbi_dma(struct cx8800_dev *dev, | |
655 | struct cx88_dmaqueue *q, | |
656 | struct cx88_buffer *buf); | |
657 | */ | |
1da177e4 LT |
658 | int cx8800_stop_vbi_dma(struct cx8800_dev *dev); |
659 | int cx8800_restart_vbi_queue(struct cx8800_dev *dev, | |
660 | struct cx88_dmaqueue *q); | |
661 | void cx8800_vbi_timeout(unsigned long data); | |
662 | ||
2e4e98e7 | 663 | extern const struct videobuf_queue_ops cx8800_vbi_qops; |
1da177e4 LT |
664 | |
665 | /* ----------------------------------------------------------- */ | |
666 | /* cx88-i2c.c */ | |
667 | ||
668 | extern int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci); | |
1da177e4 LT |
669 | |
670 | ||
671 | /* ----------------------------------------------------------- */ | |
672 | /* cx88-cards.c */ | |
673 | ||
d7cba043 | 674 | extern int cx88_tuner_callback(void *dev, int component, int command, int arg); |
bbc83597 TP |
675 | extern int cx88_get_resources(const struct cx88_core *core, |
676 | struct pci_dev *pci); | |
677 | extern struct cx88_core *cx88_core_create(struct pci_dev *pci, int nr); | |
99e09eac | 678 | extern void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl); |
1da177e4 LT |
679 | |
680 | /* ----------------------------------------------------------- */ | |
681 | /* cx88-tvaudio.c */ | |
682 | ||
1da177e4 LT |
683 | void cx88_set_tvaudio(struct cx88_core *core); |
684 | void cx88_newstation(struct cx88_core *core); | |
685 | void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t); | |
686 | void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual); | |
687 | int cx88_audio_thread(void *data); | |
688 | ||
6c5be74c ST |
689 | int cx8802_register_driver(struct cx8802_driver *drv); |
690 | int cx8802_unregister_driver(struct cx8802_driver *drv); | |
8a317a87 JN |
691 | |
692 | /* Caller must hold core->lock */ | |
6c5be74c ST |
693 | struct cx8802_driver * cx8802_get_driver(struct cx8802_dev *dev, enum cx88_board_type btype); |
694 | ||
e878cf3a MB |
695 | /* ----------------------------------------------------------- */ |
696 | /* cx88-dsp.c */ | |
697 | ||
698 | s32 cx88_dsp_detect_stereo_sap(struct cx88_core *core); | |
699 | ||
1da177e4 LT |
700 | /* ----------------------------------------------------------- */ |
701 | /* cx88-input.c */ | |
702 | ||
703 | int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci); | |
704 | int cx88_ir_fini(struct cx88_core *core); | |
705 | void cx88_ir_irq(struct cx88_core *core); | |
92f4fc10 MCC |
706 | int cx88_ir_start(struct cx88_core *core); |
707 | void cx88_ir_stop(struct cx88_core *core); | |
44243fc2 | 708 | extern void cx88_i2c_init_ir(struct cx88_core *core); |
1da177e4 LT |
709 | |
710 | /* ----------------------------------------------------------- */ | |
711 | /* cx88-mpeg.c */ | |
712 | ||
c7b0ac05 MCC |
713 | int cx8802_buf_prepare(struct videobuf_queue *q,struct cx8802_dev *dev, |
714 | struct cx88_buffer *buf, enum v4l2_field field); | |
1da177e4 LT |
715 | void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf); |
716 | void cx8802_cancel_buffers(struct cx8802_dev *dev); | |
717 | ||
e52e98a7 | 718 | /* ----------------------------------------------------------- */ |
54da49f5 | 719 | /* cx88-video.c*/ |
38a2713a | 720 | extern const u32 cx88_user_ctrls[]; |
6d04203c FD |
721 | extern int cx8800_ctrl_query(struct cx88_core *core, |
722 | struct v4l2_queryctrl *qctrl); | |
54da49f5 MCC |
723 | int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i); |
724 | int cx88_set_freq (struct cx88_core *core,struct v4l2_frequency *f); | |
725 | int cx88_get_control(struct cx88_core *core, struct v4l2_control *ctl); | |
726 | int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl); | |
727 | int cx88_video_mux(struct cx88_core *core, unsigned int input); |