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V4L/DVB (7094): static memory
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8d87cb9f
MCC		 8 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
9 * - Multituner support
10 * - video_ioctl2 conversion
11 * - PAL/M fixes
12 *
1da177e4
LT		 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/init.h>
29#include <linux/list.h>
30#include <linux/module.h>
1da177e4
LT		 31#include <linux/kmod.h>
32#include <linux/kernel.h>
33#include <linux/slab.h>
34#include <linux/interrupt.h>
c24228da 35#include <linux/dma-mapping.h>
1da177e4
LT		 36#include <linux/delay.h>
37#include <linux/kthread.h>
38#include <asm/div64.h>
39
40#include "cx88.h"
5e453dc7 41#include <media/v4l2-common.h>
1da177e4 42
cd41e28e 43#ifdef CONFIG_VIDEO_V4L1_COMPAT
79436633
MCC		 44/* Include V4L1 specific functions. Should be removed soon */
45#include <linux/videodev.h>
cd41e28e 46#endif
79436633 47
1da177e4
LT		 48MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
49MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
50MODULE_LICENSE("GPL");
51
52/* ------------------------------------------------------------------ */
53
54static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
55static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
56static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
57
58module_param_array(video_nr, int, NULL, 0444);
59module_param_array(vbi_nr, int, NULL, 0444);
60module_param_array(radio_nr, int, NULL, 0444);
61
62MODULE_PARM_DESC(video_nr,"video device numbers");
63MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
64MODULE_PARM_DESC(radio_nr,"radio device numbers");
65
ff699e6b 66static unsigned int video_debug;
1da177e4
LT		 67module_param(video_debug,int,0644);
68MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
69
ff699e6b 70static unsigned int irq_debug;
1da177e4
LT		 71module_param(irq_debug,int,0644);
72MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
73
74static unsigned int vid_limit = 16;
75module_param(vid_limit,int,0644);
76MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
77
78#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 79 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4
LT		 80
81/* ------------------------------------------------------------------ */
82
83static LIST_HEAD(cx8800_devlist);
84
85/* ------------------------------------------------------------------- */
86/* static data */
87
1da177e4
LT		 88static struct cx8800_fmt formats[] = {
89 {
90 .name = "8 bpp, gray",
91 .fourcc = V4L2_PIX_FMT_GREY,
92 .cxformat = ColorFormatY8,
93 .depth = 8,
94 .flags = FORMAT_FLAGS_PACKED,
95 },{
96 .name = "15 bpp RGB, le",
97 .fourcc = V4L2_PIX_FMT_RGB555,
98 .cxformat = ColorFormatRGB15,
99 .depth = 16,
100 .flags = FORMAT_FLAGS_PACKED,
101 },{
102 .name = "15 bpp RGB, be",
103 .fourcc = V4L2_PIX_FMT_RGB555X,
104 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
105 .depth = 16,
106 .flags = FORMAT_FLAGS_PACKED,
107 },{
108 .name = "16 bpp RGB, le",
109 .fourcc = V4L2_PIX_FMT_RGB565,
110 .cxformat = ColorFormatRGB16,
111 .depth = 16,
112 .flags = FORMAT_FLAGS_PACKED,
113 },{
114 .name = "16 bpp RGB, be",
115 .fourcc = V4L2_PIX_FMT_RGB565X,
116 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
117 .depth = 16,
118 .flags = FORMAT_FLAGS_PACKED,
119 },{
120 .name = "24 bpp RGB, le",
121 .fourcc = V4L2_PIX_FMT_BGR24,
122 .cxformat = ColorFormatRGB24,
123 .depth = 24,
124 .flags = FORMAT_FLAGS_PACKED,
125 },{
126 .name = "32 bpp RGB, le",
127 .fourcc = V4L2_PIX_FMT_BGR32,
128 .cxformat = ColorFormatRGB32,
129 .depth = 32,
130 .flags = FORMAT_FLAGS_PACKED,
131 },{
132 .name = "32 bpp RGB, be",
133 .fourcc = V4L2_PIX_FMT_RGB32,
134 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
135 .depth = 32,
136 .flags = FORMAT_FLAGS_PACKED,
137 },{
138 .name = "4:2:2, packed, YUYV",
139 .fourcc = V4L2_PIX_FMT_YUYV,
140 .cxformat = ColorFormatYUY2,
141 .depth = 16,
142 .flags = FORMAT_FLAGS_PACKED,
143 },{
144 .name = "4:2:2, packed, UYVY",
145 .fourcc = V4L2_PIX_FMT_UYVY,
146 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
147 .depth = 16,
148 .flags = FORMAT_FLAGS_PACKED,
149 },
150};
151
152static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
153{
154 unsigned int i;
155
156 for (i = 0; i < ARRAY_SIZE(formats); i++)
157 if (formats[i].fourcc == fourcc)
158 return formats+i;
159 return NULL;
160}
161
162/* ------------------------------------------------------------------- */
163
164static const struct v4l2_queryctrl no_ctl = {
165 .name = "42",
166 .flags = V4L2_CTRL_FLAG_DISABLED,
167};
168
169static struct cx88_ctrl cx8800_ctls[] = {
170 /* --- video --- */
171 {
172 .v = {
173 .id = V4L2_CID_BRIGHTNESS,
174 .name = "Brightness",
175 .minimum = 0x00,
176 .maximum = 0xff,
177 .step = 1,
9f9c907f 178 .default_value = 0x7f,
1da177e4
LT		 179 .type = V4L2_CTRL_TYPE_INTEGER,
180 },
181 .off = 128,
182 .reg = MO_CONTR_BRIGHT,
183 .mask = 0x00ff,
184 .shift = 0,
185 },{
186 .v = {
187 .id = V4L2_CID_CONTRAST,
188 .name = "Contrast",
189 .minimum = 0,
190 .maximum = 0xff,
191 .step = 1,
70f00044 192 .default_value = 0x3f,
1da177e4
LT		 193 .type = V4L2_CTRL_TYPE_INTEGER,
194 },
41ef7c1e 195 .off = 0,
1da177e4
LT		 196 .reg = MO_CONTR_BRIGHT,
197 .mask = 0xff00,
198 .shift = 8,
199 },{
200 .v = {
201 .id = V4L2_CID_HUE,
202 .name = "Hue",
203 .minimum = 0,
204 .maximum = 0xff,
205 .step = 1,
9f9c907f 206 .default_value = 0x7f,
1da177e4
LT		 207 .type = V4L2_CTRL_TYPE_INTEGER,
208 },
9ac4c158 209 .off = 128,
1da177e4
LT		 210 .reg = MO_HUE,
211 .mask = 0x00ff,
212 .shift = 0,
213 },{
214 /* strictly, this only describes only U saturation.
215 * V saturation is handled specially through code.
216 */
217 .v = {
218 .id = V4L2_CID_SATURATION,
219 .name = "Saturation",
220 .minimum = 0,
221 .maximum = 0xff,
222 .step = 1,
70f00044 223 .default_value = 0x7f,
1da177e4
LT		 224 .type = V4L2_CTRL_TYPE_INTEGER,
225 },
226 .off = 0,
227 .reg = MO_UV_SATURATION,
228 .mask = 0x00ff,
229 .shift = 0,
230 },{
231 /* --- audio --- */
232 .v = {
233 .id = V4L2_CID_AUDIO_MUTE,
234 .name = "Mute",
235 .minimum = 0,
236 .maximum = 1,
70f00044 237 .default_value = 1,
1da177e4
LT		 238 .type = V4L2_CTRL_TYPE_BOOLEAN,
239 },
240 .reg = AUD_VOL_CTL,
241 .sreg = SHADOW_AUD_VOL_CTL,
242 .mask = (1 << 6),
243 .shift = 6,
244 },{
245 .v = {
246 .id = V4L2_CID_AUDIO_VOLUME,
247 .name = "Volume",
248 .minimum = 0,
249 .maximum = 0x3f,
250 .step = 1,
9f9c907f 251 .default_value = 0x3f,
1da177e4
LT		 252 .type = V4L2_CTRL_TYPE_INTEGER,
253 },
254 .reg = AUD_VOL_CTL,
255 .sreg = SHADOW_AUD_VOL_CTL,
256 .mask = 0x3f,
257 .shift = 0,
258 },{
259 .v = {
260 .id = V4L2_CID_AUDIO_BALANCE,
261 .name = "Balance",
262 .minimum = 0,
263 .maximum = 0x7f,
264 .step = 1,
265 .default_value = 0x40,
266 .type = V4L2_CTRL_TYPE_INTEGER,
267 },
268 .reg = AUD_BAL_CTL,
269 .sreg = SHADOW_AUD_BAL_CTL,
270 .mask = 0x7f,
271 .shift = 0,
272 }
273};
408b664a 274static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
1da177e4 275
38a2713a
MK		 276const u32 cx88_user_ctrls[] = {
277 V4L2_CID_USER_CLASS,
278 V4L2_CID_BRIGHTNESS,
279 V4L2_CID_CONTRAST,
280 V4L2_CID_SATURATION,
281 V4L2_CID_HUE,
282 V4L2_CID_AUDIO_VOLUME,
283 V4L2_CID_AUDIO_BALANCE,
284 V4L2_CID_AUDIO_MUTE,
285 0
286};
287EXPORT_SYMBOL(cx88_user_ctrls);
288
289static const u32 *ctrl_classes[] = {
290 cx88_user_ctrls,
291 NULL
292};
293
294int cx8800_ctrl_query(struct v4l2_queryctrl *qctrl)
295{
296 int i;
297
298 if (qctrl->id < V4L2_CID_BASE ||
299 qctrl->id >= V4L2_CID_LASTP1)
300 return -EINVAL;
301 for (i = 0; i < CX8800_CTLS; i++)
302 if (cx8800_ctls[i].v.id == qctrl->id)
303 break;
304 if (i == CX8800_CTLS) {
305 *qctrl = no_ctl;
306 return 0;
307 }
308 *qctrl = cx8800_ctls[i].v;
309 return 0;
310}
311EXPORT_SYMBOL(cx8800_ctrl_query);
312
1da177e4
LT		 313/* ------------------------------------------------------------------- */
314/* resource management */
315
316static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
317{
e52e98a7 318 struct cx88_core *core = dev->core;
1da177e4
LT		 319 if (fh->resources & bit)
320 /* have it already allocated */
321 return 1;
322
323 /* is it free? */
3593cab5 324 mutex_lock(&core->lock);
1da177e4
LT		 325 if (dev->resources & bit) {
326 /* no, someone else uses it */
3593cab5 327 mutex_unlock(&core->lock);
1da177e4
LT		 328 return 0;
329 }
330 /* it's free, grab it */
331 fh->resources |= bit;
332 dev->resources |= bit;
333 dprintk(1,"res: get %d\n",bit);
3593cab5 334 mutex_unlock(&core->lock);
1da177e4
LT		 335 return 1;
336}
337
338static
339int res_check(struct cx8800_fh *fh, unsigned int bit)
340{
341 return (fh->resources & bit);
342}
343
344static
345int res_locked(struct cx8800_dev *dev, unsigned int bit)
346{
347 return (dev->resources & bit);
348}
349
350static
351void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
352{
e52e98a7 353 struct cx88_core *core = dev->core;
ae24601b 354 BUG_ON((fh->resources & bits) != bits);
1da177e4 355
3593cab5 356 mutex_lock(&core->lock);
1da177e4
LT		 357 fh->resources &= ~bits;
358 dev->resources &= ~bits;
359 dprintk(1,"res: put %d\n",bits);
3593cab5 360 mutex_unlock(&core->lock);
1da177e4
LT		 361}
362
363/* ------------------------------------------------------------------ */
364
e90311a1 365int cx88_video_mux(struct cx88_core *core, unsigned int input)
1da177e4 366{
e52e98a7 367 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 368
369 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
6a59d64c
TP		 370 input, INPUT(input).vmux,
371 INPUT(input).gpio0,INPUT(input).gpio1,
372 INPUT(input).gpio2,INPUT(input).gpio3);
e52e98a7 373 core->input = input;
6a59d64c
TP		 374 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
375 cx_write(MO_GP3_IO, INPUT(input).gpio3);
376 cx_write(MO_GP0_IO, INPUT(input).gpio0);
377 cx_write(MO_GP1_IO, INPUT(input).gpio1);
378 cx_write(MO_GP2_IO, INPUT(input).gpio2);
1da177e4 379
6a59d64c 380 switch (INPUT(input).type) {
1da177e4
LT		 381 case CX88_VMUX_SVIDEO:
382 cx_set(MO_AFECFG_IO, 0x00000001);
383 cx_set(MO_INPUT_FORMAT, 0x00010010);
384 cx_set(MO_FILTER_EVEN, 0x00002020);
385 cx_set(MO_FILTER_ODD, 0x00002020);
386 break;
387 default:
388 cx_clear(MO_AFECFG_IO, 0x00000001);
389 cx_clear(MO_INPUT_FORMAT, 0x00010010);
390 cx_clear(MO_FILTER_EVEN, 0x00002020);
391 cx_clear(MO_FILTER_ODD, 0x00002020);
392 break;
393 }
f24546a9 394
66e6fbdf
RC		 395 /* if there are audioroutes defined, we have an external
396 ADC to deal with audio */
7b27d45b 397
66e6fbdf
RC		 398 if (INPUT(input).audioroute) {
399
400 /* cx2388's C-ADC is connected to the tuner only.
401 When used with S-Video, that ADC is busy dealing with
402 chroma, so an external must be used for baseband audio */
403
404 if (INPUT(input).type != CX88_VMUX_TELEVISION &&
405 INPUT(input).type != CX88_RADIO) {
406 /* "ADC mode" */
407 cx_write(AUD_I2SCNTL, 0x1);
f24546a9 408 cx_set(AUD_CTL, EN_I2SIN_ENABLE);
66e6fbdf
RC		 409 } else {
410 /* Normal mode */
411 cx_write(AUD_I2SCNTL, 0x0);
f24546a9 412 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
66e6fbdf
RC		 413 }
414
415 /* The wm8775 module has the "2" route hardwired into
416 the initialization. Some boards may use different
417 routes for different inputs. HVR-1300 surely does */
418 if (core->board.audio_chip &&
419 core->board.audio_chip == AUDIO_CHIP_WM8775) {
420 struct v4l2_routing route;
421
422 route.input = INPUT(input).audioroute;
423 cx88_call_i2c_clients(core,
d8f69971 424 VIDIOC_INT_S_AUDIO_ROUTING, &route);
66e6fbdf
RC		 425
426 }
427
f24546a9 428 }
66e6fbdf 429
1da177e4
LT		 430 return 0;
431}
e90311a1 432EXPORT_SYMBOL(cx88_video_mux);
1da177e4
LT		 433
434/* ------------------------------------------------------------------ */
435
436static int start_video_dma(struct cx8800_dev *dev,
437 struct cx88_dmaqueue *q,
438 struct cx88_buffer *buf)
439{
440 struct cx88_core *core = dev->core;
441
442 /* setup fifo + format */
e52e98a7 443 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 444 buf->bpl, buf->risc.dma);
e52e98a7 445 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 446 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
447
448 /* reset counter */
449 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
450 q->count = 1;
451
452 /* enable irqs */
8ddac9ee 453 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
e52e98a7
MCC		 454
455 /* Enables corresponding bits at PCI_INT_STAT:
456 bits 0 to 4: video, audio, transport stream, VIP, Host
457 bit 7: timer
458 bits 8 and 9: DMA complete for: SRC, DST
459 bits 10 and 11: BERR signal asserted for RISC: RD, WR
460 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
461 */
1da177e4
LT		 462 cx_set(MO_VID_INTMSK, 0x0f0011);
463
464 /* enable capture */
465 cx_set(VID_CAPTURE_CONTROL,0x06);
466
467 /* start dma */
468 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 469 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 470
471 return 0;
472}
473
17bc98a4 474#ifdef CONFIG_PM
1da177e4
LT		 475static int stop_video_dma(struct cx8800_dev *dev)
476{
477 struct cx88_core *core = dev->core;
478
479 /* stop dma */
480 cx_clear(MO_VID_DMACNTRL, 0x11);
481
482 /* disable capture */
483 cx_clear(VID_CAPTURE_CONTROL,0x06);
484
485 /* disable irqs */
8ddac9ee 486 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
1da177e4
LT		 487 cx_clear(MO_VID_INTMSK, 0x0f0011);
488 return 0;
489}
17bc98a4 490#endif
1da177e4
LT		 491
492static int restart_video_queue(struct cx8800_dev *dev,
493 struct cx88_dmaqueue *q)
494{
e52e98a7 495 struct cx88_core *core = dev->core;
1da177e4 496 struct cx88_buffer *buf, *prev;
1da177e4
LT		 497
498 if (!list_empty(&q->active)) {
4ac97914 499 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 500 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
501 buf, buf->vb.i);
502 start_video_dma(dev, q, buf);
8bb629e2
TP		 503 list_for_each_entry(buf, &q->active, vb.queue)
504 buf->count = q->count++;
1da177e4
LT		 505 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
506 return 0;
507 }
508
509 prev = NULL;
510 for (;;) {
511 if (list_empty(&q->queued))
512 return 0;
4ac97914 513 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4 514 if (NULL == prev) {
179e0917 515 list_move_tail(&buf->vb.queue, &q->active);
1da177e4 516 start_video_dma(dev, q, buf);
0fc0686e 517 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 518 buf->count = q->count++;
519 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
520 dprintk(2,"[%p/%d] restart_queue - first active\n",
521 buf,buf->vb.i);
522
523 } else if (prev->vb.width == buf->vb.width &&
524 prev->vb.height == buf->vb.height &&
525 prev->fmt == buf->fmt) {
179e0917 526 list_move_tail(&buf->vb.queue, &q->active);
0fc0686e 527 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 528 buf->count = q->count++;
529 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
530 dprintk(2,"[%p/%d] restart_queue - move to active\n",
531 buf,buf->vb.i);
532 } else {
533 return 0;
534 }
535 prev = buf;
536 }
537}
538
539/* ------------------------------------------------------------------ */
540
541static int
542buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
543{
544 struct cx8800_fh *fh = q->priv_data;
545
546 *size = fh->fmt->depth*fh->width*fh->height >> 3;
547 if (0 == *count)
548 *count = 32;
549 while (*size * *count > vid_limit * 1024 * 1024)
550 (*count)--;
551 return 0;
552}
553
554static int
555buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
556 enum v4l2_field field)
557{
558 struct cx8800_fh *fh = q->priv_data;
559 struct cx8800_dev *dev = fh->dev;
e52e98a7 560 struct cx88_core *core = dev->core;
1da177e4 561 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
c1accaa2 562 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
1da177e4
LT		 563 int rc, init_buffer = 0;
564
565 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 566 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
567 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 568 return -EINVAL;
569 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
570 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
571 return -EINVAL;
572
573 if (buf->fmt != fh->fmt ||
574 buf->vb.width != fh->width ||
575 buf->vb.height != fh->height ||
576 buf->vb.field != field) {
577 buf->fmt = fh->fmt;
578 buf->vb.width = fh->width;
579 buf->vb.height = fh->height;
580 buf->vb.field = field;
581 init_buffer = 1;
582 }
583
0fc0686e 584 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
1da177e4 585 init_buffer = 1;
c7b0ac05 586 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
1da177e4
LT		 587 goto fail;
588 }
589
590 if (init_buffer) {
591 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
592 switch (buf->vb.field) {
593 case V4L2_FIELD_TOP:
594 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 595 dma->sglist, 0, UNSET,
1da177e4
LT		 596 buf->bpl, 0, buf->vb.height);
597 break;
598 case V4L2_FIELD_BOTTOM:
599 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 600 dma->sglist, UNSET, 0,
1da177e4
LT		 601 buf->bpl, 0, buf->vb.height);
602 break;
603 case V4L2_FIELD_INTERLACED:
604 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 605 dma->sglist, 0, buf->bpl,
1da177e4
LT		 606 buf->bpl, buf->bpl,
607 buf->vb.height >> 1);
608 break;
609 case V4L2_FIELD_SEQ_TB:
610 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 611 dma->sglist,
1da177e4
LT		 612 0, buf->bpl * (buf->vb.height >> 1),
613 buf->bpl, 0,
614 buf->vb.height >> 1);
615 break;
616 case V4L2_FIELD_SEQ_BT:
617 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 618 dma->sglist,
1da177e4
LT		 619 buf->bpl * (buf->vb.height >> 1), 0,
620 buf->bpl, 0,
621 buf->vb.height >> 1);
622 break;
623 default:
624 BUG();
625 }
626 }
627 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
628 buf, buf->vb.i,
629 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
630 (unsigned long)buf->risc.dma);
631
0fc0686e 632 buf->vb.state = VIDEOBUF_PREPARED;
1da177e4
LT		 633 return 0;
634
635 fail:
c7b0ac05 636 cx88_free_buffer(q,buf);
1da177e4
LT		 637 return rc;
638}
639
640static void
641buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
642{
643 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
644 struct cx88_buffer *prev;
645 struct cx8800_fh *fh = vq->priv_data;
646 struct cx8800_dev *dev = fh->dev;
e52e98a7 647 struct cx88_core *core = dev->core;
1da177e4
LT		 648 struct cx88_dmaqueue *q = &dev->vidq;
649
650 /* add jump to stopper */
651 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
652 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
653
654 if (!list_empty(&q->queued)) {
655 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 656 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 657 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
658 buf, buf->vb.i);
659
660 } else if (list_empty(&q->active)) {
661 list_add_tail(&buf->vb.queue,&q->active);
662 start_video_dma(dev, q, buf);
0fc0686e 663 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 664 buf->count = q->count++;
665 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
666 dprintk(2,"[%p/%d] buffer_queue - first active\n",
667 buf, buf->vb.i);
668
669 } else {
670 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
671 if (prev->vb.width == buf->vb.width &&
672 prev->vb.height == buf->vb.height &&
673 prev->fmt == buf->fmt) {
674 list_add_tail(&buf->vb.queue,&q->active);
0fc0686e 675 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 676 buf->count = q->count++;
677 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
678 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
679 buf, buf->vb.i);
680
681 } else {
682 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 683 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 684 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
685 buf, buf->vb.i);
686 }
687 }
688}
689
690static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
691{
692 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
1da177e4 693
c7b0ac05 694 cx88_free_buffer(q,buf);
1da177e4
LT		 695}
696
408b664a 697static struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 698 .buf_setup = buffer_setup,
699 .buf_prepare = buffer_prepare,
700 .buf_queue = buffer_queue,
701 .buf_release = buffer_release,
702};
703
704/* ------------------------------------------------------------------ */
705
1da177e4
LT		 706
707/* ------------------------------------------------------------------ */
708
709static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
710{
711 switch (fh->type) {
712 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
713 return &fh->vidq;
714 case V4L2_BUF_TYPE_VBI_CAPTURE:
715 return &fh->vbiq;
716 default:
717 BUG();
718 return NULL;
719 }
720}
721
722static int get_ressource(struct cx8800_fh *fh)
723{
724 switch (fh->type) {
725 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
726 return RESOURCE_VIDEO;
727 case V4L2_BUF_TYPE_VBI_CAPTURE:
728 return RESOURCE_VBI;
729 default:
730 BUG();
731 return 0;
732 }
733}
734
735static int video_open(struct inode *inode, struct file *file)
736{
737 int minor = iminor(inode);
738 struct cx8800_dev *h,*dev = NULL;
e52e98a7 739 struct cx88_core *core;
1da177e4 740 struct cx8800_fh *fh;
1da177e4
LT		 741 enum v4l2_buf_type type = 0;
742 int radio = 0;
743
8bb629e2 744 list_for_each_entry(h, &cx8800_devlist, devlist) {
1da177e4
LT		 745 if (h->video_dev->minor == minor) {
746 dev = h;
747 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
748 }
749 if (h->vbi_dev->minor == minor) {
750 dev = h;
751 type = V4L2_BUF_TYPE_VBI_CAPTURE;
752 }
753 if (h->radio_dev &&
754 h->radio_dev->minor == minor) {
755 radio = 1;
756 dev = h;
757 }
758 }
759 if (NULL == dev)
760 return -ENODEV;
761
e52e98a7
MCC		 762 core = dev->core;
763
1da177e4
LT		 764 dprintk(1,"open minor=%d radio=%d type=%s\n",
765 minor,radio,v4l2_type_names[type]);
766
767 /* allocate + initialize per filehandle data */
7408187d 768 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
1da177e4
LT		 769 if (NULL == fh)
770 return -ENOMEM;
1da177e4
LT		 771 file->private_data = fh;
772 fh->dev = dev;
773 fh->radio = radio;
774 fh->type = type;
775 fh->width = 320;
776 fh->height = 240;
777 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
778
c1accaa2 779 videobuf_queue_pci_init(&fh->vidq, &cx8800_video_qops,
1da177e4
LT		 780 dev->pci, &dev->slock,
781 V4L2_BUF_TYPE_VIDEO_CAPTURE,
782 V4L2_FIELD_INTERLACED,
783 sizeof(struct cx88_buffer),
784 fh);
c1accaa2 785 videobuf_queue_pci_init(&fh->vbiq, &cx8800_vbi_qops,
1da177e4
LT		 786 dev->pci, &dev->slock,
787 V4L2_BUF_TYPE_VBI_CAPTURE,
788 V4L2_FIELD_SEQ_TB,
789 sizeof(struct cx88_buffer),
790 fh);
791
792 if (fh->radio) {
1da177e4 793 dprintk(1,"video_open: setting radio device\n");
6a59d64c
TP		 794 cx_write(MO_GP3_IO, core->board.radio.gpio3);
795 cx_write(MO_GP0_IO, core->board.radio.gpio0);
796 cx_write(MO_GP1_IO, core->board.radio.gpio1);
797 cx_write(MO_GP2_IO, core->board.radio.gpio2);
e52e98a7 798 core->tvaudio = WW_FM;
1da177e4
LT		 799 cx88_set_tvaudio(core);
800 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
e52e98a7 801 cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL);
1da177e4
LT		 802 }
803
4ac97914 804 return 0;
1da177e4
LT		 805}
806
807static ssize_t
f9e7a020 808video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 809{
810 struct cx8800_fh *fh = file->private_data;
811
812 switch (fh->type) {
813 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
814 if (res_locked(fh->dev,RESOURCE_VIDEO))
815 return -EBUSY;
816 return videobuf_read_one(&fh->vidq, data, count, ppos,
817 file->f_flags & O_NONBLOCK);
818 case V4L2_BUF_TYPE_VBI_CAPTURE:
819 if (!res_get(fh->dev,fh,RESOURCE_VBI))
820 return -EBUSY;
821 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
822 file->f_flags & O_NONBLOCK);
823 default:
824 BUG();
825 return 0;
826 }
827}
828
829static unsigned int
830video_poll(struct file *file, struct poll_table_struct *wait)
831{
832 struct cx8800_fh *fh = file->private_data;
833 struct cx88_buffer *buf;
834
835 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
836 if (!res_get(fh->dev,fh,RESOURCE_VBI))
837 return POLLERR;
838 return videobuf_poll_stream(file, &fh->vbiq, wait);
839 }
840
841 if (res_check(fh,RESOURCE_VIDEO)) {
842 /* streaming capture */
843 if (list_empty(&fh->vidq.stream))
844 return POLLERR;
845 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
846 } else {
847 /* read() capture */
848 buf = (struct cx88_buffer*)fh->vidq.read_buf;
849 if (NULL == buf)
850 return POLLERR;
851 }
852 poll_wait(file, &buf->vb.done, wait);
0fc0686e
BP		 853 if (buf->vb.state == VIDEOBUF_DONE ||
854 buf->vb.state == VIDEOBUF_ERROR)
1da177e4
LT		 855 return POLLIN|POLLRDNORM;
856 return 0;
857}
858
859static int video_release(struct inode *inode, struct file *file)
860{
861 struct cx8800_fh *fh = file->private_data;
862 struct cx8800_dev *dev = fh->dev;
863
864 /* turn off overlay */
865 if (res_check(fh, RESOURCE_OVERLAY)) {
866 /* FIXME */
867 res_free(dev,fh,RESOURCE_OVERLAY);
868 }
869
870 /* stop video capture */
871 if (res_check(fh, RESOURCE_VIDEO)) {
872 videobuf_queue_cancel(&fh->vidq);
873 res_free(dev,fh,RESOURCE_VIDEO);
874 }
875 if (fh->vidq.read_buf) {
876 buffer_release(&fh->vidq,fh->vidq.read_buf);
877 kfree(fh->vidq.read_buf);
878 }
879
880 /* stop vbi capture */
881 if (res_check(fh, RESOURCE_VBI)) {
053fcb60 882 videobuf_stop(&fh->vbiq);
1da177e4
LT		 883 res_free(dev,fh,RESOURCE_VBI);
884 }
885
886 videobuf_mmap_free(&fh->vidq);
887 videobuf_mmap_free(&fh->vbiq);
888 file->private_data = NULL;
889 kfree(fh);
e52e98a7
MCC		 890
891 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
892
1da177e4
LT		 893 return 0;
894}
895
896static int
897video_mmap(struct file *file, struct vm_area_struct * vma)
898{
899 struct cx8800_fh *fh = file->private_data;
900
901 return videobuf_mmap_mapper(get_queue(fh), vma);
902}
903
904/* ------------------------------------------------------------------ */
8d87cb9f 905/* VIDEO CTRL IOCTLS */
1da177e4 906
54da49f5 907int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 908{
8d87cb9f 909 struct cx88_ctrl *c = NULL;
1da177e4
LT		 910 u32 value;
911 int i;
912
913 for (i = 0; i < CX8800_CTLS; i++)
914 if (cx8800_ctls[i].v.id == ctl->id)
915 c = &cx8800_ctls[i];
8d87cb9f 916 if (unlikely(NULL == c))
1da177e4
LT		 917 return -EINVAL;
918
919 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
920 switch (ctl->id) {
921 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 922 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
923 : (0x7f - (value & 0x7f));
1da177e4
LT		 924 break;
925 case V4L2_CID_AUDIO_VOLUME:
926 ctl->value = 0x3f - (value & 0x3f);
927 break;
928 default:
929 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
930 break;
931 }
6457af5f
IP		 932 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
933 ctl->id, c->v.name, ctl->value, c->reg,
934 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 935 return 0;
936}
54da49f5 937EXPORT_SYMBOL(cx88_get_control);
1da177e4 938
54da49f5 939int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 940{
1da177e4 941 struct cx88_ctrl *c = NULL;
70f00044 942 u32 value,mask;
1da177e4 943 int i;
8d87cb9f 944
70f00044
MCC		 945 for (i = 0; i < CX8800_CTLS; i++) {
946 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 947 c = &cx8800_ctls[i];
70f00044
MCC		 948 }
949 }
8d87cb9f 950 if (unlikely(NULL == c))
1da177e4
LT		 951 return -EINVAL;
952
953 if (ctl->value < c->v.minimum)
e52e98a7 954 ctl->value = c->v.minimum;
1da177e4 955 if (ctl->value > c->v.maximum)
e52e98a7 956 ctl->value = c->v.maximum;
70f00044 957 mask=c->mask;
1da177e4
LT		 958 switch (ctl->id) {
959 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 960 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 961 break;
962 case V4L2_CID_AUDIO_VOLUME:
963 value = 0x3f - (ctl->value & 0x3f);
964 break;
965 case V4L2_CID_SATURATION:
966 /* special v_sat handling */
70f00044
MCC		 967
968 value = ((ctl->value - c->off) << c->shift) & c->mask;
969
63ab1bdc 970 if (core->tvnorm & V4L2_STD_SECAM) {
70f00044
MCC		 971 /* For SECAM, both U and V sat should be equal */
972 value=value<<8|value;
973 } else {
974 /* Keeps U Saturation proportional to V Sat */
975 value=(value*0x5a)/0x7f<<8|value;
976 }
977 mask=0xffff;
978 break;
1da177e4
LT		 979 default:
980 value = ((ctl->value - c->off) << c->shift) & c->mask;
981 break;
982 }
6457af5f
IP		 983 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
984 ctl->id, c->v.name, ctl->value, c->reg, value,
985 mask, c->sreg ? " [shadowed]" : "");
1da177e4 986 if (c->sreg) {
70f00044 987 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 988 } else {
70f00044 989 cx_andor(c->reg, mask, value);
1da177e4
LT		 990 }
991 return 0;
992}
54da49f5 993EXPORT_SYMBOL(cx88_set_control);
1da177e4 994
e52e98a7 995static void init_controls(struct cx88_core *core)
1da177e4 996{
70f00044
MCC		 997 struct v4l2_control ctrl;
998 int i;
1da177e4 999
70f00044
MCC		 1000 for (i = 0; i < CX8800_CTLS; i++) {
1001 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 1002 ctrl.value=cx8800_ctls[i].v.default_value;
8d87cb9f 1003
54da49f5 1004 cx88_set_control(core, &ctrl);
70f00044 1005 }
1da177e4
LT		 1006}
1007
1008/* ------------------------------------------------------------------ */
8d87cb9f 1009/* VIDEO IOCTLS */
1da177e4 1010
8d87cb9f
MCC		 1011static int vidioc_g_fmt_cap (struct file *file, void *priv,
1012 struct v4l2_format *f)
1da177e4 1013{
8d87cb9f
MCC		 1014 struct cx8800_fh *fh = priv;
1015
1016 f->fmt.pix.width = fh->width;
1017 f->fmt.pix.height = fh->height;
1018 f->fmt.pix.field = fh->vidq.field;
1019 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1020 f->fmt.pix.bytesperline =
1021 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1022 f->fmt.pix.sizeimage =
1023 f->fmt.pix.height * f->fmt.pix.bytesperline;
1024 return 0;
1da177e4
LT		 1025}
1026
8d87cb9f
MCC		 1027static int vidioc_try_fmt_cap (struct file *file, void *priv,
1028 struct v4l2_format *f)
1da177e4 1029{
8d87cb9f
MCC		 1030 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1031 struct cx8800_fmt *fmt;
1032 enum v4l2_field field;
1033 unsigned int maxw, maxh;
e52e98a7 1034
8d87cb9f
MCC		 1035 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1036 if (NULL == fmt)
1037 return -EINVAL;
1da177e4 1038
8d87cb9f
MCC		 1039 field = f->fmt.pix.field;
1040 maxw = norm_maxw(core->tvnorm);
1041 maxh = norm_maxh(core->tvnorm);
1da177e4 1042
8d87cb9f
MCC		 1043 if (V4L2_FIELD_ANY == field) {
1044 field = (f->fmt.pix.height > maxh/2)
1045 ? V4L2_FIELD_INTERLACED
1046 : V4L2_FIELD_BOTTOM;
1da177e4 1047 }
8d87cb9f
MCC		 1048
1049 switch (field) {
1050 case V4L2_FIELD_TOP:
1051 case V4L2_FIELD_BOTTOM:
1052 maxh = maxh / 2;
1053 break;
1054 case V4L2_FIELD_INTERLACED:
1055 break;
1da177e4
LT		 1056 default:
1057 return -EINVAL;
1058 }
8d87cb9f
MCC		 1059
1060 f->fmt.pix.field = field;
1061 if (f->fmt.pix.height < 32)
1062 f->fmt.pix.height = 32;
1063 if (f->fmt.pix.height > maxh)
1064 f->fmt.pix.height = maxh;
1065 if (f->fmt.pix.width < 48)
1066 f->fmt.pix.width = 48;
1067 if (f->fmt.pix.width > maxw)
1068 f->fmt.pix.width = maxw;
1069 f->fmt.pix.width &= ~0x03;
1070 f->fmt.pix.bytesperline =
1071 (f->fmt.pix.width * fmt->depth) >> 3;
1072 f->fmt.pix.sizeimage =
1073 f->fmt.pix.height * f->fmt.pix.bytesperline;
1074
1075 return 0;
1da177e4
LT		 1076}
1077
8d87cb9f
MCC		 1078static int vidioc_s_fmt_cap (struct file *file, void *priv,
1079 struct v4l2_format *f)
1da177e4 1080{
8d87cb9f
MCC		 1081 struct cx8800_fh *fh = priv;
1082 int err = vidioc_try_fmt_cap (file,priv,f);
1083
1084 if (0 != err)
1085 return err;
1086 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1087 fh->width = f->fmt.pix.width;
1088 fh->height = f->fmt.pix.height;
1089 fh->vidq.field = f->fmt.pix.field;
1090 return 0;
1da177e4
LT		 1091}
1092
8d87cb9f
MCC		 1093static int vidioc_querycap (struct file *file, void *priv,
1094 struct v4l2_capability *cap)
1da177e4 1095{
8d87cb9f 1096 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4 1097 struct cx88_core *core = dev->core;
1da177e4 1098
8d87cb9f 1099 strcpy(cap->driver, "cx8800");
6a59d64c 1100 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1101 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1102 cap->version = CX88_VERSION_CODE;
1103 cap->capabilities =
1104 V4L2_CAP_VIDEO_CAPTURE |
1105 V4L2_CAP_READWRITE |
1106 V4L2_CAP_STREAMING |
1107 V4L2_CAP_VBI_CAPTURE;
6a59d64c 1108 if (UNSET != core->board.tuner_type)
8d87cb9f
MCC		 1109 cap->capabilities |= V4L2_CAP_TUNER;
1110 return 0;
1111}
e52e98a7 1112
8d87cb9f
MCC		 1113static int vidioc_enum_fmt_cap (struct file *file, void *priv,
1114 struct v4l2_fmtdesc *f)
1115{
1116 if (unlikely(f->index >= ARRAY_SIZE(formats)))
1117 return -EINVAL;
1118
1119 strlcpy(f->description,formats[f->index].name,sizeof(f->description));
1120 f->pixelformat = formats[f->index].fourcc;
1121
1122 return 0;
1123}
1da177e4 1124
0dfa9abd 1125#ifdef CONFIG_VIDEO_V4L1_COMPAT
8d87cb9f
MCC		 1126static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf)
1127{
c1accaa2 1128 struct cx8800_fh *fh = priv;
8d87cb9f 1129
c1accaa2 1130 return videobuf_cgmbuf (get_queue(fh), mbuf, 8);
8d87cb9f 1131}
79436633 1132#endif
e52e98a7 1133
8d87cb9f
MCC		 1134static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
1135{
1136 struct cx8800_fh *fh = priv;
1137 return (videobuf_reqbufs(get_queue(fh), p));
1138}
e52e98a7 1139
8d87cb9f
MCC		 1140static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
1141{
1142 struct cx8800_fh *fh = priv;
1143 return (videobuf_querybuf(get_queue(fh), p));
1144}
e52e98a7 1145
8d87cb9f
MCC		 1146static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1147{
1148 struct cx8800_fh *fh = priv;
1149 return (videobuf_qbuf(get_queue(fh), p));
1150}
e52e98a7 1151
8d87cb9f
MCC		 1152static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1153{
1154 struct cx8800_fh *fh = priv;
1155 return (videobuf_dqbuf(get_queue(fh), p,
1156 file->f_flags & O_NONBLOCK));
1157}
e52e98a7 1158
8d87cb9f
MCC		 1159static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
1160{
1161 struct cx8800_fh *fh = priv;
1162 struct cx8800_dev *dev = fh->dev;
1163
1164 if (unlikely(fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE))
1165 return -EINVAL;
1166 if (unlikely(i != fh->type))
1167 return -EINVAL;
1168
1169 if (unlikely(!res_get(dev,fh,get_ressource(fh))))
1170 return -EBUSY;
1171 return videobuf_streamon(get_queue(fh));
1172}
1173
1174static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1175{
1176 struct cx8800_fh *fh = priv;
1177 struct cx8800_dev *dev = fh->dev;
1178 int err, res;
1179
1180 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1181 return -EINVAL;
1182 if (i != fh->type)
1183 return -EINVAL;
1184
1185 res = get_ressource(fh);
1186 err = videobuf_streamoff(get_queue(fh));
1187 if (err < 0)
1188 return err;
1189 res_free(dev,fh,res);
e52e98a7
MCC		 1190 return 0;
1191}
1192
63ab1bdc 1193static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
e52e98a7 1194{
8d87cb9f 1195 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
e52e98a7 1196
8d87cb9f 1197 mutex_lock(&core->lock);
63ab1bdc 1198 cx88_set_tvnorm(core,*tvnorms);
8d87cb9f 1199 mutex_unlock(&core->lock);
63ab1bdc 1200
8d87cb9f
MCC		 1201 return 0;
1202}
1da177e4 1203
8d87cb9f 1204/* only one input in this sample driver */
54da49f5 1205int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
8d87cb9f 1206{
8d87cb9f
MCC		 1207 static const char *iname[] = {
1208 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1209 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1210 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1211 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1212 [ CX88_VMUX_SVIDEO ] = "S-Video",
1213 [ CX88_VMUX_TELEVISION ] = "Television",
1214 [ CX88_VMUX_CABLE ] = "Cable TV",
1215 [ CX88_VMUX_DVB ] = "DVB",
1216 [ CX88_VMUX_DEBUG ] = "for debug only",
1217 };
1218 unsigned int n;
1da177e4 1219
8d87cb9f
MCC		 1220 n = i->index;
1221 if (n >= 4)
1222 return -EINVAL;
6a59d64c 1223 if (0 == INPUT(n).type)
8d87cb9f
MCC		 1224 return -EINVAL;
1225 memset(i,0,sizeof(*i));
1226 i->index = n;
1227 i->type = V4L2_INPUT_TYPE_CAMERA;
6a59d64c
TP		 1228 strcpy(i->name,iname[INPUT(n).type]);
1229 if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
1230 (CX88_VMUX_CABLE == INPUT(n).type))
8d87cb9f 1231 i->type = V4L2_INPUT_TYPE_TUNER;
63ab1bdc 1232 i->std = CX88_NORMS;
8d87cb9f
MCC		 1233 return 0;
1234}
54da49f5
MCC		 1235EXPORT_SYMBOL(cx88_enum_input);
1236
1237static int vidioc_enum_input (struct file *file, void *priv,
1238 struct v4l2_input *i)
1239{
1240 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1241 return cx88_enum_input (core,i);
1242}
1da177e4 1243
8d87cb9f
MCC		 1244static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
1245{
1246 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1247
8d87cb9f
MCC		 1248 *i = core->input;
1249 return 0;
1250}
1da177e4 1251
8d87cb9f
MCC		 1252static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
1253{
1254 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1255
8d87cb9f
MCC		 1256 if (i >= 4)
1257 return -EINVAL;
1da177e4 1258
8d87cb9f
MCC		 1259 mutex_lock(&core->lock);
1260 cx88_newstation(core);
e90311a1 1261 cx88_video_mux(core,i);
8d87cb9f
MCC		 1262 mutex_unlock(&core->lock);
1263 return 0;
1264}
1da177e4 1265
1da177e4 1266
1da177e4 1267
8d87cb9f
MCC		 1268static int vidioc_queryctrl (struct file *file, void *priv,
1269 struct v4l2_queryctrl *qctrl)
1270{
1271 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
1272 if (unlikely(qctrl->id == 0))
1273 return -EINVAL;
1274 return cx8800_ctrl_query(qctrl);
1275}
1da177e4 1276
54da49f5 1277static int vidioc_g_ctrl (struct file *file, void *priv,
8d87cb9f
MCC		 1278 struct v4l2_control *ctl)
1279{
1280 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
54da49f5
MCC		 1281 return
1282 cx88_get_control(core,ctl);
1283}
1da177e4 1284
54da49f5
MCC		 1285static int vidioc_s_ctrl (struct file *file, void *priv,
1286 struct v4l2_control *ctl)
1287{
1288 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
8d87cb9f 1289 return
54da49f5 1290 cx88_set_control(core,ctl);
8d87cb9f
MCC		 1291}
1292
1293static int vidioc_g_tuner (struct file *file, void *priv,
1294 struct v4l2_tuner *t)
1295{
1296 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1297 u32 reg;
1da177e4 1298
6a59d64c 1299 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f 1300 return -EINVAL;
243d8c0f
MCC		 1301 if (0 != t->index)
1302 return -EINVAL;
a82decf6 1303
8d87cb9f
MCC		 1304 strcpy(t->name, "Television");
1305 t->type = V4L2_TUNER_ANALOG_TV;
1306 t->capability = V4L2_TUNER_CAP_NORM;
1307 t->rangehigh = 0xffffffffUL;
a82decf6 1308
8d87cb9f
MCC		 1309 cx88_get_stereo(core ,t);
1310 reg = cx_read(MO_DEVICE_STATUS);
1311 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1312 return 0;
1313}
41ef7c1e 1314
8d87cb9f
MCC		 1315static int vidioc_s_tuner (struct file *file, void *priv,
1316 struct v4l2_tuner *t)
1317{
1318 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
41ef7c1e 1319
6a59d64c 1320 if (UNSET == core->board.tuner_type)
8d87cb9f
MCC		 1321 return -EINVAL;
1322 if (0 != t->index)
1323 return -EINVAL;
c5287ba1 1324
8d87cb9f
MCC		 1325 cx88_set_stereo(core, t->audmode, 1);
1326 return 0;
1327}
902fc997 1328
8d87cb9f
MCC		 1329static int vidioc_g_frequency (struct file *file, void *priv,
1330 struct v4l2_frequency *f)
1331{
1332 struct cx8800_fh *fh = priv;
1333 struct cx88_core *core = fh->dev->core;
902fc997 1334
6a59d64c 1335 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1336 return -EINVAL;
1337
1338 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1339 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1340 f->frequency = core->freq;
1341
1342 cx88_call_i2c_clients(core,VIDIOC_G_FREQUENCY,f);
1da177e4 1343
1da177e4
LT		 1344 return 0;
1345}
1346
54da49f5 1347int cx88_set_freq (struct cx88_core *core,
8d87cb9f 1348 struct v4l2_frequency *f)
1da177e4 1349{
6a59d64c 1350 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1351 return -EINVAL;
1352 if (unlikely(f->tuner != 0))
1353 return -EINVAL;
54da49f5 1354
8d87cb9f
MCC		 1355 mutex_lock(&core->lock);
1356 core->freq = f->frequency;
1357 cx88_newstation(core);
1358 cx88_call_i2c_clients(core,VIDIOC_S_FREQUENCY,f);
c7b0ac05 1359
8d87cb9f
MCC		 1360 /* When changing channels it is required to reset TVAUDIO */
1361 msleep (10);
1362 cx88_set_tvaudio(core);
c7b0ac05 1363
8d87cb9f 1364 mutex_unlock(&core->lock);
54da49f5 1365
8d87cb9f 1366 return 0;
1da177e4 1367}
54da49f5
MCC		 1368EXPORT_SYMBOL(cx88_set_freq);
1369
1370static int vidioc_s_frequency (struct file *file, void *priv,
1371 struct v4l2_frequency *f)
1372{
1373 struct cx8800_fh *fh = priv;
1374 struct cx88_core *core = fh->dev->core;
1375
1376 if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
1377 return -EINVAL;
1378 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
1379 return -EINVAL;
1380
1381 return
1382 cx88_set_freq (core,f);
1383}
1da177e4 1384
dbbff48f
TP		 1385#ifdef CONFIG_VIDEO_ADV_DEBUG
1386static int vidioc_g_register (struct file *file, void *fh,
1387 struct v4l2_register *reg)
1388{
1389 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1390
f3d092b8 1391 if (!v4l2_chip_match_host(reg->match_type, reg->match_chip))
dbbff48f
TP		 1392 return -EINVAL;
1393 /* cx2388x has a 24-bit register space */
1394 reg->val = cx_read(reg->reg&0xffffff);
1395 return 0;
1396}
1397
1398static int vidioc_s_register (struct file *file, void *fh,
1399 struct v4l2_register *reg)
1400{
1401 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1402
f3d092b8 1403 if (!v4l2_chip_match_host(reg->match_type, reg->match_chip))
dbbff48f 1404 return -EINVAL;
dbbff48f
TP		 1405 cx_write(reg->reg&0xffffff, reg->val);
1406 return 0;
1407}
1408#endif
8d87cb9f
MCC		 1409
1410/* ----------------------------------------------------------- */
1411/* RADIO ESPECIFIC IOCTLS */
1da177e4
LT		 1412/* ----------------------------------------------------------- */
1413
8d87cb9f
MCC		 1414static int radio_querycap (struct file *file, void *priv,
1415 struct v4l2_capability *cap)
1da177e4 1416{
8d87cb9f 1417 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4
LT		 1418 struct cx88_core *core = dev->core;
1419
8d87cb9f 1420 strcpy(cap->driver, "cx8800");
6a59d64c 1421 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1422 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1423 cap->version = CX88_VERSION_CODE;
1424 cap->capabilities = V4L2_CAP_TUNER;
1425 return 0;
1426}
1da177e4 1427
8d87cb9f
MCC		 1428static int radio_g_tuner (struct file *file, void *priv,
1429 struct v4l2_tuner *t)
1430{
1431 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1432
8d87cb9f
MCC		 1433 if (unlikely(t->index > 0))
1434 return -EINVAL;
1da177e4 1435
8d87cb9f
MCC		 1436 strcpy(t->name, "Radio");
1437 t->type = V4L2_TUNER_RADIO;
1da177e4 1438
8d87cb9f
MCC		 1439 cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t);
1440 return 0;
1441}
1da177e4 1442
8d87cb9f
MCC		 1443static int radio_enum_input (struct file *file, void *priv,
1444 struct v4l2_input *i)
1445{
1446 if (i->index != 0)
1447 return -EINVAL;
1448 strcpy(i->name,"Radio");
1449 i->type = V4L2_INPUT_TYPE_TUNER;
a82decf6 1450
8d87cb9f
MCC		 1451 return 0;
1452}
a82decf6 1453
8d87cb9f
MCC		 1454static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
1455{
1456 if (unlikely(a->index))
1457 return -EINVAL;
a82decf6 1458
8d87cb9f
MCC		 1459 memset(a,0,sizeof(*a));
1460 strcpy(a->name,"Radio");
1461 return 0;
1462}
a82decf6 1463
8d87cb9f 1464/* FIXME: Should add a standard for radio */
a82decf6 1465
8d87cb9f
MCC		 1466static int radio_s_tuner (struct file *file, void *priv,
1467 struct v4l2_tuner *t)
1468{
1469 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
a82decf6 1470
8d87cb9f
MCC		 1471 if (0 != t->index)
1472 return -EINVAL;
1da177e4 1473
8d87cb9f 1474 cx88_call_i2c_clients(core,VIDIOC_S_TUNER,t);
1da177e4 1475
8d87cb9f
MCC		 1476 return 0;
1477}
1da177e4 1478
8d87cb9f
MCC		 1479static int radio_s_audio (struct file *file, void *fh,
1480 struct v4l2_audio *a)
1481{
1482 return 0;
1483}
1da177e4 1484
8d87cb9f
MCC		 1485static int radio_s_input (struct file *file, void *fh, unsigned int i)
1486{
1da177e4 1487 return 0;
8d87cb9f 1488}
1da177e4 1489
8d87cb9f
MCC		 1490static int radio_queryctrl (struct file *file, void *priv,
1491 struct v4l2_queryctrl *c)
1da177e4 1492{
8d87cb9f
MCC		 1493 int i;
1494
1495 if (c->id < V4L2_CID_BASE ||
1496 c->id >= V4L2_CID_LASTP1)
1497 return -EINVAL;
1498 if (c->id == V4L2_CID_AUDIO_MUTE) {
1499 for (i = 0; i < CX8800_CTLS; i++)
1500 if (cx8800_ctls[i].v.id == c->id)
1501 break;
1502 *c = cx8800_ctls[i].v;
1503 } else
1504 *c = no_ctl;
1505 return 0;
1506}
1da177e4
LT		 1507
1508/* ----------------------------------------------------------- */
1509
1510static void cx8800_vid_timeout(unsigned long data)
1511{
1512 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1513 struct cx88_core *core = dev->core;
1514 struct cx88_dmaqueue *q = &dev->vidq;
1515 struct cx88_buffer *buf;
1516 unsigned long flags;
1517
e52e98a7 1518 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1519
1520 cx_clear(MO_VID_DMACNTRL, 0x11);
1521 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1522
1523 spin_lock_irqsave(&dev->slock,flags);
1524 while (!list_empty(&q->active)) {
1525 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1526 list_del(&buf->vb.queue);
0fc0686e 1527 buf->vb.state = VIDEOBUF_ERROR;
1da177e4
LT		 1528 wake_up(&buf->vb.done);
1529 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1530 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1531 }
1532 restart_video_queue(dev,q);
1533 spin_unlock_irqrestore(&dev->slock,flags);
1534}
1535
41ef7c1e
MCC		 1536static char *cx88_vid_irqs[32] = {
1537 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1538 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1539 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1540 "y_sync", "u_sync", "v_sync", "vbi_sync",
1541 "opc_err", "par_err", "rip_err", "pci_abort",
1542};
1543
1da177e4
LT		 1544static void cx8800_vid_irq(struct cx8800_dev *dev)
1545{
1546 struct cx88_core *core = dev->core;
1547 u32 status, mask, count;
1548
1549 status = cx_read(MO_VID_INTSTAT);
1550 mask = cx_read(MO_VID_INTMSK);
1551 if (0 == (status & mask))
1552 return;
1553 cx_write(MO_VID_INTSTAT, status);
1554 if (irq_debug || (status & mask & ~0xff))
1555 cx88_print_irqbits(core->name, "irq vid",
66623a04
MCC		 1556 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1557 status, mask);
1da177e4
LT		 1558
1559 /* risc op code error */
1560 if (status & (1 << 16)) {
1561 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1562 cx_clear(MO_VID_DMACNTRL, 0x11);
1563 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1564 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1565 }
1566
1567 /* risc1 y */
1568 if (status & 0x01) {
1569 spin_lock(&dev->slock);
1570 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1571 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1572 spin_unlock(&dev->slock);
1573 }
1574
1575 /* risc1 vbi */
1576 if (status & 0x08) {
1577 spin_lock(&dev->slock);
1578 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1579 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1580 spin_unlock(&dev->slock);
1581 }
1582
1583 /* risc2 y */
1584 if (status & 0x10) {
1585 dprintk(2,"stopper video\n");
1586 spin_lock(&dev->slock);
1587 restart_video_queue(dev,&dev->vidq);
1588 spin_unlock(&dev->slock);
1589 }
1590
1591 /* risc2 vbi */
1592 if (status & 0x80) {
1593 dprintk(2,"stopper vbi\n");
1594 spin_lock(&dev->slock);
1595 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1596 spin_unlock(&dev->slock);
1597 }
1598}
1599
7d12e780 1600static irqreturn_t cx8800_irq(int irq, void *dev_id)
1da177e4
LT		 1601{
1602 struct cx8800_dev *dev = dev_id;
1603 struct cx88_core *core = dev->core;
1604 u32 status;
1605 int loop, handled = 0;
1606
1607 for (loop = 0; loop < 10; loop++) {
8ddac9ee
TP		 1608 status = cx_read(MO_PCI_INTSTAT) &
1609 (core->pci_irqmask | PCI_INT_VIDINT);
1da177e4
LT		 1610 if (0 == status)
1611 goto out;
1612 cx_write(MO_PCI_INTSTAT, status);
1613 handled = 1;
1614
1615 if (status & core->pci_irqmask)
1616 cx88_core_irq(core,status);
8ddac9ee 1617 if (status & PCI_INT_VIDINT)
1da177e4
LT		 1618 cx8800_vid_irq(dev);
1619 };
1620 if (10 == loop) {
1621 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1622 core->name);
1623 cx_write(MO_PCI_INTMSK,0);
1624 }
1625
1626 out:
1627 return IRQ_RETVAL(handled);
1628}
1629
1630/* ----------------------------------------------------------- */
1631/* exported stuff */
1632
fa027c2a 1633static const struct file_operations video_fops =
1da177e4
LT		 1634{
1635 .owner = THIS_MODULE,
1636 .open = video_open,
1637 .release = video_release,
1638 .read = video_read,
1639 .poll = video_poll,
1640 .mmap = video_mmap,
8d87cb9f 1641 .ioctl = video_ioctl2,
0d0fbf81 1642 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1643 .llseek = no_llseek,
1644};
1645
8d87cb9f 1646static struct video_device cx8800_vbi_template;
408b664a 1647static struct video_device cx8800_video_template =
1da177e4 1648{
8d87cb9f
MCC		 1649 .name = "cx8800-video",
1650 .type = VID_TYPE_CAPTURE|VID_TYPE_TUNER|VID_TYPE_SCALES,
1651 .fops = &video_fops,
1652 .minor = -1,
1653 .vidioc_querycap = vidioc_querycap,
1654 .vidioc_enum_fmt_cap = vidioc_enum_fmt_cap,
1655 .vidioc_g_fmt_cap = vidioc_g_fmt_cap,
1656 .vidioc_try_fmt_cap = vidioc_try_fmt_cap,
1657 .vidioc_s_fmt_cap = vidioc_s_fmt_cap,
1658 .vidioc_g_fmt_vbi = cx8800_vbi_fmt,
1659 .vidioc_try_fmt_vbi = cx8800_vbi_fmt,
1660 .vidioc_s_fmt_vbi = cx8800_vbi_fmt,
1661 .vidioc_reqbufs = vidioc_reqbufs,
1662 .vidioc_querybuf = vidioc_querybuf,
1663 .vidioc_qbuf = vidioc_qbuf,
1664 .vidioc_dqbuf = vidioc_dqbuf,
1665 .vidioc_s_std = vidioc_s_std,
1666 .vidioc_enum_input = vidioc_enum_input,
1667 .vidioc_g_input = vidioc_g_input,
1668 .vidioc_s_input = vidioc_s_input,
1669 .vidioc_queryctrl = vidioc_queryctrl,
1670 .vidioc_g_ctrl = vidioc_g_ctrl,
1671 .vidioc_s_ctrl = vidioc_s_ctrl,
1672 .vidioc_streamon = vidioc_streamon,
1673 .vidioc_streamoff = vidioc_streamoff,
1674#ifdef CONFIG_VIDEO_V4L1_COMPAT
1675 .vidiocgmbuf = vidiocgmbuf,
1676#endif
1677 .vidioc_g_tuner = vidioc_g_tuner,
1678 .vidioc_s_tuner = vidioc_s_tuner,
1679 .vidioc_g_frequency = vidioc_g_frequency,
1680 .vidioc_s_frequency = vidioc_s_frequency,
dbbff48f
TP		 1681#ifdef CONFIG_VIDEO_ADV_DEBUG
1682 .vidioc_g_register = vidioc_g_register,
1683 .vidioc_s_register = vidioc_s_register,
1684#endif
63ab1bdc 1685 .tvnorms = CX88_NORMS,
dbbff48f 1686 .current_norm = V4L2_STD_NTSC_M,
1da177e4
LT		 1687};
1688
fa027c2a 1689static const struct file_operations radio_fops =
1da177e4
LT		 1690{
1691 .owner = THIS_MODULE,
1692 .open = video_open,
1693 .release = video_release,
8d87cb9f 1694 .ioctl = video_ioctl2,
0d0fbf81 1695 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1696 .llseek = no_llseek,
1697};
1698
408b664a 1699static struct video_device cx8800_radio_template =
1da177e4 1700{
8d87cb9f
MCC		 1701 .name = "cx8800-radio",
1702 .type = VID_TYPE_TUNER,
8d87cb9f
MCC		 1703 .fops = &radio_fops,
1704 .minor = -1,
1705 .vidioc_querycap = radio_querycap,
1706 .vidioc_g_tuner = radio_g_tuner,
1707 .vidioc_enum_input = radio_enum_input,
1708 .vidioc_g_audio = radio_g_audio,
1709 .vidioc_s_tuner = radio_s_tuner,
1710 .vidioc_s_audio = radio_s_audio,
1711 .vidioc_s_input = radio_s_input,
1712 .vidioc_queryctrl = radio_queryctrl,
1713 .vidioc_g_ctrl = vidioc_g_ctrl,
1714 .vidioc_s_ctrl = vidioc_s_ctrl,
1715 .vidioc_g_frequency = vidioc_g_frequency,
1716 .vidioc_s_frequency = vidioc_s_frequency,
a75d2048
TP		 1717#ifdef CONFIG_VIDEO_ADV_DEBUG
1718 .vidioc_g_register = vidioc_g_register,
1719 .vidioc_s_register = vidioc_s_register,
1720#endif
1da177e4
LT		 1721};
1722
1723/* ----------------------------------------------------------- */
1724
1725static void cx8800_unregister_video(struct cx8800_dev *dev)
1726{
1727 if (dev->radio_dev) {
1728 if (-1 != dev->radio_dev->minor)
1729 video_unregister_device(dev->radio_dev);
1730 else
1731 video_device_release(dev->radio_dev);
1732 dev->radio_dev = NULL;
1733 }
1734 if (dev->vbi_dev) {
1735 if (-1 != dev->vbi_dev->minor)
1736 video_unregister_device(dev->vbi_dev);
1737 else
1738 video_device_release(dev->vbi_dev);
1739 dev->vbi_dev = NULL;
1740 }
1741 if (dev->video_dev) {
1742 if (-1 != dev->video_dev->minor)
1743 video_unregister_device(dev->video_dev);
1744 else
1745 video_device_release(dev->video_dev);
1746 dev->video_dev = NULL;
1747 }
1748}
1749
1750static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1751 const struct pci_device_id *pci_id)
1752{
1753 struct cx8800_dev *dev;
1754 struct cx88_core *core;
8d87cb9f 1755
1da177e4
LT		 1756 int err;
1757
7408187d 1758 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1759 if (NULL == dev)
1760 return -ENOMEM;
1da177e4
LT		 1761
1762 /* pci init */
1763 dev->pci = pci_dev;
1764 if (pci_enable_device(pci_dev)) {
1765 err = -EIO;
1766 goto fail_free;
1767 }
1768 core = cx88_core_get(dev->pci);
1769 if (NULL == core) {
1770 err = -EINVAL;
1771 goto fail_free;
1772 }
1773 dev->core = core;
1774
1775 /* print pci info */
1776 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1777 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1778 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
228aef63 1779 "latency: %d, mmio: 0x%llx\n", core->name,
1da177e4 1780 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
228aef63 1781 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1da177e4
LT		 1782
1783 pci_set_master(pci_dev);
aaa40cb8 1784 if (!pci_dma_supported(pci_dev,DMA_32BIT_MASK)) {
1da177e4
LT		 1785 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1786 err = -EIO;
1787 goto fail_core;
1788 }
1789
8d87cb9f
MCC		 1790 /* Initialize VBI template */
1791 memcpy( &cx8800_vbi_template, &cx8800_video_template,
1792 sizeof(cx8800_vbi_template) );
1793 strcpy(cx8800_vbi_template.name,"cx8800-vbi");
1794 cx8800_vbi_template.type = VID_TYPE_TELETEXT|VID_TYPE_TUNER;
1795
1da177e4 1796 /* initialize driver struct */
1da177e4 1797 spin_lock_init(&dev->slock);
63ab1bdc 1798 core->tvnorm = cx8800_video_template.current_norm;
1da177e4
LT		 1799
1800 /* init video dma queues */
1801 INIT_LIST_HEAD(&dev->vidq.active);
1802 INIT_LIST_HEAD(&dev->vidq.queued);
1803 dev->vidq.timeout.function = cx8800_vid_timeout;
1804 dev->vidq.timeout.data = (unsigned long)dev;
1805 init_timer(&dev->vidq.timeout);
1806 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1807 MO_VID_DMACNTRL,0x11,0x00);
1808
1809 /* init vbi dma queues */
1810 INIT_LIST_HEAD(&dev->vbiq.active);
1811 INIT_LIST_HEAD(&dev->vbiq.queued);
1812 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1813 dev->vbiq.timeout.data = (unsigned long)dev;
1814 init_timer(&dev->vbiq.timeout);
1815 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1816 MO_VID_DMACNTRL,0x88,0x00);
1817
1818 /* get irq */
1819 err = request_irq(pci_dev->irq, cx8800_irq,
8076fe32 1820 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1da177e4 1821 if (err < 0) {
5772f813 1822 printk(KERN_ERR "%s/0: can't get IRQ %d\n",
1da177e4
LT		 1823 core->name,pci_dev->irq);
1824 goto fail_core;
1825 }
1826 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1827
1828 /* load and configure helper modules */
e52e98a7 1829
6a59d64c 1830 if (core->board.audio_chip == AUDIO_CHIP_WM8775)
3057906d
ST		 1831 request_module("wm8775");
1832
6fcecce7
MK		 1833 switch (core->boardnr) {
1834 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1835 request_module("ir-kbd-i2c");
1836 request_module("rtc-isl1208");
1837 }
1838
1da177e4
LT		 1839 /* register v4l devices */
1840 dev->video_dev = cx88_vdev_init(core,dev->pci,
1841 &cx8800_video_template,"video");
1842 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1843 video_nr[core->nr]);
1844 if (err < 0) {
5772f813 1845 printk(KERN_ERR "%s/0: can't register video device\n",
1da177e4
LT		 1846 core->name);
1847 goto fail_unreg;
1848 }
1849 printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n",
1850 core->name,dev->video_dev->minor & 0x1f);
1851
1852 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
1853 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1854 vbi_nr[core->nr]);
1855 if (err < 0) {
5772f813 1856 printk(KERN_ERR "%s/0: can't register vbi device\n",
1da177e4
LT		 1857 core->name);
1858 goto fail_unreg;
1859 }
1860 printk(KERN_INFO "%s/0: registered device vbi%d\n",
1861 core->name,dev->vbi_dev->minor & 0x1f);
1862
6a59d64c 1863 if (core->board.radio.type == CX88_RADIO) {
1da177e4
LT		 1864 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1865 &cx8800_radio_template,"radio");
1866 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1867 radio_nr[core->nr]);
1868 if (err < 0) {
5772f813 1869 printk(KERN_ERR "%s/0: can't register radio device\n",
1da177e4
LT		 1870 core->name);
1871 goto fail_unreg;
1872 }
1873 printk(KERN_INFO "%s/0: registered device radio%d\n",
1874 core->name,dev->radio_dev->minor & 0x1f);
1875 }
1876
1877 /* everything worked */
1878 list_add_tail(&dev->devlist,&cx8800_devlist);
1879 pci_set_drvdata(pci_dev,dev);
1880
1881 /* initial device configuration */
3593cab5 1882 mutex_lock(&core->lock);
63ab1bdc 1883 cx88_set_tvnorm(core,core->tvnorm);
70f00044 1884 init_controls(core);
e90311a1 1885 cx88_video_mux(core,0);
3593cab5 1886 mutex_unlock(&core->lock);
1da177e4
LT		 1887
1888 /* start tvaudio thread */
6a59d64c 1889 if (core->board.tuner_type != TUNER_ABSENT) {
1da177e4 1890 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
32b78de7
CG		 1891 if (IS_ERR(core->kthread)) {
1892 err = PTR_ERR(core->kthread);
5772f813
TP		 1893 printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
1894 core->name, err);
32b78de7
CG		 1895 }
1896 }
1da177e4
LT		 1897 return 0;
1898
1899fail_unreg:
1900 cx8800_unregister_video(dev);
1901 free_irq(pci_dev->irq, dev);
1902fail_core:
1903 cx88_core_put(core,dev->pci);
1904fail_free:
1905 kfree(dev);
1906 return err;
1907}
1908
1909static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
1910{
4ac97914 1911 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 1912 struct cx88_core *core = dev->core;
1da177e4
LT		 1913
1914 /* stop thread */
e52e98a7
MCC		 1915 if (core->kthread) {
1916 kthread_stop(core->kthread);
1917 core->kthread = NULL;
1da177e4
LT		 1918 }
1919
e52e98a7 1920 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 1921 pci_disable_device(pci_dev);
1922
1923 /* unregister stuff */
1924
1925 free_irq(pci_dev->irq, dev);
1926 cx8800_unregister_video(dev);
1927 pci_set_drvdata(pci_dev, NULL);
1928
1929 /* free memory */
1930 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
1931 list_del(&dev->devlist);
e52e98a7 1932 cx88_core_put(core,dev->pci);
1da177e4
LT		 1933 kfree(dev);
1934}
1935
17bc98a4 1936#ifdef CONFIG_PM
1da177e4
LT		 1937static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1938{
b45009b0 1939 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 1940 struct cx88_core *core = dev->core;
1941
1942 /* stop video+vbi capture */
1943 spin_lock(&dev->slock);
1944 if (!list_empty(&dev->vidq.active)) {
5772f813 1945 printk("%s/0: suspend video\n", core->name);
1da177e4
LT		 1946 stop_video_dma(dev);
1947 del_timer(&dev->vidq.timeout);
1948 }
1949 if (!list_empty(&dev->vbiq.active)) {
5772f813 1950 printk("%s/0: suspend vbi\n", core->name);
1da177e4
LT		 1951 cx8800_stop_vbi_dma(dev);
1952 del_timer(&dev->vbiq.timeout);
1953 }
1954 spin_unlock(&dev->slock);
1955
13595a51
MCC		 1956 if (core->ir)
1957 cx88_ir_stop(core, core->ir);
1da177e4 1958 /* FIXME -- shutdown device */
e52e98a7 1959 cx88_shutdown(core);
1da177e4
LT		 1960
1961 pci_save_state(pci_dev);
1962 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
1963 pci_disable_device(pci_dev);
1964 dev->state.disabled = 1;
1965 }
1966 return 0;
1967}
1968
1969static int cx8800_resume(struct pci_dev *pci_dev)
1970{
b45009b0 1971 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 1972 struct cx88_core *core = dev->core;
08adb9e2 1973 int err;
1da177e4
LT		 1974
1975 if (dev->state.disabled) {
08adb9e2
MCC		 1976 err=pci_enable_device(pci_dev);
1977 if (err) {
5772f813
TP		 1978 printk(KERN_ERR "%s/0: can't enable device\n",
1979 core->name);
08adb9e2
MCC		 1980 return err;
1981 }
1982
1da177e4
LT		 1983 dev->state.disabled = 0;
1984 }
08adb9e2
MCC		 1985 err= pci_set_power_state(pci_dev, PCI_D0);
1986 if (err) {
5772f813 1987 printk(KERN_ERR "%s/0: can't set power state\n", core->name);
08adb9e2
MCC		 1988 pci_disable_device(pci_dev);
1989 dev->state.disabled = 1;
1990
1991 return err;
1992 }
1da177e4
LT		 1993 pci_restore_state(pci_dev);
1994
1da177e4 1995 /* FIXME: re-initialize hardware */
e52e98a7 1996 cx88_reset(core);
13595a51
MCC		 1997 if (core->ir)
1998 cx88_ir_start(core, core->ir);
1999
2000 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1da177e4
LT		 2001
2002 /* restart video+vbi capture */
2003 spin_lock(&dev->slock);
2004 if (!list_empty(&dev->vidq.active)) {
5772f813 2005 printk("%s/0: resume video\n", core->name);
1da177e4
LT		 2006 restart_video_queue(dev,&dev->vidq);
2007 }
2008 if (!list_empty(&dev->vbiq.active)) {
5772f813 2009 printk("%s/0: resume vbi\n", core->name);
1da177e4
LT		 2010 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2011 }
2012 spin_unlock(&dev->slock);
2013
2014 return 0;
2015}
17bc98a4 2016#endif
1da177e4
LT		 2017
2018/* ----------------------------------------------------------- */
2019
408b664a 2020static struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2021 {
2022 .vendor = 0x14f1,
2023 .device = 0x8800,
b45009b0
MCC		 2024 .subvendor = PCI_ANY_ID,
2025 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2026 },{
2027 /* --- end of list --- */
2028 }
2029};
2030MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2031
2032static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2033 .name = "cx8800",
2034 .id_table = cx8800_pci_tbl,
2035 .probe = cx8800_initdev,
2036 .remove = __devexit_p(cx8800_finidev),
17bc98a4 2037#ifdef CONFIG_PM
1da177e4
LT		 2038 .suspend = cx8800_suspend,
2039 .resume = cx8800_resume,
17bc98a4 2040#endif
1da177e4
LT		 2041};
2042
2043static int cx8800_init(void)
2044{
5772f813 2045 printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n",
1da177e4
LT		 2046 (CX88_VERSION_CODE >> 16) & 0xff,
2047 (CX88_VERSION_CODE >> 8) & 0xff,
2048 CX88_VERSION_CODE & 0xff);
2049#ifdef SNAPSHOT
2050 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2051 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2052#endif
2053 return pci_register_driver(&cx8800_pci_driver);
2054}
2055
2056static void cx8800_fini(void)
2057{
2058 pci_unregister_driver(&cx8800_pci_driver);
2059}
2060
2061module_init(cx8800_init);
2062module_exit(cx8800_fini);
2063
2064/* ----------------------------------------------------------- */
2065/*
2066 * Local variables:
2067 * c-basic-offset: 8
2068 * End:
b45009b0 2069 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2070 */
kernel source for telekom puls (alcatel/mediatek)