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V4L/DVB (8482): videodev: move all ioctl callbacks to a new v4l2_ioctl_ops struct
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8d87cb9f
MCC		 8 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
9 * - Multituner support
10 * - video_ioctl2 conversion
11 * - PAL/M fixes
12 *
1da177e4
LT		 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/init.h>
29#include <linux/list.h>
30#include <linux/module.h>
1da177e4
LT		 31#include <linux/kmod.h>
32#include <linux/kernel.h>
33#include <linux/slab.h>
34#include <linux/interrupt.h>
c24228da 35#include <linux/dma-mapping.h>
1da177e4
LT		 36#include <linux/delay.h>
37#include <linux/kthread.h>
38#include <asm/div64.h>
39
40#include "cx88.h"
5e453dc7 41#include <media/v4l2-common.h>
35ea11ff 42#include <media/v4l2-ioctl.h>
1da177e4 43
cd41e28e 44#ifdef CONFIG_VIDEO_V4L1_COMPAT
79436633
MCC		 45/* Include V4L1 specific functions. Should be removed soon */
46#include <linux/videodev.h>
cd41e28e 47#endif
79436633 48
1da177e4
LT		 49MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
50MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
51MODULE_LICENSE("GPL");
52
53/* ------------------------------------------------------------------ */
54
55static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
56static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
57static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
58
59module_param_array(video_nr, int, NULL, 0444);
60module_param_array(vbi_nr, int, NULL, 0444);
61module_param_array(radio_nr, int, NULL, 0444);
62
63MODULE_PARM_DESC(video_nr,"video device numbers");
64MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
65MODULE_PARM_DESC(radio_nr,"radio device numbers");
66
ff699e6b 67static unsigned int video_debug;
1da177e4
LT		 68module_param(video_debug,int,0644);
69MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
70
ff699e6b 71static unsigned int irq_debug;
1da177e4
LT		 72module_param(irq_debug,int,0644);
73MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
74
75static unsigned int vid_limit = 16;
76module_param(vid_limit,int,0644);
77MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
78
79#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 80 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4
LT		 81
82/* ------------------------------------------------------------------ */
83
84static LIST_HEAD(cx8800_devlist);
85
86/* ------------------------------------------------------------------- */
87/* static data */
88
1da177e4
LT		 89static struct cx8800_fmt formats[] = {
90 {
91 .name = "8 bpp, gray",
92 .fourcc = V4L2_PIX_FMT_GREY,
93 .cxformat = ColorFormatY8,
94 .depth = 8,
95 .flags = FORMAT_FLAGS_PACKED,
96 },{
97 .name = "15 bpp RGB, le",
98 .fourcc = V4L2_PIX_FMT_RGB555,
99 .cxformat = ColorFormatRGB15,
100 .depth = 16,
101 .flags = FORMAT_FLAGS_PACKED,
102 },{
103 .name = "15 bpp RGB, be",
104 .fourcc = V4L2_PIX_FMT_RGB555X,
105 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
106 .depth = 16,
107 .flags = FORMAT_FLAGS_PACKED,
108 },{
109 .name = "16 bpp RGB, le",
110 .fourcc = V4L2_PIX_FMT_RGB565,
111 .cxformat = ColorFormatRGB16,
112 .depth = 16,
113 .flags = FORMAT_FLAGS_PACKED,
114 },{
115 .name = "16 bpp RGB, be",
116 .fourcc = V4L2_PIX_FMT_RGB565X,
117 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
118 .depth = 16,
119 .flags = FORMAT_FLAGS_PACKED,
120 },{
121 .name = "24 bpp RGB, le",
122 .fourcc = V4L2_PIX_FMT_BGR24,
123 .cxformat = ColorFormatRGB24,
124 .depth = 24,
125 .flags = FORMAT_FLAGS_PACKED,
126 },{
127 .name = "32 bpp RGB, le",
128 .fourcc = V4L2_PIX_FMT_BGR32,
129 .cxformat = ColorFormatRGB32,
130 .depth = 32,
131 .flags = FORMAT_FLAGS_PACKED,
132 },{
133 .name = "32 bpp RGB, be",
134 .fourcc = V4L2_PIX_FMT_RGB32,
135 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
136 .depth = 32,
137 .flags = FORMAT_FLAGS_PACKED,
138 },{
139 .name = "4:2:2, packed, YUYV",
140 .fourcc = V4L2_PIX_FMT_YUYV,
141 .cxformat = ColorFormatYUY2,
142 .depth = 16,
143 .flags = FORMAT_FLAGS_PACKED,
144 },{
145 .name = "4:2:2, packed, UYVY",
146 .fourcc = V4L2_PIX_FMT_UYVY,
147 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
148 .depth = 16,
149 .flags = FORMAT_FLAGS_PACKED,
150 },
151};
152
153static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
154{
155 unsigned int i;
156
157 for (i = 0; i < ARRAY_SIZE(formats); i++)
158 if (formats[i].fourcc == fourcc)
159 return formats+i;
160 return NULL;
161}
162
163/* ------------------------------------------------------------------- */
164
165static const struct v4l2_queryctrl no_ctl = {
166 .name = "42",
167 .flags = V4L2_CTRL_FLAG_DISABLED,
168};
169
170static struct cx88_ctrl cx8800_ctls[] = {
171 /* --- video --- */
172 {
173 .v = {
174 .id = V4L2_CID_BRIGHTNESS,
175 .name = "Brightness",
176 .minimum = 0x00,
177 .maximum = 0xff,
178 .step = 1,
9f9c907f 179 .default_value = 0x7f,
1da177e4
LT		 180 .type = V4L2_CTRL_TYPE_INTEGER,
181 },
182 .off = 128,
183 .reg = MO_CONTR_BRIGHT,
184 .mask = 0x00ff,
185 .shift = 0,
186 },{
187 .v = {
188 .id = V4L2_CID_CONTRAST,
189 .name = "Contrast",
190 .minimum = 0,
191 .maximum = 0xff,
192 .step = 1,
70f00044 193 .default_value = 0x3f,
1da177e4
LT		 194 .type = V4L2_CTRL_TYPE_INTEGER,
195 },
41ef7c1e 196 .off = 0,
1da177e4
LT		 197 .reg = MO_CONTR_BRIGHT,
198 .mask = 0xff00,
199 .shift = 8,
200 },{
201 .v = {
202 .id = V4L2_CID_HUE,
203 .name = "Hue",
204 .minimum = 0,
205 .maximum = 0xff,
206 .step = 1,
9f9c907f 207 .default_value = 0x7f,
1da177e4
LT		 208 .type = V4L2_CTRL_TYPE_INTEGER,
209 },
9ac4c158 210 .off = 128,
1da177e4
LT		 211 .reg = MO_HUE,
212 .mask = 0x00ff,
213 .shift = 0,
214 },{
215 /* strictly, this only describes only U saturation.
216 * V saturation is handled specially through code.
217 */
218 .v = {
219 .id = V4L2_CID_SATURATION,
220 .name = "Saturation",
221 .minimum = 0,
222 .maximum = 0xff,
223 .step = 1,
70f00044 224 .default_value = 0x7f,
1da177e4
LT		 225 .type = V4L2_CTRL_TYPE_INTEGER,
226 },
227 .off = 0,
228 .reg = MO_UV_SATURATION,
229 .mask = 0x00ff,
230 .shift = 0,
231 },{
6d04203c
FD		 232 .v = {
233 .id = V4L2_CID_CHROMA_AGC,
234 .name = "Chroma AGC",
235 .minimum = 0,
236 .maximum = 1,
87a17389 237 .default_value = 0x1,
6d04203c
FD		 238 .type = V4L2_CTRL_TYPE_BOOLEAN,
239 },
240 .reg = MO_INPUT_FORMAT,
241 .mask = 1 << 10,
242 .shift = 10,
1b879c43
FD		 243 }, {
244 .v = {
245 .id = V4L2_CID_COLOR_KILLER,
246 .name = "Color killer",
247 .minimum = 0,
248 .maximum = 1,
0b5afdd2 249 .default_value = 0x1,
1b879c43
FD		 250 .type = V4L2_CTRL_TYPE_BOOLEAN,
251 },
252 .reg = MO_INPUT_FORMAT,
253 .mask = 1 << 9,
254 .shift = 9,
6d04203c 255 }, {
1da177e4
LT		 256 /* --- audio --- */
257 .v = {
258 .id = V4L2_CID_AUDIO_MUTE,
259 .name = "Mute",
260 .minimum = 0,
261 .maximum = 1,
70f00044 262 .default_value = 1,
1da177e4
LT		 263 .type = V4L2_CTRL_TYPE_BOOLEAN,
264 },
265 .reg = AUD_VOL_CTL,
266 .sreg = SHADOW_AUD_VOL_CTL,
267 .mask = (1 << 6),
268 .shift = 6,
269 },{
270 .v = {
271 .id = V4L2_CID_AUDIO_VOLUME,
272 .name = "Volume",
273 .minimum = 0,
274 .maximum = 0x3f,
275 .step = 1,
9f9c907f 276 .default_value = 0x3f,
1da177e4
LT		 277 .type = V4L2_CTRL_TYPE_INTEGER,
278 },
279 .reg = AUD_VOL_CTL,
280 .sreg = SHADOW_AUD_VOL_CTL,
281 .mask = 0x3f,
282 .shift = 0,
283 },{
284 .v = {
285 .id = V4L2_CID_AUDIO_BALANCE,
286 .name = "Balance",
287 .minimum = 0,
288 .maximum = 0x7f,
289 .step = 1,
290 .default_value = 0x40,
291 .type = V4L2_CTRL_TYPE_INTEGER,
292 },
293 .reg = AUD_BAL_CTL,
294 .sreg = SHADOW_AUD_BAL_CTL,
295 .mask = 0x7f,
296 .shift = 0,
297 }
298};
408b664a 299static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
1da177e4 300
38a2713a
MK		 301const u32 cx88_user_ctrls[] = {
302 V4L2_CID_USER_CLASS,
303 V4L2_CID_BRIGHTNESS,
304 V4L2_CID_CONTRAST,
305 V4L2_CID_SATURATION,
306 V4L2_CID_HUE,
307 V4L2_CID_AUDIO_VOLUME,
308 V4L2_CID_AUDIO_BALANCE,
309 V4L2_CID_AUDIO_MUTE,
6d04203c 310 V4L2_CID_CHROMA_AGC,
1b879c43 311 V4L2_CID_COLOR_KILLER,
38a2713a
MK		 312 0
313};
314EXPORT_SYMBOL(cx88_user_ctrls);
315
316static const u32 *ctrl_classes[] = {
317 cx88_user_ctrls,
318 NULL
319};
320
6d04203c 321int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl)
38a2713a
MK		 322{
323 int i;
324
325 if (qctrl->id < V4L2_CID_BASE ||
326 qctrl->id >= V4L2_CID_LASTP1)
327 return -EINVAL;
328 for (i = 0; i < CX8800_CTLS; i++)
329 if (cx8800_ctls[i].v.id == qctrl->id)
330 break;
331 if (i == CX8800_CTLS) {
332 *qctrl = no_ctl;
333 return 0;
334 }
335 *qctrl = cx8800_ctls[i].v;
6d04203c
FD		 336 /* Report chroma AGC as inactive when SECAM is selected */
337 if (cx8800_ctls[i].v.id == V4L2_CID_CHROMA_AGC &&
338 core->tvnorm & V4L2_STD_SECAM)
339 qctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
340
38a2713a
MK		 341 return 0;
342}
343EXPORT_SYMBOL(cx8800_ctrl_query);
344
1da177e4
LT		 345/* ------------------------------------------------------------------- */
346/* resource management */
347
348static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
349{
e52e98a7 350 struct cx88_core *core = dev->core;
1da177e4
LT		 351 if (fh->resources & bit)
352 /* have it already allocated */
353 return 1;
354
355 /* is it free? */
3593cab5 356 mutex_lock(&core->lock);
1da177e4
LT		 357 if (dev->resources & bit) {
358 /* no, someone else uses it */
3593cab5 359 mutex_unlock(&core->lock);
1da177e4
LT		 360 return 0;
361 }
362 /* it's free, grab it */
363 fh->resources |= bit;
364 dev->resources |= bit;
365 dprintk(1,"res: get %d\n",bit);
3593cab5 366 mutex_unlock(&core->lock);
1da177e4
LT		 367 return 1;
368}
369
370static
371int res_check(struct cx8800_fh *fh, unsigned int bit)
372{
373 return (fh->resources & bit);
374}
375
376static
377int res_locked(struct cx8800_dev *dev, unsigned int bit)
378{
379 return (dev->resources & bit);
380}
381
382static
383void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
384{
e52e98a7 385 struct cx88_core *core = dev->core;
ae24601b 386 BUG_ON((fh->resources & bits) != bits);
1da177e4 387
3593cab5 388 mutex_lock(&core->lock);
1da177e4
LT		 389 fh->resources &= ~bits;
390 dev->resources &= ~bits;
391 dprintk(1,"res: put %d\n",bits);
3593cab5 392 mutex_unlock(&core->lock);
1da177e4
LT		 393}
394
395/* ------------------------------------------------------------------ */
396
e90311a1 397int cx88_video_mux(struct cx88_core *core, unsigned int input)
1da177e4 398{
e52e98a7 399 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 400
401 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
6a59d64c
TP		 402 input, INPUT(input).vmux,
403 INPUT(input).gpio0,INPUT(input).gpio1,
404 INPUT(input).gpio2,INPUT(input).gpio3);
e52e98a7 405 core->input = input;
6a59d64c
TP		 406 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
407 cx_write(MO_GP3_IO, INPUT(input).gpio3);
408 cx_write(MO_GP0_IO, INPUT(input).gpio0);
409 cx_write(MO_GP1_IO, INPUT(input).gpio1);
410 cx_write(MO_GP2_IO, INPUT(input).gpio2);
1da177e4 411
6a59d64c 412 switch (INPUT(input).type) {
1da177e4
LT		 413 case CX88_VMUX_SVIDEO:
414 cx_set(MO_AFECFG_IO, 0x00000001);
415 cx_set(MO_INPUT_FORMAT, 0x00010010);
416 cx_set(MO_FILTER_EVEN, 0x00002020);
417 cx_set(MO_FILTER_ODD, 0x00002020);
418 break;
419 default:
420 cx_clear(MO_AFECFG_IO, 0x00000001);
421 cx_clear(MO_INPUT_FORMAT, 0x00010010);
422 cx_clear(MO_FILTER_EVEN, 0x00002020);
423 cx_clear(MO_FILTER_ODD, 0x00002020);
424 break;
425 }
f24546a9 426
66e6fbdf
RC		 427 /* if there are audioroutes defined, we have an external
428 ADC to deal with audio */
7b27d45b 429
66e6fbdf
RC		 430 if (INPUT(input).audioroute) {
431
432 /* cx2388's C-ADC is connected to the tuner only.
433 When used with S-Video, that ADC is busy dealing with
434 chroma, so an external must be used for baseband audio */
435
436 if (INPUT(input).type != CX88_VMUX_TELEVISION &&
437 INPUT(input).type != CX88_RADIO) {
438 /* "ADC mode" */
439 cx_write(AUD_I2SCNTL, 0x1);
f24546a9 440 cx_set(AUD_CTL, EN_I2SIN_ENABLE);
66e6fbdf
RC		 441 } else {
442 /* Normal mode */
443 cx_write(AUD_I2SCNTL, 0x0);
f24546a9 444 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
66e6fbdf
RC		 445 }
446
447 /* The wm8775 module has the "2" route hardwired into
448 the initialization. Some boards may use different
449 routes for different inputs. HVR-1300 surely does */
450 if (core->board.audio_chip &&
38f9d308 451 core->board.audio_chip == V4L2_IDENT_WM8775) {
66e6fbdf
RC		 452 struct v4l2_routing route;
453
454 route.input = INPUT(input).audioroute;
455 cx88_call_i2c_clients(core,
d8f69971 456 VIDIOC_INT_S_AUDIO_ROUTING, &route);
66e6fbdf
RC		 457
458 }
459
f24546a9 460 }
66e6fbdf 461
1da177e4
LT		 462 return 0;
463}
e90311a1 464EXPORT_SYMBOL(cx88_video_mux);
1da177e4
LT		 465
466/* ------------------------------------------------------------------ */
467
468static int start_video_dma(struct cx8800_dev *dev,
469 struct cx88_dmaqueue *q,
470 struct cx88_buffer *buf)
471{
472 struct cx88_core *core = dev->core;
473
474 /* setup fifo + format */
e52e98a7 475 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 476 buf->bpl, buf->risc.dma);
e52e98a7 477 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 478 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
479
480 /* reset counter */
481 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
482 q->count = 1;
483
484 /* enable irqs */
8ddac9ee 485 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
e52e98a7
MCC		 486
487 /* Enables corresponding bits at PCI_INT_STAT:
488 bits 0 to 4: video, audio, transport stream, VIP, Host
489 bit 7: timer
490 bits 8 and 9: DMA complete for: SRC, DST
491 bits 10 and 11: BERR signal asserted for RISC: RD, WR
492 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
493 */
1da177e4
LT		 494 cx_set(MO_VID_INTMSK, 0x0f0011);
495
496 /* enable capture */
497 cx_set(VID_CAPTURE_CONTROL,0x06);
498
499 /* start dma */
500 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 501 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 502
503 return 0;
504}
505
17bc98a4 506#ifdef CONFIG_PM
1da177e4
LT		 507static int stop_video_dma(struct cx8800_dev *dev)
508{
509 struct cx88_core *core = dev->core;
510
511 /* stop dma */
512 cx_clear(MO_VID_DMACNTRL, 0x11);
513
514 /* disable capture */
515 cx_clear(VID_CAPTURE_CONTROL,0x06);
516
517 /* disable irqs */
8ddac9ee 518 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
1da177e4
LT		 519 cx_clear(MO_VID_INTMSK, 0x0f0011);
520 return 0;
521}
17bc98a4 522#endif
1da177e4
LT		 523
524static int restart_video_queue(struct cx8800_dev *dev,
525 struct cx88_dmaqueue *q)
526{
e52e98a7 527 struct cx88_core *core = dev->core;
1da177e4 528 struct cx88_buffer *buf, *prev;
1da177e4
LT		 529
530 if (!list_empty(&q->active)) {
4ac97914 531 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 532 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
533 buf, buf->vb.i);
534 start_video_dma(dev, q, buf);
8bb629e2
TP		 535 list_for_each_entry(buf, &q->active, vb.queue)
536 buf->count = q->count++;
1da177e4
LT		 537 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
538 return 0;
539 }
540
541 prev = NULL;
542 for (;;) {
543 if (list_empty(&q->queued))
544 return 0;
4ac97914 545 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4 546 if (NULL == prev) {
179e0917 547 list_move_tail(&buf->vb.queue, &q->active);
1da177e4 548 start_video_dma(dev, q, buf);
0fc0686e 549 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 550 buf->count = q->count++;
551 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
552 dprintk(2,"[%p/%d] restart_queue - first active\n",
553 buf,buf->vb.i);
554
555 } else if (prev->vb.width == buf->vb.width &&
556 prev->vb.height == buf->vb.height &&
557 prev->fmt == buf->fmt) {
179e0917 558 list_move_tail(&buf->vb.queue, &q->active);
0fc0686e 559 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 560 buf->count = q->count++;
561 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
562 dprintk(2,"[%p/%d] restart_queue - move to active\n",
563 buf,buf->vb.i);
564 } else {
565 return 0;
566 }
567 prev = buf;
568 }
569}
570
571/* ------------------------------------------------------------------ */
572
573static int
574buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
575{
576 struct cx8800_fh *fh = q->priv_data;
577
578 *size = fh->fmt->depth*fh->width*fh->height >> 3;
579 if (0 == *count)
580 *count = 32;
581 while (*size * *count > vid_limit * 1024 * 1024)
582 (*count)--;
583 return 0;
584}
585
586static int
587buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
588 enum v4l2_field field)
589{
590 struct cx8800_fh *fh = q->priv_data;
591 struct cx8800_dev *dev = fh->dev;
e52e98a7 592 struct cx88_core *core = dev->core;
1da177e4 593 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
c1accaa2 594 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
1da177e4
LT		 595 int rc, init_buffer = 0;
596
597 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 598 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
599 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 600 return -EINVAL;
601 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
602 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
603 return -EINVAL;
604
605 if (buf->fmt != fh->fmt ||
606 buf->vb.width != fh->width ||
607 buf->vb.height != fh->height ||
608 buf->vb.field != field) {
609 buf->fmt = fh->fmt;
610 buf->vb.width = fh->width;
611 buf->vb.height = fh->height;
612 buf->vb.field = field;
613 init_buffer = 1;
614 }
615
0fc0686e 616 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
1da177e4 617 init_buffer = 1;
c7b0ac05 618 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
1da177e4
LT		 619 goto fail;
620 }
621
622 if (init_buffer) {
623 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
624 switch (buf->vb.field) {
625 case V4L2_FIELD_TOP:
626 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 627 dma->sglist, 0, UNSET,
1da177e4
LT		 628 buf->bpl, 0, buf->vb.height);
629 break;
630 case V4L2_FIELD_BOTTOM:
631 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 632 dma->sglist, UNSET, 0,
1da177e4
LT		 633 buf->bpl, 0, buf->vb.height);
634 break;
635 case V4L2_FIELD_INTERLACED:
636 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 637 dma->sglist, 0, buf->bpl,
1da177e4
LT		 638 buf->bpl, buf->bpl,
639 buf->vb.height >> 1);
640 break;
641 case V4L2_FIELD_SEQ_TB:
642 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 643 dma->sglist,
1da177e4
LT		 644 0, buf->bpl * (buf->vb.height >> 1),
645 buf->bpl, 0,
646 buf->vb.height >> 1);
647 break;
648 case V4L2_FIELD_SEQ_BT:
649 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 650 dma->sglist,
1da177e4
LT		 651 buf->bpl * (buf->vb.height >> 1), 0,
652 buf->bpl, 0,
653 buf->vb.height >> 1);
654 break;
655 default:
656 BUG();
657 }
658 }
659 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
660 buf, buf->vb.i,
661 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
662 (unsigned long)buf->risc.dma);
663
0fc0686e 664 buf->vb.state = VIDEOBUF_PREPARED;
1da177e4
LT		 665 return 0;
666
667 fail:
c7b0ac05 668 cx88_free_buffer(q,buf);
1da177e4
LT		 669 return rc;
670}
671
672static void
673buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
674{
675 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
676 struct cx88_buffer *prev;
677 struct cx8800_fh *fh = vq->priv_data;
678 struct cx8800_dev *dev = fh->dev;
e52e98a7 679 struct cx88_core *core = dev->core;
1da177e4
LT		 680 struct cx88_dmaqueue *q = &dev->vidq;
681
682 /* add jump to stopper */
683 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
684 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
685
686 if (!list_empty(&q->queued)) {
687 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 688 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 689 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
690 buf, buf->vb.i);
691
692 } else if (list_empty(&q->active)) {
693 list_add_tail(&buf->vb.queue,&q->active);
694 start_video_dma(dev, q, buf);
0fc0686e 695 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 696 buf->count = q->count++;
697 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
698 dprintk(2,"[%p/%d] buffer_queue - first active\n",
699 buf, buf->vb.i);
700
701 } else {
702 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
703 if (prev->vb.width == buf->vb.width &&
704 prev->vb.height == buf->vb.height &&
705 prev->fmt == buf->fmt) {
706 list_add_tail(&buf->vb.queue,&q->active);
0fc0686e 707 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 708 buf->count = q->count++;
709 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
710 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
711 buf, buf->vb.i);
712
713 } else {
714 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 715 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 716 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
717 buf, buf->vb.i);
718 }
719 }
720}
721
722static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
723{
724 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
1da177e4 725
c7b0ac05 726 cx88_free_buffer(q,buf);
1da177e4
LT		 727}
728
408b664a 729static struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 730 .buf_setup = buffer_setup,
731 .buf_prepare = buffer_prepare,
732 .buf_queue = buffer_queue,
733 .buf_release = buffer_release,
734};
735
736/* ------------------------------------------------------------------ */
737
1da177e4
LT		 738
739/* ------------------------------------------------------------------ */
740
741static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
742{
743 switch (fh->type) {
744 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
745 return &fh->vidq;
746 case V4L2_BUF_TYPE_VBI_CAPTURE:
747 return &fh->vbiq;
748 default:
749 BUG();
750 return NULL;
751 }
752}
753
754static int get_ressource(struct cx8800_fh *fh)
755{
756 switch (fh->type) {
757 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
758 return RESOURCE_VIDEO;
759 case V4L2_BUF_TYPE_VBI_CAPTURE:
760 return RESOURCE_VBI;
761 default:
762 BUG();
763 return 0;
764 }
765}
766
767static int video_open(struct inode *inode, struct file *file)
768{
769 int minor = iminor(inode);
770 struct cx8800_dev *h,*dev = NULL;
e52e98a7 771 struct cx88_core *core;
1da177e4 772 struct cx8800_fh *fh;
1da177e4
LT		 773 enum v4l2_buf_type type = 0;
774 int radio = 0;
775
8bb629e2 776 list_for_each_entry(h, &cx8800_devlist, devlist) {
1da177e4
LT		 777 if (h->video_dev->minor == minor) {
778 dev = h;
779 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
780 }
781 if (h->vbi_dev->minor == minor) {
782 dev = h;
783 type = V4L2_BUF_TYPE_VBI_CAPTURE;
784 }
785 if (h->radio_dev &&
786 h->radio_dev->minor == minor) {
787 radio = 1;
788 dev = h;
789 }
790 }
791 if (NULL == dev)
792 return -ENODEV;
793
e52e98a7
MCC		 794 core = dev->core;
795
1da177e4
LT		 796 dprintk(1,"open minor=%d radio=%d type=%s\n",
797 minor,radio,v4l2_type_names[type]);
798
799 /* allocate + initialize per filehandle data */
7408187d 800 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
1da177e4
LT		 801 if (NULL == fh)
802 return -ENOMEM;
1da177e4
LT		 803 file->private_data = fh;
804 fh->dev = dev;
805 fh->radio = radio;
806 fh->type = type;
807 fh->width = 320;
808 fh->height = 240;
809 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
810
0705135e
GL		 811 videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
812 &dev->pci->dev, &dev->slock,
1da177e4
LT		 813 V4L2_BUF_TYPE_VIDEO_CAPTURE,
814 V4L2_FIELD_INTERLACED,
815 sizeof(struct cx88_buffer),
816 fh);
0705135e
GL		 817 videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
818 &dev->pci->dev, &dev->slock,
1da177e4
LT		 819 V4L2_BUF_TYPE_VBI_CAPTURE,
820 V4L2_FIELD_SEQ_TB,
821 sizeof(struct cx88_buffer),
822 fh);
823
824 if (fh->radio) {
1da177e4 825 dprintk(1,"video_open: setting radio device\n");
6a59d64c
TP		 826 cx_write(MO_GP3_IO, core->board.radio.gpio3);
827 cx_write(MO_GP0_IO, core->board.radio.gpio0);
828 cx_write(MO_GP1_IO, core->board.radio.gpio1);
829 cx_write(MO_GP2_IO, core->board.radio.gpio2);
e52e98a7 830 core->tvaudio = WW_FM;
1da177e4
LT		 831 cx88_set_tvaudio(core);
832 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
e52e98a7 833 cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL);
1da177e4
LT		 834 }
835
4ac97914 836 return 0;
1da177e4
LT		 837}
838
839static ssize_t
f9e7a020 840video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 841{
842 struct cx8800_fh *fh = file->private_data;
843
844 switch (fh->type) {
845 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
846 if (res_locked(fh->dev,RESOURCE_VIDEO))
847 return -EBUSY;
848 return videobuf_read_one(&fh->vidq, data, count, ppos,
849 file->f_flags & O_NONBLOCK);
850 case V4L2_BUF_TYPE_VBI_CAPTURE:
851 if (!res_get(fh->dev,fh,RESOURCE_VBI))
852 return -EBUSY;
853 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
854 file->f_flags & O_NONBLOCK);
855 default:
856 BUG();
857 return 0;
858 }
859}
860
861static unsigned int
862video_poll(struct file *file, struct poll_table_struct *wait)
863{
864 struct cx8800_fh *fh = file->private_data;
865 struct cx88_buffer *buf;
866
867 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
868 if (!res_get(fh->dev,fh,RESOURCE_VBI))
869 return POLLERR;
870 return videobuf_poll_stream(file, &fh->vbiq, wait);
871 }
872
873 if (res_check(fh,RESOURCE_VIDEO)) {
874 /* streaming capture */
875 if (list_empty(&fh->vidq.stream))
876 return POLLERR;
877 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
878 } else {
879 /* read() capture */
880 buf = (struct cx88_buffer*)fh->vidq.read_buf;
881 if (NULL == buf)
882 return POLLERR;
883 }
884 poll_wait(file, &buf->vb.done, wait);
0fc0686e
BP		 885 if (buf->vb.state == VIDEOBUF_DONE ||
886 buf->vb.state == VIDEOBUF_ERROR)
1da177e4
LT		 887 return POLLIN|POLLRDNORM;
888 return 0;
889}
890
891static int video_release(struct inode *inode, struct file *file)
892{
893 struct cx8800_fh *fh = file->private_data;
894 struct cx8800_dev *dev = fh->dev;
895
896 /* turn off overlay */
897 if (res_check(fh, RESOURCE_OVERLAY)) {
898 /* FIXME */
899 res_free(dev,fh,RESOURCE_OVERLAY);
900 }
901
902 /* stop video capture */
903 if (res_check(fh, RESOURCE_VIDEO)) {
904 videobuf_queue_cancel(&fh->vidq);
905 res_free(dev,fh,RESOURCE_VIDEO);
906 }
907 if (fh->vidq.read_buf) {
908 buffer_release(&fh->vidq,fh->vidq.read_buf);
909 kfree(fh->vidq.read_buf);
910 }
911
912 /* stop vbi capture */
913 if (res_check(fh, RESOURCE_VBI)) {
053fcb60 914 videobuf_stop(&fh->vbiq);
1da177e4
LT		 915 res_free(dev,fh,RESOURCE_VBI);
916 }
917
918 videobuf_mmap_free(&fh->vidq);
919 videobuf_mmap_free(&fh->vbiq);
920 file->private_data = NULL;
921 kfree(fh);
e52e98a7
MCC		 922
923 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
924
1da177e4
LT		 925 return 0;
926}
927
928static int
929video_mmap(struct file *file, struct vm_area_struct * vma)
930{
931 struct cx8800_fh *fh = file->private_data;
932
933 return videobuf_mmap_mapper(get_queue(fh), vma);
934}
935
936/* ------------------------------------------------------------------ */
8d87cb9f 937/* VIDEO CTRL IOCTLS */
1da177e4 938
54da49f5 939int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 940{
8d87cb9f 941 struct cx88_ctrl *c = NULL;
1da177e4
LT		 942 u32 value;
943 int i;
944
945 for (i = 0; i < CX8800_CTLS; i++)
946 if (cx8800_ctls[i].v.id == ctl->id)
947 c = &cx8800_ctls[i];
8d87cb9f 948 if (unlikely(NULL == c))
1da177e4
LT		 949 return -EINVAL;
950
951 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
952 switch (ctl->id) {
953 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 954 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
955 : (0x7f - (value & 0x7f));
1da177e4
LT		 956 break;
957 case V4L2_CID_AUDIO_VOLUME:
958 ctl->value = 0x3f - (value & 0x3f);
959 break;
960 default:
961 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
962 break;
963 }
6457af5f
IP		 964 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
965 ctl->id, c->v.name, ctl->value, c->reg,
966 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 967 return 0;
968}
54da49f5 969EXPORT_SYMBOL(cx88_get_control);
1da177e4 970
54da49f5 971int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 972{
1da177e4 973 struct cx88_ctrl *c = NULL;
70f00044 974 u32 value,mask;
1da177e4 975 int i;
8d87cb9f 976
70f00044
MCC		 977 for (i = 0; i < CX8800_CTLS; i++) {
978 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 979 c = &cx8800_ctls[i];
70f00044
MCC		 980 }
981 }
8d87cb9f 982 if (unlikely(NULL == c))
1da177e4
LT		 983 return -EINVAL;
984
985 if (ctl->value < c->v.minimum)
e52e98a7 986 ctl->value = c->v.minimum;
1da177e4 987 if (ctl->value > c->v.maximum)
e52e98a7 988 ctl->value = c->v.maximum;
70f00044 989 mask=c->mask;
1da177e4
LT		 990 switch (ctl->id) {
991 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 992 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 993 break;
994 case V4L2_CID_AUDIO_VOLUME:
995 value = 0x3f - (ctl->value & 0x3f);
996 break;
997 case V4L2_CID_SATURATION:
998 /* special v_sat handling */
70f00044
MCC		 999
1000 value = ((ctl->value - c->off) << c->shift) & c->mask;
1001
63ab1bdc 1002 if (core->tvnorm & V4L2_STD_SECAM) {
70f00044
MCC		 1003 /* For SECAM, both U and V sat should be equal */
1004 value=value<<8|value;
1005 } else {
1006 /* Keeps U Saturation proportional to V Sat */
1007 value=(value*0x5a)/0x7f<<8|value;
1008 }
1009 mask=0xffff;
1010 break;
6d04203c
FD		 1011 case V4L2_CID_CHROMA_AGC:
1012 /* Do not allow chroma AGC to be enabled for SECAM */
1013 value = ((ctl->value - c->off) << c->shift) & c->mask;
1014 if (core->tvnorm & V4L2_STD_SECAM && value)
1015 return -EINVAL;
1016 break;
1da177e4
LT		 1017 default:
1018 value = ((ctl->value - c->off) << c->shift) & c->mask;
1019 break;
1020 }
6457af5f
IP		 1021 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
1022 ctl->id, c->v.name, ctl->value, c->reg, value,
1023 mask, c->sreg ? " [shadowed]" : "");
1da177e4 1024 if (c->sreg) {
70f00044 1025 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 1026 } else {
70f00044 1027 cx_andor(c->reg, mask, value);
1da177e4
LT		 1028 }
1029 return 0;
1030}
54da49f5 1031EXPORT_SYMBOL(cx88_set_control);
1da177e4 1032
e52e98a7 1033static void init_controls(struct cx88_core *core)
1da177e4 1034{
70f00044
MCC		 1035 struct v4l2_control ctrl;
1036 int i;
1da177e4 1037
70f00044
MCC		 1038 for (i = 0; i < CX8800_CTLS; i++) {
1039 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 1040 ctrl.value=cx8800_ctls[i].v.default_value;
8d87cb9f 1041
54da49f5 1042 cx88_set_control(core, &ctrl);
70f00044 1043 }
1da177e4
LT		 1044}
1045
1046/* ------------------------------------------------------------------ */
8d87cb9f 1047/* VIDEO IOCTLS */
1da177e4 1048
78b526a4 1049static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1050 struct v4l2_format *f)
1da177e4 1051{
8d87cb9f
MCC		 1052 struct cx8800_fh *fh = priv;
1053
1054 f->fmt.pix.width = fh->width;
1055 f->fmt.pix.height = fh->height;
1056 f->fmt.pix.field = fh->vidq.field;
1057 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1058 f->fmt.pix.bytesperline =
1059 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1060 f->fmt.pix.sizeimage =
1061 f->fmt.pix.height * f->fmt.pix.bytesperline;
1062 return 0;
1da177e4
LT		 1063}
1064
78b526a4 1065static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1066 struct v4l2_format *f)
1da177e4 1067{
8d87cb9f
MCC		 1068 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1069 struct cx8800_fmt *fmt;
1070 enum v4l2_field field;
1071 unsigned int maxw, maxh;
e52e98a7 1072
8d87cb9f
MCC		 1073 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1074 if (NULL == fmt)
1075 return -EINVAL;
1da177e4 1076
8d87cb9f
MCC		 1077 field = f->fmt.pix.field;
1078 maxw = norm_maxw(core->tvnorm);
1079 maxh = norm_maxh(core->tvnorm);
1da177e4 1080
8d87cb9f
MCC		 1081 if (V4L2_FIELD_ANY == field) {
1082 field = (f->fmt.pix.height > maxh/2)
1083 ? V4L2_FIELD_INTERLACED
1084 : V4L2_FIELD_BOTTOM;
1da177e4 1085 }
8d87cb9f
MCC		 1086
1087 switch (field) {
1088 case V4L2_FIELD_TOP:
1089 case V4L2_FIELD_BOTTOM:
1090 maxh = maxh / 2;
1091 break;
1092 case V4L2_FIELD_INTERLACED:
1093 break;
1da177e4
LT		 1094 default:
1095 return -EINVAL;
1096 }
8d87cb9f
MCC		 1097
1098 f->fmt.pix.field = field;
1099 if (f->fmt.pix.height < 32)
1100 f->fmt.pix.height = 32;
1101 if (f->fmt.pix.height > maxh)
1102 f->fmt.pix.height = maxh;
1103 if (f->fmt.pix.width < 48)
1104 f->fmt.pix.width = 48;
1105 if (f->fmt.pix.width > maxw)
1106 f->fmt.pix.width = maxw;
1107 f->fmt.pix.width &= ~0x03;
1108 f->fmt.pix.bytesperline =
1109 (f->fmt.pix.width * fmt->depth) >> 3;
1110 f->fmt.pix.sizeimage =
1111 f->fmt.pix.height * f->fmt.pix.bytesperline;
1112
1113 return 0;
1da177e4
LT		 1114}
1115
78b526a4 1116static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1117 struct v4l2_format *f)
1da177e4 1118{
8d87cb9f 1119 struct cx8800_fh *fh = priv;
78b526a4 1120 int err = vidioc_try_fmt_vid_cap (file,priv,f);
8d87cb9f
MCC		 1121
1122 if (0 != err)
1123 return err;
1124 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1125 fh->width = f->fmt.pix.width;
1126 fh->height = f->fmt.pix.height;
1127 fh->vidq.field = f->fmt.pix.field;
1128 return 0;
1da177e4
LT		 1129}
1130
8d87cb9f
MCC		 1131static int vidioc_querycap (struct file *file, void *priv,
1132 struct v4l2_capability *cap)
1da177e4 1133{
8d87cb9f 1134 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4 1135 struct cx88_core *core = dev->core;
1da177e4 1136
8d87cb9f 1137 strcpy(cap->driver, "cx8800");
6a59d64c 1138 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1139 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1140 cap->version = CX88_VERSION_CODE;
1141 cap->capabilities =
1142 V4L2_CAP_VIDEO_CAPTURE |
1143 V4L2_CAP_READWRITE |
1144 V4L2_CAP_STREAMING |
1145 V4L2_CAP_VBI_CAPTURE;
6a59d64c 1146 if (UNSET != core->board.tuner_type)
8d87cb9f
MCC		 1147 cap->capabilities |= V4L2_CAP_TUNER;
1148 return 0;
1149}
e52e98a7 1150
78b526a4 1151static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
8d87cb9f
MCC		 1152 struct v4l2_fmtdesc *f)
1153{
1154 if (unlikely(f->index >= ARRAY_SIZE(formats)))
1155 return -EINVAL;
1156
1157 strlcpy(f->description,formats[f->index].name,sizeof(f->description));
1158 f->pixelformat = formats[f->index].fourcc;
1159
1160 return 0;
1161}
1da177e4 1162
0dfa9abd 1163#ifdef CONFIG_VIDEO_V4L1_COMPAT
8d87cb9f
MCC		 1164static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf)
1165{
c1accaa2 1166 struct cx8800_fh *fh = priv;
8d87cb9f 1167
c1accaa2 1168 return videobuf_cgmbuf (get_queue(fh), mbuf, 8);
8d87cb9f 1169}
79436633 1170#endif
e52e98a7 1171
8d87cb9f
MCC		 1172static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
1173{
1174 struct cx8800_fh *fh = priv;
1175 return (videobuf_reqbufs(get_queue(fh), p));
1176}
e52e98a7 1177
8d87cb9f
MCC		 1178static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
1179{
1180 struct cx8800_fh *fh = priv;
1181 return (videobuf_querybuf(get_queue(fh), p));
1182}
e52e98a7 1183
8d87cb9f
MCC		 1184static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1185{
1186 struct cx8800_fh *fh = priv;
1187 return (videobuf_qbuf(get_queue(fh), p));
1188}
e52e98a7 1189
8d87cb9f
MCC		 1190static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1191{
1192 struct cx8800_fh *fh = priv;
1193 return (videobuf_dqbuf(get_queue(fh), p,
1194 file->f_flags & O_NONBLOCK));
1195}
e52e98a7 1196
8d87cb9f
MCC		 1197static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
1198{
1199 struct cx8800_fh *fh = priv;
1200 struct cx8800_dev *dev = fh->dev;
1201
1202 if (unlikely(fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE))
1203 return -EINVAL;
1204 if (unlikely(i != fh->type))
1205 return -EINVAL;
1206
1207 if (unlikely(!res_get(dev,fh,get_ressource(fh))))
1208 return -EBUSY;
1209 return videobuf_streamon(get_queue(fh));
1210}
1211
1212static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1213{
1214 struct cx8800_fh *fh = priv;
1215 struct cx8800_dev *dev = fh->dev;
1216 int err, res;
1217
1218 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1219 return -EINVAL;
1220 if (i != fh->type)
1221 return -EINVAL;
1222
1223 res = get_ressource(fh);
1224 err = videobuf_streamoff(get_queue(fh));
1225 if (err < 0)
1226 return err;
1227 res_free(dev,fh,res);
e52e98a7
MCC		 1228 return 0;
1229}
1230
63ab1bdc 1231static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
e52e98a7 1232{
8d87cb9f 1233 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
e52e98a7 1234
8d87cb9f 1235 mutex_lock(&core->lock);
63ab1bdc 1236 cx88_set_tvnorm(core,*tvnorms);
8d87cb9f 1237 mutex_unlock(&core->lock);
63ab1bdc 1238
8d87cb9f
MCC		 1239 return 0;
1240}
1da177e4 1241
8d87cb9f 1242/* only one input in this sample driver */
54da49f5 1243int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
8d87cb9f 1244{
8d87cb9f
MCC		 1245 static const char *iname[] = {
1246 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1247 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1248 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1249 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1250 [ CX88_VMUX_SVIDEO ] = "S-Video",
1251 [ CX88_VMUX_TELEVISION ] = "Television",
1252 [ CX88_VMUX_CABLE ] = "Cable TV",
1253 [ CX88_VMUX_DVB ] = "DVB",
1254 [ CX88_VMUX_DEBUG ] = "for debug only",
1255 };
1256 unsigned int n;
1da177e4 1257
8d87cb9f
MCC		 1258 n = i->index;
1259 if (n >= 4)
1260 return -EINVAL;
6a59d64c 1261 if (0 == INPUT(n).type)
8d87cb9f
MCC		 1262 return -EINVAL;
1263 memset(i,0,sizeof(*i));
1264 i->index = n;
1265 i->type = V4L2_INPUT_TYPE_CAMERA;
6a59d64c
TP		 1266 strcpy(i->name,iname[INPUT(n).type]);
1267 if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
1268 (CX88_VMUX_CABLE == INPUT(n).type))
8d87cb9f 1269 i->type = V4L2_INPUT_TYPE_TUNER;
63ab1bdc 1270 i->std = CX88_NORMS;
8d87cb9f
MCC		 1271 return 0;
1272}
54da49f5
MCC		 1273EXPORT_SYMBOL(cx88_enum_input);
1274
1275static int vidioc_enum_input (struct file *file, void *priv,
1276 struct v4l2_input *i)
1277{
1278 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1279 return cx88_enum_input (core,i);
1280}
1da177e4 1281
8d87cb9f
MCC		 1282static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
1283{
1284 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1285
8d87cb9f
MCC		 1286 *i = core->input;
1287 return 0;
1288}
1da177e4 1289
8d87cb9f
MCC		 1290static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
1291{
1292 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1293
8d87cb9f
MCC		 1294 if (i >= 4)
1295 return -EINVAL;
1da177e4 1296
8d87cb9f
MCC		 1297 mutex_lock(&core->lock);
1298 cx88_newstation(core);
e90311a1 1299 cx88_video_mux(core,i);
8d87cb9f
MCC		 1300 mutex_unlock(&core->lock);
1301 return 0;
1302}
1da177e4 1303
1da177e4 1304
1da177e4 1305
8d87cb9f
MCC		 1306static int vidioc_queryctrl (struct file *file, void *priv,
1307 struct v4l2_queryctrl *qctrl)
1308{
6d04203c
FD		 1309 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1310
8d87cb9f
MCC		 1311 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
1312 if (unlikely(qctrl->id == 0))
1313 return -EINVAL;
6d04203c 1314 return cx8800_ctrl_query(core, qctrl);
8d87cb9f 1315}
1da177e4 1316
54da49f5 1317static int vidioc_g_ctrl (struct file *file, void *priv,
8d87cb9f
MCC		 1318 struct v4l2_control *ctl)
1319{
1320 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
54da49f5
MCC		 1321 return
1322 cx88_get_control(core,ctl);
1323}
1da177e4 1324
54da49f5
MCC		 1325static int vidioc_s_ctrl (struct file *file, void *priv,
1326 struct v4l2_control *ctl)
1327{
1328 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
8d87cb9f 1329 return
54da49f5 1330 cx88_set_control(core,ctl);
8d87cb9f
MCC		 1331}
1332
1333static int vidioc_g_tuner (struct file *file, void *priv,
1334 struct v4l2_tuner *t)
1335{
1336 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1337 u32 reg;
1da177e4 1338
6a59d64c 1339 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f 1340 return -EINVAL;
243d8c0f
MCC		 1341 if (0 != t->index)
1342 return -EINVAL;
a82decf6 1343
8d87cb9f
MCC		 1344 strcpy(t->name, "Television");
1345 t->type = V4L2_TUNER_ANALOG_TV;
1346 t->capability = V4L2_TUNER_CAP_NORM;
1347 t->rangehigh = 0xffffffffUL;
a82decf6 1348
8d87cb9f
MCC		 1349 cx88_get_stereo(core ,t);
1350 reg = cx_read(MO_DEVICE_STATUS);
1351 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1352 return 0;
1353}
41ef7c1e 1354
8d87cb9f
MCC		 1355static int vidioc_s_tuner (struct file *file, void *priv,
1356 struct v4l2_tuner *t)
1357{
1358 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
41ef7c1e 1359
6a59d64c 1360 if (UNSET == core->board.tuner_type)
8d87cb9f
MCC		 1361 return -EINVAL;
1362 if (0 != t->index)
1363 return -EINVAL;
c5287ba1 1364
8d87cb9f
MCC		 1365 cx88_set_stereo(core, t->audmode, 1);
1366 return 0;
1367}
902fc997 1368
8d87cb9f
MCC		 1369static int vidioc_g_frequency (struct file *file, void *priv,
1370 struct v4l2_frequency *f)
1371{
1372 struct cx8800_fh *fh = priv;
1373 struct cx88_core *core = fh->dev->core;
902fc997 1374
6a59d64c 1375 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1376 return -EINVAL;
1377
1378 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1379 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1380 f->frequency = core->freq;
1381
1382 cx88_call_i2c_clients(core,VIDIOC_G_FREQUENCY,f);
1da177e4 1383
1da177e4
LT		 1384 return 0;
1385}
1386
54da49f5 1387int cx88_set_freq (struct cx88_core *core,
8d87cb9f 1388 struct v4l2_frequency *f)
1da177e4 1389{
6a59d64c 1390 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1391 return -EINVAL;
1392 if (unlikely(f->tuner != 0))
1393 return -EINVAL;
54da49f5 1394
8d87cb9f
MCC		 1395 mutex_lock(&core->lock);
1396 core->freq = f->frequency;
1397 cx88_newstation(core);
1398 cx88_call_i2c_clients(core,VIDIOC_S_FREQUENCY,f);
c7b0ac05 1399
8d87cb9f
MCC		 1400 /* When changing channels it is required to reset TVAUDIO */
1401 msleep (10);
1402 cx88_set_tvaudio(core);
c7b0ac05 1403
8d87cb9f 1404 mutex_unlock(&core->lock);
54da49f5 1405
8d87cb9f 1406 return 0;
1da177e4 1407}
54da49f5
MCC		 1408EXPORT_SYMBOL(cx88_set_freq);
1409
1410static int vidioc_s_frequency (struct file *file, void *priv,
1411 struct v4l2_frequency *f)
1412{
1413 struct cx8800_fh *fh = priv;
1414 struct cx88_core *core = fh->dev->core;
1415
1416 if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
1417 return -EINVAL;
1418 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
1419 return -EINVAL;
1420
1421 return
1422 cx88_set_freq (core,f);
1423}
1da177e4 1424
dbbff48f
TP		 1425#ifdef CONFIG_VIDEO_ADV_DEBUG
1426static int vidioc_g_register (struct file *file, void *fh,
1427 struct v4l2_register *reg)
1428{
1429 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1430
f3d092b8 1431 if (!v4l2_chip_match_host(reg->match_type, reg->match_chip))
dbbff48f
TP		 1432 return -EINVAL;
1433 /* cx2388x has a 24-bit register space */
1434 reg->val = cx_read(reg->reg&0xffffff);
1435 return 0;
1436}
1437
1438static int vidioc_s_register (struct file *file, void *fh,
1439 struct v4l2_register *reg)
1440{
1441 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1442
f3d092b8 1443 if (!v4l2_chip_match_host(reg->match_type, reg->match_chip))
dbbff48f 1444 return -EINVAL;
dbbff48f
TP		 1445 cx_write(reg->reg&0xffffff, reg->val);
1446 return 0;
1447}
1448#endif
8d87cb9f
MCC		 1449
1450/* ----------------------------------------------------------- */
1451/* RADIO ESPECIFIC IOCTLS */
1da177e4
LT		 1452/* ----------------------------------------------------------- */
1453
8d87cb9f
MCC		 1454static int radio_querycap (struct file *file, void *priv,
1455 struct v4l2_capability *cap)
1da177e4 1456{
8d87cb9f 1457 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4
LT		 1458 struct cx88_core *core = dev->core;
1459
8d87cb9f 1460 strcpy(cap->driver, "cx8800");
6a59d64c 1461 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1462 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1463 cap->version = CX88_VERSION_CODE;
1464 cap->capabilities = V4L2_CAP_TUNER;
1465 return 0;
1466}
1da177e4 1467
8d87cb9f
MCC		 1468static int radio_g_tuner (struct file *file, void *priv,
1469 struct v4l2_tuner *t)
1470{
1471 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1472
8d87cb9f
MCC		 1473 if (unlikely(t->index > 0))
1474 return -EINVAL;
1da177e4 1475
8d87cb9f
MCC		 1476 strcpy(t->name, "Radio");
1477 t->type = V4L2_TUNER_RADIO;
1da177e4 1478
8d87cb9f
MCC		 1479 cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t);
1480 return 0;
1481}
1da177e4 1482
8d87cb9f
MCC		 1483static int radio_enum_input (struct file *file, void *priv,
1484 struct v4l2_input *i)
1485{
1486 if (i->index != 0)
1487 return -EINVAL;
1488 strcpy(i->name,"Radio");
1489 i->type = V4L2_INPUT_TYPE_TUNER;
a82decf6 1490
8d87cb9f
MCC		 1491 return 0;
1492}
a82decf6 1493
8d87cb9f
MCC		 1494static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
1495{
1496 if (unlikely(a->index))
1497 return -EINVAL;
a82decf6 1498
8d87cb9f
MCC		 1499 memset(a,0,sizeof(*a));
1500 strcpy(a->name,"Radio");
1501 return 0;
1502}
a82decf6 1503
8d87cb9f 1504/* FIXME: Should add a standard for radio */
a82decf6 1505
8d87cb9f
MCC		 1506static int radio_s_tuner (struct file *file, void *priv,
1507 struct v4l2_tuner *t)
1508{
1509 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
a82decf6 1510
8d87cb9f
MCC		 1511 if (0 != t->index)
1512 return -EINVAL;
1da177e4 1513
8d87cb9f 1514 cx88_call_i2c_clients(core,VIDIOC_S_TUNER,t);
1da177e4 1515
8d87cb9f
MCC		 1516 return 0;
1517}
1da177e4 1518
8d87cb9f
MCC		 1519static int radio_s_audio (struct file *file, void *fh,
1520 struct v4l2_audio *a)
1521{
1522 return 0;
1523}
1da177e4 1524
8d87cb9f
MCC		 1525static int radio_s_input (struct file *file, void *fh, unsigned int i)
1526{
1da177e4 1527 return 0;
8d87cb9f 1528}
1da177e4 1529
8d87cb9f
MCC		 1530static int radio_queryctrl (struct file *file, void *priv,
1531 struct v4l2_queryctrl *c)
1da177e4 1532{
8d87cb9f
MCC		 1533 int i;
1534
1535 if (c->id < V4L2_CID_BASE ||
1536 c->id >= V4L2_CID_LASTP1)
1537 return -EINVAL;
1538 if (c->id == V4L2_CID_AUDIO_MUTE) {
1539 for (i = 0; i < CX8800_CTLS; i++)
1540 if (cx8800_ctls[i].v.id == c->id)
1541 break;
1542 *c = cx8800_ctls[i].v;
1543 } else
1544 *c = no_ctl;
1545 return 0;
1546}
1da177e4
LT		 1547
1548/* ----------------------------------------------------------- */
1549
1550static void cx8800_vid_timeout(unsigned long data)
1551{
1552 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1553 struct cx88_core *core = dev->core;
1554 struct cx88_dmaqueue *q = &dev->vidq;
1555 struct cx88_buffer *buf;
1556 unsigned long flags;
1557
e52e98a7 1558 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1559
1560 cx_clear(MO_VID_DMACNTRL, 0x11);
1561 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1562
1563 spin_lock_irqsave(&dev->slock,flags);
1564 while (!list_empty(&q->active)) {
1565 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1566 list_del(&buf->vb.queue);
0fc0686e 1567 buf->vb.state = VIDEOBUF_ERROR;
1da177e4
LT		 1568 wake_up(&buf->vb.done);
1569 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1570 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1571 }
1572 restart_video_queue(dev,q);
1573 spin_unlock_irqrestore(&dev->slock,flags);
1574}
1575
41ef7c1e
MCC		 1576static char *cx88_vid_irqs[32] = {
1577 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1578 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1579 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1580 "y_sync", "u_sync", "v_sync", "vbi_sync",
1581 "opc_err", "par_err", "rip_err", "pci_abort",
1582};
1583
1da177e4
LT		 1584static void cx8800_vid_irq(struct cx8800_dev *dev)
1585{
1586 struct cx88_core *core = dev->core;
1587 u32 status, mask, count;
1588
1589 status = cx_read(MO_VID_INTSTAT);
1590 mask = cx_read(MO_VID_INTMSK);
1591 if (0 == (status & mask))
1592 return;
1593 cx_write(MO_VID_INTSTAT, status);
1594 if (irq_debug || (status & mask & ~0xff))
1595 cx88_print_irqbits(core->name, "irq vid",
66623a04
MCC		 1596 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1597 status, mask);
1da177e4
LT		 1598
1599 /* risc op code error */
1600 if (status & (1 << 16)) {
1601 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1602 cx_clear(MO_VID_DMACNTRL, 0x11);
1603 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1604 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1605 }
1606
1607 /* risc1 y */
1608 if (status & 0x01) {
1609 spin_lock(&dev->slock);
1610 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1611 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1612 spin_unlock(&dev->slock);
1613 }
1614
1615 /* risc1 vbi */
1616 if (status & 0x08) {
1617 spin_lock(&dev->slock);
1618 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1619 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1620 spin_unlock(&dev->slock);
1621 }
1622
1623 /* risc2 y */
1624 if (status & 0x10) {
1625 dprintk(2,"stopper video\n");
1626 spin_lock(&dev->slock);
1627 restart_video_queue(dev,&dev->vidq);
1628 spin_unlock(&dev->slock);
1629 }
1630
1631 /* risc2 vbi */
1632 if (status & 0x80) {
1633 dprintk(2,"stopper vbi\n");
1634 spin_lock(&dev->slock);
1635 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1636 spin_unlock(&dev->slock);
1637 }
1638}
1639
7d12e780 1640static irqreturn_t cx8800_irq(int irq, void *dev_id)
1da177e4
LT		 1641{
1642 struct cx8800_dev *dev = dev_id;
1643 struct cx88_core *core = dev->core;
1644 u32 status;
1645 int loop, handled = 0;
1646
1647 for (loop = 0; loop < 10; loop++) {
8ddac9ee
TP		 1648 status = cx_read(MO_PCI_INTSTAT) &
1649 (core->pci_irqmask | PCI_INT_VIDINT);
1da177e4
LT		 1650 if (0 == status)
1651 goto out;
1652 cx_write(MO_PCI_INTSTAT, status);
1653 handled = 1;
1654
1655 if (status & core->pci_irqmask)
1656 cx88_core_irq(core,status);
8ddac9ee 1657 if (status & PCI_INT_VIDINT)
1da177e4
LT		 1658 cx8800_vid_irq(dev);
1659 };
1660 if (10 == loop) {
1661 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1662 core->name);
1663 cx_write(MO_PCI_INTMSK,0);
1664 }
1665
1666 out:
1667 return IRQ_RETVAL(handled);
1668}
1669
1670/* ----------------------------------------------------------- */
1671/* exported stuff */
1672
fa027c2a 1673static const struct file_operations video_fops =
1da177e4
LT		 1674{
1675 .owner = THIS_MODULE,
1676 .open = video_open,
1677 .release = video_release,
1678 .read = video_read,
1679 .poll = video_poll,
1680 .mmap = video_mmap,
8d87cb9f 1681 .ioctl = video_ioctl2,
0d0fbf81 1682 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1683 .llseek = no_llseek,
1684};
1685
a399810c 1686static const struct v4l2_ioctl_ops video_ioctl_ops = {
8d87cb9f 1687 .vidioc_querycap = vidioc_querycap,
78b526a4
HV		 1688 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1689 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1690 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1691 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1692 .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
1693 .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
1694 .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
8d87cb9f
MCC		 1695 .vidioc_reqbufs = vidioc_reqbufs,
1696 .vidioc_querybuf = vidioc_querybuf,
1697 .vidioc_qbuf = vidioc_qbuf,
1698 .vidioc_dqbuf = vidioc_dqbuf,
1699 .vidioc_s_std = vidioc_s_std,
1700 .vidioc_enum_input = vidioc_enum_input,
1701 .vidioc_g_input = vidioc_g_input,
1702 .vidioc_s_input = vidioc_s_input,
1703 .vidioc_queryctrl = vidioc_queryctrl,
1704 .vidioc_g_ctrl = vidioc_g_ctrl,
1705 .vidioc_s_ctrl = vidioc_s_ctrl,
1706 .vidioc_streamon = vidioc_streamon,
1707 .vidioc_streamoff = vidioc_streamoff,
1708#ifdef CONFIG_VIDEO_V4L1_COMPAT
1709 .vidiocgmbuf = vidiocgmbuf,
1710#endif
1711 .vidioc_g_tuner = vidioc_g_tuner,
1712 .vidioc_s_tuner = vidioc_s_tuner,
1713 .vidioc_g_frequency = vidioc_g_frequency,
1714 .vidioc_s_frequency = vidioc_s_frequency,
dbbff48f
TP		 1715#ifdef CONFIG_VIDEO_ADV_DEBUG
1716 .vidioc_g_register = vidioc_g_register,
1717 .vidioc_s_register = vidioc_s_register,
1718#endif
a399810c
HV		 1719};
1720
1721static struct video_device cx8800_vbi_template;
1722
1723static struct video_device cx8800_video_template = {
1724 .name = "cx8800-video",
1725 .type = VID_TYPE_CAPTURE|VID_TYPE_TUNER|VID_TYPE_SCALES,
1726 .fops = &video_fops,
1727 .minor = -1,
1728 .ioctl_ops = &video_ioctl_ops,
63ab1bdc 1729 .tvnorms = CX88_NORMS,
dbbff48f 1730 .current_norm = V4L2_STD_NTSC_M,
1da177e4
LT		 1731};
1732
fa027c2a 1733static const struct file_operations radio_fops =
1da177e4
LT		 1734{
1735 .owner = THIS_MODULE,
1736 .open = video_open,
1737 .release = video_release,
8d87cb9f 1738 .ioctl = video_ioctl2,
0d0fbf81 1739 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1740 .llseek = no_llseek,
1741};
1742
a399810c 1743static const struct v4l2_ioctl_ops radio_ioctl_ops = {
8d87cb9f
MCC		 1744 .vidioc_querycap = radio_querycap,
1745 .vidioc_g_tuner = radio_g_tuner,
1746 .vidioc_enum_input = radio_enum_input,
1747 .vidioc_g_audio = radio_g_audio,
1748 .vidioc_s_tuner = radio_s_tuner,
1749 .vidioc_s_audio = radio_s_audio,
1750 .vidioc_s_input = radio_s_input,
1751 .vidioc_queryctrl = radio_queryctrl,
1752 .vidioc_g_ctrl = vidioc_g_ctrl,
1753 .vidioc_s_ctrl = vidioc_s_ctrl,
1754 .vidioc_g_frequency = vidioc_g_frequency,
1755 .vidioc_s_frequency = vidioc_s_frequency,
a75d2048
TP		 1756#ifdef CONFIG_VIDEO_ADV_DEBUG
1757 .vidioc_g_register = vidioc_g_register,
1758 .vidioc_s_register = vidioc_s_register,
1759#endif
1da177e4
LT		 1760};
1761
a399810c
HV		 1762static struct video_device cx8800_radio_template = {
1763 .name = "cx8800-radio",
1764 .type = VID_TYPE_TUNER,
1765 .fops = &radio_fops,
1766 .minor = -1,
1767 .ioctl_ops = &radio_ioctl_ops,
1768};
1769
1da177e4
LT		 1770/* ----------------------------------------------------------- */
1771
1772static void cx8800_unregister_video(struct cx8800_dev *dev)
1773{
1774 if (dev->radio_dev) {
1775 if (-1 != dev->radio_dev->minor)
1776 video_unregister_device(dev->radio_dev);
1777 else
1778 video_device_release(dev->radio_dev);
1779 dev->radio_dev = NULL;
1780 }
1781 if (dev->vbi_dev) {
1782 if (-1 != dev->vbi_dev->minor)
1783 video_unregister_device(dev->vbi_dev);
1784 else
1785 video_device_release(dev->vbi_dev);
1786 dev->vbi_dev = NULL;
1787 }
1788 if (dev->video_dev) {
1789 if (-1 != dev->video_dev->minor)
1790 video_unregister_device(dev->video_dev);
1791 else
1792 video_device_release(dev->video_dev);
1793 dev->video_dev = NULL;
1794 }
1795}
1796
1797static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1798 const struct pci_device_id *pci_id)
1799{
1800 struct cx8800_dev *dev;
1801 struct cx88_core *core;
8d87cb9f 1802
1da177e4
LT		 1803 int err;
1804
7408187d 1805 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1806 if (NULL == dev)
1807 return -ENOMEM;
1da177e4
LT		 1808
1809 /* pci init */
1810 dev->pci = pci_dev;
1811 if (pci_enable_device(pci_dev)) {
1812 err = -EIO;
1813 goto fail_free;
1814 }
1815 core = cx88_core_get(dev->pci);
1816 if (NULL == core) {
1817 err = -EINVAL;
1818 goto fail_free;
1819 }
1820 dev->core = core;
1821
1822 /* print pci info */
1823 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1824 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1825 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
228aef63 1826 "latency: %d, mmio: 0x%llx\n", core->name,
1da177e4 1827 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
228aef63 1828 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1da177e4
LT		 1829
1830 pci_set_master(pci_dev);
aaa40cb8 1831 if (!pci_dma_supported(pci_dev,DMA_32BIT_MASK)) {
1da177e4
LT		 1832 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1833 err = -EIO;
1834 goto fail_core;
1835 }
1836
8d87cb9f
MCC		 1837 /* Initialize VBI template */
1838 memcpy( &cx8800_vbi_template, &cx8800_video_template,
1839 sizeof(cx8800_vbi_template) );
1840 strcpy(cx8800_vbi_template.name,"cx8800-vbi");
1841 cx8800_vbi_template.type = VID_TYPE_TELETEXT|VID_TYPE_TUNER;
1842
1da177e4 1843 /* initialize driver struct */
1da177e4 1844 spin_lock_init(&dev->slock);
63ab1bdc 1845 core->tvnorm = cx8800_video_template.current_norm;
1da177e4
LT		 1846
1847 /* init video dma queues */
1848 INIT_LIST_HEAD(&dev->vidq.active);
1849 INIT_LIST_HEAD(&dev->vidq.queued);
1850 dev->vidq.timeout.function = cx8800_vid_timeout;
1851 dev->vidq.timeout.data = (unsigned long)dev;
1852 init_timer(&dev->vidq.timeout);
1853 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1854 MO_VID_DMACNTRL,0x11,0x00);
1855
1856 /* init vbi dma queues */
1857 INIT_LIST_HEAD(&dev->vbiq.active);
1858 INIT_LIST_HEAD(&dev->vbiq.queued);
1859 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1860 dev->vbiq.timeout.data = (unsigned long)dev;
1861 init_timer(&dev->vbiq.timeout);
1862 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1863 MO_VID_DMACNTRL,0x88,0x00);
1864
1865 /* get irq */
1866 err = request_irq(pci_dev->irq, cx8800_irq,
8076fe32 1867 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1da177e4 1868 if (err < 0) {
5772f813 1869 printk(KERN_ERR "%s/0: can't get IRQ %d\n",
1da177e4
LT		 1870 core->name,pci_dev->irq);
1871 goto fail_core;
1872 }
1873 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1874
1875 /* load and configure helper modules */
e52e98a7 1876
38f9d308 1877 if (core->board.audio_chip == V4L2_IDENT_WM8775)
3057906d
ST		 1878 request_module("wm8775");
1879
6fcecce7
MK		 1880 switch (core->boardnr) {
1881 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
3c66e4e1 1882 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
6fcecce7 1883 request_module("rtc-isl1208");
8efd2e28
MK		 1884 /* break intentionally omitted */
1885 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1886 request_module("ir-kbd-i2c");
6fcecce7
MK		 1887 }
1888
1da177e4
LT		 1889 /* register v4l devices */
1890 dev->video_dev = cx88_vdev_init(core,dev->pci,
1891 &cx8800_video_template,"video");
1892 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1893 video_nr[core->nr]);
1894 if (err < 0) {
5772f813 1895 printk(KERN_ERR "%s/0: can't register video device\n",
1da177e4
LT		 1896 core->name);
1897 goto fail_unreg;
1898 }
1899 printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n",
1900 core->name,dev->video_dev->minor & 0x1f);
1901
1902 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
1903 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1904 vbi_nr[core->nr]);
1905 if (err < 0) {
5772f813 1906 printk(KERN_ERR "%s/0: can't register vbi device\n",
1da177e4
LT		 1907 core->name);
1908 goto fail_unreg;
1909 }
1910 printk(KERN_INFO "%s/0: registered device vbi%d\n",
1911 core->name,dev->vbi_dev->minor & 0x1f);
1912
6a59d64c 1913 if (core->board.radio.type == CX88_RADIO) {
1da177e4
LT		 1914 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1915 &cx8800_radio_template,"radio");
1916 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1917 radio_nr[core->nr]);
1918 if (err < 0) {
5772f813 1919 printk(KERN_ERR "%s/0: can't register radio device\n",
1da177e4
LT		 1920 core->name);
1921 goto fail_unreg;
1922 }
1923 printk(KERN_INFO "%s/0: registered device radio%d\n",
1924 core->name,dev->radio_dev->minor & 0x1f);
1925 }
1926
1927 /* everything worked */
1928 list_add_tail(&dev->devlist,&cx8800_devlist);
1929 pci_set_drvdata(pci_dev,dev);
1930
1931 /* initial device configuration */
3593cab5 1932 mutex_lock(&core->lock);
63ab1bdc 1933 cx88_set_tvnorm(core,core->tvnorm);
70f00044 1934 init_controls(core);
e90311a1 1935 cx88_video_mux(core,0);
3593cab5 1936 mutex_unlock(&core->lock);
1da177e4
LT		 1937
1938 /* start tvaudio thread */
6a59d64c 1939 if (core->board.tuner_type != TUNER_ABSENT) {
1da177e4 1940 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
32b78de7
CG		 1941 if (IS_ERR(core->kthread)) {
1942 err = PTR_ERR(core->kthread);
5772f813
TP		 1943 printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
1944 core->name, err);
32b78de7
CG		 1945 }
1946 }
1da177e4
LT		 1947 return 0;
1948
1949fail_unreg:
1950 cx8800_unregister_video(dev);
1951 free_irq(pci_dev->irq, dev);
1952fail_core:
1953 cx88_core_put(core,dev->pci);
1954fail_free:
1955 kfree(dev);
1956 return err;
1957}
1958
1959static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
1960{
4ac97914 1961 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 1962 struct cx88_core *core = dev->core;
1da177e4
LT		 1963
1964 /* stop thread */
e52e98a7
MCC		 1965 if (core->kthread) {
1966 kthread_stop(core->kthread);
1967 core->kthread = NULL;
1da177e4
LT		 1968 }
1969
b12203d2
MB		 1970 if (core->ir)
1971 cx88_ir_stop(core, core->ir);
1972
e52e98a7 1973 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 1974 pci_disable_device(pci_dev);
1975
1976 /* unregister stuff */
1977
1978 free_irq(pci_dev->irq, dev);
1979 cx8800_unregister_video(dev);
1980 pci_set_drvdata(pci_dev, NULL);
1981
1982 /* free memory */
1983 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
1984 list_del(&dev->devlist);
e52e98a7 1985 cx88_core_put(core,dev->pci);
1da177e4
LT		 1986 kfree(dev);
1987}
1988
17bc98a4 1989#ifdef CONFIG_PM
1da177e4
LT		 1990static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1991{
b45009b0 1992 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 1993 struct cx88_core *core = dev->core;
1994
1995 /* stop video+vbi capture */
1996 spin_lock(&dev->slock);
1997 if (!list_empty(&dev->vidq.active)) {
5772f813 1998 printk("%s/0: suspend video\n", core->name);
1da177e4
LT		 1999 stop_video_dma(dev);
2000 del_timer(&dev->vidq.timeout);
2001 }
2002 if (!list_empty(&dev->vbiq.active)) {
5772f813 2003 printk("%s/0: suspend vbi\n", core->name);
1da177e4
LT		 2004 cx8800_stop_vbi_dma(dev);
2005 del_timer(&dev->vbiq.timeout);
2006 }
2007 spin_unlock(&dev->slock);
2008
13595a51
MCC		 2009 if (core->ir)
2010 cx88_ir_stop(core, core->ir);
1da177e4 2011 /* FIXME -- shutdown device */
e52e98a7 2012 cx88_shutdown(core);
1da177e4
LT		 2013
2014 pci_save_state(pci_dev);
2015 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
2016 pci_disable_device(pci_dev);
2017 dev->state.disabled = 1;
2018 }
2019 return 0;
2020}
2021
2022static int cx8800_resume(struct pci_dev *pci_dev)
2023{
b45009b0 2024 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 2025 struct cx88_core *core = dev->core;
08adb9e2 2026 int err;
1da177e4
LT		 2027
2028 if (dev->state.disabled) {
08adb9e2
MCC		 2029 err=pci_enable_device(pci_dev);
2030 if (err) {
5772f813
TP		 2031 printk(KERN_ERR "%s/0: can't enable device\n",
2032 core->name);
08adb9e2
MCC		 2033 return err;
2034 }
2035
1da177e4
LT		 2036 dev->state.disabled = 0;
2037 }
08adb9e2
MCC		 2038 err= pci_set_power_state(pci_dev, PCI_D0);
2039 if (err) {
5772f813 2040 printk(KERN_ERR "%s/0: can't set power state\n", core->name);
08adb9e2
MCC		 2041 pci_disable_device(pci_dev);
2042 dev->state.disabled = 1;
2043
2044 return err;
2045 }
1da177e4
LT		 2046 pci_restore_state(pci_dev);
2047
1da177e4 2048 /* FIXME: re-initialize hardware */
e52e98a7 2049 cx88_reset(core);
13595a51
MCC		 2050 if (core->ir)
2051 cx88_ir_start(core, core->ir);
2052
2053 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1da177e4
LT		 2054
2055 /* restart video+vbi capture */
2056 spin_lock(&dev->slock);
2057 if (!list_empty(&dev->vidq.active)) {
5772f813 2058 printk("%s/0: resume video\n", core->name);
1da177e4
LT		 2059 restart_video_queue(dev,&dev->vidq);
2060 }
2061 if (!list_empty(&dev->vbiq.active)) {
5772f813 2062 printk("%s/0: resume vbi\n", core->name);
1da177e4
LT		 2063 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2064 }
2065 spin_unlock(&dev->slock);
2066
2067 return 0;
2068}
17bc98a4 2069#endif
1da177e4
LT		 2070
2071/* ----------------------------------------------------------- */
2072
408b664a 2073static struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2074 {
2075 .vendor = 0x14f1,
2076 .device = 0x8800,
b45009b0
MCC		 2077 .subvendor = PCI_ANY_ID,
2078 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2079 },{
2080 /* --- end of list --- */
2081 }
2082};
2083MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2084
2085static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2086 .name = "cx8800",
2087 .id_table = cx8800_pci_tbl,
2088 .probe = cx8800_initdev,
2089 .remove = __devexit_p(cx8800_finidev),
17bc98a4 2090#ifdef CONFIG_PM
1da177e4
LT		 2091 .suspend = cx8800_suspend,
2092 .resume = cx8800_resume,
17bc98a4 2093#endif
1da177e4
LT		 2094};
2095
2096static int cx8800_init(void)
2097{
5772f813 2098 printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n",
1da177e4
LT		 2099 (CX88_VERSION_CODE >> 16) & 0xff,
2100 (CX88_VERSION_CODE >> 8) & 0xff,
2101 CX88_VERSION_CODE & 0xff);
2102#ifdef SNAPSHOT
2103 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2104 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2105#endif
2106 return pci_register_driver(&cx8800_pci_driver);
2107}
2108
2109static void cx8800_fini(void)
2110{
2111 pci_unregister_driver(&cx8800_pci_driver);
2112}
2113
2114module_init(cx8800_init);
2115module_exit(cx8800_fini);
2116
2117/* ----------------------------------------------------------- */
2118/*
2119 * Local variables:
2120 * c-basic-offset: 8
2121 * End:
b45009b0 2122 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2123 */
kernel source for telekom puls (alcatel/mediatek)