Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * device driver for Conexant 2388x based TV cards | |
4 | * video4linux video interface | |
5 | * | |
6 | * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
7 | * | |
8d87cb9f MCC |
8 | * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org> |
9 | * - Multituner support | |
10 | * - video_ioctl2 conversion | |
11 | * - PAL/M fixes | |
12 | * | |
1da177e4 LT |
13 | * This program is free software; you can redistribute it and/or modify |
14 | * it under the terms of the GNU General Public License as published by | |
15 | * the Free Software Foundation; either version 2 of the License, or | |
16 | * (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
26 | */ | |
27 | ||
28 | #include <linux/init.h> | |
29 | #include <linux/list.h> | |
30 | #include <linux/module.h> | |
1da177e4 LT |
31 | #include <linux/kmod.h> |
32 | #include <linux/kernel.h> | |
33 | #include <linux/slab.h> | |
34 | #include <linux/interrupt.h> | |
c24228da | 35 | #include <linux/dma-mapping.h> |
1da177e4 LT |
36 | #include <linux/delay.h> |
37 | #include <linux/kthread.h> | |
38 | #include <asm/div64.h> | |
39 | ||
40 | #include "cx88.h" | |
5e453dc7 | 41 | #include <media/v4l2-common.h> |
1da177e4 | 42 | |
cd41e28e | 43 | #ifdef CONFIG_VIDEO_V4L1_COMPAT |
79436633 MCC |
44 | /* Include V4L1 specific functions. Should be removed soon */ |
45 | #include <linux/videodev.h> | |
cd41e28e | 46 | #endif |
79436633 | 47 | |
1da177e4 LT |
48 | MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards"); |
49 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | |
50 | MODULE_LICENSE("GPL"); | |
51 | ||
52 | /* ------------------------------------------------------------------ */ | |
53 | ||
54 | static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | |
55 | static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | |
56 | static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | |
57 | ||
58 | module_param_array(video_nr, int, NULL, 0444); | |
59 | module_param_array(vbi_nr, int, NULL, 0444); | |
60 | module_param_array(radio_nr, int, NULL, 0444); | |
61 | ||
62 | MODULE_PARM_DESC(video_nr,"video device numbers"); | |
63 | MODULE_PARM_DESC(vbi_nr,"vbi device numbers"); | |
64 | MODULE_PARM_DESC(radio_nr,"radio device numbers"); | |
65 | ||
66 | static unsigned int video_debug = 0; | |
67 | module_param(video_debug,int,0644); | |
68 | MODULE_PARM_DESC(video_debug,"enable debug messages [video]"); | |
69 | ||
70 | static unsigned int irq_debug = 0; | |
71 | module_param(irq_debug,int,0644); | |
72 | MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]"); | |
73 | ||
74 | static unsigned int vid_limit = 16; | |
75 | module_param(vid_limit,int,0644); | |
76 | MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes"); | |
77 | ||
78 | #define dprintk(level,fmt, arg...) if (video_debug >= level) \ | |
e52e98a7 | 79 | printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg) |
1da177e4 LT |
80 | |
81 | /* ------------------------------------------------------------------ */ | |
82 | ||
83 | static LIST_HEAD(cx8800_devlist); | |
84 | ||
85 | /* ------------------------------------------------------------------- */ | |
86 | /* static data */ | |
87 | ||
1da177e4 LT |
88 | static struct cx8800_fmt formats[] = { |
89 | { | |
90 | .name = "8 bpp, gray", | |
91 | .fourcc = V4L2_PIX_FMT_GREY, | |
92 | .cxformat = ColorFormatY8, | |
93 | .depth = 8, | |
94 | .flags = FORMAT_FLAGS_PACKED, | |
95 | },{ | |
96 | .name = "15 bpp RGB, le", | |
97 | .fourcc = V4L2_PIX_FMT_RGB555, | |
98 | .cxformat = ColorFormatRGB15, | |
99 | .depth = 16, | |
100 | .flags = FORMAT_FLAGS_PACKED, | |
101 | },{ | |
102 | .name = "15 bpp RGB, be", | |
103 | .fourcc = V4L2_PIX_FMT_RGB555X, | |
104 | .cxformat = ColorFormatRGB15 | ColorFormatBSWAP, | |
105 | .depth = 16, | |
106 | .flags = FORMAT_FLAGS_PACKED, | |
107 | },{ | |
108 | .name = "16 bpp RGB, le", | |
109 | .fourcc = V4L2_PIX_FMT_RGB565, | |
110 | .cxformat = ColorFormatRGB16, | |
111 | .depth = 16, | |
112 | .flags = FORMAT_FLAGS_PACKED, | |
113 | },{ | |
114 | .name = "16 bpp RGB, be", | |
115 | .fourcc = V4L2_PIX_FMT_RGB565X, | |
116 | .cxformat = ColorFormatRGB16 | ColorFormatBSWAP, | |
117 | .depth = 16, | |
118 | .flags = FORMAT_FLAGS_PACKED, | |
119 | },{ | |
120 | .name = "24 bpp RGB, le", | |
121 | .fourcc = V4L2_PIX_FMT_BGR24, | |
122 | .cxformat = ColorFormatRGB24, | |
123 | .depth = 24, | |
124 | .flags = FORMAT_FLAGS_PACKED, | |
125 | },{ | |
126 | .name = "32 bpp RGB, le", | |
127 | .fourcc = V4L2_PIX_FMT_BGR32, | |
128 | .cxformat = ColorFormatRGB32, | |
129 | .depth = 32, | |
130 | .flags = FORMAT_FLAGS_PACKED, | |
131 | },{ | |
132 | .name = "32 bpp RGB, be", | |
133 | .fourcc = V4L2_PIX_FMT_RGB32, | |
134 | .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP, | |
135 | .depth = 32, | |
136 | .flags = FORMAT_FLAGS_PACKED, | |
137 | },{ | |
138 | .name = "4:2:2, packed, YUYV", | |
139 | .fourcc = V4L2_PIX_FMT_YUYV, | |
140 | .cxformat = ColorFormatYUY2, | |
141 | .depth = 16, | |
142 | .flags = FORMAT_FLAGS_PACKED, | |
143 | },{ | |
144 | .name = "4:2:2, packed, UYVY", | |
145 | .fourcc = V4L2_PIX_FMT_UYVY, | |
146 | .cxformat = ColorFormatYUY2 | ColorFormatBSWAP, | |
147 | .depth = 16, | |
148 | .flags = FORMAT_FLAGS_PACKED, | |
149 | }, | |
150 | }; | |
151 | ||
152 | static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc) | |
153 | { | |
154 | unsigned int i; | |
155 | ||
156 | for (i = 0; i < ARRAY_SIZE(formats); i++) | |
157 | if (formats[i].fourcc == fourcc) | |
158 | return formats+i; | |
159 | return NULL; | |
160 | } | |
161 | ||
162 | /* ------------------------------------------------------------------- */ | |
163 | ||
164 | static const struct v4l2_queryctrl no_ctl = { | |
165 | .name = "42", | |
166 | .flags = V4L2_CTRL_FLAG_DISABLED, | |
167 | }; | |
168 | ||
169 | static struct cx88_ctrl cx8800_ctls[] = { | |
170 | /* --- video --- */ | |
171 | { | |
172 | .v = { | |
173 | .id = V4L2_CID_BRIGHTNESS, | |
174 | .name = "Brightness", | |
175 | .minimum = 0x00, | |
176 | .maximum = 0xff, | |
177 | .step = 1, | |
9f9c907f | 178 | .default_value = 0x7f, |
1da177e4 LT |
179 | .type = V4L2_CTRL_TYPE_INTEGER, |
180 | }, | |
181 | .off = 128, | |
182 | .reg = MO_CONTR_BRIGHT, | |
183 | .mask = 0x00ff, | |
184 | .shift = 0, | |
185 | },{ | |
186 | .v = { | |
187 | .id = V4L2_CID_CONTRAST, | |
188 | .name = "Contrast", | |
189 | .minimum = 0, | |
190 | .maximum = 0xff, | |
191 | .step = 1, | |
70f00044 | 192 | .default_value = 0x3f, |
1da177e4 LT |
193 | .type = V4L2_CTRL_TYPE_INTEGER, |
194 | }, | |
41ef7c1e | 195 | .off = 0, |
1da177e4 LT |
196 | .reg = MO_CONTR_BRIGHT, |
197 | .mask = 0xff00, | |
198 | .shift = 8, | |
199 | },{ | |
200 | .v = { | |
201 | .id = V4L2_CID_HUE, | |
202 | .name = "Hue", | |
203 | .minimum = 0, | |
204 | .maximum = 0xff, | |
205 | .step = 1, | |
9f9c907f | 206 | .default_value = 0x7f, |
1da177e4 LT |
207 | .type = V4L2_CTRL_TYPE_INTEGER, |
208 | }, | |
9ac4c158 | 209 | .off = 128, |
1da177e4 LT |
210 | .reg = MO_HUE, |
211 | .mask = 0x00ff, | |
212 | .shift = 0, | |
213 | },{ | |
214 | /* strictly, this only describes only U saturation. | |
215 | * V saturation is handled specially through code. | |
216 | */ | |
217 | .v = { | |
218 | .id = V4L2_CID_SATURATION, | |
219 | .name = "Saturation", | |
220 | .minimum = 0, | |
221 | .maximum = 0xff, | |
222 | .step = 1, | |
70f00044 | 223 | .default_value = 0x7f, |
1da177e4 LT |
224 | .type = V4L2_CTRL_TYPE_INTEGER, |
225 | }, | |
226 | .off = 0, | |
227 | .reg = MO_UV_SATURATION, | |
228 | .mask = 0x00ff, | |
229 | .shift = 0, | |
230 | },{ | |
231 | /* --- audio --- */ | |
232 | .v = { | |
233 | .id = V4L2_CID_AUDIO_MUTE, | |
234 | .name = "Mute", | |
235 | .minimum = 0, | |
236 | .maximum = 1, | |
70f00044 | 237 | .default_value = 1, |
1da177e4 LT |
238 | .type = V4L2_CTRL_TYPE_BOOLEAN, |
239 | }, | |
240 | .reg = AUD_VOL_CTL, | |
241 | .sreg = SHADOW_AUD_VOL_CTL, | |
242 | .mask = (1 << 6), | |
243 | .shift = 6, | |
244 | },{ | |
245 | .v = { | |
246 | .id = V4L2_CID_AUDIO_VOLUME, | |
247 | .name = "Volume", | |
248 | .minimum = 0, | |
249 | .maximum = 0x3f, | |
250 | .step = 1, | |
9f9c907f | 251 | .default_value = 0x3f, |
1da177e4 LT |
252 | .type = V4L2_CTRL_TYPE_INTEGER, |
253 | }, | |
254 | .reg = AUD_VOL_CTL, | |
255 | .sreg = SHADOW_AUD_VOL_CTL, | |
256 | .mask = 0x3f, | |
257 | .shift = 0, | |
258 | },{ | |
259 | .v = { | |
260 | .id = V4L2_CID_AUDIO_BALANCE, | |
261 | .name = "Balance", | |
262 | .minimum = 0, | |
263 | .maximum = 0x7f, | |
264 | .step = 1, | |
265 | .default_value = 0x40, | |
266 | .type = V4L2_CTRL_TYPE_INTEGER, | |
267 | }, | |
268 | .reg = AUD_BAL_CTL, | |
269 | .sreg = SHADOW_AUD_BAL_CTL, | |
270 | .mask = 0x7f, | |
271 | .shift = 0, | |
272 | } | |
273 | }; | |
408b664a | 274 | static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls); |
1da177e4 | 275 | |
38a2713a MK |
276 | const u32 cx88_user_ctrls[] = { |
277 | V4L2_CID_USER_CLASS, | |
278 | V4L2_CID_BRIGHTNESS, | |
279 | V4L2_CID_CONTRAST, | |
280 | V4L2_CID_SATURATION, | |
281 | V4L2_CID_HUE, | |
282 | V4L2_CID_AUDIO_VOLUME, | |
283 | V4L2_CID_AUDIO_BALANCE, | |
284 | V4L2_CID_AUDIO_MUTE, | |
285 | 0 | |
286 | }; | |
287 | EXPORT_SYMBOL(cx88_user_ctrls); | |
288 | ||
289 | static const u32 *ctrl_classes[] = { | |
290 | cx88_user_ctrls, | |
291 | NULL | |
292 | }; | |
293 | ||
294 | int cx8800_ctrl_query(struct v4l2_queryctrl *qctrl) | |
295 | { | |
296 | int i; | |
297 | ||
298 | if (qctrl->id < V4L2_CID_BASE || | |
299 | qctrl->id >= V4L2_CID_LASTP1) | |
300 | return -EINVAL; | |
301 | for (i = 0; i < CX8800_CTLS; i++) | |
302 | if (cx8800_ctls[i].v.id == qctrl->id) | |
303 | break; | |
304 | if (i == CX8800_CTLS) { | |
305 | *qctrl = no_ctl; | |
306 | return 0; | |
307 | } | |
308 | *qctrl = cx8800_ctls[i].v; | |
309 | return 0; | |
310 | } | |
311 | EXPORT_SYMBOL(cx8800_ctrl_query); | |
312 | ||
1da177e4 LT |
313 | /* ------------------------------------------------------------------- */ |
314 | /* resource management */ | |
315 | ||
316 | static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit) | |
317 | { | |
e52e98a7 | 318 | struct cx88_core *core = dev->core; |
1da177e4 LT |
319 | if (fh->resources & bit) |
320 | /* have it already allocated */ | |
321 | return 1; | |
322 | ||
323 | /* is it free? */ | |
3593cab5 | 324 | mutex_lock(&core->lock); |
1da177e4 LT |
325 | if (dev->resources & bit) { |
326 | /* no, someone else uses it */ | |
3593cab5 | 327 | mutex_unlock(&core->lock); |
1da177e4 LT |
328 | return 0; |
329 | } | |
330 | /* it's free, grab it */ | |
331 | fh->resources |= bit; | |
332 | dev->resources |= bit; | |
333 | dprintk(1,"res: get %d\n",bit); | |
3593cab5 | 334 | mutex_unlock(&core->lock); |
1da177e4 LT |
335 | return 1; |
336 | } | |
337 | ||
338 | static | |
339 | int res_check(struct cx8800_fh *fh, unsigned int bit) | |
340 | { | |
341 | return (fh->resources & bit); | |
342 | } | |
343 | ||
344 | static | |
345 | int res_locked(struct cx8800_dev *dev, unsigned int bit) | |
346 | { | |
347 | return (dev->resources & bit); | |
348 | } | |
349 | ||
350 | static | |
351 | void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits) | |
352 | { | |
e52e98a7 | 353 | struct cx88_core *core = dev->core; |
ae24601b | 354 | BUG_ON((fh->resources & bits) != bits); |
1da177e4 | 355 | |
3593cab5 | 356 | mutex_lock(&core->lock); |
1da177e4 LT |
357 | fh->resources &= ~bits; |
358 | dev->resources &= ~bits; | |
359 | dprintk(1,"res: put %d\n",bits); | |
3593cab5 | 360 | mutex_unlock(&core->lock); |
1da177e4 LT |
361 | } |
362 | ||
363 | /* ------------------------------------------------------------------ */ | |
364 | ||
e90311a1 | 365 | int cx88_video_mux(struct cx88_core *core, unsigned int input) |
1da177e4 | 366 | { |
e52e98a7 | 367 | /* struct cx88_core *core = dev->core; */ |
1da177e4 LT |
368 | |
369 | dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n", | |
6a59d64c TP |
370 | input, INPUT(input).vmux, |
371 | INPUT(input).gpio0,INPUT(input).gpio1, | |
372 | INPUT(input).gpio2,INPUT(input).gpio3); | |
e52e98a7 | 373 | core->input = input; |
6a59d64c TP |
374 | cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14); |
375 | cx_write(MO_GP3_IO, INPUT(input).gpio3); | |
376 | cx_write(MO_GP0_IO, INPUT(input).gpio0); | |
377 | cx_write(MO_GP1_IO, INPUT(input).gpio1); | |
378 | cx_write(MO_GP2_IO, INPUT(input).gpio2); | |
1da177e4 | 379 | |
6a59d64c | 380 | switch (INPUT(input).type) { |
1da177e4 LT |
381 | case CX88_VMUX_SVIDEO: |
382 | cx_set(MO_AFECFG_IO, 0x00000001); | |
383 | cx_set(MO_INPUT_FORMAT, 0x00010010); | |
384 | cx_set(MO_FILTER_EVEN, 0x00002020); | |
385 | cx_set(MO_FILTER_ODD, 0x00002020); | |
386 | break; | |
387 | default: | |
388 | cx_clear(MO_AFECFG_IO, 0x00000001); | |
389 | cx_clear(MO_INPUT_FORMAT, 0x00010010); | |
390 | cx_clear(MO_FILTER_EVEN, 0x00002020); | |
391 | cx_clear(MO_FILTER_ODD, 0x00002020); | |
392 | break; | |
393 | } | |
f24546a9 | 394 | |
6a59d64c | 395 | if (core->board.mpeg & CX88_MPEG_BLACKBIRD) { |
f24546a9 | 396 | /* sets sound input from external adc */ |
6a59d64c | 397 | if (INPUT(input).extadc) |
f24546a9 MK |
398 | cx_set(AUD_CTL, EN_I2SIN_ENABLE); |
399 | else | |
400 | cx_clear(AUD_CTL, EN_I2SIN_ENABLE); | |
401 | } | |
1da177e4 LT |
402 | return 0; |
403 | } | |
e90311a1 | 404 | EXPORT_SYMBOL(cx88_video_mux); |
1da177e4 LT |
405 | |
406 | /* ------------------------------------------------------------------ */ | |
407 | ||
408 | static int start_video_dma(struct cx8800_dev *dev, | |
409 | struct cx88_dmaqueue *q, | |
410 | struct cx88_buffer *buf) | |
411 | { | |
412 | struct cx88_core *core = dev->core; | |
413 | ||
414 | /* setup fifo + format */ | |
e52e98a7 | 415 | cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21], |
1da177e4 | 416 | buf->bpl, buf->risc.dma); |
e52e98a7 | 417 | cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field); |
1da177e4 LT |
418 | cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma); |
419 | ||
420 | /* reset counter */ | |
421 | cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET); | |
422 | q->count = 1; | |
423 | ||
424 | /* enable irqs */ | |
8ddac9ee | 425 | cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT); |
e52e98a7 MCC |
426 | |
427 | /* Enables corresponding bits at PCI_INT_STAT: | |
428 | bits 0 to 4: video, audio, transport stream, VIP, Host | |
429 | bit 7: timer | |
430 | bits 8 and 9: DMA complete for: SRC, DST | |
431 | bits 10 and 11: BERR signal asserted for RISC: RD, WR | |
432 | bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB | |
433 | */ | |
1da177e4 LT |
434 | cx_set(MO_VID_INTMSK, 0x0f0011); |
435 | ||
436 | /* enable capture */ | |
437 | cx_set(VID_CAPTURE_CONTROL,0x06); | |
438 | ||
439 | /* start dma */ | |
440 | cx_set(MO_DEV_CNTRL2, (1<<5)); | |
e52e98a7 | 441 | cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */ |
1da177e4 LT |
442 | |
443 | return 0; | |
444 | } | |
445 | ||
17bc98a4 | 446 | #ifdef CONFIG_PM |
1da177e4 LT |
447 | static int stop_video_dma(struct cx8800_dev *dev) |
448 | { | |
449 | struct cx88_core *core = dev->core; | |
450 | ||
451 | /* stop dma */ | |
452 | cx_clear(MO_VID_DMACNTRL, 0x11); | |
453 | ||
454 | /* disable capture */ | |
455 | cx_clear(VID_CAPTURE_CONTROL,0x06); | |
456 | ||
457 | /* disable irqs */ | |
8ddac9ee | 458 | cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT); |
1da177e4 LT |
459 | cx_clear(MO_VID_INTMSK, 0x0f0011); |
460 | return 0; | |
461 | } | |
17bc98a4 | 462 | #endif |
1da177e4 LT |
463 | |
464 | static int restart_video_queue(struct cx8800_dev *dev, | |
465 | struct cx88_dmaqueue *q) | |
466 | { | |
e52e98a7 | 467 | struct cx88_core *core = dev->core; |
1da177e4 | 468 | struct cx88_buffer *buf, *prev; |
1da177e4 LT |
469 | |
470 | if (!list_empty(&q->active)) { | |
4ac97914 | 471 | buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); |
1da177e4 LT |
472 | dprintk(2,"restart_queue [%p/%d]: restart dma\n", |
473 | buf, buf->vb.i); | |
474 | start_video_dma(dev, q, buf); | |
8bb629e2 TP |
475 | list_for_each_entry(buf, &q->active, vb.queue) |
476 | buf->count = q->count++; | |
1da177e4 LT |
477 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); |
478 | return 0; | |
479 | } | |
480 | ||
481 | prev = NULL; | |
482 | for (;;) { | |
483 | if (list_empty(&q->queued)) | |
484 | return 0; | |
4ac97914 | 485 | buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue); |
1da177e4 | 486 | if (NULL == prev) { |
179e0917 | 487 | list_move_tail(&buf->vb.queue, &q->active); |
1da177e4 LT |
488 | start_video_dma(dev, q, buf); |
489 | buf->vb.state = STATE_ACTIVE; | |
490 | buf->count = q->count++; | |
491 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); | |
492 | dprintk(2,"[%p/%d] restart_queue - first active\n", | |
493 | buf,buf->vb.i); | |
494 | ||
495 | } else if (prev->vb.width == buf->vb.width && | |
496 | prev->vb.height == buf->vb.height && | |
497 | prev->fmt == buf->fmt) { | |
179e0917 | 498 | list_move_tail(&buf->vb.queue, &q->active); |
1da177e4 LT |
499 | buf->vb.state = STATE_ACTIVE; |
500 | buf->count = q->count++; | |
501 | prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); | |
502 | dprintk(2,"[%p/%d] restart_queue - move to active\n", | |
503 | buf,buf->vb.i); | |
504 | } else { | |
505 | return 0; | |
506 | } | |
507 | prev = buf; | |
508 | } | |
509 | } | |
510 | ||
511 | /* ------------------------------------------------------------------ */ | |
512 | ||
513 | static int | |
514 | buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size) | |
515 | { | |
516 | struct cx8800_fh *fh = q->priv_data; | |
517 | ||
518 | *size = fh->fmt->depth*fh->width*fh->height >> 3; | |
519 | if (0 == *count) | |
520 | *count = 32; | |
521 | while (*size * *count > vid_limit * 1024 * 1024) | |
522 | (*count)--; | |
523 | return 0; | |
524 | } | |
525 | ||
526 | static int | |
527 | buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb, | |
528 | enum v4l2_field field) | |
529 | { | |
530 | struct cx8800_fh *fh = q->priv_data; | |
531 | struct cx8800_dev *dev = fh->dev; | |
e52e98a7 | 532 | struct cx88_core *core = dev->core; |
1da177e4 | 533 | struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); |
c1accaa2 | 534 | struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb); |
1da177e4 LT |
535 | int rc, init_buffer = 0; |
536 | ||
537 | BUG_ON(NULL == fh->fmt); | |
e52e98a7 MCC |
538 | if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) || |
539 | fh->height < 32 || fh->height > norm_maxh(core->tvnorm)) | |
1da177e4 LT |
540 | return -EINVAL; |
541 | buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3; | |
542 | if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size) | |
543 | return -EINVAL; | |
544 | ||
545 | if (buf->fmt != fh->fmt || | |
546 | buf->vb.width != fh->width || | |
547 | buf->vb.height != fh->height || | |
548 | buf->vb.field != field) { | |
549 | buf->fmt = fh->fmt; | |
550 | buf->vb.width = fh->width; | |
551 | buf->vb.height = fh->height; | |
552 | buf->vb.field = field; | |
553 | init_buffer = 1; | |
554 | } | |
555 | ||
556 | if (STATE_NEEDS_INIT == buf->vb.state) { | |
557 | init_buffer = 1; | |
c7b0ac05 | 558 | if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL))) |
1da177e4 LT |
559 | goto fail; |
560 | } | |
561 | ||
562 | if (init_buffer) { | |
563 | buf->bpl = buf->vb.width * buf->fmt->depth >> 3; | |
564 | switch (buf->vb.field) { | |
565 | case V4L2_FIELD_TOP: | |
566 | cx88_risc_buffer(dev->pci, &buf->risc, | |
c1accaa2 | 567 | dma->sglist, 0, UNSET, |
1da177e4 LT |
568 | buf->bpl, 0, buf->vb.height); |
569 | break; | |
570 | case V4L2_FIELD_BOTTOM: | |
571 | cx88_risc_buffer(dev->pci, &buf->risc, | |
c1accaa2 | 572 | dma->sglist, UNSET, 0, |
1da177e4 LT |
573 | buf->bpl, 0, buf->vb.height); |
574 | break; | |
575 | case V4L2_FIELD_INTERLACED: | |
576 | cx88_risc_buffer(dev->pci, &buf->risc, | |
c1accaa2 | 577 | dma->sglist, 0, buf->bpl, |
1da177e4 LT |
578 | buf->bpl, buf->bpl, |
579 | buf->vb.height >> 1); | |
580 | break; | |
581 | case V4L2_FIELD_SEQ_TB: | |
582 | cx88_risc_buffer(dev->pci, &buf->risc, | |
c1accaa2 | 583 | dma->sglist, |
1da177e4 LT |
584 | 0, buf->bpl * (buf->vb.height >> 1), |
585 | buf->bpl, 0, | |
586 | buf->vb.height >> 1); | |
587 | break; | |
588 | case V4L2_FIELD_SEQ_BT: | |
589 | cx88_risc_buffer(dev->pci, &buf->risc, | |
c1accaa2 | 590 | dma->sglist, |
1da177e4 LT |
591 | buf->bpl * (buf->vb.height >> 1), 0, |
592 | buf->bpl, 0, | |
593 | buf->vb.height >> 1); | |
594 | break; | |
595 | default: | |
596 | BUG(); | |
597 | } | |
598 | } | |
599 | dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n", | |
600 | buf, buf->vb.i, | |
601 | fh->width, fh->height, fh->fmt->depth, fh->fmt->name, | |
602 | (unsigned long)buf->risc.dma); | |
603 | ||
604 | buf->vb.state = STATE_PREPARED; | |
605 | return 0; | |
606 | ||
607 | fail: | |
c7b0ac05 | 608 | cx88_free_buffer(q,buf); |
1da177e4 LT |
609 | return rc; |
610 | } | |
611 | ||
612 | static void | |
613 | buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb) | |
614 | { | |
615 | struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); | |
616 | struct cx88_buffer *prev; | |
617 | struct cx8800_fh *fh = vq->priv_data; | |
618 | struct cx8800_dev *dev = fh->dev; | |
e52e98a7 | 619 | struct cx88_core *core = dev->core; |
1da177e4 LT |
620 | struct cx88_dmaqueue *q = &dev->vidq; |
621 | ||
622 | /* add jump to stopper */ | |
623 | buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC); | |
624 | buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma); | |
625 | ||
626 | if (!list_empty(&q->queued)) { | |
627 | list_add_tail(&buf->vb.queue,&q->queued); | |
628 | buf->vb.state = STATE_QUEUED; | |
629 | dprintk(2,"[%p/%d] buffer_queue - append to queued\n", | |
630 | buf, buf->vb.i); | |
631 | ||
632 | } else if (list_empty(&q->active)) { | |
633 | list_add_tail(&buf->vb.queue,&q->active); | |
634 | start_video_dma(dev, q, buf); | |
635 | buf->vb.state = STATE_ACTIVE; | |
636 | buf->count = q->count++; | |
637 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); | |
638 | dprintk(2,"[%p/%d] buffer_queue - first active\n", | |
639 | buf, buf->vb.i); | |
640 | ||
641 | } else { | |
642 | prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue); | |
643 | if (prev->vb.width == buf->vb.width && | |
644 | prev->vb.height == buf->vb.height && | |
645 | prev->fmt == buf->fmt) { | |
646 | list_add_tail(&buf->vb.queue,&q->active); | |
647 | buf->vb.state = STATE_ACTIVE; | |
648 | buf->count = q->count++; | |
649 | prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); | |
650 | dprintk(2,"[%p/%d] buffer_queue - append to active\n", | |
651 | buf, buf->vb.i); | |
652 | ||
653 | } else { | |
654 | list_add_tail(&buf->vb.queue,&q->queued); | |
655 | buf->vb.state = STATE_QUEUED; | |
656 | dprintk(2,"[%p/%d] buffer_queue - first queued\n", | |
657 | buf, buf->vb.i); | |
658 | } | |
659 | } | |
660 | } | |
661 | ||
662 | static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
663 | { | |
664 | struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); | |
1da177e4 | 665 | |
c7b0ac05 | 666 | cx88_free_buffer(q,buf); |
1da177e4 LT |
667 | } |
668 | ||
408b664a | 669 | static struct videobuf_queue_ops cx8800_video_qops = { |
1da177e4 LT |
670 | .buf_setup = buffer_setup, |
671 | .buf_prepare = buffer_prepare, | |
672 | .buf_queue = buffer_queue, | |
673 | .buf_release = buffer_release, | |
674 | }; | |
675 | ||
676 | /* ------------------------------------------------------------------ */ | |
677 | ||
1da177e4 LT |
678 | |
679 | /* ------------------------------------------------------------------ */ | |
680 | ||
681 | static struct videobuf_queue* get_queue(struct cx8800_fh *fh) | |
682 | { | |
683 | switch (fh->type) { | |
684 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
685 | return &fh->vidq; | |
686 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
687 | return &fh->vbiq; | |
688 | default: | |
689 | BUG(); | |
690 | return NULL; | |
691 | } | |
692 | } | |
693 | ||
694 | static int get_ressource(struct cx8800_fh *fh) | |
695 | { | |
696 | switch (fh->type) { | |
697 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
698 | return RESOURCE_VIDEO; | |
699 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
700 | return RESOURCE_VBI; | |
701 | default: | |
702 | BUG(); | |
703 | return 0; | |
704 | } | |
705 | } | |
706 | ||
707 | static int video_open(struct inode *inode, struct file *file) | |
708 | { | |
709 | int minor = iminor(inode); | |
710 | struct cx8800_dev *h,*dev = NULL; | |
e52e98a7 | 711 | struct cx88_core *core; |
1da177e4 | 712 | struct cx8800_fh *fh; |
1da177e4 LT |
713 | enum v4l2_buf_type type = 0; |
714 | int radio = 0; | |
715 | ||
8bb629e2 | 716 | list_for_each_entry(h, &cx8800_devlist, devlist) { |
1da177e4 LT |
717 | if (h->video_dev->minor == minor) { |
718 | dev = h; | |
719 | type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
720 | } | |
721 | if (h->vbi_dev->minor == minor) { | |
722 | dev = h; | |
723 | type = V4L2_BUF_TYPE_VBI_CAPTURE; | |
724 | } | |
725 | if (h->radio_dev && | |
726 | h->radio_dev->minor == minor) { | |
727 | radio = 1; | |
728 | dev = h; | |
729 | } | |
730 | } | |
731 | if (NULL == dev) | |
732 | return -ENODEV; | |
733 | ||
e52e98a7 MCC |
734 | core = dev->core; |
735 | ||
1da177e4 LT |
736 | dprintk(1,"open minor=%d radio=%d type=%s\n", |
737 | minor,radio,v4l2_type_names[type]); | |
738 | ||
739 | /* allocate + initialize per filehandle data */ | |
7408187d | 740 | fh = kzalloc(sizeof(*fh),GFP_KERNEL); |
1da177e4 LT |
741 | if (NULL == fh) |
742 | return -ENOMEM; | |
1da177e4 LT |
743 | file->private_data = fh; |
744 | fh->dev = dev; | |
745 | fh->radio = radio; | |
746 | fh->type = type; | |
747 | fh->width = 320; | |
748 | fh->height = 240; | |
749 | fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24); | |
750 | ||
c1accaa2 | 751 | videobuf_queue_pci_init(&fh->vidq, &cx8800_video_qops, |
1da177e4 LT |
752 | dev->pci, &dev->slock, |
753 | V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
754 | V4L2_FIELD_INTERLACED, | |
755 | sizeof(struct cx88_buffer), | |
756 | fh); | |
c1accaa2 | 757 | videobuf_queue_pci_init(&fh->vbiq, &cx8800_vbi_qops, |
1da177e4 LT |
758 | dev->pci, &dev->slock, |
759 | V4L2_BUF_TYPE_VBI_CAPTURE, | |
760 | V4L2_FIELD_SEQ_TB, | |
761 | sizeof(struct cx88_buffer), | |
762 | fh); | |
763 | ||
764 | if (fh->radio) { | |
1da177e4 | 765 | dprintk(1,"video_open: setting radio device\n"); |
6a59d64c TP |
766 | cx_write(MO_GP3_IO, core->board.radio.gpio3); |
767 | cx_write(MO_GP0_IO, core->board.radio.gpio0); | |
768 | cx_write(MO_GP1_IO, core->board.radio.gpio1); | |
769 | cx_write(MO_GP2_IO, core->board.radio.gpio2); | |
e52e98a7 | 770 | core->tvaudio = WW_FM; |
1da177e4 LT |
771 | cx88_set_tvaudio(core); |
772 | cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1); | |
e52e98a7 | 773 | cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL); |
1da177e4 LT |
774 | } |
775 | ||
4ac97914 | 776 | return 0; |
1da177e4 LT |
777 | } |
778 | ||
779 | static ssize_t | |
f9e7a020 | 780 | video_read(struct file *file, char __user *data, size_t count, loff_t *ppos) |
1da177e4 LT |
781 | { |
782 | struct cx8800_fh *fh = file->private_data; | |
783 | ||
784 | switch (fh->type) { | |
785 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
786 | if (res_locked(fh->dev,RESOURCE_VIDEO)) | |
787 | return -EBUSY; | |
788 | return videobuf_read_one(&fh->vidq, data, count, ppos, | |
789 | file->f_flags & O_NONBLOCK); | |
790 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
791 | if (!res_get(fh->dev,fh,RESOURCE_VBI)) | |
792 | return -EBUSY; | |
793 | return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1, | |
794 | file->f_flags & O_NONBLOCK); | |
795 | default: | |
796 | BUG(); | |
797 | return 0; | |
798 | } | |
799 | } | |
800 | ||
801 | static unsigned int | |
802 | video_poll(struct file *file, struct poll_table_struct *wait) | |
803 | { | |
804 | struct cx8800_fh *fh = file->private_data; | |
805 | struct cx88_buffer *buf; | |
806 | ||
807 | if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) { | |
808 | if (!res_get(fh->dev,fh,RESOURCE_VBI)) | |
809 | return POLLERR; | |
810 | return videobuf_poll_stream(file, &fh->vbiq, wait); | |
811 | } | |
812 | ||
813 | if (res_check(fh,RESOURCE_VIDEO)) { | |
814 | /* streaming capture */ | |
815 | if (list_empty(&fh->vidq.stream)) | |
816 | return POLLERR; | |
817 | buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream); | |
818 | } else { | |
819 | /* read() capture */ | |
820 | buf = (struct cx88_buffer*)fh->vidq.read_buf; | |
821 | if (NULL == buf) | |
822 | return POLLERR; | |
823 | } | |
824 | poll_wait(file, &buf->vb.done, wait); | |
825 | if (buf->vb.state == STATE_DONE || | |
826 | buf->vb.state == STATE_ERROR) | |
827 | return POLLIN|POLLRDNORM; | |
828 | return 0; | |
829 | } | |
830 | ||
831 | static int video_release(struct inode *inode, struct file *file) | |
832 | { | |
833 | struct cx8800_fh *fh = file->private_data; | |
834 | struct cx8800_dev *dev = fh->dev; | |
835 | ||
836 | /* turn off overlay */ | |
837 | if (res_check(fh, RESOURCE_OVERLAY)) { | |
838 | /* FIXME */ | |
839 | res_free(dev,fh,RESOURCE_OVERLAY); | |
840 | } | |
841 | ||
842 | /* stop video capture */ | |
843 | if (res_check(fh, RESOURCE_VIDEO)) { | |
844 | videobuf_queue_cancel(&fh->vidq); | |
845 | res_free(dev,fh,RESOURCE_VIDEO); | |
846 | } | |
847 | if (fh->vidq.read_buf) { | |
848 | buffer_release(&fh->vidq,fh->vidq.read_buf); | |
849 | kfree(fh->vidq.read_buf); | |
850 | } | |
851 | ||
852 | /* stop vbi capture */ | |
853 | if (res_check(fh, RESOURCE_VBI)) { | |
053fcb60 | 854 | videobuf_stop(&fh->vbiq); |
1da177e4 LT |
855 | res_free(dev,fh,RESOURCE_VBI); |
856 | } | |
857 | ||
858 | videobuf_mmap_free(&fh->vidq); | |
859 | videobuf_mmap_free(&fh->vbiq); | |
860 | file->private_data = NULL; | |
861 | kfree(fh); | |
e52e98a7 MCC |
862 | |
863 | cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL); | |
864 | ||
1da177e4 LT |
865 | return 0; |
866 | } | |
867 | ||
868 | static int | |
869 | video_mmap(struct file *file, struct vm_area_struct * vma) | |
870 | { | |
871 | struct cx8800_fh *fh = file->private_data; | |
872 | ||
873 | return videobuf_mmap_mapper(get_queue(fh), vma); | |
874 | } | |
875 | ||
876 | /* ------------------------------------------------------------------ */ | |
8d87cb9f | 877 | /* VIDEO CTRL IOCTLS */ |
1da177e4 | 878 | |
54da49f5 | 879 | int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl) |
1da177e4 | 880 | { |
8d87cb9f | 881 | struct cx88_ctrl *c = NULL; |
1da177e4 LT |
882 | u32 value; |
883 | int i; | |
884 | ||
885 | for (i = 0; i < CX8800_CTLS; i++) | |
886 | if (cx8800_ctls[i].v.id == ctl->id) | |
887 | c = &cx8800_ctls[i]; | |
8d87cb9f | 888 | if (unlikely(NULL == c)) |
1da177e4 LT |
889 | return -EINVAL; |
890 | ||
891 | value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg); | |
892 | switch (ctl->id) { | |
893 | case V4L2_CID_AUDIO_BALANCE: | |
9f9c907f MR |
894 | ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40) |
895 | : (0x7f - (value & 0x7f)); | |
1da177e4 LT |
896 | break; |
897 | case V4L2_CID_AUDIO_VOLUME: | |
898 | ctl->value = 0x3f - (value & 0x3f); | |
899 | break; | |
900 | default: | |
901 | ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift; | |
902 | break; | |
903 | } | |
6457af5f IP |
904 | dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n", |
905 | ctl->id, c->v.name, ctl->value, c->reg, | |
906 | value,c->mask, c->sreg ? " [shadowed]" : ""); | |
1da177e4 LT |
907 | return 0; |
908 | } | |
54da49f5 | 909 | EXPORT_SYMBOL(cx88_get_control); |
1da177e4 | 910 | |
54da49f5 | 911 | int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl) |
1da177e4 | 912 | { |
1da177e4 | 913 | struct cx88_ctrl *c = NULL; |
70f00044 | 914 | u32 value,mask; |
1da177e4 | 915 | int i; |
8d87cb9f | 916 | |
70f00044 MCC |
917 | for (i = 0; i < CX8800_CTLS; i++) { |
918 | if (cx8800_ctls[i].v.id == ctl->id) { | |
1da177e4 | 919 | c = &cx8800_ctls[i]; |
70f00044 MCC |
920 | } |
921 | } | |
8d87cb9f | 922 | if (unlikely(NULL == c)) |
1da177e4 LT |
923 | return -EINVAL; |
924 | ||
925 | if (ctl->value < c->v.minimum) | |
e52e98a7 | 926 | ctl->value = c->v.minimum; |
1da177e4 | 927 | if (ctl->value > c->v.maximum) |
e52e98a7 | 928 | ctl->value = c->v.maximum; |
70f00044 | 929 | mask=c->mask; |
1da177e4 LT |
930 | switch (ctl->id) { |
931 | case V4L2_CID_AUDIO_BALANCE: | |
9f9c907f | 932 | value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40); |
1da177e4 LT |
933 | break; |
934 | case V4L2_CID_AUDIO_VOLUME: | |
935 | value = 0x3f - (ctl->value & 0x3f); | |
936 | break; | |
937 | case V4L2_CID_SATURATION: | |
938 | /* special v_sat handling */ | |
70f00044 MCC |
939 | |
940 | value = ((ctl->value - c->off) << c->shift) & c->mask; | |
941 | ||
63ab1bdc | 942 | if (core->tvnorm & V4L2_STD_SECAM) { |
70f00044 MCC |
943 | /* For SECAM, both U and V sat should be equal */ |
944 | value=value<<8|value; | |
945 | } else { | |
946 | /* Keeps U Saturation proportional to V Sat */ | |
947 | value=(value*0x5a)/0x7f<<8|value; | |
948 | } | |
949 | mask=0xffff; | |
950 | break; | |
1da177e4 LT |
951 | default: |
952 | value = ((ctl->value - c->off) << c->shift) & c->mask; | |
953 | break; | |
954 | } | |
6457af5f IP |
955 | dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n", |
956 | ctl->id, c->v.name, ctl->value, c->reg, value, | |
957 | mask, c->sreg ? " [shadowed]" : ""); | |
1da177e4 | 958 | if (c->sreg) { |
70f00044 | 959 | cx_sandor(c->sreg, c->reg, mask, value); |
1da177e4 | 960 | } else { |
70f00044 | 961 | cx_andor(c->reg, mask, value); |
1da177e4 LT |
962 | } |
963 | return 0; | |
964 | } | |
54da49f5 | 965 | EXPORT_SYMBOL(cx88_set_control); |
1da177e4 | 966 | |
e52e98a7 | 967 | static void init_controls(struct cx88_core *core) |
1da177e4 | 968 | { |
70f00044 MCC |
969 | struct v4l2_control ctrl; |
970 | int i; | |
1da177e4 | 971 | |
70f00044 MCC |
972 | for (i = 0; i < CX8800_CTLS; i++) { |
973 | ctrl.id=cx8800_ctls[i].v.id; | |
9f9c907f | 974 | ctrl.value=cx8800_ctls[i].v.default_value; |
8d87cb9f | 975 | |
54da49f5 | 976 | cx88_set_control(core, &ctrl); |
70f00044 | 977 | } |
1da177e4 LT |
978 | } |
979 | ||
980 | /* ------------------------------------------------------------------ */ | |
8d87cb9f | 981 | /* VIDEO IOCTLS */ |
1da177e4 | 982 | |
8d87cb9f MCC |
983 | static int vidioc_g_fmt_cap (struct file *file, void *priv, |
984 | struct v4l2_format *f) | |
1da177e4 | 985 | { |
8d87cb9f MCC |
986 | struct cx8800_fh *fh = priv; |
987 | ||
988 | f->fmt.pix.width = fh->width; | |
989 | f->fmt.pix.height = fh->height; | |
990 | f->fmt.pix.field = fh->vidq.field; | |
991 | f->fmt.pix.pixelformat = fh->fmt->fourcc; | |
992 | f->fmt.pix.bytesperline = | |
993 | (f->fmt.pix.width * fh->fmt->depth) >> 3; | |
994 | f->fmt.pix.sizeimage = | |
995 | f->fmt.pix.height * f->fmt.pix.bytesperline; | |
996 | return 0; | |
1da177e4 LT |
997 | } |
998 | ||
8d87cb9f MCC |
999 | static int vidioc_try_fmt_cap (struct file *file, void *priv, |
1000 | struct v4l2_format *f) | |
1da177e4 | 1001 | { |
8d87cb9f MCC |
1002 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; |
1003 | struct cx8800_fmt *fmt; | |
1004 | enum v4l2_field field; | |
1005 | unsigned int maxw, maxh; | |
e52e98a7 | 1006 | |
8d87cb9f MCC |
1007 | fmt = format_by_fourcc(f->fmt.pix.pixelformat); |
1008 | if (NULL == fmt) | |
1009 | return -EINVAL; | |
1da177e4 | 1010 | |
8d87cb9f MCC |
1011 | field = f->fmt.pix.field; |
1012 | maxw = norm_maxw(core->tvnorm); | |
1013 | maxh = norm_maxh(core->tvnorm); | |
1da177e4 | 1014 | |
8d87cb9f MCC |
1015 | if (V4L2_FIELD_ANY == field) { |
1016 | field = (f->fmt.pix.height > maxh/2) | |
1017 | ? V4L2_FIELD_INTERLACED | |
1018 | : V4L2_FIELD_BOTTOM; | |
1da177e4 | 1019 | } |
8d87cb9f MCC |
1020 | |
1021 | switch (field) { | |
1022 | case V4L2_FIELD_TOP: | |
1023 | case V4L2_FIELD_BOTTOM: | |
1024 | maxh = maxh / 2; | |
1025 | break; | |
1026 | case V4L2_FIELD_INTERLACED: | |
1027 | break; | |
1da177e4 LT |
1028 | default: |
1029 | return -EINVAL; | |
1030 | } | |
8d87cb9f MCC |
1031 | |
1032 | f->fmt.pix.field = field; | |
1033 | if (f->fmt.pix.height < 32) | |
1034 | f->fmt.pix.height = 32; | |
1035 | if (f->fmt.pix.height > maxh) | |
1036 | f->fmt.pix.height = maxh; | |
1037 | if (f->fmt.pix.width < 48) | |
1038 | f->fmt.pix.width = 48; | |
1039 | if (f->fmt.pix.width > maxw) | |
1040 | f->fmt.pix.width = maxw; | |
1041 | f->fmt.pix.width &= ~0x03; | |
1042 | f->fmt.pix.bytesperline = | |
1043 | (f->fmt.pix.width * fmt->depth) >> 3; | |
1044 | f->fmt.pix.sizeimage = | |
1045 | f->fmt.pix.height * f->fmt.pix.bytesperline; | |
1046 | ||
1047 | return 0; | |
1da177e4 LT |
1048 | } |
1049 | ||
8d87cb9f MCC |
1050 | static int vidioc_s_fmt_cap (struct file *file, void *priv, |
1051 | struct v4l2_format *f) | |
1da177e4 | 1052 | { |
8d87cb9f MCC |
1053 | struct cx8800_fh *fh = priv; |
1054 | int err = vidioc_try_fmt_cap (file,priv,f); | |
1055 | ||
1056 | if (0 != err) | |
1057 | return err; | |
1058 | fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat); | |
1059 | fh->width = f->fmt.pix.width; | |
1060 | fh->height = f->fmt.pix.height; | |
1061 | fh->vidq.field = f->fmt.pix.field; | |
1062 | return 0; | |
1da177e4 LT |
1063 | } |
1064 | ||
8d87cb9f MCC |
1065 | static int vidioc_querycap (struct file *file, void *priv, |
1066 | struct v4l2_capability *cap) | |
1da177e4 | 1067 | { |
8d87cb9f | 1068 | struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev; |
1da177e4 | 1069 | struct cx88_core *core = dev->core; |
1da177e4 | 1070 | |
8d87cb9f | 1071 | strcpy(cap->driver, "cx8800"); |
6a59d64c | 1072 | strlcpy(cap->card, core->board.name, sizeof(cap->card)); |
8d87cb9f MCC |
1073 | sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci)); |
1074 | cap->version = CX88_VERSION_CODE; | |
1075 | cap->capabilities = | |
1076 | V4L2_CAP_VIDEO_CAPTURE | | |
1077 | V4L2_CAP_READWRITE | | |
1078 | V4L2_CAP_STREAMING | | |
1079 | V4L2_CAP_VBI_CAPTURE; | |
6a59d64c | 1080 | if (UNSET != core->board.tuner_type) |
8d87cb9f MCC |
1081 | cap->capabilities |= V4L2_CAP_TUNER; |
1082 | return 0; | |
1083 | } | |
e52e98a7 | 1084 | |
8d87cb9f MCC |
1085 | static int vidioc_enum_fmt_cap (struct file *file, void *priv, |
1086 | struct v4l2_fmtdesc *f) | |
1087 | { | |
1088 | if (unlikely(f->index >= ARRAY_SIZE(formats))) | |
1089 | return -EINVAL; | |
1090 | ||
1091 | strlcpy(f->description,formats[f->index].name,sizeof(f->description)); | |
1092 | f->pixelformat = formats[f->index].fourcc; | |
1093 | ||
1094 | return 0; | |
1095 | } | |
1da177e4 | 1096 | |
0dfa9abd | 1097 | #ifdef CONFIG_VIDEO_V4L1_COMPAT |
8d87cb9f MCC |
1098 | static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf) |
1099 | { | |
c1accaa2 | 1100 | struct cx8800_fh *fh = priv; |
8d87cb9f | 1101 | |
c1accaa2 | 1102 | return videobuf_cgmbuf (get_queue(fh), mbuf, 8); |
8d87cb9f | 1103 | } |
79436633 | 1104 | #endif |
e52e98a7 | 1105 | |
8d87cb9f MCC |
1106 | static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p) |
1107 | { | |
1108 | struct cx8800_fh *fh = priv; | |
1109 | return (videobuf_reqbufs(get_queue(fh), p)); | |
1110 | } | |
e52e98a7 | 1111 | |
8d87cb9f MCC |
1112 | static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p) |
1113 | { | |
1114 | struct cx8800_fh *fh = priv; | |
1115 | return (videobuf_querybuf(get_queue(fh), p)); | |
1116 | } | |
e52e98a7 | 1117 | |
8d87cb9f MCC |
1118 | static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p) |
1119 | { | |
1120 | struct cx8800_fh *fh = priv; | |
1121 | return (videobuf_qbuf(get_queue(fh), p)); | |
1122 | } | |
e52e98a7 | 1123 | |
8d87cb9f MCC |
1124 | static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p) |
1125 | { | |
1126 | struct cx8800_fh *fh = priv; | |
1127 | return (videobuf_dqbuf(get_queue(fh), p, | |
1128 | file->f_flags & O_NONBLOCK)); | |
1129 | } | |
e52e98a7 | 1130 | |
8d87cb9f MCC |
1131 | static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i) |
1132 | { | |
1133 | struct cx8800_fh *fh = priv; | |
1134 | struct cx8800_dev *dev = fh->dev; | |
1135 | ||
1136 | if (unlikely(fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) | |
1137 | return -EINVAL; | |
1138 | if (unlikely(i != fh->type)) | |
1139 | return -EINVAL; | |
1140 | ||
1141 | if (unlikely(!res_get(dev,fh,get_ressource(fh)))) | |
1142 | return -EBUSY; | |
1143 | return videobuf_streamon(get_queue(fh)); | |
1144 | } | |
1145 | ||
1146 | static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i) | |
1147 | { | |
1148 | struct cx8800_fh *fh = priv; | |
1149 | struct cx8800_dev *dev = fh->dev; | |
1150 | int err, res; | |
1151 | ||
1152 | if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
1153 | return -EINVAL; | |
1154 | if (i != fh->type) | |
1155 | return -EINVAL; | |
1156 | ||
1157 | res = get_ressource(fh); | |
1158 | err = videobuf_streamoff(get_queue(fh)); | |
1159 | if (err < 0) | |
1160 | return err; | |
1161 | res_free(dev,fh,res); | |
e52e98a7 MCC |
1162 | return 0; |
1163 | } | |
1164 | ||
63ab1bdc | 1165 | static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms) |
e52e98a7 | 1166 | { |
8d87cb9f | 1167 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; |
e52e98a7 | 1168 | |
8d87cb9f | 1169 | mutex_lock(&core->lock); |
63ab1bdc | 1170 | cx88_set_tvnorm(core,*tvnorms); |
8d87cb9f | 1171 | mutex_unlock(&core->lock); |
63ab1bdc | 1172 | |
8d87cb9f MCC |
1173 | return 0; |
1174 | } | |
1da177e4 | 1175 | |
8d87cb9f | 1176 | /* only one input in this sample driver */ |
54da49f5 | 1177 | int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i) |
8d87cb9f | 1178 | { |
8d87cb9f MCC |
1179 | static const char *iname[] = { |
1180 | [ CX88_VMUX_COMPOSITE1 ] = "Composite1", | |
1181 | [ CX88_VMUX_COMPOSITE2 ] = "Composite2", | |
1182 | [ CX88_VMUX_COMPOSITE3 ] = "Composite3", | |
1183 | [ CX88_VMUX_COMPOSITE4 ] = "Composite4", | |
1184 | [ CX88_VMUX_SVIDEO ] = "S-Video", | |
1185 | [ CX88_VMUX_TELEVISION ] = "Television", | |
1186 | [ CX88_VMUX_CABLE ] = "Cable TV", | |
1187 | [ CX88_VMUX_DVB ] = "DVB", | |
1188 | [ CX88_VMUX_DEBUG ] = "for debug only", | |
1189 | }; | |
1190 | unsigned int n; | |
1da177e4 | 1191 | |
8d87cb9f MCC |
1192 | n = i->index; |
1193 | if (n >= 4) | |
1194 | return -EINVAL; | |
6a59d64c | 1195 | if (0 == INPUT(n).type) |
8d87cb9f MCC |
1196 | return -EINVAL; |
1197 | memset(i,0,sizeof(*i)); | |
1198 | i->index = n; | |
1199 | i->type = V4L2_INPUT_TYPE_CAMERA; | |
6a59d64c TP |
1200 | strcpy(i->name,iname[INPUT(n).type]); |
1201 | if ((CX88_VMUX_TELEVISION == INPUT(n).type) || | |
1202 | (CX88_VMUX_CABLE == INPUT(n).type)) | |
8d87cb9f | 1203 | i->type = V4L2_INPUT_TYPE_TUNER; |
63ab1bdc | 1204 | i->std = CX88_NORMS; |
8d87cb9f MCC |
1205 | return 0; |
1206 | } | |
54da49f5 MCC |
1207 | EXPORT_SYMBOL(cx88_enum_input); |
1208 | ||
1209 | static int vidioc_enum_input (struct file *file, void *priv, | |
1210 | struct v4l2_input *i) | |
1211 | { | |
1212 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1213 | return cx88_enum_input (core,i); | |
1214 | } | |
1da177e4 | 1215 | |
8d87cb9f MCC |
1216 | static int vidioc_g_input (struct file *file, void *priv, unsigned int *i) |
1217 | { | |
1218 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1da177e4 | 1219 | |
8d87cb9f MCC |
1220 | *i = core->input; |
1221 | return 0; | |
1222 | } | |
1da177e4 | 1223 | |
8d87cb9f MCC |
1224 | static int vidioc_s_input (struct file *file, void *priv, unsigned int i) |
1225 | { | |
1226 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1da177e4 | 1227 | |
8d87cb9f MCC |
1228 | if (i >= 4) |
1229 | return -EINVAL; | |
1da177e4 | 1230 | |
8d87cb9f MCC |
1231 | mutex_lock(&core->lock); |
1232 | cx88_newstation(core); | |
e90311a1 | 1233 | cx88_video_mux(core,i); |
8d87cb9f MCC |
1234 | mutex_unlock(&core->lock); |
1235 | return 0; | |
1236 | } | |
1da177e4 | 1237 | |
1da177e4 | 1238 | |
1da177e4 | 1239 | |
8d87cb9f MCC |
1240 | static int vidioc_queryctrl (struct file *file, void *priv, |
1241 | struct v4l2_queryctrl *qctrl) | |
1242 | { | |
1243 | qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id); | |
1244 | if (unlikely(qctrl->id == 0)) | |
1245 | return -EINVAL; | |
1246 | return cx8800_ctrl_query(qctrl); | |
1247 | } | |
1da177e4 | 1248 | |
54da49f5 | 1249 | static int vidioc_g_ctrl (struct file *file, void *priv, |
8d87cb9f MCC |
1250 | struct v4l2_control *ctl) |
1251 | { | |
1252 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
54da49f5 MCC |
1253 | return |
1254 | cx88_get_control(core,ctl); | |
1255 | } | |
1da177e4 | 1256 | |
54da49f5 MCC |
1257 | static int vidioc_s_ctrl (struct file *file, void *priv, |
1258 | struct v4l2_control *ctl) | |
1259 | { | |
1260 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
8d87cb9f | 1261 | return |
54da49f5 | 1262 | cx88_set_control(core,ctl); |
8d87cb9f MCC |
1263 | } |
1264 | ||
1265 | static int vidioc_g_tuner (struct file *file, void *priv, | |
1266 | struct v4l2_tuner *t) | |
1267 | { | |
1268 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1269 | u32 reg; | |
1da177e4 | 1270 | |
6a59d64c | 1271 | if (unlikely(UNSET == core->board.tuner_type)) |
8d87cb9f | 1272 | return -EINVAL; |
243d8c0f MCC |
1273 | if (0 != t->index) |
1274 | return -EINVAL; | |
a82decf6 | 1275 | |
8d87cb9f MCC |
1276 | strcpy(t->name, "Television"); |
1277 | t->type = V4L2_TUNER_ANALOG_TV; | |
1278 | t->capability = V4L2_TUNER_CAP_NORM; | |
1279 | t->rangehigh = 0xffffffffUL; | |
a82decf6 | 1280 | |
8d87cb9f MCC |
1281 | cx88_get_stereo(core ,t); |
1282 | reg = cx_read(MO_DEVICE_STATUS); | |
1283 | t->signal = (reg & (1<<5)) ? 0xffff : 0x0000; | |
1284 | return 0; | |
1285 | } | |
41ef7c1e | 1286 | |
8d87cb9f MCC |
1287 | static int vidioc_s_tuner (struct file *file, void *priv, |
1288 | struct v4l2_tuner *t) | |
1289 | { | |
1290 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
41ef7c1e | 1291 | |
6a59d64c | 1292 | if (UNSET == core->board.tuner_type) |
8d87cb9f MCC |
1293 | return -EINVAL; |
1294 | if (0 != t->index) | |
1295 | return -EINVAL; | |
c5287ba1 | 1296 | |
8d87cb9f MCC |
1297 | cx88_set_stereo(core, t->audmode, 1); |
1298 | return 0; | |
1299 | } | |
902fc997 | 1300 | |
8d87cb9f MCC |
1301 | static int vidioc_g_frequency (struct file *file, void *priv, |
1302 | struct v4l2_frequency *f) | |
1303 | { | |
1304 | struct cx8800_fh *fh = priv; | |
1305 | struct cx88_core *core = fh->dev->core; | |
902fc997 | 1306 | |
6a59d64c | 1307 | if (unlikely(UNSET == core->board.tuner_type)) |
8d87cb9f MCC |
1308 | return -EINVAL; |
1309 | ||
1310 | /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */ | |
1311 | f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; | |
1312 | f->frequency = core->freq; | |
1313 | ||
1314 | cx88_call_i2c_clients(core,VIDIOC_G_FREQUENCY,f); | |
1da177e4 | 1315 | |
1da177e4 LT |
1316 | return 0; |
1317 | } | |
1318 | ||
54da49f5 | 1319 | int cx88_set_freq (struct cx88_core *core, |
8d87cb9f | 1320 | struct v4l2_frequency *f) |
1da177e4 | 1321 | { |
6a59d64c | 1322 | if (unlikely(UNSET == core->board.tuner_type)) |
8d87cb9f MCC |
1323 | return -EINVAL; |
1324 | if (unlikely(f->tuner != 0)) | |
1325 | return -EINVAL; | |
54da49f5 | 1326 | |
8d87cb9f MCC |
1327 | mutex_lock(&core->lock); |
1328 | core->freq = f->frequency; | |
1329 | cx88_newstation(core); | |
1330 | cx88_call_i2c_clients(core,VIDIOC_S_FREQUENCY,f); | |
c7b0ac05 | 1331 | |
8d87cb9f MCC |
1332 | /* When changing channels it is required to reset TVAUDIO */ |
1333 | msleep (10); | |
1334 | cx88_set_tvaudio(core); | |
c7b0ac05 | 1335 | |
8d87cb9f | 1336 | mutex_unlock(&core->lock); |
54da49f5 | 1337 | |
8d87cb9f | 1338 | return 0; |
1da177e4 | 1339 | } |
54da49f5 MCC |
1340 | EXPORT_SYMBOL(cx88_set_freq); |
1341 | ||
1342 | static int vidioc_s_frequency (struct file *file, void *priv, | |
1343 | struct v4l2_frequency *f) | |
1344 | { | |
1345 | struct cx8800_fh *fh = priv; | |
1346 | struct cx88_core *core = fh->dev->core; | |
1347 | ||
1348 | if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV)) | |
1349 | return -EINVAL; | |
1350 | if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO)) | |
1351 | return -EINVAL; | |
1352 | ||
1353 | return | |
1354 | cx88_set_freq (core,f); | |
1355 | } | |
1da177e4 | 1356 | |
dbbff48f TP |
1357 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1358 | static int vidioc_g_register (struct file *file, void *fh, | |
1359 | struct v4l2_register *reg) | |
1360 | { | |
1361 | struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core; | |
1362 | ||
f3d092b8 | 1363 | if (!v4l2_chip_match_host(reg->match_type, reg->match_chip)) |
dbbff48f TP |
1364 | return -EINVAL; |
1365 | /* cx2388x has a 24-bit register space */ | |
1366 | reg->val = cx_read(reg->reg&0xffffff); | |
1367 | return 0; | |
1368 | } | |
1369 | ||
1370 | static int vidioc_s_register (struct file *file, void *fh, | |
1371 | struct v4l2_register *reg) | |
1372 | { | |
1373 | struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core; | |
1374 | ||
f3d092b8 | 1375 | if (!v4l2_chip_match_host(reg->match_type, reg->match_chip)) |
dbbff48f | 1376 | return -EINVAL; |
dbbff48f TP |
1377 | cx_write(reg->reg&0xffffff, reg->val); |
1378 | return 0; | |
1379 | } | |
1380 | #endif | |
8d87cb9f MCC |
1381 | |
1382 | /* ----------------------------------------------------------- */ | |
1383 | /* RADIO ESPECIFIC IOCTLS */ | |
1da177e4 LT |
1384 | /* ----------------------------------------------------------- */ |
1385 | ||
8d87cb9f MCC |
1386 | static int radio_querycap (struct file *file, void *priv, |
1387 | struct v4l2_capability *cap) | |
1da177e4 | 1388 | { |
8d87cb9f | 1389 | struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev; |
1da177e4 LT |
1390 | struct cx88_core *core = dev->core; |
1391 | ||
8d87cb9f | 1392 | strcpy(cap->driver, "cx8800"); |
6a59d64c | 1393 | strlcpy(cap->card, core->board.name, sizeof(cap->card)); |
8d87cb9f MCC |
1394 | sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci)); |
1395 | cap->version = CX88_VERSION_CODE; | |
1396 | cap->capabilities = V4L2_CAP_TUNER; | |
1397 | return 0; | |
1398 | } | |
1da177e4 | 1399 | |
8d87cb9f MCC |
1400 | static int radio_g_tuner (struct file *file, void *priv, |
1401 | struct v4l2_tuner *t) | |
1402 | { | |
1403 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1da177e4 | 1404 | |
8d87cb9f MCC |
1405 | if (unlikely(t->index > 0)) |
1406 | return -EINVAL; | |
1da177e4 | 1407 | |
8d87cb9f MCC |
1408 | strcpy(t->name, "Radio"); |
1409 | t->type = V4L2_TUNER_RADIO; | |
1da177e4 | 1410 | |
8d87cb9f MCC |
1411 | cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t); |
1412 | return 0; | |
1413 | } | |
1da177e4 | 1414 | |
8d87cb9f MCC |
1415 | static int radio_enum_input (struct file *file, void *priv, |
1416 | struct v4l2_input *i) | |
1417 | { | |
1418 | if (i->index != 0) | |
1419 | return -EINVAL; | |
1420 | strcpy(i->name,"Radio"); | |
1421 | i->type = V4L2_INPUT_TYPE_TUNER; | |
a82decf6 | 1422 | |
8d87cb9f MCC |
1423 | return 0; |
1424 | } | |
a82decf6 | 1425 | |
8d87cb9f MCC |
1426 | static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a) |
1427 | { | |
1428 | if (unlikely(a->index)) | |
1429 | return -EINVAL; | |
a82decf6 | 1430 | |
8d87cb9f MCC |
1431 | memset(a,0,sizeof(*a)); |
1432 | strcpy(a->name,"Radio"); | |
1433 | return 0; | |
1434 | } | |
a82decf6 | 1435 | |
8d87cb9f | 1436 | /* FIXME: Should add a standard for radio */ |
a82decf6 | 1437 | |
8d87cb9f MCC |
1438 | static int radio_s_tuner (struct file *file, void *priv, |
1439 | struct v4l2_tuner *t) | |
1440 | { | |
1441 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
a82decf6 | 1442 | |
8d87cb9f MCC |
1443 | if (0 != t->index) |
1444 | return -EINVAL; | |
1da177e4 | 1445 | |
8d87cb9f | 1446 | cx88_call_i2c_clients(core,VIDIOC_S_TUNER,t); |
1da177e4 | 1447 | |
8d87cb9f MCC |
1448 | return 0; |
1449 | } | |
1da177e4 | 1450 | |
8d87cb9f MCC |
1451 | static int radio_s_audio (struct file *file, void *fh, |
1452 | struct v4l2_audio *a) | |
1453 | { | |
1454 | return 0; | |
1455 | } | |
1da177e4 | 1456 | |
8d87cb9f MCC |
1457 | static int radio_s_input (struct file *file, void *fh, unsigned int i) |
1458 | { | |
1da177e4 | 1459 | return 0; |
8d87cb9f | 1460 | } |
1da177e4 | 1461 | |
8d87cb9f MCC |
1462 | static int radio_queryctrl (struct file *file, void *priv, |
1463 | struct v4l2_queryctrl *c) | |
1da177e4 | 1464 | { |
8d87cb9f MCC |
1465 | int i; |
1466 | ||
1467 | if (c->id < V4L2_CID_BASE || | |
1468 | c->id >= V4L2_CID_LASTP1) | |
1469 | return -EINVAL; | |
1470 | if (c->id == V4L2_CID_AUDIO_MUTE) { | |
1471 | for (i = 0; i < CX8800_CTLS; i++) | |
1472 | if (cx8800_ctls[i].v.id == c->id) | |
1473 | break; | |
1474 | *c = cx8800_ctls[i].v; | |
1475 | } else | |
1476 | *c = no_ctl; | |
1477 | return 0; | |
1478 | } | |
1da177e4 LT |
1479 | |
1480 | /* ----------------------------------------------------------- */ | |
1481 | ||
1482 | static void cx8800_vid_timeout(unsigned long data) | |
1483 | { | |
1484 | struct cx8800_dev *dev = (struct cx8800_dev*)data; | |
1485 | struct cx88_core *core = dev->core; | |
1486 | struct cx88_dmaqueue *q = &dev->vidq; | |
1487 | struct cx88_buffer *buf; | |
1488 | unsigned long flags; | |
1489 | ||
e52e98a7 | 1490 | cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]); |
1da177e4 LT |
1491 | |
1492 | cx_clear(MO_VID_DMACNTRL, 0x11); | |
1493 | cx_clear(VID_CAPTURE_CONTROL, 0x06); | |
1494 | ||
1495 | spin_lock_irqsave(&dev->slock,flags); | |
1496 | while (!list_empty(&q->active)) { | |
1497 | buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); | |
1498 | list_del(&buf->vb.queue); | |
1499 | buf->vb.state = STATE_ERROR; | |
1500 | wake_up(&buf->vb.done); | |
1501 | printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name, | |
1502 | buf, buf->vb.i, (unsigned long)buf->risc.dma); | |
1503 | } | |
1504 | restart_video_queue(dev,q); | |
1505 | spin_unlock_irqrestore(&dev->slock,flags); | |
1506 | } | |
1507 | ||
41ef7c1e MCC |
1508 | static char *cx88_vid_irqs[32] = { |
1509 | "y_risci1", "u_risci1", "v_risci1", "vbi_risc1", | |
1510 | "y_risci2", "u_risci2", "v_risci2", "vbi_risc2", | |
1511 | "y_oflow", "u_oflow", "v_oflow", "vbi_oflow", | |
1512 | "y_sync", "u_sync", "v_sync", "vbi_sync", | |
1513 | "opc_err", "par_err", "rip_err", "pci_abort", | |
1514 | }; | |
1515 | ||
1da177e4 LT |
1516 | static void cx8800_vid_irq(struct cx8800_dev *dev) |
1517 | { | |
1518 | struct cx88_core *core = dev->core; | |
1519 | u32 status, mask, count; | |
1520 | ||
1521 | status = cx_read(MO_VID_INTSTAT); | |
1522 | mask = cx_read(MO_VID_INTMSK); | |
1523 | if (0 == (status & mask)) | |
1524 | return; | |
1525 | cx_write(MO_VID_INTSTAT, status); | |
1526 | if (irq_debug || (status & mask & ~0xff)) | |
1527 | cx88_print_irqbits(core->name, "irq vid", | |
66623a04 MCC |
1528 | cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs), |
1529 | status, mask); | |
1da177e4 LT |
1530 | |
1531 | /* risc op code error */ | |
1532 | if (status & (1 << 16)) { | |
1533 | printk(KERN_WARNING "%s/0: video risc op code error\n",core->name); | |
1534 | cx_clear(MO_VID_DMACNTRL, 0x11); | |
1535 | cx_clear(VID_CAPTURE_CONTROL, 0x06); | |
e52e98a7 | 1536 | cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]); |
1da177e4 LT |
1537 | } |
1538 | ||
1539 | /* risc1 y */ | |
1540 | if (status & 0x01) { | |
1541 | spin_lock(&dev->slock); | |
1542 | count = cx_read(MO_VIDY_GPCNT); | |
e52e98a7 | 1543 | cx88_wakeup(core, &dev->vidq, count); |
1da177e4 LT |
1544 | spin_unlock(&dev->slock); |
1545 | } | |
1546 | ||
1547 | /* risc1 vbi */ | |
1548 | if (status & 0x08) { | |
1549 | spin_lock(&dev->slock); | |
1550 | count = cx_read(MO_VBI_GPCNT); | |
e52e98a7 | 1551 | cx88_wakeup(core, &dev->vbiq, count); |
1da177e4 LT |
1552 | spin_unlock(&dev->slock); |
1553 | } | |
1554 | ||
1555 | /* risc2 y */ | |
1556 | if (status & 0x10) { | |
1557 | dprintk(2,"stopper video\n"); | |
1558 | spin_lock(&dev->slock); | |
1559 | restart_video_queue(dev,&dev->vidq); | |
1560 | spin_unlock(&dev->slock); | |
1561 | } | |
1562 | ||
1563 | /* risc2 vbi */ | |
1564 | if (status & 0x80) { | |
1565 | dprintk(2,"stopper vbi\n"); | |
1566 | spin_lock(&dev->slock); | |
1567 | cx8800_restart_vbi_queue(dev,&dev->vbiq); | |
1568 | spin_unlock(&dev->slock); | |
1569 | } | |
1570 | } | |
1571 | ||
7d12e780 | 1572 | static irqreturn_t cx8800_irq(int irq, void *dev_id) |
1da177e4 LT |
1573 | { |
1574 | struct cx8800_dev *dev = dev_id; | |
1575 | struct cx88_core *core = dev->core; | |
1576 | u32 status; | |
1577 | int loop, handled = 0; | |
1578 | ||
1579 | for (loop = 0; loop < 10; loop++) { | |
8ddac9ee TP |
1580 | status = cx_read(MO_PCI_INTSTAT) & |
1581 | (core->pci_irqmask | PCI_INT_VIDINT); | |
1da177e4 LT |
1582 | if (0 == status) |
1583 | goto out; | |
1584 | cx_write(MO_PCI_INTSTAT, status); | |
1585 | handled = 1; | |
1586 | ||
1587 | if (status & core->pci_irqmask) | |
1588 | cx88_core_irq(core,status); | |
8ddac9ee | 1589 | if (status & PCI_INT_VIDINT) |
1da177e4 LT |
1590 | cx8800_vid_irq(dev); |
1591 | }; | |
1592 | if (10 == loop) { | |
1593 | printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n", | |
1594 | core->name); | |
1595 | cx_write(MO_PCI_INTMSK,0); | |
1596 | } | |
1597 | ||
1598 | out: | |
1599 | return IRQ_RETVAL(handled); | |
1600 | } | |
1601 | ||
1602 | /* ----------------------------------------------------------- */ | |
1603 | /* exported stuff */ | |
1604 | ||
fa027c2a | 1605 | static const struct file_operations video_fops = |
1da177e4 LT |
1606 | { |
1607 | .owner = THIS_MODULE, | |
1608 | .open = video_open, | |
1609 | .release = video_release, | |
1610 | .read = video_read, | |
1611 | .poll = video_poll, | |
1612 | .mmap = video_mmap, | |
8d87cb9f | 1613 | .ioctl = video_ioctl2, |
0d0fbf81 | 1614 | .compat_ioctl = v4l_compat_ioctl32, |
1da177e4 LT |
1615 | .llseek = no_llseek, |
1616 | }; | |
1617 | ||
8d87cb9f | 1618 | static struct video_device cx8800_vbi_template; |
408b664a | 1619 | static struct video_device cx8800_video_template = |
1da177e4 | 1620 | { |
8d87cb9f MCC |
1621 | .name = "cx8800-video", |
1622 | .type = VID_TYPE_CAPTURE|VID_TYPE_TUNER|VID_TYPE_SCALES, | |
1623 | .fops = &video_fops, | |
1624 | .minor = -1, | |
1625 | .vidioc_querycap = vidioc_querycap, | |
1626 | .vidioc_enum_fmt_cap = vidioc_enum_fmt_cap, | |
1627 | .vidioc_g_fmt_cap = vidioc_g_fmt_cap, | |
1628 | .vidioc_try_fmt_cap = vidioc_try_fmt_cap, | |
1629 | .vidioc_s_fmt_cap = vidioc_s_fmt_cap, | |
1630 | .vidioc_g_fmt_vbi = cx8800_vbi_fmt, | |
1631 | .vidioc_try_fmt_vbi = cx8800_vbi_fmt, | |
1632 | .vidioc_s_fmt_vbi = cx8800_vbi_fmt, | |
1633 | .vidioc_reqbufs = vidioc_reqbufs, | |
1634 | .vidioc_querybuf = vidioc_querybuf, | |
1635 | .vidioc_qbuf = vidioc_qbuf, | |
1636 | .vidioc_dqbuf = vidioc_dqbuf, | |
1637 | .vidioc_s_std = vidioc_s_std, | |
1638 | .vidioc_enum_input = vidioc_enum_input, | |
1639 | .vidioc_g_input = vidioc_g_input, | |
1640 | .vidioc_s_input = vidioc_s_input, | |
1641 | .vidioc_queryctrl = vidioc_queryctrl, | |
1642 | .vidioc_g_ctrl = vidioc_g_ctrl, | |
1643 | .vidioc_s_ctrl = vidioc_s_ctrl, | |
1644 | .vidioc_streamon = vidioc_streamon, | |
1645 | .vidioc_streamoff = vidioc_streamoff, | |
1646 | #ifdef CONFIG_VIDEO_V4L1_COMPAT | |
1647 | .vidiocgmbuf = vidiocgmbuf, | |
1648 | #endif | |
1649 | .vidioc_g_tuner = vidioc_g_tuner, | |
1650 | .vidioc_s_tuner = vidioc_s_tuner, | |
1651 | .vidioc_g_frequency = vidioc_g_frequency, | |
1652 | .vidioc_s_frequency = vidioc_s_frequency, | |
dbbff48f TP |
1653 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1654 | .vidioc_g_register = vidioc_g_register, | |
1655 | .vidioc_s_register = vidioc_s_register, | |
1656 | #endif | |
63ab1bdc | 1657 | .tvnorms = CX88_NORMS, |
dbbff48f | 1658 | .current_norm = V4L2_STD_NTSC_M, |
1da177e4 LT |
1659 | }; |
1660 | ||
fa027c2a | 1661 | static const struct file_operations radio_fops = |
1da177e4 LT |
1662 | { |
1663 | .owner = THIS_MODULE, | |
1664 | .open = video_open, | |
1665 | .release = video_release, | |
8d87cb9f | 1666 | .ioctl = video_ioctl2, |
0d0fbf81 | 1667 | .compat_ioctl = v4l_compat_ioctl32, |
1da177e4 LT |
1668 | .llseek = no_llseek, |
1669 | }; | |
1670 | ||
408b664a | 1671 | static struct video_device cx8800_radio_template = |
1da177e4 | 1672 | { |
8d87cb9f MCC |
1673 | .name = "cx8800-radio", |
1674 | .type = VID_TYPE_TUNER, | |
8d87cb9f MCC |
1675 | .fops = &radio_fops, |
1676 | .minor = -1, | |
1677 | .vidioc_querycap = radio_querycap, | |
1678 | .vidioc_g_tuner = radio_g_tuner, | |
1679 | .vidioc_enum_input = radio_enum_input, | |
1680 | .vidioc_g_audio = radio_g_audio, | |
1681 | .vidioc_s_tuner = radio_s_tuner, | |
1682 | .vidioc_s_audio = radio_s_audio, | |
1683 | .vidioc_s_input = radio_s_input, | |
1684 | .vidioc_queryctrl = radio_queryctrl, | |
1685 | .vidioc_g_ctrl = vidioc_g_ctrl, | |
1686 | .vidioc_s_ctrl = vidioc_s_ctrl, | |
1687 | .vidioc_g_frequency = vidioc_g_frequency, | |
1688 | .vidioc_s_frequency = vidioc_s_frequency, | |
a75d2048 TP |
1689 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1690 | .vidioc_g_register = vidioc_g_register, | |
1691 | .vidioc_s_register = vidioc_s_register, | |
1692 | #endif | |
1da177e4 LT |
1693 | }; |
1694 | ||
1695 | /* ----------------------------------------------------------- */ | |
1696 | ||
1697 | static void cx8800_unregister_video(struct cx8800_dev *dev) | |
1698 | { | |
1699 | if (dev->radio_dev) { | |
1700 | if (-1 != dev->radio_dev->minor) | |
1701 | video_unregister_device(dev->radio_dev); | |
1702 | else | |
1703 | video_device_release(dev->radio_dev); | |
1704 | dev->radio_dev = NULL; | |
1705 | } | |
1706 | if (dev->vbi_dev) { | |
1707 | if (-1 != dev->vbi_dev->minor) | |
1708 | video_unregister_device(dev->vbi_dev); | |
1709 | else | |
1710 | video_device_release(dev->vbi_dev); | |
1711 | dev->vbi_dev = NULL; | |
1712 | } | |
1713 | if (dev->video_dev) { | |
1714 | if (-1 != dev->video_dev->minor) | |
1715 | video_unregister_device(dev->video_dev); | |
1716 | else | |
1717 | video_device_release(dev->video_dev); | |
1718 | dev->video_dev = NULL; | |
1719 | } | |
1720 | } | |
1721 | ||
1722 | static int __devinit cx8800_initdev(struct pci_dev *pci_dev, | |
1723 | const struct pci_device_id *pci_id) | |
1724 | { | |
1725 | struct cx8800_dev *dev; | |
1726 | struct cx88_core *core; | |
8d87cb9f | 1727 | |
1da177e4 LT |
1728 | int err; |
1729 | ||
7408187d | 1730 | dev = kzalloc(sizeof(*dev),GFP_KERNEL); |
1da177e4 LT |
1731 | if (NULL == dev) |
1732 | return -ENOMEM; | |
1da177e4 LT |
1733 | |
1734 | /* pci init */ | |
1735 | dev->pci = pci_dev; | |
1736 | if (pci_enable_device(pci_dev)) { | |
1737 | err = -EIO; | |
1738 | goto fail_free; | |
1739 | } | |
1740 | core = cx88_core_get(dev->pci); | |
1741 | if (NULL == core) { | |
1742 | err = -EINVAL; | |
1743 | goto fail_free; | |
1744 | } | |
1745 | dev->core = core; | |
1746 | ||
1747 | /* print pci info */ | |
1748 | pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev); | |
4ac97914 MCC |
1749 | pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat); |
1750 | printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, " | |
228aef63 | 1751 | "latency: %d, mmio: 0x%llx\n", core->name, |
1da177e4 | 1752 | pci_name(pci_dev), dev->pci_rev, pci_dev->irq, |
228aef63 | 1753 | dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0)); |
1da177e4 LT |
1754 | |
1755 | pci_set_master(pci_dev); | |
aaa40cb8 | 1756 | if (!pci_dma_supported(pci_dev,DMA_32BIT_MASK)) { |
1da177e4 LT |
1757 | printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name); |
1758 | err = -EIO; | |
1759 | goto fail_core; | |
1760 | } | |
1761 | ||
8d87cb9f MCC |
1762 | /* Initialize VBI template */ |
1763 | memcpy( &cx8800_vbi_template, &cx8800_video_template, | |
1764 | sizeof(cx8800_vbi_template) ); | |
1765 | strcpy(cx8800_vbi_template.name,"cx8800-vbi"); | |
1766 | cx8800_vbi_template.type = VID_TYPE_TELETEXT|VID_TYPE_TUNER; | |
1767 | ||
1da177e4 | 1768 | /* initialize driver struct */ |
1da177e4 | 1769 | spin_lock_init(&dev->slock); |
63ab1bdc | 1770 | core->tvnorm = cx8800_video_template.current_norm; |
1da177e4 LT |
1771 | |
1772 | /* init video dma queues */ | |
1773 | INIT_LIST_HEAD(&dev->vidq.active); | |
1774 | INIT_LIST_HEAD(&dev->vidq.queued); | |
1775 | dev->vidq.timeout.function = cx8800_vid_timeout; | |
1776 | dev->vidq.timeout.data = (unsigned long)dev; | |
1777 | init_timer(&dev->vidq.timeout); | |
1778 | cx88_risc_stopper(dev->pci,&dev->vidq.stopper, | |
1779 | MO_VID_DMACNTRL,0x11,0x00); | |
1780 | ||
1781 | /* init vbi dma queues */ | |
1782 | INIT_LIST_HEAD(&dev->vbiq.active); | |
1783 | INIT_LIST_HEAD(&dev->vbiq.queued); | |
1784 | dev->vbiq.timeout.function = cx8800_vbi_timeout; | |
1785 | dev->vbiq.timeout.data = (unsigned long)dev; | |
1786 | init_timer(&dev->vbiq.timeout); | |
1787 | cx88_risc_stopper(dev->pci,&dev->vbiq.stopper, | |
1788 | MO_VID_DMACNTRL,0x88,0x00); | |
1789 | ||
1790 | /* get irq */ | |
1791 | err = request_irq(pci_dev->irq, cx8800_irq, | |
8076fe32 | 1792 | IRQF_SHARED | IRQF_DISABLED, core->name, dev); |
1da177e4 | 1793 | if (err < 0) { |
5772f813 | 1794 | printk(KERN_ERR "%s/0: can't get IRQ %d\n", |
1da177e4 LT |
1795 | core->name,pci_dev->irq); |
1796 | goto fail_core; | |
1797 | } | |
1798 | cx_set(MO_PCI_INTMSK, core->pci_irqmask); | |
1799 | ||
1800 | /* load and configure helper modules */ | |
6a59d64c | 1801 | if (TUNER_ABSENT != core->board.tuner_type) |
1da177e4 | 1802 | request_module("tuner"); |
e52e98a7 | 1803 | |
6a59d64c | 1804 | if (core->board.audio_chip == AUDIO_CHIP_WM8775) |
3057906d ST |
1805 | request_module("wm8775"); |
1806 | ||
6fcecce7 MK |
1807 | switch (core->boardnr) { |
1808 | case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD: | |
1809 | request_module("ir-kbd-i2c"); | |
1810 | request_module("rtc-isl1208"); | |
1811 | } | |
1812 | ||
1da177e4 LT |
1813 | /* register v4l devices */ |
1814 | dev->video_dev = cx88_vdev_init(core,dev->pci, | |
1815 | &cx8800_video_template,"video"); | |
1816 | err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER, | |
1817 | video_nr[core->nr]); | |
1818 | if (err < 0) { | |
5772f813 | 1819 | printk(KERN_ERR "%s/0: can't register video device\n", |
1da177e4 LT |
1820 | core->name); |
1821 | goto fail_unreg; | |
1822 | } | |
1823 | printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n", | |
1824 | core->name,dev->video_dev->minor & 0x1f); | |
1825 | ||
1826 | dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi"); | |
1827 | err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI, | |
1828 | vbi_nr[core->nr]); | |
1829 | if (err < 0) { | |
5772f813 | 1830 | printk(KERN_ERR "%s/0: can't register vbi device\n", |
1da177e4 LT |
1831 | core->name); |
1832 | goto fail_unreg; | |
1833 | } | |
1834 | printk(KERN_INFO "%s/0: registered device vbi%d\n", | |
1835 | core->name,dev->vbi_dev->minor & 0x1f); | |
1836 | ||
6a59d64c | 1837 | if (core->board.radio.type == CX88_RADIO) { |
1da177e4 LT |
1838 | dev->radio_dev = cx88_vdev_init(core,dev->pci, |
1839 | &cx8800_radio_template,"radio"); | |
1840 | err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO, | |
1841 | radio_nr[core->nr]); | |
1842 | if (err < 0) { | |
5772f813 | 1843 | printk(KERN_ERR "%s/0: can't register radio device\n", |
1da177e4 LT |
1844 | core->name); |
1845 | goto fail_unreg; | |
1846 | } | |
1847 | printk(KERN_INFO "%s/0: registered device radio%d\n", | |
1848 | core->name,dev->radio_dev->minor & 0x1f); | |
1849 | } | |
1850 | ||
1851 | /* everything worked */ | |
1852 | list_add_tail(&dev->devlist,&cx8800_devlist); | |
1853 | pci_set_drvdata(pci_dev,dev); | |
1854 | ||
1855 | /* initial device configuration */ | |
3593cab5 | 1856 | mutex_lock(&core->lock); |
63ab1bdc | 1857 | cx88_set_tvnorm(core,core->tvnorm); |
70f00044 | 1858 | init_controls(core); |
e90311a1 | 1859 | cx88_video_mux(core,0); |
3593cab5 | 1860 | mutex_unlock(&core->lock); |
1da177e4 LT |
1861 | |
1862 | /* start tvaudio thread */ | |
6a59d64c | 1863 | if (core->board.tuner_type != TUNER_ABSENT) { |
1da177e4 | 1864 | core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio"); |
32b78de7 CG |
1865 | if (IS_ERR(core->kthread)) { |
1866 | err = PTR_ERR(core->kthread); | |
5772f813 TP |
1867 | printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n", |
1868 | core->name, err); | |
32b78de7 CG |
1869 | } |
1870 | } | |
1da177e4 LT |
1871 | return 0; |
1872 | ||
1873 | fail_unreg: | |
1874 | cx8800_unregister_video(dev); | |
1875 | free_irq(pci_dev->irq, dev); | |
1876 | fail_core: | |
1877 | cx88_core_put(core,dev->pci); | |
1878 | fail_free: | |
1879 | kfree(dev); | |
1880 | return err; | |
1881 | } | |
1882 | ||
1883 | static void __devexit cx8800_finidev(struct pci_dev *pci_dev) | |
1884 | { | |
4ac97914 | 1885 | struct cx8800_dev *dev = pci_get_drvdata(pci_dev); |
e52e98a7 | 1886 | struct cx88_core *core = dev->core; |
1da177e4 LT |
1887 | |
1888 | /* stop thread */ | |
e52e98a7 MCC |
1889 | if (core->kthread) { |
1890 | kthread_stop(core->kthread); | |
1891 | core->kthread = NULL; | |
1da177e4 LT |
1892 | } |
1893 | ||
e52e98a7 | 1894 | cx88_shutdown(core); /* FIXME */ |
1da177e4 LT |
1895 | pci_disable_device(pci_dev); |
1896 | ||
1897 | /* unregister stuff */ | |
1898 | ||
1899 | free_irq(pci_dev->irq, dev); | |
1900 | cx8800_unregister_video(dev); | |
1901 | pci_set_drvdata(pci_dev, NULL); | |
1902 | ||
1903 | /* free memory */ | |
1904 | btcx_riscmem_free(dev->pci,&dev->vidq.stopper); | |
1905 | list_del(&dev->devlist); | |
e52e98a7 | 1906 | cx88_core_put(core,dev->pci); |
1da177e4 LT |
1907 | kfree(dev); |
1908 | } | |
1909 | ||
17bc98a4 | 1910 | #ifdef CONFIG_PM |
1da177e4 LT |
1911 | static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state) |
1912 | { | |
b45009b0 | 1913 | struct cx8800_dev *dev = pci_get_drvdata(pci_dev); |
1da177e4 LT |
1914 | struct cx88_core *core = dev->core; |
1915 | ||
1916 | /* stop video+vbi capture */ | |
1917 | spin_lock(&dev->slock); | |
1918 | if (!list_empty(&dev->vidq.active)) { | |
5772f813 | 1919 | printk("%s/0: suspend video\n", core->name); |
1da177e4 LT |
1920 | stop_video_dma(dev); |
1921 | del_timer(&dev->vidq.timeout); | |
1922 | } | |
1923 | if (!list_empty(&dev->vbiq.active)) { | |
5772f813 | 1924 | printk("%s/0: suspend vbi\n", core->name); |
1da177e4 LT |
1925 | cx8800_stop_vbi_dma(dev); |
1926 | del_timer(&dev->vbiq.timeout); | |
1927 | } | |
1928 | spin_unlock(&dev->slock); | |
1929 | ||
13595a51 MCC |
1930 | if (core->ir) |
1931 | cx88_ir_stop(core, core->ir); | |
1da177e4 | 1932 | /* FIXME -- shutdown device */ |
e52e98a7 | 1933 | cx88_shutdown(core); |
1da177e4 LT |
1934 | |
1935 | pci_save_state(pci_dev); | |
1936 | if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) { | |
1937 | pci_disable_device(pci_dev); | |
1938 | dev->state.disabled = 1; | |
1939 | } | |
1940 | return 0; | |
1941 | } | |
1942 | ||
1943 | static int cx8800_resume(struct pci_dev *pci_dev) | |
1944 | { | |
b45009b0 | 1945 | struct cx8800_dev *dev = pci_get_drvdata(pci_dev); |
1da177e4 | 1946 | struct cx88_core *core = dev->core; |
08adb9e2 | 1947 | int err; |
1da177e4 LT |
1948 | |
1949 | if (dev->state.disabled) { | |
08adb9e2 MCC |
1950 | err=pci_enable_device(pci_dev); |
1951 | if (err) { | |
5772f813 TP |
1952 | printk(KERN_ERR "%s/0: can't enable device\n", |
1953 | core->name); | |
08adb9e2 MCC |
1954 | return err; |
1955 | } | |
1956 | ||
1da177e4 LT |
1957 | dev->state.disabled = 0; |
1958 | } | |
08adb9e2 MCC |
1959 | err= pci_set_power_state(pci_dev, PCI_D0); |
1960 | if (err) { | |
5772f813 | 1961 | printk(KERN_ERR "%s/0: can't set power state\n", core->name); |
08adb9e2 MCC |
1962 | pci_disable_device(pci_dev); |
1963 | dev->state.disabled = 1; | |
1964 | ||
1965 | return err; | |
1966 | } | |
1da177e4 LT |
1967 | pci_restore_state(pci_dev); |
1968 | ||
1da177e4 | 1969 | /* FIXME: re-initialize hardware */ |
e52e98a7 | 1970 | cx88_reset(core); |
13595a51 MCC |
1971 | if (core->ir) |
1972 | cx88_ir_start(core, core->ir); | |
1973 | ||
1974 | cx_set(MO_PCI_INTMSK, core->pci_irqmask); | |
1da177e4 LT |
1975 | |
1976 | /* restart video+vbi capture */ | |
1977 | spin_lock(&dev->slock); | |
1978 | if (!list_empty(&dev->vidq.active)) { | |
5772f813 | 1979 | printk("%s/0: resume video\n", core->name); |
1da177e4 LT |
1980 | restart_video_queue(dev,&dev->vidq); |
1981 | } | |
1982 | if (!list_empty(&dev->vbiq.active)) { | |
5772f813 | 1983 | printk("%s/0: resume vbi\n", core->name); |
1da177e4 LT |
1984 | cx8800_restart_vbi_queue(dev,&dev->vbiq); |
1985 | } | |
1986 | spin_unlock(&dev->slock); | |
1987 | ||
1988 | return 0; | |
1989 | } | |
17bc98a4 | 1990 | #endif |
1da177e4 LT |
1991 | |
1992 | /* ----------------------------------------------------------- */ | |
1993 | ||
408b664a | 1994 | static struct pci_device_id cx8800_pci_tbl[] = { |
1da177e4 LT |
1995 | { |
1996 | .vendor = 0x14f1, | |
1997 | .device = 0x8800, | |
b45009b0 MCC |
1998 | .subvendor = PCI_ANY_ID, |
1999 | .subdevice = PCI_ANY_ID, | |
1da177e4 LT |
2000 | },{ |
2001 | /* --- end of list --- */ | |
2002 | } | |
2003 | }; | |
2004 | MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl); | |
2005 | ||
2006 | static struct pci_driver cx8800_pci_driver = { | |
b45009b0 MCC |
2007 | .name = "cx8800", |
2008 | .id_table = cx8800_pci_tbl, | |
2009 | .probe = cx8800_initdev, | |
2010 | .remove = __devexit_p(cx8800_finidev), | |
17bc98a4 | 2011 | #ifdef CONFIG_PM |
1da177e4 LT |
2012 | .suspend = cx8800_suspend, |
2013 | .resume = cx8800_resume, | |
17bc98a4 | 2014 | #endif |
1da177e4 LT |
2015 | }; |
2016 | ||
2017 | static int cx8800_init(void) | |
2018 | { | |
5772f813 | 2019 | printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n", |
1da177e4 LT |
2020 | (CX88_VERSION_CODE >> 16) & 0xff, |
2021 | (CX88_VERSION_CODE >> 8) & 0xff, | |
2022 | CX88_VERSION_CODE & 0xff); | |
2023 | #ifdef SNAPSHOT | |
2024 | printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n", | |
2025 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | |
2026 | #endif | |
2027 | return pci_register_driver(&cx8800_pci_driver); | |
2028 | } | |
2029 | ||
2030 | static void cx8800_fini(void) | |
2031 | { | |
2032 | pci_unregister_driver(&cx8800_pci_driver); | |
2033 | } | |
2034 | ||
2035 | module_init(cx8800_init); | |
2036 | module_exit(cx8800_fini); | |
2037 | ||
2038 | /* ----------------------------------------------------------- */ | |
2039 | /* | |
2040 | * Local variables: | |
2041 | * c-basic-offset: 8 | |
2042 | * End: | |
b45009b0 | 2043 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off |
1da177e4 | 2044 | */ |