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Merge branch 'tip/perf/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/roste...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8d87cb9f
MCC		 8 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
9 * - Multituner support
10 * - video_ioctl2 conversion
11 * - PAL/M fixes
12 *
1da177e4
LT		 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/init.h>
29#include <linux/list.h>
30#include <linux/module.h>
1da177e4
LT		 31#include <linux/kmod.h>
32#include <linux/kernel.h>
33#include <linux/slab.h>
34#include <linux/interrupt.h>
c24228da 35#include <linux/dma-mapping.h>
1da177e4
LT		 36#include <linux/delay.h>
37#include <linux/kthread.h>
38#include <asm/div64.h>
39
40#include "cx88.h"
5e453dc7 41#include <media/v4l2-common.h>
35ea11ff 42#include <media/v4l2-ioctl.h>
6951803c 43#include <media/wm8775.h>
1da177e4
LT		 44
45MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
46MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
47MODULE_LICENSE("GPL");
48
49/* ------------------------------------------------------------------ */
50
51static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
52static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
53static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
54
55module_param_array(video_nr, int, NULL, 0444);
56module_param_array(vbi_nr, int, NULL, 0444);
57module_param_array(radio_nr, int, NULL, 0444);
58
59MODULE_PARM_DESC(video_nr,"video device numbers");
60MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
61MODULE_PARM_DESC(radio_nr,"radio device numbers");
62
ff699e6b 63static unsigned int video_debug;
1da177e4
LT		 64module_param(video_debug,int,0644);
65MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
66
ff699e6b 67static unsigned int irq_debug;
1da177e4
LT		 68module_param(irq_debug,int,0644);
69MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
70
71static unsigned int vid_limit = 16;
72module_param(vid_limit,int,0644);
73MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
74
75#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 76 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4 77
1da177e4
LT		 78/* ------------------------------------------------------------------- */
79/* static data */
80
2e4e98e7 81static const struct cx8800_fmt formats[] = {
1da177e4
LT		 82 {
83 .name = "8 bpp, gray",
84 .fourcc = V4L2_PIX_FMT_GREY,
85 .cxformat = ColorFormatY8,
86 .depth = 8,
87 .flags = FORMAT_FLAGS_PACKED,
88 },{
89 .name = "15 bpp RGB, le",
90 .fourcc = V4L2_PIX_FMT_RGB555,
91 .cxformat = ColorFormatRGB15,
92 .depth = 16,
93 .flags = FORMAT_FLAGS_PACKED,
94 },{
95 .name = "15 bpp RGB, be",
96 .fourcc = V4L2_PIX_FMT_RGB555X,
97 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
98 .depth = 16,
99 .flags = FORMAT_FLAGS_PACKED,
100 },{
101 .name = "16 bpp RGB, le",
102 .fourcc = V4L2_PIX_FMT_RGB565,
103 .cxformat = ColorFormatRGB16,
104 .depth = 16,
105 .flags = FORMAT_FLAGS_PACKED,
106 },{
107 .name = "16 bpp RGB, be",
108 .fourcc = V4L2_PIX_FMT_RGB565X,
109 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
110 .depth = 16,
111 .flags = FORMAT_FLAGS_PACKED,
112 },{
113 .name = "24 bpp RGB, le",
114 .fourcc = V4L2_PIX_FMT_BGR24,
115 .cxformat = ColorFormatRGB24,
116 .depth = 24,
117 .flags = FORMAT_FLAGS_PACKED,
118 },{
119 .name = "32 bpp RGB, le",
120 .fourcc = V4L2_PIX_FMT_BGR32,
121 .cxformat = ColorFormatRGB32,
122 .depth = 32,
123 .flags = FORMAT_FLAGS_PACKED,
124 },{
125 .name = "32 bpp RGB, be",
126 .fourcc = V4L2_PIX_FMT_RGB32,
127 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
128 .depth = 32,
129 .flags = FORMAT_FLAGS_PACKED,
130 },{
131 .name = "4:2:2, packed, YUYV",
132 .fourcc = V4L2_PIX_FMT_YUYV,
133 .cxformat = ColorFormatYUY2,
134 .depth = 16,
135 .flags = FORMAT_FLAGS_PACKED,
136 },{
137 .name = "4:2:2, packed, UYVY",
138 .fourcc = V4L2_PIX_FMT_UYVY,
139 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
140 .depth = 16,
141 .flags = FORMAT_FLAGS_PACKED,
142 },
143};
144
2e4e98e7 145static const struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
1da177e4
LT		 146{
147 unsigned int i;
148
149 for (i = 0; i < ARRAY_SIZE(formats); i++)
150 if (formats[i].fourcc == fourcc)
151 return formats+i;
152 return NULL;
153}
154
155/* ------------------------------------------------------------------- */
156
157static const struct v4l2_queryctrl no_ctl = {
158 .name = "42",
159 .flags = V4L2_CTRL_FLAG_DISABLED,
160};
161
2e4e98e7 162static const struct cx88_ctrl cx8800_ctls[] = {
1da177e4
LT		 163 /* --- video --- */
164 {
165 .v = {
166 .id = V4L2_CID_BRIGHTNESS,
167 .name = "Brightness",
168 .minimum = 0x00,
169 .maximum = 0xff,
170 .step = 1,
9f9c907f 171 .default_value = 0x7f,
1da177e4
LT		 172 .type = V4L2_CTRL_TYPE_INTEGER,
173 },
174 .off = 128,
175 .reg = MO_CONTR_BRIGHT,
176 .mask = 0x00ff,
177 .shift = 0,
178 },{
179 .v = {
180 .id = V4L2_CID_CONTRAST,
181 .name = "Contrast",
182 .minimum = 0,
183 .maximum = 0xff,
184 .step = 1,
70f00044 185 .default_value = 0x3f,
1da177e4
LT		 186 .type = V4L2_CTRL_TYPE_INTEGER,
187 },
41ef7c1e 188 .off = 0,
1da177e4
LT		 189 .reg = MO_CONTR_BRIGHT,
190 .mask = 0xff00,
191 .shift = 8,
192 },{
193 .v = {
194 .id = V4L2_CID_HUE,
195 .name = "Hue",
196 .minimum = 0,
197 .maximum = 0xff,
198 .step = 1,
9f9c907f 199 .default_value = 0x7f,
1da177e4
LT		 200 .type = V4L2_CTRL_TYPE_INTEGER,
201 },
9ac4c158 202 .off = 128,
1da177e4
LT		 203 .reg = MO_HUE,
204 .mask = 0x00ff,
205 .shift = 0,
206 },{
207 /* strictly, this only describes only U saturation.
208 * V saturation is handled specially through code.
209 */
210 .v = {
211 .id = V4L2_CID_SATURATION,
212 .name = "Saturation",
213 .minimum = 0,
214 .maximum = 0xff,
215 .step = 1,
70f00044 216 .default_value = 0x7f,
1da177e4
LT		 217 .type = V4L2_CTRL_TYPE_INTEGER,
218 },
219 .off = 0,
220 .reg = MO_UV_SATURATION,
221 .mask = 0x00ff,
222 .shift = 0,
223 },{
6d04203c
FD		 224 .v = {
225 .id = V4L2_CID_CHROMA_AGC,
226 .name = "Chroma AGC",
227 .minimum = 0,
228 .maximum = 1,
87a17389 229 .default_value = 0x1,
6d04203c
FD		 230 .type = V4L2_CTRL_TYPE_BOOLEAN,
231 },
232 .reg = MO_INPUT_FORMAT,
233 .mask = 1 << 10,
234 .shift = 10,
1b879c43
FD		 235 }, {
236 .v = {
237 .id = V4L2_CID_COLOR_KILLER,
238 .name = "Color killer",
239 .minimum = 0,
240 .maximum = 1,
0b5afdd2 241 .default_value = 0x1,
1b879c43
FD		 242 .type = V4L2_CTRL_TYPE_BOOLEAN,
243 },
244 .reg = MO_INPUT_FORMAT,
245 .mask = 1 << 9,
246 .shift = 9,
6d04203c 247 }, {
1da177e4
LT		 248 /* --- audio --- */
249 .v = {
250 .id = V4L2_CID_AUDIO_MUTE,
251 .name = "Mute",
252 .minimum = 0,
253 .maximum = 1,
70f00044 254 .default_value = 1,
1da177e4
LT		 255 .type = V4L2_CTRL_TYPE_BOOLEAN,
256 },
257 .reg = AUD_VOL_CTL,
258 .sreg = SHADOW_AUD_VOL_CTL,
259 .mask = (1 << 6),
260 .shift = 6,
261 },{
262 .v = {
263 .id = V4L2_CID_AUDIO_VOLUME,
264 .name = "Volume",
265 .minimum = 0,
266 .maximum = 0x3f,
267 .step = 1,
9f9c907f 268 .default_value = 0x3f,
1da177e4
LT		 269 .type = V4L2_CTRL_TYPE_INTEGER,
270 },
271 .reg = AUD_VOL_CTL,
272 .sreg = SHADOW_AUD_VOL_CTL,
273 .mask = 0x3f,
274 .shift = 0,
275 },{
276 .v = {
277 .id = V4L2_CID_AUDIO_BALANCE,
278 .name = "Balance",
279 .minimum = 0,
280 .maximum = 0x7f,
281 .step = 1,
282 .default_value = 0x40,
283 .type = V4L2_CTRL_TYPE_INTEGER,
284 },
285 .reg = AUD_BAL_CTL,
286 .sreg = SHADOW_AUD_BAL_CTL,
287 .mask = 0x7f,
288 .shift = 0,
289 }
290};
2e4e98e7 291enum { CX8800_CTLS = ARRAY_SIZE(cx8800_ctls) };
1da177e4 292
2ba58894 293/* Must be sorted from low to high control ID! */
38a2713a
MK		 294const u32 cx88_user_ctrls[] = {
295 V4L2_CID_USER_CLASS,
296 V4L2_CID_BRIGHTNESS,
297 V4L2_CID_CONTRAST,
298 V4L2_CID_SATURATION,
299 V4L2_CID_HUE,
300 V4L2_CID_AUDIO_VOLUME,
301 V4L2_CID_AUDIO_BALANCE,
302 V4L2_CID_AUDIO_MUTE,
6d04203c 303 V4L2_CID_CHROMA_AGC,
1b879c43 304 V4L2_CID_COLOR_KILLER,
38a2713a
MK		 305 0
306};
307EXPORT_SYMBOL(cx88_user_ctrls);
308
2e4e98e7 309static const u32 * const ctrl_classes[] = {
38a2713a
MK		 310 cx88_user_ctrls,
311 NULL
312};
313
6d04203c 314int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl)
38a2713a
MK		 315{
316 int i;
317
318 if (qctrl->id < V4L2_CID_BASE ||
319 qctrl->id >= V4L2_CID_LASTP1)
320 return -EINVAL;
321 for (i = 0; i < CX8800_CTLS; i++)
322 if (cx8800_ctls[i].v.id == qctrl->id)
323 break;
324 if (i == CX8800_CTLS) {
325 *qctrl = no_ctl;
326 return 0;
327 }
328 *qctrl = cx8800_ctls[i].v;
6d04203c
FD		 329 /* Report chroma AGC as inactive when SECAM is selected */
330 if (cx8800_ctls[i].v.id == V4L2_CID_CHROMA_AGC &&
331 core->tvnorm & V4L2_STD_SECAM)
332 qctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
333
38a2713a
MK		 334 return 0;
335}
336EXPORT_SYMBOL(cx8800_ctrl_query);
337
1da177e4
LT		 338/* ------------------------------------------------------------------- */
339/* resource management */
340
341static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
342{
e52e98a7 343 struct cx88_core *core = dev->core;
1da177e4
LT		 344 if (fh->resources & bit)
345 /* have it already allocated */
346 return 1;
347
348 /* is it free? */
3593cab5 349 mutex_lock(&core->lock);
1da177e4
LT		 350 if (dev->resources & bit) {
351 /* no, someone else uses it */
3593cab5 352 mutex_unlock(&core->lock);
1da177e4
LT		 353 return 0;
354 }
355 /* it's free, grab it */
356 fh->resources |= bit;
357 dev->resources |= bit;
358 dprintk(1,"res: get %d\n",bit);
3593cab5 359 mutex_unlock(&core->lock);
1da177e4
LT		 360 return 1;
361}
362
363static
364int res_check(struct cx8800_fh *fh, unsigned int bit)
365{
366 return (fh->resources & bit);
367}
368
369static
370int res_locked(struct cx8800_dev *dev, unsigned int bit)
371{
372 return (dev->resources & bit);
373}
374
375static
376void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
377{
e52e98a7 378 struct cx88_core *core = dev->core;
ae24601b 379 BUG_ON((fh->resources & bits) != bits);
1da177e4 380
3593cab5 381 mutex_lock(&core->lock);
1da177e4
LT		 382 fh->resources &= ~bits;
383 dev->resources &= ~bits;
384 dprintk(1,"res: put %d\n",bits);
3593cab5 385 mutex_unlock(&core->lock);
1da177e4
LT		 386}
387
388/* ------------------------------------------------------------------ */
389
e90311a1 390int cx88_video_mux(struct cx88_core *core, unsigned int input)
1da177e4 391{
e52e98a7 392 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 393
394 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
6a59d64c
TP		 395 input, INPUT(input).vmux,
396 INPUT(input).gpio0,INPUT(input).gpio1,
397 INPUT(input).gpio2,INPUT(input).gpio3);
e52e98a7 398 core->input = input;
6a59d64c
TP		 399 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
400 cx_write(MO_GP3_IO, INPUT(input).gpio3);
401 cx_write(MO_GP0_IO, INPUT(input).gpio0);
402 cx_write(MO_GP1_IO, INPUT(input).gpio1);
403 cx_write(MO_GP2_IO, INPUT(input).gpio2);
1da177e4 404
6a59d64c 405 switch (INPUT(input).type) {
1da177e4
LT		 406 case CX88_VMUX_SVIDEO:
407 cx_set(MO_AFECFG_IO, 0x00000001);
408 cx_set(MO_INPUT_FORMAT, 0x00010010);
409 cx_set(MO_FILTER_EVEN, 0x00002020);
410 cx_set(MO_FILTER_ODD, 0x00002020);
411 break;
412 default:
413 cx_clear(MO_AFECFG_IO, 0x00000001);
414 cx_clear(MO_INPUT_FORMAT, 0x00010010);
415 cx_clear(MO_FILTER_EVEN, 0x00002020);
416 cx_clear(MO_FILTER_ODD, 0x00002020);
417 break;
418 }
f24546a9 419
66e6fbdf
RC		 420 /* if there are audioroutes defined, we have an external
421 ADC to deal with audio */
66e6fbdf 422 if (INPUT(input).audioroute) {
66e6fbdf
RC		 423 /* The wm8775 module has the "2" route hardwired into
424 the initialization. Some boards may use different
425 routes for different inputs. HVR-1300 surely does */
426 if (core->board.audio_chip &&
38f9d308 427 core->board.audio_chip == V4L2_IDENT_WM8775) {
5325b427 428 call_all(core, audio, s_routing,
6e1f4df7 429 INPUT(input).audioroute, 0, 0);
66e6fbdf 430 }
430189da
DB		 431 /* cx2388's C-ADC is connected to the tuner only.
432 When used with S-Video, that ADC is busy dealing with
433 chroma, so an external must be used for baseband audio */
6e1f4df7 434 if (INPUT(input).type != CX88_VMUX_TELEVISION &&
435 INPUT(input).type != CX88_VMUX_CABLE) {
430189da
DB		 436 /* "I2S ADC mode" */
437 core->tvaudio = WW_I2SADC;
438 cx88_set_tvaudio(core);
439 } else {
440 /* Normal mode */
441 cx_write(AUD_I2SCNTL, 0x0);
442 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
443 }
f24546a9 444 }
66e6fbdf 445
1da177e4
LT		 446 return 0;
447}
e90311a1 448EXPORT_SYMBOL(cx88_video_mux);
1da177e4
LT		 449
450/* ------------------------------------------------------------------ */
451
452static int start_video_dma(struct cx8800_dev *dev,
453 struct cx88_dmaqueue *q,
454 struct cx88_buffer *buf)
455{
456 struct cx88_core *core = dev->core;
457
458 /* setup fifo + format */
e52e98a7 459 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 460 buf->bpl, buf->risc.dma);
e52e98a7 461 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 462 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
463
464 /* reset counter */
465 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
466 q->count = 1;
467
468 /* enable irqs */
8ddac9ee 469 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
e52e98a7
MCC		 470
471 /* Enables corresponding bits at PCI_INT_STAT:
472 bits 0 to 4: video, audio, transport stream, VIP, Host
473 bit 7: timer
474 bits 8 and 9: DMA complete for: SRC, DST
475 bits 10 and 11: BERR signal asserted for RISC: RD, WR
476 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
477 */
1da177e4
LT		 478 cx_set(MO_VID_INTMSK, 0x0f0011);
479
480 /* enable capture */
481 cx_set(VID_CAPTURE_CONTROL,0x06);
482
483 /* start dma */
484 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 485 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 486
487 return 0;
488}
489
17bc98a4 490#ifdef CONFIG_PM
1da177e4
LT		 491static int stop_video_dma(struct cx8800_dev *dev)
492{
493 struct cx88_core *core = dev->core;
494
495 /* stop dma */
496 cx_clear(MO_VID_DMACNTRL, 0x11);
497
498 /* disable capture */
499 cx_clear(VID_CAPTURE_CONTROL,0x06);
500
501 /* disable irqs */
8ddac9ee 502 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
1da177e4
LT		 503 cx_clear(MO_VID_INTMSK, 0x0f0011);
504 return 0;
505}
17bc98a4 506#endif
1da177e4
LT		 507
508static int restart_video_queue(struct cx8800_dev *dev,
509 struct cx88_dmaqueue *q)
510{
e52e98a7 511 struct cx88_core *core = dev->core;
1da177e4 512 struct cx88_buffer *buf, *prev;
1da177e4
LT		 513
514 if (!list_empty(&q->active)) {
4ac97914 515 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 516 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
517 buf, buf->vb.i);
518 start_video_dma(dev, q, buf);
8bb629e2
TP		 519 list_for_each_entry(buf, &q->active, vb.queue)
520 buf->count = q->count++;
1da177e4
LT		 521 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
522 return 0;
523 }
524
525 prev = NULL;
526 for (;;) {
527 if (list_empty(&q->queued))
528 return 0;
4ac97914 529 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4 530 if (NULL == prev) {
179e0917 531 list_move_tail(&buf->vb.queue, &q->active);
1da177e4 532 start_video_dma(dev, q, buf);
0fc0686e 533 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 534 buf->count = q->count++;
535 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
536 dprintk(2,"[%p/%d] restart_queue - first active\n",
537 buf,buf->vb.i);
538
539 } else if (prev->vb.width == buf->vb.width &&
540 prev->vb.height == buf->vb.height &&
541 prev->fmt == buf->fmt) {
179e0917 542 list_move_tail(&buf->vb.queue, &q->active);
0fc0686e 543 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 544 buf->count = q->count++;
545 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
546 dprintk(2,"[%p/%d] restart_queue - move to active\n",
547 buf,buf->vb.i);
548 } else {
549 return 0;
550 }
551 prev = buf;
552 }
553}
554
555/* ------------------------------------------------------------------ */
556
557static int
558buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
559{
560 struct cx8800_fh *fh = q->priv_data;
561
562 *size = fh->fmt->depth*fh->width*fh->height >> 3;
563 if (0 == *count)
564 *count = 32;
dab7e310
AB		 565 if (*size * *count > vid_limit * 1024 * 1024)
566 *count = (vid_limit * 1024 * 1024) / *size;
1da177e4
LT		 567 return 0;
568}
569
570static int
571buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
572 enum v4l2_field field)
573{
574 struct cx8800_fh *fh = q->priv_data;
575 struct cx8800_dev *dev = fh->dev;
e52e98a7 576 struct cx88_core *core = dev->core;
1da177e4 577 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
c1accaa2 578 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
1da177e4
LT		 579 int rc, init_buffer = 0;
580
581 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 582 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
583 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 584 return -EINVAL;
585 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
586 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
587 return -EINVAL;
588
589 if (buf->fmt != fh->fmt ||
590 buf->vb.width != fh->width ||
591 buf->vb.height != fh->height ||
592 buf->vb.field != field) {
593 buf->fmt = fh->fmt;
594 buf->vb.width = fh->width;
595 buf->vb.height = fh->height;
596 buf->vb.field = field;
597 init_buffer = 1;
598 }
599
0fc0686e 600 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
1da177e4 601 init_buffer = 1;
c7b0ac05 602 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
1da177e4
LT		 603 goto fail;
604 }
605
606 if (init_buffer) {
607 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
608 switch (buf->vb.field) {
609 case V4L2_FIELD_TOP:
610 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 611 dma->sglist, 0, UNSET,
1da177e4
LT		 612 buf->bpl, 0, buf->vb.height);
613 break;
614 case V4L2_FIELD_BOTTOM:
615 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 616 dma->sglist, UNSET, 0,
1da177e4
LT		 617 buf->bpl, 0, buf->vb.height);
618 break;
619 case V4L2_FIELD_INTERLACED:
620 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 621 dma->sglist, 0, buf->bpl,
1da177e4
LT		 622 buf->bpl, buf->bpl,
623 buf->vb.height >> 1);
624 break;
625 case V4L2_FIELD_SEQ_TB:
626 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 627 dma->sglist,
1da177e4
LT		 628 0, buf->bpl * (buf->vb.height >> 1),
629 buf->bpl, 0,
630 buf->vb.height >> 1);
631 break;
632 case V4L2_FIELD_SEQ_BT:
633 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 634 dma->sglist,
1da177e4
LT		 635 buf->bpl * (buf->vb.height >> 1), 0,
636 buf->bpl, 0,
637 buf->vb.height >> 1);
638 break;
639 default:
640 BUG();
641 }
642 }
643 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
644 buf, buf->vb.i,
645 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
646 (unsigned long)buf->risc.dma);
647
0fc0686e 648 buf->vb.state = VIDEOBUF_PREPARED;
1da177e4
LT		 649 return 0;
650
651 fail:
c7b0ac05 652 cx88_free_buffer(q,buf);
1da177e4
LT		 653 return rc;
654}
655
656static void
657buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
658{
659 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
660 struct cx88_buffer *prev;
661 struct cx8800_fh *fh = vq->priv_data;
662 struct cx8800_dev *dev = fh->dev;
e52e98a7 663 struct cx88_core *core = dev->core;
1da177e4
LT		 664 struct cx88_dmaqueue *q = &dev->vidq;
665
666 /* add jump to stopper */
667 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
668 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
669
670 if (!list_empty(&q->queued)) {
671 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 672 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 673 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
674 buf, buf->vb.i);
675
676 } else if (list_empty(&q->active)) {
677 list_add_tail(&buf->vb.queue,&q->active);
678 start_video_dma(dev, q, buf);
0fc0686e 679 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 680 buf->count = q->count++;
681 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
682 dprintk(2,"[%p/%d] buffer_queue - first active\n",
683 buf, buf->vb.i);
684
685 } else {
686 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
687 if (prev->vb.width == buf->vb.width &&
688 prev->vb.height == buf->vb.height &&
689 prev->fmt == buf->fmt) {
690 list_add_tail(&buf->vb.queue,&q->active);
0fc0686e 691 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 692 buf->count = q->count++;
693 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
694 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
695 buf, buf->vb.i);
696
697 } else {
698 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 699 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 700 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
701 buf, buf->vb.i);
702 }
703 }
704}
705
706static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
707{
708 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
1da177e4 709
c7b0ac05 710 cx88_free_buffer(q,buf);
1da177e4
LT		 711}
712
2e4e98e7 713static const struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 714 .buf_setup = buffer_setup,
715 .buf_prepare = buffer_prepare,
716 .buf_queue = buffer_queue,
717 .buf_release = buffer_release,
718};
719
720/* ------------------------------------------------------------------ */
721
1da177e4
LT		 722
723/* ------------------------------------------------------------------ */
724
725static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
726{
727 switch (fh->type) {
728 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
729 return &fh->vidq;
730 case V4L2_BUF_TYPE_VBI_CAPTURE:
731 return &fh->vbiq;
732 default:
733 BUG();
734 return NULL;
735 }
736}
737
738static int get_ressource(struct cx8800_fh *fh)
739{
740 switch (fh->type) {
741 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
742 return RESOURCE_VIDEO;
743 case V4L2_BUF_TYPE_VBI_CAPTURE:
744 return RESOURCE_VBI;
745 default:
746 BUG();
747 return 0;
748 }
749}
750
bec43661 751static int video_open(struct file *file)
1da177e4 752{
63b0d5ad
LP		 753 struct video_device *vdev = video_devdata(file);
754 struct cx8800_dev *dev = video_drvdata(file);
5401c2db 755 struct cx88_core *core = dev->core;
1da177e4 756 struct cx8800_fh *fh;
1da177e4
LT		 757 enum v4l2_buf_type type = 0;
758 int radio = 0;
759
63b0d5ad
LP		 760 switch (vdev->vfl_type) {
761 case VFL_TYPE_GRABBER:
762 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
763 break;
764 case VFL_TYPE_VBI:
765 type = V4L2_BUF_TYPE_VBI_CAPTURE;
766 break;
767 case VFL_TYPE_RADIO:
768 radio = 1;
769 break;
d56dc612 770 }
1da177e4 771
50462eb0
LP		 772 dprintk(1, "open dev=%s radio=%d type=%s\n",
773 video_device_node_name(vdev), radio, v4l2_type_names[type]);
1da177e4
LT		 774
775 /* allocate + initialize per filehandle data */
7408187d 776 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
da497e30 777 if (unlikely(!fh))
1da177e4 778 return -ENOMEM;
da497e30 779
1da177e4
LT		 780 file->private_data = fh;
781 fh->dev = dev;
782 fh->radio = radio;
783 fh->type = type;
784 fh->width = 320;
785 fh->height = 240;
786 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
787
da497e30 788 mutex_lock(&core->lock);
da497e30 789
0705135e
GL		 790 videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
791 &dev->pci->dev, &dev->slock,
1da177e4
LT		 792 V4L2_BUF_TYPE_VIDEO_CAPTURE,
793 V4L2_FIELD_INTERLACED,
794 sizeof(struct cx88_buffer),
08bff03e 795 fh, NULL);
0705135e
GL		 796 videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
797 &dev->pci->dev, &dev->slock,
1da177e4
LT		 798 V4L2_BUF_TYPE_VBI_CAPTURE,
799 V4L2_FIELD_SEQ_TB,
800 sizeof(struct cx88_buffer),
08bff03e 801 fh, NULL);
1da177e4
LT		 802
803 if (fh->radio) {
1da177e4 804 dprintk(1,"video_open: setting radio device\n");
6a59d64c
TP		 805 cx_write(MO_GP3_IO, core->board.radio.gpio3);
806 cx_write(MO_GP0_IO, core->board.radio.gpio0);
807 cx_write(MO_GP1_IO, core->board.radio.gpio1);
808 cx_write(MO_GP2_IO, core->board.radio.gpio2);
430189da
DB		 809 if (core->board.radio.audioroute) {
810 if(core->board.audio_chip &&
811 core->board.audio_chip == V4L2_IDENT_WM8775) {
5325b427
HV		 812 call_all(core, audio, s_routing,
813 core->board.radio.audioroute, 0, 0);
430189da
DB		 814 }
815 /* "I2S ADC mode" */
816 core->tvaudio = WW_I2SADC;
817 cx88_set_tvaudio(core);
818 } else {
819 /* FM Mode */
820 core->tvaudio = WW_FM;
821 cx88_set_tvaudio(core);
822 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
823 }
b8341e1d 824 call_all(core, tuner, s_radio);
1da177e4
LT		 825 }
826
8d115931 827 core->users++;
da497e30 828 mutex_unlock(&core->lock);
3e010845 829
4ac97914 830 return 0;
1da177e4
LT		 831}
832
833static ssize_t
f9e7a020 834video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 835{
836 struct cx8800_fh *fh = file->private_data;
837
838 switch (fh->type) {
839 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
840 if (res_locked(fh->dev,RESOURCE_VIDEO))
841 return -EBUSY;
842 return videobuf_read_one(&fh->vidq, data, count, ppos,
843 file->f_flags & O_NONBLOCK);
844 case V4L2_BUF_TYPE_VBI_CAPTURE:
845 if (!res_get(fh->dev,fh,RESOURCE_VBI))
846 return -EBUSY;
847 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
848 file->f_flags & O_NONBLOCK);
849 default:
850 BUG();
851 return 0;
852 }
853}
854
855static unsigned int
856video_poll(struct file *file, struct poll_table_struct *wait)
857{
858 struct cx8800_fh *fh = file->private_data;
859 struct cx88_buffer *buf;
9fd6418a 860 unsigned int rc = POLLERR;
1da177e4
LT		 861
862 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
863 if (!res_get(fh->dev,fh,RESOURCE_VBI))
864 return POLLERR;
865 return videobuf_poll_stream(file, &fh->vbiq, wait);
866 }
867
9fd6418a 868 mutex_lock(&fh->vidq.vb_lock);
1da177e4
LT		 869 if (res_check(fh,RESOURCE_VIDEO)) {
870 /* streaming capture */
871 if (list_empty(&fh->vidq.stream))
9fd6418a 872 goto done;
1da177e4
LT		 873 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
874 } else {
875 /* read() capture */
876 buf = (struct cx88_buffer*)fh->vidq.read_buf;
877 if (NULL == buf)
9fd6418a 878 goto done;
1da177e4
LT		 879 }
880 poll_wait(file, &buf->vb.done, wait);
0fc0686e
BP		 881 if (buf->vb.state == VIDEOBUF_DONE ||
882 buf->vb.state == VIDEOBUF_ERROR)
9fd6418a
F		 883 rc = POLLIN|POLLRDNORM;
884 else
885 rc = 0;
886done:
887 mutex_unlock(&fh->vidq.vb_lock);
888 return rc;
1da177e4
LT		 889}
890
bec43661 891static int video_release(struct file *file)
1da177e4
LT		 892{
893 struct cx8800_fh *fh = file->private_data;
894 struct cx8800_dev *dev = fh->dev;
895
896 /* turn off overlay */
897 if (res_check(fh, RESOURCE_OVERLAY)) {
898 /* FIXME */
899 res_free(dev,fh,RESOURCE_OVERLAY);
900 }
901
902 /* stop video capture */
903 if (res_check(fh, RESOURCE_VIDEO)) {
904 videobuf_queue_cancel(&fh->vidq);
905 res_free(dev,fh,RESOURCE_VIDEO);
906 }
907 if (fh->vidq.read_buf) {
908 buffer_release(&fh->vidq,fh->vidq.read_buf);
909 kfree(fh->vidq.read_buf);
910 }
911
912 /* stop vbi capture */
913 if (res_check(fh, RESOURCE_VBI)) {
053fcb60 914 videobuf_stop(&fh->vbiq);
1da177e4
LT		 915 res_free(dev,fh,RESOURCE_VBI);
916 }
917
918 videobuf_mmap_free(&fh->vidq);
919 videobuf_mmap_free(&fh->vbiq);
da497e30
MCC		 920
921 mutex_lock(&dev->core->lock);
1da177e4
LT		 922 file->private_data = NULL;
923 kfree(fh);
e52e98a7 924
8d115931
JN		 925 dev->core->users--;
926 if (!dev->core->users)
622b828a 927 call_all(dev->core, core, s_power, 0);
06f837ca 928 mutex_unlock(&dev->core->lock);
e52e98a7 929
1da177e4
LT		 930 return 0;
931}
932
933static int
934video_mmap(struct file *file, struct vm_area_struct * vma)
935{
936 struct cx8800_fh *fh = file->private_data;
937
938 return videobuf_mmap_mapper(get_queue(fh), vma);
939}
940
941/* ------------------------------------------------------------------ */
8d87cb9f 942/* VIDEO CTRL IOCTLS */
1da177e4 943
54da49f5 944int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 945{
2e4e98e7 946 const struct cx88_ctrl *c = NULL;
1da177e4
LT		 947 u32 value;
948 int i;
949
950 for (i = 0; i < CX8800_CTLS; i++)
951 if (cx8800_ctls[i].v.id == ctl->id)
952 c = &cx8800_ctls[i];
8d87cb9f 953 if (unlikely(NULL == c))
1da177e4
LT		 954 return -EINVAL;
955
956 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
957 switch (ctl->id) {
958 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 959 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
960 : (0x7f - (value & 0x7f));
1da177e4
LT		 961 break;
962 case V4L2_CID_AUDIO_VOLUME:
963 ctl->value = 0x3f - (value & 0x3f);
964 break;
965 default:
966 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
967 break;
968 }
6457af5f
IP		 969 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
970 ctl->id, c->v.name, ctl->value, c->reg,
971 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 972 return 0;
973}
54da49f5 974EXPORT_SYMBOL(cx88_get_control);
1da177e4 975
54da49f5 976int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 977{
2e4e98e7 978 const struct cx88_ctrl *c = NULL;
70f00044 979 u32 value,mask;
1da177e4 980 int i;
8d87cb9f 981
70f00044
MCC		 982 for (i = 0; i < CX8800_CTLS; i++) {
983 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 984 c = &cx8800_ctls[i];
70f00044
MCC		 985 }
986 }
8d87cb9f 987 if (unlikely(NULL == c))
1da177e4
LT		 988 return -EINVAL;
989
990 if (ctl->value < c->v.minimum)
e52e98a7 991 ctl->value = c->v.minimum;
1da177e4 992 if (ctl->value > c->v.maximum)
e52e98a7 993 ctl->value = c->v.maximum;
6951803c
LR		 994
995 /* Pass changes onto any WM8775 */
996 if (core->board.audio_chip == V4L2_IDENT_WM8775) {
997 struct v4l2_control client_ctl;
998 memset(&client_ctl, 0, sizeof(client_ctl));
999 client_ctl.id = ctl->id;
1000
1001 switch (ctl->id) {
1002 case V4L2_CID_AUDIO_MUTE:
1003 client_ctl.value = ctl->value;
1004 break;
1005 case V4L2_CID_AUDIO_VOLUME:
1006 client_ctl.value = (ctl->value) ?
1007 (0x90 + ctl->value) << 8 : 0;
1008 break;
1009 case V4L2_CID_AUDIO_BALANCE:
1010 client_ctl.value = ctl->value << 9;
1011 break;
1012 default:
1013 client_ctl.id = 0;
1014 break;
1015 }
1016 if (client_ctl.id)
1017 call_hw(core, WM8775_GID, core, s_ctrl, &client_ctl);
1018 }
1019
70f00044 1020 mask=c->mask;
1da177e4
LT		 1021 switch (ctl->id) {
1022 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 1023 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 1024 break;
1025 case V4L2_CID_AUDIO_VOLUME:
1026 value = 0x3f - (ctl->value & 0x3f);
1027 break;
1028 case V4L2_CID_SATURATION:
1029 /* special v_sat handling */
70f00044
MCC		 1030
1031 value = ((ctl->value - c->off) << c->shift) & c->mask;
1032
63ab1bdc 1033 if (core->tvnorm & V4L2_STD_SECAM) {
70f00044
MCC		 1034 /* For SECAM, both U and V sat should be equal */
1035 value=value<<8|value;
1036 } else {
1037 /* Keeps U Saturation proportional to V Sat */
1038 value=(value*0x5a)/0x7f<<8|value;
1039 }
1040 mask=0xffff;
1041 break;
6d04203c
FD		 1042 case V4L2_CID_CHROMA_AGC:
1043 /* Do not allow chroma AGC to be enabled for SECAM */
1044 value = ((ctl->value - c->off) << c->shift) & c->mask;
1045 if (core->tvnorm & V4L2_STD_SECAM && value)
1046 return -EINVAL;
1047 break;
1da177e4
LT		 1048 default:
1049 value = ((ctl->value - c->off) << c->shift) & c->mask;
1050 break;
1051 }
6457af5f
IP		 1052 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
1053 ctl->id, c->v.name, ctl->value, c->reg, value,
1054 mask, c->sreg ? " [shadowed]" : "");
1da177e4 1055 if (c->sreg) {
70f00044 1056 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 1057 } else {
70f00044 1058 cx_andor(c->reg, mask, value);
1da177e4
LT		 1059 }
1060 return 0;
1061}
54da49f5 1062EXPORT_SYMBOL(cx88_set_control);
1da177e4 1063
e52e98a7 1064static void init_controls(struct cx88_core *core)
1da177e4 1065{
70f00044
MCC		 1066 struct v4l2_control ctrl;
1067 int i;
1da177e4 1068
70f00044
MCC		 1069 for (i = 0; i < CX8800_CTLS; i++) {
1070 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 1071 ctrl.value=cx8800_ctls[i].v.default_value;
8d87cb9f 1072
54da49f5 1073 cx88_set_control(core, &ctrl);
70f00044 1074 }
1da177e4
LT		 1075}
1076
1077/* ------------------------------------------------------------------ */
8d87cb9f 1078/* VIDEO IOCTLS */
1da177e4 1079
78b526a4 1080static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1081 struct v4l2_format *f)
1da177e4 1082{
8d87cb9f
MCC		 1083 struct cx8800_fh *fh = priv;
1084
1085 f->fmt.pix.width = fh->width;
1086 f->fmt.pix.height = fh->height;
1087 f->fmt.pix.field = fh->vidq.field;
1088 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1089 f->fmt.pix.bytesperline =
1090 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1091 f->fmt.pix.sizeimage =
1092 f->fmt.pix.height * f->fmt.pix.bytesperline;
1093 return 0;
1da177e4
LT		 1094}
1095
78b526a4 1096static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1097 struct v4l2_format *f)
1da177e4 1098{
8d87cb9f 1099 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
2e4e98e7 1100 const struct cx8800_fmt *fmt;
8d87cb9f
MCC		 1101 enum v4l2_field field;
1102 unsigned int maxw, maxh;
e52e98a7 1103
8d87cb9f
MCC		 1104 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1105 if (NULL == fmt)
1106 return -EINVAL;
1da177e4 1107
8d87cb9f
MCC		 1108 field = f->fmt.pix.field;
1109 maxw = norm_maxw(core->tvnorm);
1110 maxh = norm_maxh(core->tvnorm);
1da177e4 1111
8d87cb9f
MCC		 1112 if (V4L2_FIELD_ANY == field) {
1113 field = (f->fmt.pix.height > maxh/2)
1114 ? V4L2_FIELD_INTERLACED
1115 : V4L2_FIELD_BOTTOM;
1da177e4 1116 }
8d87cb9f
MCC		 1117
1118 switch (field) {
1119 case V4L2_FIELD_TOP:
1120 case V4L2_FIELD_BOTTOM:
1121 maxh = maxh / 2;
1122 break;
1123 case V4L2_FIELD_INTERLACED:
1124 break;
1da177e4
LT		 1125 default:
1126 return -EINVAL;
1127 }
8d87cb9f
MCC		 1128
1129 f->fmt.pix.field = field;
4b89945e
TP		 1130 v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
1131 &f->fmt.pix.height, 32, maxh, 0, 0);
8d87cb9f
MCC		 1132 f->fmt.pix.bytesperline =
1133 (f->fmt.pix.width * fmt->depth) >> 3;
1134 f->fmt.pix.sizeimage =
1135 f->fmt.pix.height * f->fmt.pix.bytesperline;
1136
1137 return 0;
1da177e4
LT		 1138}
1139
78b526a4 1140static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1141 struct v4l2_format *f)
1da177e4 1142{
8d87cb9f 1143 struct cx8800_fh *fh = priv;
78b526a4 1144 int err = vidioc_try_fmt_vid_cap (file,priv,f);
8d87cb9f
MCC		 1145
1146 if (0 != err)
1147 return err;
1148 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1149 fh->width = f->fmt.pix.width;
1150 fh->height = f->fmt.pix.height;
1151 fh->vidq.field = f->fmt.pix.field;
1152 return 0;
1da177e4
LT		 1153}
1154
8d87cb9f
MCC		 1155static int vidioc_querycap (struct file *file, void *priv,
1156 struct v4l2_capability *cap)
1da177e4 1157{
8d87cb9f 1158 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4 1159 struct cx88_core *core = dev->core;
1da177e4 1160
8d87cb9f 1161 strcpy(cap->driver, "cx8800");
6a59d64c 1162 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1163 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1164 cap->version = CX88_VERSION_CODE;
1165 cap->capabilities =
1166 V4L2_CAP_VIDEO_CAPTURE |
1167 V4L2_CAP_READWRITE |
1168 V4L2_CAP_STREAMING |
1169 V4L2_CAP_VBI_CAPTURE;
6a59d64c 1170 if (UNSET != core->board.tuner_type)
8d87cb9f
MCC		 1171 cap->capabilities |= V4L2_CAP_TUNER;
1172 return 0;
1173}
e52e98a7 1174
78b526a4 1175static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
8d87cb9f
MCC		 1176 struct v4l2_fmtdesc *f)
1177{
1178 if (unlikely(f->index >= ARRAY_SIZE(formats)))
1179 return -EINVAL;
1180
1181 strlcpy(f->description,formats[f->index].name,sizeof(f->description));
1182 f->pixelformat = formats[f->index].fourcc;
1183
1184 return 0;
1185}
1da177e4 1186
8d87cb9f
MCC		 1187static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
1188{
1189 struct cx8800_fh *fh = priv;
1190 return (videobuf_reqbufs(get_queue(fh), p));
1191}
e52e98a7 1192
8d87cb9f
MCC		 1193static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
1194{
1195 struct cx8800_fh *fh = priv;
1196 return (videobuf_querybuf(get_queue(fh), p));
1197}
e52e98a7 1198
8d87cb9f
MCC		 1199static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1200{
1201 struct cx8800_fh *fh = priv;
1202 return (videobuf_qbuf(get_queue(fh), p));
1203}
e52e98a7 1204
8d87cb9f
MCC		 1205static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1206{
1207 struct cx8800_fh *fh = priv;
1208 return (videobuf_dqbuf(get_queue(fh), p,
1209 file->f_flags & O_NONBLOCK));
1210}
e52e98a7 1211
8d87cb9f
MCC		 1212static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
1213{
1214 struct cx8800_fh *fh = priv;
1215 struct cx8800_dev *dev = fh->dev;
1216
b058e3f3
RD		 1217 /* We should remember that this driver also supports teletext, */
1218 /* so we have to test if the v4l2_buf_type is VBI capture data. */
1219 if (unlikely((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1220 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE)))
8d87cb9f 1221 return -EINVAL;
b058e3f3 1222
8d87cb9f
MCC		 1223 if (unlikely(i != fh->type))
1224 return -EINVAL;
1225
1226 if (unlikely(!res_get(dev,fh,get_ressource(fh))))
1227 return -EBUSY;
1228 return videobuf_streamon(get_queue(fh));
1229}
1230
1231static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1232{
1233 struct cx8800_fh *fh = priv;
1234 struct cx8800_dev *dev = fh->dev;
1235 int err, res;
1236
b058e3f3
RD		 1237 if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1238 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
8d87cb9f 1239 return -EINVAL;
b058e3f3 1240
8d87cb9f
MCC		 1241 if (i != fh->type)
1242 return -EINVAL;
1243
1244 res = get_ressource(fh);
1245 err = videobuf_streamoff(get_queue(fh));
1246 if (err < 0)
1247 return err;
1248 res_free(dev,fh,res);
e52e98a7
MCC		 1249 return 0;
1250}
1251
63ab1bdc 1252static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
e52e98a7 1253{
8d87cb9f 1254 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
e52e98a7 1255
8d87cb9f 1256 mutex_lock(&core->lock);
63ab1bdc 1257 cx88_set_tvnorm(core,*tvnorms);
8d87cb9f 1258 mutex_unlock(&core->lock);
63ab1bdc 1259
8d87cb9f
MCC		 1260 return 0;
1261}
1da177e4 1262
8d87cb9f 1263/* only one input in this sample driver */
54da49f5 1264int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
8d87cb9f 1265{
2e4e98e7 1266 static const char * const iname[] = {
8d87cb9f
MCC		 1267 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1268 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1269 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1270 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1271 [ CX88_VMUX_SVIDEO ] = "S-Video",
1272 [ CX88_VMUX_TELEVISION ] = "Television",
1273 [ CX88_VMUX_CABLE ] = "Cable TV",
1274 [ CX88_VMUX_DVB ] = "DVB",
1275 [ CX88_VMUX_DEBUG ] = "for debug only",
1276 };
f3334bcb 1277 unsigned int n = i->index;
1da177e4 1278
8d87cb9f
MCC		 1279 if (n >= 4)
1280 return -EINVAL;
6a59d64c 1281 if (0 == INPUT(n).type)
8d87cb9f 1282 return -EINVAL;
8d87cb9f 1283 i->type = V4L2_INPUT_TYPE_CAMERA;
6a59d64c
TP		 1284 strcpy(i->name,iname[INPUT(n).type]);
1285 if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
473d8024 1286 (CX88_VMUX_CABLE == INPUT(n).type)) {
8d87cb9f 1287 i->type = V4L2_INPUT_TYPE_TUNER;
63ab1bdc 1288 i->std = CX88_NORMS;
473d8024 1289 }
8d87cb9f
MCC		 1290 return 0;
1291}
54da49f5
MCC		 1292EXPORT_SYMBOL(cx88_enum_input);
1293
1294static int vidioc_enum_input (struct file *file, void *priv,
1295 struct v4l2_input *i)
1296{
1297 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1298 return cx88_enum_input (core,i);
1299}
1da177e4 1300
8d87cb9f
MCC		 1301static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
1302{
1303 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1304
8d87cb9f
MCC		 1305 *i = core->input;
1306 return 0;
1307}
1da177e4 1308
8d87cb9f
MCC		 1309static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
1310{
1311 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1312
8d87cb9f
MCC		 1313 if (i >= 4)
1314 return -EINVAL;
1da177e4 1315
8d87cb9f
MCC		 1316 mutex_lock(&core->lock);
1317 cx88_newstation(core);
e90311a1 1318 cx88_video_mux(core,i);
8d87cb9f
MCC		 1319 mutex_unlock(&core->lock);
1320 return 0;
1321}
1da177e4 1322
1da177e4 1323
1da177e4 1324
8d87cb9f
MCC		 1325static int vidioc_queryctrl (struct file *file, void *priv,
1326 struct v4l2_queryctrl *qctrl)
1327{
6d04203c
FD		 1328 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1329
8d87cb9f
MCC		 1330 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
1331 if (unlikely(qctrl->id == 0))
1332 return -EINVAL;
6d04203c 1333 return cx8800_ctrl_query(core, qctrl);
8d87cb9f 1334}
1da177e4 1335
54da49f5 1336static int vidioc_g_ctrl (struct file *file, void *priv,
8d87cb9f
MCC		 1337 struct v4l2_control *ctl)
1338{
1339 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
54da49f5
MCC		 1340 return
1341 cx88_get_control(core,ctl);
1342}
1da177e4 1343
54da49f5
MCC		 1344static int vidioc_s_ctrl (struct file *file, void *priv,
1345 struct v4l2_control *ctl)
1346{
1347 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
8d87cb9f 1348 return
54da49f5 1349 cx88_set_control(core,ctl);
8d87cb9f
MCC		 1350}
1351
1352static int vidioc_g_tuner (struct file *file, void *priv,
1353 struct v4l2_tuner *t)
1354{
1355 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1356 u32 reg;
1da177e4 1357
6a59d64c 1358 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f 1359 return -EINVAL;
243d8c0f
MCC		 1360 if (0 != t->index)
1361 return -EINVAL;
a82decf6 1362
8d87cb9f
MCC		 1363 strcpy(t->name, "Television");
1364 t->type = V4L2_TUNER_ANALOG_TV;
1365 t->capability = V4L2_TUNER_CAP_NORM;
1366 t->rangehigh = 0xffffffffUL;
a82decf6 1367
8d87cb9f
MCC		 1368 cx88_get_stereo(core ,t);
1369 reg = cx_read(MO_DEVICE_STATUS);
1370 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1371 return 0;
1372}
41ef7c1e 1373
8d87cb9f
MCC		 1374static int vidioc_s_tuner (struct file *file, void *priv,
1375 struct v4l2_tuner *t)
1376{
1377 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
41ef7c1e 1378
6a59d64c 1379 if (UNSET == core->board.tuner_type)
8d87cb9f
MCC		 1380 return -EINVAL;
1381 if (0 != t->index)
1382 return -EINVAL;
c5287ba1 1383
8d87cb9f
MCC		 1384 cx88_set_stereo(core, t->audmode, 1);
1385 return 0;
1386}
902fc997 1387
8d87cb9f
MCC		 1388static int vidioc_g_frequency (struct file *file, void *priv,
1389 struct v4l2_frequency *f)
1390{
1391 struct cx8800_fh *fh = priv;
1392 struct cx88_core *core = fh->dev->core;
902fc997 1393
6a59d64c 1394 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1395 return -EINVAL;
1396
1397 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1398 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1399 f->frequency = core->freq;
1400
b8341e1d 1401 call_all(core, tuner, g_frequency, f);
1da177e4 1402
1da177e4
LT		 1403 return 0;
1404}
1405
54da49f5 1406int cx88_set_freq (struct cx88_core *core,
8d87cb9f 1407 struct v4l2_frequency *f)
1da177e4 1408{
6a59d64c 1409 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1410 return -EINVAL;
1411 if (unlikely(f->tuner != 0))
1412 return -EINVAL;
54da49f5 1413
8d87cb9f
MCC		 1414 mutex_lock(&core->lock);
1415 core->freq = f->frequency;
1416 cx88_newstation(core);
b8341e1d 1417 call_all(core, tuner, s_frequency, f);
c7b0ac05 1418
8d87cb9f
MCC		 1419 /* When changing channels it is required to reset TVAUDIO */
1420 msleep (10);
1421 cx88_set_tvaudio(core);
c7b0ac05 1422
8d87cb9f 1423 mutex_unlock(&core->lock);
54da49f5 1424
8d87cb9f 1425 return 0;
1da177e4 1426}
54da49f5
MCC		 1427EXPORT_SYMBOL(cx88_set_freq);
1428
1429static int vidioc_s_frequency (struct file *file, void *priv,
1430 struct v4l2_frequency *f)
1431{
1432 struct cx8800_fh *fh = priv;
1433 struct cx88_core *core = fh->dev->core;
1434
1435 if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
1436 return -EINVAL;
1437 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
1438 return -EINVAL;
1439
1440 return
1441 cx88_set_freq (core,f);
1442}
1da177e4 1443
dbbff48f
TP		 1444#ifdef CONFIG_VIDEO_ADV_DEBUG
1445static int vidioc_g_register (struct file *file, void *fh,
aecde8b5 1446 struct v4l2_dbg_register *reg)
dbbff48f
TP		 1447{
1448 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1449
aecde8b5 1450 if (!v4l2_chip_match_host(&reg->match))
dbbff48f
TP		 1451 return -EINVAL;
1452 /* cx2388x has a 24-bit register space */
aecde8b5
HV		 1453 reg->val = cx_read(reg->reg & 0xffffff);
1454 reg->size = 4;
dbbff48f
TP		 1455 return 0;
1456}
1457
1458static int vidioc_s_register (struct file *file, void *fh,
aecde8b5 1459 struct v4l2_dbg_register *reg)
dbbff48f
TP		 1460{
1461 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1462
aecde8b5 1463 if (!v4l2_chip_match_host(&reg->match))
dbbff48f 1464 return -EINVAL;
aecde8b5 1465 cx_write(reg->reg & 0xffffff, reg->val);
dbbff48f
TP		 1466 return 0;
1467}
1468#endif
8d87cb9f
MCC		 1469
1470/* ----------------------------------------------------------- */
1471/* RADIO ESPECIFIC IOCTLS */
1da177e4
LT		 1472/* ----------------------------------------------------------- */
1473
8d87cb9f
MCC		 1474static int radio_querycap (struct file *file, void *priv,
1475 struct v4l2_capability *cap)
1da177e4 1476{
8d87cb9f 1477 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4
LT		 1478 struct cx88_core *core = dev->core;
1479
8d87cb9f 1480 strcpy(cap->driver, "cx8800");
6a59d64c 1481 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1482 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1483 cap->version = CX88_VERSION_CODE;
1484 cap->capabilities = V4L2_CAP_TUNER;
1485 return 0;
1486}
1da177e4 1487
8d87cb9f
MCC		 1488static int radio_g_tuner (struct file *file, void *priv,
1489 struct v4l2_tuner *t)
1490{
1491 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1492
8d87cb9f
MCC		 1493 if (unlikely(t->index > 0))
1494 return -EINVAL;
1da177e4 1495
8d87cb9f
MCC		 1496 strcpy(t->name, "Radio");
1497 t->type = V4L2_TUNER_RADIO;
1da177e4 1498
b8341e1d 1499 call_all(core, tuner, g_tuner, t);
8d87cb9f
MCC		 1500 return 0;
1501}
1da177e4 1502
8d87cb9f
MCC		 1503static int radio_enum_input (struct file *file, void *priv,
1504 struct v4l2_input *i)
1505{
1506 if (i->index != 0)
1507 return -EINVAL;
1508 strcpy(i->name,"Radio");
1509 i->type = V4L2_INPUT_TYPE_TUNER;
a82decf6 1510
8d87cb9f
MCC		 1511 return 0;
1512}
a82decf6 1513
8d87cb9f
MCC		 1514static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
1515{
1516 if (unlikely(a->index))
1517 return -EINVAL;
a82decf6 1518
8d87cb9f
MCC		 1519 strcpy(a->name,"Radio");
1520 return 0;
1521}
a82decf6 1522
8d87cb9f 1523/* FIXME: Should add a standard for radio */
a82decf6 1524
8d87cb9f
MCC		 1525static int radio_s_tuner (struct file *file, void *priv,
1526 struct v4l2_tuner *t)
1527{
1528 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
a82decf6 1529
8d87cb9f
MCC		 1530 if (0 != t->index)
1531 return -EINVAL;
1da177e4 1532
b8341e1d 1533 call_all(core, tuner, s_tuner, t);
1da177e4 1534
8d87cb9f
MCC		 1535 return 0;
1536}
1da177e4 1537
8d87cb9f
MCC		 1538static int radio_s_audio (struct file *file, void *fh,
1539 struct v4l2_audio *a)
1540{
1541 return 0;
1542}
1da177e4 1543
8d87cb9f
MCC		 1544static int radio_s_input (struct file *file, void *fh, unsigned int i)
1545{
1da177e4 1546 return 0;
8d87cb9f 1547}
1da177e4 1548
8d87cb9f
MCC		 1549static int radio_queryctrl (struct file *file, void *priv,
1550 struct v4l2_queryctrl *c)
1da177e4 1551{
8d87cb9f
MCC		 1552 int i;
1553
1554 if (c->id < V4L2_CID_BASE ||
1555 c->id >= V4L2_CID_LASTP1)
1556 return -EINVAL;
6951803c
LR		 1557 if (c->id == V4L2_CID_AUDIO_MUTE ||
1558 c->id == V4L2_CID_AUDIO_VOLUME ||
1559 c->id == V4L2_CID_AUDIO_BALANCE) {
a41b2ea7 1560 for (i = 0; i < CX8800_CTLS; i++) {
8d87cb9f
MCC		 1561 if (cx8800_ctls[i].v.id == c->id)
1562 break;
a41b2ea7
DC		 1563 }
1564 if (i == CX8800_CTLS)
1565 return -EINVAL;
8d87cb9f
MCC		 1566 *c = cx8800_ctls[i].v;
1567 } else
1568 *c = no_ctl;
1569 return 0;
1570}
1da177e4
LT		 1571
1572/* ----------------------------------------------------------- */
1573
1574static void cx8800_vid_timeout(unsigned long data)
1575{
1576 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1577 struct cx88_core *core = dev->core;
1578 struct cx88_dmaqueue *q = &dev->vidq;
1579 struct cx88_buffer *buf;
1580 unsigned long flags;
1581
e52e98a7 1582 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1583
1584 cx_clear(MO_VID_DMACNTRL, 0x11);
1585 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1586
1587 spin_lock_irqsave(&dev->slock,flags);
1588 while (!list_empty(&q->active)) {
1589 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1590 list_del(&buf->vb.queue);
0fc0686e 1591 buf->vb.state = VIDEOBUF_ERROR;
1da177e4
LT		 1592 wake_up(&buf->vb.done);
1593 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1594 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1595 }
1596 restart_video_queue(dev,q);
1597 spin_unlock_irqrestore(&dev->slock,flags);
1598}
1599
2e4e98e7 1600static const char *cx88_vid_irqs[32] = {
41ef7c1e
MCC		 1601 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1602 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1603 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1604 "y_sync", "u_sync", "v_sync", "vbi_sync",
1605 "opc_err", "par_err", "rip_err", "pci_abort",
1606};
1607
1da177e4
LT		 1608static void cx8800_vid_irq(struct cx8800_dev *dev)
1609{
1610 struct cx88_core *core = dev->core;
1611 u32 status, mask, count;
1612
1613 status = cx_read(MO_VID_INTSTAT);
1614 mask = cx_read(MO_VID_INTMSK);
1615 if (0 == (status & mask))
1616 return;
1617 cx_write(MO_VID_INTSTAT, status);
1618 if (irq_debug || (status & mask & ~0xff))
1619 cx88_print_irqbits(core->name, "irq vid",
66623a04
MCC		 1620 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1621 status, mask);
1da177e4
LT		 1622
1623 /* risc op code error */
1624 if (status & (1 << 16)) {
1625 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1626 cx_clear(MO_VID_DMACNTRL, 0x11);
1627 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1628 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1629 }
1630
1631 /* risc1 y */
1632 if (status & 0x01) {
1633 spin_lock(&dev->slock);
1634 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1635 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1636 spin_unlock(&dev->slock);
1637 }
1638
1639 /* risc1 vbi */
1640 if (status & 0x08) {
1641 spin_lock(&dev->slock);
1642 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1643 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1644 spin_unlock(&dev->slock);
1645 }
1646
1647 /* risc2 y */
1648 if (status & 0x10) {
1649 dprintk(2,"stopper video\n");
1650 spin_lock(&dev->slock);
1651 restart_video_queue(dev,&dev->vidq);
1652 spin_unlock(&dev->slock);
1653 }
1654
1655 /* risc2 vbi */
1656 if (status & 0x80) {
1657 dprintk(2,"stopper vbi\n");
1658 spin_lock(&dev->slock);
1659 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1660 spin_unlock(&dev->slock);
1661 }
1662}
1663
7d12e780 1664static irqreturn_t cx8800_irq(int irq, void *dev_id)
1da177e4
LT		 1665{
1666 struct cx8800_dev *dev = dev_id;
1667 struct cx88_core *core = dev->core;
1668 u32 status;
1669 int loop, handled = 0;
1670
1671 for (loop = 0; loop < 10; loop++) {
8ddac9ee
TP		 1672 status = cx_read(MO_PCI_INTSTAT) &
1673 (core->pci_irqmask | PCI_INT_VIDINT);
1da177e4
LT		 1674 if (0 == status)
1675 goto out;
1676 cx_write(MO_PCI_INTSTAT, status);
1677 handled = 1;
1678
1679 if (status & core->pci_irqmask)
1680 cx88_core_irq(core,status);
8ddac9ee 1681 if (status & PCI_INT_VIDINT)
1da177e4
LT		 1682 cx8800_vid_irq(dev);
1683 };
1684 if (10 == loop) {
1685 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1686 core->name);
1687 cx_write(MO_PCI_INTMSK,0);
1688 }
1689
1690 out:
1691 return IRQ_RETVAL(handled);
1692}
1693
1694/* ----------------------------------------------------------- */
1695/* exported stuff */
1696
bec43661 1697static const struct v4l2_file_operations video_fops =
1da177e4
LT		 1698{
1699 .owner = THIS_MODULE,
1700 .open = video_open,
1701 .release = video_release,
1702 .read = video_read,
1703 .poll = video_poll,
1704 .mmap = video_mmap,
b6187264 1705 .unlocked_ioctl = video_ioctl2,
1da177e4
LT		 1706};
1707
a399810c 1708static const struct v4l2_ioctl_ops video_ioctl_ops = {
8d87cb9f 1709 .vidioc_querycap = vidioc_querycap,
78b526a4
HV		 1710 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1711 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1712 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1713 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1714 .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
1715 .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
1716 .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
8d87cb9f
MCC		 1717 .vidioc_reqbufs = vidioc_reqbufs,
1718 .vidioc_querybuf = vidioc_querybuf,
1719 .vidioc_qbuf = vidioc_qbuf,
1720 .vidioc_dqbuf = vidioc_dqbuf,
1721 .vidioc_s_std = vidioc_s_std,
1722 .vidioc_enum_input = vidioc_enum_input,
1723 .vidioc_g_input = vidioc_g_input,
1724 .vidioc_s_input = vidioc_s_input,
1725 .vidioc_queryctrl = vidioc_queryctrl,
1726 .vidioc_g_ctrl = vidioc_g_ctrl,
1727 .vidioc_s_ctrl = vidioc_s_ctrl,
1728 .vidioc_streamon = vidioc_streamon,
1729 .vidioc_streamoff = vidioc_streamoff,
8d87cb9f
MCC		 1730 .vidioc_g_tuner = vidioc_g_tuner,
1731 .vidioc_s_tuner = vidioc_s_tuner,
1732 .vidioc_g_frequency = vidioc_g_frequency,
1733 .vidioc_s_frequency = vidioc_s_frequency,
dbbff48f
TP		 1734#ifdef CONFIG_VIDEO_ADV_DEBUG
1735 .vidioc_g_register = vidioc_g_register,
1736 .vidioc_s_register = vidioc_s_register,
1737#endif
a399810c
HV		 1738};
1739
1740static struct video_device cx8800_vbi_template;
1741
2e4e98e7 1742static const struct video_device cx8800_video_template = {
a399810c 1743 .name = "cx8800-video",
a399810c 1744 .fops = &video_fops,
a399810c 1745 .ioctl_ops = &video_ioctl_ops,
63ab1bdc 1746 .tvnorms = CX88_NORMS,
dbbff48f 1747 .current_norm = V4L2_STD_NTSC_M,
1da177e4
LT		 1748};
1749
bec43661 1750static const struct v4l2_file_operations radio_fops =
1da177e4
LT		 1751{
1752 .owner = THIS_MODULE,
1753 .open = video_open,
1754 .release = video_release,
b6187264 1755 .unlocked_ioctl = video_ioctl2,
1da177e4
LT		 1756};
1757
a399810c 1758static const struct v4l2_ioctl_ops radio_ioctl_ops = {
8d87cb9f
MCC		 1759 .vidioc_querycap = radio_querycap,
1760 .vidioc_g_tuner = radio_g_tuner,
1761 .vidioc_enum_input = radio_enum_input,
1762 .vidioc_g_audio = radio_g_audio,
1763 .vidioc_s_tuner = radio_s_tuner,
1764 .vidioc_s_audio = radio_s_audio,
1765 .vidioc_s_input = radio_s_input,
1766 .vidioc_queryctrl = radio_queryctrl,
1767 .vidioc_g_ctrl = vidioc_g_ctrl,
1768 .vidioc_s_ctrl = vidioc_s_ctrl,
1769 .vidioc_g_frequency = vidioc_g_frequency,
1770 .vidioc_s_frequency = vidioc_s_frequency,
a75d2048
TP		 1771#ifdef CONFIG_VIDEO_ADV_DEBUG
1772 .vidioc_g_register = vidioc_g_register,
1773 .vidioc_s_register = vidioc_s_register,
1774#endif
1da177e4
LT		 1775};
1776
2e4e98e7 1777static const struct video_device cx8800_radio_template = {
a399810c 1778 .name = "cx8800-radio",
a399810c 1779 .fops = &radio_fops,
a399810c
HV		 1780 .ioctl_ops = &radio_ioctl_ops,
1781};
1782
1da177e4
LT		 1783/* ----------------------------------------------------------- */
1784
1785static void cx8800_unregister_video(struct cx8800_dev *dev)
1786{
1787 if (dev->radio_dev) {
f0813b4c 1788 if (video_is_registered(dev->radio_dev))
1da177e4
LT		 1789 video_unregister_device(dev->radio_dev);
1790 else
1791 video_device_release(dev->radio_dev);
1792 dev->radio_dev = NULL;
1793 }
1794 if (dev->vbi_dev) {
f0813b4c 1795 if (video_is_registered(dev->vbi_dev))
1da177e4
LT		 1796 video_unregister_device(dev->vbi_dev);
1797 else
1798 video_device_release(dev->vbi_dev);
1799 dev->vbi_dev = NULL;
1800 }
1801 if (dev->video_dev) {
f0813b4c 1802 if (video_is_registered(dev->video_dev))
1da177e4
LT		 1803 video_unregister_device(dev->video_dev);
1804 else
1805 video_device_release(dev->video_dev);
1806 dev->video_dev = NULL;
1807 }
1808}
1809
1810static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1811 const struct pci_device_id *pci_id)
1812{
1813 struct cx8800_dev *dev;
1814 struct cx88_core *core;
8d87cb9f 1815
1da177e4
LT		 1816 int err;
1817
7408187d 1818 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1819 if (NULL == dev)
1820 return -ENOMEM;
1da177e4
LT		 1821
1822 /* pci init */
1823 dev->pci = pci_dev;
1824 if (pci_enable_device(pci_dev)) {
1825 err = -EIO;
1826 goto fail_free;
1827 }
1828 core = cx88_core_get(dev->pci);
1829 if (NULL == core) {
1830 err = -EINVAL;
1831 goto fail_free;
1832 }
1833 dev->core = core;
1834
1835 /* print pci info */
abd34d8d 1836 dev->pci_rev = pci_dev->revision;
4ac97914
MCC		 1837 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1838 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
228aef63 1839 "latency: %d, mmio: 0x%llx\n", core->name,
1da177e4 1840 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
228aef63 1841 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1da177e4
LT		 1842
1843 pci_set_master(pci_dev);
284901a9 1844 if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
1da177e4
LT		 1845 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1846 err = -EIO;
1847 goto fail_core;
1848 }
1849
8d87cb9f
MCC		 1850 /* Initialize VBI template */
1851 memcpy( &cx8800_vbi_template, &cx8800_video_template,
1852 sizeof(cx8800_vbi_template) );
1853 strcpy(cx8800_vbi_template.name,"cx8800-vbi");
8d87cb9f 1854
1da177e4 1855 /* initialize driver struct */
1da177e4 1856 spin_lock_init(&dev->slock);
63ab1bdc 1857 core->tvnorm = cx8800_video_template.current_norm;
1da177e4
LT		 1858
1859 /* init video dma queues */
1860 INIT_LIST_HEAD(&dev->vidq.active);
1861 INIT_LIST_HEAD(&dev->vidq.queued);
1862 dev->vidq.timeout.function = cx8800_vid_timeout;
1863 dev->vidq.timeout.data = (unsigned long)dev;
1864 init_timer(&dev->vidq.timeout);
1865 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1866 MO_VID_DMACNTRL,0x11,0x00);
1867
1868 /* init vbi dma queues */
1869 INIT_LIST_HEAD(&dev->vbiq.active);
1870 INIT_LIST_HEAD(&dev->vbiq.queued);
1871 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1872 dev->vbiq.timeout.data = (unsigned long)dev;
1873 init_timer(&dev->vbiq.timeout);
1874 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1875 MO_VID_DMACNTRL,0x88,0x00);
1876
1877 /* get irq */
1878 err = request_irq(pci_dev->irq, cx8800_irq,
8076fe32 1879 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1da177e4 1880 if (err < 0) {
5772f813 1881 printk(KERN_ERR "%s/0: can't get IRQ %d\n",
1da177e4
LT		 1882 core->name,pci_dev->irq);
1883 goto fail_core;
1884 }
1885 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1886
1887 /* load and configure helper modules */
e52e98a7 1888
6951803c
LR		 1889 if (core->board.audio_chip == V4L2_IDENT_WM8775) {
1890 struct i2c_board_info wm8775_info = {
1891 .type = "wm8775",
1892 .addr = 0x36 >> 1,
1893 .platform_data = &core->wm8775_data,
1894 };
1895 struct v4l2_subdev *sd;
1896
1897 if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
1898 core->wm8775_data.is_nova_s = true;
1899 else
1900 core->wm8775_data.is_nova_s = false;
1901
1902 sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
1903 &wm8775_info, NULL);
1904 if (sd != NULL)
1905 sd->grp_id = WM8775_GID;
1906 }
b8341e1d
HV		 1907
1908 if (core->board.audio_chip == V4L2_IDENT_TVAUDIO) {
1909 /* This probes for a tda9874 as is used on some
1910 Pixelview Ultra boards. */
9a1f8b34
LP		 1911 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
1912 "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
b8341e1d 1913 }
3057906d 1914
6fcecce7
MK		 1915 switch (core->boardnr) {
1916 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
b8341e1d 1917 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
2e4e98e7 1918 static const struct i2c_board_info rtc_info = {
b8341e1d
HV		 1919 I2C_BOARD_INFO("isl1208", 0x6f)
1920 };
1921
6fcecce7 1922 request_module("rtc-isl1208");
b8341e1d
HV		 1923 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
1924 }
8efd2e28
MK		 1925 /* break intentionally omitted */
1926 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1927 request_module("ir-kbd-i2c");
6fcecce7
MK		 1928 }
1929
121ec132
MCC		 1930 /* Sets device info at pci_dev */
1931 pci_set_drvdata(pci_dev, dev);
1932
1933 /* initial device configuration */
1934 mutex_lock(&core->lock);
1935 cx88_set_tvnorm(core, core->tvnorm);
1936 init_controls(core);
1937 cx88_video_mux(core, 0);
1938
1da177e4
LT		 1939 /* register v4l devices */
1940 dev->video_dev = cx88_vdev_init(core,dev->pci,
1941 &cx8800_video_template,"video");
63b0d5ad 1942 video_set_drvdata(dev->video_dev, dev);
1da177e4
LT		 1943 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1944 video_nr[core->nr]);
1945 if (err < 0) {
5772f813 1946 printk(KERN_ERR "%s/0: can't register video device\n",
1da177e4
LT		 1947 core->name);
1948 goto fail_unreg;
1949 }
38c7c036
LP		 1950 printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
1951 core->name, video_device_node_name(dev->video_dev));
1da177e4
LT		 1952
1953 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
63b0d5ad 1954 video_set_drvdata(dev->vbi_dev, dev);
1da177e4
LT		 1955 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1956 vbi_nr[core->nr]);
1957 if (err < 0) {
5772f813 1958 printk(KERN_ERR "%s/0: can't register vbi device\n",
1da177e4
LT		 1959 core->name);
1960 goto fail_unreg;
1961 }
38c7c036
LP		 1962 printk(KERN_INFO "%s/0: registered device %s\n",
1963 core->name, video_device_node_name(dev->vbi_dev));
1da177e4 1964
6a59d64c 1965 if (core->board.radio.type == CX88_RADIO) {
1da177e4
LT		 1966 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1967 &cx8800_radio_template,"radio");
63b0d5ad 1968 video_set_drvdata(dev->radio_dev, dev);
1da177e4
LT		 1969 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1970 radio_nr[core->nr]);
1971 if (err < 0) {
5772f813 1972 printk(KERN_ERR "%s/0: can't register radio device\n",
1da177e4
LT		 1973 core->name);
1974 goto fail_unreg;
1975 }
38c7c036
LP		 1976 printk(KERN_INFO "%s/0: registered device %s\n",
1977 core->name, video_device_node_name(dev->radio_dev));
1da177e4
LT		 1978 }
1979
1da177e4 1980 /* start tvaudio thread */
6a59d64c 1981 if (core->board.tuner_type != TUNER_ABSENT) {
1da177e4 1982 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
32b78de7
CG		 1983 if (IS_ERR(core->kthread)) {
1984 err = PTR_ERR(core->kthread);
5772f813
TP		 1985 printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
1986 core->name, err);
32b78de7
CG		 1987 }
1988 }
121ec132
MCC		 1989 mutex_unlock(&core->lock);
1990
1da177e4
LT		 1991 return 0;
1992
1993fail_unreg:
1994 cx8800_unregister_video(dev);
1995 free_irq(pci_dev->irq, dev);
121ec132 1996 mutex_unlock(&core->lock);
1da177e4
LT		 1997fail_core:
1998 cx88_core_put(core,dev->pci);
1999fail_free:
2000 kfree(dev);
2001 return err;
2002}
2003
2004static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
2005{
4ac97914 2006 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 2007 struct cx88_core *core = dev->core;
1da177e4
LT		 2008
2009 /* stop thread */
e52e98a7
MCC		 2010 if (core->kthread) {
2011 kthread_stop(core->kthread);
2012 core->kthread = NULL;
1da177e4
LT		 2013 }
2014
b12203d2 2015 if (core->ir)
92f4fc10 2016 cx88_ir_stop(core);
b12203d2 2017
e52e98a7 2018 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 2019 pci_disable_device(pci_dev);
2020
2021 /* unregister stuff */
2022
2023 free_irq(pci_dev->irq, dev);
2024 cx8800_unregister_video(dev);
2025 pci_set_drvdata(pci_dev, NULL);
2026
2027 /* free memory */
2028 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
e52e98a7 2029 cx88_core_put(core,dev->pci);
1da177e4
LT		 2030 kfree(dev);
2031}
2032
17bc98a4 2033#ifdef CONFIG_PM
1da177e4
LT		 2034static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
2035{
b45009b0 2036 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 2037 struct cx88_core *core = dev->core;
2038
2039 /* stop video+vbi capture */
2040 spin_lock(&dev->slock);
2041 if (!list_empty(&dev->vidq.active)) {
5772f813 2042 printk("%s/0: suspend video\n", core->name);
1da177e4
LT		 2043 stop_video_dma(dev);
2044 del_timer(&dev->vidq.timeout);
2045 }
2046 if (!list_empty(&dev->vbiq.active)) {
5772f813 2047 printk("%s/0: suspend vbi\n", core->name);
1da177e4
LT		 2048 cx8800_stop_vbi_dma(dev);
2049 del_timer(&dev->vbiq.timeout);
2050 }
2051 spin_unlock(&dev->slock);
2052
13595a51 2053 if (core->ir)
92f4fc10 2054 cx88_ir_stop(core);
1da177e4 2055 /* FIXME -- shutdown device */
e52e98a7 2056 cx88_shutdown(core);
1da177e4
LT		 2057
2058 pci_save_state(pci_dev);
2059 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
2060 pci_disable_device(pci_dev);
2061 dev->state.disabled = 1;
2062 }
2063 return 0;
2064}
2065
2066static int cx8800_resume(struct pci_dev *pci_dev)
2067{
b45009b0 2068 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 2069 struct cx88_core *core = dev->core;
08adb9e2 2070 int err;
1da177e4
LT		 2071
2072 if (dev->state.disabled) {
08adb9e2
MCC		 2073 err=pci_enable_device(pci_dev);
2074 if (err) {
5772f813
TP		 2075 printk(KERN_ERR "%s/0: can't enable device\n",
2076 core->name);
08adb9e2
MCC		 2077 return err;
2078 }
2079
1da177e4
LT		 2080 dev->state.disabled = 0;
2081 }
08adb9e2
MCC		 2082 err= pci_set_power_state(pci_dev, PCI_D0);
2083 if (err) {
5772f813 2084 printk(KERN_ERR "%s/0: can't set power state\n", core->name);
08adb9e2
MCC		 2085 pci_disable_device(pci_dev);
2086 dev->state.disabled = 1;
2087
2088 return err;
2089 }
1da177e4
LT		 2090 pci_restore_state(pci_dev);
2091
1da177e4 2092 /* FIXME: re-initialize hardware */
e52e98a7 2093 cx88_reset(core);
13595a51 2094 if (core->ir)
92f4fc10 2095 cx88_ir_start(core);
13595a51
MCC		 2096
2097 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1da177e4
LT		 2098
2099 /* restart video+vbi capture */
2100 spin_lock(&dev->slock);
2101 if (!list_empty(&dev->vidq.active)) {
5772f813 2102 printk("%s/0: resume video\n", core->name);
1da177e4
LT		 2103 restart_video_queue(dev,&dev->vidq);
2104 }
2105 if (!list_empty(&dev->vbiq.active)) {
5772f813 2106 printk("%s/0: resume vbi\n", core->name);
1da177e4
LT		 2107 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2108 }
2109 spin_unlock(&dev->slock);
2110
2111 return 0;
2112}
17bc98a4 2113#endif
1da177e4
LT		 2114
2115/* ----------------------------------------------------------- */
2116
2e4e98e7 2117static const struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2118 {
2119 .vendor = 0x14f1,
2120 .device = 0x8800,
b45009b0
MCC		 2121 .subvendor = PCI_ANY_ID,
2122 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2123 },{
2124 /* --- end of list --- */
2125 }
2126};
2127MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2128
2129static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2130 .name = "cx8800",
2131 .id_table = cx8800_pci_tbl,
2132 .probe = cx8800_initdev,
2133 .remove = __devexit_p(cx8800_finidev),
17bc98a4 2134#ifdef CONFIG_PM
1da177e4
LT		 2135 .suspend = cx8800_suspend,
2136 .resume = cx8800_resume,
17bc98a4 2137#endif
1da177e4
LT		 2138};
2139
31d0f845 2140static int __init cx8800_init(void)
1da177e4 2141{
5772f813 2142 printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n",
1da177e4
LT		 2143 (CX88_VERSION_CODE >> 16) & 0xff,
2144 (CX88_VERSION_CODE >> 8) & 0xff,
2145 CX88_VERSION_CODE & 0xff);
2146#ifdef SNAPSHOT
2147 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2148 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2149#endif
2150 return pci_register_driver(&cx8800_pci_driver);
2151}
2152
31d0f845 2153static void __exit cx8800_fini(void)
1da177e4
LT		 2154{
2155 pci_unregister_driver(&cx8800_pci_driver);
2156}
2157
2158module_init(cx8800_init);
2159module_exit(cx8800_fini);
2160
2161/* ----------------------------------------------------------- */
2162/*
2163 * Local variables:
2164 * c-basic-offset: 8
2165 * End:
b45009b0 2166 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2167 */
kernel source for telekom puls (alcatel/mediatek)