projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6 into...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8d87cb9f
MCC		 8 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
9 * - Multituner support
10 * - video_ioctl2 conversion
11 * - PAL/M fixes
12 *
1da177e4
LT		 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/init.h>
29#include <linux/list.h>
30#include <linux/module.h>
1da177e4
LT		 31#include <linux/kmod.h>
32#include <linux/kernel.h>
33#include <linux/slab.h>
34#include <linux/interrupt.h>
c24228da 35#include <linux/dma-mapping.h>
1da177e4
LT		 36#include <linux/delay.h>
37#include <linux/kthread.h>
38#include <asm/div64.h>
39
40#include "cx88.h"
5e453dc7 41#include <media/v4l2-common.h>
35ea11ff 42#include <media/v4l2-ioctl.h>
6951803c 43#include <media/wm8775.h>
1da177e4
LT		 44
45MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
46MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
47MODULE_LICENSE("GPL");
48
49/* ------------------------------------------------------------------ */
50
51static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
52static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
53static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
54
55module_param_array(video_nr, int, NULL, 0444);
56module_param_array(vbi_nr, int, NULL, 0444);
57module_param_array(radio_nr, int, NULL, 0444);
58
59MODULE_PARM_DESC(video_nr,"video device numbers");
60MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
61MODULE_PARM_DESC(radio_nr,"radio device numbers");
62
ff699e6b 63static unsigned int video_debug;
1da177e4
LT		 64module_param(video_debug,int,0644);
65MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
66
ff699e6b 67static unsigned int irq_debug;
1da177e4
LT		 68module_param(irq_debug,int,0644);
69MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
70
71static unsigned int vid_limit = 16;
72module_param(vid_limit,int,0644);
73MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
74
75#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 76 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4 77
1da177e4
LT		 78/* ------------------------------------------------------------------- */
79/* static data */
80
2e4e98e7 81static const struct cx8800_fmt formats[] = {
1da177e4
LT		 82 {
83 .name = "8 bpp, gray",
84 .fourcc = V4L2_PIX_FMT_GREY,
85 .cxformat = ColorFormatY8,
86 .depth = 8,
87 .flags = FORMAT_FLAGS_PACKED,
88 },{
89 .name = "15 bpp RGB, le",
90 .fourcc = V4L2_PIX_FMT_RGB555,
91 .cxformat = ColorFormatRGB15,
92 .depth = 16,
93 .flags = FORMAT_FLAGS_PACKED,
94 },{
95 .name = "15 bpp RGB, be",
96 .fourcc = V4L2_PIX_FMT_RGB555X,
97 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
98 .depth = 16,
99 .flags = FORMAT_FLAGS_PACKED,
100 },{
101 .name = "16 bpp RGB, le",
102 .fourcc = V4L2_PIX_FMT_RGB565,
103 .cxformat = ColorFormatRGB16,
104 .depth = 16,
105 .flags = FORMAT_FLAGS_PACKED,
106 },{
107 .name = "16 bpp RGB, be",
108 .fourcc = V4L2_PIX_FMT_RGB565X,
109 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
110 .depth = 16,
111 .flags = FORMAT_FLAGS_PACKED,
112 },{
113 .name = "24 bpp RGB, le",
114 .fourcc = V4L2_PIX_FMT_BGR24,
115 .cxformat = ColorFormatRGB24,
116 .depth = 24,
117 .flags = FORMAT_FLAGS_PACKED,
118 },{
119 .name = "32 bpp RGB, le",
120 .fourcc = V4L2_PIX_FMT_BGR32,
121 .cxformat = ColorFormatRGB32,
122 .depth = 32,
123 .flags = FORMAT_FLAGS_PACKED,
124 },{
125 .name = "32 bpp RGB, be",
126 .fourcc = V4L2_PIX_FMT_RGB32,
127 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
128 .depth = 32,
129 .flags = FORMAT_FLAGS_PACKED,
130 },{
131 .name = "4:2:2, packed, YUYV",
132 .fourcc = V4L2_PIX_FMT_YUYV,
133 .cxformat = ColorFormatYUY2,
134 .depth = 16,
135 .flags = FORMAT_FLAGS_PACKED,
136 },{
137 .name = "4:2:2, packed, UYVY",
138 .fourcc = V4L2_PIX_FMT_UYVY,
139 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
140 .depth = 16,
141 .flags = FORMAT_FLAGS_PACKED,
142 },
143};
144
2e4e98e7 145static const struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
1da177e4
LT		 146{
147 unsigned int i;
148
149 for (i = 0; i < ARRAY_SIZE(formats); i++)
150 if (formats[i].fourcc == fourcc)
151 return formats+i;
152 return NULL;
153}
154
155/* ------------------------------------------------------------------- */
156
157static const struct v4l2_queryctrl no_ctl = {
158 .name = "42",
159 .flags = V4L2_CTRL_FLAG_DISABLED,
160};
161
2e4e98e7 162static const struct cx88_ctrl cx8800_ctls[] = {
1da177e4
LT		 163 /* --- video --- */
164 {
165 .v = {
166 .id = V4L2_CID_BRIGHTNESS,
167 .name = "Brightness",
168 .minimum = 0x00,
169 .maximum = 0xff,
170 .step = 1,
9f9c907f 171 .default_value = 0x7f,
1da177e4
LT		 172 .type = V4L2_CTRL_TYPE_INTEGER,
173 },
174 .off = 128,
175 .reg = MO_CONTR_BRIGHT,
176 .mask = 0x00ff,
177 .shift = 0,
178 },{
179 .v = {
180 .id = V4L2_CID_CONTRAST,
181 .name = "Contrast",
182 .minimum = 0,
183 .maximum = 0xff,
184 .step = 1,
70f00044 185 .default_value = 0x3f,
1da177e4
LT		 186 .type = V4L2_CTRL_TYPE_INTEGER,
187 },
41ef7c1e 188 .off = 0,
1da177e4
LT		 189 .reg = MO_CONTR_BRIGHT,
190 .mask = 0xff00,
191 .shift = 8,
192 },{
193 .v = {
194 .id = V4L2_CID_HUE,
195 .name = "Hue",
196 .minimum = 0,
197 .maximum = 0xff,
198 .step = 1,
9f9c907f 199 .default_value = 0x7f,
1da177e4
LT		 200 .type = V4L2_CTRL_TYPE_INTEGER,
201 },
9ac4c158 202 .off = 128,
1da177e4
LT		 203 .reg = MO_HUE,
204 .mask = 0x00ff,
205 .shift = 0,
206 },{
207 /* strictly, this only describes only U saturation.
208 * V saturation is handled specially through code.
209 */
210 .v = {
211 .id = V4L2_CID_SATURATION,
212 .name = "Saturation",
213 .minimum = 0,
214 .maximum = 0xff,
215 .step = 1,
70f00044 216 .default_value = 0x7f,
1da177e4
LT		 217 .type = V4L2_CTRL_TYPE_INTEGER,
218 },
219 .off = 0,
220 .reg = MO_UV_SATURATION,
221 .mask = 0x00ff,
222 .shift = 0,
223 },{
6d04203c
FD		 224 .v = {
225 .id = V4L2_CID_CHROMA_AGC,
226 .name = "Chroma AGC",
227 .minimum = 0,
228 .maximum = 1,
87a17389 229 .default_value = 0x1,
6d04203c
FD		 230 .type = V4L2_CTRL_TYPE_BOOLEAN,
231 },
232 .reg = MO_INPUT_FORMAT,
233 .mask = 1 << 10,
234 .shift = 10,
1b879c43
FD		 235 }, {
236 .v = {
237 .id = V4L2_CID_COLOR_KILLER,
238 .name = "Color killer",
239 .minimum = 0,
240 .maximum = 1,
0b5afdd2 241 .default_value = 0x1,
1b879c43
FD		 242 .type = V4L2_CTRL_TYPE_BOOLEAN,
243 },
244 .reg = MO_INPUT_FORMAT,
245 .mask = 1 << 9,
246 .shift = 9,
6d04203c 247 }, {
1da177e4
LT		 248 /* --- audio --- */
249 .v = {
250 .id = V4L2_CID_AUDIO_MUTE,
251 .name = "Mute",
252 .minimum = 0,
253 .maximum = 1,
70f00044 254 .default_value = 1,
1da177e4
LT		 255 .type = V4L2_CTRL_TYPE_BOOLEAN,
256 },
257 .reg = AUD_VOL_CTL,
258 .sreg = SHADOW_AUD_VOL_CTL,
259 .mask = (1 << 6),
260 .shift = 6,
261 },{
262 .v = {
263 .id = V4L2_CID_AUDIO_VOLUME,
264 .name = "Volume",
265 .minimum = 0,
266 .maximum = 0x3f,
267 .step = 1,
9f9c907f 268 .default_value = 0x3f,
1da177e4
LT		 269 .type = V4L2_CTRL_TYPE_INTEGER,
270 },
271 .reg = AUD_VOL_CTL,
272 .sreg = SHADOW_AUD_VOL_CTL,
273 .mask = 0x3f,
274 .shift = 0,
275 },{
276 .v = {
277 .id = V4L2_CID_AUDIO_BALANCE,
278 .name = "Balance",
279 .minimum = 0,
280 .maximum = 0x7f,
281 .step = 1,
282 .default_value = 0x40,
283 .type = V4L2_CTRL_TYPE_INTEGER,
284 },
285 .reg = AUD_BAL_CTL,
286 .sreg = SHADOW_AUD_BAL_CTL,
287 .mask = 0x7f,
288 .shift = 0,
289 }
290};
2e4e98e7 291enum { CX8800_CTLS = ARRAY_SIZE(cx8800_ctls) };
1da177e4 292
2ba58894 293/* Must be sorted from low to high control ID! */
38a2713a
MK		 294const u32 cx88_user_ctrls[] = {
295 V4L2_CID_USER_CLASS,
296 V4L2_CID_BRIGHTNESS,
297 V4L2_CID_CONTRAST,
298 V4L2_CID_SATURATION,
299 V4L2_CID_HUE,
300 V4L2_CID_AUDIO_VOLUME,
301 V4L2_CID_AUDIO_BALANCE,
302 V4L2_CID_AUDIO_MUTE,
6d04203c 303 V4L2_CID_CHROMA_AGC,
1b879c43 304 V4L2_CID_COLOR_KILLER,
38a2713a
MK		 305 0
306};
307EXPORT_SYMBOL(cx88_user_ctrls);
308
2e4e98e7 309static const u32 * const ctrl_classes[] = {
38a2713a
MK		 310 cx88_user_ctrls,
311 NULL
312};
313
6d04203c 314int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl)
38a2713a
MK		 315{
316 int i;
317
318 if (qctrl->id < V4L2_CID_BASE ||
319 qctrl->id >= V4L2_CID_LASTP1)
320 return -EINVAL;
321 for (i = 0; i < CX8800_CTLS; i++)
322 if (cx8800_ctls[i].v.id == qctrl->id)
323 break;
324 if (i == CX8800_CTLS) {
325 *qctrl = no_ctl;
326 return 0;
327 }
328 *qctrl = cx8800_ctls[i].v;
6d04203c
FD		 329 /* Report chroma AGC as inactive when SECAM is selected */
330 if (cx8800_ctls[i].v.id == V4L2_CID_CHROMA_AGC &&
331 core->tvnorm & V4L2_STD_SECAM)
332 qctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
333
38a2713a
MK		 334 return 0;
335}
336EXPORT_SYMBOL(cx8800_ctrl_query);
337
1da177e4
LT		 338/* ------------------------------------------------------------------- */
339/* resource management */
340
341static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
342{
e52e98a7 343 struct cx88_core *core = dev->core;
1da177e4
LT		 344 if (fh->resources & bit)
345 /* have it already allocated */
346 return 1;
347
348 /* is it free? */
3593cab5 349 mutex_lock(&core->lock);
1da177e4
LT		 350 if (dev->resources & bit) {
351 /* no, someone else uses it */
3593cab5 352 mutex_unlock(&core->lock);
1da177e4
LT		 353 return 0;
354 }
355 /* it's free, grab it */
356 fh->resources |= bit;
357 dev->resources |= bit;
358 dprintk(1,"res: get %d\n",bit);
3593cab5 359 mutex_unlock(&core->lock);
1da177e4
LT		 360 return 1;
361}
362
363static
364int res_check(struct cx8800_fh *fh, unsigned int bit)
365{
366 return (fh->resources & bit);
367}
368
369static
370int res_locked(struct cx8800_dev *dev, unsigned int bit)
371{
372 return (dev->resources & bit);
373}
374
375static
376void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
377{
e52e98a7 378 struct cx88_core *core = dev->core;
ae24601b 379 BUG_ON((fh->resources & bits) != bits);
1da177e4 380
3593cab5 381 mutex_lock(&core->lock);
1da177e4
LT		 382 fh->resources &= ~bits;
383 dev->resources &= ~bits;
384 dprintk(1,"res: put %d\n",bits);
3593cab5 385 mutex_unlock(&core->lock);
1da177e4
LT		 386}
387
388/* ------------------------------------------------------------------ */
389
e90311a1 390int cx88_video_mux(struct cx88_core *core, unsigned int input)
1da177e4 391{
e52e98a7 392 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 393
394 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
6a59d64c
TP		 395 input, INPUT(input).vmux,
396 INPUT(input).gpio0,INPUT(input).gpio1,
397 INPUT(input).gpio2,INPUT(input).gpio3);
e52e98a7 398 core->input = input;
6a59d64c
TP		 399 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
400 cx_write(MO_GP3_IO, INPUT(input).gpio3);
401 cx_write(MO_GP0_IO, INPUT(input).gpio0);
402 cx_write(MO_GP1_IO, INPUT(input).gpio1);
403 cx_write(MO_GP2_IO, INPUT(input).gpio2);
1da177e4 404
6a59d64c 405 switch (INPUT(input).type) {
1da177e4
LT		 406 case CX88_VMUX_SVIDEO:
407 cx_set(MO_AFECFG_IO, 0x00000001);
408 cx_set(MO_INPUT_FORMAT, 0x00010010);
409 cx_set(MO_FILTER_EVEN, 0x00002020);
410 cx_set(MO_FILTER_ODD, 0x00002020);
411 break;
412 default:
413 cx_clear(MO_AFECFG_IO, 0x00000001);
414 cx_clear(MO_INPUT_FORMAT, 0x00010010);
415 cx_clear(MO_FILTER_EVEN, 0x00002020);
416 cx_clear(MO_FILTER_ODD, 0x00002020);
417 break;
418 }
f24546a9 419
66e6fbdf
RC		 420 /* if there are audioroutes defined, we have an external
421 ADC to deal with audio */
66e6fbdf 422 if (INPUT(input).audioroute) {
66e6fbdf
RC		 423 /* The wm8775 module has the "2" route hardwired into
424 the initialization. Some boards may use different
425 routes for different inputs. HVR-1300 surely does */
426 if (core->board.audio_chip &&
38f9d308 427 core->board.audio_chip == V4L2_IDENT_WM8775) {
5325b427 428 call_all(core, audio, s_routing,
6e1f4df7 429 INPUT(input).audioroute, 0, 0);
66e6fbdf 430 }
430189da
DB		 431 /* cx2388's C-ADC is connected to the tuner only.
432 When used with S-Video, that ADC is busy dealing with
433 chroma, so an external must be used for baseband audio */
6e1f4df7 434 if (INPUT(input).type != CX88_VMUX_TELEVISION &&
435 INPUT(input).type != CX88_VMUX_CABLE) {
430189da
DB		 436 /* "I2S ADC mode" */
437 core->tvaudio = WW_I2SADC;
438 cx88_set_tvaudio(core);
439 } else {
440 /* Normal mode */
441 cx_write(AUD_I2SCNTL, 0x0);
442 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
443 }
f24546a9 444 }
66e6fbdf 445
1da177e4
LT		 446 return 0;
447}
e90311a1 448EXPORT_SYMBOL(cx88_video_mux);
1da177e4
LT		 449
450/* ------------------------------------------------------------------ */
451
452static int start_video_dma(struct cx8800_dev *dev,
453 struct cx88_dmaqueue *q,
454 struct cx88_buffer *buf)
455{
456 struct cx88_core *core = dev->core;
457
458 /* setup fifo + format */
e52e98a7 459 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 460 buf->bpl, buf->risc.dma);
e52e98a7 461 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 462 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
463
464 /* reset counter */
465 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
466 q->count = 1;
467
468 /* enable irqs */
8ddac9ee 469 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
e52e98a7
MCC		 470
471 /* Enables corresponding bits at PCI_INT_STAT:
472 bits 0 to 4: video, audio, transport stream, VIP, Host
473 bit 7: timer
474 bits 8 and 9: DMA complete for: SRC, DST
475 bits 10 and 11: BERR signal asserted for RISC: RD, WR
476 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
477 */
1da177e4
LT		 478 cx_set(MO_VID_INTMSK, 0x0f0011);
479
480 /* enable capture */
481 cx_set(VID_CAPTURE_CONTROL,0x06);
482
483 /* start dma */
484 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 485 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 486
487 return 0;
488}
489
17bc98a4 490#ifdef CONFIG_PM
1da177e4
LT		 491static int stop_video_dma(struct cx8800_dev *dev)
492{
493 struct cx88_core *core = dev->core;
494
495 /* stop dma */
496 cx_clear(MO_VID_DMACNTRL, 0x11);
497
498 /* disable capture */
499 cx_clear(VID_CAPTURE_CONTROL,0x06);
500
501 /* disable irqs */
8ddac9ee 502 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
1da177e4
LT		 503 cx_clear(MO_VID_INTMSK, 0x0f0011);
504 return 0;
505}
17bc98a4 506#endif
1da177e4
LT		 507
508static int restart_video_queue(struct cx8800_dev *dev,
509 struct cx88_dmaqueue *q)
510{
e52e98a7 511 struct cx88_core *core = dev->core;
1da177e4 512 struct cx88_buffer *buf, *prev;
1da177e4
LT		 513
514 if (!list_empty(&q->active)) {
4ac97914 515 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 516 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
517 buf, buf->vb.i);
518 start_video_dma(dev, q, buf);
8bb629e2
TP		 519 list_for_each_entry(buf, &q->active, vb.queue)
520 buf->count = q->count++;
1da177e4
LT		 521 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
522 return 0;
523 }
524
525 prev = NULL;
526 for (;;) {
527 if (list_empty(&q->queued))
528 return 0;
4ac97914 529 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4 530 if (NULL == prev) {
179e0917 531 list_move_tail(&buf->vb.queue, &q->active);
1da177e4 532 start_video_dma(dev, q, buf);
0fc0686e 533 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 534 buf->count = q->count++;
535 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
536 dprintk(2,"[%p/%d] restart_queue - first active\n",
537 buf,buf->vb.i);
538
539 } else if (prev->vb.width == buf->vb.width &&
540 prev->vb.height == buf->vb.height &&
541 prev->fmt == buf->fmt) {
179e0917 542 list_move_tail(&buf->vb.queue, &q->active);
0fc0686e 543 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 544 buf->count = q->count++;
545 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
546 dprintk(2,"[%p/%d] restart_queue - move to active\n",
547 buf,buf->vb.i);
548 } else {
549 return 0;
550 }
551 prev = buf;
552 }
553}
554
555/* ------------------------------------------------------------------ */
556
557static int
558buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
559{
560 struct cx8800_fh *fh = q->priv_data;
561
562 *size = fh->fmt->depth*fh->width*fh->height >> 3;
563 if (0 == *count)
564 *count = 32;
dab7e310
AB		 565 if (*size * *count > vid_limit * 1024 * 1024)
566 *count = (vid_limit * 1024 * 1024) / *size;
1da177e4
LT		 567 return 0;
568}
569
570static int
571buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
572 enum v4l2_field field)
573{
574 struct cx8800_fh *fh = q->priv_data;
575 struct cx8800_dev *dev = fh->dev;
e52e98a7 576 struct cx88_core *core = dev->core;
1da177e4 577 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
c1accaa2 578 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
1da177e4
LT		 579 int rc, init_buffer = 0;
580
581 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 582 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
583 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 584 return -EINVAL;
585 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
586 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
587 return -EINVAL;
588
589 if (buf->fmt != fh->fmt ||
590 buf->vb.width != fh->width ||
591 buf->vb.height != fh->height ||
592 buf->vb.field != field) {
593 buf->fmt = fh->fmt;
594 buf->vb.width = fh->width;
595 buf->vb.height = fh->height;
596 buf->vb.field = field;
597 init_buffer = 1;
598 }
599
0fc0686e 600 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
1da177e4 601 init_buffer = 1;
c7b0ac05 602 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
1da177e4
LT		 603 goto fail;
604 }
605
606 if (init_buffer) {
607 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
608 switch (buf->vb.field) {
609 case V4L2_FIELD_TOP:
610 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 611 dma->sglist, 0, UNSET,
1da177e4
LT		 612 buf->bpl, 0, buf->vb.height);
613 break;
614 case V4L2_FIELD_BOTTOM:
615 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 616 dma->sglist, UNSET, 0,
1da177e4
LT		 617 buf->bpl, 0, buf->vb.height);
618 break;
619 case V4L2_FIELD_INTERLACED:
620 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 621 dma->sglist, 0, buf->bpl,
1da177e4
LT		 622 buf->bpl, buf->bpl,
623 buf->vb.height >> 1);
624 break;
625 case V4L2_FIELD_SEQ_TB:
626 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 627 dma->sglist,
1da177e4
LT		 628 0, buf->bpl * (buf->vb.height >> 1),
629 buf->bpl, 0,
630 buf->vb.height >> 1);
631 break;
632 case V4L2_FIELD_SEQ_BT:
633 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 634 dma->sglist,
1da177e4
LT		 635 buf->bpl * (buf->vb.height >> 1), 0,
636 buf->bpl, 0,
637 buf->vb.height >> 1);
638 break;
639 default:
640 BUG();
641 }
642 }
643 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
644 buf, buf->vb.i,
645 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
646 (unsigned long)buf->risc.dma);
647
0fc0686e 648 buf->vb.state = VIDEOBUF_PREPARED;
1da177e4
LT		 649 return 0;
650
651 fail:
c7b0ac05 652 cx88_free_buffer(q,buf);
1da177e4
LT		 653 return rc;
654}
655
656static void
657buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
658{
659 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
660 struct cx88_buffer *prev;
661 struct cx8800_fh *fh = vq->priv_data;
662 struct cx8800_dev *dev = fh->dev;
e52e98a7 663 struct cx88_core *core = dev->core;
1da177e4
LT		 664 struct cx88_dmaqueue *q = &dev->vidq;
665
666 /* add jump to stopper */
667 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
668 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
669
670 if (!list_empty(&q->queued)) {
671 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 672 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 673 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
674 buf, buf->vb.i);
675
676 } else if (list_empty(&q->active)) {
677 list_add_tail(&buf->vb.queue,&q->active);
678 start_video_dma(dev, q, buf);
0fc0686e 679 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 680 buf->count = q->count++;
681 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
682 dprintk(2,"[%p/%d] buffer_queue - first active\n",
683 buf, buf->vb.i);
684
685 } else {
686 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
687 if (prev->vb.width == buf->vb.width &&
688 prev->vb.height == buf->vb.height &&
689 prev->fmt == buf->fmt) {
690 list_add_tail(&buf->vb.queue,&q->active);
0fc0686e 691 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 692 buf->count = q->count++;
693 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
694 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
695 buf, buf->vb.i);
696
697 } else {
698 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 699 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 700 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
701 buf, buf->vb.i);
702 }
703 }
704}
705
706static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
707{
708 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
1da177e4 709
c7b0ac05 710 cx88_free_buffer(q,buf);
1da177e4
LT		 711}
712
2e4e98e7 713static const struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 714 .buf_setup = buffer_setup,
715 .buf_prepare = buffer_prepare,
716 .buf_queue = buffer_queue,
717 .buf_release = buffer_release,
718};
719
720/* ------------------------------------------------------------------ */
721
1da177e4
LT		 722
723/* ------------------------------------------------------------------ */
724
725static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
726{
727 switch (fh->type) {
728 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
729 return &fh->vidq;
730 case V4L2_BUF_TYPE_VBI_CAPTURE:
731 return &fh->vbiq;
732 default:
733 BUG();
734 return NULL;
735 }
736}
737
738static int get_ressource(struct cx8800_fh *fh)
739{
740 switch (fh->type) {
741 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
742 return RESOURCE_VIDEO;
743 case V4L2_BUF_TYPE_VBI_CAPTURE:
744 return RESOURCE_VBI;
745 default:
746 BUG();
747 return 0;
748 }
749}
750
bec43661 751static int video_open(struct file *file)
1da177e4 752{
63b0d5ad
LP		 753 struct video_device *vdev = video_devdata(file);
754 struct cx8800_dev *dev = video_drvdata(file);
5401c2db 755 struct cx88_core *core = dev->core;
1da177e4 756 struct cx8800_fh *fh;
1da177e4
LT		 757 enum v4l2_buf_type type = 0;
758 int radio = 0;
759
63b0d5ad
LP		 760 switch (vdev->vfl_type) {
761 case VFL_TYPE_GRABBER:
762 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
763 break;
764 case VFL_TYPE_VBI:
765 type = V4L2_BUF_TYPE_VBI_CAPTURE;
766 break;
767 case VFL_TYPE_RADIO:
768 radio = 1;
769 break;
d56dc612 770 }
1da177e4 771
50462eb0
LP		 772 dprintk(1, "open dev=%s radio=%d type=%s\n",
773 video_device_node_name(vdev), radio, v4l2_type_names[type]);
1da177e4
LT		 774
775 /* allocate + initialize per filehandle data */
7408187d 776 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
da497e30 777 if (unlikely(!fh))
1da177e4 778 return -ENOMEM;
da497e30 779
1da177e4
LT		 780 file->private_data = fh;
781 fh->dev = dev;
782 fh->radio = radio;
783 fh->type = type;
784 fh->width = 320;
785 fh->height = 240;
786 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
787
da497e30 788 mutex_lock(&core->lock);
da497e30 789
0705135e
GL		 790 videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
791 &dev->pci->dev, &dev->slock,
1da177e4
LT		 792 V4L2_BUF_TYPE_VIDEO_CAPTURE,
793 V4L2_FIELD_INTERLACED,
794 sizeof(struct cx88_buffer),
08bff03e 795 fh, NULL);
0705135e
GL		 796 videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
797 &dev->pci->dev, &dev->slock,
1da177e4
LT		 798 V4L2_BUF_TYPE_VBI_CAPTURE,
799 V4L2_FIELD_SEQ_TB,
800 sizeof(struct cx88_buffer),
08bff03e 801 fh, NULL);
1da177e4
LT		 802
803 if (fh->radio) {
1da177e4 804 dprintk(1,"video_open: setting radio device\n");
6a59d64c
TP		 805 cx_write(MO_GP3_IO, core->board.radio.gpio3);
806 cx_write(MO_GP0_IO, core->board.radio.gpio0);
807 cx_write(MO_GP1_IO, core->board.radio.gpio1);
808 cx_write(MO_GP2_IO, core->board.radio.gpio2);
430189da
DB		 809 if (core->board.radio.audioroute) {
810 if(core->board.audio_chip &&
811 core->board.audio_chip == V4L2_IDENT_WM8775) {
5325b427
HV		 812 call_all(core, audio, s_routing,
813 core->board.radio.audioroute, 0, 0);
430189da
DB		 814 }
815 /* "I2S ADC mode" */
816 core->tvaudio = WW_I2SADC;
817 cx88_set_tvaudio(core);
818 } else {
819 /* FM Mode */
820 core->tvaudio = WW_FM;
821 cx88_set_tvaudio(core);
822 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
823 }
b8341e1d 824 call_all(core, tuner, s_radio);
1da177e4
LT		 825 }
826
3e010845 827 atomic_inc(&core->users);
da497e30 828 mutex_unlock(&core->lock);
3e010845 829
4ac97914 830 return 0;
1da177e4
LT		 831}
832
833static ssize_t
f9e7a020 834video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 835{
836 struct cx8800_fh *fh = file->private_data;
837
838 switch (fh->type) {
839 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
840 if (res_locked(fh->dev,RESOURCE_VIDEO))
841 return -EBUSY;
842 return videobuf_read_one(&fh->vidq, data, count, ppos,
843 file->f_flags & O_NONBLOCK);
844 case V4L2_BUF_TYPE_VBI_CAPTURE:
845 if (!res_get(fh->dev,fh,RESOURCE_VBI))
846 return -EBUSY;
847 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
848 file->f_flags & O_NONBLOCK);
849 default:
850 BUG();
851 return 0;
852 }
853}
854
855static unsigned int
856video_poll(struct file *file, struct poll_table_struct *wait)
857{
858 struct cx8800_fh *fh = file->private_data;
859 struct cx88_buffer *buf;
9fd6418a 860 unsigned int rc = POLLERR;
1da177e4
LT		 861
862 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
863 if (!res_get(fh->dev,fh,RESOURCE_VBI))
864 return POLLERR;
865 return videobuf_poll_stream(file, &fh->vbiq, wait);
866 }
867
9fd6418a 868 mutex_lock(&fh->vidq.vb_lock);
1da177e4
LT		 869 if (res_check(fh,RESOURCE_VIDEO)) {
870 /* streaming capture */
871 if (list_empty(&fh->vidq.stream))
9fd6418a 872 goto done;
1da177e4
LT		 873 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
874 } else {
875 /* read() capture */
876 buf = (struct cx88_buffer*)fh->vidq.read_buf;
877 if (NULL == buf)
9fd6418a 878 goto done;
1da177e4
LT		 879 }
880 poll_wait(file, &buf->vb.done, wait);
0fc0686e
BP		 881 if (buf->vb.state == VIDEOBUF_DONE ||
882 buf->vb.state == VIDEOBUF_ERROR)
9fd6418a
F		 883 rc = POLLIN|POLLRDNORM;
884 else
885 rc = 0;
886done:
887 mutex_unlock(&fh->vidq.vb_lock);
888 return rc;
1da177e4
LT		 889}
890
bec43661 891static int video_release(struct file *file)
1da177e4
LT		 892{
893 struct cx8800_fh *fh = file->private_data;
894 struct cx8800_dev *dev = fh->dev;
895
896 /* turn off overlay */
897 if (res_check(fh, RESOURCE_OVERLAY)) {
898 /* FIXME */
899 res_free(dev,fh,RESOURCE_OVERLAY);
900 }
901
902 /* stop video capture */
903 if (res_check(fh, RESOURCE_VIDEO)) {
904 videobuf_queue_cancel(&fh->vidq);
905 res_free(dev,fh,RESOURCE_VIDEO);
906 }
907 if (fh->vidq.read_buf) {
908 buffer_release(&fh->vidq,fh->vidq.read_buf);
909 kfree(fh->vidq.read_buf);
910 }
911
912 /* stop vbi capture */
913 if (res_check(fh, RESOURCE_VBI)) {
053fcb60 914 videobuf_stop(&fh->vbiq);
1da177e4
LT		 915 res_free(dev,fh,RESOURCE_VBI);
916 }
917
918 videobuf_mmap_free(&fh->vidq);
919 videobuf_mmap_free(&fh->vbiq);
da497e30
MCC		 920
921 mutex_lock(&dev->core->lock);
1da177e4
LT		 922 file->private_data = NULL;
923 kfree(fh);
e52e98a7 924
3e010845 925 if(atomic_dec_and_test(&dev->core->users))
622b828a 926 call_all(dev->core, core, s_power, 0);
06f837ca 927 mutex_unlock(&dev->core->lock);
e52e98a7 928
1da177e4
LT		 929 return 0;
930}
931
932static int
933video_mmap(struct file *file, struct vm_area_struct * vma)
934{
935 struct cx8800_fh *fh = file->private_data;
936
937 return videobuf_mmap_mapper(get_queue(fh), vma);
938}
939
940/* ------------------------------------------------------------------ */
8d87cb9f 941/* VIDEO CTRL IOCTLS */
1da177e4 942
54da49f5 943int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 944{
2e4e98e7 945 const struct cx88_ctrl *c = NULL;
1da177e4
LT		 946 u32 value;
947 int i;
948
949 for (i = 0; i < CX8800_CTLS; i++)
950 if (cx8800_ctls[i].v.id == ctl->id)
951 c = &cx8800_ctls[i];
8d87cb9f 952 if (unlikely(NULL == c))
1da177e4
LT		 953 return -EINVAL;
954
955 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
956 switch (ctl->id) {
957 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 958 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
959 : (0x7f - (value & 0x7f));
1da177e4
LT		 960 break;
961 case V4L2_CID_AUDIO_VOLUME:
962 ctl->value = 0x3f - (value & 0x3f);
963 break;
964 default:
965 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
966 break;
967 }
6457af5f
IP		 968 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
969 ctl->id, c->v.name, ctl->value, c->reg,
970 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 971 return 0;
972}
54da49f5 973EXPORT_SYMBOL(cx88_get_control);
1da177e4 974
54da49f5 975int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 976{
2e4e98e7 977 const struct cx88_ctrl *c = NULL;
70f00044 978 u32 value,mask;
1da177e4 979 int i;
8d87cb9f 980
70f00044
MCC		 981 for (i = 0; i < CX8800_CTLS; i++) {
982 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 983 c = &cx8800_ctls[i];
70f00044
MCC		 984 }
985 }
8d87cb9f 986 if (unlikely(NULL == c))
1da177e4
LT		 987 return -EINVAL;
988
989 if (ctl->value < c->v.minimum)
e52e98a7 990 ctl->value = c->v.minimum;
1da177e4 991 if (ctl->value > c->v.maximum)
e52e98a7 992 ctl->value = c->v.maximum;
6951803c
LR		 993
994 /* Pass changes onto any WM8775 */
995 if (core->board.audio_chip == V4L2_IDENT_WM8775) {
996 struct v4l2_control client_ctl;
997 memset(&client_ctl, 0, sizeof(client_ctl));
998 client_ctl.id = ctl->id;
999
1000 switch (ctl->id) {
1001 case V4L2_CID_AUDIO_MUTE:
1002 client_ctl.value = ctl->value;
1003 break;
1004 case V4L2_CID_AUDIO_VOLUME:
1005 client_ctl.value = (ctl->value) ?
1006 (0x90 + ctl->value) << 8 : 0;
1007 break;
1008 case V4L2_CID_AUDIO_BALANCE:
1009 client_ctl.value = ctl->value << 9;
1010 break;
1011 default:
1012 client_ctl.id = 0;
1013 break;
1014 }
1015 if (client_ctl.id)
1016 call_hw(core, WM8775_GID, core, s_ctrl, &client_ctl);
1017 }
1018
70f00044 1019 mask=c->mask;
1da177e4
LT		 1020 switch (ctl->id) {
1021 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 1022 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 1023 break;
1024 case V4L2_CID_AUDIO_VOLUME:
1025 value = 0x3f - (ctl->value & 0x3f);
1026 break;
1027 case V4L2_CID_SATURATION:
1028 /* special v_sat handling */
70f00044
MCC		 1029
1030 value = ((ctl->value - c->off) << c->shift) & c->mask;
1031
63ab1bdc 1032 if (core->tvnorm & V4L2_STD_SECAM) {
70f00044
MCC		 1033 /* For SECAM, both U and V sat should be equal */
1034 value=value<<8|value;
1035 } else {
1036 /* Keeps U Saturation proportional to V Sat */
1037 value=(value*0x5a)/0x7f<<8|value;
1038 }
1039 mask=0xffff;
1040 break;
6d04203c
FD		 1041 case V4L2_CID_CHROMA_AGC:
1042 /* Do not allow chroma AGC to be enabled for SECAM */
1043 value = ((ctl->value - c->off) << c->shift) & c->mask;
1044 if (core->tvnorm & V4L2_STD_SECAM && value)
1045 return -EINVAL;
1046 break;
1da177e4
LT		 1047 default:
1048 value = ((ctl->value - c->off) << c->shift) & c->mask;
1049 break;
1050 }
6457af5f
IP		 1051 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
1052 ctl->id, c->v.name, ctl->value, c->reg, value,
1053 mask, c->sreg ? " [shadowed]" : "");
1da177e4 1054 if (c->sreg) {
70f00044 1055 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 1056 } else {
70f00044 1057 cx_andor(c->reg, mask, value);
1da177e4
LT		 1058 }
1059 return 0;
1060}
54da49f5 1061EXPORT_SYMBOL(cx88_set_control);
1da177e4 1062
e52e98a7 1063static void init_controls(struct cx88_core *core)
1da177e4 1064{
70f00044
MCC		 1065 struct v4l2_control ctrl;
1066 int i;
1da177e4 1067
70f00044
MCC		 1068 for (i = 0; i < CX8800_CTLS; i++) {
1069 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 1070 ctrl.value=cx8800_ctls[i].v.default_value;
8d87cb9f 1071
54da49f5 1072 cx88_set_control(core, &ctrl);
70f00044 1073 }
1da177e4
LT		 1074}
1075
1076/* ------------------------------------------------------------------ */
8d87cb9f 1077/* VIDEO IOCTLS */
1da177e4 1078
78b526a4 1079static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1080 struct v4l2_format *f)
1da177e4 1081{
8d87cb9f
MCC		 1082 struct cx8800_fh *fh = priv;
1083
1084 f->fmt.pix.width = fh->width;
1085 f->fmt.pix.height = fh->height;
1086 f->fmt.pix.field = fh->vidq.field;
1087 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1088 f->fmt.pix.bytesperline =
1089 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1090 f->fmt.pix.sizeimage =
1091 f->fmt.pix.height * f->fmt.pix.bytesperline;
1092 return 0;
1da177e4
LT		 1093}
1094
78b526a4 1095static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1096 struct v4l2_format *f)
1da177e4 1097{
8d87cb9f 1098 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
2e4e98e7 1099 const struct cx8800_fmt *fmt;
8d87cb9f
MCC		 1100 enum v4l2_field field;
1101 unsigned int maxw, maxh;
e52e98a7 1102
8d87cb9f
MCC		 1103 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1104 if (NULL == fmt)
1105 return -EINVAL;
1da177e4 1106
8d87cb9f
MCC		 1107 field = f->fmt.pix.field;
1108 maxw = norm_maxw(core->tvnorm);
1109 maxh = norm_maxh(core->tvnorm);
1da177e4 1110
8d87cb9f
MCC		 1111 if (V4L2_FIELD_ANY == field) {
1112 field = (f->fmt.pix.height > maxh/2)
1113 ? V4L2_FIELD_INTERLACED
1114 : V4L2_FIELD_BOTTOM;
1da177e4 1115 }
8d87cb9f
MCC		 1116
1117 switch (field) {
1118 case V4L2_FIELD_TOP:
1119 case V4L2_FIELD_BOTTOM:
1120 maxh = maxh / 2;
1121 break;
1122 case V4L2_FIELD_INTERLACED:
1123 break;
1da177e4
LT		 1124 default:
1125 return -EINVAL;
1126 }
8d87cb9f
MCC		 1127
1128 f->fmt.pix.field = field;
4b89945e
TP		 1129 v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
1130 &f->fmt.pix.height, 32, maxh, 0, 0);
8d87cb9f
MCC		 1131 f->fmt.pix.bytesperline =
1132 (f->fmt.pix.width * fmt->depth) >> 3;
1133 f->fmt.pix.sizeimage =
1134 f->fmt.pix.height * f->fmt.pix.bytesperline;
1135
1136 return 0;
1da177e4
LT		 1137}
1138
78b526a4 1139static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1140 struct v4l2_format *f)
1da177e4 1141{
8d87cb9f 1142 struct cx8800_fh *fh = priv;
78b526a4 1143 int err = vidioc_try_fmt_vid_cap (file,priv,f);
8d87cb9f
MCC		 1144
1145 if (0 != err)
1146 return err;
1147 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1148 fh->width = f->fmt.pix.width;
1149 fh->height = f->fmt.pix.height;
1150 fh->vidq.field = f->fmt.pix.field;
1151 return 0;
1da177e4
LT		 1152}
1153
8d87cb9f
MCC		 1154static int vidioc_querycap (struct file *file, void *priv,
1155 struct v4l2_capability *cap)
1da177e4 1156{
8d87cb9f 1157 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4 1158 struct cx88_core *core = dev->core;
1da177e4 1159
8d87cb9f 1160 strcpy(cap->driver, "cx8800");
6a59d64c 1161 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1162 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1163 cap->version = CX88_VERSION_CODE;
1164 cap->capabilities =
1165 V4L2_CAP_VIDEO_CAPTURE |
1166 V4L2_CAP_READWRITE |
1167 V4L2_CAP_STREAMING |
1168 V4L2_CAP_VBI_CAPTURE;
6a59d64c 1169 if (UNSET != core->board.tuner_type)
8d87cb9f
MCC		 1170 cap->capabilities |= V4L2_CAP_TUNER;
1171 return 0;
1172}
e52e98a7 1173
78b526a4 1174static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
8d87cb9f
MCC		 1175 struct v4l2_fmtdesc *f)
1176{
1177 if (unlikely(f->index >= ARRAY_SIZE(formats)))
1178 return -EINVAL;
1179
1180 strlcpy(f->description,formats[f->index].name,sizeof(f->description));
1181 f->pixelformat = formats[f->index].fourcc;
1182
1183 return 0;
1184}
1da177e4 1185
8d87cb9f
MCC		 1186static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
1187{
1188 struct cx8800_fh *fh = priv;
1189 return (videobuf_reqbufs(get_queue(fh), p));
1190}
e52e98a7 1191
8d87cb9f
MCC		 1192static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
1193{
1194 struct cx8800_fh *fh = priv;
1195 return (videobuf_querybuf(get_queue(fh), p));
1196}
e52e98a7 1197
8d87cb9f
MCC		 1198static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1199{
1200 struct cx8800_fh *fh = priv;
1201 return (videobuf_qbuf(get_queue(fh), p));
1202}
e52e98a7 1203
8d87cb9f
MCC		 1204static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1205{
1206 struct cx8800_fh *fh = priv;
1207 return (videobuf_dqbuf(get_queue(fh), p,
1208 file->f_flags & O_NONBLOCK));
1209}
e52e98a7 1210
8d87cb9f
MCC		 1211static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
1212{
1213 struct cx8800_fh *fh = priv;
1214 struct cx8800_dev *dev = fh->dev;
1215
b058e3f3
RD		 1216 /* We should remember that this driver also supports teletext, */
1217 /* so we have to test if the v4l2_buf_type is VBI capture data. */
1218 if (unlikely((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1219 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE)))
8d87cb9f 1220 return -EINVAL;
b058e3f3 1221
8d87cb9f
MCC		 1222 if (unlikely(i != fh->type))
1223 return -EINVAL;
1224
1225 if (unlikely(!res_get(dev,fh,get_ressource(fh))))
1226 return -EBUSY;
1227 return videobuf_streamon(get_queue(fh));
1228}
1229
1230static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1231{
1232 struct cx8800_fh *fh = priv;
1233 struct cx8800_dev *dev = fh->dev;
1234 int err, res;
1235
b058e3f3
RD		 1236 if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1237 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
8d87cb9f 1238 return -EINVAL;
b058e3f3 1239
8d87cb9f
MCC		 1240 if (i != fh->type)
1241 return -EINVAL;
1242
1243 res = get_ressource(fh);
1244 err = videobuf_streamoff(get_queue(fh));
1245 if (err < 0)
1246 return err;
1247 res_free(dev,fh,res);
e52e98a7
MCC		 1248 return 0;
1249}
1250
63ab1bdc 1251static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
e52e98a7 1252{
8d87cb9f 1253 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
e52e98a7 1254
8d87cb9f 1255 mutex_lock(&core->lock);
63ab1bdc 1256 cx88_set_tvnorm(core,*tvnorms);
8d87cb9f 1257 mutex_unlock(&core->lock);
63ab1bdc 1258
8d87cb9f
MCC		 1259 return 0;
1260}
1da177e4 1261
8d87cb9f 1262/* only one input in this sample driver */
54da49f5 1263int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
8d87cb9f 1264{
2e4e98e7 1265 static const char * const iname[] = {
8d87cb9f
MCC		 1266 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1267 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1268 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1269 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1270 [ CX88_VMUX_SVIDEO ] = "S-Video",
1271 [ CX88_VMUX_TELEVISION ] = "Television",
1272 [ CX88_VMUX_CABLE ] = "Cable TV",
1273 [ CX88_VMUX_DVB ] = "DVB",
1274 [ CX88_VMUX_DEBUG ] = "for debug only",
1275 };
f3334bcb 1276 unsigned int n = i->index;
1da177e4 1277
8d87cb9f
MCC		 1278 if (n >= 4)
1279 return -EINVAL;
6a59d64c 1280 if (0 == INPUT(n).type)
8d87cb9f 1281 return -EINVAL;
8d87cb9f 1282 i->type = V4L2_INPUT_TYPE_CAMERA;
6a59d64c
TP		 1283 strcpy(i->name,iname[INPUT(n).type]);
1284 if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
473d8024 1285 (CX88_VMUX_CABLE == INPUT(n).type)) {
8d87cb9f 1286 i->type = V4L2_INPUT_TYPE_TUNER;
63ab1bdc 1287 i->std = CX88_NORMS;
473d8024 1288 }
8d87cb9f
MCC		 1289 return 0;
1290}
54da49f5
MCC		 1291EXPORT_SYMBOL(cx88_enum_input);
1292
1293static int vidioc_enum_input (struct file *file, void *priv,
1294 struct v4l2_input *i)
1295{
1296 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1297 return cx88_enum_input (core,i);
1298}
1da177e4 1299
8d87cb9f
MCC		 1300static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
1301{
1302 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1303
8d87cb9f
MCC		 1304 *i = core->input;
1305 return 0;
1306}
1da177e4 1307
8d87cb9f
MCC		 1308static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
1309{
1310 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1311
8d87cb9f
MCC		 1312 if (i >= 4)
1313 return -EINVAL;
1da177e4 1314
8d87cb9f
MCC		 1315 mutex_lock(&core->lock);
1316 cx88_newstation(core);
e90311a1 1317 cx88_video_mux(core,i);
8d87cb9f
MCC		 1318 mutex_unlock(&core->lock);
1319 return 0;
1320}
1da177e4 1321
1da177e4 1322
1da177e4 1323
8d87cb9f
MCC		 1324static int vidioc_queryctrl (struct file *file, void *priv,
1325 struct v4l2_queryctrl *qctrl)
1326{
6d04203c
FD		 1327 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1328
8d87cb9f
MCC		 1329 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
1330 if (unlikely(qctrl->id == 0))
1331 return -EINVAL;
6d04203c 1332 return cx8800_ctrl_query(core, qctrl);
8d87cb9f 1333}
1da177e4 1334
54da49f5 1335static int vidioc_g_ctrl (struct file *file, void *priv,
8d87cb9f
MCC		 1336 struct v4l2_control *ctl)
1337{
1338 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
54da49f5
MCC		 1339 return
1340 cx88_get_control(core,ctl);
1341}
1da177e4 1342
54da49f5
MCC		 1343static int vidioc_s_ctrl (struct file *file, void *priv,
1344 struct v4l2_control *ctl)
1345{
1346 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
8d87cb9f 1347 return
54da49f5 1348 cx88_set_control(core,ctl);
8d87cb9f
MCC		 1349}
1350
1351static int vidioc_g_tuner (struct file *file, void *priv,
1352 struct v4l2_tuner *t)
1353{
1354 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1355 u32 reg;
1da177e4 1356
6a59d64c 1357 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f 1358 return -EINVAL;
243d8c0f
MCC		 1359 if (0 != t->index)
1360 return -EINVAL;
a82decf6 1361
8d87cb9f
MCC		 1362 strcpy(t->name, "Television");
1363 t->type = V4L2_TUNER_ANALOG_TV;
1364 t->capability = V4L2_TUNER_CAP_NORM;
1365 t->rangehigh = 0xffffffffUL;
a82decf6 1366
8d87cb9f
MCC		 1367 cx88_get_stereo(core ,t);
1368 reg = cx_read(MO_DEVICE_STATUS);
1369 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1370 return 0;
1371}
41ef7c1e 1372
8d87cb9f
MCC		 1373static int vidioc_s_tuner (struct file *file, void *priv,
1374 struct v4l2_tuner *t)
1375{
1376 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
41ef7c1e 1377
6a59d64c 1378 if (UNSET == core->board.tuner_type)
8d87cb9f
MCC		 1379 return -EINVAL;
1380 if (0 != t->index)
1381 return -EINVAL;
c5287ba1 1382
8d87cb9f
MCC		 1383 cx88_set_stereo(core, t->audmode, 1);
1384 return 0;
1385}
902fc997 1386
8d87cb9f
MCC		 1387static int vidioc_g_frequency (struct file *file, void *priv,
1388 struct v4l2_frequency *f)
1389{
1390 struct cx8800_fh *fh = priv;
1391 struct cx88_core *core = fh->dev->core;
902fc997 1392
6a59d64c 1393 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1394 return -EINVAL;
1395
1396 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1397 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1398 f->frequency = core->freq;
1399
b8341e1d 1400 call_all(core, tuner, g_frequency, f);
1da177e4 1401
1da177e4
LT		 1402 return 0;
1403}
1404
54da49f5 1405int cx88_set_freq (struct cx88_core *core,
8d87cb9f 1406 struct v4l2_frequency *f)
1da177e4 1407{
6a59d64c 1408 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1409 return -EINVAL;
1410 if (unlikely(f->tuner != 0))
1411 return -EINVAL;
54da49f5 1412
8d87cb9f
MCC		 1413 mutex_lock(&core->lock);
1414 core->freq = f->frequency;
1415 cx88_newstation(core);
b8341e1d 1416 call_all(core, tuner, s_frequency, f);
c7b0ac05 1417
8d87cb9f
MCC		 1418 /* When changing channels it is required to reset TVAUDIO */
1419 msleep (10);
1420 cx88_set_tvaudio(core);
c7b0ac05 1421
8d87cb9f 1422 mutex_unlock(&core->lock);
54da49f5 1423
8d87cb9f 1424 return 0;
1da177e4 1425}
54da49f5
MCC		 1426EXPORT_SYMBOL(cx88_set_freq);
1427
1428static int vidioc_s_frequency (struct file *file, void *priv,
1429 struct v4l2_frequency *f)
1430{
1431 struct cx8800_fh *fh = priv;
1432 struct cx88_core *core = fh->dev->core;
1433
1434 if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
1435 return -EINVAL;
1436 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
1437 return -EINVAL;
1438
1439 return
1440 cx88_set_freq (core,f);
1441}
1da177e4 1442
dbbff48f
TP		 1443#ifdef CONFIG_VIDEO_ADV_DEBUG
1444static int vidioc_g_register (struct file *file, void *fh,
aecde8b5 1445 struct v4l2_dbg_register *reg)
dbbff48f
TP		 1446{
1447 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1448
aecde8b5 1449 if (!v4l2_chip_match_host(&reg->match))
dbbff48f
TP		 1450 return -EINVAL;
1451 /* cx2388x has a 24-bit register space */
aecde8b5
HV		 1452 reg->val = cx_read(reg->reg & 0xffffff);
1453 reg->size = 4;
dbbff48f
TP		 1454 return 0;
1455}
1456
1457static int vidioc_s_register (struct file *file, void *fh,
aecde8b5 1458 struct v4l2_dbg_register *reg)
dbbff48f
TP		 1459{
1460 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1461
aecde8b5 1462 if (!v4l2_chip_match_host(&reg->match))
dbbff48f 1463 return -EINVAL;
aecde8b5 1464 cx_write(reg->reg & 0xffffff, reg->val);
dbbff48f
TP		 1465 return 0;
1466}
1467#endif
8d87cb9f
MCC		 1468
1469/* ----------------------------------------------------------- */
1470/* RADIO ESPECIFIC IOCTLS */
1da177e4
LT		 1471/* ----------------------------------------------------------- */
1472
8d87cb9f
MCC		 1473static int radio_querycap (struct file *file, void *priv,
1474 struct v4l2_capability *cap)
1da177e4 1475{
8d87cb9f 1476 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4
LT		 1477 struct cx88_core *core = dev->core;
1478
8d87cb9f 1479 strcpy(cap->driver, "cx8800");
6a59d64c 1480 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1481 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1482 cap->version = CX88_VERSION_CODE;
1483 cap->capabilities = V4L2_CAP_TUNER;
1484 return 0;
1485}
1da177e4 1486
8d87cb9f
MCC		 1487static int radio_g_tuner (struct file *file, void *priv,
1488 struct v4l2_tuner *t)
1489{
1490 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1491
8d87cb9f
MCC		 1492 if (unlikely(t->index > 0))
1493 return -EINVAL;
1da177e4 1494
8d87cb9f
MCC		 1495 strcpy(t->name, "Radio");
1496 t->type = V4L2_TUNER_RADIO;
1da177e4 1497
b8341e1d 1498 call_all(core, tuner, g_tuner, t);
8d87cb9f
MCC		 1499 return 0;
1500}
1da177e4 1501
8d87cb9f
MCC		 1502static int radio_enum_input (struct file *file, void *priv,
1503 struct v4l2_input *i)
1504{
1505 if (i->index != 0)
1506 return -EINVAL;
1507 strcpy(i->name,"Radio");
1508 i->type = V4L2_INPUT_TYPE_TUNER;
a82decf6 1509
8d87cb9f
MCC		 1510 return 0;
1511}
a82decf6 1512
8d87cb9f
MCC		 1513static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
1514{
1515 if (unlikely(a->index))
1516 return -EINVAL;
a82decf6 1517
8d87cb9f
MCC		 1518 strcpy(a->name,"Radio");
1519 return 0;
1520}
a82decf6 1521
8d87cb9f 1522/* FIXME: Should add a standard for radio */
a82decf6 1523
8d87cb9f
MCC		 1524static int radio_s_tuner (struct file *file, void *priv,
1525 struct v4l2_tuner *t)
1526{
1527 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
a82decf6 1528
8d87cb9f
MCC		 1529 if (0 != t->index)
1530 return -EINVAL;
1da177e4 1531
b8341e1d 1532 call_all(core, tuner, s_tuner, t);
1da177e4 1533
8d87cb9f
MCC		 1534 return 0;
1535}
1da177e4 1536
8d87cb9f
MCC		 1537static int radio_s_audio (struct file *file, void *fh,
1538 struct v4l2_audio *a)
1539{
1540 return 0;
1541}
1da177e4 1542
8d87cb9f
MCC		 1543static int radio_s_input (struct file *file, void *fh, unsigned int i)
1544{
1da177e4 1545 return 0;
8d87cb9f 1546}
1da177e4 1547
8d87cb9f
MCC		 1548static int radio_queryctrl (struct file *file, void *priv,
1549 struct v4l2_queryctrl *c)
1da177e4 1550{
8d87cb9f
MCC		 1551 int i;
1552
1553 if (c->id < V4L2_CID_BASE ||
1554 c->id >= V4L2_CID_LASTP1)
1555 return -EINVAL;
6951803c
LR		 1556 if (c->id == V4L2_CID_AUDIO_MUTE ||
1557 c->id == V4L2_CID_AUDIO_VOLUME ||
1558 c->id == V4L2_CID_AUDIO_BALANCE) {
a41b2ea7 1559 for (i = 0; i < CX8800_CTLS; i++) {
8d87cb9f
MCC		 1560 if (cx8800_ctls[i].v.id == c->id)
1561 break;
a41b2ea7
DC		 1562 }
1563 if (i == CX8800_CTLS)
1564 return -EINVAL;
8d87cb9f
MCC		 1565 *c = cx8800_ctls[i].v;
1566 } else
1567 *c = no_ctl;
1568 return 0;
1569}
1da177e4
LT		 1570
1571/* ----------------------------------------------------------- */
1572
1573static void cx8800_vid_timeout(unsigned long data)
1574{
1575 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1576 struct cx88_core *core = dev->core;
1577 struct cx88_dmaqueue *q = &dev->vidq;
1578 struct cx88_buffer *buf;
1579 unsigned long flags;
1580
e52e98a7 1581 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1582
1583 cx_clear(MO_VID_DMACNTRL, 0x11);
1584 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1585
1586 spin_lock_irqsave(&dev->slock,flags);
1587 while (!list_empty(&q->active)) {
1588 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1589 list_del(&buf->vb.queue);
0fc0686e 1590 buf->vb.state = VIDEOBUF_ERROR;
1da177e4
LT		 1591 wake_up(&buf->vb.done);
1592 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1593 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1594 }
1595 restart_video_queue(dev,q);
1596 spin_unlock_irqrestore(&dev->slock,flags);
1597}
1598
2e4e98e7 1599static const char *cx88_vid_irqs[32] = {
41ef7c1e
MCC		 1600 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1601 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1602 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1603 "y_sync", "u_sync", "v_sync", "vbi_sync",
1604 "opc_err", "par_err", "rip_err", "pci_abort",
1605};
1606
1da177e4
LT		 1607static void cx8800_vid_irq(struct cx8800_dev *dev)
1608{
1609 struct cx88_core *core = dev->core;
1610 u32 status, mask, count;
1611
1612 status = cx_read(MO_VID_INTSTAT);
1613 mask = cx_read(MO_VID_INTMSK);
1614 if (0 == (status & mask))
1615 return;
1616 cx_write(MO_VID_INTSTAT, status);
1617 if (irq_debug || (status & mask & ~0xff))
1618 cx88_print_irqbits(core->name, "irq vid",
66623a04
MCC		 1619 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1620 status, mask);
1da177e4
LT		 1621
1622 /* risc op code error */
1623 if (status & (1 << 16)) {
1624 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1625 cx_clear(MO_VID_DMACNTRL, 0x11);
1626 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1627 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1628 }
1629
1630 /* risc1 y */
1631 if (status & 0x01) {
1632 spin_lock(&dev->slock);
1633 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1634 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1635 spin_unlock(&dev->slock);
1636 }
1637
1638 /* risc1 vbi */
1639 if (status & 0x08) {
1640 spin_lock(&dev->slock);
1641 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1642 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1643 spin_unlock(&dev->slock);
1644 }
1645
1646 /* risc2 y */
1647 if (status & 0x10) {
1648 dprintk(2,"stopper video\n");
1649 spin_lock(&dev->slock);
1650 restart_video_queue(dev,&dev->vidq);
1651 spin_unlock(&dev->slock);
1652 }
1653
1654 /* risc2 vbi */
1655 if (status & 0x80) {
1656 dprintk(2,"stopper vbi\n");
1657 spin_lock(&dev->slock);
1658 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1659 spin_unlock(&dev->slock);
1660 }
1661}
1662
7d12e780 1663static irqreturn_t cx8800_irq(int irq, void *dev_id)
1da177e4
LT		 1664{
1665 struct cx8800_dev *dev = dev_id;
1666 struct cx88_core *core = dev->core;
1667 u32 status;
1668 int loop, handled = 0;
1669
1670 for (loop = 0; loop < 10; loop++) {
8ddac9ee
TP		 1671 status = cx_read(MO_PCI_INTSTAT) &
1672 (core->pci_irqmask | PCI_INT_VIDINT);
1da177e4
LT		 1673 if (0 == status)
1674 goto out;
1675 cx_write(MO_PCI_INTSTAT, status);
1676 handled = 1;
1677
1678 if (status & core->pci_irqmask)
1679 cx88_core_irq(core,status);
8ddac9ee 1680 if (status & PCI_INT_VIDINT)
1da177e4
LT		 1681 cx8800_vid_irq(dev);
1682 };
1683 if (10 == loop) {
1684 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1685 core->name);
1686 cx_write(MO_PCI_INTMSK,0);
1687 }
1688
1689 out:
1690 return IRQ_RETVAL(handled);
1691}
1692
1693/* ----------------------------------------------------------- */
1694/* exported stuff */
1695
bec43661 1696static const struct v4l2_file_operations video_fops =
1da177e4
LT		 1697{
1698 .owner = THIS_MODULE,
1699 .open = video_open,
1700 .release = video_release,
1701 .read = video_read,
1702 .poll = video_poll,
1703 .mmap = video_mmap,
b6187264 1704 .unlocked_ioctl = video_ioctl2,
1da177e4
LT		 1705};
1706
a399810c 1707static const struct v4l2_ioctl_ops video_ioctl_ops = {
8d87cb9f 1708 .vidioc_querycap = vidioc_querycap,
78b526a4
HV		 1709 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1710 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1711 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1712 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1713 .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
1714 .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
1715 .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
8d87cb9f
MCC		 1716 .vidioc_reqbufs = vidioc_reqbufs,
1717 .vidioc_querybuf = vidioc_querybuf,
1718 .vidioc_qbuf = vidioc_qbuf,
1719 .vidioc_dqbuf = vidioc_dqbuf,
1720 .vidioc_s_std = vidioc_s_std,
1721 .vidioc_enum_input = vidioc_enum_input,
1722 .vidioc_g_input = vidioc_g_input,
1723 .vidioc_s_input = vidioc_s_input,
1724 .vidioc_queryctrl = vidioc_queryctrl,
1725 .vidioc_g_ctrl = vidioc_g_ctrl,
1726 .vidioc_s_ctrl = vidioc_s_ctrl,
1727 .vidioc_streamon = vidioc_streamon,
1728 .vidioc_streamoff = vidioc_streamoff,
8d87cb9f
MCC		 1729 .vidioc_g_tuner = vidioc_g_tuner,
1730 .vidioc_s_tuner = vidioc_s_tuner,
1731 .vidioc_g_frequency = vidioc_g_frequency,
1732 .vidioc_s_frequency = vidioc_s_frequency,
dbbff48f
TP		 1733#ifdef CONFIG_VIDEO_ADV_DEBUG
1734 .vidioc_g_register = vidioc_g_register,
1735 .vidioc_s_register = vidioc_s_register,
1736#endif
a399810c
HV		 1737};
1738
1739static struct video_device cx8800_vbi_template;
1740
2e4e98e7 1741static const struct video_device cx8800_video_template = {
a399810c 1742 .name = "cx8800-video",
a399810c 1743 .fops = &video_fops,
a399810c 1744 .ioctl_ops = &video_ioctl_ops,
63ab1bdc 1745 .tvnorms = CX88_NORMS,
dbbff48f 1746 .current_norm = V4L2_STD_NTSC_M,
1da177e4
LT		 1747};
1748
bec43661 1749static const struct v4l2_file_operations radio_fops =
1da177e4
LT		 1750{
1751 .owner = THIS_MODULE,
1752 .open = video_open,
1753 .release = video_release,
b6187264 1754 .unlocked_ioctl = video_ioctl2,
1da177e4
LT		 1755};
1756
a399810c 1757static const struct v4l2_ioctl_ops radio_ioctl_ops = {
8d87cb9f
MCC		 1758 .vidioc_querycap = radio_querycap,
1759 .vidioc_g_tuner = radio_g_tuner,
1760 .vidioc_enum_input = radio_enum_input,
1761 .vidioc_g_audio = radio_g_audio,
1762 .vidioc_s_tuner = radio_s_tuner,
1763 .vidioc_s_audio = radio_s_audio,
1764 .vidioc_s_input = radio_s_input,
1765 .vidioc_queryctrl = radio_queryctrl,
1766 .vidioc_g_ctrl = vidioc_g_ctrl,
1767 .vidioc_s_ctrl = vidioc_s_ctrl,
1768 .vidioc_g_frequency = vidioc_g_frequency,
1769 .vidioc_s_frequency = vidioc_s_frequency,
a75d2048
TP		 1770#ifdef CONFIG_VIDEO_ADV_DEBUG
1771 .vidioc_g_register = vidioc_g_register,
1772 .vidioc_s_register = vidioc_s_register,
1773#endif
1da177e4
LT		 1774};
1775
2e4e98e7 1776static const struct video_device cx8800_radio_template = {
a399810c 1777 .name = "cx8800-radio",
a399810c 1778 .fops = &radio_fops,
a399810c
HV		 1779 .ioctl_ops = &radio_ioctl_ops,
1780};
1781
1da177e4
LT		 1782/* ----------------------------------------------------------- */
1783
1784static void cx8800_unregister_video(struct cx8800_dev *dev)
1785{
1786 if (dev->radio_dev) {
f0813b4c 1787 if (video_is_registered(dev->radio_dev))
1da177e4
LT		 1788 video_unregister_device(dev->radio_dev);
1789 else
1790 video_device_release(dev->radio_dev);
1791 dev->radio_dev = NULL;
1792 }
1793 if (dev->vbi_dev) {
f0813b4c 1794 if (video_is_registered(dev->vbi_dev))
1da177e4
LT		 1795 video_unregister_device(dev->vbi_dev);
1796 else
1797 video_device_release(dev->vbi_dev);
1798 dev->vbi_dev = NULL;
1799 }
1800 if (dev->video_dev) {
f0813b4c 1801 if (video_is_registered(dev->video_dev))
1da177e4
LT		 1802 video_unregister_device(dev->video_dev);
1803 else
1804 video_device_release(dev->video_dev);
1805 dev->video_dev = NULL;
1806 }
1807}
1808
1809static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1810 const struct pci_device_id *pci_id)
1811{
1812 struct cx8800_dev *dev;
1813 struct cx88_core *core;
8d87cb9f 1814
1da177e4
LT		 1815 int err;
1816
7408187d 1817 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1818 if (NULL == dev)
1819 return -ENOMEM;
1da177e4
LT		 1820
1821 /* pci init */
1822 dev->pci = pci_dev;
1823 if (pci_enable_device(pci_dev)) {
1824 err = -EIO;
1825 goto fail_free;
1826 }
1827 core = cx88_core_get(dev->pci);
1828 if (NULL == core) {
1829 err = -EINVAL;
1830 goto fail_free;
1831 }
1832 dev->core = core;
1833
1834 /* print pci info */
1835 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1836 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1837 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
228aef63 1838 "latency: %d, mmio: 0x%llx\n", core->name,
1da177e4 1839 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
228aef63 1840 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1da177e4
LT		 1841
1842 pci_set_master(pci_dev);
284901a9 1843 if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
1da177e4
LT		 1844 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1845 err = -EIO;
1846 goto fail_core;
1847 }
1848
8d87cb9f
MCC		 1849 /* Initialize VBI template */
1850 memcpy( &cx8800_vbi_template, &cx8800_video_template,
1851 sizeof(cx8800_vbi_template) );
1852 strcpy(cx8800_vbi_template.name,"cx8800-vbi");
8d87cb9f 1853
1da177e4 1854 /* initialize driver struct */
1da177e4 1855 spin_lock_init(&dev->slock);
63ab1bdc 1856 core->tvnorm = cx8800_video_template.current_norm;
1da177e4
LT		 1857
1858 /* init video dma queues */
1859 INIT_LIST_HEAD(&dev->vidq.active);
1860 INIT_LIST_HEAD(&dev->vidq.queued);
1861 dev->vidq.timeout.function = cx8800_vid_timeout;
1862 dev->vidq.timeout.data = (unsigned long)dev;
1863 init_timer(&dev->vidq.timeout);
1864 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1865 MO_VID_DMACNTRL,0x11,0x00);
1866
1867 /* init vbi dma queues */
1868 INIT_LIST_HEAD(&dev->vbiq.active);
1869 INIT_LIST_HEAD(&dev->vbiq.queued);
1870 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1871 dev->vbiq.timeout.data = (unsigned long)dev;
1872 init_timer(&dev->vbiq.timeout);
1873 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1874 MO_VID_DMACNTRL,0x88,0x00);
1875
1876 /* get irq */
1877 err = request_irq(pci_dev->irq, cx8800_irq,
8076fe32 1878 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1da177e4 1879 if (err < 0) {
5772f813 1880 printk(KERN_ERR "%s/0: can't get IRQ %d\n",
1da177e4
LT		 1881 core->name,pci_dev->irq);
1882 goto fail_core;
1883 }
1884 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1885
1886 /* load and configure helper modules */
e52e98a7 1887
6951803c
LR		 1888 if (core->board.audio_chip == V4L2_IDENT_WM8775) {
1889 struct i2c_board_info wm8775_info = {
1890 .type = "wm8775",
1891 .addr = 0x36 >> 1,
1892 .platform_data = &core->wm8775_data,
1893 };
1894 struct v4l2_subdev *sd;
1895
1896 if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
1897 core->wm8775_data.is_nova_s = true;
1898 else
1899 core->wm8775_data.is_nova_s = false;
1900
1901 sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
1902 &wm8775_info, NULL);
1903 if (sd != NULL)
1904 sd->grp_id = WM8775_GID;
1905 }
b8341e1d
HV		 1906
1907 if (core->board.audio_chip == V4L2_IDENT_TVAUDIO) {
1908 /* This probes for a tda9874 as is used on some
1909 Pixelview Ultra boards. */
9a1f8b34
LP		 1910 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
1911 "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
b8341e1d 1912 }
3057906d 1913
6fcecce7
MK		 1914 switch (core->boardnr) {
1915 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
b8341e1d 1916 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
2e4e98e7 1917 static const struct i2c_board_info rtc_info = {
b8341e1d
HV		 1918 I2C_BOARD_INFO("isl1208", 0x6f)
1919 };
1920
6fcecce7 1921 request_module("rtc-isl1208");
b8341e1d
HV		 1922 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
1923 }
8efd2e28
MK		 1924 /* break intentionally omitted */
1925 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1926 request_module("ir-kbd-i2c");
6fcecce7
MK		 1927 }
1928
121ec132
MCC		 1929 /* Sets device info at pci_dev */
1930 pci_set_drvdata(pci_dev, dev);
1931
1932 /* initial device configuration */
1933 mutex_lock(&core->lock);
1934 cx88_set_tvnorm(core, core->tvnorm);
1935 init_controls(core);
1936 cx88_video_mux(core, 0);
1937
1da177e4
LT		 1938 /* register v4l devices */
1939 dev->video_dev = cx88_vdev_init(core,dev->pci,
1940 &cx8800_video_template,"video");
63b0d5ad 1941 video_set_drvdata(dev->video_dev, dev);
1da177e4
LT		 1942 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1943 video_nr[core->nr]);
1944 if (err < 0) {
5772f813 1945 printk(KERN_ERR "%s/0: can't register video device\n",
1da177e4
LT		 1946 core->name);
1947 goto fail_unreg;
1948 }
38c7c036
LP		 1949 printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
1950 core->name, video_device_node_name(dev->video_dev));
1da177e4
LT		 1951
1952 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
63b0d5ad 1953 video_set_drvdata(dev->vbi_dev, dev);
1da177e4
LT		 1954 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1955 vbi_nr[core->nr]);
1956 if (err < 0) {
5772f813 1957 printk(KERN_ERR "%s/0: can't register vbi device\n",
1da177e4
LT		 1958 core->name);
1959 goto fail_unreg;
1960 }
38c7c036
LP		 1961 printk(KERN_INFO "%s/0: registered device %s\n",
1962 core->name, video_device_node_name(dev->vbi_dev));
1da177e4 1963
6a59d64c 1964 if (core->board.radio.type == CX88_RADIO) {
1da177e4
LT		 1965 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1966 &cx8800_radio_template,"radio");
63b0d5ad 1967 video_set_drvdata(dev->radio_dev, dev);
1da177e4
LT		 1968 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1969 radio_nr[core->nr]);
1970 if (err < 0) {
5772f813 1971 printk(KERN_ERR "%s/0: can't register radio device\n",
1da177e4
LT		 1972 core->name);
1973 goto fail_unreg;
1974 }
38c7c036
LP		 1975 printk(KERN_INFO "%s/0: registered device %s\n",
1976 core->name, video_device_node_name(dev->radio_dev));
1da177e4
LT		 1977 }
1978
1da177e4 1979 /* start tvaudio thread */
6a59d64c 1980 if (core->board.tuner_type != TUNER_ABSENT) {
1da177e4 1981 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
32b78de7
CG		 1982 if (IS_ERR(core->kthread)) {
1983 err = PTR_ERR(core->kthread);
5772f813
TP		 1984 printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
1985 core->name, err);
32b78de7
CG		 1986 }
1987 }
121ec132
MCC		 1988 mutex_unlock(&core->lock);
1989
1da177e4
LT		 1990 return 0;
1991
1992fail_unreg:
1993 cx8800_unregister_video(dev);
1994 free_irq(pci_dev->irq, dev);
121ec132 1995 mutex_unlock(&core->lock);
1da177e4
LT		 1996fail_core:
1997 cx88_core_put(core,dev->pci);
1998fail_free:
1999 kfree(dev);
2000 return err;
2001}
2002
2003static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
2004{
4ac97914 2005 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 2006 struct cx88_core *core = dev->core;
1da177e4
LT		 2007
2008 /* stop thread */
e52e98a7
MCC		 2009 if (core->kthread) {
2010 kthread_stop(core->kthread);
2011 core->kthread = NULL;
1da177e4
LT		 2012 }
2013
b12203d2 2014 if (core->ir)
92f4fc10 2015 cx88_ir_stop(core);
b12203d2 2016
e52e98a7 2017 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 2018 pci_disable_device(pci_dev);
2019
2020 /* unregister stuff */
2021
2022 free_irq(pci_dev->irq, dev);
2023 cx8800_unregister_video(dev);
2024 pci_set_drvdata(pci_dev, NULL);
2025
2026 /* free memory */
2027 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
e52e98a7 2028 cx88_core_put(core,dev->pci);
1da177e4
LT		 2029 kfree(dev);
2030}
2031
17bc98a4 2032#ifdef CONFIG_PM
1da177e4
LT		 2033static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
2034{
b45009b0 2035 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 2036 struct cx88_core *core = dev->core;
2037
2038 /* stop video+vbi capture */
2039 spin_lock(&dev->slock);
2040 if (!list_empty(&dev->vidq.active)) {
5772f813 2041 printk("%s/0: suspend video\n", core->name);
1da177e4
LT		 2042 stop_video_dma(dev);
2043 del_timer(&dev->vidq.timeout);
2044 }
2045 if (!list_empty(&dev->vbiq.active)) {
5772f813 2046 printk("%s/0: suspend vbi\n", core->name);
1da177e4
LT		 2047 cx8800_stop_vbi_dma(dev);
2048 del_timer(&dev->vbiq.timeout);
2049 }
2050 spin_unlock(&dev->slock);
2051
13595a51 2052 if (core->ir)
92f4fc10 2053 cx88_ir_stop(core);
1da177e4 2054 /* FIXME -- shutdown device */
e52e98a7 2055 cx88_shutdown(core);
1da177e4
LT		 2056
2057 pci_save_state(pci_dev);
2058 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
2059 pci_disable_device(pci_dev);
2060 dev->state.disabled = 1;
2061 }
2062 return 0;
2063}
2064
2065static int cx8800_resume(struct pci_dev *pci_dev)
2066{
b45009b0 2067 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 2068 struct cx88_core *core = dev->core;
08adb9e2 2069 int err;
1da177e4
LT		 2070
2071 if (dev->state.disabled) {
08adb9e2
MCC		 2072 err=pci_enable_device(pci_dev);
2073 if (err) {
5772f813
TP		 2074 printk(KERN_ERR "%s/0: can't enable device\n",
2075 core->name);
08adb9e2
MCC		 2076 return err;
2077 }
2078
1da177e4
LT		 2079 dev->state.disabled = 0;
2080 }
08adb9e2
MCC		 2081 err= pci_set_power_state(pci_dev, PCI_D0);
2082 if (err) {
5772f813 2083 printk(KERN_ERR "%s/0: can't set power state\n", core->name);
08adb9e2
MCC		 2084 pci_disable_device(pci_dev);
2085 dev->state.disabled = 1;
2086
2087 return err;
2088 }
1da177e4
LT		 2089 pci_restore_state(pci_dev);
2090
1da177e4 2091 /* FIXME: re-initialize hardware */
e52e98a7 2092 cx88_reset(core);
13595a51 2093 if (core->ir)
92f4fc10 2094 cx88_ir_start(core);
13595a51
MCC		 2095
2096 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1da177e4
LT		 2097
2098 /* restart video+vbi capture */
2099 spin_lock(&dev->slock);
2100 if (!list_empty(&dev->vidq.active)) {
5772f813 2101 printk("%s/0: resume video\n", core->name);
1da177e4
LT		 2102 restart_video_queue(dev,&dev->vidq);
2103 }
2104 if (!list_empty(&dev->vbiq.active)) {
5772f813 2105 printk("%s/0: resume vbi\n", core->name);
1da177e4
LT		 2106 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2107 }
2108 spin_unlock(&dev->slock);
2109
2110 return 0;
2111}
17bc98a4 2112#endif
1da177e4
LT		 2113
2114/* ----------------------------------------------------------- */
2115
2e4e98e7 2116static const struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2117 {
2118 .vendor = 0x14f1,
2119 .device = 0x8800,
b45009b0
MCC		 2120 .subvendor = PCI_ANY_ID,
2121 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2122 },{
2123 /* --- end of list --- */
2124 }
2125};
2126MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2127
2128static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2129 .name = "cx8800",
2130 .id_table = cx8800_pci_tbl,
2131 .probe = cx8800_initdev,
2132 .remove = __devexit_p(cx8800_finidev),
17bc98a4 2133#ifdef CONFIG_PM
1da177e4
LT		 2134 .suspend = cx8800_suspend,
2135 .resume = cx8800_resume,
17bc98a4 2136#endif
1da177e4
LT		 2137};
2138
31d0f845 2139static int __init cx8800_init(void)
1da177e4 2140{
5772f813 2141 printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n",
1da177e4
LT		 2142 (CX88_VERSION_CODE >> 16) & 0xff,
2143 (CX88_VERSION_CODE >> 8) & 0xff,
2144 CX88_VERSION_CODE & 0xff);
2145#ifdef SNAPSHOT
2146 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2147 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2148#endif
2149 return pci_register_driver(&cx8800_pci_driver);
2150}
2151
31d0f845 2152static void __exit cx8800_fini(void)
1da177e4
LT		 2153{
2154 pci_unregister_driver(&cx8800_pci_driver);
2155}
2156
2157module_init(cx8800_init);
2158module_exit(cx8800_fini);
2159
2160/* ----------------------------------------------------------- */
2161/*
2162 * Local variables:
2163 * c-basic-offset: 8
2164 * End:
b45009b0 2165 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2166 */
kernel source for telekom puls (alcatel/mediatek)