[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / cx23885 / cx23885.h

/*
 *  Driver for the Conexant CX23885 PCIe bridge
 *
 *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/pci.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include <linux/kdev_t.h>

#include <media/v4l2-common.h>
#include <media/tuner.h>
#include <media/tveeprom.h>
#include <media/videobuf-dma-sg.h>
#include <media/videobuf-dvb.h>

#include "btcx-risc.h"
#include "cx23885-reg.h"
#include "media/cx2341x.h"

#include <linux/version.h>
#include <linux/mutex.h>

#define CX23885_VERSION_CODE KERNEL_VERSION(0,0,1)

#define UNSET (-1U)

#define CX23885_MAXBOARDS 8

/* Max number of inputs by card */
#define MAX_CX23885_INPUT 8
#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
#define RESOURCE_OVERLAY       1
#define RESOURCE_VIDEO         2
#define RESOURCE_VBI           4

#define BUFFER_TIMEOUT     (HZ)  /* 0.5 seconds */

#define CX23885_BOARD_NOAUTO               UNSET
#define CX23885_BOARD_UNKNOWN                  0
#define CX23885_BOARD_HAUPPAUGE_HVR1800lp      1
#define CX23885_BOARD_HAUPPAUGE_HVR1800        2
#define CX23885_BOARD_HAUPPAUGE_HVR1250        3
#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP   4
#define CX23885_BOARD_HAUPPAUGE_HVR1500Q       5
#define CX23885_BOARD_HAUPPAUGE_HVR1500        6
#define CX23885_BOARD_HAUPPAUGE_HVR1200        7
#define CX23885_BOARD_HAUPPAUGE_HVR1700        8
#define CX23885_BOARD_HAUPPAUGE_HVR1400        9
#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12

/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
#define CX23885_NORMS (\
	V4L2_STD_NTSC_M |  V4L2_STD_NTSC_M_JP |  V4L2_STD_NTSC_443 | \
	V4L2_STD_PAL_BG |  V4L2_STD_PAL_DK    |  V4L2_STD_PAL_I    | \
	V4L2_STD_PAL_M  |  V4L2_STD_PAL_N     |  V4L2_STD_PAL_Nc   | \
	V4L2_STD_PAL_60 |  V4L2_STD_SECAM_L   |  V4L2_STD_SECAM_DK)

struct cx23885_fmt {
	char  *name;
	u32   fourcc;          /* v4l2 format id */
	int   depth;
	int   flags;
	u32   cxformat;
};

struct cx23885_ctrl {
	struct v4l2_queryctrl v;
	u32                   off;
	u32                   reg;
	u32                   mask;
	u32                   shift;
};

struct cx23885_tvnorm {
	char		*name;
	v4l2_std_id	id;
	u32		cxiformat;
	u32		cxoformat;
};

struct cx23885_fh {
	struct cx23885_dev         *dev;
	enum v4l2_buf_type         type;
	int                        radio;
	u32                        resources;

	/* video overlay */
	struct v4l2_window         win;
	struct v4l2_clip           *clips;
	unsigned int               nclips;

	/* video capture */
	struct cx23885_fmt         *fmt;
	unsigned int               width, height;

	/* vbi capture */
	struct videobuf_queue      vidq;
	struct videobuf_queue      vbiq;

	/* MPEG Encoder specifics ONLY */
	struct videobuf_queue      mpegq;
	atomic_t                   v4l_reading;
};

enum cx23885_itype {
	CX23885_VMUX_COMPOSITE1 = 1,
	CX23885_VMUX_COMPOSITE2,
	CX23885_VMUX_COMPOSITE3,
	CX23885_VMUX_COMPOSITE4,
	CX23885_VMUX_SVIDEO,
	CX23885_VMUX_TELEVISION,
	CX23885_VMUX_CABLE,
	CX23885_VMUX_DVB,
	CX23885_VMUX_DEBUG,
	CX23885_RADIO,
};

enum cx23885_src_sel_type {
	CX23885_SRC_SEL_EXT_656_VIDEO = 0,
	CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
};

/* buffer for one video frame */
struct cx23885_buffer {
	/* common v4l buffer stuff -- must be first */
	struct videobuf_buffer vb;

	/* cx23885 specific */
	unsigned int           bpl;
	struct btcx_riscmem    risc;
	struct cx23885_fmt     *fmt;
	u32                    count;
};

struct cx23885_input {
	enum cx23885_itype type;
	unsigned int    vmux;
	u32             gpio0, gpio1, gpio2, gpio3;
};

typedef enum {
	CX23885_MPEG_UNDEFINED = 0,
	CX23885_MPEG_DVB,
	CX23885_ANALOG_VIDEO,
	CX23885_MPEG_ENCODER,
} port_t;

struct cx23885_board {
	char                    *name;
	port_t			porta, portb, portc;
	unsigned int		tuner_type;
	unsigned int		radio_type;
	unsigned char		tuner_addr;
	unsigned char		radio_addr;

	/* Vendors can and do run the PCIe bridge at different
	 * clock rates, driven physically by crystals on the PCBs.
	 * The core has to accomodate this. This allows the user
	 * to add new boards with new frequencys. The value is
	 * expressed in Hz.
	 *
	 * The core framework will default this value based on
	 * current designs, but it can vary.
	 */
	u32			clk_freq;
	struct cx23885_input    input[MAX_CX23885_INPUT];
};

struct cx23885_subid {
	u16     subvendor;
	u16     subdevice;
	u32     card;
};

struct cx23885_i2c {
	struct cx23885_dev *dev;

	int                        nr;

	/* i2c i/o */
	struct i2c_adapter         i2c_adap;
	struct i2c_algo_bit_data   i2c_algo;
	struct i2c_client          i2c_client;
	u32                        i2c_rc;

	/* 885 registers used for raw addess */
	u32                        i2c_period;
	u32                        reg_ctrl;
	u32                        reg_stat;
	u32                        reg_addr;
	u32                        reg_rdata;
	u32                        reg_wdata;
};

struct cx23885_dmaqueue {
	struct list_head       active;
	struct list_head       queued;
	struct timer_list      timeout;
	struct btcx_riscmem    stopper;
	u32                    count;
};

struct cx23885_tsport {
	struct cx23885_dev *dev;

	int                        nr;
	int                        sram_chno;

	struct videobuf_dvb        dvb;

	/* dma queues */
	struct cx23885_dmaqueue    mpegq;
	u32                        ts_packet_size;
	u32                        ts_packet_count;

	int                        width;
	int                        height;

	spinlock_t                 slock;

	/* registers */
	u32                        reg_gpcnt;
	u32                        reg_gpcnt_ctl;
	u32                        reg_dma_ctl;
	u32                        reg_lngth;
	u32                        reg_hw_sop_ctrl;
	u32                        reg_gen_ctrl;
	u32                        reg_bd_pkt_status;
	u32                        reg_sop_status;
	u32                        reg_fifo_ovfl_stat;
	u32                        reg_vld_misc;
	u32                        reg_ts_clk_en;
	u32                        reg_ts_int_msk;
	u32                        reg_ts_int_stat;
	u32                        reg_src_sel;

	/* Default register vals */
	int                        pci_irqmask;
	u32                        dma_ctl_val;
	u32                        ts_int_msk_val;
	u32                        gen_ctrl_val;
	u32                        ts_clk_en_val;
	u32                        src_sel_val;
	u32                        vld_misc_val;
	u32                        hw_sop_ctrl_val;
};

struct cx23885_dev {
	struct list_head           devlist;
	atomic_t                   refcount;

	/* pci stuff */
	struct pci_dev             *pci;
	unsigned char              pci_rev, pci_lat;
	int                        pci_bus, pci_slot;
	u32                        __iomem *lmmio;
	u8                         __iomem *bmmio;
	int                        pci_irqmask;
	int                        hwrevision;

	/* This valud is board specific and is used to configure the
	 * AV core so we see nice clean and stable video and audio. */
	u32                        clk_freq;

	/* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
	struct cx23885_i2c         i2c_bus[3];

	int                        nr;
	struct mutex               lock;

	/* board details */
	unsigned int               board;
	char                       name[32];

	struct cx23885_tsport      ts1, ts2;

	/* sram configuration */
	struct sram_channel        *sram_channels;

	enum {
		CX23885_BRIDGE_UNDEFINED = 0,
		CX23885_BRIDGE_885 = 885,
		CX23885_BRIDGE_887 = 887,
	} bridge;

	/* Analog video */
	u32                        resources;
	unsigned int               input;
	u32                        tvaudio;
	v4l2_std_id                tvnorm;
	unsigned int               tuner_type;
	unsigned char              tuner_addr;
	unsigned int               radio_type;
	unsigned char              radio_addr;
	unsigned int               has_radio;

	/* V4l */
	u32                        freq;
	struct video_device        *video_dev;
	struct video_device        *vbi_dev;
	struct video_device        *radio_dev;

	struct cx23885_dmaqueue    vidq;
	struct cx23885_dmaqueue    vbiq;
	spinlock_t                 slock;

	/* MPEG Encoder ONLY settings */
	u32                        cx23417_mailbox;
	struct cx2341x_mpeg_params mpeg_params;
	struct video_device        *v4l_device;
	atomic_t                   v4l_reader_count;
	struct cx23885_tvnorm      encodernorm;

};

extern struct list_head cx23885_devlist;

#define SRAM_CH01  0 /* Video A */
#define SRAM_CH02  1 /* VBI A */
#define SRAM_CH03  2 /* Video B */
#define SRAM_CH04  3 /* Transport via B */
#define SRAM_CH05  4 /* VBI B */
#define SRAM_CH06  5 /* Video C */
#define SRAM_CH07  6 /* Transport via C */
#define SRAM_CH08  7 /* Audio Internal A */
#define SRAM_CH09  8 /* Audio Internal B */
#define SRAM_CH10  9 /* Audio External */
#define SRAM_CH11 10 /* COMB_3D_N */
#define SRAM_CH12 11 /* Comb 3D N1 */
#define SRAM_CH13 12 /* Comb 3D N2 */
#define SRAM_CH14 13 /* MOE Vid */
#define SRAM_CH15 14 /* MOE RSLT */

struct sram_channel {
	char *name;
	u32  cmds_start;
	u32  ctrl_start;
	u32  cdt;
	u32  fifo_start;;
	u32  fifo_size;
	u32  ptr1_reg;
	u32  ptr2_reg;
	u32  cnt1_reg;
	u32  cnt2_reg;
	u32  jumponly;
};

/* ----------------------------------------------------------- */

#define cx_read(reg)             readl(dev->lmmio + ((reg)>>2))
#define cx_write(reg,value)      writel((value), dev->lmmio + ((reg)>>2))

#define cx_andor(reg,mask,value) \
  writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
  ((value) & (mask)), dev->lmmio+((reg)>>2))

#define cx_set(reg,bit)          cx_andor((reg),(bit),(bit))
#define cx_clear(reg,bit)        cx_andor((reg),(bit),0)

/* ----------------------------------------------------------- */
/* cx23885-core.c                                              */

extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
	struct sram_channel *ch,
	unsigned int bpl, u32 risc);

extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
	struct sram_channel *ch);

extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
	u32 reg, u32 mask, u32 value);

extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
	struct scatterlist *sglist,
	unsigned int top_offset, unsigned int bottom_offset,
	unsigned int bpl, unsigned int padding, unsigned int lines);

void cx23885_cancel_buffers(struct cx23885_tsport *port);

extern int cx23885_restart_queue(struct cx23885_tsport *port,
				struct cx23885_dmaqueue *q);

extern void cx23885_wakeup(struct cx23885_tsport *port,
			   struct cx23885_dmaqueue *q, u32 count);


/* ----------------------------------------------------------- */
/* cx23885-cards.c                                             */
extern struct cx23885_board cx23885_boards[];
extern const unsigned int cx23885_bcount;

extern struct cx23885_subid cx23885_subids[];
extern const unsigned int cx23885_idcount;

extern int cx23885_tuner_callback(void *priv, int command, int arg);
extern void cx23885_card_list(struct cx23885_dev *dev);
extern int  cx23885_ir_init(struct cx23885_dev *dev);
extern void cx23885_gpio_setup(struct cx23885_dev *dev);
extern void cx23885_card_setup(struct cx23885_dev *dev);
extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);

extern int cx23885_dvb_register(struct cx23885_tsport *port);
extern int cx23885_dvb_unregister(struct cx23885_tsport *port);

extern int cx23885_buf_prepare(struct videobuf_queue *q,
			       struct cx23885_tsport *port,
			       struct cx23885_buffer *buf,
			       enum v4l2_field field);
extern void cx23885_buf_queue(struct cx23885_tsport *port,
			      struct cx23885_buffer *buf);
extern void cx23885_free_buffer(struct videobuf_queue *q,
				struct cx23885_buffer *buf);

/* ----------------------------------------------------------- */
/* cx23885-video.c                                             */
/* Video */
extern int cx23885_video_register(struct cx23885_dev *dev);
extern void cx23885_video_unregister(struct cx23885_dev *dev);
extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);

/* ----------------------------------------------------------- */
/* cx23885-vbi.c                                               */
extern int cx23885_vbi_fmt(struct file *file, void *priv,
	struct v4l2_format *f);
extern void cx23885_vbi_timeout(unsigned long data);
extern struct videobuf_queue_ops cx23885_vbi_qops;

/* cx23885-i2c.c                                                */
extern int cx23885_i2c_register(struct cx23885_i2c *bus);
extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
extern void cx23885_call_i2c_clients(struct cx23885_i2c *bus, unsigned int cmd,
				     void *arg);
extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);

/* ----------------------------------------------------------- */
/* cx23885-417.c                                               */
extern int cx23885_417_register(struct cx23885_dev *dev);
extern void cx23885_417_unregister(struct cx23885_dev *dev);
extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
extern void cx23885_mc417_init(struct cx23885_dev *dev);
extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);


/* ----------------------------------------------------------- */
/* tv norms                                                    */

static inline unsigned int norm_maxw(v4l2_std_id norm)
{
	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
}

static inline unsigned int norm_maxh(v4l2_std_id norm)
{
	return (norm & V4L2_STD_625_50) ? 576 : 480;
}

static inline unsigned int norm_swidth(v4l2_std_id norm)
{
	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
}


/*
 * Local variables:
 * c-basic-offset: 8
 * End:
 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
 */
Commit	Line	Data
d19770e5 ST	1	/*
	2	* Driver for the Conexant CX23885 PCIe bridge
	3	*
6d897616	4	* Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5 ST	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	*
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	20	*/
	21
	22	#include <linux/pci.h>
	23	#include <linux/i2c.h>
	24	#include <linux/i2c-algo-bit.h>
	25	#include <linux/kdev_t.h>
	26
	27	#include <media/v4l2-common.h>
	28	#include <media/tuner.h>
	29	#include <media/tveeprom.h>
409d84f8 TP	30	#include <media/videobuf-dma-sg.h>
409d84f8 TP	31	#include <media/videobuf-dvb.h>
d19770e5 ST	32
	33	#include "btcx-risc.h"
	34	#include "cx23885-reg.h"
b1b81f1d	35	#include "media/cx2341x.h"
d19770e5 ST	36
	37	#include <linux/version.h>
	38	#include <linux/mutex.h>
	39
047646bf	40	#define CX23885_VERSION_CODE KERNEL_VERSION(0,0,1)
d19770e5 ST	41
	42	#define UNSET (-1U)
	43
	44	#define CX23885_MAXBOARDS 8
	45
d19770e5 ST	46	/* Max number of inputs by card */
d19770e5 ST	47	#define MAX_CX23885_INPUT 8
7b888014 ST	48	#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
	49	#define RESOURCE_OVERLAY 1
	50	#define RESOURCE_VIDEO 2
	51	#define RESOURCE_VBI 4
d19770e5	52
d19770e5 ST	53	#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
	54
	55	#define CX23885_BOARD_NOAUTO UNSET
	56	#define CX23885_BOARD_UNKNOWN 0
	57	#define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
	58	#define CX23885_BOARD_HAUPPAUGE_HVR1800 2
a77743bc	59	#define CX23885_BOARD_HAUPPAUGE_HVR1250 3
9bc37caa	60	#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
d1987d55	61	#define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
07b4a835	62	#define CX23885_BOARD_HAUPPAUGE_HVR1500 6
b3ea0166	63	#define CX23885_BOARD_HAUPPAUGE_HVR1200 7
a780a31c	64	#define CX23885_BOARD_HAUPPAUGE_HVR1700 8
66762373	65	#define CX23885_BOARD_HAUPPAUGE_HVR1400 9
335377b7	66	#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
aef2d186	67	#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
4c56b04a	68	#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
d19770e5	69
7b888014 ST	70	/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
	71	#define CX23885_NORMS (\
	72	V4L2_STD_NTSC_M \| V4L2_STD_NTSC_M_JP \| V4L2_STD_NTSC_443 \| \
	73	V4L2_STD_PAL_BG \| V4L2_STD_PAL_DK \| V4L2_STD_PAL_I \| \
	74	V4L2_STD_PAL_M \| V4L2_STD_PAL_N \| V4L2_STD_PAL_Nc \| \
	75	V4L2_STD_PAL_60 \| V4L2_STD_SECAM_L \| V4L2_STD_SECAM_DK)
	76
	77	struct cx23885_fmt {
	78	char *name;
	79	u32 fourcc; /* v4l2 format id */
	80	int depth;
	81	int flags;
	82	u32 cxformat;
	83	};
	84
	85	struct cx23885_ctrl {
	86	struct v4l2_queryctrl v;
	87	u32 off;
	88	u32 reg;
	89	u32 mask;
	90	u32 shift;
	91	};
	92
	93	struct cx23885_tvnorm {
	94	char *name;
	95	v4l2_std_id id;
	96	u32 cxiformat;
	97	u32 cxoformat;
	98	};
	99
	100	struct cx23885_fh {
	101	struct cx23885_dev *dev;
	102	enum v4l2_buf_type type;
	103	int radio;
	104	u32 resources;
	105
	106	/* video overlay */
	107	struct v4l2_window win;
	108	struct v4l2_clip *clips;
	109	unsigned int nclips;
	110
	111	/* video capture */
	112	struct cx23885_fmt *fmt;
	113	unsigned int width, height;
	114
	115	/* vbi capture */
	116	struct videobuf_queue vidq;
	117	struct videobuf_queue vbiq;
	118
	119	/* MPEG Encoder specifics ONLY */
	120	struct videobuf_queue mpegq;
	121	atomic_t v4l_reading;
	122	};
	123
d19770e5 ST	124	enum cx23885_itype {
	125	CX23885_VMUX_COMPOSITE1 = 1,
	126	CX23885_VMUX_COMPOSITE2,
	127	CX23885_VMUX_COMPOSITE3,
	128	CX23885_VMUX_COMPOSITE4,
	129	CX23885_VMUX_SVIDEO,
	130	CX23885_VMUX_TELEVISION,
	131	CX23885_VMUX_CABLE,
	132	CX23885_VMUX_DVB,
	133	CX23885_VMUX_DEBUG,
	134	CX23885_RADIO,
	135	};
	136
579f1163 ST	137	enum cx23885_src_sel_type {
	138	CX23885_SRC_SEL_EXT_656_VIDEO = 0,
	139	CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
	140	};
	141
d19770e5 ST	142	/* buffer for one video frame */
	143	struct cx23885_buffer {
	144	/* common v4l buffer stuff -- must be first */
	145	struct videobuf_buffer vb;
	146
	147	/* cx23885 specific */
	148	unsigned int bpl;
	149	struct btcx_riscmem risc;
	150	struct cx23885_fmt *fmt;
	151	u32 count;
	152	};
	153
	154	struct cx23885_input {
	155	enum cx23885_itype type;
	156	unsigned int vmux;
	157	u32 gpio0, gpio1, gpio2, gpio3;
	158	};
	159
661c7e44 ST	160	typedef enum {
661c7e44 ST	161	CX23885_MPEG_UNDEFINED = 0,
7b888014 ST	162	CX23885_MPEG_DVB,
7b888014 ST	163	CX23885_ANALOG_VIDEO,
b1b81f1d	164	CX23885_MPEG_ENCODER,
661c7e44 ST	165	} port_t;
661c7e44 ST	166
d19770e5 ST	167	struct cx23885_board {
d19770e5 ST	168	char *name;
7b888014 ST	169	port_t porta, portb, portc;
	170	unsigned int tuner_type;
	171	unsigned int radio_type;
	172	unsigned char tuner_addr;
	173	unsigned char radio_addr;
c7712613 ST	174
	175	/* Vendors can and do run the PCIe bridge at different
	176	* clock rates, driven physically by crystals on the PCBs.
	177	* The core has to accomodate this. This allows the user
	178	* to add new boards with new frequencys. The value is
	179	* expressed in Hz.
	180	*
	181	* The core framework will default this value based on
	182	* current designs, but it can vary.
	183	*/
	184	u32 clk_freq;
d19770e5 ST	185	struct cx23885_input input[MAX_CX23885_INPUT];
	186	};
	187
	188	struct cx23885_subid {
	189	u16 subvendor;
	190	u16 subdevice;
	191	u32 card;
	192	};
	193
	194	struct cx23885_i2c {
	195	struct cx23885_dev *dev;
	196
	197	int nr;
	198
	199	/* i2c i/o */
	200	struct i2c_adapter i2c_adap;
	201	struct i2c_algo_bit_data i2c_algo;
	202	struct i2c_client i2c_client;
	203	u32 i2c_rc;
	204
	205	/* 885 registers used for raw addess */
	206	u32 i2c_period;
	207	u32 reg_ctrl;
	208	u32 reg_stat;
	209	u32 reg_addr;
	210	u32 reg_rdata;
	211	u32 reg_wdata;
	212	};
	213
	214	struct cx23885_dmaqueue {
	215	struct list_head active;
	216	struct list_head queued;
	217	struct timer_list timeout;
	218	struct btcx_riscmem stopper;
	219	u32 count;
	220	};
	221
	222	struct cx23885_tsport {
	223	struct cx23885_dev *dev;
	224
	225	int nr;
	226	int sram_chno;
	227
	228	struct videobuf_dvb dvb;
	229
	230	/* dma queues */
	231	struct cx23885_dmaqueue mpegq;
	232	u32 ts_packet_size;
	233	u32 ts_packet_count;
	234
	235	int width;
	236	int height;
	237
	238	spinlock_t slock;
	239
	240	/* registers */
	241	u32 reg_gpcnt;
	242	u32 reg_gpcnt_ctl;
	243	u32 reg_dma_ctl;
	244	u32 reg_lngth;
	245	u32 reg_hw_sop_ctrl;
	246	u32 reg_gen_ctrl;
	247	u32 reg_bd_pkt_status;
	248	u32 reg_sop_status;
249	u32 reg_fifo_ovfl_stat;
250	u32 reg_vld_misc;
251	u32 reg_ts_clk_en;
252	u32 reg_ts_int_msk;
a6a3f140	253	u32 reg_ts_int_stat;
579f1163	254	u32 reg_src_sel;
d19770e5 ST	255
	256	/* Default register vals */
	257	int pci_irqmask;
	258	u32 dma_ctl_val;
	259	u32 ts_int_msk_val;
	260	u32 gen_ctrl_val;
	261	u32 ts_clk_en_val;
579f1163	262	u32 src_sel_val;
b1b81f1d ST	263	u32 vld_misc_val;
b1b81f1d ST	264	u32 hw_sop_ctrl_val;
d19770e5 ST	265	};
	266
	267	struct cx23885_dev {
	268	struct list_head devlist;
	269	atomic_t refcount;
	270
	271	/* pci stuff */
	272	struct pci_dev *pci;
	273	unsigned char pci_rev, pci_lat;
	274	int pci_bus, pci_slot;
	275	u32 __iomem *lmmio;
	276	u8 __iomem *bmmio;
d19770e5	277	int pci_irqmask;
0ac5881a	278	int hwrevision;
d19770e5	279
c7712613 ST	280	/* This valud is board specific and is used to configure the
	281	* AV core so we see nice clean and stable video and audio. */
	282	u32 clk_freq;
	283
44a6481d	284	/* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
d19770e5 ST	285	struct cx23885_i2c i2c_bus[3];
	286
	287	int nr;
	288	struct mutex lock;
	289
	290	/* board details */
	291	unsigned int board;
	292	char name[32];
	293
a6a3f140	294	struct cx23885_tsport ts1, ts2;
d19770e5 ST	295
	296	/* sram configuration */
	297	struct sram_channel *sram_channels;
e133be0f ST	298
	299	enum {
	300	CX23885_BRIDGE_UNDEFINED = 0,
	301	CX23885_BRIDGE_885 = 885,
	302	CX23885_BRIDGE_887 = 887,
	303	} bridge;
7b888014 ST	304
	305	/* Analog video */
	306	u32 resources;
	307	unsigned int input;
	308	u32 tvaudio;
	309	v4l2_std_id tvnorm;
	310	unsigned int tuner_type;
	311	unsigned char tuner_addr;
	312	unsigned int radio_type;
	313	unsigned char radio_addr;
	314	unsigned int has_radio;
	315
	316	/* V4l */
	317	u32 freq;
	318	struct video_device *video_dev;
	319	struct video_device *vbi_dev;
	320	struct video_device *radio_dev;
	321
	322	struct cx23885_dmaqueue vidq;
	323	struct cx23885_dmaqueue vbiq;
	324	spinlock_t slock;
b1b81f1d ST	325
	326	/* MPEG Encoder ONLY settings */
	327	u32 cx23417_mailbox;
	328	struct cx2341x_mpeg_params mpeg_params;
	329	struct video_device *v4l_device;
	330	atomic_t v4l_reader_count;
	331	struct cx23885_tvnorm encodernorm;
	332
d19770e5 ST	333	};
d19770e5 ST	334
7b888014 ST	335	extern struct list_head cx23885_devlist;
7b888014 ST	336
d19770e5 ST	337	#define SRAM_CH01 0 /* Video A */
	338	#define SRAM_CH02 1 /* VBI A */
	339	#define SRAM_CH03 2 /* Video B */
	340	#define SRAM_CH04 3 /* Transport via B */
	341	#define SRAM_CH05 4 /* VBI B */
	342	#define SRAM_CH06 5 /* Video C */
	343	#define SRAM_CH07 6 /* Transport via C */
	344	#define SRAM_CH08 7 /* Audio Internal A */
	345	#define SRAM_CH09 8 /* Audio Internal B */
	346	#define SRAM_CH10 9 /* Audio External */
	347	#define SRAM_CH11 10 /* COMB_3D_N */
	348	#define SRAM_CH12 11 /* Comb 3D N1 */
	349	#define SRAM_CH13 12 /* Comb 3D N2 */
	350	#define SRAM_CH14 13 /* MOE Vid */
	351	#define SRAM_CH15 14 /* MOE RSLT */
	352
	353	struct sram_channel {
	354	char *name;
	355	u32 cmds_start;
	356	u32 ctrl_start;
	357	u32 cdt;
	358	u32 fifo_start;;
	359	u32 fifo_size;
	360	u32 ptr1_reg;
	361	u32 ptr2_reg;
	362	u32 cnt1_reg;
	363	u32 cnt2_reg;
	364	u32 jumponly;
	365	};
	366
	367	/* ----------------------------------------------------------- */
	368
	369	#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
	370	#define cx_write(reg,value) writel((value), dev->lmmio + ((reg)>>2))
	371
	372	#define cx_andor(reg,mask,value) \
	373	writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) \|\
	374	((value) & (mask)), dev->lmmio+((reg)>>2))
	375
	376	#define cx_set(reg,bit) cx_andor((reg),(bit),(bit))
	377	#define cx_clear(reg,bit) cx_andor((reg),(bit),0)
	378
d19770e5	379	/* ----------------------------------------------------------- */
7b888014 ST	380	/* cx23885-core.c */
	381
	382	extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
	383	struct sram_channel *ch,
	384	unsigned int bpl, u32 risc);
	385
	386	extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
	387	struct sram_channel *ch);
d19770e5	388
7b888014 ST	389	extern int cx23885_risc_stopper(struct pci_dev pci, struct btcx_riscmem risc,
	390	u32 reg, u32 mask, u32 value);
	391
	392	extern int cx23885_risc_buffer(struct pci_dev pci, struct btcx_riscmem risc,
	393	struct scatterlist *sglist,
	394	unsigned int top_offset, unsigned int bottom_offset,
	395	unsigned int bpl, unsigned int padding, unsigned int lines);
	396
	397	void cx23885_cancel_buffers(struct cx23885_tsport *port);
	398
	399	extern int cx23885_restart_queue(struct cx23885_tsport *port,
	400	struct cx23885_dmaqueue *q);
	401
	402	extern void cx23885_wakeup(struct cx23885_tsport *port,
	403	struct cx23885_dmaqueue *q, u32 count);
	404
	405
	406	/* ----------------------------------------------------------- */
	407	/* cx23885-cards.c */
d19770e5 ST	408	extern struct cx23885_board cx23885_boards[];
	409	extern const unsigned int cx23885_bcount;
	410
	411	extern struct cx23885_subid cx23885_subids[];
	412	extern const unsigned int cx23885_idcount;
	413
89ce2216	414	extern int cx23885_tuner_callback(void *priv, int command, int arg);
d19770e5	415	extern void cx23885_card_list(struct cx23885_dev *dev);
a6a3f140 ST	416	extern int cx23885_ir_init(struct cx23885_dev *dev);
a6a3f140 ST	417	extern void cx23885_gpio_setup(struct cx23885_dev *dev);
d19770e5 ST	418	extern void cx23885_card_setup(struct cx23885_dev *dev);
	419	extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
	420
	421	extern int cx23885_dvb_register(struct cx23885_tsport *port);
	422	extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
	423
44a6481d MK	424	extern int cx23885_buf_prepare(struct videobuf_queue *q,
	425	struct cx23885_tsport *port,
	426	struct cx23885_buffer *buf,
	427	enum v4l2_field field);
44a6481d MK	428	extern void cx23885_buf_queue(struct cx23885_tsport *port,
	429	struct cx23885_buffer *buf);
	430	extern void cx23885_free_buffer(struct videobuf_queue *q,
	431	struct cx23885_buffer *buf);
d19770e5 ST	432
d19770e5 ST	433	/* ----------------------------------------------------------- */
7b888014 ST	434	/* cx23885-video.c */
	435	/* Video */
	436	extern int cx23885_video_register(struct cx23885_dev *dev);
	437	extern void cx23885_video_unregister(struct cx23885_dev *dev);
	438	extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
	439
	440	/* ----------------------------------------------------------- */
	441	/* cx23885-vbi.c */
	442	extern int cx23885_vbi_fmt(struct file file, void priv,
	443	struct v4l2_format *f);
	444	extern void cx23885_vbi_timeout(unsigned long data);
	445	extern struct videobuf_queue_ops cx23885_vbi_qops;
	446
d19770e5 ST	447	/* cx23885-i2c.c */
	448	extern int cx23885_i2c_register(struct cx23885_i2c *bus);
	449	extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
44a6481d MK	450	extern void cx23885_call_i2c_clients(struct cx23885_i2c *bus, unsigned int cmd,
44a6481d MK	451	void *arg);
a589b665	452	extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
d19770e5	453
b1b81f1d ST	454	/* ----------------------------------------------------------- */
	455	/* cx23885-417.c */
	456	extern int cx23885_417_register(struct cx23885_dev *dev);
	457	extern void cx23885_417_unregister(struct cx23885_dev *dev);
	458	extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
	459	extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
	460	extern void cx23885_mc417_init(struct cx23885_dev *dev);
	461	extern int mc417_memory_read(struct cx23885_dev dev, u32 address, u32 value);
	462	extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
	463
	464
7b888014 ST	465	/* ----------------------------------------------------------- */
	466	/* tv norms */
	467
	468	static inline unsigned int norm_maxw(v4l2_std_id norm)
	469	{
	470	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
	471	}
	472
	473	static inline unsigned int norm_maxh(v4l2_std_id norm)
	474	{
	475	return (norm & V4L2_STD_625_50) ? 576 : 480;
	476	}
	477
	478	static inline unsigned int norm_swidth(v4l2_std_id norm)
	479	{
	480	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
	481	}
	482
	483
d19770e5 ST	484	/*
	485	* Local variables:
	486	* c-basic-offset: 8
	487	* End:
	488	* kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
	489	*/