projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
V4L/DVB (12304): cx23885: Remove hardcoded gpio bits from the encoder driver
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / cx23885 / cx23885-cards.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
7b888014 26#include <media/cx25840.h>
d19770e5
ST		 27
28#include "cx23885.h"
90a71b1c 29#include "tuner-xc2028.h"
5a23b076 30#include "netup-init.h"
d19770e5
ST		 31
32/* ------------------------------------------------------------------ */
33/* board config info */
34
35struct cx23885_board cx23885_boards[] = {
36 [CX23885_BOARD_UNKNOWN] = {
37 .name = "UNKNOWN/GENERIC",
c7712613
ST		 38 /* Ensure safe default for unknown boards */
39 .clk_freq = 0,
d19770e5
ST		 40 .input = {{
41 .type = CX23885_VMUX_COMPOSITE1,
42 .vmux = 0,
9c8ced51 43 }, {
d19770e5
ST		 44 .type = CX23885_VMUX_COMPOSITE2,
45 .vmux = 1,
9c8ced51 46 }, {
d19770e5
ST		 47 .type = CX23885_VMUX_COMPOSITE3,
48 .vmux = 2,
9c8ced51 49 }, {
d19770e5
ST		 50 .type = CX23885_VMUX_COMPOSITE4,
51 .vmux = 3,
9c8ced51 52 } },
d19770e5
ST		 53 },
54 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
55 .name = "Hauppauge WinTV-HVR1800lp",
d19770e5
ST		 56 .portc = CX23885_MPEG_DVB,
57 .input = {{
58 .type = CX23885_VMUX_TELEVISION,
59 .vmux = 0,
60 .gpio0 = 0xff00,
9c8ced51 61 }, {
d19770e5
ST		 62 .type = CX23885_VMUX_DEBUG,
63 .vmux = 0,
64 .gpio0 = 0xff01,
9c8ced51 65 }, {
d19770e5
ST		 66 .type = CX23885_VMUX_COMPOSITE1,
67 .vmux = 1,
68 .gpio0 = 0xff02,
9c8ced51 69 }, {
d19770e5
ST		 70 .type = CX23885_VMUX_SVIDEO,
71 .vmux = 2,
72 .gpio0 = 0xff02,
9c8ced51 73 } },
d19770e5
ST		 74 },
75 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
76 .name = "Hauppauge WinTV-HVR1800",
7b888014 77 .porta = CX23885_ANALOG_VIDEO,
a589b665 78 .portb = CX23885_MPEG_ENCODER,
d19770e5 79 .portc = CX23885_MPEG_DVB,
7b888014
ST		 80 .tuner_type = TUNER_PHILIPS_TDA8290,
81 .tuner_addr = 0x42, /* 0x84 >> 1 */
d19770e5
ST		 82 .input = {{
83 .type = CX23885_VMUX_TELEVISION,
7b888014
ST		 84 .vmux = CX25840_VIN7_CH3 |
85 CX25840_VIN5_CH2 |
86 CX25840_VIN2_CH1,
87 .gpio0 = 0,
9c8ced51 88 }, {
d19770e5 89 .type = CX23885_VMUX_COMPOSITE1,
7b888014
ST		 90 .vmux = CX25840_VIN7_CH3 |
91 CX25840_VIN4_CH2 |
92 CX25840_VIN6_CH1,
93 .gpio0 = 0,
9c8ced51 94 }, {
d19770e5 95 .type = CX23885_VMUX_SVIDEO,
7b888014
ST		 96 .vmux = CX25840_VIN7_CH3 |
97 CX25840_VIN4_CH2 |
98 CX25840_VIN8_CH1 |
99 CX25840_SVIDEO_ON,
100 .gpio0 = 0,
9c8ced51 101 } },
d19770e5 102 },
a77743bc
ST		 103 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
104 .name = "Hauppauge WinTV-HVR1250",
105 .portc = CX23885_MPEG_DVB,
106 .input = {{
107 .type = CX23885_VMUX_TELEVISION,
108 .vmux = 0,
109 .gpio0 = 0xff00,
9c8ced51 110 }, {
a77743bc
ST		 111 .type = CX23885_VMUX_DEBUG,
112 .vmux = 0,
113 .gpio0 = 0xff01,
9c8ced51 114 }, {
a77743bc
ST		 115 .type = CX23885_VMUX_COMPOSITE1,
116 .vmux = 1,
117 .gpio0 = 0xff02,
9c8ced51 118 }, {
a77743bc
ST		 119 .type = CX23885_VMUX_SVIDEO,
120 .vmux = 2,
121 .gpio0 = 0xff02,
9c8ced51 122 } },
a77743bc 123 },
9bc37caa
MK		 124 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
125 .name = "DViCO FusionHDTV5 Express",
a6a3f140 126 .portb = CX23885_MPEG_DVB,
9bc37caa 127 },
d1987d55
ST		 128 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
129 .name = "Hauppauge WinTV-HVR1500Q",
130 .portc = CX23885_MPEG_DVB,
131 },
07b4a835
MK		 132 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
133 .name = "Hauppauge WinTV-HVR1500",
134 .portc = CX23885_MPEG_DVB,
135 },
b3ea0166
ST		 136 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
137 .name = "Hauppauge WinTV-HVR1200",
138 .portc = CX23885_MPEG_DVB,
139 },
a780a31c
ST		 140 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
141 .name = "Hauppauge WinTV-HVR1700",
142 .portc = CX23885_MPEG_DVB,
143 },
66762373
ST		 144 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
145 .name = "Hauppauge WinTV-HVR1400",
146 .portc = CX23885_MPEG_DVB,
147 },
335377b7
MK		 148 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
149 .name = "DViCO FusionHDTV7 Dual Express",
aaadeac8 150 .portb = CX23885_MPEG_DVB,
335377b7
MK		 151 .portc = CX23885_MPEG_DVB,
152 },
aef2d186
ST		 153 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
154 .name = "DViCO FusionHDTV DVB-T Dual Express",
155 .portb = CX23885_MPEG_DVB,
156 .portc = CX23885_MPEG_DVB,
157 },
4c56b04a
ST		 158 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
159 .name = "Leadtek Winfast PxDVR3200 H",
160 .portc = CX23885_MPEG_DVB,
161 },
9bb1b7e8
IL		 162 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
163 .name = "Compro VideoMate E650F",
164 .portc = CX23885_MPEG_DVB,
165 },
96318d0c
IL		 166 [CX23885_BOARD_TBS_6920] = {
167 .name = "TurboSight TBS 6920",
168 .portb = CX23885_MPEG_DVB,
169 },
579943f5
IL		 170 [CX23885_BOARD_TEVII_S470] = {
171 .name = "TeVii S470",
172 .portb = CX23885_MPEG_DVB,
173 },
c9b8b04b
IL		 174 [CX23885_BOARD_DVBWORLD_2005] = {
175 .name = "DVBWorld DVB-S2 2005",
176 .portb = CX23885_MPEG_DVB,
177 },
5a23b076
IL		 178 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
179 .cimax = 1,
180 .name = "NetUP Dual DVB-S2 CI",
181 .portb = CX23885_MPEG_DVB,
182 .portc = CX23885_MPEG_DVB,
183 },
2074dffa
ST		 184 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
185 .name = "Hauppauge WinTV-HVR1270",
a5dbf457 186 .portc = CX23885_MPEG_DVB,
2074dffa 187 },
d099becb
MK		 188 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
189 .name = "Hauppauge WinTV-HVR1275",
190 .portc = CX23885_MPEG_DVB,
191 },
19bc5796
MK		 192 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
193 .name = "Hauppauge WinTV-HVR1255",
194 .portc = CX23885_MPEG_DVB,
195 },
6b926eca
MK		 196 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
197 .name = "Hauppauge WinTV-HVR1210",
198 .portc = CX23885_MPEG_DVB,
199 },
493b7127
DW		 200 [CX23885_BOARD_MYGICA_X8506] = {
201 .name = "Mygica X8506 DMB-TH",
202 .portb = CX23885_MPEG_DVB,
203 },
2365b2d3
DW		 204 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
205 .name = "Magic-Pro ProHDTV Extreme 2",
206 .portb = CX23885_MPEG_DVB,
207 },
d19770e5
ST		 208};
209const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
210
211/* ------------------------------------------------------------------ */
212/* PCI subsystem IDs */
213
214struct cx23885_subid cx23885_subids[] = {
215 {
216 .subvendor = 0x0070,
217 .subdevice = 0x3400,
218 .card = CX23885_BOARD_UNKNOWN,
9c8ced51 219 }, {
d19770e5
ST		 220 .subvendor = 0x0070,
221 .subdevice = 0x7600,
222 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
9c8ced51 223 }, {
d19770e5
ST		 224 .subvendor = 0x0070,
225 .subdevice = 0x7800,
226 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 227 }, {
d19770e5
ST		 228 .subvendor = 0x0070,
229 .subdevice = 0x7801,
230 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 231 }, {
6ccb8cfb
MK		 232 .subvendor = 0x0070,
233 .subdevice = 0x7809,
234 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 235 }, {
a77743bc
ST		 236 .subvendor = 0x0070,
237 .subdevice = 0x7911,
238 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
9c8ced51 239 }, {
9bc37caa
MK		 240 .subvendor = 0x18ac,
241 .subdevice = 0xd500,
242 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
9c8ced51 243 }, {
b00fff0b
MK		 244 .subvendor = 0x0070,
245 .subdevice = 0x7790,
246 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 247 }, {
d1987d55
ST		 248 .subvendor = 0x0070,
249 .subdevice = 0x7797,
250 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 251 }, {
b00fff0b
MK		 252 .subvendor = 0x0070,
253 .subdevice = 0x7710,
254 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
9c8ced51 255 }, {
07b4a835
MK		 256 .subvendor = 0x0070,
257 .subdevice = 0x7717,
258 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
b3ea0166
ST		 259 }, {
260 .subvendor = 0x0070,
261 .subdevice = 0x71d1,
262 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
3c3852cd
MK		 263 }, {
264 .subvendor = 0x0070,
265 .subdevice = 0x71d3,
266 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
a780a31c
ST		 267 }, {
268 .subvendor = 0x0070,
269 .subdevice = 0x8101,
270 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
66762373
ST		 271 }, {
272 .subvendor = 0x0070,
273 .subdevice = 0x8010,
274 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
9c8ced51 275 }, {
335377b7
MK		 276 .subvendor = 0x18ac,
277 .subdevice = 0xd618,
278 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
9c8ced51 279 }, {
aef2d186
ST		 280 .subvendor = 0x18ac,
281 .subdevice = 0xdb78,
282 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
4c56b04a
ST		 283 }, {
284 .subvendor = 0x107d,
285 .subdevice = 0x6681,
286 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
9bb1b7e8
IL		 287 }, {
288 .subvendor = 0x185b,
289 .subdevice = 0xe800,
290 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
96318d0c
IL		 291 }, {
292 .subvendor = 0x6920,
293 .subdevice = 0x8888,
294 .card = CX23885_BOARD_TBS_6920,
579943f5
IL		 295 }, {
296 .subvendor = 0xd470,
297 .subdevice = 0x9022,
298 .card = CX23885_BOARD_TEVII_S470,
c9b8b04b
IL		 299 }, {
300 .subvendor = 0x0001,
301 .subdevice = 0x2005,
302 .card = CX23885_BOARD_DVBWORLD_2005,
5a23b076
IL		 303 }, {
304 .subvendor = 0x1b55,
305 .subdevice = 0x2a2c,
306 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
2074dffa
ST		 307 }, {
308 .subvendor = 0x0070,
309 .subdevice = 0x2211,
310 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
d099becb
MK		 311 }, {
312 .subvendor = 0x0070,
313 .subdevice = 0x2215,
314 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
19bc5796
MK		 315 }, {
316 .subvendor = 0x0070,
317 .subdevice = 0x2251,
318 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
6b926eca
MK		 319 }, {
320 .subvendor = 0x0070,
321 .subdevice = 0x2291,
322 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
323 }, {
324 .subvendor = 0x0070,
325 .subdevice = 0x2295,
326 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
493b7127
DW		 327 }, {
328 .subvendor = 0x14f1,
329 .subdevice = 0x8651,
330 .card = CX23885_BOARD_MYGICA_X8506,
2365b2d3
DW		 331 }, {
332 .subvendor = 0x14f1,
333 .subdevice = 0x8657,
334 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
d19770e5
ST		 335 },
336};
337const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
338
339void cx23885_card_list(struct cx23885_dev *dev)
340{
341 int i;
342
343 if (0 == dev->pci->subsystem_vendor &&
344 0 == dev->pci->subsystem_device) {
9c8ced51
ST		 345 printk(KERN_INFO
346 "%s: Board has no valid PCIe Subsystem ID and can't\n"
347 "%s: be autodetected. Pass card=<n> insmod option\n"
348 "%s: to workaround that. Redirect complaints to the\n"
349 "%s: vendor of the TV card. Best regards,\n"
d19770e5
ST		 350 "%s: -- tux\n",
351 dev->name, dev->name, dev->name, dev->name, dev->name);
352 } else {
9c8ced51
ST		 353 printk(KERN_INFO
354 "%s: Your board isn't known (yet) to the driver.\n"
355 "%s: Try to pick one of the existing card configs via\n"
d19770e5
ST		 356 "%s: card=<n> insmod option. Updating to the latest\n"
357 "%s: version might help as well.\n",
358 dev->name, dev->name, dev->name, dev->name);
359 }
9c8ced51 360 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
d19770e5
ST		 361 dev->name);
362 for (i = 0; i < cx23885_bcount; i++)
9c8ced51 363 printk(KERN_INFO "%s: card=%d -> %s\n",
d19770e5
ST		 364 dev->name, i, cx23885_boards[i].name);
365}
366
367static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
368{
369 struct tveeprom tv;
370
9c8ced51
ST		 371 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
372 eeprom_data);
d19770e5 373
d19770e5 374 /* Make sure we support the board model */
9c8ced51 375 switch (tv.model) {
5308cf09
MK		 376 case 22001:
377 /* WinTV-HVR1270 (PCIe, Retail, half height)
378 * ATSC/QAM and basic analog, IR Blast */
379 case 22009:
380 /* WinTV-HVR1210 (PCIe, Retail, half height)
381 * DVB-T and basic analog, IR Blast */
382 case 22011:
383 /* WinTV-HVR1270 (PCIe, Retail, half height)
384 * ATSC/QAM and basic analog, IR Recv */
385 case 22019:
386 /* WinTV-HVR1210 (PCIe, Retail, half height)
387 * DVB-T and basic analog, IR Recv */
388 case 22021:
389 /* WinTV-HVR1275 (PCIe, Retail, half height)
390 * ATSC/QAM and basic analog, IR Recv */
391 case 22029:
392 /* WinTV-HVR1210 (PCIe, Retail, half height)
393 * DVB-T and basic analog, IR Recv */
394 case 22101:
395 /* WinTV-HVR1270 (PCIe, Retail, full height)
396 * ATSC/QAM and basic analog, IR Blast */
397 case 22109:
398 /* WinTV-HVR1210 (PCIe, Retail, full height)
399 * DVB-T and basic analog, IR Blast */
400 case 22111:
401 /* WinTV-HVR1270 (PCIe, Retail, full height)
402 * ATSC/QAM and basic analog, IR Recv */
403 case 22119:
404 /* WinTV-HVR1210 (PCIe, Retail, full height)
405 * DVB-T and basic analog, IR Recv */
406 case 22121:
407 /* WinTV-HVR1275 (PCIe, Retail, full height)
408 * ATSC/QAM and basic analog, IR Recv */
409 case 22129:
410 /* WinTV-HVR1210 (PCIe, Retail, full height)
411 * DVB-T and basic analog, IR Recv */
36396c89
MK		 412 case 71009:
413 /* WinTV-HVR1200 (PCIe, Retail, full height)
414 * DVB-T and basic analog */
415 case 71359:
416 /* WinTV-HVR1200 (PCIe, OEM, half height)
417 * DVB-T and basic analog */
418 case 71439:
419 /* WinTV-HVR1200 (PCIe, OEM, half height)
420 * DVB-T and basic analog */
421 case 71449:
422 /* WinTV-HVR1200 (PCIe, OEM, full height)
423 * DVB-T and basic analog */
424 case 71939:
425 /* WinTV-HVR1200 (PCIe, OEM, half height)
426 * DVB-T and basic analog */
427 case 71949:
428 /* WinTV-HVR1200 (PCIe, OEM, full height)
429 * DVB-T and basic analog */
430 case 71959:
431 /* WinTV-HVR1200 (PCIe, OEM, full height)
432 * DVB-T and basic analog */
433 case 71979:
434 /* WinTV-HVR1200 (PCIe, OEM, half height)
435 * DVB-T and basic analog */
436 case 71999:
437 /* WinTV-HVR1200 (PCIe, OEM, full height)
438 * DVB-T and basic analog */
9c8ced51
ST		 439 case 76601:
440 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
441 channel ATSC and MPEG2 HW Encoder */
442 case 77001:
443 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
444 and Basic analog */
445 case 77011:
446 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
447 and Basic analog */
448 case 77041:
449 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
450 and Basic analog */
451 case 77051:
452 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
453 and Basic analog */
454 case 78011:
455 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
456 Dual channel ATSC and MPEG2 HW Encoder */
457 case 78501:
458 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
459 Dual channel ATSC and MPEG2 HW Encoder */
460 case 78521:
461 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
462 Dual channel ATSC and MPEG2 HW Encoder */
463 case 78531:
464 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
465 Dual channel ATSC and MPEG2 HW Encoder */
466 case 78631:
467 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
468 Dual channel ATSC and MPEG2 HW Encoder */
469 case 79001:
470 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
471 ATSC and Basic analog */
472 case 79101:
473 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
474 ATSC and Basic analog */
475 case 79561:
476 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
477 ATSC and Basic analog */
478 case 79571:
479 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
480 ATSC and Basic analog */
481 case 79671:
482 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
483 ATSC and Basic analog */
66762373
ST		 484 case 80019:
485 /* WinTV-HVR1400 (Express Card, Retail, IR,
486 * DVB-T and Basic analog */
36396c89
MK		 487 case 81509:
488 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
489 * DVB-T and MPEG2 HW Encoder */
a780a31c 490 case 81519:
36396c89 491 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
a780a31c 492 * DVB-T and MPEG2 HW Encoder */
d19770e5
ST		 493 break;
494 default:
9c8ced51
ST		 495 printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
496 dev->name, tv.model);
d19770e5
ST		 497 break;
498 }
499
500 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
501 dev->name, tv.model);
502}
503
d7cba043 504int cx23885_tuner_callback(void *priv, int component, int command, int arg)
8c70017f 505{
89ce2216
ST		 506 struct cx23885_tsport *port = priv;
507 struct cx23885_dev *dev = port->dev;
6df51690
ST		 508 u32 bitmask = 0;
509
89ce2216
ST		 510 if (command == XC2028_RESET_CLK)
511 return 0;
512
6df51690
ST		 513 if (command != 0) {
514 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
515 __func__, command);
516 return -EINVAL;
517 }
8c70017f 518
9c8ced51 519 switch (dev->board) {
90a71b1c
ST		 520 case CX23885_BOARD_HAUPPAUGE_HVR1400:
521 case CX23885_BOARD_HAUPPAUGE_HVR1500:
8c70017f 522 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
4c56b04a 523 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 524 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
90a71b1c 525 /* Tuner Reset Command */
4c56b04a 526 bitmask = 0x04;
6df51690
ST		 527 break;
528 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 529 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
4c56b04a
ST		 530 /* Two identical tuners on two different i2c buses,
531 * we need to reset the correct gpio. */
d4dc673d 532 if (port->nr == 1)
4c56b04a 533 bitmask = 0x01;
d4dc673d 534 else if (port->nr == 2)
4c56b04a 535 bitmask = 0x04;
8c70017f
ST		 536 break;
537 }
538
6df51690
ST		 539 if (bitmask) {
540 /* Drive the tuner into reset and back out */
541 cx_clear(GP0_IO, bitmask);
542 mdelay(200);
543 cx_set(GP0_IO, bitmask);
544 }
545
546 return 0;
8c70017f 547}
73c993a8 548
a6a3f140
ST		 549void cx23885_gpio_setup(struct cx23885_dev *dev)
550{
9c8ced51 551 switch (dev->board) {
a6a3f140
ST		 552 case CX23885_BOARD_HAUPPAUGE_HVR1250:
553 /* GPIO-0 cx24227 demodulator reset */
554 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
555 break;
07b4a835
MK		 556 case CX23885_BOARD_HAUPPAUGE_HVR1500:
557 /* GPIO-0 cx24227 demodulator */
558 /* GPIO-2 xc3028 tuner */
559
560 /* Put the parts into reset */
561 cx_set(GP0_IO, 0x00050000);
562 cx_clear(GP0_IO, 0x00000005);
563 msleep(5);
564
565 /* Bring the parts out of reset */
566 cx_set(GP0_IO, 0x00050005);
567 break;
d1987d55
ST		 568 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
569 /* GPIO-0 cx24227 demodulator reset */
570 /* GPIO-2 xc5000 tuner reset */
571 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
572 break;
a6a3f140
ST		 573 case CX23885_BOARD_HAUPPAUGE_HVR1800:
574 /* GPIO-0 656_CLK */
575 /* GPIO-1 656_D0 */
576 /* GPIO-2 8295A Reset */
577 /* GPIO-3-10 cx23417 data0-7 */
578 /* GPIO-11-14 cx23417 addr0-3 */
579 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
580 /* GPIO-19 IR_RX */
3ba71d21 581
a589b665
ST		 582 /* CX23417 GPIO's */
583 /* EIO15 Zilog Reset */
584 /* EIO14 S5H1409/CX24227 Reset */
f659c513
ST		 585 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
586
587 /* Put the demod into reset and protect the eeprom */
588 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
589 mdelay(100);
590
591 /* Bring the demod and blaster out of reset */
592 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
593 mdelay(100);
a589b665 594
5206d6ec
ST		 595 /* Force the TDA8295A into reset and back */
596 cx_set(GP0_IO, 0x00040004);
597 mdelay(20);
598 cx_clear(GP0_IO, 0x00000004);
599 mdelay(20);
600 cx_set(GP0_IO, 0x00040004);
601 mdelay(20);
a6a3f140 602 break;
b3ea0166
ST		 603 case CX23885_BOARD_HAUPPAUGE_HVR1200:
604 /* GPIO-0 tda10048 demodulator reset */
605 /* GPIO-2 tda18271 tuner reset */
606
a780a31c
ST		 607 /* Put the parts into reset and back */
608 cx_set(GP0_IO, 0x00050000);
609 mdelay(20);
610 cx_clear(GP0_IO, 0x00000005);
611 mdelay(20);
612 cx_set(GP0_IO, 0x00050005);
613 break;
614 case CX23885_BOARD_HAUPPAUGE_HVR1700:
615 /* GPIO-0 TDA10048 demodulator reset */
616 /* GPIO-2 TDA8295A Reset */
617 /* GPIO-3-10 cx23417 data0-7 */
618 /* GPIO-11-14 cx23417 addr0-3 */
619 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
620
621 /* The following GPIO's are on the interna AVCore (cx25840) */
622 /* GPIO-19 IR_RX */
623 /* GPIO-20 IR_TX 416/DVBT Select */
624 /* GPIO-21 IIS DAT */
625 /* GPIO-22 IIS WCLK */
626 /* GPIO-23 IIS BCLK */
627
66762373
ST		 628 /* Put the parts into reset and back */
629 cx_set(GP0_IO, 0x00050000);
630 mdelay(20);
631 cx_clear(GP0_IO, 0x00000005);
632 mdelay(20);
633 cx_set(GP0_IO, 0x00050005);
634 break;
635 case CX23885_BOARD_HAUPPAUGE_HVR1400:
636 /* GPIO-0 Dibcom7000p demodulator reset */
637 /* GPIO-2 xc3028L tuner reset */
638 /* GPIO-13 LED */
639
b3ea0166
ST		 640 /* Put the parts into reset and back */
641 cx_set(GP0_IO, 0x00050000);
642 mdelay(20);
643 cx_clear(GP0_IO, 0x00000005);
644 mdelay(20);
645 cx_set(GP0_IO, 0x00050005);
646 break;
1ecc5aed
ST		 647 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
648 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
649 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
650 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
651 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
652
aef2d186
ST		 653 /* Put the parts into reset and back */
654 cx_set(GP0_IO, 0x000f0000);
655 mdelay(20);
656 cx_clear(GP0_IO, 0x0000000f);
657 mdelay(20);
658 cx_set(GP0_IO, 0x000f000f);
659 break;
660 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
661 /* GPIO-0 portb xc3028 reset */
662 /* GPIO-1 portb zl10353 reset */
663 /* GPIO-2 portc xc3028 reset */
664 /* GPIO-3 portc zl10353 reset */
665
1ecc5aed
ST		 666 /* Put the parts into reset and back */
667 cx_set(GP0_IO, 0x000f0000);
668 mdelay(20);
669 cx_clear(GP0_IO, 0x0000000f);
670 mdelay(20);
671 cx_set(GP0_IO, 0x000f000f);
672 break;
4c56b04a 673 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 674 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
4c56b04a
ST		 675 /* GPIO-2 xc3028 tuner reset */
676
677 /* The following GPIO's are on the internal AVCore (cx25840) */
678 /* GPIO-? zl10353 demod reset */
679
680 /* Put the parts into reset and back */
681 cx_set(GP0_IO, 0x00040000);
682 mdelay(20);
683 cx_clear(GP0_IO, 0x00000004);
684 mdelay(20);
685 cx_set(GP0_IO, 0x00040004);
686 break;
96318d0c 687 case CX23885_BOARD_TBS_6920:
579943f5 688 case CX23885_BOARD_TEVII_S470:
96318d0c
IL		 689 cx_write(MC417_CTL, 0x00000036);
690 cx_write(MC417_OEN, 0x00001000);
691 cx_write(MC417_RWD, 0x00001800);
692 break;
5a23b076
IL		 693 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
694 /* GPIO-0 INTA from CiMax1
695 GPIO-1 INTB from CiMax2
696 GPIO-2 reset chips
697 GPIO-3 to GPIO-10 data/addr for CA
698 GPIO-11 ~CS0 to CiMax1
699 GPIO-12 ~CS1 to CiMax2
700 GPIO-13 ADL0 load LSB addr
701 GPIO-14 ADL1 load MSB addr
702 GPIO-15 ~RDY from CiMax
703 GPIO-17 ~RD to CiMax
704 GPIO-18 ~WR to CiMax
705 */
706 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
707 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
708 cx_clear(GP0_IO, 0x00030004);
709 mdelay(100);/* reset delay */
710 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
711 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
712 /* GPIO-15 IN as ~ACK, rest as OUT */
713 cx_write(MC417_OEN, 0x00001000);
714 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
715 cx_write(MC417_RWD, 0x0000c300);
716 /* enable irq */
717 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
718 break;
2074dffa 719 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 720 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 721 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 722 case CX23885_BOARD_HAUPPAUGE_HVR1210:
d099becb 723 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
6b926eca
MK		 724 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
725 /* GPIO-9 Demod reset */
2074dffa
ST		 726
727 /* Put the parts into reset and back */
d099becb
MK		 728 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
729 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
2074dffa
ST		 730 cx23885_gpio_clear(dev, GPIO_9);
731 mdelay(20);
732 cx23885_gpio_set(dev, GPIO_9);
733 break;
493b7127 734 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 735 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
493b7127 736 /* GPIO-1 reset XC5000 */
2365b2d3 737 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
493b7127
DW		 738 cx_set(GP0_IO, 0x00060000);
739 cx_clear(GP0_IO, 0x00000006);
740 mdelay(100);
741 cx_set(GP0_IO, 0x00060006);
742 mdelay(100);
743 break;
a6a3f140
ST		 744 }
745}
746
747int cx23885_ir_init(struct cx23885_dev *dev)
748{
749 switch (dev->board) {
750 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 751 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 752 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 753 case CX23885_BOARD_HAUPPAUGE_HVR1800:
b3ea0166 754 case CX23885_BOARD_HAUPPAUGE_HVR1200:
66762373 755 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2074dffa 756 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 757 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 758 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 759 case CX23885_BOARD_HAUPPAUGE_HVR1210:
a6a3f140
ST		 760 /* FIXME: Implement me */
761 break;
12886871
ST		 762 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
763 request_module("ir-kbd-i2c");
764 break;
a6a3f140
ST		 765 }
766
767 return 0;
768}
769
d19770e5
ST		 770void cx23885_card_setup(struct cx23885_dev *dev)
771{
a6a3f140
ST		 772 struct cx23885_tsport *ts1 = &dev->ts1;
773 struct cx23885_tsport *ts2 = &dev->ts2;
774
d19770e5
ST		 775 static u8 eeprom[256];
776
777 if (dev->i2c_bus[0].i2c_rc == 0) {
778 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
44a6481d
MK		 779 tveeprom_read(&dev->i2c_bus[0].i2c_client,
780 eeprom, sizeof(eeprom));
d19770e5
ST		 781 }
782
783 switch (dev->board) {
a77743bc 784 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 785 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 786 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
66762373 787 case CX23885_BOARD_HAUPPAUGE_HVR1400:
c88133ec
ST		 788 if (dev->i2c_bus[0].i2c_rc == 0)
789 hauppauge_eeprom(dev, eeprom+0x80);
790 break;
d19770e5
ST		 791 case CX23885_BOARD_HAUPPAUGE_HVR1800:
792 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 793 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 794 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2074dffa 795 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 796 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 797 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 798 case CX23885_BOARD_HAUPPAUGE_HVR1210:
d19770e5 799 if (dev->i2c_bus[0].i2c_rc == 0)
c88133ec 800 hauppauge_eeprom(dev, eeprom+0xc0);
d19770e5
ST		 801 break;
802 }
a6a3f140
ST		 803
804 switch (dev->board) {
335377b7 805 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 806 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
335377b7
MK		 807 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
808 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
809 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
810 /* break omitted intentionally */
a6a3f140
ST		 811 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
812 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
813 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
814 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
815 break;
a589b665
ST		 816 case CX23885_BOARD_HAUPPAUGE_HVR1800:
817 /* Defaults for VID B - Analog encoder */
818 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
819 ts1->gen_ctrl_val = 0x10e;
820 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
821 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
822
823 /* APB_TSVALERR_POL (active low)*/
824 ts1->vld_misc_val = 0x2000;
825 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
826
827 /* Defaults for VID C */
828 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
829 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
830 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
96318d0c 831 break;
579943f5 832 case CX23885_BOARD_TEVII_S470:
96318d0c 833 case CX23885_BOARD_TBS_6920:
c9b8b04b 834 case CX23885_BOARD_DVBWORLD_2005:
96318d0c
IL		 835 ts1->gen_ctrl_val = 0x5; /* Parallel */
836 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
837 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
a589b665 838 break;
5a23b076
IL		 839 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
840 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
841 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
842 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
843 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
844 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
845 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
846 break;
493b7127 847 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 848 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
493b7127
DW		 849 ts1->gen_ctrl_val = 0x5; /* Parallel */
850 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
851 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
852 break;
a6a3f140 853 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 854 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 855 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 856 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 857 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 858 case CX23885_BOARD_HAUPPAUGE_HVR1700:
66762373 859 case CX23885_BOARD_HAUPPAUGE_HVR1400:
4c56b04a 860 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 861 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2074dffa 862 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 863 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 864 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 865 case CX23885_BOARD_HAUPPAUGE_HVR1210:
a6a3f140
ST		 866 default:
867 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
868 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
869 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
870 }
871
ce89cfb4
ST		 872 /* Certain boards support analog, or require the avcore to be
873 * loaded, ensure this happens.
874 */
875 switch (dev->board) {
876 case CX23885_BOARD_HAUPPAUGE_HVR1800:
877 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
878 case CX23885_BOARD_HAUPPAUGE_HVR1700:
4c56b04a 879 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 880 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
5a23b076 881 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
e6574f2f
HV		 882 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
883 &dev->i2c_bus[2].i2c_adap,
0d5a19f1 884 "cx25840", "cx25840", 0x88 >> 1);
cc26b076 885 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
ce89cfb4
ST		 886 break;
887 }
5a23b076
IL		 888
889 /* AUX-PLL 27MHz CLK */
890 switch (dev->board) {
891 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
892 netup_initialize(dev);
893 break;
894 }
d19770e5
ST		 895}
896
897/* ------------------------------------------------------------------ */
kernel source for telekom puls (alcatel/mediatek)