[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / cx23885 / cx23885-cards.c

/*
 *  Driver for the Conexant CX23885 PCIe bridge
 *
 *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <media/cx25840.h>

#include "cx23885.h"
#include "tuner-xc2028.h"

/* ------------------------------------------------------------------ */
/* board config info                                                  */

struct cx23885_board cx23885_boards[] = {
	[CX23885_BOARD_UNKNOWN] = {
		.name		= "UNKNOWN/GENERIC",
		/* Ensure safe default for unknown boards */
		.clk_freq       = 0,
		.input          = {{
			.type   = CX23885_VMUX_COMPOSITE1,
			.vmux   = 0,
		},{
			.type   = CX23885_VMUX_COMPOSITE2,
			.vmux   = 1,
		},{
			.type   = CX23885_VMUX_COMPOSITE3,
			.vmux   = 2,
		},{
			.type   = CX23885_VMUX_COMPOSITE4,
			.vmux   = 3,
		}},
	},
	[CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
		.name		= "Hauppauge WinTV-HVR1800lp",
		.portc		= CX23885_MPEG_DVB,
		.input          = {{
			.type   = CX23885_VMUX_TELEVISION,
			.vmux   = 0,
			.gpio0  = 0xff00,
		},{
			.type   = CX23885_VMUX_DEBUG,
			.vmux   = 0,
			.gpio0  = 0xff01,
		},{
			.type   = CX23885_VMUX_COMPOSITE1,
			.vmux   = 1,
			.gpio0  = 0xff02,
		},{
			.type   = CX23885_VMUX_SVIDEO,
			.vmux   = 2,
			.gpio0  = 0xff02,
		}},
	},
	[CX23885_BOARD_HAUPPAUGE_HVR1800] = {
		.name		= "Hauppauge WinTV-HVR1800",
		.porta		= CX23885_ANALOG_VIDEO,
		.portb		= CX23885_MPEG_ENCODER,
		.portc		= CX23885_MPEG_DVB,
		.tuner_type	= TUNER_PHILIPS_TDA8290,
		.tuner_addr	= 0x42, /* 0x84 >> 1 */
		.input          = {{
			.type   = CX23885_VMUX_TELEVISION,
			.vmux   =	CX25840_VIN7_CH3 |
					CX25840_VIN5_CH2 |
					CX25840_VIN2_CH1,
			.gpio0  = 0,
		},{
			.type   = CX23885_VMUX_COMPOSITE1,
			.vmux   =	CX25840_VIN7_CH3 |
					CX25840_VIN4_CH2 |
					CX25840_VIN6_CH1,
			.gpio0  = 0,
		},{
			.type   = CX23885_VMUX_SVIDEO,
			.vmux   =	CX25840_VIN7_CH3 |
					CX25840_VIN4_CH2 |
					CX25840_VIN8_CH1 |
					CX25840_SVIDEO_ON,
			.gpio0  = 0,
		}},
	},
	[CX23885_BOARD_HAUPPAUGE_HVR1250] = {
		.name		= "Hauppauge WinTV-HVR1250",
		.portc		= CX23885_MPEG_DVB,
		.input          = {{
			.type   = CX23885_VMUX_TELEVISION,
			.vmux   = 0,
			.gpio0  = 0xff00,
		},{
			.type   = CX23885_VMUX_DEBUG,
			.vmux   = 0,
			.gpio0  = 0xff01,
		},{
			.type   = CX23885_VMUX_COMPOSITE1,
			.vmux   = 1,
			.gpio0  = 0xff02,
		},{
			.type   = CX23885_VMUX_SVIDEO,
			.vmux   = 2,
			.gpio0  = 0xff02,
		}},
	},
	[CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
		.name		= "DViCO FusionHDTV5 Express",
		.portb		= CX23885_MPEG_DVB,
	},
	[CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
		.name		= "Hauppauge WinTV-HVR1500Q",
		.portc		= CX23885_MPEG_DVB,
	},
	[CX23885_BOARD_HAUPPAUGE_HVR1500] = {
		.name		= "Hauppauge WinTV-HVR1500",
		.portc		= CX23885_MPEG_DVB,
	},
	[CX23885_BOARD_HAUPPAUGE_HVR1200] = {
		.name		= "Hauppauge WinTV-HVR1200",
		.portc		= CX23885_MPEG_DVB,
	},
	[CX23885_BOARD_HAUPPAUGE_HVR1700] = {
		.name		= "Hauppauge WinTV-HVR1700",
		.portc		= CX23885_MPEG_DVB,
	},
	[CX23885_BOARD_HAUPPAUGE_HVR1400] = {
		.name		= "Hauppauge WinTV-HVR1400",
		.portc		= CX23885_MPEG_DVB,
	},
	[CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
		.name		= "DViCO FusionHDTV7 Dual Express",
		.portb		= CX23885_MPEG_DVB,
		.portc		= CX23885_MPEG_DVB,
	},
	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
		.name		= "DViCO FusionHDTV DVB-T Dual Express",
		.portb		= CX23885_MPEG_DVB,
		.portc		= CX23885_MPEG_DVB,
	},
	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
		.name		= "Leadtek Winfast PxDVR3200 H",
		.portc		= CX23885_MPEG_DVB,
	},
};
const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);

/* ------------------------------------------------------------------ */
/* PCI subsystem IDs                                                  */

struct cx23885_subid cx23885_subids[] = {
	{
		.subvendor = 0x0070,
		.subdevice = 0x3400,
		.card      = CX23885_BOARD_UNKNOWN,
	},{
		.subvendor = 0x0070,
		.subdevice = 0x7600,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
	},{
		.subvendor = 0x0070,
		.subdevice = 0x7800,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
	},{
		.subvendor = 0x0070,
		.subdevice = 0x7801,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
	},{
		.subvendor = 0x0070,
		.subdevice = 0x7809,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
	},{
		.subvendor = 0x0070,
		.subdevice = 0x7911,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1250,
	},{
		.subvendor = 0x18ac,
		.subdevice = 0xd500,
		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
	},{
		.subvendor = 0x0070,
		.subdevice = 0x7790,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
	},{
		.subvendor = 0x0070,
		.subdevice = 0x7797,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
	},{
		.subvendor = 0x0070,
		.subdevice = 0x7710,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
	},{
		.subvendor = 0x0070,
		.subdevice = 0x7717,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
	}, {
		.subvendor = 0x0070,
		.subdevice = 0x71d1,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
	}, {
		.subvendor = 0x0070,
		.subdevice = 0x71d3,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
	}, {
		.subvendor = 0x0070,
		.subdevice = 0x8101,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1700,
	}, {
		.subvendor = 0x0070,
		.subdevice = 0x8010,
		.card      = CX23885_BOARD_HAUPPAUGE_HVR1400,
	},{
		.subvendor = 0x18ac,
		.subdevice = 0xd618,
		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
	},{
		.subvendor = 0x18ac,
		.subdevice = 0xdb78,
		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
	}, {
		.subvendor = 0x107d,
		.subdevice = 0x6681,
		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
	},
};
const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);

void cx23885_card_list(struct cx23885_dev *dev)
{
	int i;

	if (0 == dev->pci->subsystem_vendor &&
	    0 == dev->pci->subsystem_device) {
		printk("%s: Your board has no valid PCIe Subsystem ID and thus can't\n"
		       "%s: be autodetected.  Please pass card=<n> insmod option to\n"
		       "%s: workaround that.  Redirect complaints to the vendor of\n"
		       "%s: the TV card.  Best regards,\n"
		       "%s:         -- tux\n",
		       dev->name, dev->name, dev->name, dev->name, dev->name);
	} else {
		printk("%s: Your board isn't known (yet) to the driver.  You can\n"
		       "%s: try to pick one of the existing card configs via\n"
		       "%s: card=<n> insmod option.  Updating to the latest\n"
		       "%s: version might help as well.\n",
		       dev->name, dev->name, dev->name, dev->name);
	}
	printk("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
	       dev->name);
	for (i = 0; i < cx23885_bcount; i++)
		printk("%s:    card=%d -> %s\n",
		       dev->name, i, cx23885_boards[i].name);
}

static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
{
	struct tveeprom tv;

	tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv, eeprom_data);

	/* Make sure we support the board model */
	switch (tv.model)
	{
	case 71009:
		/* WinTV-HVR1200 (PCIe, Retail, full height)
		 * DVB-T and basic analog */
	case 71359:
		/* WinTV-HVR1200 (PCIe, OEM, half height)
		 * DVB-T and basic analog */
	case 71439:
		/* WinTV-HVR1200 (PCIe, OEM, half height)
		 * DVB-T and basic analog */
	case 71449:
		/* WinTV-HVR1200 (PCIe, OEM, full height)
		 * DVB-T and basic analog */
	case 71939:
		/* WinTV-HVR1200 (PCIe, OEM, half height)
		 * DVB-T and basic analog */
	case 71949:
		/* WinTV-HVR1200 (PCIe, OEM, full height)
		 * DVB-T and basic analog */
	case 71959:
		/* WinTV-HVR1200 (PCIe, OEM, full height)
		 * DVB-T and basic analog */
	case 71979:
		/* WinTV-HVR1200 (PCIe, OEM, half height)
		 * DVB-T and basic analog */
	case 71999:
		/* WinTV-HVR1200 (PCIe, OEM, full height)
		 * DVB-T and basic analog */
	case 76601: /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual channel ATSC and MPEG2 HW Encoder */
	case 77001: /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC and Basic analog */
	case 77011: /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC and Basic analog */
	case 77041: /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM and Basic analog */
	case 77051: /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM and Basic analog */
	case 78011: /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM, Dual channel ATSC and MPEG2 HW Encoder */
	case 78501: /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, Dual channel ATSC and MPEG2 HW Encoder */
	case 78521: /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, Dual channel ATSC and MPEG2 HW Encoder */
	case 78531: /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM, Dual channel ATSC and MPEG2 HW Encoder */
	case 78631: /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM, Dual channel ATSC and MPEG2 HW Encoder */
	case 79001: /* WinTV-HVR1250 (PCIe, Retail, IR, full height, ATSC and Basic analog */
	case 79101: /* WinTV-HVR1250 (PCIe, Retail, IR, half height, ATSC and Basic analog */
	case 79561: /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, ATSC and Basic analog */
	case 79571: /* WinTV-HVR1250 (PCIe, OEM, No IR, full height, ATSC and Basic analog */
	case 79671: /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, ATSC and Basic analog */
	case 80019:
		/* WinTV-HVR1400 (Express Card, Retail, IR,
		 * DVB-T and Basic analog */
	case 81509:
		/* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
		 * DVB-T and MPEG2 HW Encoder */
	case 81519:
		/* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
		 * DVB-T and MPEG2 HW Encoder */
		break;
	default:
		printk("%s: warning: unknown hauppauge model #%d\n", dev->name, tv.model);
		break;
	}

	printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
			dev->name, tv.model);
}

int cx23885_tuner_callback(void *priv, int command, int arg)
{
	struct cx23885_tsport *port = priv;
	struct cx23885_dev *dev = port->dev;
	u32 bitmask = 0;

	if (command == XC2028_RESET_CLK)
		return 0;

	if (command != 0) {
		printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
			__func__, command);
		return -EINVAL;
	}

	switch(dev->board) {
	case CX23885_BOARD_HAUPPAUGE_HVR1400:
	case CX23885_BOARD_HAUPPAUGE_HVR1500:
	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
		/* Tuner Reset Command */
		bitmask = 0x04;
		break;
	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
		/* Two identical tuners on two different i2c buses,
		 * we need to reset the correct gpio. */
		if (port->nr == 0)
			bitmask = 0x01;
		else if (port->nr == 1)
			bitmask = 0x04;
		break;
	}

	if (bitmask) {
		/* Drive the tuner into reset and back out */
		cx_clear(GP0_IO, bitmask);
		mdelay(200);
		cx_set(GP0_IO, bitmask);
	}

	return 0;
}

void cx23885_gpio_setup(struct cx23885_dev *dev)
{
	switch(dev->board) {
	case CX23885_BOARD_HAUPPAUGE_HVR1250:
		/* GPIO-0 cx24227 demodulator reset */
		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1500:
		/* GPIO-0 cx24227 demodulator */
		/* GPIO-2 xc3028 tuner */

		/* Put the parts into reset */
		cx_set(GP0_IO, 0x00050000);
		cx_clear(GP0_IO, 0x00000005);
		msleep(5);

		/* Bring the parts out of reset */
		cx_set(GP0_IO, 0x00050005);
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
		/* GPIO-0 cx24227 demodulator reset */
		/* GPIO-2 xc5000 tuner reset */
		cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1800:
		/* GPIO-0 656_CLK */
		/* GPIO-1 656_D0 */
		/* GPIO-2 8295A Reset */
		/* GPIO-3-10 cx23417 data0-7 */
		/* GPIO-11-14 cx23417 addr0-3 */
		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
		/* GPIO-19 IR_RX */

		/* CX23417 GPIO's */
		/* EIO15 Zilog Reset */
		/* EIO14 S5H1409/CX24227 Reset */

		/* Force the TDA8295A into reset and back */
		cx_set(GP0_IO, 0x00040004);
		mdelay(20);
		cx_clear(GP0_IO, 0x00000004);
		mdelay(20);
		cx_set(GP0_IO, 0x00040004);
		mdelay(20);
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1200:
		/* GPIO-0 tda10048 demodulator reset */
		/* GPIO-2 tda18271 tuner reset */

		/* Put the parts into reset and back */
		cx_set(GP0_IO, 0x00050000);
		mdelay(20);
		cx_clear(GP0_IO, 0x00000005);
		mdelay(20);
		cx_set(GP0_IO, 0x00050005);
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1700:
		/* GPIO-0 TDA10048 demodulator reset */
		/* GPIO-2 TDA8295A Reset */
		/* GPIO-3-10 cx23417 data0-7 */
		/* GPIO-11-14 cx23417 addr0-3 */
		/* GPIO-15-18 cx23417 READY, CS, RD, WR */

		/* The following GPIO's are on the interna AVCore (cx25840) */
		/* GPIO-19 IR_RX */
		/* GPIO-20 IR_TX 416/DVBT Select */
		/* GPIO-21 IIS DAT */
		/* GPIO-22 IIS WCLK */
		/* GPIO-23 IIS BCLK */

		/* Put the parts into reset and back */
		cx_set(GP0_IO, 0x00050000);
		mdelay(20);
		cx_clear(GP0_IO, 0x00000005);
		mdelay(20);
		cx_set(GP0_IO, 0x00050005);
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1400:
		/* GPIO-0  Dibcom7000p demodulator reset */
		/* GPIO-2  xc3028L tuner reset */
		/* GPIO-13 LED */

		/* Put the parts into reset and back */
		cx_set(GP0_IO, 0x00050000);
		mdelay(20);
		cx_clear(GP0_IO, 0x00000005);
		mdelay(20);
		cx_set(GP0_IO, 0x00050005);
		break;
	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
		/* GPIO-0 xc5000 tuner reset i2c bus 0 */
		/* GPIO-1 s5h1409 demod reset i2c bus 0 */
		/* GPIO-2 xc5000 tuner reset i2c bus 1 */
		/* GPIO-3 s5h1409 demod reset i2c bus 0 */

		/* Put the parts into reset and back */
		cx_set(GP0_IO, 0x000f0000);
		mdelay(20);
		cx_clear(GP0_IO, 0x0000000f);
		mdelay(20);
		cx_set(GP0_IO, 0x000f000f);
		break;
	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
		/* GPIO-0 portb xc3028 reset */
		/* GPIO-1 portb zl10353 reset */
		/* GPIO-2 portc xc3028 reset */
		/* GPIO-3 portc zl10353 reset */

		/* Put the parts into reset and back */
		cx_set(GP0_IO, 0x000f0000);
		mdelay(20);
		cx_clear(GP0_IO, 0x0000000f);
		mdelay(20);
		cx_set(GP0_IO, 0x000f000f);
		break;
	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
		/* GPIO-2  xc3028 tuner reset */

		/* The following GPIO's are on the internal AVCore (cx25840) */
		/* GPIO-?  zl10353 demod reset */

		/* Put the parts into reset and back */
		cx_set(GP0_IO, 0x00040000);
		mdelay(20);
		cx_clear(GP0_IO, 0x00000004);
		mdelay(20);
		cx_set(GP0_IO, 0x00040004);
		break;
	}
}

int cx23885_ir_init(struct cx23885_dev *dev)
{
	switch (dev->board) {
	case CX23885_BOARD_HAUPPAUGE_HVR1250:
	case CX23885_BOARD_HAUPPAUGE_HVR1500:
	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
	case CX23885_BOARD_HAUPPAUGE_HVR1800:
	case CX23885_BOARD_HAUPPAUGE_HVR1200:
	case CX23885_BOARD_HAUPPAUGE_HVR1400:
		/* FIXME: Implement me */
		break;
	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
		request_module("ir-kbd-i2c");
		break;
	}

	return 0;
}

void cx23885_card_setup(struct cx23885_dev *dev)
{
	struct cx23885_tsport *ts1 = &dev->ts1;
	struct cx23885_tsport *ts2 = &dev->ts2;

	static u8 eeprom[256];

	if (dev->i2c_bus[0].i2c_rc == 0) {
		dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
		tveeprom_read(&dev->i2c_bus[0].i2c_client,
			      eeprom, sizeof(eeprom));
	}

	switch (dev->board) {
	case CX23885_BOARD_HAUPPAUGE_HVR1250:
	case CX23885_BOARD_HAUPPAUGE_HVR1500:
	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
	case CX23885_BOARD_HAUPPAUGE_HVR1400:
		if (dev->i2c_bus[0].i2c_rc == 0)
			hauppauge_eeprom(dev, eeprom+0x80);
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1800:
	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
	case CX23885_BOARD_HAUPPAUGE_HVR1200:
	case CX23885_BOARD_HAUPPAUGE_HVR1700:
		if (dev->i2c_bus[0].i2c_rc == 0)
			hauppauge_eeprom(dev, eeprom+0xc0);
		break;
	}

	switch (dev->board) {
	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
		/* break omitted intentionally */
	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1800:
		/* Defaults for VID B - Analog encoder */
		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
		ts1->gen_ctrl_val    = 0x10e;
		ts1->ts_clk_en_val   = 0x1; /* Enable TS_CLK */
		ts1->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;

		/* APB_TSVALERR_POL (active low)*/
		ts1->vld_misc_val    = 0x2000;
		ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);

		/* Defaults for VID C */
		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1250:
	case CX23885_BOARD_HAUPPAUGE_HVR1500:
	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
	case CX23885_BOARD_HAUPPAUGE_HVR1200:
	case CX23885_BOARD_HAUPPAUGE_HVR1700:
	case CX23885_BOARD_HAUPPAUGE_HVR1400:
	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
	default:
		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
	}

	/* Certain boards support analog, or require the avcore to be
	 * loaded, ensure this happens.
	 */
	switch (dev->board) {
	case CX23885_BOARD_HAUPPAUGE_HVR1800:
	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
	case CX23885_BOARD_HAUPPAUGE_HVR1700:
	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
		request_module("cx25840");
		break;
	}
}

/* ------------------------------------------------------------------ */

/*
 * Local variables:
 * c-basic-offset: 8
 * End:
 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
 */
Commit	Line	Data
d19770e5 ST	1	/*
	2	* Driver for the Conexant CX23885 PCIe bridge
	3	*
6d897616	4	* Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5 ST	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	*
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	20	*/
	21
	22	#include <linux/init.h>
	23	#include <linux/module.h>
	24	#include <linux/pci.h>
	25	#include <linux/delay.h>
7b888014	26	#include <media/cx25840.h>
d19770e5 ST	27
d19770e5 ST	28	#include "cx23885.h"
90a71b1c	29	#include "tuner-xc2028.h"
d19770e5 ST	30
	31	/* ------------------------------------------------------------------ */
	32	/* board config info */
	33
	34	struct cx23885_board cx23885_boards[] = {
	35	[CX23885_BOARD_UNKNOWN] = {
	36	.name = "UNKNOWN/GENERIC",
c7712613 ST	37	/* Ensure safe default for unknown boards */
c7712613 ST	38	.clk_freq = 0,
d19770e5 ST	39	.input = {{
	40	.type = CX23885_VMUX_COMPOSITE1,
	41	.vmux = 0,
	42	},{
	43	.type = CX23885_VMUX_COMPOSITE2,
	44	.vmux = 1,
	45	},{
	46	.type = CX23885_VMUX_COMPOSITE3,
	47	.vmux = 2,
	48	},{
	49	.type = CX23885_VMUX_COMPOSITE4,
	50	.vmux = 3,
	51	}},
	52	},
	53	[CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
	54	.name = "Hauppauge WinTV-HVR1800lp",
d19770e5 ST	55	.portc = CX23885_MPEG_DVB,
	56	.input = {{
	57	.type = CX23885_VMUX_TELEVISION,
	58	.vmux = 0,
	59	.gpio0 = 0xff00,
	60	},{
	61	.type = CX23885_VMUX_DEBUG,
	62	.vmux = 0,
	63	.gpio0 = 0xff01,
	64	},{
	65	.type = CX23885_VMUX_COMPOSITE1,
	66	.vmux = 1,
	67	.gpio0 = 0xff02,
	68	},{
	69	.type = CX23885_VMUX_SVIDEO,
	70	.vmux = 2,
	71	.gpio0 = 0xff02,
	72	}},
	73	},
	74	[CX23885_BOARD_HAUPPAUGE_HVR1800] = {
	75	.name = "Hauppauge WinTV-HVR1800",
7b888014	76	.porta = CX23885_ANALOG_VIDEO,
a589b665	77	.portb = CX23885_MPEG_ENCODER,
d19770e5	78	.portc = CX23885_MPEG_DVB,
7b888014 ST	79	.tuner_type = TUNER_PHILIPS_TDA8290,
7b888014 ST	80	.tuner_addr = 0x42, /* 0x84 >> 1 */
d19770e5 ST	81	.input = {{
d19770e5 ST	82	.type = CX23885_VMUX_TELEVISION,
7b888014 ST	83	.vmux = CX25840_VIN7_CH3 \|
	84	CX25840_VIN5_CH2 \|
	85	CX25840_VIN2_CH1,
	86	.gpio0 = 0,
d19770e5 ST	87	},{
d19770e5 ST	88	.type = CX23885_VMUX_COMPOSITE1,
7b888014 ST	89	.vmux = CX25840_VIN7_CH3 \|
	90	CX25840_VIN4_CH2 \|
	91	CX25840_VIN6_CH1,
	92	.gpio0 = 0,
d19770e5 ST	93	},{
d19770e5 ST	94	.type = CX23885_VMUX_SVIDEO,
7b888014 ST	95	.vmux = CX25840_VIN7_CH3 \|
	96	CX25840_VIN4_CH2 \|
	97	CX25840_VIN8_CH1 \|
	98	CX25840_SVIDEO_ON,
	99	.gpio0 = 0,
d19770e5 ST	100	}},
d19770e5 ST	101	},
a77743bc ST	102	[CX23885_BOARD_HAUPPAUGE_HVR1250] = {
	103	.name = "Hauppauge WinTV-HVR1250",
	104	.portc = CX23885_MPEG_DVB,
	105	.input = {{
	106	.type = CX23885_VMUX_TELEVISION,
	107	.vmux = 0,
	108	.gpio0 = 0xff00,
	109	},{
	110	.type = CX23885_VMUX_DEBUG,
	111	.vmux = 0,
	112	.gpio0 = 0xff01,
	113	},{
	114	.type = CX23885_VMUX_COMPOSITE1,
	115	.vmux = 1,
	116	.gpio0 = 0xff02,
	117	},{
	118	.type = CX23885_VMUX_SVIDEO,
	119	.vmux = 2,
	120	.gpio0 = 0xff02,
	121	}},
	122	},
9bc37caa MK	123	[CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
9bc37caa MK	124	.name = "DViCO FusionHDTV5 Express",
a6a3f140	125	.portb = CX23885_MPEG_DVB,
9bc37caa	126	},
d1987d55 ST	127	[CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
	128	.name = "Hauppauge WinTV-HVR1500Q",
	129	.portc = CX23885_MPEG_DVB,
	130	},
07b4a835 MK	131	[CX23885_BOARD_HAUPPAUGE_HVR1500] = {
	132	.name = "Hauppauge WinTV-HVR1500",
	133	.portc = CX23885_MPEG_DVB,
	134	},
b3ea0166 ST	135	[CX23885_BOARD_HAUPPAUGE_HVR1200] = {
	136	.name = "Hauppauge WinTV-HVR1200",
	137	.portc = CX23885_MPEG_DVB,
	138	},
a780a31c ST	139	[CX23885_BOARD_HAUPPAUGE_HVR1700] = {
	140	.name = "Hauppauge WinTV-HVR1700",
	141	.portc = CX23885_MPEG_DVB,
	142	},
66762373 ST	143	[CX23885_BOARD_HAUPPAUGE_HVR1400] = {
	144	.name = "Hauppauge WinTV-HVR1400",
	145	.portc = CX23885_MPEG_DVB,
	146	},
335377b7 MK	147	[CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
335377b7 MK	148	.name = "DViCO FusionHDTV7 Dual Express",
aaadeac8	149	.portb = CX23885_MPEG_DVB,
335377b7 MK	150	.portc = CX23885_MPEG_DVB,
335377b7 MK	151	},
aef2d186 ST	152	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
	153	.name = "DViCO FusionHDTV DVB-T Dual Express",
	154	.portb = CX23885_MPEG_DVB,
	155	.portc = CX23885_MPEG_DVB,
	156	},
4c56b04a ST	157	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
	158	.name = "Leadtek Winfast PxDVR3200 H",
	159	.portc = CX23885_MPEG_DVB,
	160	},
d19770e5 ST	161	};
	162	const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
	163
	164	/* ------------------------------------------------------------------ */
	165	/* PCI subsystem IDs */
	166
	167	struct cx23885_subid cx23885_subids[] = {
	168	{
	169	.subvendor = 0x0070,
	170	.subdevice = 0x3400,
	171	.card = CX23885_BOARD_UNKNOWN,
	172	},{
	173	.subvendor = 0x0070,
	174	.subdevice = 0x7600,
	175	.card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
	176	},{
	177	.subvendor = 0x0070,
	178	.subdevice = 0x7800,
	179	.card = CX23885_BOARD_HAUPPAUGE_HVR1800,
	180	},{
	181	.subvendor = 0x0070,
	182	.subdevice = 0x7801,
	183	.card = CX23885_BOARD_HAUPPAUGE_HVR1800,
6ccb8cfb MK	184	},{
	185	.subvendor = 0x0070,
	186	.subdevice = 0x7809,
	187	.card = CX23885_BOARD_HAUPPAUGE_HVR1800,
a77743bc ST	188	},{
	189	.subvendor = 0x0070,
	190	.subdevice = 0x7911,
	191	.card = CX23885_BOARD_HAUPPAUGE_HVR1250,
9bc37caa MK	192	},{
	193	.subvendor = 0x18ac,
	194	.subdevice = 0xd500,
	195	.card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
b00fff0b MK	196	},{
	197	.subvendor = 0x0070,
	198	.subdevice = 0x7790,
	199	.card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
d1987d55 ST	200	},{
	201	.subvendor = 0x0070,
	202	.subdevice = 0x7797,
	203	.card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
b00fff0b MK	204	},{
	205	.subvendor = 0x0070,
	206	.subdevice = 0x7710,
	207	.card = CX23885_BOARD_HAUPPAUGE_HVR1500,
07b4a835 MK	208	},{
	209	.subvendor = 0x0070,
	210	.subdevice = 0x7717,
	211	.card = CX23885_BOARD_HAUPPAUGE_HVR1500,
b3ea0166 ST	212	}, {
	213	.subvendor = 0x0070,
	214	.subdevice = 0x71d1,
	215	.card = CX23885_BOARD_HAUPPAUGE_HVR1200,
3c3852cd MK	216	}, {
	217	.subvendor = 0x0070,
	218	.subdevice = 0x71d3,
	219	.card = CX23885_BOARD_HAUPPAUGE_HVR1200,
a780a31c ST	220	}, {
	221	.subvendor = 0x0070,
	222	.subdevice = 0x8101,
	223	.card = CX23885_BOARD_HAUPPAUGE_HVR1700,
66762373 ST	224	}, {
	225	.subvendor = 0x0070,
	226	.subdevice = 0x8010,
	227	.card = CX23885_BOARD_HAUPPAUGE_HVR1400,
335377b7 MK	228	},{
	229	.subvendor = 0x18ac,
	230	.subdevice = 0xd618,
	231	.card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
aef2d186 ST	232	},{
	233	.subvendor = 0x18ac,
	234	.subdevice = 0xdb78,
	235	.card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
4c56b04a ST	236	}, {
	237	.subvendor = 0x107d,
	238	.subdevice = 0x6681,
	239	.card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
d19770e5 ST	240	},
	241	};
	242	const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
	243
	244	void cx23885_card_list(struct cx23885_dev *dev)
	245	{
	246	int i;
	247
	248	if (0 == dev->pci->subsystem_vendor &&
	249	0 == dev->pci->subsystem_device) {
	250	printk("%s: Your board has no valid PCIe Subsystem ID and thus can't\n"
	251	"%s: be autodetected. Please pass card=<n> insmod option to\n"
	252	"%s: workaround that. Redirect complaints to the vendor of\n"
	253	"%s: the TV card. Best regards,\n"
	254	"%s: -- tux\n",
	255	dev->name, dev->name, dev->name, dev->name, dev->name);
	256	} else {
	257	printk("%s: Your board isn't known (yet) to the driver. You can\n"
	258	"%s: try to pick one of the existing card configs via\n"
	259	"%s: card=<n> insmod option. Updating to the latest\n"
	260	"%s: version might help as well.\n",
	261	dev->name, dev->name, dev->name, dev->name);
	262	}
	263	printk("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
	264	dev->name);
	265	for (i = 0; i < cx23885_bcount; i++)
	266	printk("%s: card=%d -> %s\n",
	267	dev->name, i, cx23885_boards[i].name);
	268	}
	269
	270	static void hauppauge_eeprom(struct cx23885_dev dev, u8 eeprom_data)
	271	{
	272	struct tveeprom tv;
	273
	274	tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv, eeprom_data);
	275
d19770e5 ST	276	/* Make sure we support the board model */
	277	switch (tv.model)
	278	{
36396c89 MK	279	case 71009:
	280	/* WinTV-HVR1200 (PCIe, Retail, full height)
	281	* DVB-T and basic analog */
	282	case 71359:
	283	/* WinTV-HVR1200 (PCIe, OEM, half height)
	284	* DVB-T and basic analog */
	285	case 71439:
	286	/* WinTV-HVR1200 (PCIe, OEM, half height)
	287	* DVB-T and basic analog */
	288	case 71449:
	289	/* WinTV-HVR1200 (PCIe, OEM, full height)
	290	* DVB-T and basic analog */
	291	case 71939:
	292	/* WinTV-HVR1200 (PCIe, OEM, half height)
	293	* DVB-T and basic analog */
	294	case 71949:
	295	/* WinTV-HVR1200 (PCIe, OEM, full height)
	296	* DVB-T and basic analog */
	297	case 71959:
	298	/* WinTV-HVR1200 (PCIe, OEM, full height)
	299	* DVB-T and basic analog */
	300	case 71979:
	301	/* WinTV-HVR1200 (PCIe, OEM, half height)
	302	* DVB-T and basic analog */
	303	case 71999:
	304	/* WinTV-HVR1200 (PCIe, OEM, full height)
	305	* DVB-T and basic analog */
d19770e5	306	case 76601: /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual channel ATSC and MPEG2 HW Encoder */
29a7b4cb MK	307	case 77001: /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC and Basic analog */
	308	case 77011: /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC and Basic analog */
	309	case 77041: /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM and Basic analog */
	310	case 77051: /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM and Basic analog */
6a0a962c MK	311	case 78011: /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM, Dual channel ATSC and MPEG2 HW Encoder */
	312	case 78501: /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, Dual channel ATSC and MPEG2 HW Encoder */
	313	case 78521: /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, Dual channel ATSC and MPEG2 HW Encoder */
	314	case 78531: /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM, Dual channel ATSC and MPEG2 HW Encoder */
	315	case 78631: /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM, Dual channel ATSC and MPEG2 HW Encoder */
68370cf9 MK	316	case 79001: /* WinTV-HVR1250 (PCIe, Retail, IR, full height, ATSC and Basic analog */
68370cf9 MK	317	case 79101: /* WinTV-HVR1250 (PCIe, Retail, IR, half height, ATSC and Basic analog */
4b15b5ec	318	case 79561: /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, ATSC and Basic analog */
68370cf9 MK	319	case 79571: /* WinTV-HVR1250 (PCIe, OEM, No IR, full height, ATSC and Basic analog */
68370cf9 MK	320	case 79671: /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, ATSC and Basic analog */
66762373 ST	321	case 80019:
	322	/* WinTV-HVR1400 (Express Card, Retail, IR,
	323	* DVB-T and Basic analog */
36396c89 MK	324	case 81509:
	325	/* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
	326	* DVB-T and MPEG2 HW Encoder */
a780a31c	327	case 81519:
36396c89	328	/* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
a780a31c	329	* DVB-T and MPEG2 HW Encoder */
d19770e5 ST	330	break;
	331	default:
	332	printk("%s: warning: unknown hauppauge model #%d\n", dev->name, tv.model);
	333	break;
	334	}
	335
	336	printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
	337	dev->name, tv.model);
	338	}
	339
89ce2216	340	int cx23885_tuner_callback(void *priv, int command, int arg)
8c70017f	341	{
89ce2216 ST	342	struct cx23885_tsport *port = priv;
89ce2216 ST	343	struct cx23885_dev *dev = port->dev;
6df51690 ST	344	u32 bitmask = 0;
6df51690 ST	345
89ce2216 ST	346	if (command == XC2028_RESET_CLK)
	347	return 0;
	348
6df51690 ST	349	if (command != 0) {
	350	printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
	351	__func__, command);
	352	return -EINVAL;
	353	}
8c70017f ST	354
8c70017f ST	355	switch(dev->board) {
90a71b1c ST	356	case CX23885_BOARD_HAUPPAUGE_HVR1400:
90a71b1c ST	357	case CX23885_BOARD_HAUPPAUGE_HVR1500:
8c70017f	358	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
4c56b04a	359	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
90a71b1c	360	/* Tuner Reset Command */
4c56b04a	361	bitmask = 0x04;
6df51690 ST	362	break;
6df51690 ST	363	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186	364	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
4c56b04a ST	365	/* Two identical tuners on two different i2c buses,
	366	* we need to reset the correct gpio. */
	367	if (port->nr == 0)
	368	bitmask = 0x01;
	369	else if (port->nr == 1)
	370	bitmask = 0x04;
8c70017f ST	371	break;
	372	}
	373
6df51690 ST	374	if (bitmask) {
	375	/* Drive the tuner into reset and back out */
	376	cx_clear(GP0_IO, bitmask);
	377	mdelay(200);
	378	cx_set(GP0_IO, bitmask);
	379	}
	380
	381	return 0;
8c70017f	382	}
73c993a8	383
a6a3f140 ST	384	void cx23885_gpio_setup(struct cx23885_dev *dev)
	385	{
	386	switch(dev->board) {
	387	case CX23885_BOARD_HAUPPAUGE_HVR1250:
	388	/* GPIO-0 cx24227 demodulator reset */
	389	cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
	390	break;
07b4a835 MK	391	case CX23885_BOARD_HAUPPAUGE_HVR1500:
	392	/* GPIO-0 cx24227 demodulator */
	393	/* GPIO-2 xc3028 tuner */
	394
	395	/* Put the parts into reset */
	396	cx_set(GP0_IO, 0x00050000);
	397	cx_clear(GP0_IO, 0x00000005);
	398	msleep(5);
	399
	400	/* Bring the parts out of reset */
	401	cx_set(GP0_IO, 0x00050005);
	402	break;
d1987d55 ST	403	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
	404	/* GPIO-0 cx24227 demodulator reset */
	405	/* GPIO-2 xc5000 tuner reset */
	406	cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
	407	break;
a6a3f140 ST	408	case CX23885_BOARD_HAUPPAUGE_HVR1800:
	409	/* GPIO-0 656_CLK */
	410	/* GPIO-1 656_D0 */
	411	/* GPIO-2 8295A Reset */
	412	/* GPIO-3-10 cx23417 data0-7 */
	413	/* GPIO-11-14 cx23417 addr0-3 */
	414	/* GPIO-15-18 cx23417 READY, CS, RD, WR */
	415	/* GPIO-19 IR_RX */
3ba71d21	416
a589b665 ST	417	/* CX23417 GPIO's */
	418	/* EIO15 Zilog Reset */
	419	/* EIO14 S5H1409/CX24227 Reset */
	420
5206d6ec ST	421	/* Force the TDA8295A into reset and back */
	422	cx_set(GP0_IO, 0x00040004);
	423	mdelay(20);
	424	cx_clear(GP0_IO, 0x00000004);
	425	mdelay(20);
	426	cx_set(GP0_IO, 0x00040004);
	427	mdelay(20);
a6a3f140	428	break;
b3ea0166 ST	429	case CX23885_BOARD_HAUPPAUGE_HVR1200:
	430	/* GPIO-0 tda10048 demodulator reset */
	431	/* GPIO-2 tda18271 tuner reset */
	432
a780a31c ST	433	/* Put the parts into reset and back */
	434	cx_set(GP0_IO, 0x00050000);
	435	mdelay(20);
	436	cx_clear(GP0_IO, 0x00000005);
	437	mdelay(20);
	438	cx_set(GP0_IO, 0x00050005);
	439	break;
	440	case CX23885_BOARD_HAUPPAUGE_HVR1700:
	441	/* GPIO-0 TDA10048 demodulator reset */
	442	/* GPIO-2 TDA8295A Reset */
	443	/* GPIO-3-10 cx23417 data0-7 */
	444	/* GPIO-11-14 cx23417 addr0-3 */
	445	/* GPIO-15-18 cx23417 READY, CS, RD, WR */
	446
	447	/* The following GPIO's are on the interna AVCore (cx25840) */
	448	/* GPIO-19 IR_RX */
	449	/* GPIO-20 IR_TX 416/DVBT Select */
	450	/* GPIO-21 IIS DAT */
	451	/* GPIO-22 IIS WCLK */
	452	/* GPIO-23 IIS BCLK */
	453
66762373 ST	454	/* Put the parts into reset and back */
	455	cx_set(GP0_IO, 0x00050000);
	456	mdelay(20);
	457	cx_clear(GP0_IO, 0x00000005);
	458	mdelay(20);
	459	cx_set(GP0_IO, 0x00050005);
	460	break;
	461	case CX23885_BOARD_HAUPPAUGE_HVR1400:
	462	/* GPIO-0 Dibcom7000p demodulator reset */
	463	/* GPIO-2 xc3028L tuner reset */
	464	/* GPIO-13 LED */
	465
b3ea0166 ST	466	/* Put the parts into reset and back */
	467	cx_set(GP0_IO, 0x00050000);
	468	mdelay(20);
	469	cx_clear(GP0_IO, 0x00000005);
	470	mdelay(20);
	471	cx_set(GP0_IO, 0x00050005);
	472	break;
1ecc5aed ST	473	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
	474	/* GPIO-0 xc5000 tuner reset i2c bus 0 */
	475	/* GPIO-1 s5h1409 demod reset i2c bus 0 */
	476	/* GPIO-2 xc5000 tuner reset i2c bus 1 */
	477	/* GPIO-3 s5h1409 demod reset i2c bus 0 */
	478
aef2d186 ST	479	/* Put the parts into reset and back */
	480	cx_set(GP0_IO, 0x000f0000);
	481	mdelay(20);
	482	cx_clear(GP0_IO, 0x0000000f);
	483	mdelay(20);
	484	cx_set(GP0_IO, 0x000f000f);
	485	break;
	486	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
	487	/* GPIO-0 portb xc3028 reset */
	488	/* GPIO-1 portb zl10353 reset */
	489	/* GPIO-2 portc xc3028 reset */
	490	/* GPIO-3 portc zl10353 reset */
	491
1ecc5aed ST	492	/* Put the parts into reset and back */
	493	cx_set(GP0_IO, 0x000f0000);
	494	mdelay(20);
	495	cx_clear(GP0_IO, 0x0000000f);
	496	mdelay(20);
	497	cx_set(GP0_IO, 0x000f000f);
	498	break;
4c56b04a ST	499	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
	500	/* GPIO-2 xc3028 tuner reset */
	501
	502	/* The following GPIO's are on the internal AVCore (cx25840) */
	503	/* GPIO-? zl10353 demod reset */
	504
	505	/* Put the parts into reset and back */
	506	cx_set(GP0_IO, 0x00040000);
	507	mdelay(20);
	508	cx_clear(GP0_IO, 0x00000004);
	509	mdelay(20);
	510	cx_set(GP0_IO, 0x00040004);
	511	break;
a6a3f140 ST	512	}
	513	}
	514
	515	int cx23885_ir_init(struct cx23885_dev *dev)
	516	{
	517	switch (dev->board) {
	518	case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835	519	case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55	520	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140	521	case CX23885_BOARD_HAUPPAUGE_HVR1800:
b3ea0166	522	case CX23885_BOARD_HAUPPAUGE_HVR1200:
66762373	523	case CX23885_BOARD_HAUPPAUGE_HVR1400:
a6a3f140 ST	524	/* FIXME: Implement me */
a6a3f140 ST	525	break;
12886871 ST	526	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
	527	request_module("ir-kbd-i2c");
	528	break;
a6a3f140 ST	529	}
	530
	531	return 0;
	532	}
	533
d19770e5 ST	534	void cx23885_card_setup(struct cx23885_dev *dev)
d19770e5 ST	535	{
a6a3f140 ST	536	struct cx23885_tsport *ts1 = &dev->ts1;
	537	struct cx23885_tsport *ts2 = &dev->ts2;
	538
d19770e5 ST	539	static u8 eeprom[256];
	540
	541	if (dev->i2c_bus[0].i2c_rc == 0) {
	542	dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
44a6481d MK	543	tveeprom_read(&dev->i2c_bus[0].i2c_client,
44a6481d MK	544	eeprom, sizeof(eeprom));
d19770e5 ST	545	}
	546
	547	switch (dev->board) {
a77743bc	548	case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835	549	case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55	550	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
66762373	551	case CX23885_BOARD_HAUPPAUGE_HVR1400:
c88133ec ST	552	if (dev->i2c_bus[0].i2c_rc == 0)
	553	hauppauge_eeprom(dev, eeprom+0x80);
	554	break;
d19770e5 ST	555	case CX23885_BOARD_HAUPPAUGE_HVR1800:
d19770e5 ST	556	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166	557	case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c	558	case CX23885_BOARD_HAUPPAUGE_HVR1700:
d19770e5	559	if (dev->i2c_bus[0].i2c_rc == 0)
c88133ec	560	hauppauge_eeprom(dev, eeprom+0xc0);
d19770e5 ST	561	break;
d19770e5 ST	562	}
a6a3f140 ST	563
a6a3f140 ST	564	switch (dev->board) {
335377b7	565	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186	566	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
335377b7 MK	567	ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
	568	ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
	569	ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
	570	/* break omitted intentionally */
a6a3f140 ST	571	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
	572	ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
	573	ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
	574	ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
	575	break;
a589b665 ST	576	case CX23885_BOARD_HAUPPAUGE_HVR1800:
	577	/* Defaults for VID B - Analog encoder */
	578	/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
	579	ts1->gen_ctrl_val = 0x10e;
	580	ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
	581	ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
	582
	583	/* APB_TSVALERR_POL (active low)*/
	584	ts1->vld_misc_val = 0x2000;
	585	ts1->hw_sop_ctrl_val = (0x47 << 16 \| 188 << 4 \| 0xc);
	586
	587	/* Defaults for VID C */
	588	ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
	589	ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
	590	ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
	591	break;
a6a3f140	592	case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835	593	case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55	594	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140	595	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166	596	case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c	597	case CX23885_BOARD_HAUPPAUGE_HVR1700:
66762373	598	case CX23885_BOARD_HAUPPAUGE_HVR1400:
4c56b04a	599	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
a6a3f140 ST	600	default:
	601	ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
	602	ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
	603	ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
	604	}
	605
ce89cfb4 ST	606	/* Certain boards support analog, or require the avcore to be
	607	* loaded, ensure this happens.
	608	*/
	609	switch (dev->board) {
	610	case CX23885_BOARD_HAUPPAUGE_HVR1800:
	611	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
	612	case CX23885_BOARD_HAUPPAUGE_HVR1700:
4c56b04a	613	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
ce89cfb4 ST	614	request_module("cx25840");
	615	break;
	616	}
d19770e5 ST	617	}
	618
	619	/* ------------------------------------------------------------------ */
	620
d19770e5 ST	621	/*
	622	* Local variables:
	623	* c-basic-offset: 8
	624	* End:
	625	* kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
	626	*/