[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / cx18 / cx18-dvb.c

/*
 *  cx18 functions for DVB support
 *
 *  Copyright (c) 2008 Steven Toth <stoth@linuxtv.org>
 *  Copyright (C) 2008  Andy Walls <awalls@md.metrocast.net>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include "cx18-version.h"
#include "cx18-dvb.h"
#include "cx18-io.h"
#include "cx18-queue.h"
#include "cx18-streams.h"
#include "cx18-cards.h"
#include "cx18-gpio.h"
#include "s5h1409.h"
#include "mxl5005s.h"
#include "s5h1411.h"
#include "tda18271.h"
#include "zl10353.h"

#include <linux/firmware.h>
#include "mt352.h"
#include "mt352_priv.h"
#include "tuner-xc2028.h"

DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);

#define CX18_REG_DMUX_NUM_PORT_0_CONTROL 0xd5a000
#define CX18_CLOCK_ENABLE2		 0xc71024
#define CX18_DMUX_CLK_MASK		 0x0080

/*
 * CX18_CARD_HVR_1600_ESMT
 * CX18_CARD_HVR_1600_SAMSUNG
 */

static struct mxl5005s_config hauppauge_hvr1600_tuner = {
	.i2c_address     = 0xC6 >> 1,
	.if_freq         = IF_FREQ_5380000HZ,
	.xtal_freq       = CRYSTAL_FREQ_16000000HZ,
	.agc_mode        = MXL_SINGLE_AGC,
	.tracking_filter = MXL_TF_C_H,
	.rssi_enable     = MXL_RSSI_ENABLE,
	.cap_select      = MXL_CAP_SEL_ENABLE,
	.div_out         = MXL_DIV_OUT_4,
	.clock_out       = MXL_CLOCK_OUT_DISABLE,
	.output_load     = MXL5005S_IF_OUTPUT_LOAD_200_OHM,
	.top		 = MXL5005S_TOP_25P2,
	.mod_mode        = MXL_DIGITAL_MODE,
	.if_mode         = MXL_ZERO_IF,
	.qam_gain        = 0x02,
	.AgcMasterByte   = 0x00,
};

static struct s5h1409_config hauppauge_hvr1600_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
	.qam_if        = 44000,
	.inversion     = S5H1409_INVERSION_OFF,
	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
	.hvr1600_opt   = S5H1409_HVR1600_OPTIMIZE
};

/*
 * CX18_CARD_HVR_1600_S5H1411
 */
static struct s5h1411_config hcw_s5h1411_config = {
	.output_mode   = S5H1411_SERIAL_OUTPUT,
	.gpio          = S5H1411_GPIO_OFF,
	.vsb_if        = S5H1411_IF_44000,
	.qam_if        = S5H1411_IF_4000,
	.inversion     = S5H1411_INVERSION_ON,
	.status_mode   = S5H1411_DEMODLOCKING,
	.mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

static struct tda18271_std_map hauppauge_tda18271_std_map = {
	.atsc_6   = { .if_freq = 5380, .agc_mode = 3, .std = 3,
		      .if_lvl = 6, .rfagc_top = 0x37 },
	.qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 0,
		      .if_lvl = 6, .rfagc_top = 0x37 },
};

static struct tda18271_config hauppauge_tda18271_config = {
	.std_map = &hauppauge_tda18271_std_map,
	.gate    = TDA18271_GATE_DIGITAL,
	.output_opt = TDA18271_OUTPUT_LT_OFF,
};

/*
 * CX18_CARD_LEADTEK_DVR3100H
 */
/* Information/confirmation of proper config values provided by Terry Wu */
static struct zl10353_config leadtek_dvr3100h_demod = {
	.demod_address         = 0x1e >> 1, /* Datasheet suggested straps */
	.if2                   = 45600,     /* 4.560 MHz IF from the XC3028 */
	.parallel_ts           = 1,         /* Not a serial TS */
	.no_tuner              = 1,         /* XC3028 is not behind the gate */
	.disable_i2c_gate_ctrl = 1,         /* Disable the I2C gate */
};

/*
 * CX18_CARD_YUAN_MPC718
 */
/*
 * Due to
 *
 * 1. an absence of information on how to prgram the MT352
 * 2. the Linux mt352 module pushing MT352 initialzation off onto us here
 *
 * We have to use an init sequence that *you* must extract from the Windows
 * driver (yuanrap.sys) and which we load as a firmware.
 *
 * If someone can provide me with a Zarlink MT352 (Intel CE6352?) Design Manual
 * with chip programming details, then I can remove this annoyance.
 */
static int yuan_mpc718_mt352_reqfw(struct cx18_stream *stream,
				   const struct firmware **fw)
{
	struct cx18 *cx = stream->cx;
	const char *fn = "dvb-cx18-mpc718-mt352.fw";
	int ret;

	ret = request_firmware(fw, fn, &cx->pci_dev->dev);
	if (ret)
		CX18_ERR("Unable to open firmware file %s\n", fn);
	else {
		size_t sz = (*fw)->size;
		if (sz < 2 || sz > 64 || (sz % 2) != 0) {
			CX18_ERR("Firmware %s has a bad size: %lu bytes\n",
				 fn, (unsigned long) sz);
			ret = -EILSEQ;
			release_firmware(*fw);
			*fw = NULL;
		}
	}

	if (ret) {
		CX18_ERR("The MPC718 board variant with the MT352 DVB-T"
			  "demodualtor will not work without it\n");
		CX18_ERR("Run 'linux/Documentation/dvb/get_dvb_firmware "
			  "mpc718' if you need the firmware\n");
	}
	return ret;
}

static int yuan_mpc718_mt352_init(struct dvb_frontend *fe)
{
	struct cx18_dvb *dvb = container_of(fe->dvb,
					    struct cx18_dvb, dvb_adapter);
	struct cx18_stream *stream = dvb->stream;
	const struct firmware *fw = NULL;
	int ret;
	int i;
	u8 buf[3];

	ret = yuan_mpc718_mt352_reqfw(stream, &fw);
	if (ret)
		return ret;

	/* Loop through all the register-value pairs in the firmware file */
	for (i = 0; i < fw->size; i += 2) {
		buf[0] = fw->data[i];
		/* Intercept a few registers we want to set ourselves */
		switch (buf[0]) {
		case TRL_NOMINAL_RATE_0:
			/* Set our custom OFDM bandwidth in the case below */
			break;
		case TRL_NOMINAL_RATE_1:
			/* 6 MHz: 64/7 * 6/8 / 20.48 * 2^16 = 0x55b6.db6 */
			/* 7 MHz: 64/7 * 7/8 / 20.48 * 2^16 = 0x6400 */
			/* 8 MHz: 64/7 * 8/8 / 20.48 * 2^16 = 0x7249.249 */
			buf[1] = 0x72;
			buf[2] = 0x49;
			mt352_write(fe, buf, 3);
			break;
		case INPUT_FREQ_0:
			/* Set our custom IF in the case below */
			break;
		case INPUT_FREQ_1:
			/* 4.56 MHz IF: (20.48 - 4.56)/20.48 * 2^14 = 0x31c0 */
			buf[1] = 0x31;
			buf[2] = 0xc0;
			mt352_write(fe, buf, 3);
			break;
		default:
			/* Pass through the register-value pair from the fw */
			buf[1] = fw->data[i+1];
			mt352_write(fe, buf, 2);
			break;
		}
	}

	buf[0] = (u8) TUNER_GO;
	buf[1] = 0x01; /* Go */
	mt352_write(fe, buf, 2);
	release_firmware(fw);
	return 0;
}

static struct mt352_config yuan_mpc718_mt352_demod = {
	.demod_address = 0x1e >> 1,
	.adc_clock     = 20480,     /* 20.480 MHz */
	.if2           =  4560,     /*  4.560 MHz */
	.no_tuner      = 1,         /* XC3028 is not behind the gate */
	.demod_init    = yuan_mpc718_mt352_init,
};

static struct zl10353_config yuan_mpc718_zl10353_demod = {
	.demod_address         = 0x1e >> 1, /* Datasheet suggested straps */
	.if2                   = 45600,     /* 4.560 MHz IF from the XC3028 */
	.parallel_ts           = 1,         /* Not a serial TS */
	.no_tuner              = 1,         /* XC3028 is not behind the gate */
	.disable_i2c_gate_ctrl = 1,         /* Disable the I2C gate */
};

static struct zl10353_config gotview_dvd3_zl10353_demod = {
	.demod_address         = 0x1e >> 1, /* Datasheet suggested straps */
	.if2                   = 45600,     /* 4.560 MHz IF from the XC3028 */
	.parallel_ts           = 1,         /* Not a serial TS */
	.no_tuner              = 1,         /* XC3028 is not behind the gate */
	.disable_i2c_gate_ctrl = 1,         /* Disable the I2C gate */
};

static int dvb_register(struct cx18_stream *stream);

/* Kernel DVB framework calls this when the feed needs to start.
 * The CX18 framework should enable the transport DMA handling
 * and queue processing.
 */
static int cx18_dvb_start_feed(struct dvb_demux_feed *feed)
{
	struct dvb_demux *demux = feed->demux;
	struct cx18_stream *stream = (struct cx18_stream *) demux->priv;
	struct cx18 *cx;
	int ret;
	u32 v;

	if (!stream)
		return -EINVAL;

	cx = stream->cx;
	CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n",
			feed->pid, feed->index);

	mutex_lock(&cx->serialize_lock);
	ret = cx18_init_on_first_open(cx);
	mutex_unlock(&cx->serialize_lock);
	if (ret) {
		CX18_ERR("Failed to initialize firmware starting DVB feed\n");
		return ret;
	}
	ret = -EINVAL;

	switch (cx->card->type) {
	case CX18_CARD_HVR_1600_ESMT:
	case CX18_CARD_HVR_1600_SAMSUNG:
	case CX18_CARD_HVR_1600_S5H1411:
		v = cx18_read_reg(cx, CX18_REG_DMUX_NUM_PORT_0_CONTROL);
		v |= 0x00400000; /* Serial Mode */
		v |= 0x00002000; /* Data Length - Byte */
		v |= 0x00010000; /* Error - Polarity */
		v |= 0x00020000; /* Error - Passthru */
		v |= 0x000c0000; /* Error - Ignore */
		cx18_write_reg(cx, v, CX18_REG_DMUX_NUM_PORT_0_CONTROL);
		break;

	case CX18_CARD_LEADTEK_DVR3100H:
	case CX18_CARD_YUAN_MPC718:
	case CX18_CARD_GOTVIEW_PCI_DVD3:
	default:
		/* Assumption - Parallel transport - Signalling
		 * undefined or default.
		 */
		break;
	}

	if (!demux->dmx.frontend)
		return -EINVAL;

	mutex_lock(&stream->dvb->feedlock);
	if (stream->dvb->feeding++ == 0) {
		CX18_DEBUG_INFO("Starting Transport DMA\n");
		mutex_lock(&cx->serialize_lock);
		set_bit(CX18_F_S_STREAMING, &stream->s_flags);
		ret = cx18_start_v4l2_encode_stream(stream);
		if (ret < 0) {
			CX18_DEBUG_INFO("Failed to start Transport DMA\n");
			stream->dvb->feeding--;
			if (stream->dvb->feeding == 0)
				clear_bit(CX18_F_S_STREAMING, &stream->s_flags);
		}
		mutex_unlock(&cx->serialize_lock);
	} else
		ret = 0;
	mutex_unlock(&stream->dvb->feedlock);

	return ret;
}

/* Kernel DVB framework calls this when the feed needs to stop. */
static int cx18_dvb_stop_feed(struct dvb_demux_feed *feed)
{
	struct dvb_demux *demux = feed->demux;
	struct cx18_stream *stream = (struct cx18_stream *)demux->priv;
	struct cx18 *cx;
	int ret = -EINVAL;

	if (stream) {
		cx = stream->cx;
		CX18_DEBUG_INFO("Stop feed: pid = 0x%x index = %d\n",
				feed->pid, feed->index);

		mutex_lock(&stream->dvb->feedlock);
		if (--stream->dvb->feeding == 0) {
			CX18_DEBUG_INFO("Stopping Transport DMA\n");
			mutex_lock(&cx->serialize_lock);
			ret = cx18_stop_v4l2_encode_stream(stream, 0);
			mutex_unlock(&cx->serialize_lock);
		} else
			ret = 0;
		mutex_unlock(&stream->dvb->feedlock);
	}

	return ret;
}

int cx18_dvb_register(struct cx18_stream *stream)
{
	struct cx18 *cx = stream->cx;
	struct cx18_dvb *dvb = stream->dvb;
	struct dvb_adapter *dvb_adapter;
	struct dvb_demux *dvbdemux;
	struct dmx_demux *dmx;
	int ret;

	if (!dvb)
		return -EINVAL;

	dvb->enabled = 0;
	dvb->stream = stream;

	ret = dvb_register_adapter(&dvb->dvb_adapter,
			CX18_DRIVER_NAME,
			THIS_MODULE, &cx->pci_dev->dev, adapter_nr);
	if (ret < 0)
		goto err_out;

	dvb_adapter = &dvb->dvb_adapter;

	dvbdemux = &dvb->demux;

	dvbdemux->priv = (void *)stream;

	dvbdemux->filternum = 256;
	dvbdemux->feednum = 256;
	dvbdemux->start_feed = cx18_dvb_start_feed;
	dvbdemux->stop_feed = cx18_dvb_stop_feed;
	dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
		DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
	ret = dvb_dmx_init(dvbdemux);
	if (ret < 0)
		goto err_dvb_unregister_adapter;

	dmx = &dvbdemux->dmx;

	dvb->hw_frontend.source = DMX_FRONTEND_0;
	dvb->mem_frontend.source = DMX_MEMORY_FE;
	dvb->dmxdev.filternum = 256;
	dvb->dmxdev.demux = dmx;

	ret = dvb_dmxdev_init(&dvb->dmxdev, dvb_adapter);
	if (ret < 0)
		goto err_dvb_dmx_release;

	ret = dmx->add_frontend(dmx, &dvb->hw_frontend);
	if (ret < 0)
		goto err_dvb_dmxdev_release;

	ret = dmx->add_frontend(dmx, &dvb->mem_frontend);
	if (ret < 0)
		goto err_remove_hw_frontend;

	ret = dmx->connect_frontend(dmx, &dvb->hw_frontend);
	if (ret < 0)
		goto err_remove_mem_frontend;

	ret = dvb_register(stream);
	if (ret < 0)
		goto err_disconnect_frontend;

	dvb_net_init(dvb_adapter, &dvb->dvbnet, dmx);

	CX18_INFO("DVB Frontend registered\n");
	CX18_INFO("Registered DVB adapter%d for %s (%d x %d.%02d kB)\n",
		  stream->dvb->dvb_adapter.num, stream->name,
		  stream->buffers, stream->buf_size/1024,
		  (stream->buf_size * 100 / 1024) % 100);

	mutex_init(&dvb->feedlock);
	dvb->enabled = 1;
	return ret;

err_disconnect_frontend:
	dmx->disconnect_frontend(dmx);
err_remove_mem_frontend:
	dmx->remove_frontend(dmx, &dvb->mem_frontend);
err_remove_hw_frontend:
	dmx->remove_frontend(dmx, &dvb->hw_frontend);
err_dvb_dmxdev_release:
	dvb_dmxdev_release(&dvb->dmxdev);
err_dvb_dmx_release:
	dvb_dmx_release(dvbdemux);
err_dvb_unregister_adapter:
	dvb_unregister_adapter(dvb_adapter);
err_out:
	return ret;
}

void cx18_dvb_unregister(struct cx18_stream *stream)
{
	struct cx18 *cx = stream->cx;
	struct cx18_dvb *dvb = stream->dvb;
	struct dvb_adapter *dvb_adapter;
	struct dvb_demux *dvbdemux;
	struct dmx_demux *dmx;

	CX18_INFO("unregister DVB\n");

	if (dvb == NULL || !dvb->enabled)
		return;

	dvb_adapter = &dvb->dvb_adapter;
	dvbdemux = &dvb->demux;
	dmx = &dvbdemux->dmx;

	dmx->close(dmx);
	dvb_net_release(&dvb->dvbnet);
	dmx->remove_frontend(dmx, &dvb->mem_frontend);
	dmx->remove_frontend(dmx, &dvb->hw_frontend);
	dvb_dmxdev_release(&dvb->dmxdev);
	dvb_dmx_release(dvbdemux);
	dvb_unregister_frontend(dvb->fe);
	dvb_frontend_detach(dvb->fe);
	dvb_unregister_adapter(dvb_adapter);
}

/* All the DVB attach calls go here, this function get's modified
 * for each new card. cx18_dvb_start_feed() will also need changes.
 */
static int dvb_register(struct cx18_stream *stream)
{
	struct cx18_dvb *dvb = stream->dvb;
	struct cx18 *cx = stream->cx;
	int ret = 0;

	switch (cx->card->type) {
	case CX18_CARD_HVR_1600_ESMT:
	case CX18_CARD_HVR_1600_SAMSUNG:
		dvb->fe = dvb_attach(s5h1409_attach,
			&hauppauge_hvr1600_config,
			&cx->i2c_adap[0]);
		if (dvb->fe != NULL) {
			dvb_attach(mxl5005s_attach, dvb->fe,
				&cx->i2c_adap[0],
				&hauppauge_hvr1600_tuner);
			ret = 0;
		}
		break;
	case CX18_CARD_HVR_1600_S5H1411:
		dvb->fe = dvb_attach(s5h1411_attach,
				     &hcw_s5h1411_config,
				     &cx->i2c_adap[0]);
		if (dvb->fe != NULL)
			dvb_attach(tda18271_attach, dvb->fe,
				   0x60, &cx->i2c_adap[0],
				   &hauppauge_tda18271_config);
		break;
	case CX18_CARD_LEADTEK_DVR3100H:
		dvb->fe = dvb_attach(zl10353_attach,
				     &leadtek_dvr3100h_demod,
				     &cx->i2c_adap[1]);
		if (dvb->fe != NULL) {
			struct dvb_frontend *fe;
			struct xc2028_config cfg = {
				.i2c_adap = &cx->i2c_adap[1],
				.i2c_addr = 0xc2 >> 1,
				.ctrl = NULL,
			};
			static struct xc2028_ctrl ctrl = {
				.fname   = XC2028_DEFAULT_FIRMWARE,
				.max_len = 64,
				.demod   = XC3028_FE_ZARLINK456,
				.type    = XC2028_AUTO,
			};

			fe = dvb_attach(xc2028_attach, dvb->fe, &cfg);
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctrl);
		}
		break;
	case CX18_CARD_YUAN_MPC718:
		/*
		 * TODO
		 * Apparently, these cards also could instead have a
		 * DiBcom demod supported by one of the db7000 drivers
		 */
		dvb->fe = dvb_attach(mt352_attach,
				     &yuan_mpc718_mt352_demod,
				     &cx->i2c_adap[1]);
		if (dvb->fe == NULL)
			dvb->fe = dvb_attach(zl10353_attach,
					     &yuan_mpc718_zl10353_demod,
					     &cx->i2c_adap[1]);
		if (dvb->fe != NULL) {
			struct dvb_frontend *fe;
			struct xc2028_config cfg = {
				.i2c_adap = &cx->i2c_adap[1],
				.i2c_addr = 0xc2 >> 1,
				.ctrl = NULL,
			};
			static struct xc2028_ctrl ctrl = {
				.fname   = XC2028_DEFAULT_FIRMWARE,
				.max_len = 64,
				.demod   = XC3028_FE_ZARLINK456,
				.type    = XC2028_AUTO,
			};

			fe = dvb_attach(xc2028_attach, dvb->fe, &cfg);
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctrl);
		}
		break;
	case CX18_CARD_GOTVIEW_PCI_DVD3:
			dvb->fe = dvb_attach(zl10353_attach,
					     &gotview_dvd3_zl10353_demod,
					     &cx->i2c_adap[1]);
		if (dvb->fe != NULL) {
			struct dvb_frontend *fe;
			struct xc2028_config cfg = {
				.i2c_adap = &cx->i2c_adap[1],
				.i2c_addr = 0xc2 >> 1,
				.ctrl = NULL,
			};
			static struct xc2028_ctrl ctrl = {
				.fname   = XC2028_DEFAULT_FIRMWARE,
				.max_len = 64,
				.demod   = XC3028_FE_ZARLINK456,
				.type    = XC2028_AUTO,
			};

			fe = dvb_attach(xc2028_attach, dvb->fe, &cfg);
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctrl);
		}
		break;
	default:
		/* No Digital Tv Support */
		break;
	}

	if (dvb->fe == NULL) {
		CX18_ERR("frontend initialization failed\n");
		return -1;
	}

	dvb->fe->callback = cx18_reset_tuner_gpio;

	ret = dvb_register_frontend(&dvb->dvb_adapter, dvb->fe);
	if (ret < 0) {
		if (dvb->fe->ops.release)
			dvb->fe->ops.release(dvb->fe);
		return ret;
	}

	/*
	 * The firmware seems to enable the TS DMUX clock
	 * under various circumstances.  However, since we know we
	 * might use it, let's just turn it on ourselves here.
	 */
	cx18_write_reg_expect(cx,
			      (CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK,
			      CX18_CLOCK_ENABLE2,
			      CX18_DMUX_CLK_MASK,
			      (CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK);

	return ret;
}
Commit	Line	Data
1c1e45d1 HV	1	/*
	2	* cx18 functions for DVB support
	3	*
6d897616	4	* Copyright (c) 2008 Steven Toth <stoth@linuxtv.org>
6afdeaf8	5	* Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
1c1e45d1 HV	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	*
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	21	*/
	22
	23	#include "cx18-version.h"
	24	#include "cx18-dvb.h"
b1526421	25	#include "cx18-io.h"
21a278b8	26	#include "cx18-queue.h"
1c1e45d1 HV	27	#include "cx18-streams.h"
1c1e45d1 HV	28	#include "cx18-cards.h"
8bb09db3	29	#include "cx18-gpio.h"
1c1e45d1	30	#include "s5h1409.h"
67129471	31	#include "mxl5005s.h"
e3bfeabb DH	32	#include "s5h1411.h"
e3bfeabb DH	33	#include "tda18271.h"
8bb09db3	34	#include "zl10353.h"
ff861fb2 AW	35
	36	#include <linux/firmware.h>
	37	#include "mt352.h"
	38	#include "mt352_priv.h"
8bb09db3	39	#include "tuner-xc2028.h"
1c1e45d1 HV	40
	41	DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
	42
	43	#define CX18_REG_DMUX_NUM_PORT_0_CONTROL 0xd5a000
8bb09db3 AW	44	#define CX18_CLOCK_ENABLE2 0xc71024
8bb09db3 AW	45	#define CX18_DMUX_CLK_MASK 0x0080
1c1e45d1	46
ff861fb2 AW	47	/*
	48	* CX18_CARD_HVR_1600_ESMT
	49	* CX18_CARD_HVR_1600_SAMSUNG
	50	*/
	51
67129471 ST	52	static struct mxl5005s_config hauppauge_hvr1600_tuner = {
	53	.i2c_address = 0xC6 >> 1,
	54	.if_freq = IF_FREQ_5380000HZ,
	55	.xtal_freq = CRYSTAL_FREQ_16000000HZ,
	56	.agc_mode = MXL_SINGLE_AGC,
	57	.tracking_filter = MXL_TF_C_H,
	58	.rssi_enable = MXL_RSSI_ENABLE,
	59	.cap_select = MXL_CAP_SEL_ENABLE,
	60	.div_out = MXL_DIV_OUT_4,
	61	.clock_out = MXL_CLOCK_OUT_DISABLE,
	62	.output_load = MXL5005S_IF_OUTPUT_LOAD_200_OHM,
	63	.top = MXL5005S_TOP_25P2,
	64	.mod_mode = MXL_DIGITAL_MODE,
	65	.if_mode = MXL_ZERO_IF,
48c511ed	66	.qam_gain = 0x02,
67129471	67	.AgcMasterByte = 0x00,
1c1e45d1 HV	68	};
	69
	70	static struct s5h1409_config hauppauge_hvr1600_config = {
	71	.demod_address = 0x32 >> 1,
	72	.output_mode = S5H1409_SERIAL_OUTPUT,
	73	.gpio = S5H1409_GPIO_ON,
	74	.qam_if = 44000,
	75	.inversion = S5H1409_INVERSION_OFF,
	76	.status_mode = S5H1409_DEMODLOCKING,
af5c8e15 DH	77	.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
af5c8e15 DH	78	.hvr1600_opt = S5H1409_HVR1600_OPTIMIZE
8bb09db3	79	};
1c1e45d1	80
e3bfeabb DH	81	/*
	82	* CX18_CARD_HVR_1600_S5H1411
	83	*/
	84	static struct s5h1411_config hcw_s5h1411_config = {
	85	.output_mode = S5H1411_SERIAL_OUTPUT,
	86	.gpio = S5H1411_GPIO_OFF,
	87	.vsb_if = S5H1411_IF_44000,
	88	.qam_if = S5H1411_IF_4000,
	89	.inversion = S5H1411_INVERSION_ON,
	90	.status_mode = S5H1411_DEMODLOCKING,
	91	.mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
	92	};
	93
	94	static struct tda18271_std_map hauppauge_tda18271_std_map = {
	95	.atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
	96	.if_lvl = 6, .rfagc_top = 0x37 },
	97	.qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
	98	.if_lvl = 6, .rfagc_top = 0x37 },
	99	};
	100
	101	static struct tda18271_config hauppauge_tda18271_config = {
	102	.std_map = &hauppauge_tda18271_std_map,
	103	.gate = TDA18271_GATE_DIGITAL,
	104	.output_opt = TDA18271_OUTPUT_LT_OFF,
	105	};
	106
ff861fb2 AW	107	/*
	108	* CX18_CARD_LEADTEK_DVR3100H
	109	*/
8bb09db3 AW	110	/* Information/confirmation of proper config values provided by Terry Wu */
	111	static struct zl10353_config leadtek_dvr3100h_demod = {
	112	.demod_address = 0x1e >> 1, /* Datasheet suggested straps */
	113	.if2 = 45600, /* 4.560 MHz IF from the XC3028 */
	114	.parallel_ts = 1, /* Not a serial TS */
	115	.no_tuner = 1, /* XC3028 is not behind the gate */
	116	.disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */
1c1e45d1	117	};
1c1e45d1	118
ff861fb2 AW	119	/*
	120	* CX18_CARD_YUAN_MPC718
	121	*/
	122	/*
	123	* Due to
	124	*
	125	* 1. an absence of information on how to prgram the MT352
	126	* 2. the Linux mt352 module pushing MT352 initialzation off onto us here
	127	*
	128	* We have to use an init sequence that you must extract from the Windows
	129	* driver (yuanrap.sys) and which we load as a firmware.
	130	*
	131	* If someone can provide me with a Zarlink MT352 (Intel CE6352?) Design Manual
	132	* with chip programming details, then I can remove this annoyance.
	133	*/
	134	static int yuan_mpc718_mt352_reqfw(struct cx18_stream *stream,
	135	const struct firmware **fw)
	136	{
	137	struct cx18 *cx = stream->cx;
	138	const char *fn = "dvb-cx18-mpc718-mt352.fw";
	139	int ret;
	140
	141	ret = request_firmware(fw, fn, &cx->pci_dev->dev);
	142	if (ret)
	143	CX18_ERR("Unable to open firmware file %s\n", fn);
	144	else {
	145	size_t sz = (*fw)->size;
	146	if (sz < 2 \|\| sz > 64 \|\| (sz % 2) != 0) {
	147	CX18_ERR("Firmware %s has a bad size: %lu bytes\n",
	148	fn, (unsigned long) sz);
	149	ret = -EILSEQ;
	150	release_firmware(*fw);
	151	*fw = NULL;
	152	}
	153	}
	154
	155	if (ret) {
	156	CX18_ERR("The MPC718 board variant with the MT352 DVB-T"
	157	"demodualtor will not work without it\n");
	158	CX18_ERR("Run 'linux/Documentation/dvb/get_dvb_firmware "
	159	"mpc718' if you need the firmware\n");
	160	}
	161	return ret;
	162	}
	163
	164	static int yuan_mpc718_mt352_init(struct dvb_frontend *fe)
	165	{
	166	struct cx18_dvb *dvb = container_of(fe->dvb,
	167	struct cx18_dvb, dvb_adapter);
754f9969	168	struct cx18_stream *stream = dvb->stream;
ff861fb2 AW	169	const struct firmware *fw = NULL;
	170	int ret;
	171	int i;
	172	u8 buf[3];
	173
	174	ret = yuan_mpc718_mt352_reqfw(stream, &fw);
	175	if (ret)
	176	return ret;
	177
	178	/* Loop through all the register-value pairs in the firmware file */
	179	for (i = 0; i < fw->size; i += 2) {
	180	buf[0] = fw->data[i];
	181	/* Intercept a few registers we want to set ourselves */
	182	switch (buf[0]) {
	183	case TRL_NOMINAL_RATE_0:
	184	/* Set our custom OFDM bandwidth in the case below */
	185	break;
	186	case TRL_NOMINAL_RATE_1:
	187	/* 6 MHz: 64/7 * 6/8 / 20.48 * 2^16 = 0x55b6.db6 */
	188	/* 7 MHz: 64/7 * 7/8 / 20.48 * 2^16 = 0x6400 */
	189	/* 8 MHz: 64/7 * 8/8 / 20.48 * 2^16 = 0x7249.249 */
	190	buf[1] = 0x72;
	191	buf[2] = 0x49;
	192	mt352_write(fe, buf, 3);
	193	break;
	194	case INPUT_FREQ_0:
	195	/* Set our custom IF in the case below */
	196	break;
	197	case INPUT_FREQ_1:
	198	/* 4.56 MHz IF: (20.48 - 4.56)/20.48 * 2^14 = 0x31c0 */
	199	buf[1] = 0x31;
	200	buf[2] = 0xc0;
	201	mt352_write(fe, buf, 3);
	202	break;
	203	default:
	204	/* Pass through the register-value pair from the fw */
	205	buf[1] = fw->data[i+1];
	206	mt352_write(fe, buf, 2);
	207	break;
	208	}
	209	}
	210
	211	buf[0] = (u8) TUNER_GO;
	212	buf[1] = 0x01; /* Go */
	213	mt352_write(fe, buf, 2);
	214	release_firmware(fw);
	215	return 0;
	216	}
	217
	218	static struct mt352_config yuan_mpc718_mt352_demod = {
	219	.demod_address = 0x1e >> 1,
	220	.adc_clock = 20480, /* 20.480 MHz */
	221	.if2 = 4560, /* 4.560 MHz */
	222	.no_tuner = 1, /* XC3028 is not behind the gate */
	223	.demod_init = yuan_mpc718_mt352_init,
	224	};
	225
	226	static struct zl10353_config yuan_mpc718_zl10353_demod = {
	227	.demod_address = 0x1e >> 1, /* Datasheet suggested straps */
	228	.if2 = 45600, /* 4.560 MHz IF from the XC3028 */
	229	.parallel_ts = 1, /* Not a serial TS */
	230	.no_tuner = 1, /* XC3028 is not behind the gate */
	231	.disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */
	232	};
233
a3634363 AC	234	static struct zl10353_config gotview_dvd3_zl10353_demod = {
	235	.demod_address = 0x1e >> 1, /* Datasheet suggested straps */
	236	.if2 = 45600, /* 4.560 MHz IF from the XC3028 */
	237	.parallel_ts = 1, /* Not a serial TS */
	238	.no_tuner = 1, /* XC3028 is not behind the gate */
	239	.disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */
	240	};
	241
1c1e45d1 HV	242	static int dvb_register(struct cx18_stream *stream);
	243
	244	/* Kernel DVB framework calls this when the feed needs to start.
	245	* The CX18 framework should enable the transport DMA handling
	246	* and queue processing.
	247	*/
	248	static int cx18_dvb_start_feed(struct dvb_demux_feed *feed)
	249	{
	250	struct dvb_demux *demux = feed->demux;
	251	struct cx18_stream stream = (struct cx18_stream ) demux->priv;
e34d375a	252	struct cx18 *cx;
08cf7b2e	253	int ret;
1c1e45d1 HV	254	u32 v;
1c1e45d1 HV	255
e34d375a JS	256	if (!stream)
	257	return -EINVAL;
	258
	259	cx = stream->cx;
1c1e45d1 HV	260	CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n",
1c1e45d1 HV	261	feed->pid, feed->index);
08cf7b2e AW	262
	263	mutex_lock(&cx->serialize_lock);
	264	ret = cx18_init_on_first_open(cx);
	265	mutex_unlock(&cx->serialize_lock);
	266	if (ret) {
	267	CX18_ERR("Failed to initialize firmware starting DVB feed\n");
	268	return ret;
	269	}
	270	ret = -EINVAL;
	271
1c1e45d1 HV	272	switch (cx->card->type) {
	273	case CX18_CARD_HVR_1600_ESMT:
	274	case CX18_CARD_HVR_1600_SAMSUNG:
e3bfeabb	275	case CX18_CARD_HVR_1600_S5H1411:
b1526421	276	v = cx18_read_reg(cx, CX18_REG_DMUX_NUM_PORT_0_CONTROL);
1c1e45d1 HV	277	v \|= 0x00400000; /* Serial Mode */
	278	v \|= 0x00002000; /* Data Length - Byte */
	279	v \|= 0x00010000; /* Error - Polarity */
	280	v \|= 0x00020000; /* Error - Passthru */
	281	v \|= 0x000c0000; /* Error - Ignore */
b1526421	282	cx18_write_reg(cx, v, CX18_REG_DMUX_NUM_PORT_0_CONTROL);
1c1e45d1 HV	283	break;
1c1e45d1 HV	284
8bb09db3	285	case CX18_CARD_LEADTEK_DVR3100H:
ff861fb2	286	case CX18_CARD_YUAN_MPC718:
a3634363	287	case CX18_CARD_GOTVIEW_PCI_DVD3:
1c1e45d1 HV	288	default:
	289	/* Assumption - Parallel transport - Signalling
	290	* undefined or default.
	291	*/
	292	break;
	293	}
	294
	295	if (!demux->dmx.frontend)
	296	return -EINVAL;
	297
754f9969 AW	298	mutex_lock(&stream->dvb->feedlock);
754f9969 AW	299	if (stream->dvb->feeding++ == 0) {
f68d0cf5	300	CX18_DEBUG_INFO("Starting Transport DMA\n");
6adb21c8	301	mutex_lock(&cx->serialize_lock);
f68d0cf5 AW	302	set_bit(CX18_F_S_STREAMING, &stream->s_flags);
	303	ret = cx18_start_v4l2_encode_stream(stream);
	304	if (ret < 0) {
	305	CX18_DEBUG_INFO("Failed to start Transport DMA\n");
754f9969 AW	306	stream->dvb->feeding--;
754f9969 AW	307	if (stream->dvb->feeding == 0)
f68d0cf5 AW	308	clear_bit(CX18_F_S_STREAMING, &stream->s_flags);
f68d0cf5 AW	309	}
6adb21c8	310	mutex_unlock(&cx->serialize_lock);
f68d0cf5 AW	311	} else
f68d0cf5 AW	312	ret = 0;
754f9969	313	mutex_unlock(&stream->dvb->feedlock);
1c1e45d1 HV	314
	315	return ret;
	316	}
	317
	318	/* Kernel DVB framework calls this when the feed needs to stop. */
	319	static int cx18_dvb_stop_feed(struct dvb_demux_feed *feed)
	320	{
	321	struct dvb_demux *demux = feed->demux;
	322	struct cx18_stream stream = (struct cx18_stream )demux->priv;
e34d375a	323	struct cx18 *cx;
1c1e45d1 HV	324	int ret = -EINVAL;
1c1e45d1 HV	325
1c1e45d1	326	if (stream) {
e34d375a JS	327	cx = stream->cx;
	328	CX18_DEBUG_INFO("Stop feed: pid = 0x%x index = %d\n",
	329	feed->pid, feed->index);
	330
754f9969 AW	331	mutex_lock(&stream->dvb->feedlock);
754f9969 AW	332	if (--stream->dvb->feeding == 0) {
1c1e45d1	333	CX18_DEBUG_INFO("Stopping Transport DMA\n");
6adb21c8	334	mutex_lock(&cx->serialize_lock);
1c1e45d1	335	ret = cx18_stop_v4l2_encode_stream(stream, 0);
6adb21c8	336	mutex_unlock(&cx->serialize_lock);
1c1e45d1 HV	337	} else
1c1e45d1 HV	338	ret = 0;
754f9969	339	mutex_unlock(&stream->dvb->feedlock);
1c1e45d1 HV	340	}
	341
	342	return ret;
	343	}
	344
	345	int cx18_dvb_register(struct cx18_stream *stream)
	346	{
	347	struct cx18 *cx = stream->cx;
754f9969	348	struct cx18_dvb *dvb = stream->dvb;
1c1e45d1 HV	349	struct dvb_adapter *dvb_adapter;
	350	struct dvb_demux *dvbdemux;
	351	struct dmx_demux *dmx;
	352	int ret;
	353
	354	if (!dvb)
	355	return -EINVAL;
	356
754f9969 AW	357	dvb->enabled = 0;
	358	dvb->stream = stream;
	359
1c1e45d1 HV	360	ret = dvb_register_adapter(&dvb->dvb_adapter,
1c1e45d1 HV	361	CX18_DRIVER_NAME,
3d05913d	362	THIS_MODULE, &cx->pci_dev->dev, adapter_nr);
1c1e45d1 HV	363	if (ret < 0)
	364	goto err_out;
	365
	366	dvb_adapter = &dvb->dvb_adapter;
	367
	368	dvbdemux = &dvb->demux;
	369
	370	dvbdemux->priv = (void *)stream;
	371
	372	dvbdemux->filternum = 256;
	373	dvbdemux->feednum = 256;
	374	dvbdemux->start_feed = cx18_dvb_start_feed;
	375	dvbdemux->stop_feed = cx18_dvb_stop_feed;
	376	dvbdemux->dmx.capabilities = (DMX_TS_FILTERING \|
	377	DMX_SECTION_FILTERING \| DMX_MEMORY_BASED_FILTERING);
	378	ret = dvb_dmx_init(dvbdemux);
	379	if (ret < 0)
	380	goto err_dvb_unregister_adapter;
	381
	382	dmx = &dvbdemux->dmx;
	383
	384	dvb->hw_frontend.source = DMX_FRONTEND_0;
	385	dvb->mem_frontend.source = DMX_MEMORY_FE;
	386	dvb->dmxdev.filternum = 256;
	387	dvb->dmxdev.demux = dmx;
	388
	389	ret = dvb_dmxdev_init(&dvb->dmxdev, dvb_adapter);
	390	if (ret < 0)
	391	goto err_dvb_dmx_release;
	392
	393	ret = dmx->add_frontend(dmx, &dvb->hw_frontend);
	394	if (ret < 0)
	395	goto err_dvb_dmxdev_release;
	396
	397	ret = dmx->add_frontend(dmx, &dvb->mem_frontend);
	398	if (ret < 0)
	399	goto err_remove_hw_frontend;
	400
	401	ret = dmx->connect_frontend(dmx, &dvb->hw_frontend);
	402	if (ret < 0)
	403	goto err_remove_mem_frontend;
	404
	405	ret = dvb_register(stream);
	406	if (ret < 0)
	407	goto err_disconnect_frontend;
	408
	409	dvb_net_init(dvb_adapter, &dvb->dvbnet, dmx);
	410
	411	CX18_INFO("DVB Frontend registered\n");
22dce188	412	CX18_INFO("Registered DVB adapter%d for %s (%d x %d.%02d kB)\n",
754f9969	413	stream->dvb->dvb_adapter.num, stream->name,
22dce188 AW	414	stream->buffers, stream->buf_size/1024,
22dce188 AW	415	(stream->buf_size * 100 / 1024) % 100);
6ecd86dc	416
1c1e45d1 HV	417	mutex_init(&dvb->feedlock);
	418	dvb->enabled = 1;
	419	return ret;
	420
	421	err_disconnect_frontend:
	422	dmx->disconnect_frontend(dmx);
	423	err_remove_mem_frontend:
	424	dmx->remove_frontend(dmx, &dvb->mem_frontend);
	425	err_remove_hw_frontend:
	426	dmx->remove_frontend(dmx, &dvb->hw_frontend);
	427	err_dvb_dmxdev_release:
	428	dvb_dmxdev_release(&dvb->dmxdev);
	429	err_dvb_dmx_release:
	430	dvb_dmx_release(dvbdemux);
	431	err_dvb_unregister_adapter:
	432	dvb_unregister_adapter(dvb_adapter);
	433	err_out:
	434	return ret;
	435	}
	436
	437	void cx18_dvb_unregister(struct cx18_stream *stream)
	438	{
	439	struct cx18 *cx = stream->cx;
754f9969	440	struct cx18_dvb *dvb = stream->dvb;
1c1e45d1 HV	441	struct dvb_adapter *dvb_adapter;
	442	struct dvb_demux *dvbdemux;
	443	struct dmx_demux *dmx;
	444
	445	CX18_INFO("unregister DVB\n");
	446
754f9969 AW	447	if (dvb == NULL \|\| !dvb->enabled)
	448	return;
	449
1c1e45d1 HV	450	dvb_adapter = &dvb->dvb_adapter;
	451	dvbdemux = &dvb->demux;
	452	dmx = &dvbdemux->dmx;
	453
	454	dmx->close(dmx);
	455	dvb_net_release(&dvb->dvbnet);
	456	dmx->remove_frontend(dmx, &dvb->mem_frontend);
	457	dmx->remove_frontend(dmx, &dvb->hw_frontend);
	458	dvb_dmxdev_release(&dvb->dmxdev);
	459	dvb_dmx_release(dvbdemux);
	460	dvb_unregister_frontend(dvb->fe);
	461	dvb_frontend_detach(dvb->fe);
	462	dvb_unregister_adapter(dvb_adapter);
	463	}
	464
	465	/* All the DVB attach calls go here, this function get's modified
8bb09db3	466	* for each new card. cx18_dvb_start_feed() will also need changes.
1c1e45d1 HV	467	*/
	468	static int dvb_register(struct cx18_stream *stream)
	469	{
754f9969	470	struct cx18_dvb *dvb = stream->dvb;
1c1e45d1 HV	471	struct cx18 *cx = stream->cx;
	472	int ret = 0;
	473
	474	switch (cx->card->type) {
1c1e45d1 HV	475	case CX18_CARD_HVR_1600_ESMT:
	476	case CX18_CARD_HVR_1600_SAMSUNG:
	477	dvb->fe = dvb_attach(s5h1409_attach,
	478	&hauppauge_hvr1600_config,
	479	&cx->i2c_adap[0]);
	480	if (dvb->fe != NULL) {
67129471 ST	481	dvb_attach(mxl5005s_attach, dvb->fe,
	482	&cx->i2c_adap[0],
	483	&hauppauge_hvr1600_tuner);
1c1e45d1 HV	484	ret = 0;
	485	}
	486	break;
e3bfeabb DH	487	case CX18_CARD_HVR_1600_S5H1411:
	488	dvb->fe = dvb_attach(s5h1411_attach,
	489	&hcw_s5h1411_config,
	490	&cx->i2c_adap[0]);
	491	if (dvb->fe != NULL)
	492	dvb_attach(tda18271_attach, dvb->fe,
	493	0x60, &cx->i2c_adap[0],
	494	&hauppauge_tda18271_config);
	495	break;
8bb09db3 AW	496	case CX18_CARD_LEADTEK_DVR3100H:
	497	dvb->fe = dvb_attach(zl10353_attach,
	498	&leadtek_dvr3100h_demod,
	499	&cx->i2c_adap[1]);
	500	if (dvb->fe != NULL) {
	501	struct dvb_frontend *fe;
	502	struct xc2028_config cfg = {
	503	.i2c_adap = &cx->i2c_adap[1],
	504	.i2c_addr = 0xc2 >> 1,
	505	.ctrl = NULL,
	506	};
	507	static struct xc2028_ctrl ctrl = {
	508	.fname = XC2028_DEFAULT_FIRMWARE,
ff861fb2 AW	509	.max_len = 64,
	510	.demod = XC3028_FE_ZARLINK456,
	511	.type = XC2028_AUTO,
	512	};
	513
	514	fe = dvb_attach(xc2028_attach, dvb->fe, &cfg);
	515	if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
	516	fe->ops.tuner_ops.set_config(fe, &ctrl);
	517	}
	518	break;
	519	case CX18_CARD_YUAN_MPC718:
	520	/*
	521	* TODO
	522	* Apparently, these cards also could instead have a
	523	* DiBcom demod supported by one of the db7000 drivers
	524	*/
	525	dvb->fe = dvb_attach(mt352_attach,
	526	&yuan_mpc718_mt352_demod,
	527	&cx->i2c_adap[1]);
	528	if (dvb->fe == NULL)
	529	dvb->fe = dvb_attach(zl10353_attach,
	530	&yuan_mpc718_zl10353_demod,
	531	&cx->i2c_adap[1]);
	532	if (dvb->fe != NULL) {
	533	struct dvb_frontend *fe;
	534	struct xc2028_config cfg = {
	535	.i2c_adap = &cx->i2c_adap[1],
	536	.i2c_addr = 0xc2 >> 1,
	537	.ctrl = NULL,
	538	};
	539	static struct xc2028_ctrl ctrl = {
	540	.fname = XC2028_DEFAULT_FIRMWARE,
a3634363 AC	541	.max_len = 64,
	542	.demod = XC3028_FE_ZARLINK456,
	543	.type = XC2028_AUTO,
	544	};
	545
	546	fe = dvb_attach(xc2028_attach, dvb->fe, &cfg);
	547	if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
	548	fe->ops.tuner_ops.set_config(fe, &ctrl);
	549	}
	550	break;
	551	case CX18_CARD_GOTVIEW_PCI_DVD3:
	552	dvb->fe = dvb_attach(zl10353_attach,
	553	&gotview_dvd3_zl10353_demod,
	554	&cx->i2c_adap[1]);
	555	if (dvb->fe != NULL) {
	556	struct dvb_frontend *fe;
	557	struct xc2028_config cfg = {
	558	.i2c_adap = &cx->i2c_adap[1],
	559	.i2c_addr = 0xc2 >> 1,
	560	.ctrl = NULL,
	561	};
	562	static struct xc2028_ctrl ctrl = {
	563	.fname = XC2028_DEFAULT_FIRMWARE,
8bb09db3 AW	564	.max_len = 64,
	565	.demod = XC3028_FE_ZARLINK456,
	566	.type = XC2028_AUTO,
	567	};
	568
	569	fe = dvb_attach(xc2028_attach, dvb->fe, &cfg);
	570	if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
	571	fe->ops.tuner_ops.set_config(fe, &ctrl);
	572	}
	573	break;
1c1e45d1 HV	574	default:
	575	/* No Digital Tv Support */
	576	break;
	577	}
	578
	579	if (dvb->fe == NULL) {
	580	CX18_ERR("frontend initialization failed\n");
	581	return -1;
	582	}
	583
8bb09db3 AW	584	dvb->fe->callback = cx18_reset_tuner_gpio;
8bb09db3 AW	585
1c1e45d1 HV	586	ret = dvb_register_frontend(&dvb->dvb_adapter, dvb->fe);
	587	if (ret < 0) {
	588	if (dvb->fe->ops.release)
	589	dvb->fe->ops.release(dvb->fe);
	590	return ret;
	591	}
	592
8bb09db3 AW	593	/*
	594	* The firmware seems to enable the TS DMUX clock
	595	* under various circumstances. However, since we know we
	596	* might use it, let's just turn it on ourselves here.
	597	*/
	598	cx18_write_reg_expect(cx,
	599	(CX18_DMUX_CLK_MASK << 16) \| CX18_DMUX_CLK_MASK,
	600	CX18_CLOCK_ENABLE2,
	601	CX18_DMUX_CLK_MASK,
	602	(CX18_DMUX_CLK_MASK << 16) \| CX18_DMUX_CLK_MASK);
	603
1c1e45d1 HV	604	return ret;
1c1e45d1 HV	605	}