[media] v4l2-ctrls: add a filter function to v4l2_ctrl_add_handler
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / platform / s5p-fimc / fimc-capture.c
CommitLineData
5f3cc447 1/*
3a3f9449 2 * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
5f3cc447 3 *
0c9204d3
SN
4 * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
5 * Sylwester Nawrocki <s.nawrocki@samsung.com>
5f3cc447
SN
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
5f3cc447
SN
14#include <linux/types.h>
15#include <linux/errno.h>
16#include <linux/bug.h>
17#include <linux/interrupt.h>
18#include <linux/device.h>
e9e21083 19#include <linux/pm_runtime.h>
5f3cc447
SN
20#include <linux/list.h>
21#include <linux/slab.h>
5f3cc447
SN
22
23#include <linux/videodev2.h>
24#include <media/v4l2-device.h>
25#include <media/v4l2-ioctl.h>
26#include <media/v4l2-mem2mem.h>
2dab38e2
SN
27#include <media/videobuf2-core.h>
28#include <media/videobuf2-dma-contig.h>
5f3cc447 29
131b6c61 30#include "fimc-mdevice.h"
5f3cc447 31#include "fimc-core.h"
c83a1ff0 32#include "fimc-reg.h"
5f3cc447 33
bb7c276e 34static int fimc_capture_hw_init(struct fimc_dev *fimc)
9e803a04
SN
35{
36 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
0f735f52 37 struct fimc_pipeline *p = &fimc->pipeline;
9e803a04
SN
38 struct fimc_sensor_info *sensor;
39 unsigned long flags;
40 int ret = 0;
41
0f735f52 42 if (p->subdevs[IDX_SENSOR] == NULL || ctx == NULL)
9e803a04
SN
43 return -ENXIO;
44 if (ctx->s_frame.fmt == NULL)
45 return -EINVAL;
46
0f735f52 47 sensor = v4l2_get_subdev_hostdata(p->subdevs[IDX_SENSOR]);
9e803a04
SN
48
49 spin_lock_irqsave(&fimc->slock, flags);
50 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
51 fimc_set_yuv_order(ctx);
52
53 fimc_hw_set_camera_polarity(fimc, sensor->pdata);
54 fimc_hw_set_camera_type(fimc, sensor->pdata);
55 fimc_hw_set_camera_source(fimc, sensor->pdata);
56 fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
57
58 ret = fimc_set_scaler_info(ctx);
59 if (!ret) {
60 fimc_hw_set_input_path(ctx);
61 fimc_hw_set_prescaler(ctx);
62 fimc_hw_set_mainscaler(ctx);
63 fimc_hw_set_target_format(ctx);
64 fimc_hw_set_rotation(ctx);
9448ab7d 65 fimc_hw_set_effect(ctx);
9e803a04
SN
66 fimc_hw_set_output_path(ctx);
67 fimc_hw_set_out_dma(ctx);
dafb9c70
SN
68 if (fimc->variant->has_alpha)
69 fimc_hw_set_rgb_alpha(ctx);
237e0265 70 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
9e803a04
SN
71 }
72 spin_unlock_irqrestore(&fimc->slock, flags);
73 return ret;
74}
75
bb7c276e
SN
76/*
77 * Reinitialize the driver so it is ready to start the streaming again.
78 * Set fimc->state to indicate stream off and the hardware shut down state.
79 * If not suspending (@suspend is false), return any buffers to videobuf2.
80 * Otherwise put any owned buffers onto the pending buffers queue, so they
81 * can be re-spun when the device is being resumed. Also perform FIMC
82 * software reset and disable streaming on the whole pipeline if required.
83 */
3e4748d8 84static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
5f3cc447 85{
bd323e28 86 struct fimc_vid_cap *cap = &fimc->vid_cap;
2dab38e2 87 struct fimc_vid_buffer *buf;
bd323e28 88 unsigned long flags;
3e4748d8 89 bool streaming;
5f3cc447
SN
90
91 spin_lock_irqsave(&fimc->slock, flags);
3e4748d8 92 streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
5f3cc447 93
3e4748d8
SN
94 fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
95 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
aa333122
SN
96 if (suspend)
97 fimc->state |= (1 << ST_CAPT_SUSPENDED);
98 else
3e4748d8 99 fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
2dab38e2 100
3e4748d8
SN
101 /* Release unused buffers */
102 while (!suspend && !list_empty(&cap->pending_buf_q)) {
0295202c 103 buf = fimc_pending_queue_pop(cap);
2dab38e2
SN
104 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
105 }
3e4748d8 106 /* If suspending put unused buffers onto pending queue */
2dab38e2 107 while (!list_empty(&cap->active_buf_q)) {
0295202c 108 buf = fimc_active_queue_pop(cap);
3e4748d8
SN
109 if (suspend)
110 fimc_pending_queue_add(cap, buf);
111 else
112 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
2dab38e2 113 }
2c1bb62e
SN
114
115 fimc_hw_reset(fimc);
116 cap->buf_index = 0;
117
5f3cc447 118 spin_unlock_irqrestore(&fimc->slock, flags);
4db5e27e 119
3e4748d8 120 if (streaming)
0f735f52 121 return fimc_pipeline_s_stream(&fimc->pipeline, 0);
4db5e27e
SN
122 else
123 return 0;
bd323e28
MS
124}
125
3e4748d8 126static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
bd323e28 127{
bd323e28
MS
128 unsigned long flags;
129
130 if (!fimc_capture_active(fimc))
131 return 0;
132
133 spin_lock_irqsave(&fimc->slock, flags);
134 set_bit(ST_CAPT_SHUT, &fimc->state);
135 fimc_deactivate_capture(fimc);
136 spin_unlock_irqrestore(&fimc->slock, flags);
137
138 wait_event_timeout(fimc->irq_queue,
139 !test_bit(ST_CAPT_SHUT, &fimc->state),
3e4748d8 140 (2*HZ/10)); /* 200 ms */
5f3cc447 141
3e4748d8 142 return fimc_capture_state_cleanup(fimc, suspend);
5f3cc447
SN
143}
144
237e0265
SN
145/**
146 * fimc_capture_config_update - apply the camera interface configuration
147 *
148 * To be called from within the interrupt handler with fimc.slock
149 * spinlock held. It updates the camera pixel crop, rotation and
150 * image flip in H/W.
151 */
97d97422 152static int fimc_capture_config_update(struct fimc_ctx *ctx)
237e0265
SN
153{
154 struct fimc_dev *fimc = ctx->fimc_dev;
155 int ret;
156
237e0265 157 fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
efb13c3d 158
237e0265 159 ret = fimc_set_scaler_info(ctx);
efb13c3d
SN
160 if (ret)
161 return ret;
162
163 fimc_hw_set_prescaler(ctx);
164 fimc_hw_set_mainscaler(ctx);
165 fimc_hw_set_target_format(ctx);
166 fimc_hw_set_rotation(ctx);
9448ab7d 167 fimc_hw_set_effect(ctx);
efb13c3d
SN
168 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
169 fimc_hw_set_out_dma(ctx);
170 if (fimc->variant->has_alpha)
171 fimc_hw_set_rgb_alpha(ctx);
172
173 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
237e0265
SN
174 return ret;
175}
bd323e28 176
97d97422
SN
177void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
178{
179 struct fimc_vid_cap *cap = &fimc->vid_cap;
180 struct fimc_vid_buffer *v_buf;
181 struct timeval *tv;
182 struct timespec ts;
183
184 if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
185 wake_up(&fimc->irq_queue);
186 goto done;
187 }
188
189 if (!list_empty(&cap->active_buf_q) &&
190 test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
191 ktime_get_real_ts(&ts);
192
193 v_buf = fimc_active_queue_pop(cap);
194
195 tv = &v_buf->vb.v4l2_buf.timestamp;
196 tv->tv_sec = ts.tv_sec;
197 tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
198 v_buf->vb.v4l2_buf.sequence = cap->frame_count++;
199
200 vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
201 }
202
203 if (!list_empty(&cap->pending_buf_q)) {
204
205 v_buf = fimc_pending_queue_pop(cap);
206 fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
207 v_buf->index = cap->buf_index;
208
209 /* Move the buffer to the capture active queue */
210 fimc_active_queue_add(cap, v_buf);
211
212 dbg("next frame: %d, done frame: %d",
213 fimc_hw_get_frame_index(fimc), v_buf->index);
214
215 if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
216 cap->buf_index = 0;
217 }
218
219 if (cap->active_buf_cnt == 0) {
220 if (deq_buf)
221 clear_bit(ST_CAPT_RUN, &fimc->state);
222
223 if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
224 cap->buf_index = 0;
225 } else {
226 set_bit(ST_CAPT_RUN, &fimc->state);
227 }
228
bb7c276e
SN
229 if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
230 fimc_capture_config_update(cap->ctx);
97d97422
SN
231done:
232 if (cap->active_buf_cnt == 1) {
233 fimc_deactivate_capture(fimc);
234 clear_bit(ST_CAPT_STREAM, &fimc->state);
235 }
236
237 dbg("frame: %d, active_buf_cnt: %d",
238 fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
239}
240
241
bd323e28 242static int start_streaming(struct vb2_queue *q, unsigned int count)
2dab38e2
SN
243{
244 struct fimc_ctx *ctx = q->drv_priv;
245 struct fimc_dev *fimc = ctx->fimc_dev;
9e803a04 246 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
bd323e28 247 int min_bufs;
2dab38e2
SN
248 int ret;
249
9e803a04 250 vid_cap->frame_count = 0;
8ec737ff 251
bb7c276e
SN
252 ret = fimc_capture_hw_init(fimc);
253 if (ret) {
254 fimc_capture_state_cleanup(fimc, false);
255 return ret;
256 }
2dab38e2 257
2dab38e2
SN
258 set_bit(ST_CAPT_PEND, &fimc->state);
259
bd323e28
MS
260 min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
261
4db5e27e
SN
262 if (vid_cap->active_buf_cnt >= min_bufs &&
263 !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
bd323e28
MS
264 fimc_activate_capture(ctx);
265
4db5e27e 266 if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
0f735f52 267 fimc_pipeline_s_stream(&fimc->pipeline, 1);
4db5e27e
SN
268 }
269
2dab38e2
SN
270 return 0;
271}
272
273static int stop_streaming(struct vb2_queue *q)
274{
275 struct fimc_ctx *ctx = q->drv_priv;
276 struct fimc_dev *fimc = ctx->fimc_dev;
2dab38e2 277
4ecbf5d1 278 if (!fimc_capture_active(fimc))
2dab38e2 279 return -EINVAL;
2dab38e2 280
3e4748d8 281 return fimc_stop_capture(fimc, false);
2dab38e2
SN
282}
283
e9e21083
SN
284int fimc_capture_suspend(struct fimc_dev *fimc)
285{
3e4748d8
SN
286 bool suspend = fimc_capture_busy(fimc);
287
288 int ret = fimc_stop_capture(fimc, suspend);
289 if (ret)
290 return ret;
0f735f52 291 return fimc_pipeline_shutdown(&fimc->pipeline);
e9e21083
SN
292}
293
3e4748d8
SN
294static void buffer_queue(struct vb2_buffer *vb);
295
e9e21083
SN
296int fimc_capture_resume(struct fimc_dev *fimc)
297{
3e4748d8
SN
298 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
299 struct fimc_vid_buffer *buf;
300 int i;
301
302 if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
303 return 0;
304
305 INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
306 vid_cap->buf_index = 0;
31d34d9b 307 fimc_pipeline_initialize(&fimc->pipeline, &vid_cap->vfd.entity,
3e4748d8 308 false);
bb7c276e 309 fimc_capture_hw_init(fimc);
3e4748d8
SN
310
311 clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
312
313 for (i = 0; i < vid_cap->reqbufs_count; i++) {
314 if (list_empty(&vid_cap->pending_buf_q))
315 break;
316 buf = fimc_pending_queue_pop(vid_cap);
317 buffer_queue(&buf->vb);
318 }
e9e21083 319 return 0;
3e4748d8 320
e9e21083
SN
321}
322
63746be5 323static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
fc714e70
GL
324 unsigned int *num_buffers, unsigned int *num_planes,
325 unsigned int sizes[], void *allocators[])
2dab38e2 326{
63746be5 327 const struct v4l2_pix_format_mplane *pixm = NULL;
2dab38e2 328 struct fimc_ctx *ctx = vq->drv_priv;
63746be5
SN
329 struct fimc_frame *frame = &ctx->d_frame;
330 struct fimc_fmt *fmt = frame->fmt;
331 unsigned long wh;
ef7af59b 332 int i;
2dab38e2 333
63746be5
SN
334 if (pfmt) {
335 pixm = &pfmt->fmt.pix_mp;
336 fmt = fimc_find_format(&pixm->pixelformat, NULL,
337 FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);
338 wh = pixm->width * pixm->height;
339 } else {
340 wh = frame->f_width * frame->f_height;
341 }
342
343 if (fmt == NULL)
2dab38e2
SN
344 return -EINVAL;
345
ef7af59b 346 *num_planes = fmt->memplanes;
2dab38e2 347
ef7af59b 348 for (i = 0; i < fmt->memplanes; i++) {
63746be5
SN
349 unsigned int size = (wh * fmt->depth[i]) / 8;
350 if (pixm)
351 sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
352 else
d547ab66
SN
353 sizes[i] = max_t(u32, size, frame->payload[i]);
354
ef7af59b
SN
355 allocators[i] = ctx->fimc_dev->alloc_ctx;
356 }
2dab38e2 357
ef7af59b 358 return 0;
2dab38e2
SN
359}
360
2dab38e2
SN
361static int buffer_prepare(struct vb2_buffer *vb)
362{
363 struct vb2_queue *vq = vb->vb2_queue;
364 struct fimc_ctx *ctx = vq->drv_priv;
2dab38e2
SN
365 int i;
366
4db5e27e 367 if (ctx->d_frame.fmt == NULL)
ef7af59b 368 return -EINVAL;
2dab38e2 369
ef7af59b 370 for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
4db5e27e 371 unsigned long size = ctx->d_frame.payload[i];
2dab38e2
SN
372
373 if (vb2_plane_size(vb, i) < size) {
31d34d9b 374 v4l2_err(&ctx->fimc_dev->vid_cap.vfd,
30c9939d 375 "User buffer too small (%ld < %ld)\n",
2dab38e2
SN
376 vb2_plane_size(vb, i), size);
377 return -EINVAL;
378 }
2dab38e2
SN
379 vb2_set_plane_payload(vb, i, size);
380 }
381
382 return 0;
383}
384
385static void buffer_queue(struct vb2_buffer *vb)
386{
2dab38e2
SN
387 struct fimc_vid_buffer *buf
388 = container_of(vb, struct fimc_vid_buffer, vb);
4db5e27e
SN
389 struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
390 struct fimc_dev *fimc = ctx->fimc_dev;
2dab38e2
SN
391 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
392 unsigned long flags;
8ec737ff 393 int min_bufs;
2dab38e2
SN
394
395 spin_lock_irqsave(&fimc->slock, flags);
8ec737ff
SK
396 fimc_prepare_addr(ctx, &buf->vb, &ctx->d_frame, &buf->paddr);
397
3e4748d8
SN
398 if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
399 !test_bit(ST_CAPT_STREAM, &fimc->state) &&
400 vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
8ec737ff
SK
401 /* Setup the buffer directly for processing. */
402 int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
403 vid_cap->buf_index;
2dab38e2 404
8ec737ff
SK
405 fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
406 buf->index = vid_cap->buf_index;
0295202c 407 fimc_active_queue_add(vid_cap, buf);
2dab38e2 408
8ec737ff
SK
409 if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
410 vid_cap->buf_index = 0;
411 } else {
412 fimc_pending_queue_add(vid_cap, buf);
2dab38e2 413 }
8ec737ff
SK
414
415 min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
416
4db5e27e 417
bd323e28
MS
418 if (vb2_is_streaming(&vid_cap->vbq) &&
419 vid_cap->active_buf_cnt >= min_bufs &&
4db5e27e 420 !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
8ec737ff 421 fimc_activate_capture(ctx);
4db5e27e 422 spin_unlock_irqrestore(&fimc->slock, flags);
8ec737ff 423
4db5e27e 424 if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
0f735f52 425 fimc_pipeline_s_stream(&fimc->pipeline, 1);
4db5e27e
SN
426 return;
427 }
2dab38e2
SN
428 spin_unlock_irqrestore(&fimc->slock, flags);
429}
430
431static void fimc_lock(struct vb2_queue *vq)
432{
433 struct fimc_ctx *ctx = vb2_get_drv_priv(vq);
434 mutex_lock(&ctx->fimc_dev->lock);
435}
436
437static void fimc_unlock(struct vb2_queue *vq)
438{
439 struct fimc_ctx *ctx = vb2_get_drv_priv(vq);
440 mutex_unlock(&ctx->fimc_dev->lock);
441}
442
443static struct vb2_ops fimc_capture_qops = {
444 .queue_setup = queue_setup,
445 .buf_prepare = buffer_prepare,
446 .buf_queue = buffer_queue,
2dab38e2
SN
447 .wait_prepare = fimc_unlock,
448 .wait_finish = fimc_lock,
449 .start_streaming = start_streaming,
450 .stop_streaming = stop_streaming,
451};
452
131b6c61
SN
453/**
454 * fimc_capture_ctrls_create - initialize the control handler
455 * Initialize the capture video node control handler and fill it
456 * with the FIMC controls. Inherit any sensor's controls if the
457 * 'user_subdev_api' flag is false (default behaviour).
458 * This function need to be called with the graph mutex held.
459 */
460int fimc_capture_ctrls_create(struct fimc_dev *fimc)
461{
462 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
463 int ret;
464
465 if (WARN_ON(vid_cap->ctx == NULL))
466 return -ENXIO;
9448ab7d 467 if (vid_cap->ctx->ctrls.ready)
131b6c61
SN
468 return 0;
469
470 ret = fimc_ctrls_create(vid_cap->ctx);
9448ab7d 471 if (ret || vid_cap->user_subdev_api || !vid_cap->ctx->ctrls.ready)
131b6c61
SN
472 return ret;
473
9448ab7d 474 return v4l2_ctrl_add_handler(&vid_cap->ctx->ctrls.handler,
34a6b7d0 475 fimc->pipeline.subdevs[IDX_SENSOR]->ctrl_handler, NULL);
131b6c61
SN
476}
477
237e0265
SN
478static int fimc_capture_set_default_format(struct fimc_dev *fimc);
479
5f3cc447
SN
480static int fimc_capture_open(struct file *file)
481{
482 struct fimc_dev *fimc = video_drvdata(file);
c2d430af 483 int ret = -EBUSY;
5f3cc447
SN
484
485 dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
486
c2d430af
SN
487 if (mutex_lock_interruptible(&fimc->lock))
488 return -ERESTARTSYS;
489
5f3cc447 490 if (fimc_m2m_active(fimc))
c2d430af 491 goto unlock;
5f3cc447 492
3e4748d8 493 set_bit(ST_CAPT_BUSY, &fimc->state);
e3fc82e8
SN
494 ret = pm_runtime_get_sync(&fimc->pdev->dev);
495 if (ret < 0)
c2d430af 496 goto unlock;
4db5e27e 497
e3fc82e8 498 ret = v4l2_fh_open(file);
c2d430af
SN
499 if (ret) {
500 pm_runtime_put(&fimc->pdev->dev);
501 goto unlock;
502 }
e3fc82e8 503
c2d430af
SN
504 if (++fimc->vid_cap.refcnt == 1) {
505 ret = fimc_pipeline_initialize(&fimc->pipeline,
31d34d9b 506 &fimc->vid_cap.vfd.entity, true);
e3fc82e8 507
c2d430af
SN
508 if (!ret && !fimc->vid_cap.user_subdev_api)
509 ret = fimc_capture_set_default_format(fimc);
510
511 if (!ret)
512 ret = fimc_capture_ctrls_create(fimc);
e3fc82e8 513
c2d430af
SN
514 if (ret < 0) {
515 clear_bit(ST_CAPT_BUSY, &fimc->state);
516 pm_runtime_put_sync(&fimc->pdev->dev);
517 fimc->vid_cap.refcnt--;
518 v4l2_fh_release(file);
519 }
520 }
521unlock:
522 mutex_unlock(&fimc->lock);
131b6c61 523 return ret;
5f3cc447
SN
524}
525
526static int fimc_capture_close(struct file *file)
527{
528 struct fimc_dev *fimc = video_drvdata(file);
c2d430af 529 int ret;
5f3cc447 530
5f3cc447
SN
531 dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
532
c2d430af
SN
533 if (mutex_lock_interruptible(&fimc->lock))
534 return -ERESTARTSYS;
535
5f3cc447 536 if (--fimc->vid_cap.refcnt == 0) {
3e4748d8
SN
537 clear_bit(ST_CAPT_BUSY, &fimc->state);
538 fimc_stop_capture(fimc, false);
0f735f52 539 fimc_pipeline_shutdown(&fimc->pipeline);
3e4748d8 540 clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
5f3cc447
SN
541 }
542
e9e21083
SN
543 pm_runtime_put(&fimc->pdev->dev);
544
3e4748d8
SN
545 if (fimc->vid_cap.refcnt == 0) {
546 vb2_queue_release(&fimc->vid_cap.vbq);
547 fimc_ctrls_delete(fimc->vid_cap.ctx);
548 }
c2d430af
SN
549
550 ret = v4l2_fh_release(file);
551
552 mutex_unlock(&fimc->lock);
553 return ret;
5f3cc447
SN
554}
555
556static unsigned int fimc_capture_poll(struct file *file,
557 struct poll_table_struct *wait)
558{
e578588e 559 struct fimc_dev *fimc = video_drvdata(file);
c2d430af 560 int ret;
5f3cc447 561
c2d430af
SN
562 if (mutex_lock_interruptible(&fimc->lock))
563 return POLL_ERR;
564
565 ret = vb2_poll(&fimc->vid_cap.vbq, file, wait);
566 mutex_unlock(&fimc->lock);
567
568 return ret;
5f3cc447
SN
569}
570
571static int fimc_capture_mmap(struct file *file, struct vm_area_struct *vma)
572{
e578588e 573 struct fimc_dev *fimc = video_drvdata(file);
c2d430af
SN
574 int ret;
575
576 if (mutex_lock_interruptible(&fimc->lock))
577 return -ERESTARTSYS;
5f3cc447 578
c2d430af
SN
579 ret = vb2_mmap(&fimc->vid_cap.vbq, vma);
580 mutex_unlock(&fimc->lock);
581
582 return ret;
5f3cc447
SN
583}
584
5f3cc447
SN
585static const struct v4l2_file_operations fimc_capture_fops = {
586 .owner = THIS_MODULE,
587 .open = fimc_capture_open,
588 .release = fimc_capture_close,
589 .poll = fimc_capture_poll,
590 .unlocked_ioctl = video_ioctl2,
591 .mmap = fimc_capture_mmap,
592};
593
237e0265
SN
594/*
595 * Format and crop negotiation helpers
596 */
597
598static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
599 u32 *width, u32 *height,
600 u32 *code, u32 *fourcc, int pad)
601{
602 bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
603 struct fimc_dev *fimc = ctx->fimc_dev;
bb7c276e 604 struct fimc_variant *var = fimc->variant;
237e0265
SN
605 struct fimc_pix_limit *pl = var->pix_limit;
606 struct fimc_frame *dst = &ctx->d_frame;
607 u32 depth, min_w, max_w, min_h, align_h = 3;
608 u32 mask = FMT_FLAGS_CAM;
609 struct fimc_fmt *ffmt;
610
611 /* Color conversion from/to JPEG is not supported */
612 if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
613 fimc_fmt_is_jpeg(ctx->s_frame.fmt->color))
614 *code = V4L2_MBUS_FMT_JPEG_1X8;
615
616 if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad != FIMC_SD_PAD_SINK)
617 mask |= FMT_FLAGS_M2M;
618
619 ffmt = fimc_find_format(fourcc, code, mask, 0);
620 if (WARN_ON(!ffmt))
621 return NULL;
622 if (code)
623 *code = ffmt->mbus_code;
624 if (fourcc)
625 *fourcc = ffmt->fourcc;
626
627 if (pad == FIMC_SD_PAD_SINK) {
628 max_w = fimc_fmt_is_jpeg(ffmt->color) ?
629 pl->scaler_dis_w : pl->scaler_en_w;
630 /* Apply the camera input interface pixel constraints */
631 v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
632 height, max_t(u32, *height, 32),
633 FIMC_CAMIF_MAX_HEIGHT,
634 fimc_fmt_is_jpeg(ffmt->color) ? 3 : 1,
635 0);
636 return ffmt;
637 }
638 /* Can't scale or crop in transparent (JPEG) transfer mode */
639 if (fimc_fmt_is_jpeg(ffmt->color)) {
640 *width = ctx->s_frame.f_width;
641 *height = ctx->s_frame.f_height;
642 return ffmt;
643 }
644 /* Apply the scaler and the output DMA constraints */
645 max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
fed07f84
SN
646 if (ctx->state & FIMC_COMPOSE) {
647 min_w = dst->offs_h + dst->width;
648 min_h = dst->offs_v + dst->height;
649 } else {
650 min_w = var->min_out_pixsize;
651 min_h = var->min_out_pixsize;
652 }
9c63afcb 653 if (var->min_vsize_align == 1 && !rotation)
237e0265
SN
654 align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
655
656 depth = fimc_get_format_depth(ffmt);
657 v4l_bound_align_image(width, min_w, max_w,
658 ffs(var->min_out_pixsize) - 1,
659 height, min_h, FIMC_CAMIF_MAX_HEIGHT,
660 align_h,
661 64/(ALIGN(depth, 8)));
662
663 dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
664 pad, code ? *code : 0, *width, *height,
665 dst->f_width, dst->f_height);
666
667 return ffmt;
668}
669
fed07f84
SN
670static void fimc_capture_try_selection(struct fimc_ctx *ctx,
671 struct v4l2_rect *r,
672 int target)
237e0265
SN
673{
674 bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
675 struct fimc_dev *fimc = ctx->fimc_dev;
bb7c276e 676 struct fimc_variant *var = fimc->variant;
237e0265
SN
677 struct fimc_pix_limit *pl = var->pix_limit;
678 struct fimc_frame *sink = &ctx->s_frame;
679 u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
680 u32 align_sz = 0, align_h = 4;
681 u32 max_sc_h, max_sc_v;
682
683 /* In JPEG transparent transfer mode cropping is not supported */
684 if (fimc_fmt_is_jpeg(ctx->d_frame.fmt->color)) {
685 r->width = sink->f_width;
686 r->height = sink->f_height;
687 r->left = r->top = 0;
688 return;
689 }
c1334823 690 if (target == V4L2_SEL_TGT_COMPOSE) {
237e0265
SN
691 if (ctx->rotation != 90 && ctx->rotation != 270)
692 align_h = 1;
693 max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
694 max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
695 min_sz = var->min_out_pixsize;
696 } else {
697 u32 depth = fimc_get_format_depth(sink->fmt);
698 align_sz = 64/ALIGN(depth, 8);
699 min_sz = var->min_inp_pixsize;
700 min_w = min_h = min_sz;
701 max_sc_h = max_sc_v = 1;
702 }
703 /*
fed07f84 704 * For the compose rectangle the following constraints must be met:
237e0265
SN
705 * - it must fit in the sink pad format rectangle (f_width/f_height);
706 * - maximum downscaling ratio is 64;
707 * - maximum crop size depends if the rotator is used or not;
708 * - the sink pad format width/height must be 4 multiple of the
709 * prescaler ratios determined by sink pad size and source pad crop,
710 * the prescaler ratio is returned by fimc_get_scaler_factor().
711 */
712 max_w = min_t(u32,
713 rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
714 rotate ? sink->f_height : sink->f_width);
715 max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
fed07f84 716
c1334823 717 if (target == V4L2_SEL_TGT_COMPOSE) {
237e0265
SN
718 min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
719 min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
720 if (rotate) {
721 swap(max_sc_h, max_sc_v);
722 swap(min_w, min_h);
723 }
724 }
725 v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
726 &r->height, min_h, max_h, align_h,
727 align_sz);
fed07f84 728 /* Adjust left/top if crop/compose rectangle is out of bounds */
237e0265
SN
729 r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
730 r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
731 r->left = round_down(r->left, var->hor_offs_align);
732
fed07f84
SN
733 dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
734 target, r->left, r->top, r->width, r->height,
237e0265
SN
735 sink->f_width, sink->f_height);
736}
737
738/*
739 * The video node ioctl operations
740 */
5f3cc447
SN
741static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
742 struct v4l2_capability *cap)
743{
e578588e 744 struct fimc_dev *fimc = video_drvdata(file);
5f3cc447
SN
745
746 strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1);
747 strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1);
748 cap->bus_info[0] = 0;
8f401543 749 cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
5f3cc447
SN
750
751 return 0;
752}
753
cf52df8a
SN
754static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
755 struct v4l2_fmtdesc *f)
756{
757 struct fimc_fmt *fmt;
758
759 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
760 f->index);
761 if (!fmt)
762 return -EINVAL;
763 strncpy(f->description, fmt->name, sizeof(f->description) - 1);
764 f->pixelformat = fmt->fourcc;
765 if (fmt->fourcc == V4L2_MBUS_FMT_JPEG_1X8)
766 f->flags |= V4L2_FMT_FLAG_COMPRESSED;
767 return 0;
768}
769
237e0265
SN
770/**
771 * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
772 * elements
773 * @ctx: FIMC capture context
774 * @tfmt: media bus format to try/set on subdevs
775 * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
776 * @set: true to set format on subdevs, false to try only
777 */
778static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
779 struct v4l2_mbus_framefmt *tfmt,
780 struct fimc_fmt **fmt_id,
781 bool set)
782{
783 struct fimc_dev *fimc = ctx->fimc_dev;
0f735f52
SN
784 struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
785 struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS];
237e0265
SN
786 struct v4l2_subdev_format sfmt;
787 struct v4l2_mbus_framefmt *mf = &sfmt.format;
788 struct fimc_fmt *ffmt = NULL;
789 int ret, i = 0;
790
791 if (WARN_ON(!sd || !tfmt))
792 return -EINVAL;
5f3cc447 793
237e0265
SN
794 memset(&sfmt, 0, sizeof(sfmt));
795 sfmt.format = *tfmt;
796
797 sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
798 while (1) {
799 ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
800 FMT_FLAGS_CAM, i++);
801 if (ffmt == NULL) {
802 /*
803 * Notify user-space if common pixel code for
804 * host and sensor does not exist.
805 */
806 return -EINVAL;
807 }
808 mf->code = tfmt->code = ffmt->mbus_code;
5f3cc447 809
237e0265
SN
810 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
811 if (ret)
812 return ret;
813 if (mf->code != tfmt->code) {
814 mf->code = 0;
815 continue;
816 }
b1aa6089 817 if (mf->width != tfmt->width || mf->height != tfmt->height) {
237e0265
SN
818 u32 fcc = ffmt->fourcc;
819 tfmt->width = mf->width;
820 tfmt->height = mf->height;
821 ffmt = fimc_capture_try_format(ctx,
822 &tfmt->width, &tfmt->height,
823 NULL, &fcc, FIMC_SD_PAD_SOURCE);
824 if (ffmt && ffmt->mbus_code)
825 mf->code = ffmt->mbus_code;
b1aa6089
JL
826 if (mf->width != tfmt->width ||
827 mf->height != tfmt->height)
237e0265
SN
828 continue;
829 tfmt->code = mf->code;
830 }
831 if (csis)
832 ret = v4l2_subdev_call(csis, pad, set_fmt, NULL, &sfmt);
5f3cc447 833
237e0265 834 if (mf->code == tfmt->code &&
b1aa6089 835 mf->width == tfmt->width && mf->height == tfmt->height)
237e0265
SN
836 break;
837 }
5f3cc447 838
237e0265
SN
839 if (fmt_id && ffmt)
840 *fmt_id = ffmt;
841 *tfmt = *mf;
5f3cc447 842
237e0265
SN
843 dbg("code: 0x%x, %dx%d, %p", mf->code, mf->width, mf->height, ffmt);
844 return 0;
845}
5f3cc447 846
e578588e
SN
847static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
848 struct v4l2_format *f)
849{
850 struct fimc_dev *fimc = video_drvdata(file);
851 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
852
e578588e
SN
853 return fimc_fill_format(&ctx->d_frame, f);
854}
855
856static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
857 struct v4l2_format *f)
858{
237e0265 859 struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
e578588e
SN
860 struct fimc_dev *fimc = video_drvdata(file);
861 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
237e0265
SN
862 struct v4l2_mbus_framefmt mf;
863 struct fimc_fmt *ffmt = NULL;
864
237e0265
SN
865 if (pix->pixelformat == V4L2_PIX_FMT_JPEG) {
866 fimc_capture_try_format(ctx, &pix->width, &pix->height,
867 NULL, &pix->pixelformat,
868 FIMC_SD_PAD_SINK);
869 ctx->s_frame.f_width = pix->width;
870 ctx->s_frame.f_height = pix->height;
871 }
872 ffmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
873 NULL, &pix->pixelformat,
874 FIMC_SD_PAD_SOURCE);
875 if (!ffmt)
876 return -EINVAL;
877
878 if (!fimc->vid_cap.user_subdev_api) {
879 mf.width = pix->width;
880 mf.height = pix->height;
881 mf.code = ffmt->mbus_code;
882 fimc_md_graph_lock(fimc);
883 fimc_pipeline_try_format(ctx, &mf, &ffmt, false);
884 fimc_md_graph_unlock(fimc);
885
886 pix->width = mf.width;
887 pix->height = mf.height;
888 if (ffmt)
889 pix->pixelformat = ffmt->fourcc;
890 }
e578588e 891
237e0265 892 fimc_adjust_mplane_format(ffmt, pix->width, pix->height, pix);
4db5e27e 893 return 0;
e578588e
SN
894}
895
ee7160e5
SN
896static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx, bool jpeg)
897{
898 ctx->scaler.enabled = !jpeg;
899 fimc_ctrls_activate(ctx, !jpeg);
900
901 if (jpeg)
902 set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
903 else
904 clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
905}
906
237e0265 907static int fimc_capture_set_format(struct fimc_dev *fimc, struct v4l2_format *f)
5f3cc447 908{
e578588e 909 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
237e0265
SN
910 struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
911 struct v4l2_mbus_framefmt *mf = &fimc->vid_cap.mf;
912 struct fimc_frame *ff = &ctx->d_frame;
913 struct fimc_fmt *s_fmt = NULL;
914 int ret, i;
5f3cc447 915
237e0265 916 if (vb2_is_busy(&fimc->vid_cap.vbq))
ef7af59b 917 return -EBUSY;
5f3cc447 918
237e0265
SN
919 /* Pre-configure format at camera interface input, for JPEG only */
920 if (pix->pixelformat == V4L2_PIX_FMT_JPEG) {
921 fimc_capture_try_format(ctx, &pix->width, &pix->height,
922 NULL, &pix->pixelformat,
923 FIMC_SD_PAD_SINK);
924 ctx->s_frame.f_width = pix->width;
925 ctx->s_frame.f_height = pix->height;
926 }
927 /* Try the format at the scaler and the DMA output */
928 ff->fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
929 NULL, &pix->pixelformat,
930 FIMC_SD_PAD_SOURCE);
931 if (!ff->fmt)
8293ebfc 932 return -EINVAL;
dafb9c70
SN
933
934 /* Update RGB Alpha control state and value range */
935 fimc_alpha_ctrl_update(ctx);
936
237e0265
SN
937 /* Try to match format at the host and the sensor */
938 if (!fimc->vid_cap.user_subdev_api) {
939 mf->code = ff->fmt->mbus_code;
940 mf->width = pix->width;
941 mf->height = pix->height;
942
943 fimc_md_graph_lock(fimc);
944 ret = fimc_pipeline_try_format(ctx, mf, &s_fmt, true);
945 fimc_md_graph_unlock(fimc);
946 if (ret)
947 return ret;
948 pix->width = mf->width;
949 pix->height = mf->height;
950 }
d547ab66 951
237e0265
SN
952 fimc_adjust_mplane_format(ff->fmt, pix->width, pix->height, pix);
953 for (i = 0; i < ff->fmt->colplanes; i++)
d547ab66 954 ff->payload[i] = pix->plane_fmt[i].sizeimage;
237e0265
SN
955
956 set_frame_bounds(ff, pix->width, pix->height);
957 /* Reset the composition rectangle if not yet configured */
fed07f84 958 if (!(ctx->state & FIMC_COMPOSE))
237e0265
SN
959 set_frame_crop(ff, 0, 0, pix->width, pix->height);
960
ee7160e5
SN
961 fimc_capture_mark_jpeg_xfer(ctx, fimc_fmt_is_jpeg(ff->fmt->color));
962
237e0265
SN
963 /* Reset cropping and set format at the camera interface input */
964 if (!fimc->vid_cap.user_subdev_api) {
965 ctx->s_frame.fmt = s_fmt;
966 set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
967 set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
045030fa 968 }
ef7af59b 969
237e0265
SN
970 return ret;
971}
5f3cc447 972
237e0265
SN
973static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
974 struct v4l2_format *f)
975{
976 struct fimc_dev *fimc = video_drvdata(file);
5f3cc447 977
237e0265 978 return fimc_capture_set_format(fimc, f);
5f3cc447
SN
979}
980
981static int fimc_cap_enum_input(struct file *file, void *priv,
3e002182 982 struct v4l2_input *i)
5f3cc447 983{
e578588e 984 struct fimc_dev *fimc = video_drvdata(file);
0f735f52 985 struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
5f3cc447 986
3e002182 987 if (i->index != 0)
5f3cc447
SN
988 return -EINVAL;
989
5f3cc447 990 i->type = V4L2_INPUT_TYPE_CAMERA;
4db5e27e
SN
991 if (sd)
992 strlcpy(i->name, sd->name, sizeof(i->name));
5f3cc447
SN
993 return 0;
994}
995
3e002182 996static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
5f3cc447 997{
3e002182 998 return i == 0 ? i : -EINVAL;
5f3cc447
SN
999}
1000
3e002182 1001static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
5f3cc447 1002{
3e002182 1003 *i = 0;
5f3cc447
SN
1004 return 0;
1005}
1006
237e0265
SN
1007/**
1008 * fimc_pipeline_validate - check for formats inconsistencies
1009 * between source and sink pad of each link
1010 *
1011 * Return 0 if all formats match or -EPIPE otherwise.
1012 */
1013static int fimc_pipeline_validate(struct fimc_dev *fimc)
1014{
1015 struct v4l2_subdev_format sink_fmt, src_fmt;
1016 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
1017 struct v4l2_subdev *sd;
1018 struct media_pad *pad;
1019 int ret;
1020
1021 /* Start with the video capture node pad */
1022 pad = media_entity_remote_source(&vid_cap->vd_pad);
1023 if (pad == NULL)
1024 return -EPIPE;
1025 /* FIMC.{N} subdevice */
1026 sd = media_entity_to_v4l2_subdev(pad->entity);
1027
1028 while (1) {
1029 /* Retrieve format at the sink pad */
1030 pad = &sd->entity.pads[0];
1031 if (!(pad->flags & MEDIA_PAD_FL_SINK))
1032 break;
1033 /* Don't call FIMC subdev operation to avoid nested locking */
693f5c40 1034 if (sd == &fimc->vid_cap.subdev) {
237e0265
SN
1035 struct fimc_frame *ff = &vid_cap->ctx->s_frame;
1036 sink_fmt.format.width = ff->f_width;
1037 sink_fmt.format.height = ff->f_height;
1038 sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
1039 } else {
1040 sink_fmt.pad = pad->index;
1041 sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1042 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
1043 if (ret < 0 && ret != -ENOIOCTLCMD)
1044 return -EPIPE;
1045 }
1046 /* Retrieve format at the source pad */
1047 pad = media_entity_remote_source(pad);
1048 if (pad == NULL ||
1049 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
1050 break;
1051
1052 sd = media_entity_to_v4l2_subdev(pad->entity);
1053 src_fmt.pad = pad->index;
1054 src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1055 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
1056 if (ret < 0 && ret != -ENOIOCTLCMD)
1057 return -EPIPE;
1058
1059 if (src_fmt.format.width != sink_fmt.format.width ||
1060 src_fmt.format.height != sink_fmt.format.height ||
1061 src_fmt.format.code != sink_fmt.format.code)
1062 return -EPIPE;
1063 }
1064 return 0;
1065}
1066
5f3cc447 1067static int fimc_cap_streamon(struct file *file, void *priv,
2dab38e2 1068 enum v4l2_buf_type type)
5f3cc447 1069{
e578588e 1070 struct fimc_dev *fimc = video_drvdata(file);
4db5e27e 1071 struct fimc_pipeline *p = &fimc->pipeline;
f676fa06 1072 struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
237e0265 1073 int ret;
5f3cc447 1074
4db5e27e 1075 if (fimc_capture_active(fimc))
8293ebfc 1076 return -EBUSY;
5f3cc447 1077
f676fa06 1078 ret = media_entity_pipeline_start(&sd->entity, p->m_pipeline);
a60a2959
SA
1079 if (ret < 0)
1080 return ret;
5f3cc447 1081
237e0265
SN
1082 if (fimc->vid_cap.user_subdev_api) {
1083 ret = fimc_pipeline_validate(fimc);
f676fa06
SK
1084 if (ret < 0) {
1085 media_entity_pipeline_stop(&sd->entity);
237e0265 1086 return ret;
f676fa06 1087 }
237e0265 1088 }
8293ebfc 1089 return vb2_streamon(&fimc->vid_cap.vbq, type);
5f3cc447
SN
1090}
1091
1092static int fimc_cap_streamoff(struct file *file, void *priv,
8293ebfc 1093 enum v4l2_buf_type type)
5f3cc447 1094{
e578588e 1095 struct fimc_dev *fimc = video_drvdata(file);
0f735f52 1096 struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
4db5e27e 1097 int ret;
5f3cc447 1098
4db5e27e
SN
1099 ret = vb2_streamoff(&fimc->vid_cap.vbq, type);
1100 if (ret == 0)
1101 media_entity_pipeline_stop(&sd->entity);
1102 return ret;
5f3cc447
SN
1103}
1104
1105static int fimc_cap_reqbufs(struct file *file, void *priv,
ef7af59b 1106 struct v4l2_requestbuffers *reqbufs)
5f3cc447 1107{
e578588e
SN
1108 struct fimc_dev *fimc = video_drvdata(file);
1109 int ret = vb2_reqbufs(&fimc->vid_cap.vbq, reqbufs);
5f3cc447 1110
5f3cc447 1111 if (!ret)
e578588e 1112 fimc->vid_cap.reqbufs_count = reqbufs->count;
5f3cc447
SN
1113 return ret;
1114}
1115
1116static int fimc_cap_querybuf(struct file *file, void *priv,
1117 struct v4l2_buffer *buf)
1118{
e578588e 1119 struct fimc_dev *fimc = video_drvdata(file);
5f3cc447 1120
e578588e 1121 return vb2_querybuf(&fimc->vid_cap.vbq, buf);
5f3cc447
SN
1122}
1123
1124static int fimc_cap_qbuf(struct file *file, void *priv,
1125 struct v4l2_buffer *buf)
1126{
e578588e
SN
1127 struct fimc_dev *fimc = video_drvdata(file);
1128
1129 return vb2_qbuf(&fimc->vid_cap.vbq, buf);
5f3cc447
SN
1130}
1131
1132static int fimc_cap_dqbuf(struct file *file, void *priv,
1133 struct v4l2_buffer *buf)
1134{
e578588e
SN
1135 struct fimc_dev *fimc = video_drvdata(file);
1136
1137 return vb2_dqbuf(&fimc->vid_cap.vbq, buf, file->f_flags & O_NONBLOCK);
5f3cc447
SN
1138}
1139
3b4c34aa
SN
1140static int fimc_cap_create_bufs(struct file *file, void *priv,
1141 struct v4l2_create_buffers *create)
1142{
1143 struct fimc_dev *fimc = video_drvdata(file);
1144
1145 return vb2_create_bufs(&fimc->vid_cap.vbq, create);
1146}
1147
1148static int fimc_cap_prepare_buf(struct file *file, void *priv,
1149 struct v4l2_buffer *b)
1150{
1151 struct fimc_dev *fimc = video_drvdata(file);
1152
1153 return vb2_prepare_buf(&fimc->vid_cap.vbq, b);
1154}
1155
f9331d11
SN
1156static int fimc_cap_g_selection(struct file *file, void *fh,
1157 struct v4l2_selection *s)
e004e02f 1158{
e578588e 1159 struct fimc_dev *fimc = video_drvdata(file);
f9331d11
SN
1160 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1161 struct fimc_frame *f = &ctx->s_frame;
e004e02f 1162
f9331d11 1163 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
e004e02f
SN
1164 return -EINVAL;
1165
f9331d11
SN
1166 switch (s->target) {
1167 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
1168 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1169 f = &ctx->d_frame;
1170 case V4L2_SEL_TGT_CROP_BOUNDS:
1171 case V4L2_SEL_TGT_CROP_DEFAULT:
1172 s->r.left = 0;
1173 s->r.top = 0;
1174 s->r.width = f->o_width;
1175 s->r.height = f->o_height;
1176 return 0;
e004e02f 1177
c1334823 1178 case V4L2_SEL_TGT_COMPOSE:
f9331d11 1179 f = &ctx->d_frame;
c1334823 1180 case V4L2_SEL_TGT_CROP:
f9331d11
SN
1181 s->r.left = f->offs_h;
1182 s->r.top = f->offs_v;
1183 s->r.width = f->width;
1184 s->r.height = f->height;
1185 return 0;
1186 }
1187
1188 return -EINVAL;
e004e02f
SN
1189}
1190
f9331d11 1191/* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
7e566be2 1192static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
e004e02f 1193{
f9331d11
SN
1194 if (a->left < b->left || a->top < b->top)
1195 return 0;
1196 if (a->left + a->width > b->left + b->width)
1197 return 0;
1198 if (a->top + a->height > b->top + b->height)
1199 return 0;
e004e02f 1200
f9331d11 1201 return 1;
e004e02f
SN
1202}
1203
f9331d11
SN
1204static int fimc_cap_s_selection(struct file *file, void *fh,
1205 struct v4l2_selection *s)
5f3cc447 1206{
e578588e
SN
1207 struct fimc_dev *fimc = video_drvdata(file);
1208 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
f9331d11
SN
1209 struct v4l2_rect rect = s->r;
1210 struct fimc_frame *f;
237e0265 1211 unsigned long flags;
f9331d11
SN
1212
1213 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1214 return -EINVAL;
1215
c1334823 1216 if (s->target == V4L2_SEL_TGT_COMPOSE)
f9331d11 1217 f = &ctx->d_frame;
c1334823 1218 else if (s->target == V4L2_SEL_TGT_CROP)
f9331d11 1219 f = &ctx->s_frame;
fed07f84 1220 else
f9331d11 1221 return -EINVAL;
f9331d11 1222
fed07f84 1223 fimc_capture_try_selection(ctx, &rect, s->target);
f9331d11
SN
1224
1225 if (s->flags & V4L2_SEL_FLAG_LE &&
1226 !enclosed_rectangle(&rect, &s->r))
1227 return -ERANGE;
5f3cc447 1228
f9331d11
SN
1229 if (s->flags & V4L2_SEL_FLAG_GE &&
1230 !enclosed_rectangle(&s->r, &rect))
1231 return -ERANGE;
5f3cc447 1232
f9331d11 1233 s->r = rect;
237e0265 1234 spin_lock_irqsave(&fimc->slock, flags);
f9331d11
SN
1235 set_frame_crop(f, s->r.left, s->r.top, s->r.width,
1236 s->r.height);
237e0265 1237 spin_unlock_irqrestore(&fimc->slock, flags);
8293ebfc 1238
f9331d11 1239 set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
8293ebfc 1240 return 0;
5f3cc447
SN
1241}
1242
5f3cc447
SN
1243static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
1244 .vidioc_querycap = fimc_vidioc_querycap_capture,
1245
cf52df8a 1246 .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
e578588e 1247 .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
ef7af59b 1248 .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
e578588e 1249 .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
5f3cc447
SN
1250
1251 .vidioc_reqbufs = fimc_cap_reqbufs,
1252 .vidioc_querybuf = fimc_cap_querybuf,
1253
1254 .vidioc_qbuf = fimc_cap_qbuf,
1255 .vidioc_dqbuf = fimc_cap_dqbuf,
1256
3b4c34aa
SN
1257 .vidioc_prepare_buf = fimc_cap_prepare_buf,
1258 .vidioc_create_bufs = fimc_cap_create_bufs,
1259
5f3cc447
SN
1260 .vidioc_streamon = fimc_cap_streamon,
1261 .vidioc_streamoff = fimc_cap_streamoff,
1262
f9331d11
SN
1263 .vidioc_g_selection = fimc_cap_g_selection,
1264 .vidioc_s_selection = fimc_cap_s_selection,
5f3cc447
SN
1265
1266 .vidioc_enum_input = fimc_cap_enum_input,
1267 .vidioc_s_input = fimc_cap_s_input,
1268 .vidioc_g_input = fimc_cap_g_input,
1269};
1270
237e0265 1271/* Capture subdev media entity operations */
d09a7dc8
SN
1272static int fimc_link_setup(struct media_entity *entity,
1273 const struct media_pad *local,
1274 const struct media_pad *remote, u32 flags)
1275{
237e0265
SN
1276 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1277 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1278
1279 if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
1280 return -EINVAL;
d09a7dc8
SN
1281
1282 if (WARN_ON(fimc == NULL))
1283 return 0;
1284
1285 dbg("%s --> %s, flags: 0x%x. input: 0x%x",
1286 local->entity->name, remote->entity->name, flags,
1287 fimc->vid_cap.input);
1288
1289 if (flags & MEDIA_LNK_FL_ENABLED) {
1290 if (fimc->vid_cap.input != 0)
1291 return -EBUSY;
1292 fimc->vid_cap.input = sd->grp_id;
1293 return 0;
1294 }
1295
1296 fimc->vid_cap.input = 0;
1297 return 0;
1298}
1299
237e0265 1300static const struct media_entity_operations fimc_sd_media_ops = {
d09a7dc8
SN
1301 .link_setup = fimc_link_setup,
1302};
1303
e1d72f4d
SN
1304/**
1305 * fimc_sensor_notify - v4l2_device notification from a sensor subdev
1306 * @sd: pointer to a subdev generating the notification
1307 * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
1308 * @arg: pointer to an u32 type integer that stores the frame payload value
1309 *
1310 * The End Of Frame notification sent by sensor subdev in its still capture
1311 * mode. If there is only a single VSYNC generated by the sensor at the
1312 * beginning of a frame transmission, FIMC does not issue the LastIrq
1313 * (end of frame) interrupt. And this notification is used to complete the
1314 * frame capture and returning a buffer to user-space. Subdev drivers should
1315 * call this notification from their last 'End of frame capture' interrupt.
1316 */
1317void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
1318 void *arg)
1319{
1320 struct fimc_sensor_info *sensor;
1321 struct fimc_vid_buffer *buf;
1322 struct fimc_md *fmd;
1323 struct fimc_dev *fimc;
1324 unsigned long flags;
1325
1326 if (sd == NULL)
1327 return;
1328
1329 sensor = v4l2_get_subdev_hostdata(sd);
1330 fmd = entity_to_fimc_mdev(&sd->entity);
1331
1332 spin_lock_irqsave(&fmd->slock, flags);
1333 fimc = sensor ? sensor->host : NULL;
1334
1335 if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
1336 test_bit(ST_CAPT_PEND, &fimc->state)) {
1337 unsigned long irq_flags;
1338 spin_lock_irqsave(&fimc->slock, irq_flags);
1339 if (!list_empty(&fimc->vid_cap.active_buf_q)) {
1340 buf = list_entry(fimc->vid_cap.active_buf_q.next,
1341 struct fimc_vid_buffer, list);
1342 vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg));
1343 }
97d97422 1344 fimc_capture_irq_handler(fimc, 1);
e1d72f4d
SN
1345 fimc_deactivate_capture(fimc);
1346 spin_unlock_irqrestore(&fimc->slock, irq_flags);
1347 }
1348 spin_unlock_irqrestore(&fmd->slock, flags);
1349}
1350
237e0265
SN
1351static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
1352 struct v4l2_subdev_fh *fh,
1353 struct v4l2_subdev_mbus_code_enum *code)
1354{
1355 struct fimc_fmt *fmt;
1356
1357 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
1358 if (!fmt)
1359 return -EINVAL;
1360 code->code = fmt->mbus_code;
1361 return 0;
1362}
1363
1364static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
1365 struct v4l2_subdev_fh *fh,
1366 struct v4l2_subdev_format *fmt)
1367{
1368 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1369 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1370 struct v4l2_mbus_framefmt *mf;
1371 struct fimc_frame *ff;
1372
1373 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1374 mf = v4l2_subdev_get_try_format(fh, fmt->pad);
1375 fmt->format = *mf;
1376 return 0;
1377 }
1378 mf = &fmt->format;
1379 mf->colorspace = V4L2_COLORSPACE_JPEG;
1380 ff = fmt->pad == FIMC_SD_PAD_SINK ? &ctx->s_frame : &ctx->d_frame;
1381
1382 mutex_lock(&fimc->lock);
1383 /* The pixel code is same on both input and output pad */
1384 if (!WARN_ON(ctx->s_frame.fmt == NULL))
1385 mf->code = ctx->s_frame.fmt->mbus_code;
1386 mf->width = ff->f_width;
1387 mf->height = ff->f_height;
1388 mutex_unlock(&fimc->lock);
1389
1390 return 0;
1391}
1392
1393static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
1394 struct v4l2_subdev_fh *fh,
1395 struct v4l2_subdev_format *fmt)
1396{
1397 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1398 struct v4l2_mbus_framefmt *mf = &fmt->format;
1399 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1400 struct fimc_frame *ff;
1401 struct fimc_fmt *ffmt;
1402
1403 dbg("pad%d: code: 0x%x, %dx%d",
1404 fmt->pad, mf->code, mf->width, mf->height);
1405
1406 if (fmt->pad == FIMC_SD_PAD_SOURCE &&
1407 vb2_is_busy(&fimc->vid_cap.vbq))
1408 return -EBUSY;
1409
1410 mutex_lock(&fimc->lock);
1411 ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
1412 &mf->code, NULL, fmt->pad);
1413 mutex_unlock(&fimc->lock);
1414 mf->colorspace = V4L2_COLORSPACE_JPEG;
1415
1416 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1417 mf = v4l2_subdev_get_try_format(fh, fmt->pad);
1418 *mf = fmt->format;
1419 return 0;
1420 }
dafb9c70
SN
1421 /* Update RGB Alpha control state and value range */
1422 fimc_alpha_ctrl_update(ctx);
1423
ee7160e5
SN
1424 fimc_capture_mark_jpeg_xfer(ctx, fimc_fmt_is_jpeg(ffmt->color));
1425
237e0265
SN
1426 ff = fmt->pad == FIMC_SD_PAD_SINK ?
1427 &ctx->s_frame : &ctx->d_frame;
1428
1429 mutex_lock(&fimc->lock);
1430 set_frame_bounds(ff, mf->width, mf->height);
393a23fc 1431 fimc->vid_cap.mf = *mf;
237e0265
SN
1432 ff->fmt = ffmt;
1433
1434 /* Reset the crop rectangle if required. */
fed07f84 1435 if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
237e0265
SN
1436 set_frame_crop(ff, 0, 0, mf->width, mf->height);
1437
1438 if (fmt->pad == FIMC_SD_PAD_SINK)
fed07f84 1439 ctx->state &= ~FIMC_COMPOSE;
237e0265
SN
1440 mutex_unlock(&fimc->lock);
1441 return 0;
1442}
1443
fed07f84
SN
1444static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
1445 struct v4l2_subdev_fh *fh,
1446 struct v4l2_subdev_selection *sel)
237e0265
SN
1447{
1448 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1449 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
fed07f84
SN
1450 struct fimc_frame *f = &ctx->s_frame;
1451 struct v4l2_rect *r = &sel->r;
1452 struct v4l2_rect *try_sel;
1453
1454 if (sel->pad != FIMC_SD_PAD_SINK)
1455 return -EINVAL;
1456
1457 mutex_lock(&fimc->lock);
237e0265 1458
fed07f84 1459 switch (sel->target) {
5689b288 1460 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
fed07f84 1461 f = &ctx->d_frame;
5689b288 1462 case V4L2_SEL_TGT_CROP_BOUNDS:
fed07f84
SN
1463 r->width = f->o_width;
1464 r->height = f->o_height;
1465 r->left = 0;
1466 r->top = 0;
1467 mutex_unlock(&fimc->lock);
237e0265 1468 return 0;
fed07f84 1469
5689b288 1470 case V4L2_SEL_TGT_CROP:
fed07f84
SN
1471 try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
1472 break;
5689b288 1473 case V4L2_SEL_TGT_COMPOSE:
fed07f84
SN
1474 try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
1475 f = &ctx->d_frame;
1476 break;
1477 default:
1478 mutex_unlock(&fimc->lock);
1479 return -EINVAL;
237e0265 1480 }
237e0265 1481
fed07f84
SN
1482 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1483 sel->r = *try_sel;
1484 } else {
1485 r->left = f->offs_h;
1486 r->top = f->offs_v;
1487 r->width = f->width;
1488 r->height = f->height;
1489 }
237e0265 1490
fed07f84
SN
1491 dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
1492 sel->pad, r->left, r->top, r->width, r->height,
1493 f->f_width, f->f_height);
237e0265 1494
fed07f84 1495 mutex_unlock(&fimc->lock);
237e0265
SN
1496 return 0;
1497}
1498
fed07f84
SN
1499static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
1500 struct v4l2_subdev_fh *fh,
1501 struct v4l2_subdev_selection *sel)
237e0265
SN
1502{
1503 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1504 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
fed07f84
SN
1505 struct fimc_frame *f = &ctx->s_frame;
1506 struct v4l2_rect *r = &sel->r;
1507 struct v4l2_rect *try_sel;
237e0265
SN
1508 unsigned long flags;
1509
fed07f84
SN
1510 if (sel->pad != FIMC_SD_PAD_SINK)
1511 return -EINVAL;
237e0265
SN
1512
1513 mutex_lock(&fimc->lock);
c1334823 1514 fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
237e0265 1515
fed07f84 1516 switch (sel->target) {
5689b288 1517 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
fed07f84 1518 f = &ctx->d_frame;
5689b288 1519 case V4L2_SEL_TGT_CROP_BOUNDS:
fed07f84
SN
1520 r->width = f->o_width;
1521 r->height = f->o_height;
1522 r->left = 0;
1523 r->top = 0;
5be4fe63 1524 mutex_unlock(&fimc->lock);
237e0265 1525 return 0;
fed07f84 1526
5689b288 1527 case V4L2_SEL_TGT_CROP:
fed07f84
SN
1528 try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
1529 break;
5689b288 1530 case V4L2_SEL_TGT_COMPOSE:
fed07f84
SN
1531 try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
1532 f = &ctx->d_frame;
1533 break;
1534 default:
1535 mutex_unlock(&fimc->lock);
1536 return -EINVAL;
237e0265 1537 }
237e0265 1538
fed07f84
SN
1539 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1540 *try_sel = sel->r;
1541 } else {
1542 spin_lock_irqsave(&fimc->slock, flags);
1543 set_frame_crop(f, r->left, r->top, r->width, r->height);
1544 set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
1545 spin_unlock_irqrestore(&fimc->slock, flags);
5689b288 1546 if (sel->target == V4L2_SEL_TGT_COMPOSE)
fed07f84
SN
1547 ctx->state |= FIMC_COMPOSE;
1548 }
237e0265 1549
fed07f84 1550 dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
237e0265
SN
1551 r->width, r->height);
1552
1553 mutex_unlock(&fimc->lock);
1554 return 0;
1555}
1556
1557static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
1558 .enum_mbus_code = fimc_subdev_enum_mbus_code,
fed07f84
SN
1559 .get_selection = fimc_subdev_get_selection,
1560 .set_selection = fimc_subdev_set_selection,
237e0265
SN
1561 .get_fmt = fimc_subdev_get_fmt,
1562 .set_fmt = fimc_subdev_set_fmt,
237e0265
SN
1563};
1564
1565static struct v4l2_subdev_ops fimc_subdev_ops = {
1566 .pad = &fimc_subdev_pad_ops,
1567};
1568
237e0265
SN
1569/* Set default format at the sensor and host interface */
1570static int fimc_capture_set_default_format(struct fimc_dev *fimc)
1571{
1572 struct v4l2_format fmt = {
1573 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
1574 .fmt.pix_mp = {
1575 .width = 640,
1576 .height = 480,
1577 .pixelformat = V4L2_PIX_FMT_YUYV,
1578 .field = V4L2_FIELD_NONE,
1579 .colorspace = V4L2_COLORSPACE_JPEG,
1580 },
1581 };
1582
1583 return fimc_capture_set_format(fimc, &fmt);
1584}
1585
ef7af59b 1586/* fimc->lock must be already initialized */
693f5c40 1587static int fimc_register_capture_device(struct fimc_dev *fimc,
30c9939d 1588 struct v4l2_device *v4l2_dev)
5f3cc447 1589{
31d34d9b 1590 struct video_device *vfd = &fimc->vid_cap.vfd;
5f3cc447
SN
1591 struct fimc_vid_cap *vid_cap;
1592 struct fimc_ctx *ctx;
2dab38e2 1593 struct vb2_queue *q;
30c9939d 1594 int ret = -ENOMEM;
5f3cc447
SN
1595
1596 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1597 if (!ctx)
1598 return -ENOMEM;
1599
1600 ctx->fimc_dev = fimc;
3d112d9a
SN
1601 ctx->in_path = FIMC_IO_CAMERA;
1602 ctx->out_path = FIMC_IO_DMA;
5f3cc447 1603 ctx->state = FIMC_CTX_CAP;
237e0265 1604 ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
693f5c40 1605 ctx->d_frame.fmt = ctx->s_frame.fmt;
5f3cc447 1606
31d34d9b 1607 memset(vfd, 0, sizeof(*vfd));
693f5c40 1608 snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
5f3cc447
SN
1609
1610 vfd->fops = &fimc_capture_fops;
1611 vfd->ioctl_ops = &fimc_capture_ioctl_ops;
574e1717 1612 vfd->v4l2_dev = v4l2_dev;
5f3cc447 1613 vfd->minor = -1;
31d34d9b 1614 vfd->release = video_device_release_empty;
8293ebfc 1615 vfd->lock = &fimc->lock;
c2d430af 1616
5f3cc447
SN
1617 video_set_drvdata(vfd, fimc);
1618
1619 vid_cap = &fimc->vid_cap;
5f3cc447
SN
1620 vid_cap->active_buf_cnt = 0;
1621 vid_cap->reqbufs_count = 0;
1622 vid_cap->refcnt = 0;
5f3cc447
SN
1623
1624 INIT_LIST_HEAD(&vid_cap->pending_buf_q);
1625 INIT_LIST_HEAD(&vid_cap->active_buf_q);
5f3cc447
SN
1626 vid_cap->ctx = ctx;
1627
2dab38e2
SN
1628 q = &fimc->vid_cap.vbq;
1629 memset(q, 0, sizeof(*q));
ef7af59b 1630 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
2dab38e2
SN
1631 q->io_modes = VB2_MMAP | VB2_USERPTR;
1632 q->drv_priv = fimc->vid_cap.ctx;
1633 q->ops = &fimc_capture_qops;
1634 q->mem_ops = &vb2_dma_contig_memops;
1635 q->buf_struct_size = sizeof(struct fimc_vid_buffer);
1636
1637 vb2_queue_init(q);
5f3cc447 1638
693f5c40
SN
1639 vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
1640 ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
574e1717
SN
1641 if (ret)
1642 goto err_ent;
693f5c40
SN
1643
1644 ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
237e0265 1645 if (ret)
693f5c40
SN
1646 goto err_vd;
1647
1648 v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
1649 vfd->name, video_device_node_name(vfd));
574e1717 1650
9448ab7d 1651 vfd->ctrl_handler = &ctx->ctrls.handler;
5f3cc447
SN
1652 return 0;
1653
693f5c40 1654err_vd:
237e0265 1655 media_entity_cleanup(&vfd->entity);
574e1717 1656err_ent:
cfd77310 1657 kfree(ctx);
5f3cc447
SN
1658 return ret;
1659}
1660
693f5c40 1661static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
5f3cc447 1662{
693f5c40
SN
1663 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1664 int ret;
5f3cc447 1665
bbc5296f
SN
1666 if (fimc == NULL)
1667 return -ENXIO;
1668
693f5c40
SN
1669 ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
1670 if (ret)
1671 return ret;
1672
1673 ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
1674 if (ret)
1675 fimc_unregister_m2m_device(fimc);
1676
1677 return ret;
1678}
1679
1680static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
1681{
1682 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1683
1684 if (fimc == NULL)
1685 return;
1686
1687 fimc_unregister_m2m_device(fimc);
1688
31d34d9b
SN
1689 if (video_is_registered(&fimc->vid_cap.vfd)) {
1690 video_unregister_device(&fimc->vid_cap.vfd);
1691 media_entity_cleanup(&fimc->vid_cap.vfd.entity);
574e1717
SN
1692 }
1693 kfree(fimc->vid_cap.ctx);
96a85742 1694 fimc->vid_cap.ctx = NULL;
5f3cc447 1695}
693f5c40
SN
1696
1697static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
1698 .registered = fimc_capture_subdev_registered,
1699 .unregistered = fimc_capture_subdev_unregistered,
1700};
1701
1702int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
1703{
1704 struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1705 int ret;
1706
1707 v4l2_subdev_init(sd, &fimc_subdev_ops);
1708 sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
1709 snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->pdev->id);
1710
1711 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1712 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
1713 ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
1714 fimc->vid_cap.sd_pads, 0);
1715 if (ret)
1716 return ret;
1717
1718 sd->entity.ops = &fimc_sd_media_ops;
1719 sd->internal_ops = &fimc_capture_sd_internal_ops;
1720 v4l2_set_subdevdata(sd, fimc);
1721 return 0;
1722}
1723
1724void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
1725{
1726 struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1727
1728 v4l2_device_unregister_subdev(sd);
1729 media_entity_cleanup(&sd->entity);
1730 v4l2_set_subdevdata(sd, NULL);
1731}