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Merge branch 'timer/cleanup' into late/mvebu2
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / pci / zoran / zoran_card.c
CommitLineData
1da177e4
LT		 1/*
2 * Zoran zr36057/zr36067 PCI controller driver, for the
3 * Pinnacle/Miro DC10/DC10+/DC30/DC30+, Iomega Buz, Linux
4 * Media Labs LML33/LML33R10.
5 *
6 * This part handles card-specific data and detection
d56410e0 7 *
1da177e4
LT		 8 * Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
9 *
10 * Currently maintained by:
11 * Ronald Bultje <rbultje@ronald.bitfreak.net>
12 * Laurent Pinchart <laurent.pinchart@skynet.be>
13 * Mailinglist <mjpeg-users@lists.sf.net>
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
fbe60daa
MS		 30#include <linux/delay.h>
31
1da177e4
LT		 32#include <linux/types.h>
33#include <linux/kernel.h>
34#include <linux/module.h>
35#include <linux/init.h>
36#include <linux/vmalloc.h>
5a0e3ad6 37#include <linux/slab.h>
1da177e4
LT		 38
39#include <linux/proc_fs.h>
40#include <linux/i2c.h>
41#include <linux/i2c-algo-bit.h>
7f6adeaf 42#include <linux/videodev2.h>
1da177e4
LT		 43#include <linux/spinlock.h>
44#include <linux/sem.h>
45#include <linux/kmod.h>
46#include <linux/wait.h>
47
48#include <linux/pci.h>
49#include <linux/interrupt.h>
384c3689 50#include <linux/mutex.h>
1cd3c0fa
HV		 51#include <linux/io.h>
52#include <media/v4l2-common.h>
53#include <media/bt819.h>
1da177e4
LT		 54
55#include "videocodec.h"
56#include "zoran.h"
57#include "zoran_card.h"
58#include "zoran_device.h"
59#include "zoran_procfs.h"
60
1da177e4
LT		 61extern const struct zoran_format zoran_formats[];
62
45bdcefe 63static int card[BUZ_MAX] = { [0 ... (BUZ_MAX-1)] = -1 };
60e3cac4 64module_param_array(card, int, NULL, 0444);
45bdcefe 65MODULE_PARM_DESC(card, "Card type");
1da177e4 66
1da177e4
LT		 67/*
68 The video mem address of the video card.
69 The driver has a little database for some videocards
70 to determine it from there. If your video card is not in there
71 you have either to give it to the driver as a parameter
72 or set in in a VIDIOCSFBUF ioctl
73 */
74
ff699e6b 75static unsigned long vidmem; /* default = 0 - Video memory base address */
60e3cac4
TP		 76module_param(vidmem, ulong, 0444);
77MODULE_PARM_DESC(vidmem, "Default video memory base address");
1da177e4
LT		 78
79/*
80 Default input and video norm at startup of the driver.
81*/
82
ff699e6b 83static unsigned int default_input; /* default 0 = Composite, 1 = S-Video */
60e3cac4 84module_param(default_input, uint, 0444);
1da177e4
LT		 85MODULE_PARM_DESC(default_input,
86 "Default input (0=Composite, 1=S-Video, 2=Internal)");
87
fbe60daa 88static int default_mux = 1; /* 6 Eyes input selection */
60e3cac4 89module_param(default_mux, int, 0644);
fbe60daa
MS		 90MODULE_PARM_DESC(default_mux,
91 "Default 6 Eyes mux setting (Input selection)");
92
ff699e6b 93static int default_norm; /* default 0 = PAL, 1 = NTSC 2 = SECAM */
60e3cac4 94module_param(default_norm, int, 0444);
1da177e4
LT		 95MODULE_PARM_DESC(default_norm, "Default norm (0=PAL, 1=NTSC, 2=SECAM)");
96
60e3cac4 97/* /dev/videoN, -1 for autodetect */
45bdcefe 98static int video_nr[BUZ_MAX] = { [0 ... (BUZ_MAX-1)] = -1 };
60e3cac4 99module_param_array(video_nr, int, NULL, 0444);
45bdcefe 100MODULE_PARM_DESC(video_nr, "Video device number (-1=Auto)");
1da177e4 101
497d7d0b 102int v4l_nbufs = 4;
e686e73c 103int v4l_bufsize = 864; /* Everybody should be able to work with this setting */
60e3cac4 104module_param(v4l_nbufs, int, 0644);
1da177e4 105MODULE_PARM_DESC(v4l_nbufs, "Maximum number of V4L buffers to use");
60e3cac4 106module_param(v4l_bufsize, int, 0644);
1da177e4
LT		 107MODULE_PARM_DESC(v4l_bufsize, "Maximum size per V4L buffer (in kB)");
108
109int jpg_nbufs = 32;
110int jpg_bufsize = 512; /* max size for 100% quality full-PAL frame */
60e3cac4 111module_param(jpg_nbufs, int, 0644);
1da177e4 112MODULE_PARM_DESC(jpg_nbufs, "Maximum number of JPG buffers to use");
60e3cac4 113module_param(jpg_bufsize, int, 0644);
1da177e4
LT		 114MODULE_PARM_DESC(jpg_bufsize, "Maximum size per JPG buffer (in kB)");
115
116int pass_through = 0; /* 1=Pass through TV signal when device is not used */
117 /* 0=Show color bar when device is not used (LML33: only if lml33dpath=1) */
60e3cac4 118module_param(pass_through, int, 0644);
1da177e4
LT		 119MODULE_PARM_DESC(pass_through,
120 "Pass TV signal through to TV-out when idling");
121
18b548ca
JD		 122int zr36067_debug = 1;
123module_param_named(debug, zr36067_debug, int, 0644);
124MODULE_PARM_DESC(debug, "Debug level (0-5)");
1da177e4 125
1990d50b
MCC		 126#define ZORAN_VERSION "0.10.1"
127
1da177e4
LT		 128MODULE_DESCRIPTION("Zoran-36057/36067 JPEG codec driver");
129MODULE_AUTHOR("Serguei Miridonov");
130MODULE_LICENSE("GPL");
1990d50b 131MODULE_VERSION(ZORAN_VERSION);
1da177e4 132
17faeb20
TP		 133#define ZR_DEVICE(subven, subdev, data) { \
134 .vendor = PCI_VENDOR_ID_ZORAN, .device = PCI_DEVICE_ID_ZORAN_36057, \
135 .subvendor = (subven), .subdevice = (subdev), .driver_data = (data) }
136
dbdf03b4 137static struct pci_device_id zr36067_pci_tbl[] = {
17faeb20
TP		 138 ZR_DEVICE(PCI_VENDOR_ID_MIRO, PCI_DEVICE_ID_MIRO_DC10PLUS, DC10plus),
139 ZR_DEVICE(PCI_VENDOR_ID_MIRO, PCI_DEVICE_ID_MIRO_DC30PLUS, DC30plus),
140 ZR_DEVICE(PCI_VENDOR_ID_ELECTRONICDESIGNGMBH, PCI_DEVICE_ID_LML_33R10, LML33R10),
141 ZR_DEVICE(PCI_VENDOR_ID_IOMEGA, PCI_DEVICE_ID_IOMEGA_BUZ, BUZ),
142 ZR_DEVICE(PCI_ANY_ID, PCI_ANY_ID, NUM_CARDS),
dbdf03b4
MCC		 143 {0}
144};
145MODULE_DEVICE_TABLE(pci, zr36067_pci_tbl);
1da177e4 146
601139e0 147static unsigned int zoran_num; /* number of cards found */
1da177e4
LT		 148
149/* videocodec bus functions ZR36060 */
150static u32
151zr36060_read (struct videocodec *codec,
152 u16 reg)
153{
154 struct zoran *zr = (struct zoran *) codec->master_data->data;
155 __u32 data;
156
157 if (post_office_wait(zr)
158 || post_office_write(zr, 0, 1, reg >> 8)
159 || post_office_write(zr, 0, 2, reg & 0xff)) {
160 return -1;
161 }
162
163 data = post_office_read(zr, 0, 3) & 0xff;
164 return data;
165}
166
167static void
168zr36060_write (struct videocodec *codec,
169 u16 reg,
170 u32 val)
171{
172 struct zoran *zr = (struct zoran *) codec->master_data->data;
173
174 if (post_office_wait(zr)
175 || post_office_write(zr, 0, 1, reg >> 8)
176 || post_office_write(zr, 0, 2, reg & 0xff)) {
177 return;
178 }
179
180 post_office_write(zr, 0, 3, val & 0xff);
181}
182
183/* videocodec bus functions ZR36050 */
184static u32
185zr36050_read (struct videocodec *codec,
186 u16 reg)
187{
188 struct zoran *zr = (struct zoran *) codec->master_data->data;
189 __u32 data;
190
191 if (post_office_wait(zr)
192 || post_office_write(zr, 1, 0, reg >> 2)) { // reg. HIGHBYTES
193 return -1;
194 }
195
196 data = post_office_read(zr, 0, reg & 0x03) & 0xff; // reg. LOWBYTES + read
197 return data;
198}
199
200static void
201zr36050_write (struct videocodec *codec,
202 u16 reg,
203 u32 val)
204{
205 struct zoran *zr = (struct zoran *) codec->master_data->data;
206
207 if (post_office_wait(zr)
208 || post_office_write(zr, 1, 0, reg >> 2)) { // reg. HIGHBYTES
209 return;
210 }
211
212 post_office_write(zr, 0, reg & 0x03, val & 0xff); // reg. LOWBYTES + wr. data
213}
214
215/* videocodec bus functions ZR36016 */
216static u32
217zr36016_read (struct videocodec *codec,
218 u16 reg)
219{
220 struct zoran *zr = (struct zoran *) codec->master_data->data;
221 __u32 data;
222
223 if (post_office_wait(zr)) {
224 return -1;
225 }
226
227 data = post_office_read(zr, 2, reg & 0x03) & 0xff; // read
228 return data;
229}
230
231/* hack for in zoran_device.c */
232void
233zr36016_write (struct videocodec *codec,
234 u16 reg,
235 u32 val)
236{
237 struct zoran *zr = (struct zoran *) codec->master_data->data;
238
239 if (post_office_wait(zr)) {
240 return;
241 }
242
243 post_office_write(zr, 2, reg & 0x03, val & 0x0ff); // wr. data
244}
245
246/*
247 * Board specific information
248 */
249
250static void
251dc10_init (struct zoran *zr)
252{
c61402ba 253 dprintk(3, KERN_DEBUG "%s: %s\n", ZR_DEVNAME(zr), __func__);
1da177e4
LT		 254
255 /* Pixel clock selection */
256 GPIO(zr, 4, 0);
257 GPIO(zr, 5, 1);
258 /* Enable the video bus sync signals */
259 GPIO(zr, 7, 0);
260}
261
262static void
263dc10plus_init (struct zoran *zr)
264{
c61402ba 265 dprintk(3, KERN_DEBUG "%s: %s\n", ZR_DEVNAME(zr), __func__);
1da177e4
LT		 266}
267
268static void
269buz_init (struct zoran *zr)
270{
c61402ba 271 dprintk(3, KERN_DEBUG "%s: %s\n", ZR_DEVNAME(zr), __func__);
1da177e4
LT		 272
273 /* some stuff from Iomega */
274 pci_write_config_dword(zr->pci_dev, 0xfc, 0x90680f15);
275 pci_write_config_dword(zr->pci_dev, 0x0c, 0x00012020);
276 pci_write_config_dword(zr->pci_dev, 0xe8, 0xc0200000);
277}
278
279static void
280lml33_init (struct zoran *zr)
281{
c61402ba 282 dprintk(3, KERN_DEBUG "%s: %s\n", ZR_DEVNAME(zr), __func__);
1da177e4
LT		 283
284 GPIO(zr, 2, 1); // Set Composite input/output
285}
286
fbe60daa
MS		 287static void
288avs6eyes_init (struct zoran *zr)
289{
290 // AverMedia 6-Eyes original driver by Christer Weinigel
291
292 // Lifted straight from Christer's old driver and
293 // modified slightly by Martin Samuelsson.
294
295 int mux = default_mux; /* 1 = BT866, 7 = VID1 */
296
297 GPIO(zr, 4, 1); /* Bt866 SLEEP on */
298 udelay(2);
299
300 GPIO(zr, 0, 1); /* ZR36060 /RESET on */
301 GPIO(zr, 1, 0); /* ZR36060 /SLEEP on */
302 GPIO(zr, 2, mux & 1); /* MUX S0 */
303 GPIO(zr, 3, 0); /* /FRAME on */
304 GPIO(zr, 4, 0); /* Bt866 SLEEP off */
305 GPIO(zr, 5, mux & 2); /* MUX S1 */
306 GPIO(zr, 6, 0); /* ? */
307 GPIO(zr, 7, mux & 4); /* MUX S2 */
308
309}
310
1da177e4
LT		 311static char *
312codecid_to_modulename (u16 codecid)
313{
314 char *name = NULL;
315
316 switch (codecid) {
317 case CODEC_TYPE_ZR36060:
318 name = "zr36060";
319 break;
320 case CODEC_TYPE_ZR36050:
321 name = "zr36050";
322 break;
323 case CODEC_TYPE_ZR36016:
324 name = "zr36016";
325 break;
1da177e4
LT		 326 }
327
328 return name;
329}
330
331// struct tvnorm {
332// u16 Wt, Wa, HStart, HSyncStart, Ht, Ha, VStart;
333// };
334
335static struct tvnorm f50sqpixel = { 944, 768, 83, 880, 625, 576, 16 };
336static struct tvnorm f60sqpixel = { 780, 640, 51, 716, 525, 480, 12 };
337static struct tvnorm f50ccir601 = { 864, 720, 75, 804, 625, 576, 18 };
338static struct tvnorm f60ccir601 = { 858, 720, 57, 788, 525, 480, 16 };
339
340static struct tvnorm f50ccir601_lml33 = { 864, 720, 75+34, 804, 625, 576, 18 };
341static struct tvnorm f60ccir601_lml33 = { 858, 720, 57+34, 788, 525, 480, 16 };
342
343/* The DC10 (57/16/50) uses VActive as HSync, so HStart must be 0 */
344static struct tvnorm f50sqpixel_dc10 = { 944, 768, 0, 880, 625, 576, 0 };
345static struct tvnorm f60sqpixel_dc10 = { 780, 640, 0, 716, 525, 480, 12 };
346
347/* FIXME: I cannot swap U and V in saa7114, so i do one
348 * pixel left shift in zoran (75 -> 74)
349 * (Maxim Yevtyushkin <max@linuxmedialabs.com>) */
350static struct tvnorm f50ccir601_lm33r10 = { 864, 720, 74+54, 804, 625, 576, 18 };
351static struct tvnorm f60ccir601_lm33r10 = { 858, 720, 56+54, 788, 525, 480, 16 };
352
fbe60daa
MS		 353/* FIXME: The ks0127 seem incapable of swapping U and V, too, which is why I
354 * copy Maxim's left shift hack for the 6 Eyes.
355 *
356 * Christer's driver used the unshifted norms, though...
357 * /Sam */
358static struct tvnorm f50ccir601_avs6eyes = { 864, 720, 74, 804, 625, 576, 18 };
359static struct tvnorm f60ccir601_avs6eyes = { 858, 720, 56, 788, 525, 480, 16 };
360
0ab6e1c3
HV		 361static const unsigned short vpx3220_addrs[] = { 0x43, 0x47, I2C_CLIENT_END };
362static const unsigned short saa7110_addrs[] = { 0x4e, 0x4f, I2C_CLIENT_END };
363static const unsigned short saa7111_addrs[] = { 0x25, 0x24, I2C_CLIENT_END };
364static const unsigned short saa7114_addrs[] = { 0x21, 0x20, I2C_CLIENT_END };
365static const unsigned short adv717x_addrs[] = { 0x6a, 0x6b, 0x2a, 0x2b, I2C_CLIENT_END };
366static const unsigned short ks0127_addrs[] = { 0x6c, 0x6d, I2C_CLIENT_END };
367static const unsigned short saa7185_addrs[] = { 0x44, I2C_CLIENT_END };
368static const unsigned short bt819_addrs[] = { 0x45, I2C_CLIENT_END };
369static const unsigned short bt856_addrs[] = { 0x44, I2C_CLIENT_END };
370static const unsigned short bt866_addrs[] = { 0x44, I2C_CLIENT_END };
371
4c62e976 372static struct card_info zoran_cards[NUM_CARDS] = {
1da177e4
LT		 373 {
374 .type = DC10_old,
375 .name = "DC10(old)",
0ab6e1c3 376 .i2c_decoder = "vpx3220a",
0ab6e1c3 377 .addrs_decoder = vpx3220_addrs,
1da177e4
LT		 378 .video_codec = CODEC_TYPE_ZR36050,
379 .video_vfe = CODEC_TYPE_ZR36016,
380
381 .inputs = 3,
382 .input = {
383 { 1, "Composite" },
384 { 2, "S-Video" },
385 { 0, "Internal/comp" }
386 },
107063c6 387 .norms = V4L2_STD_NTSC|V4L2_STD_PAL|V4L2_STD_SECAM,
1da177e4
LT		 388 .tvn = {
389 &f50sqpixel_dc10,
390 &f60sqpixel_dc10,
391 &f50sqpixel_dc10
392 },
393 .jpeg_int = 0,
394 .vsync_int = ZR36057_ISR_GIRQ1,
395 .gpio = { 2, 1, -1, 3, 7, 0, 4, 5 },
396 .gpio_pol = { 0, 0, 0, 1, 0, 0, 0, 0 },
397 .gpcs = { -1, 0 },
398 .vfe_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
399 .gws_not_connected = 0,
fbe60daa 400 .input_mux = 0,
1da177e4
LT		 401 .init = &dc10_init,
402 }, {
403 .type = DC10_new,
404 .name = "DC10(new)",
0ab6e1c3 405 .i2c_decoder = "saa7110",
0ab6e1c3
HV		 406 .addrs_decoder = saa7110_addrs,
407 .i2c_encoder = "adv7175",
0ab6e1c3 408 .addrs_encoder = adv717x_addrs,
1da177e4
LT		 409 .video_codec = CODEC_TYPE_ZR36060,
410
411 .inputs = 3,
412 .input = {
413 { 0, "Composite" },
414 { 7, "S-Video" },
415 { 5, "Internal/comp" }
416 },
107063c6 417 .norms = V4L2_STD_NTSC|V4L2_STD_PAL|V4L2_STD_SECAM,
1da177e4
LT		 418 .tvn = {
419 &f50sqpixel,
420 &f60sqpixel,
421 &f50sqpixel},
422 .jpeg_int = ZR36057_ISR_GIRQ0,
423 .vsync_int = ZR36057_ISR_GIRQ1,
424 .gpio = { 3, 0, 6, 1, 2, -1, 4, 5 },
425 .gpio_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
426 .gpcs = { -1, 1},
427 .vfe_pol = { 1, 1, 1, 1, 0, 0, 0, 0 },
428 .gws_not_connected = 0,
fbe60daa 429 .input_mux = 0,
1da177e4
LT		 430 .init = &dc10plus_init,
431 }, {
432 .type = DC10plus,
433 .name = "DC10plus",
0ab6e1c3 434 .i2c_decoder = "saa7110",
0ab6e1c3
HV		 435 .addrs_decoder = saa7110_addrs,
436 .i2c_encoder = "adv7175",
0ab6e1c3 437 .addrs_encoder = adv717x_addrs,
1da177e4
LT		 438 .video_codec = CODEC_TYPE_ZR36060,
439
440 .inputs = 3,
441 .input = {
442 { 0, "Composite" },
443 { 7, "S-Video" },
444 { 5, "Internal/comp" }
445 },
107063c6 446 .norms = V4L2_STD_NTSC|V4L2_STD_PAL|V4L2_STD_SECAM,
1da177e4
LT		 447 .tvn = {
448 &f50sqpixel,
449 &f60sqpixel,
450 &f50sqpixel
451 },
452 .jpeg_int = ZR36057_ISR_GIRQ0,
453 .vsync_int = ZR36057_ISR_GIRQ1,
454 .gpio = { 3, 0, 6, 1, 2, -1, 4, 5 },
455 .gpio_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
456 .gpcs = { -1, 1 },
457 .vfe_pol = { 1, 1, 1, 1, 0, 0, 0, 0 },
458 .gws_not_connected = 0,
fbe60daa 459 .input_mux = 0,
1da177e4
LT		 460 .init = &dc10plus_init,
461 }, {
462 .type = DC30,
463 .name = "DC30",
0ab6e1c3 464 .i2c_decoder = "vpx3220a",
0ab6e1c3
HV		 465 .addrs_decoder = vpx3220_addrs,
466 .i2c_encoder = "adv7175",
0ab6e1c3 467 .addrs_encoder = adv717x_addrs,
1da177e4
LT		 468 .video_codec = CODEC_TYPE_ZR36050,
469 .video_vfe = CODEC_TYPE_ZR36016,
470
471 .inputs = 3,
472 .input = {
473 { 1, "Composite" },
474 { 2, "S-Video" },
475 { 0, "Internal/comp" }
476 },
107063c6 477 .norms = V4L2_STD_NTSC|V4L2_STD_PAL|V4L2_STD_SECAM,
1da177e4
LT		 478 .tvn = {
479 &f50sqpixel_dc10,
480 &f60sqpixel_dc10,
481 &f50sqpixel_dc10
482 },
483 .jpeg_int = 0,
484 .vsync_int = ZR36057_ISR_GIRQ1,
485 .gpio = { 2, 1, -1, 3, 7, 0, 4, 5 },
486 .gpio_pol = { 0, 0, 0, 1, 0, 0, 0, 0 },
487 .gpcs = { -1, 0 },
488 .vfe_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
489 .gws_not_connected = 0,
fbe60daa 490 .input_mux = 0,
1da177e4
LT		 491 .init = &dc10_init,
492 }, {
493 .type = DC30plus,
494 .name = "DC30plus",
0ab6e1c3 495 .i2c_decoder = "vpx3220a",
0ab6e1c3
HV		 496 .addrs_decoder = vpx3220_addrs,
497 .i2c_encoder = "adv7175",
0ab6e1c3 498 .addrs_encoder = adv717x_addrs,
1da177e4
LT		 499 .video_codec = CODEC_TYPE_ZR36050,
500 .video_vfe = CODEC_TYPE_ZR36016,
501
502 .inputs = 3,
503 .input = {
504 { 1, "Composite" },
505 { 2, "S-Video" },
506 { 0, "Internal/comp" }
507 },
107063c6 508 .norms = V4L2_STD_NTSC|V4L2_STD_PAL|V4L2_STD_SECAM,
1da177e4
LT		 509 .tvn = {
510 &f50sqpixel_dc10,
511 &f60sqpixel_dc10,
512 &f50sqpixel_dc10
513 },
514 .jpeg_int = 0,
515 .vsync_int = ZR36057_ISR_GIRQ1,
516 .gpio = { 2, 1, -1, 3, 7, 0, 4, 5 },
517 .gpio_pol = { 0, 0, 0, 1, 0, 0, 0, 0 },
518 .gpcs = { -1, 0 },
519 .vfe_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
520 .gws_not_connected = 0,
fbe60daa 521 .input_mux = 0,
1da177e4
LT		 522 .init = &dc10_init,
523 }, {
524 .type = LML33,
525 .name = "LML33",
0ab6e1c3 526 .i2c_decoder = "bt819a",
0ab6e1c3
HV		 527 .addrs_decoder = bt819_addrs,
528 .i2c_encoder = "bt856",
0ab6e1c3 529 .addrs_encoder = bt856_addrs,
1da177e4
LT		 530 .video_codec = CODEC_TYPE_ZR36060,
531
532 .inputs = 2,
533 .input = {
534 { 0, "Composite" },
535 { 7, "S-Video" }
536 },
107063c6 537 .norms = V4L2_STD_NTSC|V4L2_STD_PAL,
1da177e4
LT		 538 .tvn = {
539 &f50ccir601_lml33,
540 &f60ccir601_lml33,
541 NULL
542 },
543 .jpeg_int = ZR36057_ISR_GIRQ1,
544 .vsync_int = ZR36057_ISR_GIRQ0,
545 .gpio = { 1, -1, 3, 5, 7, -1, -1, -1 },
546 .gpio_pol = { 0, 0, 0, 0, 1, 0, 0, 0 },
547 .gpcs = { 3, 1 },
548 .vfe_pol = { 1, 1, 0, 0, 0, 1, 0, 0 },
549 .gws_not_connected = 1,
fbe60daa 550 .input_mux = 0,
1da177e4
LT		 551 .init = &lml33_init,
552 }, {
553 .type = LML33R10,
554 .name = "LML33R10",
0ab6e1c3 555 .i2c_decoder = "saa7114",
0ab6e1c3
HV		 556 .addrs_decoder = saa7114_addrs,
557 .i2c_encoder = "adv7170",
0ab6e1c3 558 .addrs_encoder = adv717x_addrs,
1da177e4
LT		 559 .video_codec = CODEC_TYPE_ZR36060,
560
561 .inputs = 2,
562 .input = {
563 { 0, "Composite" },
564 { 7, "S-Video" }
565 },
107063c6 566 .norms = V4L2_STD_NTSC|V4L2_STD_PAL,
1da177e4
LT		 567 .tvn = {
568 &f50ccir601_lm33r10,
569 &f60ccir601_lm33r10,
570 NULL
571 },
572 .jpeg_int = ZR36057_ISR_GIRQ1,
573 .vsync_int = ZR36057_ISR_GIRQ0,
574 .gpio = { 1, -1, 3, 5, 7, -1, -1, -1 },
575 .gpio_pol = { 0, 0, 0, 0, 1, 0, 0, 0 },
576 .gpcs = { 3, 1 },
577 .vfe_pol = { 1, 1, 0, 0, 0, 1, 0, 0 },
578 .gws_not_connected = 1,
fbe60daa 579 .input_mux = 0,
1da177e4
LT		 580 .init = &lml33_init,
581 }, {
582 .type = BUZ,
583 .name = "Buz",
0ab6e1c3 584 .i2c_decoder = "saa7111",
0ab6e1c3
HV		 585 .addrs_decoder = saa7111_addrs,
586 .i2c_encoder = "saa7185",
0ab6e1c3 587 .addrs_encoder = saa7185_addrs,
1da177e4
LT		 588 .video_codec = CODEC_TYPE_ZR36060,
589
590 .inputs = 2,
591 .input = {
592 { 3, "Composite" },
593 { 7, "S-Video" }
594 },
107063c6 595 .norms = V4L2_STD_NTSC|V4L2_STD_PAL|V4L2_STD_SECAM,
1da177e4
LT		 596 .tvn = {
597 &f50ccir601,
598 &f60ccir601,
599 &f50ccir601
600 },
601 .jpeg_int = ZR36057_ISR_GIRQ1,
602 .vsync_int = ZR36057_ISR_GIRQ0,
603 .gpio = { 1, -1, 3, -1, -1, -1, -1, -1 },
604 .gpio_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
605 .gpcs = { 3, 1 },
606 .vfe_pol = { 1, 1, 0, 0, 0, 1, 0, 0 },
607 .gws_not_connected = 1,
fbe60daa 608 .input_mux = 0,
1da177e4 609 .init = &buz_init,
fbe60daa
MS		 610 }, {
611 .type = AVS6EYES,
612 .name = "6-Eyes",
613 /* AverMedia chose not to brand the 6-Eyes. Thus it
614 can't be autodetected, and requires card=x. */
0ab6e1c3 615 .i2c_decoder = "ks0127",
0ab6e1c3
HV		 616 .addrs_decoder = ks0127_addrs,
617 .i2c_encoder = "bt866",
0ab6e1c3 618 .addrs_encoder = bt866_addrs,
fbe60daa
MS		 619 .video_codec = CODEC_TYPE_ZR36060,
620
621 .inputs = 10,
622 .input = {
623 { 0, "Composite 1" },
624 { 1, "Composite 2" },
625 { 2, "Composite 3" },
626 { 4, "Composite 4" },
627 { 5, "Composite 5" },
628 { 6, "Composite 6" },
629 { 8, "S-Video 1" },
630 { 9, "S-Video 2" },
631 {10, "S-Video 3" },
632 {15, "YCbCr" }
633 },
107063c6 634 .norms = V4L2_STD_NTSC|V4L2_STD_PAL,
fbe60daa
MS		 635 .tvn = {
636 &f50ccir601_avs6eyes,
637 &f60ccir601_avs6eyes,
638 NULL
639 },
640 .jpeg_int = ZR36057_ISR_GIRQ1,
641 .vsync_int = ZR36057_ISR_GIRQ0,
642 .gpio = { 1, 0, 3, -1, -1, -1, -1, -1 },// Validity unknown /Sam
643 .gpio_pol = { 0, 0, 0, 0, 0, 0, 0, 0 }, // Validity unknown /Sam
644 .gpcs = { 3, 1 }, // Validity unknown /Sam
645 .vfe_pol = { 1, 0, 0, 0, 0, 1, 0, 0 }, // Validity unknown /Sam
646 .gws_not_connected = 1,
647 .input_mux = 1,
648 .init = &avs6eyes_init,
1da177e4 649 }
fbe60daa 650
1da177e4
LT		 651};
652
653/*
654 * I2C functions
655 */
656/* software I2C functions */
657static int
658zoran_i2c_getsda (void *data)
659{
660 struct zoran *zr = (struct zoran *) data;
661
662 return (btread(ZR36057_I2CBR) >> 1) & 1;
663}
664
665static int
666zoran_i2c_getscl (void *data)
667{
668 struct zoran *zr = (struct zoran *) data;
669
670 return btread(ZR36057_I2CBR) & 1;
671}
672
673static void
674zoran_i2c_setsda (void *data,
675 int state)
676{
677 struct zoran *zr = (struct zoran *) data;
678
679 if (state)
680 zr->i2cbr |= 2;
681 else
682 zr->i2cbr &= ~2;
683 btwrite(zr->i2cbr, ZR36057_I2CBR);
684}
685
686static void
687zoran_i2c_setscl (void *data,
688 int state)
689{
690 struct zoran *zr = (struct zoran *) data;
691
692 if (state)
693 zr->i2cbr |= 1;
694 else
695 zr->i2cbr &= ~1;
696 btwrite(zr->i2cbr, ZR36057_I2CBR);
697}
698
6275163e 699static const struct i2c_algo_bit_data zoran_i2c_bit_data_template = {
1da177e4
LT		 700 .setsda = zoran_i2c_setsda,
701 .setscl = zoran_i2c_setscl,
702 .getsda = zoran_i2c_getsda,
703 .getscl = zoran_i2c_getscl,
704 .udelay = 10,
1da177e4
LT		 705 .timeout = 100,
706};
707
1da177e4
LT		 708static int
709zoran_register_i2c (struct zoran *zr)
710{
711 memcpy(&zr->i2c_algo, &zoran_i2c_bit_data_template,
712 sizeof(struct i2c_algo_bit_data));
713 zr->i2c_algo.data = zr;
6275163e
JD		 714 strlcpy(zr->i2c_adapter.name, ZR_DEVNAME(zr),
715 sizeof(zr->i2c_adapter.name));
0ab6e1c3 716 i2c_set_adapdata(&zr->i2c_adapter, &zr->v4l2_dev);
1da177e4 717 zr->i2c_adapter.algo_data = &zr->i2c_algo;
12a917f6 718 zr->i2c_adapter.dev.parent = &zr->pci_dev->dev;
1da177e4
LT		 719 return i2c_bit_add_bus(&zr->i2c_adapter);
720}
721
722static void
723zoran_unregister_i2c (struct zoran *zr)
724{
3269711b 725 i2c_del_adapter(&zr->i2c_adapter);
1da177e4
LT		 726}
727
728/* Check a zoran_params struct for correctness, insert default params */
729
730int
731zoran_check_jpg_settings (struct zoran *zr,
0ba514d5
HV		 732 struct zoran_jpg_settings *settings,
733 int try)
1da177e4
LT		 734{
735 int err = 0, err0 = 0;
736
737 dprintk(4,
738 KERN_DEBUG
c61402ba
TP		 739 "%s: %s - dec: %d, Hdcm: %d, Vdcm: %d, Tdcm: %d\n",
740 ZR_DEVNAME(zr), __func__, settings->decimation, settings->HorDcm,
1da177e4
LT		 741 settings->VerDcm, settings->TmpDcm);
742 dprintk(4,
743 KERN_DEBUG
c61402ba
TP		 744 "%s: %s - x: %d, y: %d, w: %d, y: %d\n",
745 ZR_DEVNAME(zr), __func__, settings->img_x, settings->img_y,
1da177e4
LT		 746 settings->img_width, settings->img_height);
747 /* Check decimation, set default values for decimation = 1, 2, 4 */
748 switch (settings->decimation) {
749 case 1:
750
751 settings->HorDcm = 1;
752 settings->VerDcm = 1;
753 settings->TmpDcm = 1;
754 settings->field_per_buff = 2;
755 settings->img_x = 0;
756 settings->img_y = 0;
757 settings->img_width = BUZ_MAX_WIDTH;
758 settings->img_height = BUZ_MAX_HEIGHT / 2;
759 break;
760 case 2:
761
762 settings->HorDcm = 2;
763 settings->VerDcm = 1;
764 settings->TmpDcm = 2;
765 settings->field_per_buff = 1;
766 settings->img_x = (BUZ_MAX_WIDTH == 720) ? 8 : 0;
767 settings->img_y = 0;
768 settings->img_width =
769 (BUZ_MAX_WIDTH == 720) ? 704 : BUZ_MAX_WIDTH;
770 settings->img_height = BUZ_MAX_HEIGHT / 2;
771 break;
772 case 4:
773
774 if (zr->card.type == DC10_new) {
775 dprintk(1,
776 KERN_DEBUG
c61402ba
TP		 777 "%s: %s - HDec by 4 is not supported on the DC10\n",
778 ZR_DEVNAME(zr), __func__);
1da177e4
LT		 779 err0++;
780 break;
781 }
782
783 settings->HorDcm = 4;
784 settings->VerDcm = 2;
785 settings->TmpDcm = 2;
786 settings->field_per_buff = 1;
787 settings->img_x = (BUZ_MAX_WIDTH == 720) ? 8 : 0;
788 settings->img_y = 0;
789 settings->img_width =
790 (BUZ_MAX_WIDTH == 720) ? 704 : BUZ_MAX_WIDTH;
791 settings->img_height = BUZ_MAX_HEIGHT / 2;
792 break;
793 case 0:
794
795 /* We have to check the data the user has set */
796
797 if (settings->HorDcm != 1 && settings->HorDcm != 2 &&
0ba514d5
HV		 798 (zr->card.type == DC10_new || settings->HorDcm != 4)) {
799 settings->HorDcm = clamp(settings->HorDcm, 1, 2);
1da177e4 800 err0++;
0ba514d5
HV		 801 }
802 if (settings->VerDcm != 1 && settings->VerDcm != 2) {
803 settings->VerDcm = clamp(settings->VerDcm, 1, 2);
1da177e4 804 err0++;
0ba514d5
HV		 805 }
806 if (settings->TmpDcm != 1 && settings->TmpDcm != 2) {
807 settings->TmpDcm = clamp(settings->TmpDcm, 1, 2);
1da177e4 808 err0++;
0ba514d5 809 }
1da177e4 810 if (settings->field_per_buff != 1 &&
0ba514d5
HV		 811 settings->field_per_buff != 2) {
812 settings->field_per_buff = clamp(settings->field_per_buff, 1, 2);
1da177e4 813 err0++;
0ba514d5
HV		 814 }
815 if (settings->img_x < 0) {
816 settings->img_x = 0;
1da177e4 817 err0++;
0ba514d5
HV		 818 }
819 if (settings->img_y < 0) {
820 settings->img_y = 0;
1da177e4 821 err0++;
0ba514d5
HV		 822 }
823 if (settings->img_width < 0 || settings->img_width > BUZ_MAX_WIDTH) {
824 settings->img_width = clamp(settings->img_width, 0, (int)BUZ_MAX_WIDTH);
1da177e4 825 err0++;
0ba514d5
HV		 826 }
827 if (settings->img_height < 0 || settings->img_height > BUZ_MAX_HEIGHT / 2) {
828 settings->img_height = clamp(settings->img_height, 0, BUZ_MAX_HEIGHT / 2);
1da177e4 829 err0++;
0ba514d5
HV		 830 }
831 if (settings->img_x + settings->img_width > BUZ_MAX_WIDTH) {
832 settings->img_x = BUZ_MAX_WIDTH - settings->img_width;
833 err0++;
834 }
835 if (settings->img_y + settings->img_height > BUZ_MAX_HEIGHT / 2) {
836 settings->img_y = BUZ_MAX_HEIGHT / 2 - settings->img_height;
1da177e4 837 err0++;
0ba514d5
HV		 838 }
839 if (settings->img_width % (16 * settings->HorDcm) != 0) {
840 settings->img_width -= settings->img_width % (16 * settings->HorDcm);
841 if (settings->img_width == 0)
842 settings->img_width = 16 * settings->HorDcm;
843 err0++;
844 }
845 if (settings->img_height % (8 * settings->VerDcm) != 0) {
846 settings->img_height -= settings->img_height % (8 * settings->VerDcm);
847 if (settings->img_height == 0)
848 settings->img_height = 8 * settings->VerDcm;
1da177e4 849 err0++;
1da177e4
LT		 850 }
851
0ba514d5 852 if (!try && err0) {
1da177e4
LT		 853 dprintk(1,
854 KERN_ERR
c61402ba
TP		 855 "%s: %s - error in params for decimation = 0\n",
856 ZR_DEVNAME(zr), __func__);
1da177e4
LT		 857 err++;
858 }
859 break;
860 default:
861 dprintk(1,
862 KERN_ERR
c61402ba
TP		 863 "%s: %s - decimation = %d, must be 0, 1, 2 or 4\n",
864 ZR_DEVNAME(zr), __func__, settings->decimation);
1da177e4
LT		 865 err++;
866 break;
867 }
868
869 if (settings->jpg_comp.quality > 100)
870 settings->jpg_comp.quality = 100;
871 if (settings->jpg_comp.quality < 5)
872 settings->jpg_comp.quality = 5;
873 if (settings->jpg_comp.APPn < 0)
874 settings->jpg_comp.APPn = 0;
875 if (settings->jpg_comp.APPn > 15)
876 settings->jpg_comp.APPn = 15;
877 if (settings->jpg_comp.APP_len < 0)
878 settings->jpg_comp.APP_len = 0;
879 if (settings->jpg_comp.APP_len > 60)
880 settings->jpg_comp.APP_len = 60;
881 if (settings->jpg_comp.COM_len < 0)
882 settings->jpg_comp.COM_len = 0;
883 if (settings->jpg_comp.COM_len > 60)
884 settings->jpg_comp.COM_len = 60;
885 if (err)
886 return -EINVAL;
887 return 0;
888}
889
890void
891zoran_open_init_params (struct zoran *zr)
892{
893 int i;
894
895 /* User must explicitly set a window */
896 zr->overlay_settings.is_set = 0;
897 zr->overlay_mask = NULL;
898 zr->overlay_active = ZORAN_FREE;
899
900 zr->v4l_memgrab_active = 0;
901 zr->v4l_overlay_active = 0;
902 zr->v4l_grab_frame = NO_GRAB_ACTIVE;
903 zr->v4l_grab_seq = 0;
904 zr->v4l_settings.width = 192;
905 zr->v4l_settings.height = 144;
c014ec90 906 zr->v4l_settings.format = &zoran_formats[7]; /* YUY2 - YUV-4:2:2 packed */
1da177e4
LT		 907 zr->v4l_settings.bytesperline =
908 zr->v4l_settings.width *
909 ((zr->v4l_settings.format->depth + 7) / 8);
910
911 /* DMA ring stuff for V4L */
912 zr->v4l_pend_tail = 0;
913 zr->v4l_pend_head = 0;
914 zr->v4l_sync_tail = 0;
915 zr->v4l_buffers.active = ZORAN_FREE;
916 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
917 zr->v4l_buffers.buffer[i].state = BUZ_STATE_USER; /* nothing going on */
918 }
919 zr->v4l_buffers.allocated = 0;
920
921 for (i = 0; i < BUZ_MAX_FRAME; i++) {
922 zr->jpg_buffers.buffer[i].state = BUZ_STATE_USER; /* nothing going on */
923 }
924 zr->jpg_buffers.active = ZORAN_FREE;
925 zr->jpg_buffers.allocated = 0;
926 /* Set necessary params and call zoran_check_jpg_settings to set the defaults */
927 zr->jpg_settings.decimation = 1;
928 zr->jpg_settings.jpg_comp.quality = 50; /* default compression factor 8 */
929 if (zr->card.type != BUZ)
930 zr->jpg_settings.odd_even = 1;
931 else
932 zr->jpg_settings.odd_even = 0;
933 zr->jpg_settings.jpg_comp.APPn = 0;
934 zr->jpg_settings.jpg_comp.APP_len = 0; /* No APPn marker */
935 memset(zr->jpg_settings.jpg_comp.APP_data, 0,
936 sizeof(zr->jpg_settings.jpg_comp.APP_data));
937 zr->jpg_settings.jpg_comp.COM_len = 0; /* No COM marker */
938 memset(zr->jpg_settings.jpg_comp.COM_data, 0,
939 sizeof(zr->jpg_settings.jpg_comp.COM_data));
940 zr->jpg_settings.jpg_comp.jpeg_markers =
ad1ecf86 941 V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT;
0ba514d5 942 i = zoran_check_jpg_settings(zr, &zr->jpg_settings, 0);
1da177e4 943 if (i)
c61402ba
TP		 944 dprintk(1, KERN_ERR "%s: %s internal error\n",
945 ZR_DEVNAME(zr), __func__);
1da177e4
LT		 946
947 clear_interrupt_counters(zr);
948 zr->testing = 0;
949}
950
4c62e976 951static void test_interrupts (struct zoran *zr)
1da177e4
LT		 952{
953 DEFINE_WAIT(wait);
954 int timeout, icr;
955
956 clear_interrupt_counters(zr);
957
958 zr->testing = 1;
959 icr = btread(ZR36057_ICR);
960 btwrite(0x78000000 | ZR36057_ICR_IntPinEn, ZR36057_ICR);
961 prepare_to_wait(&zr->test_q, &wait, TASK_INTERRUPTIBLE);
962 timeout = schedule_timeout(HZ);
963 finish_wait(&zr->test_q, &wait);
964 btwrite(0, ZR36057_ICR);
965 btwrite(0x78000000, ZR36057_ISR);
966 zr->testing = 0;
967 dprintk(5, KERN_INFO "%s: Testing interrupts...\n", ZR_DEVNAME(zr));
968 if (timeout) {
969 dprintk(1, ": time spent: %d\n", 1 * HZ - timeout);
970 }
18b548ca 971 if (zr36067_debug > 1)
1da177e4
LT		 972 print_interrupts(zr);
973 btwrite(icr, ZR36057_ICR);
974}
975
4c62e976 976static int zr36057_init (struct zoran *zr)
1da177e4 977{
daf72f40 978 int j, err;
1da177e4
LT		 979
980 dprintk(1,
981 KERN_INFO
c61402ba
TP		 982 "%s: %s - initializing card[%d], zr=%p\n",
983 ZR_DEVNAME(zr), __func__, zr->id, zr);
1da177e4
LT		 984
985 /* default setup of all parameters which will persist between opens */
986 zr->user = 0;
987
988 init_waitqueue_head(&zr->v4l_capq);
989 init_waitqueue_head(&zr->jpg_capq);
990 init_waitqueue_head(&zr->test_q);
991 zr->jpg_buffers.allocated = 0;
992 zr->v4l_buffers.allocated = 0;
993
7f6adeaf
HV		 994 zr->vbuf_base = (void *) vidmem;
995 zr->vbuf_width = 0;
996 zr->vbuf_height = 0;
997 zr->vbuf_depth = 0;
998 zr->vbuf_bytesperline = 0;
1da177e4
LT		 999
1000 /* Avoid nonsense settings from user for default input/norm */
b475f4ee 1001 if (default_norm < 0 || default_norm > 2)
7f6adeaf
HV		 1002 default_norm = 0;
1003 if (default_norm == 0) {
107063c6
HV		 1004 zr->norm = V4L2_STD_PAL;
1005 zr->timing = zr->card.tvn[0];
7f6adeaf 1006 } else if (default_norm == 1) {
107063c6
HV		 1007 zr->norm = V4L2_STD_NTSC;
1008 zr->timing = zr->card.tvn[1];
1009 } else {
1010 zr->norm = V4L2_STD_SECAM;
1011 zr->timing = zr->card.tvn[2];
1012 }
1013 if (zr->timing == NULL) {
1da177e4
LT		 1014 dprintk(1,
1015 KERN_WARNING
c61402ba
TP		 1016 "%s: %s - default TV standard not supported by hardware. PAL will be used.\n",
1017 ZR_DEVNAME(zr), __func__);
107063c6
HV		 1018 zr->norm = V4L2_STD_PAL;
1019 zr->timing = zr->card.tvn[0];
1da177e4
LT		 1020 }
1021
60e3cac4
TP		 1022 if (default_input > zr->card.inputs-1) {
1023 dprintk(1,
1024 KERN_WARNING
1025 "%s: default_input value %d out of range (0-%d)\n",
1026 ZR_DEVNAME(zr), default_input, zr->card.inputs-1);
1027 default_input = 0;
1028 }
1029 zr->input = default_input;
1da177e4 1030
1da177e4
LT		 1031 /* default setup (will be repeated at every open) */
1032 zoran_open_init_params(zr);
1033
1034 /* allocate memory *before* doing anything to the hardware
1035 * in case allocation fails */
daf72f40 1036 zr->stat_com = kzalloc(BUZ_NUM_STAT_COM * 4, GFP_KERNEL);
6ce3ced4 1037 zr->video_dev = video_device_alloc();
daf72f40 1038 if (!zr->stat_com || !zr->video_dev) {
1da177e4
LT		 1039 dprintk(1,
1040 KERN_ERR
c61402ba
TP		 1041 "%s: %s - kmalloc (STAT_COM) failed\n",
1042 ZR_DEVNAME(zr), __func__);
daf72f40
JD		 1043 err = -ENOMEM;
1044 goto exit_free;
1da177e4 1045 }
1da177e4 1046 for (j = 0; j < BUZ_NUM_STAT_COM; j++) {
9c169df8 1047 zr->stat_com[j] = cpu_to_le32(1); /* mark as unavailable to zr36057 */
1da177e4
LT		 1048 }
1049
1050 /*
1051 * Now add the template and register the device unit.
1052 */
1da177e4 1053 memcpy(zr->video_dev, &zoran_template, sizeof(zoran_template));
aff88bca 1054 zr->video_dev->parent = &zr->pci_dev->dev;
1da177e4 1055 strcpy(zr->video_dev->name, ZR_DEVNAME(zr));
954f340f
HV		 1056 /* It's not a mem2mem device, but you can both capture and output from
1057 one and the same device. This should really be split up into two
1058 device nodes, but that's a job for another day. */
1059 zr->video_dev->vfl_dir = VFL_DIR_M2M;
60e3cac4 1060 err = video_register_device(zr->video_dev, VFL_TYPE_GRABBER, video_nr[zr->id]);
daf72f40 1061 if (err < 0)
66aa66ea 1062 goto exit_free;
601139e0 1063 video_set_drvdata(zr->video_dev, zr);
1da177e4
LT		 1064
1065 zoran_init_hardware(zr);
18b548ca 1066 if (zr36067_debug > 2)
1da177e4
LT		 1067 detect_guest_activity(zr);
1068 test_interrupts(zr);
1069 if (!pass_through) {
0ab6e1c3 1070 decoder_call(zr, video, s_stream, 0);
5325b427 1071 encoder_call(zr, video, s_routing, 2, 0, 0);
1da177e4
LT		 1072 }
1073
1074 zr->zoran_proc = NULL;
1075 zr->initialized = 1;
1076 return 0;
daf72f40 1077
daf72f40
JD		 1078exit_free:
1079 kfree(zr->stat_com);
1080 kfree(zr->video_dev);
1081 return err;
1da177e4
LT		 1082}
1083
4c62e976 1084static void zoran_remove(struct pci_dev *pdev)
1da177e4 1085{
0ab6e1c3
HV		 1086 struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);
1087 struct zoran *zr = to_zoran(v4l2_dev);
66aa66ea 1088
1da177e4 1089 if (!zr->initialized)
85b9b8a4 1090 goto exit_free;
66aa66ea 1091
1da177e4
LT		 1092 /* unregister videocodec bus */
1093 if (zr->codec) {
1094 struct videocodec_master *master = zr->codec->master_data;
2ea75330 1095
1da177e4 1096 videocodec_detach(zr->codec);
2ea75330 1097 kfree(master);
1da177e4
LT		 1098 }
1099 if (zr->vfe) {
1100 struct videocodec_master *master = zr->vfe->master_data;
2ea75330 1101
1da177e4 1102 videocodec_detach(zr->vfe);
2ea75330 1103 kfree(master);
1da177e4
LT		 1104 }
1105
1106 /* unregister i2c bus */
1107 zoran_unregister_i2c(zr);
1108 /* disable PCI bus-mastering */
1109 zoran_set_pci_master(zr, 0);
1110 /* put chip into reset */
1111 btwrite(0, ZR36057_SPGPPCR);
1112 free_irq(zr->pci_dev->irq, zr);
1113 /* unmap and free memory */
daf72f40 1114 kfree(zr->stat_com);
1da177e4
LT		 1115 zoran_proc_cleanup(zr);
1116 iounmap(zr->zr36057_mem);
1117 pci_disable_device(zr->pci_dev);
1118 video_unregister_device(zr->video_dev);
85b9b8a4 1119exit_free:
0ab6e1c3 1120 v4l2_device_unregister(&zr->v4l2_dev);
85b9b8a4 1121 kfree(zr);
1da177e4
LT		 1122}
1123
1124void
1125zoran_vdev_release (struct video_device *vdev)
1126{
1127 kfree(vdev);
1128}
1129
4c62e976
GKH		 1130static struct videocodec_master *zoran_setup_videocodec(struct zoran *zr,
1131 int type)
1da177e4
LT		 1132{
1133 struct videocodec_master *m = NULL;
1134
1135 m = kmalloc(sizeof(struct videocodec_master), GFP_KERNEL);
1136 if (!m) {
c61402ba
TP		 1137 dprintk(1, KERN_ERR "%s: %s - no memory\n",
1138 ZR_DEVNAME(zr), __func__);
1da177e4
LT		 1139 return m;
1140 }
1141
22c4a4e9
MCC		 1142 /* magic and type are unused for master struct. Makes sense only at
1143 codec structs.
1144 In the past, .type were initialized to the old V4L1 .hardware
1145 value, as VID_HARDWARE_ZR36067
1146 */
1147 m->magic = 0L;
1148 m->type = 0;
1149
1da177e4 1150 m->flags = CODEC_FLAG_ENCODER | CODEC_FLAG_DECODER;
bd0eb12f 1151 strlcpy(m->name, ZR_DEVNAME(zr), sizeof(m->name));
1da177e4
LT		 1152 m->data = zr;
1153
1154 switch (type)
1155 {
1156 case CODEC_TYPE_ZR36060:
1157 m->readreg = zr36060_read;
1158 m->writereg = zr36060_write;
1159 m->flags |= CODEC_FLAG_JPEG | CODEC_FLAG_VFE;
1160 break;
1161 case CODEC_TYPE_ZR36050:
1162 m->readreg = zr36050_read;
1163 m->writereg = zr36050_write;
1164 m->flags |= CODEC_FLAG_JPEG;
1165 break;
1166 case CODEC_TYPE_ZR36016:
1167 m->readreg = zr36016_read;
1168 m->writereg = zr36016_write;
1169 m->flags |= CODEC_FLAG_VFE;
1170 break;
1171 }
1172
1173 return m;
1174}
1175
33470423 1176static void zoran_subdev_notify(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1cd3c0fa
HV		 1177{
1178 struct zoran *zr = to_zoran(sd->v4l2_dev);
1179
1180 /* Bt819 needs to reset its FIFO buffer using #FRST pin and
1181 LML33 card uses GPIO(7) for that. */
1182 if (cmd == BT819_FIFO_RESET_LOW)
1183 GPIO(zr, 7, 0);
1184 else if (cmd == BT819_FIFO_RESET_HIGH)
1185 GPIO(zr, 7, 1);
1cd3c0fa
HV		 1186}
1187
1da177e4 1188/*
c84e6036 1189 * Scan for a Buz card (actually for the PCI controller ZR36057),
1da177e4
LT		 1190 * request the irq and map the io memory
1191 */
4c62e976 1192static int zoran_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4
LT		 1193{
1194 unsigned char latency, need_latency;
1195 struct zoran *zr;
1da177e4
LT		 1196 int result;
1197 struct videocodec_master *master_vfe = NULL;
1198 struct videocodec_master *master_codec = NULL;
1199 int card_num;
0ab6e1c3 1200 char *codec_name, *vfe_name;
66aa66ea 1201 unsigned int nr;
1da177e4 1202
1da177e4 1203
601139e0 1204 nr = zoran_num++;
66aa66ea 1205 if (nr >= BUZ_MAX) {
c61402ba 1206 dprintk(1, KERN_ERR "%s: driver limited to %d card(s) maximum\n",
66aa66ea
TP		 1207 ZORAN_NAME, BUZ_MAX);
1208 return -ENOENT;
1209 }
1da177e4 1210
66aa66ea
TP		 1211 zr = kzalloc(sizeof(struct zoran), GFP_KERNEL);
1212 if (!zr) {
c61402ba
TP		 1213 dprintk(1, KERN_ERR "%s: %s - kzalloc failed\n",
1214 ZORAN_NAME, __func__);
66aa66ea
TP		 1215 return -ENOMEM;
1216 }
1cd3c0fa 1217 zr->v4l2_dev.notify = zoran_subdev_notify;
0ab6e1c3
HV		 1218 if (v4l2_device_register(&pdev->dev, &zr->v4l2_dev))
1219 goto zr_free_mem;
66aa66ea
TP		 1220 zr->pci_dev = pdev;
1221 zr->id = nr;
1222 snprintf(ZR_DEVNAME(zr), sizeof(ZR_DEVNAME(zr)), "MJPEG[%u]", zr->id);
1223 spin_lock_init(&zr->spinlock);
1224 mutex_init(&zr->resource_lock);
0edf2e5e 1225 mutex_init(&zr->other_lock);
66aa66ea 1226 if (pci_enable_device(pdev))
0ab6e1c3 1227 goto zr_unreg;
abd34d8d 1228 zr->revision = zr->pci_dev->revision;
17faeb20
TP		 1229
1230 dprintk(1,
1231 KERN_INFO
5e098b66 1232 "%s: Zoran ZR360%c7 (rev %d), irq: %d, memory: 0x%08llx\n",
17faeb20 1233 ZR_DEVNAME(zr), zr->revision < 2 ? '5' : '6', zr->revision,
5e098b66 1234 zr->pci_dev->irq, (uint64_t)pci_resource_start(zr->pci_dev, 0));
17faeb20 1235 if (zr->revision >= 2) {
66aa66ea
TP		 1236 dprintk(1,
1237 KERN_INFO
17faeb20
TP		 1238 "%s: Subsystem vendor=0x%04x id=0x%04x\n",
1239 ZR_DEVNAME(zr), zr->pci_dev->subsystem_vendor,
1240 zr->pci_dev->subsystem_device);
1241 }
1da177e4 1242
17faeb20
TP		 1243 /* Use auto-detected card type? */
1244 if (card[nr] == -1) {
1245 if (zr->revision < 2) {
1da177e4
LT		 1246 dprintk(1,
1247 KERN_ERR
17faeb20
TP		 1248 "%s: No card type specified, please use the card=X module parameter\n",
1249 ZR_DEVNAME(zr));
1250 dprintk(1,
1251 KERN_ERR
1252 "%s: It is not possible to auto-detect ZR36057 based cards\n",
1da177e4 1253 ZR_DEVNAME(zr));
0ab6e1c3 1254 goto zr_unreg;
1da177e4
LT		 1255 }
1256
17faeb20
TP		 1257 card_num = ent->driver_data;
1258 if (card_num >= NUM_CARDS) {
1259 dprintk(1,
1260 KERN_ERR
1261 "%s: Unknown card, try specifying card=X module parameter\n",
66aa66ea 1262 ZR_DEVNAME(zr));
0ab6e1c3 1263 goto zr_unreg;
17faeb20
TP		 1264 }
1265 dprintk(3,
1266 KERN_DEBUG
1267 "%s: %s() - card %s detected\n",
1268 ZR_DEVNAME(zr), __func__, zoran_cards[card_num].name);
1269 } else {
1270 card_num = card[nr];
1271 if (card_num >= NUM_CARDS || card_num < 0) {
1272 dprintk(1,
1273 KERN_ERR
1274 "%s: User specified card type %d out of range (0 .. %d)\n",
1275 ZR_DEVNAME(zr), card_num, NUM_CARDS - 1);
0ab6e1c3 1276 goto zr_unreg;
1da177e4 1277 }
66aa66ea 1278 }
1da177e4 1279
66aa66ea
TP		 1280 /* even though we make this a non pointer and thus
1281 * theoretically allow for making changes to this struct
1282 * on a per-individual card basis at runtime, this is
1283 * strongly discouraged. This structure is intended to
1284 * keep general card information, no settings or anything */
1285 zr->card = zoran_cards[card_num];
1286 snprintf(ZR_DEVNAME(zr), sizeof(ZR_DEVNAME(zr)),
1287 "%s[%u]", zr->card.name, zr->id);
1288
5e098b66 1289 zr->zr36057_mem = pci_ioremap_bar(zr->pci_dev, 0);
66aa66ea 1290 if (!zr->zr36057_mem) {
c61402ba 1291 dprintk(1, KERN_ERR "%s: %s() - ioremap failed\n",
5e098b66 1292 ZR_DEVNAME(zr), __func__);
0ab6e1c3 1293 goto zr_unreg;
66aa66ea 1294 }
1da177e4 1295
66aa66ea
TP		 1296 result = request_irq(zr->pci_dev->irq, zoran_irq,
1297 IRQF_SHARED | IRQF_DISABLED, ZR_DEVNAME(zr), zr);
1298 if (result < 0) {
1299 if (result == -EINVAL) {
1300 dprintk(1,
1301 KERN_ERR
c61402ba
TP		 1302 "%s: %s - bad irq number or handler\n",
1303 ZR_DEVNAME(zr), __func__);
66aa66ea
TP		 1304 } else if (result == -EBUSY) {
1305 dprintk(1,
1306 KERN_ERR
c61402ba
TP		 1307 "%s: %s - IRQ %d busy, change your PnP config in BIOS\n",
1308 ZR_DEVNAME(zr), __func__, zr->pci_dev->irq);
1da177e4 1309 } else {
66aa66ea
TP		 1310 dprintk(1,
1311 KERN_ERR
c61402ba
TP		 1312 "%s: %s - can't assign irq, error code %d\n",
1313 ZR_DEVNAME(zr), __func__, result);
1da177e4 1314 }
66aa66ea
TP		 1315 goto zr_unmap;
1316 }
1da177e4 1317
66aa66ea
TP		 1318 /* set PCI latency timer */
1319 pci_read_config_byte(zr->pci_dev, PCI_LATENCY_TIMER,
1320 &latency);
1321 need_latency = zr->revision > 1 ? 32 : 48;
1322 if (latency != need_latency) {
c61402ba 1323 dprintk(2, KERN_INFO "%s: Changing PCI latency from %d to %d\n",
66aa66ea
TP		 1324 ZR_DEVNAME(zr), latency, need_latency);
1325 pci_write_config_byte(zr->pci_dev, PCI_LATENCY_TIMER,
1326 need_latency);
1327 }
1da177e4 1328
66aa66ea
TP		 1329 zr36057_restart(zr);
1330 /* i2c */
1331 dprintk(2, KERN_INFO "%s: Initializing i2c bus...\n",
1332 ZR_DEVNAME(zr));
1333
66aa66ea 1334 if (zoran_register_i2c(zr) < 0) {
c61402ba
TP		 1335 dprintk(1, KERN_ERR "%s: %s - can't initialize i2c bus\n",
1336 ZR_DEVNAME(zr), __func__);
66aa66ea
TP		 1337 goto zr_free_irq;
1338 }
1da177e4 1339
53dacb15 1340 zr->decoder = v4l2_i2c_new_subdev(&zr->v4l2_dev,
9a1f8b34 1341 &zr->i2c_adapter, zr->card.i2c_decoder,
53dacb15 1342 0, zr->card.addrs_decoder);
0ab6e1c3 1343
99f7d81b 1344 if (zr->card.i2c_encoder)
53dacb15 1345 zr->encoder = v4l2_i2c_new_subdev(&zr->v4l2_dev,
9a1f8b34 1346 &zr->i2c_adapter, zr->card.i2c_encoder,
53dacb15 1347 0, zr->card.addrs_encoder);
0ab6e1c3 1348
66aa66ea
TP		 1349 dprintk(2,
1350 KERN_INFO "%s: Initializing videocodec bus...\n",
1351 ZR_DEVNAME(zr));
1352
1353 if (zr->card.video_codec) {
1354 codec_name = codecid_to_modulename(zr->card.video_codec);
1355 if (codec_name) {
1356 result = request_module(codec_name);
1357 if (result) {
1da177e4
LT		 1358 dprintk(1,
1359 KERN_ERR
1360 "%s: failed to load modules %s: %d\n",
1361 ZR_DEVNAME(zr), codec_name, result);
1362 }
1363 }
66aa66ea
TP		 1364 }
1365 if (zr->card.video_vfe) {
1366 vfe_name = codecid_to_modulename(zr->card.video_vfe);
1367 if (vfe_name) {
1368 result = request_module(vfe_name);
1369 if (result < 0) {
1da177e4
LT		 1370 dprintk(1,
1371 KERN_ERR
1372 "%s: failed to load modules %s: %d\n",
1373 ZR_DEVNAME(zr), vfe_name, result);
1374 }
1375 }
66aa66ea 1376 }
1da177e4 1377
66aa66ea
TP		 1378 /* reset JPEG codec */
1379 jpeg_codec_sleep(zr, 1);
1380 jpeg_codec_reset(zr);
1381 /* video bus enabled */
1382 /* display codec revision */
1383 if (zr->card.video_codec != 0) {
1384 master_codec = zoran_setup_videocodec(zr, zr->card.video_codec);
1385 if (!master_codec)
1386 goto zr_unreg_i2c;
1387 zr->codec = videocodec_attach(master_codec);
1388 if (!zr->codec) {
c61402ba
TP		 1389 dprintk(1, KERN_ERR "%s: %s - no codec found\n",
1390 ZR_DEVNAME(zr), __func__);
66aa66ea 1391 goto zr_free_codec;
1da177e4 1392 }
66aa66ea 1393 if (zr->codec->type != zr->card.video_codec) {
c61402ba
TP		 1394 dprintk(1, KERN_ERR "%s: %s - wrong codec\n",
1395 ZR_DEVNAME(zr), __func__);
66aa66ea 1396 goto zr_detach_codec;
1da177e4 1397 }
1da177e4 1398 }
66aa66ea
TP		 1399 if (zr->card.video_vfe != 0) {
1400 master_vfe = zoran_setup_videocodec(zr, zr->card.video_vfe);
1401 if (!master_vfe)
1402 goto zr_detach_codec;
1403 zr->vfe = videocodec_attach(master_vfe);
1404 if (!zr->vfe) {
c61402ba
TP		 1405 dprintk(1, KERN_ERR "%s: %s - no VFE found\n",
1406 ZR_DEVNAME(zr), __func__);
66aa66ea
TP		 1407 goto zr_free_vfe;
1408 }
1409 if (zr->vfe->type != zr->card.video_vfe) {
c61402ba
TP		 1410 dprintk(1, KERN_ERR "%s: %s = wrong VFE\n",
1411 ZR_DEVNAME(zr), __func__);
66aa66ea
TP		 1412 goto zr_detach_vfe;
1413 }
1414 }
e491cbc8 1415
66aa66ea
TP		 1416 /* take care of Natoma chipset and a revision 1 zr36057 */
1417 if ((pci_pci_problems & PCIPCI_NATOMA) && zr->revision <= 1) {
1418 zr->jpg_buffers.need_contiguous = 1;
c61402ba 1419 dprintk(1, KERN_INFO
66aa66ea
TP		 1420 "%s: ZR36057/Natoma bug, max. buffer size is 128K\n",
1421 ZR_DEVNAME(zr));
1da177e4 1422 }
66aa66ea
TP		 1423
1424 if (zr36057_init(zr) < 0)
1425 goto zr_detach_vfe;
1426
1427 zoran_proc_init(zr);
1428
66aa66ea
TP		 1429 return 0;
1430
1431zr_detach_vfe:
1432 videocodec_detach(zr->vfe);
1433zr_free_vfe:
1434 kfree(master_vfe);
1435zr_detach_codec:
1436 videocodec_detach(zr->codec);
1437zr_free_codec:
1438 kfree(master_codec);
1439zr_unreg_i2c:
1440 zoran_unregister_i2c(zr);
1441zr_free_irq:
1442 btwrite(0, ZR36057_SPGPPCR);
1443 free_irq(zr->pci_dev->irq, zr);
1444zr_unmap:
1445 iounmap(zr->zr36057_mem);
0ab6e1c3
HV		 1446zr_unreg:
1447 v4l2_device_unregister(&zr->v4l2_dev);
66aa66ea
TP		 1448zr_free_mem:
1449 kfree(zr);
1450
1451 return -ENODEV;
1da177e4
LT		 1452}
1453
66aa66ea
TP		 1454static struct pci_driver zoran_driver = {
1455 .name = "zr36067",
1456 .id_table = zr36067_pci_tbl,
1457 .probe = zoran_probe,
4c62e976 1458 .remove = zoran_remove,
66aa66ea
TP		 1459};
1460
1461static int __init zoran_init(void)
1da177e4 1462{
66aa66ea 1463 int res;
1da177e4 1464
1990d50b
MCC		 1465 printk(KERN_INFO "Zoran MJPEG board driver version %s\n",
1466 ZORAN_VERSION);
1da177e4 1467
1da177e4
LT		 1468 /* check the parameters we have been given, adjust if necessary */
1469 if (v4l_nbufs < 2)
1470 v4l_nbufs = 2;
1471 if (v4l_nbufs > VIDEO_MAX_FRAME)
1472 v4l_nbufs = VIDEO_MAX_FRAME;
1473 /* The user specfies the in KB, we want them in byte
1474 * (and page aligned) */
1475 v4l_bufsize = PAGE_ALIGN(v4l_bufsize * 1024);
1476 if (v4l_bufsize < 32768)
1477 v4l_bufsize = 32768;
1478 /* 2 MB is arbitrary but sufficient for the maximum possible images */
1479 if (v4l_bufsize > 2048 * 1024)
1480 v4l_bufsize = 2048 * 1024;
1481 if (jpg_nbufs < 4)
1482 jpg_nbufs = 4;
1483 if (jpg_nbufs > BUZ_MAX_FRAME)
1484 jpg_nbufs = BUZ_MAX_FRAME;
1485 jpg_bufsize = PAGE_ALIGN(jpg_bufsize * 1024);
1486 if (jpg_bufsize < 8192)
1487 jpg_bufsize = 8192;
1488 if (jpg_bufsize > (512 * 1024))
1489 jpg_bufsize = 512 * 1024;
1490 /* Use parameter for vidmem or try to find a video card */
1491 if (vidmem) {
1492 dprintk(1,
1493 KERN_INFO
1494 "%s: Using supplied video memory base address @ 0x%lx\n",
1495 ZORAN_NAME, vidmem);
1496 }
1497
1da177e4 1498 /* some mainboards might not do PCI-PCI data transfer well */
e355880b 1499 if (pci_pci_problems & (PCIPCI_FAIL|PCIAGP_FAIL|PCIPCI_ALIMAGIK)) {
1da177e4
LT		 1500 dprintk(1,
1501 KERN_WARNING
e355880b 1502 "%s: chipset does not support reliable PCI-PCI DMA\n",
1da177e4
LT		 1503 ZORAN_NAME);
1504 }
1505
66aa66ea
TP		 1506 res = pci_register_driver(&zoran_driver);
1507 if (res) {
1508 dprintk(1,
1509 KERN_ERR
1510 "%s: Unable to register ZR36057 driver\n",
1511 ZORAN_NAME);
1512 return res;
1da177e4
LT		 1513 }
1514
1515 return 0;
1516}
1517
66aa66ea 1518static void __exit zoran_exit(void)
1da177e4 1519{
66aa66ea 1520 pci_unregister_driver(&zoran_driver);
1da177e4
LT		 1521}
1522
66aa66ea
TP		 1523module_init(zoran_init);
1524module_exit(zoran_exit);
kernel source for telekom puls (alcatel/mediatek)