DVB (2440): Fixed mpeg audio on spdif from Nexus-CA card (rev 2.3),
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / dvb / ttpci / av7110.c
CommitLineData
1da177e4
LT
1/*
2 * driver for the SAA7146 based AV110 cards (like the Fujitsu-Siemens DVB)
3 * av7110.c: initialization and demux stuff
4 *
5 * Copyright (C) 1999-2002 Ralph Metzler
6 * & Marcus Metzler for convergence integrated media GmbH
7 *
8 * originally based on code by:
9 * Copyright (C) 1998,1999 Christian Theiss <mistert@rz.fh-augsburg.de>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 *
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
27 *
28 *
29 * the project's page is at http://www.linuxtv.org/dvb/
30 */
31
32
33#include <linux/config.h>
34#include <linux/module.h>
35#include <linux/kmod.h>
36#include <linux/delay.h>
37#include <linux/fs.h>
38#include <linux/timer.h>
39#include <linux/poll.h>
40#include <linux/byteorder/swabb.h>
41#include <linux/smp_lock.h>
42
43#include <linux/kernel.h>
44#include <linux/moduleparam.h>
45#include <linux/sched.h>
46#include <linux/types.h>
47#include <linux/fcntl.h>
48#include <linux/interrupt.h>
49#include <linux/string.h>
50#include <linux/pci.h>
51#include <linux/vmalloc.h>
52#include <linux/firmware.h>
53#include <linux/crc32.h>
54#include <linux/i2c.h>
55
56#include <asm/system.h>
57#include <asm/semaphore.h>
58
59#include <linux/dvb/frontend.h>
60
61#include "dvb_frontend.h"
62
63#include "ttpci-eeprom.h"
64#include "av7110.h"
65#include "av7110_hw.h"
66#include "av7110_av.h"
67#include "av7110_ca.h"
68#include "av7110_ipack.h"
69
70#define TS_WIDTH 376
71#define TS_HEIGHT 512
72#define TS_BUFLEN (TS_WIDTH*TS_HEIGHT)
73#define TS_MAX_PACKETS (TS_BUFLEN/TS_SIZE)
74
75
76int av7110_debug;
77
78static int vidmode = CVBS_RGB_OUT;
79static int pids_off;
80static int adac = DVB_ADAC_TI;
81static int hw_sections;
82static int rgb_on;
83static int volume = 255;
84static int budgetpatch = 0;
85
86module_param_named(debug, av7110_debug, int, 0644);
87MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)");
88module_param(vidmode, int, 0444);
89MODULE_PARM_DESC(vidmode,"analog video out: 0 off, 1 CVBS+RGB (default), 2 CVBS+YC, 3 YC");
90module_param(pids_off, int, 0444);
91MODULE_PARM_DESC(pids_off,"clear video/audio/PCR PID filters when demux is closed");
92module_param(adac, int, 0444);
93MODULE_PARM_DESC(adac,"audio DAC type: 0 TI, 1 CRYSTAL, 2 MSP (use if autodetection fails)");
94module_param(hw_sections, int, 0444);
95MODULE_PARM_DESC(hw_sections, "0 use software section filter, 1 use hardware");
96module_param(rgb_on, int, 0444);
97MODULE_PARM_DESC(rgb_on, "For Siemens DVB-C cards only: Enable RGB control"
98 " signal on SCART pin 16 to switch SCART video mode from CVBS to RGB");
99module_param(volume, int, 0444);
100MODULE_PARM_DESC(volume, "initial volume: default 255 (range 0-255)");
101module_param(budgetpatch, int, 0444);
102MODULE_PARM_DESC(budgetpatch, "use budget-patch hardware modification: default 0 (0 no, 1 autodetect, 2 always)");
103
104static void restart_feeds(struct av7110 *av7110);
105
106static int av7110_num = 0;
107
108#define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \
109{\
110 if (fe_func != NULL) { \
111 av7110_copy = fe_func; \
112 fe_func = av7110_func; \
113 } \
114}
115
116
117static void init_av7110_av(struct av7110 *av7110)
118{
ce18a223 119 int ret;
1da177e4
LT
120 struct saa7146_dev *dev = av7110->dev;
121
122 /* set internal volume control to maximum */
123 av7110->adac_type = DVB_ADAC_TI;
ce18a223 124 ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
7a2fa90f 125 if (ret < 0)
ce18a223 126 printk("dvb-ttpci:cannot set internal volume to maximum:%d\n",ret);
1da177e4 127
ce18a223 128 ret = av7710_set_video_mode(av7110, vidmode);
7a2fa90f 129 if (ret < 0)
ce18a223 130 printk("dvb-ttpci:cannot set video mode:%d\n",ret);
1da177e4
LT
131
132 /* handle different card types */
133 /* remaining inits according to card and frontend type */
134 av7110->analog_tuner_flags = 0;
135 av7110->current_input = 0;
1c13b95c
MS
136 if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000a) {
137 printk("dvb-ttpci: MSP3415 audio DAC @ card %d\n",
138 av7110->dvb_adapter.num);
139 av7110->adac_type = DVB_ADAC_MSP34x5;
140 av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 0); // SPDIF on
141 }
142 else if (i2c_writereg(av7110, 0x20, 0x00, 0x00) == 1) {
1da177e4 143 printk ("dvb-ttpci: Crystal audio DAC @ card %d detected\n",
fdc53a6d 144 av7110->dvb_adapter.num);
1da177e4
LT
145 av7110->adac_type = DVB_ADAC_CRYSTAL;
146 i2c_writereg(av7110, 0x20, 0x01, 0xd2);
147 i2c_writereg(av7110, 0x20, 0x02, 0x49);
148 i2c_writereg(av7110, 0x20, 0x03, 0x00);
149 i2c_writereg(av7110, 0x20, 0x04, 0x00);
150
151 /**
152 * some special handling for the Siemens DVB-C cards...
153 */
154 } else if (0 == av7110_init_analog_module(av7110)) {
155 /* done. */
156 }
157 else if (dev->pci->subsystem_vendor == 0x110a) {
158 printk("dvb-ttpci: DVB-C w/o analog module @ card %d detected\n",
fdc53a6d 159 av7110->dvb_adapter.num);
1da177e4
LT
160 av7110->adac_type = DVB_ADAC_NONE;
161 }
162 else {
163 av7110->adac_type = adac;
164 printk("dvb-ttpci: adac type set to %d @ card %d\n",
1c13b95c 165 av7110->adac_type, av7110->dvb_adapter.num);
1da177e4
LT
166 }
167
1c13b95c 168 if (av7110->adac_type == DVB_ADAC_NONE || av7110->adac_type == DVB_ADAC_MSP34x0) {
1da177e4 169 // switch DVB SCART on
ce18a223 170 ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, MainSwitch, 1, 0);
7a2fa90f 171 if (ret < 0)
ce18a223
WR
172 printk("dvb-ttpci:cannot switch on SCART(Main):%d\n",ret);
173 ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 1);
7a2fa90f 174 if (ret < 0)
ce18a223 175 printk("dvb-ttpci:cannot switch on SCART(AD):%d\n",ret);
1da177e4 176 if (rgb_on &&
6af4ee10
KH
177 ((av7110->dev->pci->subsystem_vendor == 0x110a) ||
178 (av7110->dev->pci->subsystem_vendor == 0x13c2)) &&
179 (av7110->dev->pci->subsystem_device == 0x0000)) {
1da177e4
LT
180 saa7146_setgpio(dev, 1, SAA7146_GPIO_OUTHI); // RGB on, SCART pin 16
181 //saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); // SCARTpin 8
182 }
183 }
184
60edb137
OE
185 if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000e)
186 av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, SpdifSwitch, 1, 0); // SPDIF on
187
ce18a223 188 ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
7a2fa90f 189 if (ret < 0)
ce18a223 190 printk("dvb-ttpci:cannot set volume :%d\n",ret);
1da177e4
LT
191}
192
193static void recover_arm(struct av7110 *av7110)
194{
195 dprintk(4, "%p\n",av7110);
196
197 av7110_bootarm(av7110);
198 msleep(100);
199 restart_feeds(av7110);
200 av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, SetIR, 1, av7110->ir_config);
201}
202
203static void arm_error(struct av7110 *av7110)
204{
205 dprintk(4, "%p\n",av7110);
206
207 av7110->arm_errors++;
208 av7110->arm_ready = 0;
209 recover_arm(av7110);
210}
211
212static void av7110_arm_sync(struct av7110 *av7110)
213{
214 av7110->arm_rmmod = 1;
215 wake_up_interruptible(&av7110->arm_wait);
216
217 while (av7110->arm_thread)
218 msleep(1);
219}
220
221static int arm_thread(void *data)
222{
223 struct av7110 *av7110 = data;
224 u16 newloops = 0;
225 int timeout;
226
227 dprintk(4, "%p\n",av7110);
228
9101e622
MCC
229 lock_kernel();
230 daemonize("arm_mon");
231 sigfillset(&current->blocked);
232 unlock_kernel();
1da177e4
LT
233
234 av7110->arm_thread = current;
235
236 for (;;) {
237 timeout = wait_event_interruptible_timeout(av7110->arm_wait,
238 av7110->arm_rmmod, 5 * HZ);
239 if (-ERESTARTSYS == timeout || av7110->arm_rmmod) {
240 /* got signal or told to quit*/
241 break;
242 }
243
244 if (!av7110->arm_ready)
245 continue;
246
247 if (down_interruptible(&av7110->dcomlock))
248 break;
249
250 newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2);
251 up(&av7110->dcomlock);
252
253 if (newloops == av7110->arm_loops) {
254 printk(KERN_ERR "dvb-ttpci: ARM crashed @ card %d\n",
fdc53a6d 255 av7110->dvb_adapter.num);
1da177e4
LT
256
257 arm_error(av7110);
258 av7710_set_video_mode(av7110, vidmode);
259
260 init_av7110_av(av7110);
261
262 if (down_interruptible(&av7110->dcomlock))
263 break;
264
265 newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2) - 1;
266 up(&av7110->dcomlock);
267 }
268 av7110->arm_loops = newloops;
269 }
270
271 av7110->arm_thread = NULL;
272 return 0;
273}
274
275
1da177e4
LT
276/****************************************************************************
277 * IRQ handling
278 ****************************************************************************/
279
280static int DvbDmxFilterCallback(u8 *buffer1, size_t buffer1_len,
281 u8 *buffer2, size_t buffer2_len,
282 struct dvb_demux_filter *dvbdmxfilter,
283 enum dmx_success success,
284 struct av7110 *av7110)
285{
286 if (!dvbdmxfilter->feed->demux->dmx.frontend)
287 return 0;
288 if (dvbdmxfilter->feed->demux->dmx.frontend->source == DMX_MEMORY_FE)
289 return 0;
290
291 switch (dvbdmxfilter->type) {
292 case DMX_TYPE_SEC:
293 if ((((buffer1[1] << 8) | buffer1[2]) & 0xfff) + 3 != buffer1_len)
294 return 0;
295 if (dvbdmxfilter->doneq) {
296 struct dmx_section_filter *filter = &dvbdmxfilter->filter;
297 int i;
298 u8 xor, neq = 0;
299
300 for (i = 0; i < DVB_DEMUX_MASK_MAX; i++) {
301 xor = filter->filter_value[i] ^ buffer1[i];
302 neq |= dvbdmxfilter->maskandnotmode[i] & xor;
303 }
304 if (!neq)
305 return 0;
306 }
307 return dvbdmxfilter->feed->cb.sec(buffer1, buffer1_len,
308 buffer2, buffer2_len,
309 &dvbdmxfilter->filter,
310 DMX_OK);
311 case DMX_TYPE_TS:
312 if (!(dvbdmxfilter->feed->ts_type & TS_PACKET))
313 return 0;
314 if (dvbdmxfilter->feed->ts_type & TS_PAYLOAD_ONLY)
315 return dvbdmxfilter->feed->cb.ts(buffer1, buffer1_len,
316 buffer2, buffer2_len,
317 &dvbdmxfilter->feed->feed.ts,
318 DMX_OK);
319 else
320 av7110_p2t_write(buffer1, buffer1_len,
321 dvbdmxfilter->feed->pid,
322 &av7110->p2t_filter[dvbdmxfilter->index]);
323 default:
324 return 0;
325 }
326}
327
328
329//#define DEBUG_TIMING
330static inline void print_time(char *s)
331{
332#ifdef DEBUG_TIMING
333 struct timeval tv;
334 do_gettimeofday(&tv);
335 printk("%s: %d.%d\n", s, (int)tv.tv_sec, (int)tv.tv_usec);
336#endif
337}
338
339#define DEBI_READ 0
340#define DEBI_WRITE 1
341static inline void start_debi_dma(struct av7110 *av7110, int dir,
342 unsigned long addr, unsigned int len)
343{
344 dprintk(8, "%c %08lx %u\n", dir == DEBI_READ ? 'R' : 'W', addr, len);
345 if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
346 printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __FUNCTION__);
347 return;
348 }
349
350 SAA7146_ISR_CLEAR(av7110->dev, MASK_19); /* for good measure */
351 SAA7146_IER_ENABLE(av7110->dev, MASK_19);
352 if (len < 5)
353 len = 5; /* we want a real DEBI DMA */
354 if (dir == DEBI_WRITE)
355 iwdebi(av7110, DEBISWAB, addr, 0, (len + 3) & ~3);
356 else
357 irdebi(av7110, DEBISWAB, addr, 0, len);
358}
359
360static void debiirq(unsigned long data)
361{
362 struct av7110 *av7110 = (struct av7110 *) data;
363 int type = av7110->debitype;
364 int handle = (type >> 8) & 0x1f;
365 unsigned int xfer = 0;
366
367 print_time("debi");
368 dprintk(4, "type 0x%04x\n", type);
369
370 if (type == -1) {
371 printk("DEBI irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
372 jiffies, saa7146_read(av7110->dev, PSR),
373 saa7146_read(av7110->dev, SSR));
374 goto debi_done;
375 }
376 av7110->debitype = -1;
377
378 switch (type & 0xff) {
379
380 case DATA_TS_RECORD:
381 dvb_dmx_swfilter_packets(&av7110->demux,
382 (const u8 *) av7110->debi_virt,
383 av7110->debilen / 188);
384 xfer = RX_BUFF;
385 break;
386
387 case DATA_PES_RECORD:
388 if (av7110->demux.recording)
389 av7110_record_cb(&av7110->p2t[handle],
390 (u8 *) av7110->debi_virt,
391 av7110->debilen);
392 xfer = RX_BUFF;
393 break;
394
395 case DATA_IPMPE:
396 case DATA_FSECTION:
397 case DATA_PIPING:
398 if (av7110->handle2filter[handle])
399 DvbDmxFilterCallback((u8 *)av7110->debi_virt,
400 av7110->debilen, NULL, 0,
401 av7110->handle2filter[handle],
402 DMX_OK, av7110);
403 xfer = RX_BUFF;
404 break;
405
406 case DATA_CI_GET:
407 {
408 u8 *data = av7110->debi_virt;
409
410 if ((data[0] < 2) && data[2] == 0xff) {
411 int flags = 0;
412 if (data[5] > 0)
413 flags |= CA_CI_MODULE_PRESENT;
414 if (data[5] > 5)
415 flags |= CA_CI_MODULE_READY;
416 av7110->ci_slot[data[0]].flags = flags;
417 } else
418 ci_get_data(&av7110->ci_rbuffer,
419 av7110->debi_virt,
420 av7110->debilen);
421 xfer = RX_BUFF;
422 break;
423 }
424
425 case DATA_COMMON_INTERFACE:
426 CI_handle(av7110, (u8 *)av7110->debi_virt, av7110->debilen);
427#if 0
428 {
429 int i;
430
431 printk("av7110%d: ", av7110->num);
432 printk("%02x ", *(u8 *)av7110->debi_virt);
433 printk("%02x ", *(1+(u8 *)av7110->debi_virt));
434 for (i = 2; i < av7110->debilen; i++)
435 printk("%02x ", (*(i+(unsigned char *)av7110->debi_virt)));
436 for (i = 2; i < av7110->debilen; i++)
437 printk("%c", chtrans(*(i+(unsigned char *)av7110->debi_virt)));
438
439 printk("\n");
440 }
441#endif
442 xfer = RX_BUFF;
443 break;
444
445 case DATA_DEBUG_MESSAGE:
446 ((s8*)av7110->debi_virt)[Reserved_SIZE - 1] = 0;
447 printk("%s\n", (s8 *) av7110->debi_virt);
448 xfer = RX_BUFF;
449 break;
450
451 case DATA_CI_PUT:
452 dprintk(4, "debi DATA_CI_PUT\n");
453 case DATA_MPEG_PLAY:
454 dprintk(4, "debi DATA_MPEG_PLAY\n");
455 case DATA_BMP_LOAD:
456 dprintk(4, "debi DATA_BMP_LOAD\n");
457 xfer = TX_BUFF;
458 break;
459 default:
460 break;
461 }
462debi_done:
463 spin_lock(&av7110->debilock);
464 if (xfer)
465 iwdebi(av7110, DEBINOSWAP, xfer, 0, 2);
466 ARM_ClearMailBox(av7110);
467 spin_unlock(&av7110->debilock);
468}
469
470/* irq from av7110 firmware writing the mailbox register in the DPRAM */
471static void gpioirq(unsigned long data)
472{
473 struct av7110 *av7110 = (struct av7110 *) data;
474 u32 rxbuf, txbuf;
475 int len;
476
477 if (av7110->debitype != -1)
478 /* we shouldn't get any irq while a debi xfer is running */
479 printk("dvb-ttpci: GPIO0 irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
480 jiffies, saa7146_read(av7110->dev, PSR),
481 saa7146_read(av7110->dev, SSR));
482
483 if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
484 printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __FUNCTION__);
485 BUG(); /* maybe we should try resetting the debi? */
486 }
487
488 spin_lock(&av7110->debilock);
489 ARM_ClearIrq(av7110);
490
491 /* see what the av7110 wants */
492 av7110->debitype = irdebi(av7110, DEBINOSWAP, IRQ_STATE, 0, 2);
493 av7110->debilen = irdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
494 rxbuf = irdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
495 txbuf = irdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
496 len = (av7110->debilen + 3) & ~3;
497
498 print_time("gpio");
499 dprintk(8, "GPIO0 irq 0x%04x %d\n", av7110->debitype, av7110->debilen);
500
501 switch (av7110->debitype & 0xff) {
502
503 case DATA_TS_PLAY:
504 case DATA_PES_PLAY:
505 break;
506
507 case DATA_MPEG_VIDEO_EVENT:
508 {
509 u32 h_ar;
510 struct video_event event;
511
512 av7110->video_size.w = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_WIDTH, 0, 2);
513 h_ar = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_HEIGHT_AR, 0, 2);
514
515 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
516 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
517
518 av7110->video_size.h = h_ar & 0xfff;
519 dprintk(8, "GPIO0 irq: DATA_MPEG_VIDEO_EVENT: w/h/ar = %u/%u/%u\n",
520 av7110->video_size.w,
521 av7110->video_size.h,
522 av7110->video_size.aspect_ratio);
523
524 event.type = VIDEO_EVENT_SIZE_CHANGED;
525 event.u.size.w = av7110->video_size.w;
526 event.u.size.h = av7110->video_size.h;
527 switch ((h_ar >> 12) & 0xf)
528 {
529 case 3:
530 av7110->video_size.aspect_ratio = VIDEO_FORMAT_16_9;
531 event.u.size.aspect_ratio = VIDEO_FORMAT_16_9;
532 av7110->videostate.video_format = VIDEO_FORMAT_16_9;
533 break;
534 case 4:
535 av7110->video_size.aspect_ratio = VIDEO_FORMAT_221_1;
536 event.u.size.aspect_ratio = VIDEO_FORMAT_221_1;
537 av7110->videostate.video_format = VIDEO_FORMAT_221_1;
538 break;
539 default:
540 av7110->video_size.aspect_ratio = VIDEO_FORMAT_4_3;
541 event.u.size.aspect_ratio = VIDEO_FORMAT_4_3;
542 av7110->videostate.video_format = VIDEO_FORMAT_4_3;
543 }
544 dvb_video_add_event(av7110, &event);
545 break;
546 }
547
548 case DATA_CI_PUT:
549 {
550 int avail;
551 struct dvb_ringbuffer *cibuf = &av7110->ci_wbuffer;
552
553 avail = dvb_ringbuffer_avail(cibuf);
554 if (avail <= 2) {
555 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
556 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
557 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
558 break;
559 }
560 len = DVB_RINGBUFFER_PEEK(cibuf, 0) << 8;
561 len |= DVB_RINGBUFFER_PEEK(cibuf, 1);
562 if (avail < len + 2) {
563 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
564 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
565 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
566 break;
567 }
568 DVB_RINGBUFFER_SKIP(cibuf, 2);
569
570 dvb_ringbuffer_read(cibuf, av7110->debi_virt, len, 0);
571
572 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
573 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
574 dprintk(8, "DMA: CI\n");
575 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
576 spin_unlock(&av7110->debilock);
577 wake_up(&cibuf->queue);
578 return;
579 }
580
581 case DATA_MPEG_PLAY:
582 if (!av7110->playing) {
583 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
584 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
585 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
586 break;
587 }
588 len = 0;
589 if (av7110->debitype & 0x100) {
590 spin_lock(&av7110->aout.lock);
591 len = av7110_pes_play(av7110->debi_virt, &av7110->aout, 2048);
592 spin_unlock(&av7110->aout.lock);
593 }
594 if (len <= 0 && (av7110->debitype & 0x200)
595 &&av7110->videostate.play_state != VIDEO_FREEZED) {
596 spin_lock(&av7110->avout.lock);
597 len = av7110_pes_play(av7110->debi_virt, &av7110->avout, 2048);
598 spin_unlock(&av7110->avout.lock);
599 }
600 if (len <= 0) {
601 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
602 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
603 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
604 break;
605 }
606 dprintk(8, "GPIO0 PES_PLAY len=%04x\n", len);
607 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
608 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
609 dprintk(8, "DMA: MPEG_PLAY\n");
610 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
611 spin_unlock(&av7110->debilock);
612 return;
613
614 case DATA_BMP_LOAD:
615 len = av7110->debilen;
616 dprintk(8, "gpio DATA_BMP_LOAD len %d\n", len);
617 if (!len) {
618 av7110->bmp_state = BMP_LOADED;
619 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
620 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
621 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
622 wake_up(&av7110->bmpq);
623 dprintk(8, "gpio DATA_BMP_LOAD done\n");
624 break;
625 }
626 if (len > av7110->bmplen)
627 len = av7110->bmplen;
628 if (len > 2 * 1024)
629 len = 2 * 1024;
630 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
631 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
632 memcpy(av7110->debi_virt, av7110->bmpbuf+av7110->bmpp, len);
633 av7110->bmpp += len;
634 av7110->bmplen -= len;
635 dprintk(8, "gpio DATA_BMP_LOAD DMA len %d\n", len);
636 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE+txbuf, len);
637 spin_unlock(&av7110->debilock);
638 return;
639
640 case DATA_CI_GET:
641 case DATA_COMMON_INTERFACE:
642 case DATA_FSECTION:
643 case DATA_IPMPE:
644 case DATA_PIPING:
645 if (!len || len > 4 * 1024) {
646 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
647 break;
648 }
649 /* fall through */
650
651 case DATA_TS_RECORD:
652 case DATA_PES_RECORD:
653 dprintk(8, "DMA: TS_REC etc.\n");
654 start_debi_dma(av7110, DEBI_READ, DPRAM_BASE+rxbuf, len);
655 spin_unlock(&av7110->debilock);
656 return;
657
658 case DATA_DEBUG_MESSAGE:
659 if (!len || len > 0xff) {
660 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
661 break;
662 }
663 start_debi_dma(av7110, DEBI_READ, Reserved, len);
664 spin_unlock(&av7110->debilock);
665 return;
666
667 case DATA_IRCOMMAND:
03388ae3
OE
668 if (av7110->ir_handler)
669 av7110->ir_handler(av7110,
670 swahw32(irdebi(av7110, DEBINOSWAP, Reserved, 0, 4)));
1da177e4
LT
671 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
672 break;
673
674 default:
675 printk("dvb-ttpci: gpioirq unknown type=%d len=%d\n",
676 av7110->debitype, av7110->debilen);
677 break;
678 }
679 av7110->debitype = -1;
680 ARM_ClearMailBox(av7110);
681 spin_unlock(&av7110->debilock);
682}
683
684
685#ifdef CONFIG_DVB_AV7110_OSD
686static int dvb_osd_ioctl(struct inode *inode, struct file *file,
687 unsigned int cmd, void *parg)
688{
689 struct dvb_device *dvbdev = (struct dvb_device *) file->private_data;
690 struct av7110 *av7110 = (struct av7110 *) dvbdev->priv;
691
692 dprintk(4, "%p\n", av7110);
693
694 if (cmd == OSD_SEND_CMD)
695 return av7110_osd_cmd(av7110, (osd_cmd_t *) parg);
696 if (cmd == OSD_GET_CAPABILITY)
697 return av7110_osd_capability(av7110, (osd_cap_t *) parg);
698
699 return -EINVAL;
700}
701
702
703static struct file_operations dvb_osd_fops = {
704 .owner = THIS_MODULE,
705 .ioctl = dvb_generic_ioctl,
706 .open = dvb_generic_open,
707 .release = dvb_generic_release,
708};
709
710static struct dvb_device dvbdev_osd = {
711 .priv = NULL,
712 .users = 1,
713 .writers = 1,
714 .fops = &dvb_osd_fops,
715 .kernel_ioctl = dvb_osd_ioctl,
716};
717#endif /* CONFIG_DVB_AV7110_OSD */
718
719
720static inline int SetPIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
721 u16 subpid, u16 pcrpid)
722{
723 dprintk(4, "%p\n", av7110);
724
725 if (vpid == 0x1fff || apid == 0x1fff ||
726 ttpid == 0x1fff || subpid == 0x1fff || pcrpid == 0x1fff) {
727 vpid = apid = ttpid = subpid = pcrpid = 0;
728 av7110->pids[DMX_PES_VIDEO] = 0;
729 av7110->pids[DMX_PES_AUDIO] = 0;
730 av7110->pids[DMX_PES_TELETEXT] = 0;
731 av7110->pids[DMX_PES_PCR] = 0;
732 }
733
734 return av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, MultiPID, 5,
735 pcrpid, vpid, apid, ttpid, subpid);
736}
737
ce18a223 738int ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
1da177e4
LT
739 u16 subpid, u16 pcrpid)
740{
ce18a223 741 int ret = 0;
1da177e4
LT
742 dprintk(4, "%p\n", av7110);
743
744 if (down_interruptible(&av7110->pid_mutex))
ce18a223 745 return -ERESTARTSYS;
1da177e4
LT
746
747 if (!(vpid & 0x8000))
748 av7110->pids[DMX_PES_VIDEO] = vpid;
749 if (!(apid & 0x8000))
750 av7110->pids[DMX_PES_AUDIO] = apid;
751 if (!(ttpid & 0x8000))
752 av7110->pids[DMX_PES_TELETEXT] = ttpid;
753 if (!(pcrpid & 0x8000))
754 av7110->pids[DMX_PES_PCR] = pcrpid;
755
756 av7110->pids[DMX_PES_SUBTITLE] = 0;
757
758 if (av7110->fe_synced) {
759 pcrpid = av7110->pids[DMX_PES_PCR];
ce18a223 760 ret = SetPIDs(av7110, vpid, apid, ttpid, subpid, pcrpid);
1da177e4
LT
761 }
762
763 up(&av7110->pid_mutex);
ce18a223 764 return ret;
1da177e4
LT
765}
766
767
768/******************************************************************************
769 * hardware filter functions
770 ******************************************************************************/
771
772static int StartHWFilter(struct dvb_demux_filter *dvbdmxfilter)
773{
774 struct dvb_demux_feed *dvbdmxfeed = dvbdmxfilter->feed;
775 struct av7110 *av7110 = (struct av7110 *) dvbdmxfeed->demux->priv;
776 u16 buf[20];
777 int ret, i;
778 u16 handle;
779// u16 mode = 0x0320;
780 u16 mode = 0xb96a;
781
782 dprintk(4, "%p\n", av7110);
783
784 if (dvbdmxfilter->type == DMX_TYPE_SEC) {
785 if (hw_sections) {
786 buf[4] = (dvbdmxfilter->filter.filter_value[0] << 8) |
787 dvbdmxfilter->maskandmode[0];
788 for (i = 3; i < 18; i++)
789 buf[i + 4 - 2] =
790 (dvbdmxfilter->filter.filter_value[i] << 8) |
791 dvbdmxfilter->maskandmode[i];
792 mode = 4;
793 }
794 } else if ((dvbdmxfeed->ts_type & TS_PACKET) &&
795 !(dvbdmxfeed->ts_type & TS_PAYLOAD_ONLY)) {
796 av7110_p2t_init(&av7110->p2t_filter[dvbdmxfilter->index], dvbdmxfeed);
797 }
798
799 buf[0] = (COMTYPE_PID_FILTER << 8) + AddPIDFilter;
800 buf[1] = 16;
801 buf[2] = dvbdmxfeed->pid;
802 buf[3] = mode;
803
804 ret = av7110_fw_request(av7110, buf, 20, &handle, 1);
805 if (ret != 0 || handle >= 32) {
806 printk("dvb-ttpci: %s error buf %04x %04x %04x %04x "
ce18a223 807 "ret %d handle %04x\n",
1da177e4
LT
808 __FUNCTION__, buf[0], buf[1], buf[2], buf[3],
809 ret, handle);
810 dvbdmxfilter->hw_handle = 0xffff;
ce18a223
WR
811 if (!ret)
812 ret = -1;
813 return ret;
1da177e4
LT
814 }
815
816 av7110->handle2filter[handle] = dvbdmxfilter;
817 dvbdmxfilter->hw_handle = handle;
818
819 return ret;
820}
821
822static int StopHWFilter(struct dvb_demux_filter *dvbdmxfilter)
823{
824 struct av7110 *av7110 = (struct av7110 *) dvbdmxfilter->feed->demux->priv;
825 u16 buf[3];
826 u16 answ[2];
827 int ret;
828 u16 handle;
829
830 dprintk(4, "%p\n", av7110);
831
832 handle = dvbdmxfilter->hw_handle;
833 if (handle >= 32) {
834 printk("%s tried to stop invalid filter %04x, filter type = %x\n",
835 __FUNCTION__, handle, dvbdmxfilter->type);
ce18a223 836 return -EINVAL;
1da177e4
LT
837 }
838
839 av7110->handle2filter[handle] = NULL;
840
841 buf[0] = (COMTYPE_PID_FILTER << 8) + DelPIDFilter;
842 buf[1] = 1;
843 buf[2] = handle;
844 ret = av7110_fw_request(av7110, buf, 3, answ, 2);
845 if (ret != 0 || answ[1] != handle) {
846 printk("dvb-ttpci: %s error cmd %04x %04x %04x ret %x "
847 "resp %04x %04x pid %d\n",
848 __FUNCTION__, buf[0], buf[1], buf[2], ret,
849 answ[0], answ[1], dvbdmxfilter->feed->pid);
ce18a223
WR
850 if (!ret)
851 ret = -1;
1da177e4
LT
852 }
853 return ret;
854}
855
856
ce18a223 857static int dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed)
1da177e4
LT
858{
859 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
860 struct av7110 *av7110 = (struct av7110 *) dvbdmx->priv;
861 u16 *pid = dvbdmx->pids, npids[5];
862 int i;
ce18a223 863 int ret = 0;
1da177e4
LT
864
865 dprintk(4, "%p\n", av7110);
866
867 npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
868 i = dvbdmxfeed->pes_type;
869 npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
870 if ((i == 2) && npids[i] && (dvbdmxfeed->ts_type & TS_PACKET)) {
871 npids[i] = 0;
ce18a223
WR
872 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
873 if (!ret)
874 ret = StartHWFilter(dvbdmxfeed->filter);
875 return ret;
876 }
877 if (dvbdmxfeed->pes_type <= 2 || dvbdmxfeed->pes_type == 4) {
878 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
879 if (ret)
880 return ret;
1da177e4 881 }
1da177e4
LT
882
883 if (dvbdmxfeed->pes_type < 2 && npids[0])
884 if (av7110->fe_synced)
ce18a223
WR
885 {
886 ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
887 if (ret)
888 return ret;
889 }
1da177e4
LT
890
891 if ((dvbdmxfeed->ts_type & TS_PACKET)) {
892 if (dvbdmxfeed->pes_type == 0 && !(dvbdmx->pids[0] & 0x8000))
ce18a223 893 ret = av7110_av_start_record(av7110, RP_AUDIO, dvbdmxfeed);
1da177e4 894 if (dvbdmxfeed->pes_type == 1 && !(dvbdmx->pids[1] & 0x8000))
ce18a223 895 ret = av7110_av_start_record(av7110, RP_VIDEO, dvbdmxfeed);
1da177e4 896 }
ce18a223 897 return ret;
1da177e4
LT
898}
899
ce18a223 900static int dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed)
1da177e4
LT
901{
902 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
903 struct av7110 *av7110 = (struct av7110 *) dvbdmx->priv;
904 u16 *pid = dvbdmx->pids, npids[5];
905 int i;
906
ce18a223
WR
907 int ret = 0;
908
1da177e4
LT
909 dprintk(4, "%p\n", av7110);
910
911 if (dvbdmxfeed->pes_type <= 1) {
ce18a223
WR
912 ret = av7110_av_stop(av7110, dvbdmxfeed->pes_type ? RP_VIDEO : RP_AUDIO);
913 if (ret)
914 return ret;
1da177e4
LT
915 if (!av7110->rec_mode)
916 dvbdmx->recording = 0;
917 if (!av7110->playing)
918 dvbdmx->playing = 0;
919 }
920 npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
921 i = dvbdmxfeed->pes_type;
922 switch (i) {
923 case 2: //teletext
924 if (dvbdmxfeed->ts_type & TS_PACKET)
ce18a223 925 ret = StopHWFilter(dvbdmxfeed->filter);
1da177e4
LT
926 npids[2] = 0;
927 break;
928 case 0:
929 case 1:
930 case 4:
931 if (!pids_off)
ce18a223 932 return 0;
1da177e4
LT
933 npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
934 break;
935 }
ce18a223
WR
936 if (!ret)
937 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
938 return ret;
1da177e4
LT
939}
940
941static int av7110_start_feed(struct dvb_demux_feed *feed)
942{
943 struct dvb_demux *demux = feed->demux;
944 struct av7110 *av7110 = demux->priv;
ce18a223 945 int ret = 0;
1da177e4
LT
946
947 dprintk(4, "%p\n", av7110);
948
949 if (!demux->dmx.frontend)
950 return -EINVAL;
951
952 if (feed->pid > 0x1fff)
953 return -EINVAL;
954
955 if (feed->type == DMX_TYPE_TS) {
956 if ((feed->ts_type & TS_DECODER) &&
957 (feed->pes_type < DMX_TS_PES_OTHER)) {
958 switch (demux->dmx.frontend->source) {
959 case DMX_MEMORY_FE:
960 if (feed->ts_type & TS_DECODER)
961 if (feed->pes_type < 2 &&
962 !(demux->pids[0] & 0x8000) &&
963 !(demux->pids[1] & 0x8000)) {
964 dvb_ringbuffer_flush_spinlock_wakeup(&av7110->avout);
965 dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout);
ce18a223
WR
966 ret = av7110_av_start_play(av7110,RP_AV);
967 if (!ret)
968 demux->playing = 1;
1da177e4
LT
969 }
970 break;
971 default:
ce18a223 972 ret = dvb_feed_start_pid(feed);
1da177e4
LT
973 break;
974 }
975 } else if ((feed->ts_type & TS_PACKET) &&
976 (demux->dmx.frontend->source != DMX_MEMORY_FE)) {
ce18a223 977 ret = StartHWFilter(feed->filter);
1da177e4
LT
978 }
979 }
980
ce18a223 981 else if (feed->type == DMX_TYPE_SEC) {
1da177e4
LT
982 int i;
983
984 for (i = 0; i < demux->filternum; i++) {
985 if (demux->filter[i].state != DMX_STATE_READY)
986 continue;
987 if (demux->filter[i].type != DMX_TYPE_SEC)
988 continue;
989 if (demux->filter[i].filter.parent != &feed->feed.sec)
990 continue;
991 demux->filter[i].state = DMX_STATE_GO;
ce18a223
WR
992 if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
993 ret = StartHWFilter(&demux->filter[i]);
994 if (ret)
995 break;
996 }
1da177e4
LT
997 }
998 }
999
ce18a223 1000 return ret;
1da177e4
LT
1001}
1002
1003
1004static int av7110_stop_feed(struct dvb_demux_feed *feed)
1005{
1006 struct dvb_demux *demux = feed->demux;
1007 struct av7110 *av7110 = demux->priv;
12ba0504 1008 int i, rc, ret = 0;
1da177e4
LT
1009 dprintk(4, "%p\n", av7110);
1010
1011 if (feed->type == DMX_TYPE_TS) {
1012 if (feed->ts_type & TS_DECODER) {
1013 if (feed->pes_type >= DMX_TS_PES_OTHER ||
1014 !demux->pesfilter[feed->pes_type])
1015 return -EINVAL;
1016 demux->pids[feed->pes_type] |= 0x8000;
1017 demux->pesfilter[feed->pes_type] = NULL;
1018 }
1019 if (feed->ts_type & TS_DECODER &&
1020 feed->pes_type < DMX_TS_PES_OTHER) {
ce18a223 1021 ret = dvb_feed_stop_pid(feed);
1da177e4
LT
1022 } else
1023 if ((feed->ts_type & TS_PACKET) &&
1024 (demux->dmx.frontend->source != DMX_MEMORY_FE))
ce18a223 1025 ret = StopHWFilter(feed->filter);
1da177e4
LT
1026 }
1027
ce18a223 1028 if (!ret && feed->type == DMX_TYPE_SEC) {
12ba0504 1029 for (i = 0; i<demux->filternum; i++) {
1da177e4
LT
1030 if (demux->filter[i].state == DMX_STATE_GO &&
1031 demux->filter[i].filter.parent == &feed->feed.sec) {
1032 demux->filter[i].state = DMX_STATE_READY;
ce18a223 1033 if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
12ba0504
JS
1034 rc = StopHWFilter(&demux->filter[i]);
1035 if (!ret)
1036 ret = rc;
1037 /* keep going, stop as many filters as possible */
ce18a223 1038 }
12ba0504 1039 }
1da177e4
LT
1040 }
1041 }
1042
ce18a223 1043 return ret;
1da177e4
LT
1044}
1045
1046
1047static void restart_feeds(struct av7110 *av7110)
1048{
1049 struct dvb_demux *dvbdmx = &av7110->demux;
1050 struct dvb_demux_feed *feed;
1051 int mode;
1052 int i;
1053
1054 dprintk(4, "%p\n", av7110);
1055
1056 mode = av7110->playing;
1057 av7110->playing = 0;
1058 av7110->rec_mode = 0;
1059
1060 for (i = 0; i < dvbdmx->filternum; i++) {
1061 feed = &dvbdmx->feed[i];
1062 if (feed->state == DMX_STATE_GO)
1063 av7110_start_feed(feed);
1064 }
1065
1066 if (mode)
1067 av7110_av_start_play(av7110, mode);
1068}
1069
1070static int dvb_get_stc(struct dmx_demux *demux, unsigned int num,
1071 uint64_t *stc, unsigned int *base)
1072{
1073 int ret;
1074 u16 fwstc[4];
1075 u16 tag = ((COMTYPE_REQUEST << 8) + ReqSTC);
1076 struct dvb_demux *dvbdemux;
1077 struct av7110 *av7110;
1078
1079 /* pointer casting paranoia... */
1080 if (!demux)
1081 BUG();
1082 dvbdemux = (struct dvb_demux *) demux->priv;
1083 if (!dvbdemux)
1084 BUG();
1085 av7110 = (struct av7110 *) dvbdemux->priv;
1086
1087 dprintk(4, "%p\n", av7110);
1088
1089 if (num != 0)
1090 return -EINVAL;
1091
1092 ret = av7110_fw_request(av7110, &tag, 0, fwstc, 4);
1093 if (ret) {
1094 printk(KERN_ERR "%s: av7110_fw_request error\n", __FUNCTION__);
ce18a223 1095 return ret;
1da177e4
LT
1096 }
1097 dprintk(2, "fwstc = %04hx %04hx %04hx %04hx\n",
1098 fwstc[0], fwstc[1], fwstc[2], fwstc[3]);
1099
1100 *stc = (((uint64_t) ((fwstc[3] & 0x8000) >> 15)) << 32) |
1101 (((uint64_t) fwstc[1]) << 16) | ((uint64_t) fwstc[0]);
1102 *base = 1;
1103
1104 dprintk(4, "stc = %lu\n", (unsigned long)*stc);
1105
1106 return 0;
1107}
1108
1109
1110/******************************************************************************
1111 * SEC device file operations
1112 ******************************************************************************/
1113
1114
1115static int av7110_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
1116{
1117 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1118
1119 switch (tone) {
1120 case SEC_TONE_ON:
ce18a223 1121 return Set22K(av7110, 1);
1da177e4
LT
1122
1123 case SEC_TONE_OFF:
ce18a223 1124 return Set22K(av7110, 0);
1da177e4
LT
1125
1126 default:
1127 return -EINVAL;
1128 }
1da177e4
LT
1129}
1130
1131static int av7110_diseqc_send_master_cmd(struct dvb_frontend* fe,
1132 struct dvb_diseqc_master_cmd* cmd)
1133{
1134 struct av7110* av7110 = fe->dvb->priv;
1135
ce18a223 1136 return av7110_diseqc_send(av7110, cmd->msg_len, cmd->msg, -1);
1da177e4
LT
1137}
1138
1139static int av7110_diseqc_send_burst(struct dvb_frontend* fe,
1140 fe_sec_mini_cmd_t minicmd)
1141{
1142 struct av7110* av7110 = fe->dvb->priv;
1143
ce18a223 1144 return av7110_diseqc_send(av7110, 0, NULL, minicmd);
1da177e4
LT
1145}
1146
1147/* simplified code from budget-core.c */
1148static int stop_ts_capture(struct av7110 *budget)
1149{
1150 dprintk(2, "budget: %p\n", budget);
1151
1152 if (--budget->feeding1)
1153 return budget->feeding1;
1154 saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */
1155 SAA7146_IER_DISABLE(budget->dev, MASK_10);
1156 SAA7146_ISR_CLEAR(budget->dev, MASK_10);
1157 return 0;
1158}
1159
1160static int start_ts_capture(struct av7110 *budget)
1161{
1162 dprintk(2, "budget: %p\n", budget);
1163
1164 if (budget->feeding1)
1165 return ++budget->feeding1;
1166 memset(budget->grabbing, 0x00, TS_HEIGHT * TS_WIDTH);
1167 budget->tsf = 0xff;
1168 budget->ttbp = 0;
1169 SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */
1170 saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */
1171 return ++budget->feeding1;
1172}
1173
1174static int budget_start_feed(struct dvb_demux_feed *feed)
1175{
1176 struct dvb_demux *demux = feed->demux;
1177 struct av7110 *budget = (struct av7110 *) demux->priv;
1178 int status;
1179
1180 dprintk(2, "av7110: %p\n", budget);
1181
1182 spin_lock(&budget->feedlock1);
1183 feed->pusi_seen = 0; /* have a clean section start */
1184 status = start_ts_capture(budget);
1185 spin_unlock(&budget->feedlock1);
1186 return status;
1187}
1188
1189static int budget_stop_feed(struct dvb_demux_feed *feed)
1190{
1191 struct dvb_demux *demux = feed->demux;
1192 struct av7110 *budget = (struct av7110 *) demux->priv;
1193 int status;
1194
1195 dprintk(2, "budget: %p\n", budget);
1196
1197 spin_lock(&budget->feedlock1);
1198 status = stop_ts_capture(budget);
1199 spin_unlock(&budget->feedlock1);
1200 return status;
1201}
1202
1203static void vpeirq(unsigned long data)
1204{
1205 struct av7110 *budget = (struct av7110 *) data;
1206 u8 *mem = (u8 *) (budget->grabbing);
1207 u32 olddma = budget->ttbp;
1208 u32 newdma = saa7146_read(budget->dev, PCI_VDP3);
1209
1210 if (!budgetpatch) {
1211 printk("av7110.c: vpeirq() called while budgetpatch disabled!"
1212 " check saa7146 IER register\n");
1213 BUG();
1214 }
1215 /* nearest lower position divisible by 188 */
1216 newdma -= newdma % 188;
1217
1218 if (newdma >= TS_BUFLEN)
1219 return;
1220
1221 budget->ttbp = newdma;
1222
1223 if (!budget->feeding1 || (newdma == olddma))
1224 return;
1225
1226#if 0
1227 /* track rps1 activity */
1228 printk("vpeirq: %02x Event Counter 1 0x%04x\n",
1229 mem[olddma],
1230 saa7146_read(budget->dev, EC1R) & 0x3fff);
1231#endif
1232
1233 if (newdma > olddma)
1234 /* no wraparound, dump olddma..newdma */
1235 dvb_dmx_swfilter_packets(&budget->demux1, mem + olddma, (newdma - olddma) / 188);
1236 else {
1237 /* wraparound, dump olddma..buflen and 0..newdma */
1238 dvb_dmx_swfilter_packets(&budget->demux1, mem + olddma, (TS_BUFLEN - olddma) / 188);
1239 dvb_dmx_swfilter_packets(&budget->demux1, mem, newdma / 188);
1240 }
1241}
1242
1243static int av7110_register(struct av7110 *av7110)
1244{
1245 int ret, i;
1246 struct dvb_demux *dvbdemux = &av7110->demux;
1247 struct dvb_demux *dvbdemux1 = &av7110->demux1;
1248
1249 dprintk(4, "%p\n", av7110);
1250
1251 if (av7110->registered)
1252 return -1;
1253
1254 av7110->registered = 1;
1255
1256 dvbdemux->priv = (void *) av7110;
1257
1258 for (i = 0; i < 32; i++)
1259 av7110->handle2filter[i] = NULL;
1260
1261 dvbdemux->filternum = 32;
1262 dvbdemux->feednum = 32;
1263 dvbdemux->start_feed = av7110_start_feed;
1264 dvbdemux->stop_feed = av7110_stop_feed;
1265 dvbdemux->write_to_decoder = av7110_write_to_decoder;
1266 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1267 DMX_MEMORY_BASED_FILTERING);
1268
1269 dvb_dmx_init(&av7110->demux);
1270 av7110->demux.dmx.get_stc = dvb_get_stc;
1271
1272 av7110->dmxdev.filternum = 32;
1273 av7110->dmxdev.demux = &dvbdemux->dmx;
1274 av7110->dmxdev.capabilities = 0;
1275
fdc53a6d 1276 dvb_dmxdev_init(&av7110->dmxdev, &av7110->dvb_adapter);
1da177e4
LT
1277
1278 av7110->hw_frontend.source = DMX_FRONTEND_0;
1279
1280 ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
1281
1282 if (ret < 0)
1283 return ret;
1284
1285 av7110->mem_frontend.source = DMX_MEMORY_FE;
1286
1287 ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
1288
1289 if (ret < 0)
1290 return ret;
1291
1292 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx,
1293 &av7110->hw_frontend);
1294 if (ret < 0)
1295 return ret;
1296
1297 av7110_av_register(av7110);
1298 av7110_ca_register(av7110);
1299
1300#ifdef CONFIG_DVB_AV7110_OSD
fdc53a6d 1301 dvb_register_device(&av7110->dvb_adapter, &av7110->osd_dev,
1da177e4
LT
1302 &dvbdev_osd, av7110, DVB_DEVICE_OSD);
1303#endif
1304
fdc53a6d 1305 dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net, &dvbdemux->dmx);
1da177e4
LT
1306
1307 if (budgetpatch) {
1308 /* initialize software demux1 without its own frontend
1309 * demux1 hardware is connected to frontend0 of demux0
1310 */
1311 dvbdemux1->priv = (void *) av7110;
1312
1313 dvbdemux1->filternum = 256;
1314 dvbdemux1->feednum = 256;
1315 dvbdemux1->start_feed = budget_start_feed;
1316 dvbdemux1->stop_feed = budget_stop_feed;
1317 dvbdemux1->write_to_decoder = NULL;
1318
1319 dvbdemux1->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1320 DMX_MEMORY_BASED_FILTERING);
1321
1322 dvb_dmx_init(&av7110->demux1);
1323
1324 av7110->dmxdev1.filternum = 256;
1325 av7110->dmxdev1.demux = &dvbdemux1->dmx;
1326 av7110->dmxdev1.capabilities = 0;
1327
fdc53a6d 1328 dvb_dmxdev_init(&av7110->dmxdev1, &av7110->dvb_adapter);
1da177e4 1329
fdc53a6d 1330 dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net1, &dvbdemux1->dmx);
1da177e4
LT
1331 printk("dvb-ttpci: additional demux1 for budget-patch registered\n");
1332 }
1333 return 0;
1334}
1335
1336
1337static void dvb_unregister(struct av7110 *av7110)
1338{
1339 struct dvb_demux *dvbdemux = &av7110->demux;
1340 struct dvb_demux *dvbdemux1 = &av7110->demux1;
1341
1342 dprintk(4, "%p\n", av7110);
1343
1344 if (!av7110->registered)
1345 return;
1346
1347 if (budgetpatch) {
1348 dvb_net_release(&av7110->dvb_net1);
1349 dvbdemux->dmx.close(&dvbdemux1->dmx);
1350 dvb_dmxdev_release(&av7110->dmxdev1);
1351 dvb_dmx_release(&av7110->demux1);
1352 }
1353
1354 dvb_net_release(&av7110->dvb_net);
1355
1356 dvbdemux->dmx.close(&dvbdemux->dmx);
1357 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
1358 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
1359
1360 dvb_dmxdev_release(&av7110->dmxdev);
1361 dvb_dmx_release(&av7110->demux);
1362
1363 if (av7110->fe != NULL)
1364 dvb_unregister_frontend(av7110->fe);
1365 dvb_unregister_device(av7110->osd_dev);
1366 av7110_av_unregister(av7110);
1367 av7110_ca_unregister(av7110);
1368}
1369
1370
1371/****************************************************************************
1372 * I2C client commands
1373 ****************************************************************************/
1374
1375int i2c_writereg(struct av7110 *av7110, u8 id, u8 reg, u8 val)
1376{
1377 u8 msg[2] = { reg, val };
1378 struct i2c_msg msgs;
1379
1380 msgs.flags = 0;
1381 msgs.addr = id / 2;
1382 msgs.len = 2;
1383 msgs.buf = msg;
1384 return i2c_transfer(&av7110->i2c_adap, &msgs, 1);
1385}
1386
1387#if 0
1388u8 i2c_readreg(struct av7110 *av7110, u8 id, u8 reg)
1389{
1390 u8 mm1[] = {0x00};
1391 u8 mm2[] = {0x00};
1392 struct i2c_msg msgs[2];
1393
1394 msgs[0].flags = 0;
1395 msgs[1].flags = I2C_M_RD;
1396 msgs[0].addr = msgs[1].addr = id / 2;
1397 mm1[0] = reg;
1398 msgs[0].len = 1; msgs[1].len = 1;
1399 msgs[0].buf = mm1; msgs[1].buf = mm2;
1400 i2c_transfer(&av7110->i2c_adap, msgs, 2);
1401
1402 return mm2[0];
1403}
1404#endif
1405
1406/****************************************************************************
1407 * INITIALIZATION
1408 ****************************************************************************/
1409
1410
1411static int check_firmware(struct av7110* av7110)
1412{
1413 u32 crc = 0, len = 0;
1414 unsigned char *ptr;
1415
1416 /* check for firmware magic */
1417 ptr = av7110->bin_fw;
1418 if (ptr[0] != 'A' || ptr[1] != 'V' ||
1419 ptr[2] != 'F' || ptr[3] != 'W') {
1420 printk("dvb-ttpci: this is not an av7110 firmware\n");
1421 return -EINVAL;
1422 }
1423 ptr += 4;
1424
1425 /* check dpram file */
1426 crc = ntohl(*(u32*) ptr);
1427 ptr += 4;
1428 len = ntohl(*(u32*) ptr);
1429 ptr += 4;
1430 if (len >= 512) {
1431 printk("dvb-ttpci: dpram file is way to big.\n");
1432 return -EINVAL;
1433 }
1434 if (crc != crc32_le(0, ptr, len)) {
1435 printk("dvb-ttpci: crc32 of dpram file does not match.\n");
1436 return -EINVAL;
1437 }
1438 av7110->bin_dpram = ptr;
1439 av7110->size_dpram = len;
1440 ptr += len;
1441
1442 /* check root file */
1443 crc = ntohl(*(u32*) ptr);
1444 ptr += 4;
1445 len = ntohl(*(u32*) ptr);
1446 ptr += 4;
1447
1448 if (len <= 200000 || len >= 300000 ||
1449 len > ((av7110->bin_fw + av7110->size_fw) - ptr)) {
1450 printk("dvb-ttpci: root file has strange size (%d). aborting.\n", len);
1451 return -EINVAL;
1452 }
1453 if( crc != crc32_le(0, ptr, len)) {
1454 printk("dvb-ttpci: crc32 of root file does not match.\n");
1455 return -EINVAL;
1456 }
1457 av7110->bin_root = ptr;
1458 av7110->size_root = len;
1459 return 0;
1460}
1461
1462#ifdef CONFIG_DVB_AV7110_FIRMWARE_FILE
1463#include "av7110_firm.h"
1464static void put_firmware(struct av7110* av7110)
1465{
1466 av7110->bin_fw = NULL;
1467}
1468
1469static inline int get_firmware(struct av7110* av7110)
1470{
1471 av7110->bin_fw = dvb_ttpci_fw;
1472 av7110->size_fw = sizeof(dvb_ttpci_fw);
1473 return check_firmware(av7110);
1474}
1475#else
1476static void put_firmware(struct av7110* av7110)
1477{
1478 vfree(av7110->bin_fw);
1479}
1480
1481static int get_firmware(struct av7110* av7110)
1482{
1483 int ret;
1484 const struct firmware *fw;
1485
1486 /* request the av7110 firmware, this will block until someone uploads it */
1487 ret = request_firmware(&fw, "dvb-ttpci-01.fw", &av7110->dev->pci->dev);
1488 if (ret) {
1489 if (ret == -ENOENT) {
1490 printk(KERN_ERR "dvb-ttpci: could not load firmware,"
1491 " file not found: dvb-ttpci-01.fw\n");
1492 printk(KERN_ERR "dvb-ttpci: usually this should be in"
1493 " /usr/lib/hotplug/firmware\n");
1494 printk(KERN_ERR "dvb-ttpci: and can be downloaded here"
1495 " http://www.linuxtv.org/download/dvb/firmware/\n");
1496 } else
1497 printk(KERN_ERR "dvb-ttpci: cannot request firmware"
1498 " (error %i)\n", ret);
1499 return -EINVAL;
1500 }
1501
1502 if (fw->size <= 200000) {
1503 printk("dvb-ttpci: this firmware is way too small.\n");
1504 release_firmware(fw);
1505 return -EINVAL;
1506 }
1507
1508 /* check if the firmware is available */
1509 av7110->bin_fw = (unsigned char *) vmalloc(fw->size);
1510 if (NULL == av7110->bin_fw) {
1511 dprintk(1, "out of memory\n");
1512 release_firmware(fw);
1513 return -ENOMEM;
1514 }
1515
1516 memcpy(av7110->bin_fw, fw->data, fw->size);
1517 av7110->size_fw = fw->size;
1518 if ((ret = check_firmware(av7110)))
1519 vfree(av7110->bin_fw);
1520
1521 release_firmware(fw);
1522 return ret;
1523}
1524#endif
1525
1526
1527static int alps_bsrv2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1528{
1529 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1530 u8 pwr = 0;
1531 u8 buf[4];
1532 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
1533 u32 div = (params->frequency + 479500) / 125;
1534
1535 if (params->frequency > 2000000) pwr = 3;
1536 else if (params->frequency > 1800000) pwr = 2;
1537 else if (params->frequency > 1600000) pwr = 1;
1538 else if (params->frequency > 1200000) pwr = 0;
1539 else if (params->frequency >= 1100000) pwr = 1;
1540 else pwr = 2;
1541
1542 buf[0] = (div >> 8) & 0x7f;
1543 buf[1] = div & 0xff;
1544 buf[2] = ((div & 0x18000) >> 10) | 0x95;
1545 buf[3] = (pwr << 6) | 0x30;
1546
9101e622 1547 // NOTE: since we're using a prescaler of 2, we set the
1da177e4
LT
1548 // divisor frequency to 62.5kHz and divide by 125 above
1549
1550 if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1)
1551 return -EIO;
1552 return 0;
1553}
1554
1555static struct ves1x93_config alps_bsrv2_config = {
1556 .demod_address = 0x08,
1557 .xin = 90100000UL,
1558 .invert_pwm = 0,
1559 .pll_set = alps_bsrv2_pll_set,
1560};
1561
1562
1563static u8 alps_bsru6_inittab[] = {
1564 0x01, 0x15,
1565 0x02, 0x30,
1566 0x03, 0x00,
1567 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
1568 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
1569 0x06, 0x40, /* DAC not used, set to high impendance mode */
1570 0x07, 0x00, /* DAC LSB */
1571 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
1572 0x09, 0x00, /* FIFO */
1573 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
1574 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
1575 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
1576 0x10, 0x3f, // AGC2 0x3d
1577 0x11, 0x84,
ff29d06a 1578 0x12, 0xb9,
1da177e4
LT
1579 0x15, 0xc9, // lock detector threshold
1580 0x16, 0x00,
1581 0x17, 0x00,
1582 0x18, 0x00,
1583 0x19, 0x00,
1584 0x1a, 0x00,
1585 0x1f, 0x50,
1586 0x20, 0x00,
1587 0x21, 0x00,
1588 0x22, 0x00,
1589 0x23, 0x00,
1590 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
1591 0x29, 0x1e, // 1/2 threshold
1592 0x2a, 0x14, // 2/3 threshold
1593 0x2b, 0x0f, // 3/4 threshold
1594 0x2c, 0x09, // 5/6 threshold
1595 0x2d, 0x05, // 7/8 threshold
1596 0x2e, 0x01,
1597 0x31, 0x1f, // test all FECs
1598 0x32, 0x19, // viterbi and synchro search
1599 0x33, 0xfc, // rs control
1600 0x34, 0x93, // error control
1601 0x0f, 0x52,
1602 0xff, 0xff
1603};
1604
1605static int alps_bsru6_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
1606{
1607 u8 aclk = 0;
1608 u8 bclk = 0;
1609
1610 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
1611 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
1612 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
1613 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
1614 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
1615 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
1616
1617 stv0299_writereg(fe, 0x13, aclk);
1618 stv0299_writereg(fe, 0x14, bclk);
1619 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
1620 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
1621 stv0299_writereg(fe, 0x21, (ratio ) & 0xf0);
1622
1623 return 0;
1624}
1625
cfbfce15 1626static int alps_bsru6_pll_set(struct dvb_frontend* fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters* params)
1da177e4 1627{
1da177e4
LT
1628 int ret;
1629 u8 data[4];
1630 u32 div;
1631 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1632
1633 if ((params->frequency < 950000) || (params->frequency > 2150000))
1634 return -EINVAL;
1635
1636 div = (params->frequency + (125 - 1)) / 125; // round correctly
1637 data[0] = (div >> 8) & 0x7f;
1638 data[1] = div & 0xff;
1639 data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
1640 data[3] = 0xC4;
1641
1642 if (params->frequency > 1530000) data[3] = 0xc0;
1643
cfbfce15 1644 ret = i2c_transfer(i2c, &msg, 1);
1da177e4
LT
1645 if (ret != 1)
1646 return -EIO;
1647 return 0;
1648}
1649
1650static struct stv0299_config alps_bsru6_config = {
1651
1652 .demod_address = 0x68,
1653 .inittab = alps_bsru6_inittab,
1654 .mclk = 88000000UL,
1655 .invert = 1,
1da177e4
LT
1656 .skip_reinit = 0,
1657 .lock_output = STV0229_LOCKOUTPUT_1,
1658 .volt13_op0_op1 = STV0299_VOLT13_OP1,
1659 .min_delay_ms = 100,
1660 .set_symbol_rate = alps_bsru6_set_symbol_rate,
1661 .pll_set = alps_bsru6_pll_set,
1662};
1663
1664
3dfaebda
JS
1665static u8 alps_bsbe1_inittab[] = {
1666 0x01, 0x15,
1667 0x02, 0x30,
1668 0x03, 0x00,
1669 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
1670 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
1671 0x06, 0x40, /* DAC not used, set to high impendance mode */
1672 0x07, 0x00, /* DAC LSB */
1673 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
1674 0x09, 0x00, /* FIFO */
1675 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
1676 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
1677 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
1678 0x10, 0x3f, // AGC2 0x3d
1679 0x11, 0x84,
ff29d06a 1680 0x12, 0xb9,
3dfaebda
JS
1681 0x15, 0xc9, // lock detector threshold
1682 0x16, 0x00,
1683 0x17, 0x00,
1684 0x18, 0x00,
1685 0x19, 0x00,
1686 0x1a, 0x00,
1687 0x1f, 0x50,
1688 0x20, 0x00,
1689 0x21, 0x00,
1690 0x22, 0x00,
1691 0x23, 0x00,
1692 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
1693 0x29, 0x1e, // 1/2 threshold
1694 0x2a, 0x14, // 2/3 threshold
1695 0x2b, 0x0f, // 3/4 threshold
1696 0x2c, 0x09, // 5/6 threshold
1697 0x2d, 0x05, // 7/8 threshold
1698 0x2e, 0x01,
1699 0x31, 0x1f, // test all FECs
1700 0x32, 0x19, // viterbi and synchro search
1701 0x33, 0xfc, // rs control
1702 0x34, 0x93, // error control
1703 0x0f, 0x92,
1704 0xff, 0xff
1705};
1706
cfbfce15 1707static int alps_bsbe1_pll_set(struct dvb_frontend* fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters* params)
3dfaebda 1708{
3dfaebda
JS
1709 int ret;
1710 u8 data[4];
1711 u32 div;
1712 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1713
1714 if ((params->frequency < 950000) || (params->frequency > 2150000))
1715 return -EINVAL;
1716
1717 div = (params->frequency + (125 - 1)) / 125; // round correctly
1718 data[0] = (div >> 8) & 0x7f;
1719 data[1] = div & 0xff;
1720 data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
1721 data[3] = (params->frequency > 1530000) ? 0xE0 : 0xE4;
1722
cfbfce15 1723 ret = i2c_transfer(i2c, &msg, 1);
3dfaebda
JS
1724 return (ret != 1) ? -EIO : 0;
1725}
1726
1727static struct stv0299_config alps_bsbe1_config = {
1728 .demod_address = 0x68,
1729 .inittab = alps_bsbe1_inittab,
1730 .mclk = 88000000UL,
1731 .invert = 1,
3dfaebda
JS
1732 .skip_reinit = 0,
1733 .min_delay_ms = 100,
1734 .set_symbol_rate = alps_bsru6_set_symbol_rate,
1735 .pll_set = alps_bsbe1_pll_set,
1736};
1737
1738static int lnbp21_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
1739{
1740 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1741 int ret;
1742 u8 data[1];
1743 struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = data, .len = sizeof(data) };
1744
1745 switch(voltage) {
1746 case SEC_VOLTAGE_OFF:
1747 data[0] = 0x00;
1748 break;
1749 case SEC_VOLTAGE_13:
1750 data[0] = 0x44;
1751 break;
1752 case SEC_VOLTAGE_18:
1753 data[0] = 0x4c;
1754 break;
1755 default:
1756 return -EINVAL;
1757 };
1758
1759 ret = i2c_transfer(&av7110->i2c_adap, &msg, 1);
1760 return (ret != 1) ? -EIO : 0;
1761}
1762
1da177e4
LT
1763
1764static int alps_tdbe2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1765{
1766 struct av7110* av7110 = fe->dvb->priv;
1767 u32 div;
1768 u8 data[4];
1769 struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) };
1770
1771 div = (params->frequency + 35937500 + 31250) / 62500;
1772
1773 data[0] = (div >> 8) & 0x7f;
1774 data[1] = div & 0xff;
1775 data[2] = 0x85 | ((div >> 10) & 0x60);
1776 data[3] = (params->frequency < 174000000 ? 0x88 : params->frequency < 470000000 ? 0x84 : 0x81);
1777
1778 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1779 return -EIO;
1780 return 0;
1781}
1782
1783static struct ves1820_config alps_tdbe2_config = {
1784 .demod_address = 0x09,
1785 .xin = 57840000UL,
1786 .invert = 1,
1787 .selagc = VES1820_SELAGC_SIGNAMPERR,
1788 .pll_set = alps_tdbe2_pll_set,
1789};
1790
1791
1792
1793
1794static int grundig_29504_451_pll_set(struct dvb_frontend* fe,
1795 struct dvb_frontend_parameters* params)
1796{
1797 struct av7110* av7110 = fe->dvb->priv;
1798 u32 div;
1799 u8 data[4];
1800 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1801
1802 div = params->frequency / 125;
1803 data[0] = (div >> 8) & 0x7f;
1804 data[1] = div & 0xff;
1805 data[2] = 0x8e;
1806 data[3] = 0x00;
1807
1808 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1809 return -EIO;
1810 return 0;
1811}
1812
1813static struct tda8083_config grundig_29504_451_config = {
1814 .demod_address = 0x68,
1815 .pll_set = grundig_29504_451_pll_set,
1816};
1817
1818
1819
1820static int philips_cd1516_pll_set(struct dvb_frontend* fe,
1821 struct dvb_frontend_parameters* params)
1822{
9101e622 1823 struct av7110* av7110 = fe->dvb->priv;
1da177e4
LT
1824 u32 div;
1825 u32 f = params->frequency;
1826 u8 data[4];
1827 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1828
1829 div = (f + 36125000 + 31250) / 62500;
1830
1831 data[0] = (div >> 8) & 0x7f;
1832 data[1] = div & 0xff;
1833 data[2] = 0x8e;
1834 data[3] = (f < 174000000 ? 0xa1 : f < 470000000 ? 0x92 : 0x34);
1835
1836 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1837 return -EIO;
1838 return 0;
1839}
1840
1841static struct ves1820_config philips_cd1516_config = {
1842 .demod_address = 0x09,
1843 .xin = 57840000UL,
1844 .invert = 1,
1845 .selagc = VES1820_SELAGC_SIGNAMPERR,
1846 .pll_set = philips_cd1516_pll_set,
1847};
1848
1849
1850
1851static int alps_tdlb7_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1852{
1853 struct av7110* av7110 = fe->dvb->priv;
1854 u32 div, pwr;
1855 u8 data[4];
1856 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
1857
1858 div = (params->frequency + 36200000) / 166666;
1859
1860 if (params->frequency <= 782000000)
1861 pwr = 1;
1862 else
1863 pwr = 2;
1864
1865 data[0] = (div >> 8) & 0x7f;
1866 data[1] = div & 0xff;
1867 data[2] = 0x85;
1868 data[3] = pwr << 6;
1869
1870 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1871 return -EIO;
1872 return 0;
1873}
1874
1875static int alps_tdlb7_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
1876{
1877 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1878
1879 return request_firmware(fw, name, &av7110->dev->pci->dev);
1880}
1881
1882static struct sp8870_config alps_tdlb7_config = {
1883
1884 .demod_address = 0x71,
1885 .pll_set = alps_tdlb7_pll_set,
1886 .request_firmware = alps_tdlb7_request_firmware,
1887};
1888
1889
dc27a169
AQ
1890static u8 nexusca_stv0297_inittab[] = {
1891 0x80, 0x01,
1892 0x80, 0x00,
1893 0x81, 0x01,
1894 0x81, 0x00,
1895 0x00, 0x09,
1896 0x01, 0x69,
1897 0x03, 0x00,
1898 0x04, 0x00,
1899 0x07, 0x00,
1900 0x08, 0x00,
1901 0x20, 0x00,
1902 0x21, 0x40,
1903 0x22, 0x00,
1904 0x23, 0x00,
1905 0x24, 0x40,
1906 0x25, 0x88,
1907 0x30, 0xff,
1908 0x31, 0x00,
1909 0x32, 0xff,
1910 0x33, 0x00,
1911 0x34, 0x50,
1912 0x35, 0x7f,
1913 0x36, 0x00,
1914 0x37, 0x20,
1915 0x38, 0x00,
1916 0x40, 0x1c,
1917 0x41, 0xff,
1918 0x42, 0x29,
1919 0x43, 0x00,
1920 0x44, 0xff,
1921 0x45, 0x00,
1922 0x46, 0x00,
1923 0x49, 0x04,
1924 0x4a, 0x00,
1925 0x4b, 0x7b,
1926 0x52, 0x30,
1927 0x55, 0xae,
1928 0x56, 0x47,
1929 0x57, 0xe1,
1930 0x58, 0x3a,
1931 0x5a, 0x1e,
1932 0x5b, 0x34,
1933 0x60, 0x00,
1934 0x63, 0x00,
1935 0x64, 0x00,
1936 0x65, 0x00,
1937 0x66, 0x00,
1938 0x67, 0x00,
1939 0x68, 0x00,
1940 0x69, 0x00,
1941 0x6a, 0x02,
1942 0x6b, 0x00,
1943 0x70, 0xff,
1944 0x71, 0x00,
1945 0x72, 0x00,
1946 0x73, 0x00,
1947 0x74, 0x0c,
1948 0x80, 0x00,
1949 0x81, 0x00,
1950 0x82, 0x00,
1951 0x83, 0x00,
1952 0x84, 0x04,
1953 0x85, 0x80,
1954 0x86, 0x24,
1955 0x87, 0x78,
1956 0x88, 0x10,
1957 0x89, 0x00,
1958 0x90, 0x01,
1959 0x91, 0x01,
1960 0xa0, 0x04,
1961 0xa1, 0x00,
1962 0xa2, 0x00,
1963 0xb0, 0x91,
1964 0xb1, 0x0b,
1965 0xc0, 0x53,
1966 0xc1, 0x70,
1967 0xc2, 0x12,
1968 0xd0, 0x00,
1969 0xd1, 0x00,
1970 0xd2, 0x00,
1971 0xd3, 0x00,
1972 0xd4, 0x00,
1973 0xd5, 0x00,
1974 0xde, 0x00,
1975 0xdf, 0x00,
1976 0x61, 0x49,
1977 0x62, 0x0b,
1978 0x53, 0x08,
1979 0x59, 0x08,
1980 0xff, 0xff,
1981};
1da177e4
LT
1982
1983static int nexusca_stv0297_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1984{
1985 struct av7110* av7110 = fe->dvb->priv;
1986 u32 div;
1987 u8 data[4];
1988 struct i2c_msg msg = { .addr = 0x63, .flags = 0, .buf = data, .len = sizeof(data) };
1989 struct i2c_msg readmsg = { .addr = 0x63, .flags = I2C_M_RD, .buf = data, .len = 1 };
1990 int i;
1991
1992 div = (params->frequency + 36150000 + 31250) / 62500;
1993
1994 data[0] = (div >> 8) & 0x7f;
1995 data[1] = div & 0xff;
1996 data[2] = 0xce;
1997
1998 if (params->frequency < 45000000)
1999 return -EINVAL;
2000 else if (params->frequency < 137000000)
2001 data[3] = 0x01;
2002 else if (params->frequency < 403000000)
2003 data[3] = 0x02;
2004 else if (params->frequency < 860000000)
2005 data[3] = 0x04;
2006 else
2007 return -EINVAL;
2008
2009 stv0297_enable_plli2c(fe);
2010 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) {
2011 printk("nexusca: pll transfer failed!\n");
2012 return -EIO;
2013 }
2014
2015 // wait for PLL lock
2016 for(i = 0; i < 20; i++) {
2017
2018 stv0297_enable_plli2c(fe);
2019 if (i2c_transfer(&av7110->i2c_adap, &readmsg, 1) == 1)
2020 if (data[0] & 0x40) break;
2021 msleep(10);
2022 }
2023
2024 return 0;
2025}
2026
2027static struct stv0297_config nexusca_stv0297_config = {
2028
2029 .demod_address = 0x1C,
dc27a169 2030 .inittab = nexusca_stv0297_inittab,
1da177e4
LT
2031 .invert = 1,
2032 .pll_set = nexusca_stv0297_pll_set,
2033};
2034
2035
2036
2037static int grundig_29504_401_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
2038{
2039 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
2040 u32 div;
2041 u8 cfg, cpump, band_select;
2042 u8 data[4];
2043 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
2044
2045 div = (36125000 + params->frequency) / 166666;
2046
2047 cfg = 0x88;
2048
2049 if (params->frequency < 175000000) cpump = 2;
2050 else if (params->frequency < 390000000) cpump = 1;
2051 else if (params->frequency < 470000000) cpump = 2;
2052 else if (params->frequency < 750000000) cpump = 1;
2053 else cpump = 3;
2054
2055 if (params->frequency < 175000000) band_select = 0x0e;
2056 else if (params->frequency < 470000000) band_select = 0x05;
2057 else band_select = 0x03;
2058
2059 data[0] = (div >> 8) & 0x7f;
2060 data[1] = div & 0xff;
2061 data[2] = ((div >> 10) & 0x60) | cfg;
2062 data[3] = (cpump << 6) | band_select;
2063
2064 if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1) return -EIO;
2065 return 0;
2066}
2067
2068static struct l64781_config grundig_29504_401_config = {
2069 .demod_address = 0x55,
2070 .pll_set = grundig_29504_401_pll_set,
2071};
2072
2073
2074
ce18a223 2075static int av7110_fe_lock_fix(struct av7110* av7110, fe_status_t status)
1da177e4 2076{
ce18a223 2077 int ret = 0;
1da177e4
LT
2078 int synced = (status & FE_HAS_LOCK) ? 1 : 0;
2079
2080 av7110->fe_status = status;
2081
2082 if (av7110->fe_synced == synced)
ce18a223 2083 return 0;
1da177e4 2084
1da177e4 2085 if (av7110->playing)
ce18a223 2086 return 0;
1da177e4
LT
2087
2088 if (down_interruptible(&av7110->pid_mutex))
ce18a223 2089 return -ERESTARTSYS;
1da177e4 2090
34612157 2091 if (synced) {
ce18a223 2092 ret = SetPIDs(av7110, av7110->pids[DMX_PES_VIDEO],
1da177e4
LT
2093 av7110->pids[DMX_PES_AUDIO],
2094 av7110->pids[DMX_PES_TELETEXT], 0,
2095 av7110->pids[DMX_PES_PCR]);
ce18a223
WR
2096 if (!ret)
2097 ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
1da177e4 2098 } else {
ce18a223
WR
2099 ret = SetPIDs(av7110, 0, 0, 0, 0, 0);
2100 if (!ret) {
2101 ret = av7110_fw_cmd(av7110, COMTYPE_PID_FILTER, FlushTSQueue, 0);
2102 if (!ret)
2103 ret = av7110_wait_msgstate(av7110, GPMQBusy);
2104 }
1da177e4
LT
2105 }
2106
34612157
OE
2107 if (!ret)
2108 av7110->fe_synced = synced;
2109
1da177e4 2110 up(&av7110->pid_mutex);
ce18a223 2111 return ret;
1da177e4
LT
2112}
2113
2114static int av7110_fe_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
2115{
2116 struct av7110* av7110 = fe->dvb->priv;
ce18a223
WR
2117
2118 int ret = av7110_fe_lock_fix(av7110, 0);
2119 if (!ret)
2120 ret = av7110->fe_set_frontend(fe, params);
2121 return ret;
1da177e4
LT
2122}
2123
2124static int av7110_fe_init(struct dvb_frontend* fe)
2125{
2126 struct av7110* av7110 = fe->dvb->priv;
2127
ce18a223
WR
2128 int ret = av7110_fe_lock_fix(av7110, 0);
2129 if (!ret)
2130 ret = av7110->fe_init(fe);
2131 return ret;
1da177e4
LT
2132}
2133
2134static int av7110_fe_read_status(struct dvb_frontend* fe, fe_status_t* status)
2135{
2136 struct av7110* av7110 = fe->dvb->priv;
1da177e4
LT
2137
2138 /* call the real implementation */
ce18a223
WR
2139 int ret = av7110->fe_read_status(fe, status);
2140 if (!ret)
2141 if (((*status ^ av7110->fe_status) & FE_HAS_LOCK) && (*status & FE_HAS_LOCK))
2142 ret = av7110_fe_lock_fix(av7110, *status);
2143 return ret;
1da177e4
LT
2144}
2145
2146static int av7110_fe_diseqc_reset_overload(struct dvb_frontend* fe)
2147{
2148 struct av7110* av7110 = fe->dvb->priv;
2149
ce18a223
WR
2150 int ret = av7110_fe_lock_fix(av7110, 0);
2151 if (!ret)
2152 ret = av7110->fe_diseqc_reset_overload(fe);
2153 return ret;
1da177e4
LT
2154}
2155
2156static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend* fe,
2157 struct dvb_diseqc_master_cmd* cmd)
2158{
2159 struct av7110* av7110 = fe->dvb->priv;
2160
ce18a223
WR
2161 int ret = av7110_fe_lock_fix(av7110, 0);
2162 if (!ret)
2163 ret = av7110->fe_diseqc_send_master_cmd(fe, cmd);
2164 return ret;
1da177e4
LT
2165}
2166
2167static int av7110_fe_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)
2168{
2169 struct av7110* av7110 = fe->dvb->priv;
2170
ce18a223
WR
2171 int ret = av7110_fe_lock_fix(av7110, 0);
2172 if (!ret)
2173 ret = av7110->fe_diseqc_send_burst(fe, minicmd);
2174 return ret;
1da177e4
LT
2175}
2176
2177static int av7110_fe_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
2178{
2179 struct av7110* av7110 = fe->dvb->priv;
2180
ce18a223
WR
2181 int ret = av7110_fe_lock_fix(av7110, 0);
2182 if (!ret)
2183 ret = av7110->fe_set_tone(fe, tone);
2184 return ret;
1da177e4
LT
2185}
2186
2187static int av7110_fe_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
2188{
2189 struct av7110* av7110 = fe->dvb->priv;
2190
ce18a223
WR
2191 int ret = av7110_fe_lock_fix(av7110, 0);
2192 if (!ret)
2193 ret = av7110->fe_set_voltage(fe, voltage);
2194 return ret;
1da177e4
LT
2195}
2196
2197static int av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend* fe, unsigned int cmd)
2198{
2199 struct av7110* av7110 = fe->dvb->priv;
2200
ce18a223
WR
2201 int ret = av7110_fe_lock_fix(av7110, 0);
2202 if (!ret)
2203 ret = av7110->fe_dishnetwork_send_legacy_command(fe, cmd);
2204 return ret;
1da177e4
LT
2205}
2206
2207static u8 read_pwm(struct av7110* av7110)
2208{
2209 u8 b = 0xff;
2210 u8 pwm;
2211 struct i2c_msg msg[] = { { .addr = 0x50,.flags = 0,.buf = &b,.len = 1 },
2212 { .addr = 0x50,.flags = I2C_M_RD,.buf = &pwm,.len = 1} };
2213
9101e622 2214 if ((i2c_transfer(&av7110->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
1da177e4
LT
2215 pwm = 0x48;
2216
2217 return pwm;
2218}
2219
2220static int frontend_init(struct av7110 *av7110)
2221{
2222 int ret;
2223
2224 if (av7110->dev->pci->subsystem_vendor == 0x110a) {
2225 switch(av7110->dev->pci->subsystem_device) {
2226 case 0x0000: // Fujitsu/Siemens DVB-Cable (ves1820/Philips CD1516(??))
2227 av7110->fe = ves1820_attach(&philips_cd1516_config,
2228 &av7110->i2c_adap, read_pwm(av7110));
2229 break;
2230 }
2231
2232 } else if (av7110->dev->pci->subsystem_vendor == 0x13c2) {
2233 switch(av7110->dev->pci->subsystem_device) {
2234 case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
2235 case 0x0003: // Hauppauge/TT WinTV Nexus-S Rev 2.X
2236 case 0x1002: // Hauppauge/TT WinTV DVB-S rev1.3SE
2237
2238 // try the ALPS BSRV2 first of all
2239 av7110->fe = ves1x93_attach(&alps_bsrv2_config, &av7110->i2c_adap);
2240 if (av7110->fe) {
2241 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2242 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2243 av7110->fe->ops->set_tone = av7110_set_tone;
2244 break;
2245 }
2246
2247 // try the ALPS BSRU6 now
2248 av7110->fe = stv0299_attach(&alps_bsru6_config, &av7110->i2c_adap);
2249 if (av7110->fe) {
2250 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2251 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2252 av7110->fe->ops->set_tone = av7110_set_tone;
2253 break;
2254 }
2255
2256 // Try the grundig 29504-451
9101e622 2257 av7110->fe = tda8083_attach(&grundig_29504_451_config, &av7110->i2c_adap);
1da177e4
LT
2258 if (av7110->fe) {
2259 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2260 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2261 av7110->fe->ops->set_tone = av7110_set_tone;
2262 break;
2263 }
2264
2265 /* Try DVB-C cards */
2266 switch(av7110->dev->pci->subsystem_device) {
2267 case 0x0000:
2268 /* Siemens DVB-C (full-length card) VES1820/Philips CD1516 */
2269 av7110->fe = ves1820_attach(&philips_cd1516_config, &av7110->i2c_adap,
2270 read_pwm(av7110));
2271 break;
2272 case 0x0003:
2273 /* Haupauge DVB-C 2.1 VES1820/ALPS TDBE2 */
2274 av7110->fe = ves1820_attach(&alps_tdbe2_config, &av7110->i2c_adap,
2275 read_pwm(av7110));
2276 break;
2277 }
2278 break;
2279
2280 case 0x0001: // Hauppauge/TT Nexus-T premium rev1.X
2281
2282 // ALPS TDLB7
9101e622 2283 av7110->fe = sp8870_attach(&alps_tdlb7_config, &av7110->i2c_adap);
1da177e4
LT
2284 break;
2285
2286 case 0x0002: // Hauppauge/TT DVB-C premium rev2.X
2287
9101e622 2288 av7110->fe = ves1820_attach(&alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110));
1da177e4
LT
2289 break;
2290
2291 case 0x0006: /* Fujitsu-Siemens DVB-S rev 1.6 */
2292 /* Grundig 29504-451 */
2293 av7110->fe = tda8083_attach(&grundig_29504_451_config, &av7110->i2c_adap);
2294 if (av7110->fe) {
2295 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2296 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2297 av7110->fe->ops->set_tone = av7110_set_tone;
2298 }
2299 break;
2300
2301 case 0x0008: // Hauppauge/TT DVB-T
2302
2303 av7110->fe = l64781_attach(&grundig_29504_401_config, &av7110->i2c_adap);
2304 break;
2305
2306 case 0x000A: // Hauppauge/TT Nexus-CA rev1.X
2307
dc27a169 2308 av7110->fe = stv0297_attach(&nexusca_stv0297_config, &av7110->i2c_adap);
1da177e4
LT
2309 if (av7110->fe) {
2310 /* set TDA9819 into DVB mode */
2311 saa7146_setgpio(av7110->dev, 1, SAA7146_GPIO_OUTLO); // TDA9198 pin9(STD)
2312 saa7146_setgpio(av7110->dev, 3, SAA7146_GPIO_OUTLO); // TDA9198 pin30(VIF)
2313
2314 /* tuner on this needs a slower i2c bus speed */
2315 av7110->dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240;
2316 break;
2317 }
3dfaebda
JS
2318 break;
2319
2320 case 0x000E: /* Hauppauge/TT Nexus-S rev 2.3 */
2321 /* ALPS BSBE1 */
2322 av7110->fe = stv0299_attach(&alps_bsbe1_config, &av7110->i2c_adap);
eb3daf3c 2323 if (av7110->fe) {
3dfaebda 2324 av7110->fe->ops->set_voltage = lnbp21_set_voltage;
eb3daf3c
OE
2325 av7110->fe->ops->dishnetwork_send_legacy_command = NULL;
2326 }
3dfaebda 2327 break;
1da177e4
LT
2328 }
2329 }
2330
2331 if (!av7110->fe) {
2332 /* FIXME: propagate the failure code from the lower layers */
2333 ret = -ENOMEM;
2334 printk("dvb-ttpci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
2335 av7110->dev->pci->vendor,
2336 av7110->dev->pci->device,
2337 av7110->dev->pci->subsystem_vendor,
2338 av7110->dev->pci->subsystem_device);
2339 } else {
2340 FE_FUNC_OVERRIDE(av7110->fe->ops->init, av7110->fe_init, av7110_fe_init);
2341 FE_FUNC_OVERRIDE(av7110->fe->ops->read_status, av7110->fe_read_status, av7110_fe_read_status);
2342 FE_FUNC_OVERRIDE(av7110->fe->ops->diseqc_reset_overload, av7110->fe_diseqc_reset_overload, av7110_fe_diseqc_reset_overload);
2343 FE_FUNC_OVERRIDE(av7110->fe->ops->diseqc_send_master_cmd, av7110->fe_diseqc_send_master_cmd, av7110_fe_diseqc_send_master_cmd);
2344 FE_FUNC_OVERRIDE(av7110->fe->ops->diseqc_send_burst, av7110->fe_diseqc_send_burst, av7110_fe_diseqc_send_burst);
2345 FE_FUNC_OVERRIDE(av7110->fe->ops->set_tone, av7110->fe_set_tone, av7110_fe_set_tone);
2346 FE_FUNC_OVERRIDE(av7110->fe->ops->set_voltage, av7110->fe_set_voltage, av7110_fe_set_voltage;)
2347 FE_FUNC_OVERRIDE(av7110->fe->ops->dishnetwork_send_legacy_command, av7110->fe_dishnetwork_send_legacy_command, av7110_fe_dishnetwork_send_legacy_command);
2348 FE_FUNC_OVERRIDE(av7110->fe->ops->set_frontend, av7110->fe_set_frontend, av7110_fe_set_frontend);
2349
fdc53a6d 2350 ret = dvb_register_frontend(&av7110->dvb_adapter, av7110->fe);
1da177e4
LT
2351 if (ret < 0) {
2352 printk("av7110: Frontend registration failed!\n");
2353 if (av7110->fe->ops->release)
2354 av7110->fe->ops->release(av7110->fe);
2355 av7110->fe = NULL;
2356 }
2357 }
2358 return ret;
2359}
2360
2361/* Budgetpatch note:
2362 * Original hardware design by Roberto Deza:
2363 * There is a DVB_Wiki at
2364 * http://212.227.36.83/linuxtv/wiki/index.php/Main_Page
2365 * where is described this 'DVB TT Budget Patch', on Card Modding:
2366 * http://212.227.36.83/linuxtv/wiki/index.php/DVB_TT_Budget_Patch
2367 * On the short description there is also a link to a external file,
2368 * with more details:
2369 * http://perso.wanadoo.es/jesussolano/Ttf_tsc1.zip
2370 *
2371 * New software triggering design by Emard that works on
2372 * original Roberto Deza's hardware:
2373 *
2374 * rps1 code for budgetpatch will copy internal HS event to GPIO3 pin.
2375 * GPIO3 is in budget-patch hardware connectd to port B VSYNC
2376 * HS is an internal event of 7146, accessible with RPS
2377 * and temporarily raised high every n lines
2378 * (n in defined in the RPS_THRESH1 counter threshold)
2379 * I think HS is raised high on the beginning of the n-th line
2380 * and remains high until this n-th line that triggered
2381 * it is completely received. When the receiption of n-th line
2382 * ends, HS is lowered.
2383 *
2384 * To transmit data over DMA, 7146 needs changing state at
2385 * port B VSYNC pin. Any changing of port B VSYNC will
2386 * cause some DMA data transfer, with more or less packets loss.
2387 * It depends on the phase and frequency of VSYNC and
2388 * the way of 7146 is instructed to trigger on port B (defined
2389 * in DD1_INIT register, 3rd nibble from the right valid
2390 * numbers are 0-7, see datasheet)
2391 *
2392 * The correct triggering can minimize packet loss,
2393 * dvbtraffic should give this stable bandwidths:
2394 * 22k transponder = 33814 kbit/s
2395 * 27.5k transponder = 38045 kbit/s
2396 * by experiment it is found that the best results
2397 * (stable bandwidths and almost no packet loss)
2398 * are obtained using DD1_INIT triggering number 2
2399 * (Va at rising edge of VS Fa = HS x VS-failing forced toggle)
2400 * and a VSYNC phase that occurs in the middle of DMA transfer
2401 * (about byte 188*512=96256 in the DMA window).
2402 *
2403 * Phase of HS is still not clear to me how to control,
2404 * It just happens to be so. It can be seen if one enables
2405 * RPS_IRQ and print Event Counter 1 in vpeirq(). Every
2406 * time RPS_INTERRUPT is called, the Event Counter 1 will
2407 * increment. That's how the 7146 is programmed to do event
2408 * counting in this budget-patch.c
2409 * I *think* HPS setting has something to do with the phase
2410 * of HS but I cant be 100% sure in that.
2411 *
2412 * hardware debug note: a working budget card (including budget patch)
2413 * with vpeirq() interrupt setup in mode "0x90" (every 64K) will
2414 * generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
2415 * and that means 3*25=75 Hz of interrupt freqency, as seen by
2416 * watch cat /proc/interrupts
2417 *
2418 * If this frequency is 3x lower (and data received in the DMA
2419 * buffer don't start with 0x47, but in the middle of packets,
2420 * whose lengths appear to be like 188 292 188 104 etc.
2421 * this means VSYNC line is not connected in the hardware.
2422 * (check soldering pcb and pins)
2423 * The same behaviour of missing VSYNC can be duplicated on budget
2424 * cards, by seting DD1_INIT trigger mode 7 in 3rd nibble.
2425 */
2426static int av7110_attach(struct saa7146_dev* dev, struct saa7146_pci_extension_data *pci_ext)
2427{
2428 const int length = TS_WIDTH * TS_HEIGHT;
2429 struct pci_dev *pdev = dev->pci;
2430 struct av7110 *av7110;
2431 int ret, count = 0;
2432
2433 dprintk(4, "dev: %p\n", dev);
2434
9101e622
MCC
2435 /* Set RPS_IRQ to 1 to track rps1 activity.
2436 * Enabling this won't send any interrupt to PC CPU.
2437 */
1da177e4
LT
2438#define RPS_IRQ 0
2439
2440 if (budgetpatch == 1) {
2441 budgetpatch = 0;
2442 /* autodetect the presence of budget patch
2443 * this only works if saa7146 has been recently
2444 * reset with with MASK_31 to MC1
2445 *
2446 * will wait for VBI_B event (vertical blank at port B)
2447 * and will reset GPIO3 after VBI_B is detected.
2448 * (GPIO3 should be raised high by CPU to
2449 * test if GPIO3 will generate vertical blank signal
2450 * in budget patch GPIO3 is connected to VSYNC_B
2451 */
2452
2453 /* RESET SAA7146 */
2454 saa7146_write(dev, MC1, MASK_31);
2455 /* autodetection success seems to be time-dependend after reset */
2456
2457 /* Fix VSYNC level */
2458 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
2459 /* set vsync_b triggering */
2460 saa7146_write(dev, DD1_STREAM_B, 0);
2461 /* port B VSYNC at rising edge */
2462 saa7146_write(dev, DD1_INIT, 0x00000200);
2463 saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI
2464 saa7146_write(dev, MC2,
2465 1 * (MASK_08 | MASK_24) | // BRS control
2466 0 * (MASK_09 | MASK_25) | // a
2467 1 * (MASK_10 | MASK_26) | // b
2468 0 * (MASK_06 | MASK_22) | // HPS_CTRL1
2469 0 * (MASK_05 | MASK_21) | // HPS_CTRL2
2470 0 * (MASK_01 | MASK_15) // DEBI
2471 );
2472
2473 /* start writing RPS1 code from beginning */
2474 count = 0;
2475 /* Disable RPS1 */
2476 saa7146_write(dev, MC1, MASK_29);
2477 /* RPS1 timeout disable */
2478 saa7146_write(dev, RPS_TOV1, 0);
2479 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B));
2480 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
2481 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
2482 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
2483#if RPS_IRQ
2484 /* issue RPS1 interrupt to increment counter */
2485 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
2486#endif
2487 WRITE_RPS1(cpu_to_le32(CMD_STOP));
2488 /* Jump to begin of RPS program as safety measure (p37) */
2489 WRITE_RPS1(cpu_to_le32(CMD_JUMP));
2490 WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
2491
2492#if RPS_IRQ
2493 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
2494 * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
2495 * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
2496 */
2497 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
2498 /* set event counter 1 treshold to maximum allowed value (rEC p55) */
2499 saa7146_write(dev, ECT1R, 0x3fff );
2500#endif
2501 /* Set RPS1 Address register to point to RPS code (r108 p42) */
2502 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
2503 /* Enable RPS1, (rFC p33) */
2504 saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
2505
2506 mdelay(10);
2507 /* now send VSYNC_B to rps1 by rising GPIO3 */
2508 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
2509 mdelay(10);
2510 /* if rps1 responded by lowering the GPIO3,
2511 * then we have budgetpatch hardware
2512 */
2513 if ((saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) {
2514 budgetpatch = 1;
2515 printk("dvb-ttpci: BUDGET-PATCH DETECTED.\n");
2516 }
2517 /* Disable RPS1 */
2518 saa7146_write(dev, MC1, ( MASK_29 ));
2519#if RPS_IRQ
2520 printk("dvb-ttpci: Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
2521#endif
2522 }
2523
2524 /* prepare the av7110 device struct */
2525 av7110 = kmalloc(sizeof(struct av7110), GFP_KERNEL);
2526 if (!av7110) {
2527 dprintk(1, "out of memory\n");
2528 return -ENOMEM;
2529 }
2530
2531 memset(av7110, 0, sizeof(struct av7110));
2532
2533 av7110->card_name = (char*) pci_ext->ext_priv;
2534 av7110->dev = dev;
2535 dev->ext_priv = av7110;
2536
2537 ret = get_firmware(av7110);
2538 if (ret < 0)
2539 goto err_kfree_0;
2540
2541 ret = dvb_register_adapter(&av7110->dvb_adapter, av7110->card_name,
2542 THIS_MODULE);
2543 if (ret < 0)
2544 goto err_put_firmware_1;
2545
2546 /* the Siemens DVB needs this if you want to have the i2c chips
2547 get recognized before the main driver is fully loaded */
2548 saa7146_write(dev, GPIO_CTRL, 0x500000);
2549
2550#ifdef I2C_ADAP_CLASS_TV_DIGITAL
2551 av7110->i2c_adap.class = I2C_ADAP_CLASS_TV_DIGITAL;
2552#else
2553 av7110->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
2554#endif
2555 strlcpy(av7110->i2c_adap.name, pci_ext->ext_priv, sizeof(av7110->i2c_adap.name));
2556
2557 saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */
2558
2559 ret = i2c_add_adapter(&av7110->i2c_adap);
2560 if (ret < 0)
2561 goto err_dvb_unregister_adapter_2;
2562
2563 ttpci_eeprom_parse_mac(&av7110->i2c_adap,
fdc53a6d 2564 av7110->dvb_adapter.proposed_mac);
1da177e4
LT
2565 ret = -ENOMEM;
2566
2567 if (budgetpatch) {
2568 spin_lock_init(&av7110->feedlock1);
2569 av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
2570 &av7110->pt);
2571 if (!av7110->grabbing)
2572 goto err_i2c_del_3;
2573
2574 saa7146_write(dev, PCI_BT_V1, 0x1c1f101f);
2575 saa7146_write(dev, BCS_CTRL, 0x80400040);
2576 /* set dd1 stream a & b */
2577 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2578 saa7146_write(dev, DD1_INIT, 0x03000200);
2579 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2580 saa7146_write(dev, BRS_CTRL, 0x60000000);
2581 saa7146_write(dev, BASE_ODD3, 0);
2582 saa7146_write(dev, BASE_EVEN3, 0);
2583 saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
2584 saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
2585
2586 saa7146_write(dev, PITCH3, TS_WIDTH);
2587 saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
2588
2589 /* upload all */
2590 saa7146_write(dev, MC2, 0x077c077c);
2591 saa7146_write(dev, GPIO_CTRL, 0x000000);
2592#if RPS_IRQ
2593 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
2594 * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
2595 * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
2596 */
2597 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
2598 /* set event counter 1 treshold to maximum allowed value (rEC p55) */
2599 saa7146_write(dev, ECT1R, 0x3fff );
2600#endif
2601 /* Setup BUDGETPATCH MAIN RPS1 "program" (p35) */
2602 count = 0;
2603
2604 /* Wait Source Line Counter Threshold (p36) */
2605 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS));
2606 /* Set GPIO3=1 (p42) */
2607 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
2608 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
2609 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24));
2610#if RPS_IRQ
2611 /* issue RPS1 interrupt */
2612 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
2613#endif
2614 /* Wait reset Source Line Counter Threshold (p36) */
2615 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS));
2616 /* Set GPIO3=0 (p42) */
2617 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
2618 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
2619 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
2620#if RPS_IRQ
2621 /* issue RPS1 interrupt */
2622 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
2623#endif
2624 /* Jump to begin of RPS program (p37) */
2625 WRITE_RPS1(cpu_to_le32(CMD_JUMP));
2626 WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
2627
2628 /* Fix VSYNC level */
2629 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
2630 /* Set RPS1 Address register to point to RPS code (r108 p42) */
2631 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
2632 /* Set Source Line Counter Threshold, using BRS (rCC p43)
2633 * It generates HS event every TS_HEIGHT lines
2634 * this is related to TS_WIDTH set in register
2635 * NUM_LINE_BYTE3. If NUM_LINE_BYTE low 16 bits
2636 * are set to TS_WIDTH bytes (TS_WIDTH=2*188),
2637 * then RPS_THRESH1 should be set to trigger
2638 * every TS_HEIGHT (512) lines.
2639 */
2640 saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
2641
2642 /* Enable RPS1 (rFC p33) */
2643 saa7146_write(dev, MC1, (MASK_13 | MASK_29));
2644
2645 /* end of budgetpatch register initialization */
2646 tasklet_init (&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110);
2647 } else {
2648 saa7146_write(dev, PCI_BT_V1, 0x1c00101f);
2649 saa7146_write(dev, BCS_CTRL, 0x80400040);
2650
2651 /* set dd1 stream a & b */
2652 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2653 saa7146_write(dev, DD1_INIT, 0x03000000);
2654 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2655
2656 /* upload all */
2657 saa7146_write(dev, MC2, 0x077c077c);
2658 saa7146_write(dev, GPIO_CTRL, 0x000000);
2659 }
2660
2661 tasklet_init (&av7110->debi_tasklet, debiirq, (unsigned long) av7110);
2662 tasklet_init (&av7110->gpio_tasklet, gpioirq, (unsigned long) av7110);
2663
2664 sema_init(&av7110->pid_mutex, 1);
2665
2666 /* locks for data transfers from/to AV7110 */
2667 spin_lock_init(&av7110->debilock);
2668 sema_init(&av7110->dcomlock, 1);
2669 av7110->debitype = -1;
2670
2671 /* default OSD window */
2672 av7110->osdwin = 1;
2673 sema_init(&av7110->osd_sema, 1);
2674
2675 /* ARM "watchdog" */
2676 init_waitqueue_head(&av7110->arm_wait);
2677 av7110->arm_thread = NULL;
2678
2679 /* allocate and init buffers */
2680 av7110->debi_virt = pci_alloc_consistent(pdev, 8192, &av7110->debi_bus);
2681 if (!av7110->debi_virt)
2682 goto err_saa71466_vfree_4;
2683
2684
2685 av7110->iobuf = vmalloc(AVOUTLEN+AOUTLEN+BMPLEN+4*IPACKS);
2686 if (!av7110->iobuf)
2687 goto err_pci_free_5;
2688
2689 ret = av7110_av_init(av7110);
2690 if (ret < 0)
2691 goto err_iobuf_vfree_6;
2692
2693 /* init BMP buffer */
2694 av7110->bmpbuf = av7110->iobuf+AVOUTLEN+AOUTLEN;
2695 init_waitqueue_head(&av7110->bmpq);
2696
2697 ret = av7110_ca_init(av7110);
2698 if (ret < 0)
2699 goto err_av7110_av_exit_7;
2700
2701 /* load firmware into AV7110 cards */
2702 ret = av7110_bootarm(av7110);
2703 if (ret < 0)
2704 goto err_av7110_ca_exit_8;
2705
2706 ret = av7110_firmversion(av7110);
2707 if (ret < 0)
2708 goto err_stop_arm_9;
2709
2710 if (FW_VERSION(av7110->arm_app)<0x2501)
2711 printk ("dvb-ttpci: Warning, firmware version 0x%04x is too old. "
2712 "System might be unstable!\n", FW_VERSION(av7110->arm_app));
2713
2714 ret = kernel_thread(arm_thread, (void *) av7110, 0);
2715 if (ret < 0)
2716 goto err_stop_arm_9;
2717
2718 /* set initial volume in mixer struct */
2719 av7110->mixer.volume_left = volume;
2720 av7110->mixer.volume_right = volume;
2721
2722 init_av7110_av(av7110);
2723
2724 ret = av7110_register(av7110);
2725 if (ret < 0)
2726 goto err_arm_thread_stop_10;
2727
2728 /* special case DVB-C: these cards have an analog tuner
2729 plus need some special handling, so we have separate
2730 saa7146_ext_vv data for these... */
2731 ret = av7110_init_v4l(av7110);
2732 if (ret < 0)
2733 goto err_av7110_unregister_11;
2734
fdc53a6d 2735 av7110->dvb_adapter.priv = av7110;
1da177e4
LT
2736 ret = frontend_init(av7110);
2737 if (ret < 0)
2738 goto err_av7110_exit_v4l_12;
2739
2740#if defined(CONFIG_INPUT_EVDEV) || defined(CONFIG_INPUT_EVDEV_MODULE)
03388ae3 2741 av7110_ir_init(av7110);
1da177e4
LT
2742#endif
2743 printk(KERN_INFO "dvb-ttpci: found av7110-%d.\n", av7110_num);
2744 av7110_num++;
2745out:
2746 return ret;
2747
2748err_av7110_exit_v4l_12:
2749 av7110_exit_v4l(av7110);
2750err_av7110_unregister_11:
2751 dvb_unregister(av7110);
2752err_arm_thread_stop_10:
2753 av7110_arm_sync(av7110);
2754err_stop_arm_9:
2755 /* Nothing to do. Rejoice. */
2756err_av7110_ca_exit_8:
2757 av7110_ca_exit(av7110);
2758err_av7110_av_exit_7:
2759 av7110_av_exit(av7110);
2760err_iobuf_vfree_6:
2761 vfree(av7110->iobuf);
2762err_pci_free_5:
2763 pci_free_consistent(pdev, 8192, av7110->debi_virt, av7110->debi_bus);
2764err_saa71466_vfree_4:
2765 if (!av7110->grabbing)
2766 saa7146_pgtable_free(pdev, &av7110->pt);
2767err_i2c_del_3:
2768 i2c_del_adapter(&av7110->i2c_adap);
2769err_dvb_unregister_adapter_2:
fdc53a6d 2770 dvb_unregister_adapter(&av7110->dvb_adapter);
1da177e4
LT
2771err_put_firmware_1:
2772 put_firmware(av7110);
2773err_kfree_0:
2774 kfree(av7110);
2775 goto out;
2776}
2777
2778static int av7110_detach(struct saa7146_dev* saa)
2779{
2780 struct av7110 *av7110 = saa->ext_priv;
2781 dprintk(4, "%p\n", av7110);
2782
03388ae3
OE
2783#if defined(CONFIG_INPUT_EVDEV) || defined(CONFIG_INPUT_EVDEV_MODULE)
2784 av7110_ir_exit(av7110);
2785#endif
1da177e4
LT
2786 if (budgetpatch) {
2787 /* Disable RPS1 */
2788 saa7146_write(saa, MC1, MASK_29);
2789 /* VSYNC LOW (inactive) */
2790 saa7146_setgpio(saa, 3, SAA7146_GPIO_OUTLO);
2791 saa7146_write(saa, MC1, MASK_20); /* DMA3 off */
2792 SAA7146_IER_DISABLE(saa, MASK_10);
2793 SAA7146_ISR_CLEAR(saa, MASK_10);
2794 msleep(50);
2795 tasklet_kill(&av7110->vpe_tasklet);
2796 saa7146_pgtable_free(saa->pci, &av7110->pt);
2797 }
2798 av7110_exit_v4l(av7110);
2799
2800 av7110_arm_sync(av7110);
2801
2802 tasklet_kill(&av7110->debi_tasklet);
2803 tasklet_kill(&av7110->gpio_tasklet);
2804
2805 dvb_unregister(av7110);
2806
2807 SAA7146_IER_DISABLE(saa, MASK_19 | MASK_03);
2808 SAA7146_ISR_CLEAR(saa, MASK_19 | MASK_03);
2809
2810 av7110_ca_exit(av7110);
2811 av7110_av_exit(av7110);
2812
2813 vfree(av7110->iobuf);
2814 pci_free_consistent(saa->pci, 8192, av7110->debi_virt,
2815 av7110->debi_bus);
2816
2817 i2c_del_adapter(&av7110->i2c_adap);
2818
fdc53a6d 2819 dvb_unregister_adapter (&av7110->dvb_adapter);
1da177e4
LT
2820
2821 av7110_num--;
2822
2823 put_firmware(av7110);
2824
2825 kfree(av7110);
2826
2827 saa->ext_priv = NULL;
2828
2829 return 0;
2830}
2831
2832
2833static void av7110_irq(struct saa7146_dev* dev, u32 *isr)
2834{
2835 struct av7110 *av7110 = dev->ext_priv;
2836
2837 //print_time("av7110_irq");
2838
2839 /* Note: Don't try to handle the DEBI error irq (MASK_18), in
2840 * intel mode the timeout is asserted all the time...
2841 */
2842
2843 if (*isr & MASK_19) {
2844 //printk("av7110_irq: DEBI\n");
2845 /* Note 1: The DEBI irq is level triggered: We must enable it
2846 * only after we started a DMA xfer, and disable it here
2847 * immediately, or it will be signalled all the time while
2848 * DEBI is idle.
2849 * Note 2: You would think that an irq which is masked is
2850 * not signalled by the hardware. Not so for the SAA7146:
2851 * An irq is signalled as long as the corresponding bit
2852 * in the ISR is set, and disabling irqs just prevents the
2853 * hardware from setting the ISR bit. This means a) that we
2854 * must clear the ISR *after* disabling the irq (which is why
2855 * we must do it here even though saa7146_core did it already),
2856 * and b) that if we were to disable an edge triggered irq
2857 * (like the gpio irqs sadly are) temporarily we would likely
2858 * loose some. This sucks :-(
2859 */
2860 SAA7146_IER_DISABLE(av7110->dev, MASK_19);
2861 SAA7146_ISR_CLEAR(av7110->dev, MASK_19);
2862 tasklet_schedule(&av7110->debi_tasklet);
2863 }
2864
2865 if (*isr & MASK_03) {
2866 //printk("av7110_irq: GPIO\n");
2867 tasklet_schedule(&av7110->gpio_tasklet);
2868 }
2869
2870 if ((*isr & MASK_10) && budgetpatch)
2871 tasklet_schedule(&av7110->vpe_tasklet);
2872}
2873
2874
2875static struct saa7146_extension av7110_extension;
2876
2877#define MAKE_AV7110_INFO(x_var,x_name) \
2878static struct saa7146_pci_extension_data x_var = { \
2879 .ext_priv = x_name, \
2880 .ext = &av7110_extension }
2881
6af4ee10 2882MAKE_AV7110_INFO(tts_1_X_fsc,"Technotrend/Hauppauge WinTV DVB-S rev1.X or Fujitsu Siemens DVB-C");
1da177e4
LT
2883MAKE_AV7110_INFO(ttt_1_X, "Technotrend/Hauppauge WinTV DVB-T rev1.X");
2884MAKE_AV7110_INFO(ttc_1_X, "Technotrend/Hauppauge WinTV Nexus-CA rev1.X");
2885MAKE_AV7110_INFO(ttc_2_X, "Technotrend/Hauppauge WinTV DVB-C rev2.X");
2886MAKE_AV7110_INFO(tts_2_X, "Technotrend/Hauppauge WinTV Nexus-S rev2.X");
3dfaebda 2887MAKE_AV7110_INFO(tts_2_3, "Technotrend/Hauppauge WinTV Nexus-S rev2.3");
1da177e4
LT
2888MAKE_AV7110_INFO(tts_1_3se, "Technotrend/Hauppauge WinTV DVB-S rev1.3 SE");
2889MAKE_AV7110_INFO(ttt, "Technotrend/Hauppauge DVB-T");
2890MAKE_AV7110_INFO(fsc, "Fujitsu Siemens DVB-C");
2891MAKE_AV7110_INFO(fss, "Fujitsu Siemens DVB-S rev1.6");
2892
2893static struct pci_device_id pci_tbl[] = {
6af4ee10
KH
2894 MAKE_EXTENSION_PCI(fsc, 0x110a, 0x0000),
2895 MAKE_EXTENSION_PCI(tts_1_X_fsc, 0x13c2, 0x0000),
2896 MAKE_EXTENSION_PCI(ttt_1_X, 0x13c2, 0x0001),
2897 MAKE_EXTENSION_PCI(ttc_2_X, 0x13c2, 0x0002),
2898 MAKE_EXTENSION_PCI(tts_2_X, 0x13c2, 0x0003),
2899 MAKE_EXTENSION_PCI(fss, 0x13c2, 0x0006),
2900 MAKE_EXTENSION_PCI(ttt, 0x13c2, 0x0008),
2901 MAKE_EXTENSION_PCI(ttc_1_X, 0x13c2, 0x000a),
2902 MAKE_EXTENSION_PCI(tts_2_3, 0x13c2, 0x000e),
2903 MAKE_EXTENSION_PCI(tts_1_3se, 0x13c2, 0x1002),
1da177e4
LT
2904
2905/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0004), UNDEFINED CARD */ // Galaxis DVB PC-Sat-Carte
2906/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0005), UNDEFINED CARD */ // Technisat SkyStar1
2907/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0009), UNDEFINED CARD */ // TT/Hauppauge WinTV Nexus-CA v????
2908
2909 {
2910 .vendor = 0,
2911 }
2912};
2913
2914MODULE_DEVICE_TABLE(pci, pci_tbl);
2915
2916
2917static struct saa7146_extension av7110_extension = {
2918 .name = "dvb\0",
2919 .flags = SAA7146_I2C_SHORT_DELAY,
2920
2921 .module = THIS_MODULE,
2922 .pci_tbl = &pci_tbl[0],
2923 .attach = av7110_attach,
2924 .detach = av7110_detach,
2925
2926 .irq_mask = MASK_19 | MASK_03 | MASK_10,
2927 .irq_func = av7110_irq,
2928};
2929
2930
2931static int __init av7110_init(void)
2932{
2933 int retval;
2934 retval = saa7146_register_extension(&av7110_extension);
2935 return retval;
2936}
2937
2938
2939static void __exit av7110_exit(void)
2940{
1da177e4
LT
2941 saa7146_unregister_extension(&av7110_extension);
2942}
2943
2944module_init(av7110_init);
2945module_exit(av7110_exit);
2946
2947MODULE_DESCRIPTION("driver for the SAA7146 based AV110 PCI DVB cards by "
2948 "Siemens, Technotrend, Hauppauge");
2949MODULE_AUTHOR("Ralph Metzler, Marcus Metzler, others");
2950MODULE_LICENSE("GPL");