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1da177e4 LT |
1 | /* |
2 | * tda80xx.c | |
3 | * | |
4 | * Philips TDA8044 / TDA8083 QPSK demodulator driver | |
5 | * | |
6 | * Copyright (C) 2001 Felix Domke <tmbinc@elitedvb.net> | |
7 | * Copyright (C) 2002-2004 Andreas Oberritter <obi@linuxtv.org> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | */ | |
23 | ||
24 | #include <linux/config.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/threads.h> | |
29 | #include <linux/interrupt.h> | |
30 | #include <asm/irq.h> | |
31 | #include <linux/kernel.h> | |
32 | #include <linux/module.h> | |
33 | #include <linux/slab.h> | |
34 | #include <asm/div64.h> | |
35 | ||
36 | #include "dvb_frontend.h" | |
37 | #include "tda80xx.h" | |
38 | ||
39 | enum { | |
40 | ID_TDA8044 = 0x04, | |
41 | ID_TDA8083 = 0x05, | |
42 | }; | |
43 | ||
44 | ||
45 | struct tda80xx_state { | |
46 | ||
47 | struct i2c_adapter* i2c; | |
48 | ||
49 | struct dvb_frontend_ops ops; | |
50 | ||
51 | /* configuration settings */ | |
52 | const struct tda80xx_config* config; | |
53 | ||
54 | struct dvb_frontend frontend; | |
55 | ||
56 | u32 clk; | |
57 | int afc_loop; | |
58 | struct work_struct worklet; | |
59 | fe_code_rate_t code_rate; | |
60 | fe_spectral_inversion_t spectral_inversion; | |
61 | fe_status_t status; | |
62 | u8 id; | |
63 | }; | |
64 | ||
65 | static int debug = 1; | |
66 | #define dprintk if (debug) printk | |
67 | ||
68 | static u8 tda8044_inittab_pre[] = { | |
69 | 0x02, 0x00, 0x6f, 0xb5, 0x86, 0x22, 0x00, 0xea, | |
70 | 0x30, 0x42, 0x98, 0x68, 0x70, 0x42, 0x99, 0x58, | |
71 | 0x95, 0x10, 0xf5, 0xe7, 0x93, 0x0b, 0x15, 0x68, | |
72 | 0x9a, 0x90, 0x61, 0x80, 0x00, 0xe0, 0x40, 0x00, | |
73 | 0x0f, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
74 | 0x00, 0x00 | |
75 | }; | |
76 | ||
77 | static u8 tda8044_inittab_post[] = { | |
78 | 0x04, 0x00, 0x6f, 0xb5, 0x86, 0x22, 0x00, 0xea, | |
79 | 0x30, 0x42, 0x98, 0x68, 0x70, 0x42, 0x99, 0x50, | |
80 | 0x95, 0x10, 0xf5, 0xe7, 0x93, 0x0b, 0x15, 0x68, | |
81 | 0x9a, 0x90, 0x61, 0x80, 0x00, 0xe0, 0x40, 0x6c, | |
82 | 0x0f, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
83 | 0x00, 0x00 | |
84 | }; | |
85 | ||
86 | static u8 tda8083_inittab[] = { | |
87 | 0x04, 0x00, 0x4a, 0x79, 0x04, 0x00, 0xff, 0xea, | |
88 | 0x48, 0x42, 0x79, 0x60, 0x70, 0x52, 0x9a, 0x10, | |
89 | 0x0e, 0x10, 0xf2, 0xa7, 0x93, 0x0b, 0x05, 0xc8, | |
90 | 0x9d, 0x00, 0x42, 0x80, 0x00, 0x60, 0x40, 0x00, | |
91 | 0x00, 0x75, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, | |
92 | 0x00, 0x00, 0x00, 0x00 | |
93 | }; | |
94 | ||
95 | static __inline__ u32 tda80xx_div(u32 a, u32 b) | |
96 | { | |
97 | return (a + (b / 2)) / b; | |
98 | } | |
99 | ||
100 | static __inline__ u32 tda80xx_gcd(u32 a, u32 b) | |
101 | { | |
102 | u32 r; | |
103 | ||
104 | while ((r = a % b)) { | |
105 | a = b; | |
106 | b = r; | |
107 | } | |
108 | ||
109 | return b; | |
110 | } | |
111 | ||
112 | static int tda80xx_read(struct tda80xx_state* state, u8 reg, u8 *buf, u8 len) | |
113 | { | |
114 | int ret; | |
115 | struct i2c_msg msg[] = { { .addr = state->config->demod_address, .flags = 0, .buf = ®, .len = 1 }, | |
116 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } }; | |
117 | ||
118 | ret = i2c_transfer(state->i2c, msg, 2); | |
119 | ||
120 | if (ret != 2) | |
121 | dprintk("%s: readreg error (reg %02x, ret == %i)\n", | |
122 | __FUNCTION__, reg, ret); | |
123 | ||
124 | mdelay(10); | |
125 | ||
126 | return (ret == 2) ? 0 : -EREMOTEIO; | |
127 | } | |
128 | ||
129 | static int tda80xx_write(struct tda80xx_state* state, u8 reg, const u8 *buf, u8 len) | |
130 | { | |
131 | int ret; | |
132 | u8 wbuf[len + 1]; | |
133 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = wbuf, .len = len + 1 }; | |
134 | ||
135 | wbuf[0] = reg; | |
136 | memcpy(&wbuf[1], buf, len); | |
137 | ||
138 | ret = i2c_transfer(state->i2c, &msg, 1); | |
139 | ||
140 | if (ret != 1) | |
141 | dprintk("%s: i2c xfer error (ret == %i)\n", __FUNCTION__, ret); | |
142 | ||
143 | mdelay(10); | |
144 | ||
145 | return (ret == 1) ? 0 : -EREMOTEIO; | |
146 | } | |
147 | ||
148 | static __inline__ u8 tda80xx_readreg(struct tda80xx_state* state, u8 reg) | |
149 | { | |
150 | u8 val; | |
151 | ||
152 | tda80xx_read(state, reg, &val, 1); | |
153 | ||
154 | return val; | |
155 | } | |
156 | ||
157 | static __inline__ int tda80xx_writereg(struct tda80xx_state* state, u8 reg, u8 data) | |
158 | { | |
159 | return tda80xx_write(state, reg, &data, 1); | |
160 | } | |
161 | ||
162 | static int tda80xx_set_parameters(struct tda80xx_state* state, | |
163 | fe_spectral_inversion_t inversion, | |
164 | u32 symbol_rate, | |
165 | fe_code_rate_t fec_inner) | |
166 | { | |
167 | u8 buf[15]; | |
168 | u64 ratio; | |
169 | u32 clk; | |
170 | u32 k; | |
171 | u32 sr = symbol_rate; | |
172 | u32 gcd; | |
173 | u8 scd; | |
174 | ||
175 | if (symbol_rate > (state->clk * 3) / 16) | |
176 | scd = 0; | |
177 | else if (symbol_rate > (state->clk * 3) / 32) | |
178 | scd = 1; | |
179 | else if (symbol_rate > (state->clk * 3) / 64) | |
180 | scd = 2; | |
181 | else | |
182 | scd = 3; | |
183 | ||
184 | clk = scd ? (state->clk / (scd * 2)) : state->clk; | |
185 | ||
186 | /* | |
187 | * Viterbi decoder: | |
188 | * Differential decoding off | |
189 | * Spectral inversion unknown | |
190 | * QPSK modulation | |
191 | */ | |
192 | if (inversion == INVERSION_ON) | |
193 | buf[0] = 0x60; | |
194 | else if (inversion == INVERSION_OFF) | |
195 | buf[0] = 0x20; | |
196 | else | |
197 | buf[0] = 0x00; | |
198 | ||
199 | /* | |
200 | * CLK ratio: | |
201 | * system clock frequency is up to 64 or 96 MHz | |
202 | * | |
203 | * formula: | |
204 | * r = k * clk / symbol_rate | |
205 | * | |
206 | * k: 2^21 for caa 0..3, | |
207 | * 2^20 for caa 4..5, | |
208 | * 2^19 for caa 6..7 | |
209 | */ | |
210 | if (symbol_rate <= (clk * 3) / 32) | |
211 | k = (1 << 19); | |
212 | else if (symbol_rate <= (clk * 3) / 16) | |
213 | k = (1 << 20); | |
214 | else | |
215 | k = (1 << 21); | |
216 | ||
217 | gcd = tda80xx_gcd(clk, sr); | |
218 | clk /= gcd; | |
219 | sr /= gcd; | |
220 | ||
221 | gcd = tda80xx_gcd(k, sr); | |
222 | k /= gcd; | |
223 | sr /= gcd; | |
224 | ||
225 | ratio = (u64)k * (u64)clk; | |
226 | do_div(ratio, sr); | |
227 | ||
228 | buf[1] = ratio >> 16; | |
229 | buf[2] = ratio >> 8; | |
230 | buf[3] = ratio; | |
231 | ||
232 | /* nyquist filter roll-off factor 35% */ | |
233 | buf[4] = 0x20; | |
234 | ||
235 | clk = scd ? (state->clk / (scd * 2)) : state->clk; | |
236 | ||
237 | /* Anti Alias Filter */ | |
238 | if (symbol_rate < (clk * 3) / 64) | |
239 | printk("tda80xx: unsupported symbol rate: %u\n", symbol_rate); | |
240 | else if (symbol_rate <= clk / 16) | |
241 | buf[4] |= 0x07; | |
242 | else if (symbol_rate <= (clk * 3) / 32) | |
243 | buf[4] |= 0x06; | |
244 | else if (symbol_rate <= clk / 8) | |
245 | buf[4] |= 0x05; | |
246 | else if (symbol_rate <= (clk * 3) / 16) | |
247 | buf[4] |= 0x04; | |
248 | else if (symbol_rate <= clk / 4) | |
249 | buf[4] |= 0x03; | |
250 | else if (symbol_rate <= (clk * 3) / 8) | |
251 | buf[4] |= 0x02; | |
252 | else if (symbol_rate <= clk / 2) | |
253 | buf[4] |= 0x01; | |
254 | else | |
255 | buf[4] |= 0x00; | |
256 | ||
257 | /* Sigma Delta converter */ | |
258 | buf[5] = 0x00; | |
259 | ||
260 | /* FEC: Possible puncturing rates */ | |
261 | if (fec_inner == FEC_NONE) | |
262 | buf[6] = 0x00; | |
263 | else if ((fec_inner >= FEC_1_2) && (fec_inner <= FEC_8_9)) | |
264 | buf[6] = (1 << (8 - fec_inner)); | |
265 | else if (fec_inner == FEC_AUTO) | |
266 | buf[6] = 0xff; | |
267 | else | |
268 | return -EINVAL; | |
269 | ||
270 | /* carrier lock detector threshold value */ | |
271 | buf[7] = 0x30; | |
272 | /* AFC1: proportional part settings */ | |
273 | buf[8] = 0x42; | |
274 | /* AFC1: integral part settings */ | |
275 | buf[9] = 0x98; | |
276 | /* PD: Leaky integrator SCPC mode */ | |
277 | buf[10] = 0x28; | |
278 | /* AFC2, AFC1 controls */ | |
279 | buf[11] = 0x30; | |
280 | /* PD: proportional part settings */ | |
281 | buf[12] = 0x42; | |
282 | /* PD: integral part settings */ | |
283 | buf[13] = 0x99; | |
284 | /* AGC */ | |
285 | buf[14] = 0x50 | scd; | |
286 | ||
287 | printk("symbol_rate=%u clk=%u\n", symbol_rate, clk); | |
288 | ||
289 | return tda80xx_write(state, 0x01, buf, sizeof(buf)); | |
290 | } | |
291 | ||
292 | static int tda80xx_set_clk(struct tda80xx_state* state) | |
293 | { | |
294 | u8 buf[2]; | |
295 | ||
296 | /* CLK proportional part */ | |
297 | buf[0] = (0x06 << 5) | 0x08; /* CMP[2:0], CSP[4:0] */ | |
298 | /* CLK integral part */ | |
299 | buf[1] = (0x04 << 5) | 0x1a; /* CMI[2:0], CSI[4:0] */ | |
300 | ||
301 | return tda80xx_write(state, 0x17, buf, sizeof(buf)); | |
302 | } | |
303 | ||
304 | #if 0 | |
305 | static int tda80xx_set_scpc_freq_offset(struct tda80xx_state* state) | |
306 | { | |
307 | /* a constant value is nonsense here imho */ | |
308 | return tda80xx_writereg(state, 0x22, 0xf9); | |
309 | } | |
310 | #endif | |
311 | ||
312 | static int tda80xx_close_loop(struct tda80xx_state* state) | |
313 | { | |
314 | u8 buf[2]; | |
315 | ||
316 | /* PD: Loop closed, LD: lock detect enable, SCPC: Sweep mode - AFC1 loop closed */ | |
317 | buf[0] = 0x68; | |
318 | /* AFC1: Loop closed, CAR Feedback: 8192 */ | |
319 | buf[1] = 0x70; | |
320 | ||
321 | return tda80xx_write(state, 0x0b, buf, sizeof(buf)); | |
322 | } | |
323 | ||
324 | static irqreturn_t tda80xx_irq(int irq, void *priv, struct pt_regs *pt) | |
325 | { | |
326 | schedule_work(priv); | |
327 | ||
328 | return IRQ_HANDLED; | |
329 | } | |
330 | ||
331 | static void tda80xx_read_status_int(struct tda80xx_state* state) | |
332 | { | |
333 | u8 val; | |
334 | ||
335 | static const fe_spectral_inversion_t inv_tab[] = { | |
336 | INVERSION_OFF, INVERSION_ON | |
337 | }; | |
338 | ||
339 | static const fe_code_rate_t fec_tab[] = { | |
340 | FEC_8_9, FEC_1_2, FEC_2_3, FEC_3_4, | |
341 | FEC_4_5, FEC_5_6, FEC_6_7, FEC_7_8, | |
342 | }; | |
343 | ||
344 | val = tda80xx_readreg(state, 0x02); | |
345 | ||
346 | state->status = 0; | |
347 | ||
348 | if (val & 0x01) /* demodulator lock */ | |
349 | state->status |= FE_HAS_SIGNAL; | |
350 | if (val & 0x02) /* clock recovery lock */ | |
351 | state->status |= FE_HAS_CARRIER; | |
352 | if (val & 0x04) /* viterbi lock */ | |
353 | state->status |= FE_HAS_VITERBI; | |
354 | if (val & 0x08) /* deinterleaver lock (packet sync) */ | |
355 | state->status |= FE_HAS_SYNC; | |
356 | if (val & 0x10) /* derandomizer lock (frame sync) */ | |
357 | state->status |= FE_HAS_LOCK; | |
358 | if (val & 0x20) /* frontend can not lock */ | |
359 | state->status |= FE_TIMEDOUT; | |
360 | ||
361 | if ((state->status & (FE_HAS_CARRIER)) && (state->afc_loop)) { | |
362 | printk("tda80xx: closing loop\n"); | |
363 | tda80xx_close_loop(state); | |
364 | state->afc_loop = 0; | |
365 | } | |
366 | ||
367 | if (state->status & (FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK)) { | |
368 | val = tda80xx_readreg(state, 0x0e); | |
369 | state->code_rate = fec_tab[val & 0x07]; | |
370 | if (state->status & (FE_HAS_SYNC | FE_HAS_LOCK)) | |
371 | state->spectral_inversion = inv_tab[(val >> 7) & 0x01]; | |
372 | else | |
373 | state->spectral_inversion = INVERSION_AUTO; | |
374 | } | |
375 | else { | |
376 | state->code_rate = FEC_AUTO; | |
377 | } | |
378 | } | |
379 | ||
380 | static void tda80xx_worklet(void *priv) | |
381 | { | |
382 | struct tda80xx_state *state = priv; | |
383 | ||
384 | tda80xx_writereg(state, 0x00, 0x04); | |
385 | enable_irq(state->config->irq); | |
386 | ||
387 | tda80xx_read_status_int(state); | |
388 | } | |
389 | ||
390 | static void tda80xx_wait_diseqc_fifo(struct tda80xx_state* state) | |
391 | { | |
392 | size_t i; | |
393 | ||
394 | for (i = 0; i < 100; i++) { | |
395 | if (tda80xx_readreg(state, 0x02) & 0x80) | |
396 | break; | |
397 | msleep(10); | |
398 | } | |
399 | } | |
400 | ||
401 | static int tda8044_init(struct dvb_frontend* fe) | |
402 | { | |
b8742700 | 403 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
404 | int ret; |
405 | ||
406 | /* | |
407 | * this function is a mess... | |
408 | */ | |
409 | ||
410 | if ((ret = tda80xx_write(state, 0x00, tda8044_inittab_pre, sizeof(tda8044_inittab_pre)))) | |
411 | return ret; | |
412 | ||
413 | tda80xx_writereg(state, 0x0f, 0x50); | |
414 | #if 1 | |
415 | tda80xx_writereg(state, 0x20, 0x8F); /* FIXME */ | |
416 | tda80xx_writereg(state, 0x20, state->config->volt18setting); /* FIXME */ | |
417 | //tda80xx_writereg(state, 0x00, 0x04); | |
418 | tda80xx_writereg(state, 0x00, 0x0C); | |
419 | #endif | |
420 | //tda80xx_writereg(state, 0x00, 0x08); /* Reset AFC1 loop filter */ | |
421 | ||
422 | tda80xx_write(state, 0x00, tda8044_inittab_post, sizeof(tda8044_inittab_post)); | |
423 | ||
424 | if (state->config->pll_init) { | |
425 | tda80xx_writereg(state, 0x1c, 0x80); | |
426 | state->config->pll_init(fe); | |
427 | tda80xx_writereg(state, 0x1c, 0x00); | |
428 | } | |
429 | ||
430 | return 0; | |
431 | } | |
432 | ||
433 | static int tda8083_init(struct dvb_frontend* fe) | |
434 | { | |
b8742700 | 435 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
436 | |
437 | tda80xx_write(state, 0x00, tda8083_inittab, sizeof(tda8083_inittab)); | |
438 | ||
439 | if (state->config->pll_init) { | |
440 | tda80xx_writereg(state, 0x1c, 0x80); | |
441 | state->config->pll_init(fe); | |
442 | tda80xx_writereg(state, 0x1c, 0x00); | |
443 | } | |
444 | ||
445 | return 0; | |
446 | } | |
447 | ||
448 | static int tda80xx_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage) | |
449 | { | |
b8742700 | 450 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
451 | |
452 | switch (voltage) { | |
453 | case SEC_VOLTAGE_13: | |
454 | return tda80xx_writereg(state, 0x20, state->config->volt13setting); | |
455 | case SEC_VOLTAGE_18: | |
456 | return tda80xx_writereg(state, 0x20, state->config->volt18setting); | |
457 | case SEC_VOLTAGE_OFF: | |
458 | return tda80xx_writereg(state, 0x20, 0); | |
459 | default: | |
460 | return -EINVAL; | |
461 | } | |
462 | } | |
463 | ||
464 | static int tda80xx_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | |
465 | { | |
b8742700 | 466 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
467 | |
468 | switch (tone) { | |
469 | case SEC_TONE_OFF: | |
470 | return tda80xx_writereg(state, 0x29, 0x00); | |
471 | case SEC_TONE_ON: | |
472 | return tda80xx_writereg(state, 0x29, 0x80); | |
473 | default: | |
474 | return -EINVAL; | |
475 | } | |
476 | } | |
477 | ||
478 | static int tda80xx_send_diseqc_msg(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd *cmd) | |
479 | { | |
b8742700 | 480 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
481 | |
482 | if (cmd->msg_len > 6) | |
483 | return -EINVAL; | |
484 | ||
485 | tda80xx_writereg(state, 0x29, 0x08 | (cmd->msg_len - 3)); | |
486 | tda80xx_write(state, 0x23, cmd->msg, cmd->msg_len); | |
487 | tda80xx_writereg(state, 0x29, 0x0c | (cmd->msg_len - 3)); | |
488 | tda80xx_wait_diseqc_fifo(state); | |
489 | ||
490 | return 0; | |
491 | } | |
492 | ||
493 | static int tda80xx_send_diseqc_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t cmd) | |
494 | { | |
b8742700 | 495 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
496 | |
497 | switch (cmd) { | |
498 | case SEC_MINI_A: | |
499 | tda80xx_writereg(state, 0x29, 0x14); | |
500 | break; | |
501 | case SEC_MINI_B: | |
502 | tda80xx_writereg(state, 0x29, 0x1c); | |
503 | break; | |
504 | default: | |
505 | return -EINVAL; | |
506 | } | |
507 | ||
508 | tda80xx_wait_diseqc_fifo(state); | |
509 | ||
510 | return 0; | |
511 | } | |
512 | ||
513 | static int tda80xx_sleep(struct dvb_frontend* fe) | |
514 | { | |
b8742700 | 515 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
516 | |
517 | tda80xx_writereg(state, 0x00, 0x02); /* enter standby */ | |
518 | ||
519 | return 0; | |
520 | } | |
521 | ||
522 | static int tda80xx_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) | |
523 | { | |
b8742700 | 524 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
525 | |
526 | tda80xx_writereg(state, 0x1c, 0x80); | |
527 | state->config->pll_set(fe, p); | |
528 | tda80xx_writereg(state, 0x1c, 0x00); | |
529 | ||
530 | tda80xx_set_parameters(state, p->inversion, p->u.qpsk.symbol_rate, p->u.qpsk.fec_inner); | |
531 | tda80xx_set_clk(state); | |
532 | //tda80xx_set_scpc_freq_offset(state); | |
533 | state->afc_loop = 1; | |
534 | ||
535 | return 0; | |
536 | } | |
537 | ||
538 | static int tda80xx_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) | |
539 | { | |
b8742700 | 540 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
541 | |
542 | if (!state->config->irq) | |
543 | tda80xx_read_status_int(state); | |
544 | ||
545 | p->inversion = state->spectral_inversion; | |
546 | p->u.qpsk.fec_inner = state->code_rate; | |
547 | ||
548 | return 0; | |
549 | } | |
550 | ||
551 | static int tda80xx_read_status(struct dvb_frontend* fe, fe_status_t* status) | |
552 | { | |
b8742700 | 553 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
554 | |
555 | if (!state->config->irq) | |
556 | tda80xx_read_status_int(state); | |
557 | *status = state->status; | |
558 | ||
559 | return 0; | |
560 | } | |
561 | ||
562 | static int tda80xx_read_ber(struct dvb_frontend* fe, u32* ber) | |
563 | { | |
b8742700 | 564 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
565 | int ret; |
566 | u8 buf[3]; | |
567 | ||
568 | if ((ret = tda80xx_read(state, 0x0b, buf, sizeof(buf)))) | |
569 | return ret; | |
570 | ||
571 | *ber = ((buf[0] & 0x1f) << 16) | (buf[1] << 8) | buf[2]; | |
572 | ||
573 | return 0; | |
574 | } | |
575 | ||
576 | static int tda80xx_read_signal_strength(struct dvb_frontend* fe, u16* strength) | |
577 | { | |
b8742700 | 578 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
579 | |
580 | u8 gain = ~tda80xx_readreg(state, 0x01); | |
581 | *strength = (gain << 8) | gain; | |
582 | ||
583 | return 0; | |
584 | } | |
585 | ||
586 | static int tda80xx_read_snr(struct dvb_frontend* fe, u16* snr) | |
587 | { | |
b8742700 | 588 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
589 | |
590 | u8 quality = tda80xx_readreg(state, 0x08); | |
591 | *snr = (quality << 8) | quality; | |
592 | ||
593 | return 0; | |
594 | } | |
595 | ||
596 | static int tda80xx_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |
597 | { | |
b8742700 | 598 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
599 | |
600 | *ucblocks = tda80xx_readreg(state, 0x0f); | |
601 | if (*ucblocks == 0xff) | |
602 | *ucblocks = 0xffffffff; | |
603 | ||
604 | return 0; | |
605 | } | |
606 | ||
607 | static int tda80xx_init(struct dvb_frontend* fe) | |
608 | { | |
b8742700 | 609 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
610 | |
611 | switch(state->id) { | |
612 | case ID_TDA8044: | |
613 | return tda8044_init(fe); | |
614 | ||
615 | case ID_TDA8083: | |
616 | return tda8083_init(fe); | |
617 | } | |
618 | return 0; | |
619 | } | |
620 | ||
621 | static void tda80xx_release(struct dvb_frontend* fe) | |
622 | { | |
b8742700 | 623 | struct tda80xx_state* state = fe->demodulator_priv; |
1da177e4 LT |
624 | |
625 | if (state->config->irq) | |
626 | free_irq(state->config->irq, &state->worklet); | |
627 | ||
628 | kfree(state); | |
629 | } | |
630 | ||
631 | static struct dvb_frontend_ops tda80xx_ops; | |
632 | ||
633 | struct dvb_frontend* tda80xx_attach(const struct tda80xx_config* config, | |
634 | struct i2c_adapter* i2c) | |
635 | { | |
636 | struct tda80xx_state* state = NULL; | |
637 | int ret; | |
638 | ||
639 | /* allocate memory for the internal state */ | |
b8742700 | 640 | state = kmalloc(sizeof(struct tda80xx_state), GFP_KERNEL); |
1da177e4 LT |
641 | if (state == NULL) goto error; |
642 | ||
643 | /* setup the state */ | |
644 | state->config = config; | |
645 | state->i2c = i2c; | |
646 | memcpy(&state->ops, &tda80xx_ops, sizeof(struct dvb_frontend_ops)); | |
647 | state->spectral_inversion = INVERSION_AUTO; | |
648 | state->code_rate = FEC_AUTO; | |
649 | state->status = 0; | |
650 | state->afc_loop = 0; | |
651 | ||
652 | /* check if the demod is there */ | |
653 | if (tda80xx_writereg(state, 0x89, 0x00) < 0) goto error; | |
654 | state->id = tda80xx_readreg(state, 0x00); | |
655 | ||
656 | switch (state->id) { | |
657 | case ID_TDA8044: | |
658 | state->clk = 96000000; | |
659 | printk("tda80xx: Detected tda8044\n"); | |
660 | break; | |
661 | ||
662 | case ID_TDA8083: | |
663 | state->clk = 64000000; | |
664 | printk("tda80xx: Detected tda8083\n"); | |
665 | break; | |
666 | ||
667 | default: | |
668 | goto error; | |
669 | } | |
670 | ||
671 | /* setup IRQ */ | |
672 | if (state->config->irq) { | |
673 | INIT_WORK(&state->worklet, tda80xx_worklet, state); | |
674 | if ((ret = request_irq(state->config->irq, tda80xx_irq, SA_ONESHOT, "tda80xx", &state->worklet)) < 0) { | |
675 | printk(KERN_ERR "tda80xx: request_irq failed (%d)\n", ret); | |
676 | goto error; | |
677 | } | |
678 | } | |
679 | ||
680 | /* create dvb_frontend */ | |
681 | state->frontend.ops = &state->ops; | |
682 | state->frontend.demodulator_priv = state; | |
683 | return &state->frontend; | |
684 | ||
685 | error: | |
686 | kfree(state); | |
687 | return NULL; | |
688 | } | |
689 | ||
690 | static struct dvb_frontend_ops tda80xx_ops = { | |
691 | ||
692 | .info = { | |
693 | .name = "Philips TDA80xx DVB-S", | |
694 | .type = FE_QPSK, | |
695 | .frequency_min = 500000, | |
696 | .frequency_max = 2700000, | |
697 | .frequency_stepsize = 125, | |
698 | .symbol_rate_min = 4500000, | |
699 | .symbol_rate_max = 45000000, | |
700 | .caps = FE_CAN_INVERSION_AUTO | | |
701 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
702 | FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | | |
703 | FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO | | |
704 | FE_CAN_QPSK | | |
705 | FE_CAN_MUTE_TS | |
706 | }, | |
707 | ||
708 | .release = tda80xx_release, | |
709 | ||
710 | .init = tda80xx_init, | |
711 | .sleep = tda80xx_sleep, | |
712 | ||
713 | .set_frontend = tda80xx_set_frontend, | |
714 | .get_frontend = tda80xx_get_frontend, | |
715 | ||
716 | .read_status = tda80xx_read_status, | |
717 | .read_ber = tda80xx_read_ber, | |
718 | .read_signal_strength = tda80xx_read_signal_strength, | |
719 | .read_snr = tda80xx_read_snr, | |
720 | .read_ucblocks = tda80xx_read_ucblocks, | |
721 | ||
722 | .diseqc_send_master_cmd = tda80xx_send_diseqc_msg, | |
723 | .diseqc_send_burst = tda80xx_send_diseqc_burst, | |
724 | .set_tone = tda80xx_set_tone, | |
725 | .set_voltage = tda80xx_set_voltage, | |
726 | }; | |
727 | ||
728 | module_param(debug, int, 0644); | |
729 | ||
730 | MODULE_DESCRIPTION("Philips TDA8044 / TDA8083 DVB-S Demodulator driver"); | |
731 | MODULE_AUTHOR("Felix Domke, Andreas Oberritter"); | |
732 | MODULE_LICENSE("GPL"); | |
733 | ||
734 | EXPORT_SYMBOL(tda80xx_attach); |