V4L/DVB (8074): av7110: OSD transfers should not be interrupted
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / dvb / frontends / stv0299.c
CommitLineData
1da177e4
LT
1/*
2 Driver for ST STV0299 demodulator
3
4 Copyright (C) 2001-2002 Convergence Integrated Media GmbH
5 <ralph@convergence.de>,
6 <holger@convergence.de>,
7 <js@convergence.de>
8
9
10 Philips SU1278/SH
11
12 Copyright (C) 2002 by Peter Schildmann <peter.schildmann@web.de>
13
14
15 LG TDQF-S001F
16
17 Copyright (C) 2002 Felix Domke <tmbinc@elitedvb.net>
18 & Andreas Oberritter <obi@linuxtv.org>
19
20
21 Support for Samsung TBMU24112IMB used on Technisat SkyStar2 rev. 2.6B
22
23 Copyright (C) 2003 Vadim Catana <skystar@moldova.cc>:
24
25 Support for Philips SU1278 on Technotrend hardware
26
27 Copyright (C) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
28
29 This program is free software; you can redistribute it and/or modify
30 it under the terms of the GNU General Public License as published by
31 the Free Software Foundation; either version 2 of the License, or
32 (at your option) any later version.
33
34 This program is distributed in the hope that it will be useful,
35 but WITHOUT ANY WARRANTY; without even the implied warranty of
36 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37 GNU General Public License for more details.
38
39 You should have received a copy of the GNU General Public License
40 along with this program; if not, write to the Free Software
41 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
42
43*/
44
45#include <linux/init.h>
46#include <linux/kernel.h>
47#include <linux/module.h>
1da177e4
LT
48#include <linux/string.h>
49#include <linux/slab.h>
4e57b681 50#include <linux/jiffies.h>
1da177e4
LT
51#include <asm/div64.h>
52
53#include "dvb_frontend.h"
54#include "stv0299.h"
55
56struct stv0299_state {
57 struct i2c_adapter* i2c;
1da177e4
LT
58 const struct stv0299_config* config;
59 struct dvb_frontend frontend;
60
61 u8 initialised:1;
62 u32 tuner_frequency;
63 u32 symbol_rate;
64 fe_code_rate_t fec_inner;
37650221 65 int errmode;
1da177e4
LT
66};
67
37650221
AQ
68#define STATUS_BER 0
69#define STATUS_UCBLOCKS 1
70
1da177e4 71static int debug;
591ad98d 72static int debug_legacy_dish_switch;
1da177e4
LT
73#define dprintk(args...) \
74 do { \
75 if (debug) printk(KERN_DEBUG "stv0299: " args); \
76 } while (0)
77
78
79static int stv0299_writeregI (struct stv0299_state* state, u8 reg, u8 data)
80{
81 int ret;
82 u8 buf [] = { reg, data };
83 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
84
85 ret = i2c_transfer (state->i2c, &msg, 1);
86
87 if (ret != 1)
88 dprintk("%s: writereg error (reg == 0x%02x, val == 0x%02x, "
271ddbf7 89 "ret == %i)\n", __func__, reg, data, ret);
1da177e4
LT
90
91 return (ret != 1) ? -EREMOTEIO : 0;
92}
93
34630409 94static int stv0299_write(struct dvb_frontend* fe, u8 *buf, int len)
1da177e4 95{
9101e622 96 struct stv0299_state* state = fe->demodulator_priv;
1da177e4 97
c10d14d6
AQ
98 if (len != 2)
99 return -EINVAL;
100
101 return stv0299_writeregI(state, buf[0], buf[1]);
1da177e4
LT
102}
103
104static u8 stv0299_readreg (struct stv0299_state* state, u8 reg)
105{
106 int ret;
107 u8 b0 [] = { reg };
108 u8 b1 [] = { 0 };
109 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
110 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
111
112 ret = i2c_transfer (state->i2c, msg, 2);
113
114 if (ret != 2)
115 dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n",
271ddbf7 116 __func__, reg, ret);
1da177e4
LT
117
118 return b1[0];
119}
120
121static int stv0299_readregs (struct stv0299_state* state, u8 reg1, u8 *b, u8 len)
122{
123 int ret;
124 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = &reg1, .len = 1 },
125 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b, .len = len } };
126
127 ret = i2c_transfer (state->i2c, msg, 2);
128
129 if (ret != 2)
271ddbf7 130 dprintk("%s: readreg error (ret == %i)\n", __func__, ret);
1da177e4
LT
131
132 return ret == 2 ? 0 : ret;
133}
134
135static int stv0299_set_FEC (struct stv0299_state* state, fe_code_rate_t fec)
136{
271ddbf7 137 dprintk ("%s\n", __func__);
1da177e4
LT
138
139 switch (fec) {
140 case FEC_AUTO:
141 {
142 return stv0299_writeregI (state, 0x31, 0x1f);
143 }
144 case FEC_1_2:
145 {
146 return stv0299_writeregI (state, 0x31, 0x01);
147 }
148 case FEC_2_3:
149 {
150 return stv0299_writeregI (state, 0x31, 0x02);
151 }
152 case FEC_3_4:
153 {
154 return stv0299_writeregI (state, 0x31, 0x04);
155 }
156 case FEC_5_6:
157 {
158 return stv0299_writeregI (state, 0x31, 0x08);
159 }
160 case FEC_7_8:
161 {
162 return stv0299_writeregI (state, 0x31, 0x10);
163 }
164 default:
165 {
166 return -EINVAL;
167 }
168 }
169}
170
171static fe_code_rate_t stv0299_get_fec (struct stv0299_state* state)
172{
173 static fe_code_rate_t fec_tab [] = { FEC_2_3, FEC_3_4, FEC_5_6,
174 FEC_7_8, FEC_1_2 };
175 u8 index;
176
271ddbf7 177 dprintk ("%s\n", __func__);
1da177e4
LT
178
179 index = stv0299_readreg (state, 0x1b);
180 index &= 0x7;
181
182 if (index > 4)
183 return FEC_AUTO;
184
185 return fec_tab [index];
186}
187
188static int stv0299_wait_diseqc_fifo (struct stv0299_state* state, int timeout)
189{
190 unsigned long start = jiffies;
191
271ddbf7 192 dprintk ("%s\n", __func__);
1da177e4
LT
193
194 while (stv0299_readreg(state, 0x0a) & 1) {
195 if (jiffies - start > timeout) {
271ddbf7 196 dprintk ("%s: timeout!!\n", __func__);
1da177e4
LT
197 return -ETIMEDOUT;
198 }
199 msleep(10);
200 };
201
202 return 0;
203}
204
205static int stv0299_wait_diseqc_idle (struct stv0299_state* state, int timeout)
206{
207 unsigned long start = jiffies;
208
271ddbf7 209 dprintk ("%s\n", __func__);
1da177e4
LT
210
211 while ((stv0299_readreg(state, 0x0a) & 3) != 2 ) {
212 if (jiffies - start > timeout) {
271ddbf7 213 dprintk ("%s: timeout!!\n", __func__);
1da177e4
LT
214 return -ETIMEDOUT;
215 }
216 msleep(10);
217 };
218
219 return 0;
220}
221
222static int stv0299_set_symbolrate (struct dvb_frontend* fe, u32 srate)
223{
9101e622 224 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
225 u64 big = srate;
226 u32 ratio;
227
228 // check rate is within limits
229 if ((srate < 1000000) || (srate > 45000000)) return -EINVAL;
230
231 // calculate value to program
232 big = big << 20;
233 big += (state->config->mclk-1); // round correctly
234 do_div(big, state->config->mclk);
235 ratio = big << 4;
236
237 return state->config->set_symbol_rate(fe, srate, ratio);
238}
239
240static int stv0299_get_symbolrate (struct stv0299_state* state)
241{
242 u32 Mclk = state->config->mclk / 4096L;
243 u32 srate;
244 s32 offset;
245 u8 sfr[3];
246 s8 rtf;
247
271ddbf7 248 dprintk ("%s\n", __func__);
1da177e4
LT
249
250 stv0299_readregs (state, 0x1f, sfr, 3);
0402a6c2 251 stv0299_readregs (state, 0x1a, (u8 *)&rtf, 1);
1da177e4
LT
252
253 srate = (sfr[0] << 8) | sfr[1];
254 srate *= Mclk;
255 srate /= 16;
256 srate += (sfr[2] >> 4) * Mclk / 256;
257 offset = (s32) rtf * (srate / 4096L);
258 offset /= 128;
259
271ddbf7
HH
260 dprintk ("%s : srate = %i\n", __func__, srate);
261 dprintk ("%s : ofset = %i\n", __func__, offset);
1da177e4
LT
262
263 srate += offset;
264
265 srate += 1000;
266 srate /= 2000;
267 srate *= 2000;
268
269 return srate;
270}
271
272static int stv0299_send_diseqc_msg (struct dvb_frontend* fe,
273 struct dvb_diseqc_master_cmd *m)
274{
9101e622 275 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
276 u8 val;
277 int i;
278
271ddbf7 279 dprintk ("%s\n", __func__);
1da177e4
LT
280
281 if (stv0299_wait_diseqc_idle (state, 100) < 0)
282 return -ETIMEDOUT;
283
284 val = stv0299_readreg (state, 0x08);
285
286 if (stv0299_writeregI (state, 0x08, (val & ~0x7) | 0x6)) /* DiSEqC mode */
287 return -EREMOTEIO;
288
289 for (i=0; i<m->msg_len; i++) {
290 if (stv0299_wait_diseqc_fifo (state, 100) < 0)
291 return -ETIMEDOUT;
292
293 if (stv0299_writeregI (state, 0x09, m->msg[i]))
294 return -EREMOTEIO;
295 }
296
297 if (stv0299_wait_diseqc_idle (state, 100) < 0)
298 return -ETIMEDOUT;
299
300 return 0;
301}
302
303static int stv0299_send_diseqc_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t burst)
304{
9101e622 305 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
306 u8 val;
307
271ddbf7 308 dprintk ("%s\n", __func__);
1da177e4
LT
309
310 if (stv0299_wait_diseqc_idle (state, 100) < 0)
311 return -ETIMEDOUT;
312
313 val = stv0299_readreg (state, 0x08);
314
315 if (stv0299_writeregI (state, 0x08, (val & ~0x7) | 0x2)) /* burst mode */
316 return -EREMOTEIO;
317
318 if (stv0299_writeregI (state, 0x09, burst == SEC_MINI_A ? 0x00 : 0xff))
319 return -EREMOTEIO;
320
321 if (stv0299_wait_diseqc_idle (state, 100) < 0)
322 return -ETIMEDOUT;
323
324 if (stv0299_writeregI (state, 0x08, val))
325 return -EREMOTEIO;
326
327 return 0;
328}
329
330static int stv0299_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
331{
9101e622 332 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
333 u8 val;
334
335 if (stv0299_wait_diseqc_idle (state, 100) < 0)
336 return -ETIMEDOUT;
337
338 val = stv0299_readreg (state, 0x08);
339
340 switch (tone) {
341 case SEC_TONE_ON:
342 return stv0299_writeregI (state, 0x08, val | 0x3);
343
344 case SEC_TONE_OFF:
345 return stv0299_writeregI (state, 0x08, (val & ~0x3) | 0x02);
346
347 default:
348 return -EINVAL;
349 }
350}
351
352static int stv0299_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t voltage)
353{
9101e622 354 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
355 u8 reg0x08;
356 u8 reg0x0c;
357
271ddbf7 358 dprintk("%s: %s\n", __func__,
1da177e4
LT
359 voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" :
360 voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??");
361
362 reg0x08 = stv0299_readreg (state, 0x08);
363 reg0x0c = stv0299_readreg (state, 0x0c);
364
365 /**
366 * H/V switching over OP0, OP1 and OP2 are LNB power enable bits
367 */
368 reg0x0c &= 0x0f;
e84b133e 369 reg0x08 = (reg0x08 & 0x3f) | (state->config->lock_output << 6);
1da177e4
LT
370
371 switch (voltage) {
372 case SEC_VOLTAGE_13:
e84b133e
OE
373 if (state->config->volt13_op0_op1 == STV0299_VOLT13_OP0)
374 reg0x0c |= 0x10; /* OP1 off, OP0 on */
375 else
376 reg0x0c |= 0x40; /* OP1 on, OP0 off */
377 break;
1da177e4 378 case SEC_VOLTAGE_18:
e84b133e
OE
379 reg0x0c |= 0x50; /* OP1 on, OP0 on */
380 break;
381 case SEC_VOLTAGE_OFF:
382 /* LNB power off! */
383 reg0x08 = 0x00;
384 reg0x0c = 0x00;
385 break;
1da177e4
LT
386 default:
387 return -EINVAL;
388 };
e84b133e
OE
389
390 if (state->config->op0_off)
391 reg0x0c &= ~0x10;
392
393 stv0299_writeregI(state, 0x08, reg0x08);
394 return stv0299_writeregI(state, 0x0c, reg0x0c);
1da177e4
LT
395}
396
400b7083 397static int stv0299_send_legacy_dish_cmd (struct dvb_frontend* fe, unsigned long cmd)
591ad98d
JS
398{
399 struct stv0299_state* state = fe->demodulator_priv;
400 u8 reg0x08;
401 u8 reg0x0c;
402 u8 lv_mask = 0x40;
1da177e4
LT
403 u8 last = 1;
404 int i;
591ad98d
JS
405 struct timeval nexttime;
406 struct timeval tv[10];
1da177e4 407
591ad98d
JS
408 reg0x08 = stv0299_readreg (state, 0x08);
409 reg0x0c = stv0299_readreg (state, 0x0c);
410 reg0x0c &= 0x0f;
411 stv0299_writeregI (state, 0x08, (reg0x08 & 0x3f) | (state->config->lock_output << 6));
412 if (state->config->volt13_op0_op1 == STV0299_VOLT13_OP0)
413 lv_mask = 0x10;
1da177e4
LT
414
415 cmd = cmd << 1;
591ad98d 416 if (debug_legacy_dish_switch)
271ddbf7 417 printk ("%s switch command: 0x%04lx\n",__func__, cmd);
591ad98d
JS
418
419 do_gettimeofday (&nexttime);
420 if (debug_legacy_dish_switch)
421 memcpy (&tv[0], &nexttime, sizeof (struct timeval));
422 stv0299_writeregI (state, 0x0c, reg0x0c | 0x50); /* set LNB to 18V */
1da177e4 423
83b75b04 424 dvb_frontend_sleep_until(&nexttime, 32000);
1da177e4
LT
425
426 for (i=0; i<9; i++) {
591ad98d
JS
427 if (debug_legacy_dish_switch)
428 do_gettimeofday (&tv[i+1]);
1da177e4 429 if((cmd & 0x01) != last) {
591ad98d
JS
430 /* set voltage to (last ? 13V : 18V) */
431 stv0299_writeregI (state, 0x0c, reg0x0c | (last ? lv_mask : 0x50));
1da177e4
LT
432 last = (last) ? 0 : 1;
433 }
434
435 cmd = cmd >> 1;
436
437 if (i != 8)
83b75b04 438 dvb_frontend_sleep_until(&nexttime, 8000);
591ad98d
JS
439 }
440 if (debug_legacy_dish_switch) {
441 printk ("%s(%d): switch delay (should be 32k followed by all 8k\n",
271ddbf7 442 __func__, fe->dvb->num);
83b75b04
N
443 for (i = 1; i < 10; i++)
444 printk ("%d: %d\n", i, timeval_usec_diff(tv[i-1] , tv[i]));
1da177e4
LT
445 }
446
447 return 0;
448}
449
450static int stv0299_init (struct dvb_frontend* fe)
451{
9101e622 452 struct stv0299_state* state = fe->demodulator_priv;
1da177e4 453 int i;
e84b133e
OE
454 u8 reg;
455 u8 val;
1da177e4
LT
456
457 dprintk("stv0299: init chip\n");
458
e84b133e
OE
459 for (i = 0; ; i += 2) {
460 reg = state->config->inittab[i];
461 val = state->config->inittab[i+1];
462 if (reg == 0xff && val == 0xff)
463 break;
464 if (reg == 0x0c && state->config->op0_off)
465 val &= ~0x10;
466 stv0299_writeregI(state, reg, val);
467 }
1da177e4 468
1da177e4
LT
469 return 0;
470}
471
472static int stv0299_read_status(struct dvb_frontend* fe, fe_status_t* status)
473{
9101e622 474 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
475
476 u8 signal = 0xff - stv0299_readreg (state, 0x18);
477 u8 sync = stv0299_readreg (state, 0x1b);
478
271ddbf7 479 dprintk ("%s : FE_READ_STATUS : VSTATUS: 0x%02x\n", __func__, sync);
1da177e4
LT
480 *status = 0;
481
482 if (signal > 10)
483 *status |= FE_HAS_SIGNAL;
484
485 if (sync & 0x80)
486 *status |= FE_HAS_CARRIER;
487
488 if (sync & 0x10)
489 *status |= FE_HAS_VITERBI;
490
491 if (sync & 0x08)
492 *status |= FE_HAS_SYNC;
493
494 if ((sync & 0x98) == 0x98)
495 *status |= FE_HAS_LOCK;
496
497 return 0;
498}
499
500static int stv0299_read_ber(struct dvb_frontend* fe, u32* ber)
501{
9101e622 502 struct stv0299_state* state = fe->demodulator_priv;
1da177e4 503
37650221 504 if (state->errmode != STATUS_BER) return 0;
1da177e4
LT
505 *ber = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e);
506
507 return 0;
508}
509
510static int stv0299_read_signal_strength(struct dvb_frontend* fe, u16* strength)
511{
9101e622 512 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
513
514 s32 signal = 0xffff - ((stv0299_readreg (state, 0x18) << 8)
515 | stv0299_readreg (state, 0x19));
516
271ddbf7 517 dprintk ("%s : FE_READ_SIGNAL_STRENGTH : AGC2I: 0x%02x%02x, signal=0x%04x\n", __func__,
1da177e4
LT
518 stv0299_readreg (state, 0x18),
519 stv0299_readreg (state, 0x19), (int) signal);
520
521 signal = signal * 5 / 4;
522 *strength = (signal > 0xffff) ? 0xffff : (signal < 0) ? 0 : signal;
523
524 return 0;
525}
526
527static int stv0299_read_snr(struct dvb_frontend* fe, u16* snr)
528{
9101e622 529 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
530
531 s32 xsnr = 0xffff - ((stv0299_readreg (state, 0x24) << 8)
532 | stv0299_readreg (state, 0x25));
533 xsnr = 3 * (xsnr - 0xa100);
534 *snr = (xsnr > 0xffff) ? 0xffff : (xsnr < 0) ? 0 : xsnr;
535
536 return 0;
537}
538
539static int stv0299_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
540{
9101e622 541 struct stv0299_state* state = fe->demodulator_priv;
1da177e4 542
37650221
AQ
543 if (state->errmode != STATUS_UCBLOCKS) *ucblocks = 0;
544 else *ucblocks = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e);
1da177e4
LT
545
546 return 0;
547}
548
549static int stv0299_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters * p)
550{
9101e622 551 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
552 int invval = 0;
553
271ddbf7 554 dprintk ("%s : FE_SET_FRONTEND\n", __func__);
1da177e4
LT
555
556 // set the inversion
557 if (p->inversion == INVERSION_OFF) invval = 0;
558 else if (p->inversion == INVERSION_ON) invval = 1;
559 else {
560 printk("stv0299 does not support auto-inversion\n");
561 return -EINVAL;
562 }
563 if (state->config->invert) invval = (~invval) & 1;
564 stv0299_writeregI(state, 0x0c, (stv0299_readreg(state, 0x0c) & 0xfe) | invval);
565
dea74869
PB
566 if (fe->ops.tuner_ops.set_params) {
567 fe->ops.tuner_ops.set_params(fe, p);
568 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
53a8ee3e 569 }
3528cc4e
AQ
570
571 stv0299_set_FEC (state, p->u.qpsk.fec_inner);
572 stv0299_set_symbolrate (fe, p->u.qpsk.symbol_rate);
573 stv0299_writeregI(state, 0x22, 0x00);
574 stv0299_writeregI(state, 0x23, 0x00);
1da177e4
LT
575
576 state->tuner_frequency = p->frequency;
577 state->fec_inner = p->u.qpsk.fec_inner;
578 state->symbol_rate = p->u.qpsk.symbol_rate;
579
580 return 0;
581}
582
583static int stv0299_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters * p)
584{
9101e622 585 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
586 s32 derot_freq;
587 int invval;
588
589 derot_freq = (s32)(s16) ((stv0299_readreg (state, 0x22) << 8)
590 | stv0299_readreg (state, 0x23));
591
592 derot_freq *= (state->config->mclk >> 16);
593 derot_freq += 500;
594 derot_freq /= 1000;
595
596 p->frequency += derot_freq;
597
598 invval = stv0299_readreg (state, 0x0c) & 1;
599 if (state->config->invert) invval = (~invval) & 1;
600 p->inversion = invval ? INVERSION_ON : INVERSION_OFF;
601
602 p->u.qpsk.fec_inner = stv0299_get_fec (state);
603 p->u.qpsk.symbol_rate = stv0299_get_symbolrate (state);
604
605 return 0;
606}
607
608static int stv0299_sleep(struct dvb_frontend* fe)
609{
9101e622 610 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
611
612 stv0299_writeregI(state, 0x02, 0x80);
613 state->initialised = 0;
614
615 return 0;
616}
617
53a8ee3e
AQ
618static int stv0299_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
619{
620 struct stv0299_state* state = fe->demodulator_priv;
621
622 if (enable) {
a9686e0d 623 stv0299_writeregI(state, 0x05, 0xb5);
53a8ee3e 624 } else {
a9686e0d 625 stv0299_writeregI(state, 0x05, 0x35);
53a8ee3e 626 }
a9686e0d
AQ
627 udelay(1);
628 return 0;
53a8ee3e
AQ
629}
630
1da177e4
LT
631static int stv0299_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
632{
9101e622 633 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
634
635 fesettings->min_delay_ms = state->config->min_delay_ms;
636 if (fesettings->parameters.u.qpsk.symbol_rate < 10000000) {
637 fesettings->step_size = fesettings->parameters.u.qpsk.symbol_rate / 32000;
638 fesettings->max_drift = 5000;
639 } else {
640 fesettings->step_size = fesettings->parameters.u.qpsk.symbol_rate / 16000;
641 fesettings->max_drift = fesettings->parameters.u.qpsk.symbol_rate / 2000;
642 }
643 return 0;
644}
645
646static void stv0299_release(struct dvb_frontend* fe)
647{
b8742700 648 struct stv0299_state* state = fe->demodulator_priv;
1da177e4
LT
649 kfree(state);
650}
651
652static struct dvb_frontend_ops stv0299_ops;
653
654struct dvb_frontend* stv0299_attach(const struct stv0299_config* config,
655 struct i2c_adapter* i2c)
656{
657 struct stv0299_state* state = NULL;
658 int id;
659
660 /* allocate memory for the internal state */
b8742700 661 state = kmalloc(sizeof(struct stv0299_state), GFP_KERNEL);
1da177e4
LT
662 if (state == NULL) goto error;
663
664 /* setup the state */
665 state->config = config;
666 state->i2c = i2c;
1da177e4
LT
667 state->initialised = 0;
668 state->tuner_frequency = 0;
669 state->symbol_rate = 0;
670 state->fec_inner = 0;
37650221 671 state->errmode = STATUS_BER;
1da177e4
LT
672
673 /* check if the demod is there */
674 stv0299_writeregI(state, 0x02, 0x34); /* standby off */
675 msleep(200);
676 id = stv0299_readreg(state, 0x00);
677
678 /* register 0x00 contains 0xa1 for STV0299 and STV0299B */
679 /* register 0x00 might contain 0x80 when returning from standby */
680 if (id != 0xa1 && id != 0x80) goto error;
681
682 /* create dvb_frontend */
dea74869 683 memcpy(&state->frontend.ops, &stv0299_ops, sizeof(struct dvb_frontend_ops));
9101e622 684 state->frontend.demodulator_priv = state;
1da177e4
LT
685 return &state->frontend;
686
687error:
688 kfree(state);
689 return NULL;
690}
691
692static struct dvb_frontend_ops stv0299_ops = {
693
694 .info = {
695 .name = "ST STV0299 DVB-S",
696 .type = FE_QPSK,
697 .frequency_min = 950000,
698 .frequency_max = 2150000,
699 .frequency_stepsize = 125, /* kHz for QPSK frontends */
700 .frequency_tolerance = 0,
701 .symbol_rate_min = 1000000,
702 .symbol_rate_max = 45000000,
703 .symbol_rate_tolerance = 500, /* ppm */
704 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
705 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
706 FE_CAN_QPSK |
707 FE_CAN_FEC_AUTO
708 },
709
710 .release = stv0299_release,
711
712 .init = stv0299_init,
713 .sleep = stv0299_sleep,
c10d14d6 714 .write = stv0299_write,
53a8ee3e 715 .i2c_gate_ctrl = stv0299_i2c_gate_ctrl,
1da177e4
LT
716
717 .set_frontend = stv0299_set_frontend,
718 .get_frontend = stv0299_get_frontend,
719 .get_tune_settings = stv0299_get_tune_settings,
720
721 .read_status = stv0299_read_status,
722 .read_ber = stv0299_read_ber,
723 .read_signal_strength = stv0299_read_signal_strength,
724 .read_snr = stv0299_read_snr,
725 .read_ucblocks = stv0299_read_ucblocks,
726
727 .diseqc_send_master_cmd = stv0299_send_diseqc_msg,
728 .diseqc_send_burst = stv0299_send_diseqc_burst,
729 .set_tone = stv0299_set_tone,
730 .set_voltage = stv0299_set_voltage,
731 .dishnetwork_send_legacy_command = stv0299_send_legacy_dish_cmd,
732};
733
591ad98d
JS
734module_param(debug_legacy_dish_switch, int, 0444);
735MODULE_PARM_DESC(debug_legacy_dish_switch, "Enable timing analysis for Dish Network legacy switches");
736
1da177e4
LT
737module_param(debug, int, 0644);
738MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
739
740MODULE_DESCRIPTION("ST STV0299 DVB Demodulator driver");
741MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Peter Schildmann, Felix Domke, "
53a8ee3e 742 "Andreas Oberritter, Andrew de Quincey, Kenneth Aafly");
1da177e4
LT
743MODULE_LICENSE("GPL");
744
1da177e4 745EXPORT_SYMBOL(stv0299_attach);