[media] ir-core: make struct rc_dev the primary interface
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / dvb / dm1105 / dm1105.c
CommitLineData
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1/*
2 * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
3 *
4 * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
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22#include <linux/i2c.h>
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/proc_fs.h>
27#include <linux/pci.h>
28#include <linux/dma-mapping.h>
5a0e3ad6 29#include <linux/slab.h>
15100d89 30#include <media/ir-core.h>
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31
32#include "demux.h"
33#include "dmxdev.h"
34#include "dvb_demux.h"
35#include "dvb_frontend.h"
36#include "dvb_net.h"
37#include "dvbdev.h"
38#include "dvb-pll.h"
39
40#include "stv0299.h"
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41#include "stv0288.h"
42#include "stb6000.h"
04ad28c9 43#include "si21xx.h"
35d9c427 44#include "cx24116.h"
a611d0ca 45#include "z0194a.h"
b4a0e816 46#include "ds3000.h"
a611d0ca 47
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48#define MODULE_NAME "dm1105"
49
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50#define UNSET (-1U)
51
52#define DM1105_BOARD_NOAUTO UNSET
53#define DM1105_BOARD_UNKNOWN 0
54#define DM1105_BOARD_DVBWORLD_2002 1
55#define DM1105_BOARD_DVBWORLD_2004 2
56#define DM1105_BOARD_AXESS_DM05 3
57
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58/* ----------------------------------------------- */
59/*
60 * PCI ID's
61 */
62#ifndef PCI_VENDOR_ID_TRIGEM
63#define PCI_VENDOR_ID_TRIGEM 0x109f
64#endif
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65#ifndef PCI_VENDOR_ID_AXESS
66#define PCI_VENDOR_ID_AXESS 0x195d
67#endif
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68#ifndef PCI_DEVICE_ID_DM1105
69#define PCI_DEVICE_ID_DM1105 0x036f
70#endif
71#ifndef PCI_DEVICE_ID_DW2002
72#define PCI_DEVICE_ID_DW2002 0x2002
73#endif
74#ifndef PCI_DEVICE_ID_DW2004
75#define PCI_DEVICE_ID_DW2004 0x2004
76#endif
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77#ifndef PCI_DEVICE_ID_DM05
78#define PCI_DEVICE_ID_DM05 0x1105
79#endif
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80/* ----------------------------------------------- */
81/* sdmc dm1105 registers */
82
83/* TS Control */
84#define DM1105_TSCTR 0x00
85#define DM1105_DTALENTH 0x04
86
87/* GPIO Interface */
88#define DM1105_GPIOVAL 0x08
89#define DM1105_GPIOCTR 0x0c
90
91/* PID serial number */
92#define DM1105_PIDN 0x10
93
94/* Odd-even secret key select */
95#define DM1105_CWSEL 0x14
96
97/* Host Command Interface */
98#define DM1105_HOST_CTR 0x18
99#define DM1105_HOST_AD 0x1c
100
101/* PCI Interface */
102#define DM1105_CR 0x30
103#define DM1105_RST 0x34
104#define DM1105_STADR 0x38
105#define DM1105_RLEN 0x3c
106#define DM1105_WRP 0x40
107#define DM1105_INTCNT 0x44
108#define DM1105_INTMAK 0x48
109#define DM1105_INTSTS 0x4c
110
111/* CW Value */
112#define DM1105_ODD 0x50
113#define DM1105_EVEN 0x58
114
115/* PID Value */
116#define DM1105_PID 0x60
117
118/* IR Control */
119#define DM1105_IRCTR 0x64
120#define DM1105_IRMODE 0x68
121#define DM1105_SYSTEMCODE 0x6c
122#define DM1105_IRCODE 0x70
123
124/* Unknown Values */
125#define DM1105_ENCRYPT 0x74
126#define DM1105_VER 0x7c
127
128/* I2C Interface */
129#define DM1105_I2CCTR 0x80
130#define DM1105_I2CSTS 0x81
131#define DM1105_I2CDAT 0x82
132#define DM1105_I2C_RA 0x83
133/* ----------------------------------------------- */
134/* Interrupt Mask Bits */
135
136#define INTMAK_TSIRQM 0x01
137#define INTMAK_HIRQM 0x04
138#define INTMAK_IRM 0x08
139#define INTMAK_ALLMASK (INTMAK_TSIRQM | \
140 INTMAK_HIRQM | \
141 INTMAK_IRM)
142#define INTMAK_NONEMASK 0x00
143
144/* Interrupt Status Bits */
145#define INTSTS_TSIRQ 0x01
146#define INTSTS_HIRQ 0x04
147#define INTSTS_IR 0x08
148
149/* IR Control Bits */
150#define DM1105_IR_EN 0x01
151#define DM1105_SYS_CHK 0x02
152#define DM1105_REP_FLG 0x08
153
154/* EEPROM addr */
155#define IIC_24C01_addr 0xa0
156/* Max board count */
157#define DM1105_MAX 0x04
158
159#define DRIVER_NAME "dm1105"
160
161#define DM1105_DMA_PACKETS 47
162#define DM1105_DMA_PACKET_LENGTH (128*4)
163#define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
164
165/* GPIO's for LNB power control */
166#define DM1105_LNB_MASK 0x00000000
d8300df9 167#define DM1105_LNB_OFF 0x00020000
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168#define DM1105_LNB_13V 0x00010100
169#define DM1105_LNB_18V 0x00000100
170
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171/* GPIO's for LNB power control for Axess DM05 */
172#define DM05_LNB_MASK 0x00000000
d8300df9 173#define DM05_LNB_OFF 0x00020000/* actually 13v */
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174#define DM05_LNB_13V 0x00020000
175#define DM05_LNB_18V 0x00030000
176
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177static unsigned int card[] = {[0 ... 3] = UNSET };
178module_param_array(card, int, NULL, 0444);
179MODULE_PARM_DESC(card, "card type");
180
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181static int ir_debug;
182module_param(ir_debug, int, 0644);
183MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
184
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185static unsigned int dm1105_devcount;
186
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187DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
188
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189struct dm1105_board {
190 char *name;
191};
192
193struct dm1105_subid {
194 u16 subvendor;
195 u16 subdevice;
196 u32 card;
197};
198
199static const struct dm1105_board dm1105_boards[] = {
200 [DM1105_BOARD_UNKNOWN] = {
201 .name = "UNKNOWN/GENERIC",
202 },
203 [DM1105_BOARD_DVBWORLD_2002] = {
204 .name = "DVBWorld PCI 2002",
205 },
206 [DM1105_BOARD_DVBWORLD_2004] = {
207 .name = "DVBWorld PCI 2004",
208 },
209 [DM1105_BOARD_AXESS_DM05] = {
210 .name = "Axess/EasyTv DM05",
211 },
212};
213
214static const struct dm1105_subid dm1105_subids[] = {
215 {
216 .subvendor = 0x0000,
217 .subdevice = 0x2002,
218 .card = DM1105_BOARD_DVBWORLD_2002,
219 }, {
220 .subvendor = 0x0001,
221 .subdevice = 0x2002,
222 .card = DM1105_BOARD_DVBWORLD_2002,
223 }, {
224 .subvendor = 0x0000,
225 .subdevice = 0x2004,
226 .card = DM1105_BOARD_DVBWORLD_2004,
227 }, {
228 .subvendor = 0x0001,
229 .subdevice = 0x2004,
230 .card = DM1105_BOARD_DVBWORLD_2004,
231 }, {
232 .subvendor = 0x195d,
233 .subdevice = 0x1105,
234 .card = DM1105_BOARD_AXESS_DM05,
235 },
236};
237
238static void dm1105_card_list(struct pci_dev *pci)
239{
240 int i;
241
242 if (0 == pci->subsystem_vendor &&
243 0 == pci->subsystem_device) {
244 printk(KERN_ERR
245 "dm1105: Your board has no valid PCI Subsystem ID\n"
246 "dm1105: and thus can't be autodetected\n"
247 "dm1105: Please pass card=<n> insmod option to\n"
248 "dm1105: workaround that. Redirect complaints to\n"
249 "dm1105: the vendor of the TV card. Best regards,\n"
250 "dm1105: -- tux\n");
251 } else {
252 printk(KERN_ERR
253 "dm1105: Your board isn't known (yet) to the driver.\n"
254 "dm1105: You can try to pick one of the existing\n"
255 "dm1105: card configs via card=<n> insmod option.\n"
256 "dm1105: Updating to the latest version might help\n"
257 "dm1105: as well.\n");
258 }
259 printk(KERN_ERR "Here is a list of valid choices for the card=<n> "
260 "insmod option:\n");
261 for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
262 printk(KERN_ERR "dm1105: card=%d -> %s\n",
263 i, dm1105_boards[i].name);
264}
265
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266/* infrared remote control */
267struct infrared {
d8b4b582 268 struct rc_dev *dev;
a611d0ca 269 char input_phys[32];
b72857dd 270 struct work_struct work;
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IL
271 u32 ir_command;
272};
273
34d2f9bf 274struct dm1105_dev {
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275 /* pci */
276 struct pci_dev *pdev;
277 u8 __iomem *io_mem;
278
279 /* ir */
280 struct infrared ir;
281
282 /* dvb */
283 struct dmx_frontend hw_frontend;
284 struct dmx_frontend mem_frontend;
285 struct dmxdev dmxdev;
286 struct dvb_adapter dvb_adapter;
287 struct dvb_demux demux;
288 struct dvb_frontend *fe;
289 struct dvb_net dvbnet;
290 unsigned int full_ts_users;
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291 unsigned int boardnr;
292 int nr;
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293
294 /* i2c */
295 struct i2c_adapter i2c_adap;
296
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297 /* irq */
298 struct work_struct work;
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299 struct workqueue_struct *wq;
300 char wqn[16];
d1498ffc 301
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302 /* dma */
303 dma_addr_t dma_addr;
304 unsigned char *ts_buf;
305 u32 wrp;
d1498ffc 306 u32 nextwrp;
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307 u32 buffer_size;
308 unsigned int PacketErrorCount;
309 unsigned int dmarst;
310 spinlock_t lock;
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311};
312
34d2f9bf 313#define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
a611d0ca 314
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315#define dm_readb(reg) inb(dm_io_mem(reg))
316#define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
317
318#define dm_readw(reg) inw(dm_io_mem(reg))
319#define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
320
321#define dm_readl(reg) inl(dm_io_mem(reg))
322#define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
323
324#define dm_andorl(reg, mask, value) \
325 outl((inl(dm_io_mem(reg)) & ~(mask)) |\
326 ((value) & (mask)), (dm_io_mem(reg)))
327
328#define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
329#define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
330
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331static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
332 struct i2c_msg *msgs, int num)
333{
34d2f9bf 334 struct dm1105_dev *dev ;
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335
336 int addr, rc, i, j, k, len, byte, data;
337 u8 status;
338
34d2f9bf 339 dev = i2c_adap->algo_data;
a611d0ca 340 for (i = 0; i < num; i++) {
5eb3291f 341 dm_writeb(DM1105_I2CCTR, 0x00);
a611d0ca
IL
342 if (msgs[i].flags & I2C_M_RD) {
343 /* read bytes */
344 addr = msgs[i].addr << 1;
345 addr |= 1;
5eb3291f 346 dm_writeb(DM1105_I2CDAT, addr);
a611d0ca 347 for (byte = 0; byte < msgs[i].len; byte++)
5eb3291f 348 dm_writeb(DM1105_I2CDAT + byte + 1, 0);
a611d0ca 349
5eb3291f 350 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
a611d0ca
IL
351 for (j = 0; j < 55; j++) {
352 mdelay(10);
5eb3291f 353 status = dm_readb(DM1105_I2CSTS);
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IL
354 if ((status & 0xc0) == 0x40)
355 break;
356 }
357 if (j >= 55)
358 return -1;
359
360 for (byte = 0; byte < msgs[i].len; byte++) {
5eb3291f 361 rc = dm_readb(DM1105_I2CDAT + byte + 1);
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IL
362 if (rc < 0)
363 goto err;
364 msgs[i].buf[byte] = rc;
365 }
ed7c847a
IL
366 } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
367 /* prepaired for cx24116 firmware */
368 /* Write in small blocks */
369 len = msgs[i].len - 1;
370 k = 1;
371 do {
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IL
372 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
373 dm_writeb(DM1105_I2CDAT + 1, 0xf7);
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374 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
375 data = msgs[i].buf[k + byte];
5eb3291f 376 dm_writeb(DM1105_I2CDAT + byte + 2, data);
a611d0ca 377 }
5eb3291f 378 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
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IL
379 for (j = 0; j < 25; j++) {
380 mdelay(10);
5eb3291f 381 status = dm_readb(DM1105_I2CSTS);
a611d0ca
IL
382 if ((status & 0xc0) == 0x40)
383 break;
384 }
385
386 if (j >= 25)
387 return -1;
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IL
388
389 k += 48;
390 len -= 48;
391 } while (len > 0);
392 } else {
393 /* write bytes */
5eb3291f 394 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
ed7c847a
IL
395 for (byte = 0; byte < msgs[i].len; byte++) {
396 data = msgs[i].buf[byte];
5eb3291f 397 dm_writeb(DM1105_I2CDAT + byte + 1, data);
ed7c847a 398 }
5eb3291f 399 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
ed7c847a
IL
400 for (j = 0; j < 25; j++) {
401 mdelay(10);
5eb3291f 402 status = dm_readb(DM1105_I2CSTS);
ed7c847a
IL
403 if ((status & 0xc0) == 0x40)
404 break;
a611d0ca 405 }
ed7c847a
IL
406
407 if (j >= 25)
408 return -1;
a611d0ca
IL
409 }
410 }
411 return num;
412 err:
413 return rc;
414}
415
416static u32 functionality(struct i2c_adapter *adap)
417{
418 return I2C_FUNC_I2C;
419}
420
421static struct i2c_algorithm dm1105_algo = {
422 .master_xfer = dm1105_i2c_xfer,
423 .functionality = functionality,
424};
425
34d2f9bf 426static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
a611d0ca 427{
34d2f9bf 428 return container_of(feed->demux, struct dm1105_dev, demux);
a611d0ca
IL
429}
430
34d2f9bf 431static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
a611d0ca 432{
34d2f9bf 433 return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
a611d0ca
IL
434}
435
34d2f9bf 436static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
a611d0ca 437{
34d2f9bf 438 struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
d8300df9 439 u32 lnb_mask, lnb_13v, lnb_18v, lnb_off;
a611d0ca 440
34d2f9bf 441 switch (dev->boardnr) {
d8300df9 442 case DM1105_BOARD_AXESS_DM05:
519a4bdc 443 lnb_mask = DM05_LNB_MASK;
d8300df9 444 lnb_off = DM05_LNB_OFF;
519a4bdc
IL
445 lnb_13v = DM05_LNB_13V;
446 lnb_18v = DM05_LNB_18V;
447 break;
d8300df9
IL
448 case DM1105_BOARD_DVBWORLD_2002:
449 case DM1105_BOARD_DVBWORLD_2004:
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IL
450 default:
451 lnb_mask = DM1105_LNB_MASK;
d8300df9 452 lnb_off = DM1105_LNB_OFF;
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IL
453 lnb_13v = DM1105_LNB_13V;
454 lnb_18v = DM1105_LNB_18V;
455 }
456
5eb3291f 457 dm_writel(DM1105_GPIOCTR, lnb_mask);
519a4bdc 458 if (voltage == SEC_VOLTAGE_18)
5eb3291f 459 dm_writel(DM1105_GPIOVAL, lnb_18v);
d8300df9 460 else if (voltage == SEC_VOLTAGE_13)
5eb3291f 461 dm_writel(DM1105_GPIOVAL, lnb_13v);
d8300df9 462 else
5eb3291f 463 dm_writel(DM1105_GPIOVAL, lnb_off);
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464
465 return 0;
466}
467
34d2f9bf 468static void dm1105_set_dma_addr(struct dm1105_dev *dev)
a611d0ca 469{
5eb3291f 470 dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr));
a611d0ca
IL
471}
472
34d2f9bf 473static int __devinit dm1105_dma_map(struct dm1105_dev *dev)
a611d0ca 474{
34d2f9bf
IL
475 dev->ts_buf = pci_alloc_consistent(dev->pdev,
476 6 * DM1105_DMA_BYTES,
477 &dev->dma_addr);
a611d0ca 478
34d2f9bf 479 return !dev->ts_buf;
a611d0ca
IL
480}
481
34d2f9bf 482static void dm1105_dma_unmap(struct dm1105_dev *dev)
a611d0ca 483{
34d2f9bf
IL
484 pci_free_consistent(dev->pdev,
485 6 * DM1105_DMA_BYTES,
486 dev->ts_buf,
487 dev->dma_addr);
a611d0ca
IL
488}
489
34d2f9bf 490static void dm1105_enable_irqs(struct dm1105_dev *dev)
a611d0ca 491{
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492 dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
493 dm_writeb(DM1105_CR, 1);
a611d0ca
IL
494}
495
34d2f9bf 496static void dm1105_disable_irqs(struct dm1105_dev *dev)
a611d0ca 497{
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498 dm_writeb(DM1105_INTMAK, INTMAK_IRM);
499 dm_writeb(DM1105_CR, 0);
a611d0ca
IL
500}
501
34d2f9bf 502static int dm1105_start_feed(struct dvb_demux_feed *f)
a611d0ca 503{
34d2f9bf 504 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
a611d0ca 505
34d2f9bf
IL
506 if (dev->full_ts_users++ == 0)
507 dm1105_enable_irqs(dev);
a611d0ca
IL
508
509 return 0;
510}
511
34d2f9bf 512static int dm1105_stop_feed(struct dvb_demux_feed *f)
a611d0ca 513{
34d2f9bf 514 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
a611d0ca 515
34d2f9bf
IL
516 if (--dev->full_ts_users == 0)
517 dm1105_disable_irqs(dev);
a611d0ca
IL
518
519 return 0;
520}
521
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522/* ir work handler */
523static void dm1105_emit_key(struct work_struct *work)
a611d0ca 524{
b72857dd 525 struct infrared *ir = container_of(work, struct infrared, work);
a611d0ca
IL
526 u32 ircom = ir->ir_command;
527 u8 data;
a611d0ca 528
d1498ffc
IL
529 if (ir_debug)
530 printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
531
a611d0ca
IL
532 data = (ircom >> 8) & 0x7f;
533
d8b4b582 534 ir_keydown(ir->dev, data, 0);
a611d0ca
IL
535}
536
d1498ffc
IL
537/* work handler */
538static void dm1105_dmx_buffer(struct work_struct *work)
539{
34d2f9bf 540 struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
d1498ffc 541 unsigned int nbpackets;
34d2f9bf
IL
542 u32 oldwrp = dev->wrp;
543 u32 nextwrp = dev->nextwrp;
d1498ffc 544
34d2f9bf
IL
545 if (!((dev->ts_buf[oldwrp] == 0x47) &&
546 (dev->ts_buf[oldwrp + 188] == 0x47) &&
547 (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
548 dev->PacketErrorCount++;
d1498ffc 549 /* bad packet found */
34d2f9bf
IL
550 if ((dev->PacketErrorCount >= 2) &&
551 (dev->dmarst == 0)) {
5eb3291f 552 dm_writeb(DM1105_RST, 1);
34d2f9bf
IL
553 dev->wrp = 0;
554 dev->PacketErrorCount = 0;
555 dev->dmarst = 0;
d1498ffc
IL
556 return;
557 }
558 }
559
560 if (nextwrp < oldwrp) {
34d2f9bf
IL
561 memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
562 nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
d1498ffc
IL
563 } else
564 nbpackets = (nextwrp - oldwrp) / 188;
565
34d2f9bf
IL
566 dev->wrp = nextwrp;
567 dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
d1498ffc
IL
568}
569
34d2f9bf 570static irqreturn_t dm1105_irq(int irq, void *dev_id)
a611d0ca 571{
34d2f9bf 572 struct dm1105_dev *dev = dev_id;
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IL
573
574 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
5eb3291f
IL
575 unsigned int intsts = dm_readb(DM1105_INTSTS);
576 dm_writeb(DM1105_INTSTS, intsts);
a611d0ca
IL
577
578 switch (intsts) {
579 case INTSTS_TSIRQ:
580 case (INTSTS_TSIRQ | INTSTS_IR):
5eb3291f 581 dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
34d2f9bf 582 queue_work(dev->wq, &dev->work);
a611d0ca
IL
583 break;
584 case INTSTS_IR:
5eb3291f 585 dev->ir.ir_command = dm_readl(DM1105_IRCODE);
34d2f9bf 586 schedule_work(&dev->ir.work);
a611d0ca
IL
587 break;
588 }
a611d0ca 589
d1498ffc 590 return IRQ_HANDLED;
a611d0ca
IL
591}
592
34d2f9bf 593int __devinit dm1105_ir_init(struct dm1105_dev *dm1105)
a611d0ca 594{
d8b4b582 595 struct rc_dev *dev;
b72857dd 596 int err = -ENOMEM;
a611d0ca 597
d8b4b582
DH
598 dev = rc_allocate_device();
599 if (!dev)
a611d0ca
IL
600 return -ENOMEM;
601
a611d0ca
IL
602 snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
603 "pci-%s/ir0", pci_name(dm1105->pdev));
604
d8b4b582
DH
605 dev->driver_name = MODULE_NAME;
606 dev->map_name = RC_MAP_DM1105_NEC;
607 dev->driver_type = RC_DRIVER_SCANCODE;
608 dev->input_name = "DVB on-card IR receiver";
609 dev->input_phys = dm1105->ir.input_phys;
610 dev->input_id.bustype = BUS_PCI;
611 dev->input_id.version = 1;
a611d0ca 612 if (dm1105->pdev->subsystem_vendor) {
d8b4b582
DH
613 dev->input_id.vendor = dm1105->pdev->subsystem_vendor;
614 dev->input_id.product = dm1105->pdev->subsystem_device;
a611d0ca 615 } else {
d8b4b582
DH
616 dev->input_id.vendor = dm1105->pdev->vendor;
617 dev->input_id.product = dm1105->pdev->device;
a611d0ca 618 }
d8b4b582 619 dev->dev.parent = &dm1105->pdev->dev;
b72857dd
IL
620
621 INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
622
d8b4b582 623 err = rc_register_device(dev);
15100d89 624 if (err < 0) {
d8b4b582 625 rc_free_device(dev);
15100d89
DH
626 return err;
627 }
a611d0ca 628
d8b4b582 629 dm1105->ir.dev = dev;
15100d89 630 return 0;
a611d0ca
IL
631}
632
34d2f9bf 633void __devexit dm1105_ir_exit(struct dm1105_dev *dm1105)
a611d0ca 634{
d8b4b582 635 rc_unregister_device(dm1105->ir.dev);
a611d0ca
IL
636}
637
34d2f9bf 638static int __devinit dm1105_hw_init(struct dm1105_dev *dev)
a611d0ca 639{
34d2f9bf 640 dm1105_disable_irqs(dev);
a611d0ca 641
5eb3291f 642 dm_writeb(DM1105_HOST_CTR, 0);
a611d0ca
IL
643
644 /*DATALEN 188,*/
5eb3291f 645 dm_writeb(DM1105_DTALENTH, 188);
a611d0ca 646 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
5eb3291f 647 dm_writew(DM1105_TSCTR, 0xc10a);
a611d0ca
IL
648
649 /* map DMA and set address */
34d2f9bf
IL
650 dm1105_dma_map(dev);
651 dm1105_set_dma_addr(dev);
a611d0ca 652 /* big buffer */
5eb3291f
IL
653 dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
654 dm_writeb(DM1105_INTCNT, 47);
a611d0ca
IL
655
656 /* IR NEC mode enable */
5eb3291f
IL
657 dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
658 dm_writeb(DM1105_IRMODE, 0);
659 dm_writew(DM1105_SYSTEMCODE, 0);
a611d0ca
IL
660
661 return 0;
662}
663
34d2f9bf 664static void dm1105_hw_exit(struct dm1105_dev *dev)
a611d0ca 665{
34d2f9bf 666 dm1105_disable_irqs(dev);
a611d0ca
IL
667
668 /* IR disable */
5eb3291f
IL
669 dm_writeb(DM1105_IRCTR, 0);
670 dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
a611d0ca 671
34d2f9bf 672 dm1105_dma_unmap(dev);
a611d0ca 673}
e4aab64c 674
d4305c68
IL
675static struct stv0299_config sharp_z0194a_config = {
676 .demod_address = 0x68,
677 .inittab = sharp_z0194a_inittab,
678 .mclk = 88000000UL,
679 .invert = 1,
680 .skip_reinit = 0,
681 .lock_output = STV0299_LOCKOUTPUT_1,
682 .volt13_op0_op1 = STV0299_VOLT13_OP1,
683 .min_delay_ms = 100,
684 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
685};
686
a611d0ca
IL
687static struct stv0288_config earda_config = {
688 .demod_address = 0x68,
689 .min_delay_ms = 100,
690};
691
692static struct si21xx_config serit_config = {
693 .demod_address = 0x68,
694 .min_delay_ms = 100,
695
696};
697
698static struct cx24116_config serit_sp2633_config = {
699 .demod_address = 0x55,
700};
a611d0ca 701
b4a0e816
IL
702static struct ds3000_config dvbworld_ds3000_config = {
703 .demod_address = 0x68,
704};
705
34d2f9bf 706static int __devinit frontend_init(struct dm1105_dev *dev)
a611d0ca
IL
707{
708 int ret;
709
34d2f9bf 710 switch (dev->boardnr) {
d8300df9 711 case DM1105_BOARD_DVBWORLD_2004:
34d2f9bf 712 dev->fe = dvb_attach(
519a4bdc 713 cx24116_attach, &serit_sp2633_config,
34d2f9bf
IL
714 &dev->i2c_adap);
715 if (dev->fe) {
716 dev->fe->ops.set_voltage = dm1105_set_voltage;
b4a0e816
IL
717 break;
718 }
719
34d2f9bf 720 dev->fe = dvb_attach(
b4a0e816 721 ds3000_attach, &dvbworld_ds3000_config,
34d2f9bf
IL
722 &dev->i2c_adap);
723 if (dev->fe)
724 dev->fe->ops.set_voltage = dm1105_set_voltage;
a611d0ca 725
519a4bdc 726 break;
d8300df9
IL
727 case DM1105_BOARD_DVBWORLD_2002:
728 case DM1105_BOARD_AXESS_DM05:
519a4bdc 729 default:
34d2f9bf 730 dev->fe = dvb_attach(
519a4bdc 731 stv0299_attach, &sharp_z0194a_config,
34d2f9bf
IL
732 &dev->i2c_adap);
733 if (dev->fe) {
734 dev->fe->ops.set_voltage = dm1105_set_voltage;
735 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
736 &dev->i2c_adap, DVB_PLL_OPERA1);
519a4bdc 737 break;
a611d0ca 738 }
e4aab64c 739
34d2f9bf 740 dev->fe = dvb_attach(
519a4bdc 741 stv0288_attach, &earda_config,
34d2f9bf
IL
742 &dev->i2c_adap);
743 if (dev->fe) {
744 dev->fe->ops.set_voltage = dm1105_set_voltage;
745 dvb_attach(stb6000_attach, dev->fe, 0x61,
746 &dev->i2c_adap);
519a4bdc 747 break;
a611d0ca 748 }
e4aab64c 749
34d2f9bf 750 dev->fe = dvb_attach(
519a4bdc 751 si21xx_attach, &serit_config,
34d2f9bf
IL
752 &dev->i2c_adap);
753 if (dev->fe)
754 dev->fe->ops.set_voltage = dm1105_set_voltage;
519a4bdc 755
a611d0ca
IL
756 }
757
34d2f9bf
IL
758 if (!dev->fe) {
759 dev_err(&dev->pdev->dev, "could not attach frontend\n");
a611d0ca
IL
760 return -ENODEV;
761 }
762
34d2f9bf 763 ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
a611d0ca 764 if (ret < 0) {
34d2f9bf
IL
765 if (dev->fe->ops.release)
766 dev->fe->ops.release(dev->fe);
767 dev->fe = NULL;
a611d0ca
IL
768 return ret;
769 }
770
771 return 0;
772}
773
34d2f9bf 774static void __devinit dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
a611d0ca
IL
775{
776 static u8 command[1] = { 0x28 };
777
778 struct i2c_msg msg[] = {
519a4bdc
IL
779 {
780 .addr = IIC_24C01_addr >> 1,
781 .flags = 0,
782 .buf = command,
783 .len = 1
784 }, {
785 .addr = IIC_24C01_addr >> 1,
786 .flags = I2C_M_RD,
787 .buf = mac,
788 .len = 6
789 },
a611d0ca
IL
790 };
791
34d2f9bf
IL
792 dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
793 dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
a611d0ca
IL
794}
795
796static int __devinit dm1105_probe(struct pci_dev *pdev,
797 const struct pci_device_id *ent)
798{
34d2f9bf 799 struct dm1105_dev *dev;
a611d0ca
IL
800 struct dvb_adapter *dvb_adapter;
801 struct dvb_demux *dvbdemux;
802 struct dmx_demux *dmx;
803 int ret = -ENOMEM;
d8300df9 804 int i;
a611d0ca 805
34d2f9bf
IL
806 dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
807 if (!dev)
d1498ffc 808 return -ENOMEM;
a611d0ca 809
d8300df9 810 /* board config */
34d2f9bf
IL
811 dev->nr = dm1105_devcount;
812 dev->boardnr = UNSET;
813 if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
814 dev->boardnr = card[dev->nr];
815 for (i = 0; UNSET == dev->boardnr &&
d8300df9
IL
816 i < ARRAY_SIZE(dm1105_subids); i++)
817 if (pdev->subsystem_vendor ==
818 dm1105_subids[i].subvendor &&
819 pdev->subsystem_device ==
820 dm1105_subids[i].subdevice)
34d2f9bf 821 dev->boardnr = dm1105_subids[i].card;
d8300df9 822
34d2f9bf
IL
823 if (UNSET == dev->boardnr) {
824 dev->boardnr = DM1105_BOARD_UNKNOWN;
d8300df9
IL
825 dm1105_card_list(pdev);
826 }
827
828 dm1105_devcount++;
34d2f9bf
IL
829 dev->pdev = pdev;
830 dev->buffer_size = 5 * DM1105_DMA_BYTES;
831 dev->PacketErrorCount = 0;
832 dev->dmarst = 0;
a611d0ca
IL
833
834 ret = pci_enable_device(pdev);
835 if (ret < 0)
836 goto err_kfree;
837
284901a9 838 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
a611d0ca
IL
839 if (ret < 0)
840 goto err_pci_disable_device;
841
842 pci_set_master(pdev);
843
844 ret = pci_request_regions(pdev, DRIVER_NAME);
845 if (ret < 0)
846 goto err_pci_disable_device;
847
34d2f9bf
IL
848 dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
849 if (!dev->io_mem) {
a611d0ca
IL
850 ret = -EIO;
851 goto err_pci_release_regions;
852 }
853
34d2f9bf
IL
854 spin_lock_init(&dev->lock);
855 pci_set_drvdata(pdev, dev);
a611d0ca 856
34d2f9bf 857 ret = dm1105_hw_init(dev);
a611d0ca 858 if (ret < 0)
d1498ffc 859 goto err_pci_iounmap;
a611d0ca
IL
860
861 /* i2c */
34d2f9bf
IL
862 i2c_set_adapdata(&dev->i2c_adap, dev);
863 strcpy(dev->i2c_adap.name, DRIVER_NAME);
864 dev->i2c_adap.owner = THIS_MODULE;
34d2f9bf
IL
865 dev->i2c_adap.dev.parent = &pdev->dev;
866 dev->i2c_adap.algo = &dm1105_algo;
867 dev->i2c_adap.algo_data = dev;
868 ret = i2c_add_adapter(&dev->i2c_adap);
a611d0ca
IL
869
870 if (ret < 0)
34d2f9bf 871 goto err_dm1105_hw_exit;
a611d0ca
IL
872
873 /* dvb */
34d2f9bf 874 ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
a611d0ca
IL
875 THIS_MODULE, &pdev->dev, adapter_nr);
876 if (ret < 0)
877 goto err_i2c_del_adapter;
878
34d2f9bf 879 dvb_adapter = &dev->dvb_adapter;
a611d0ca 880
34d2f9bf 881 dm1105_read_mac(dev, dvb_adapter->proposed_mac);
a611d0ca 882
34d2f9bf 883 dvbdemux = &dev->demux;
a611d0ca
IL
884 dvbdemux->filternum = 256;
885 dvbdemux->feednum = 256;
34d2f9bf
IL
886 dvbdemux->start_feed = dm1105_start_feed;
887 dvbdemux->stop_feed = dm1105_stop_feed;
a611d0ca
IL
888 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
889 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
890 ret = dvb_dmx_init(dvbdemux);
891 if (ret < 0)
892 goto err_dvb_unregister_adapter;
893
894 dmx = &dvbdemux->dmx;
34d2f9bf
IL
895 dev->dmxdev.filternum = 256;
896 dev->dmxdev.demux = dmx;
897 dev->dmxdev.capabilities = 0;
a611d0ca 898
34d2f9bf 899 ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
a611d0ca
IL
900 if (ret < 0)
901 goto err_dvb_dmx_release;
902
34d2f9bf 903 dev->hw_frontend.source = DMX_FRONTEND_0;
a611d0ca 904
34d2f9bf 905 ret = dmx->add_frontend(dmx, &dev->hw_frontend);
a611d0ca
IL
906 if (ret < 0)
907 goto err_dvb_dmxdev_release;
908
34d2f9bf 909 dev->mem_frontend.source = DMX_MEMORY_FE;
a611d0ca 910
34d2f9bf 911 ret = dmx->add_frontend(dmx, &dev->mem_frontend);
a611d0ca
IL
912 if (ret < 0)
913 goto err_remove_hw_frontend;
914
34d2f9bf 915 ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
a611d0ca
IL
916 if (ret < 0)
917 goto err_remove_mem_frontend;
918
34d2f9bf 919 ret = frontend_init(dev);
a611d0ca
IL
920 if (ret < 0)
921 goto err_disconnect_frontend;
922
34d2f9bf
IL
923 dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
924 dm1105_ir_init(dev);
d1498ffc 925
34d2f9bf
IL
926 INIT_WORK(&dev->work, dm1105_dmx_buffer);
927 sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
928 dev->wq = create_singlethread_workqueue(dev->wqn);
929 if (!dev->wq)
519a4bdc 930 goto err_dvb_net;
d1498ffc 931
34d2f9bf
IL
932 ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
933 DRIVER_NAME, dev);
d1498ffc 934 if (ret < 0)
519a4bdc 935 goto err_workqueue;
d1498ffc
IL
936
937 return 0;
a611d0ca 938
519a4bdc 939err_workqueue:
34d2f9bf 940 destroy_workqueue(dev->wq);
519a4bdc 941err_dvb_net:
34d2f9bf 942 dvb_net_release(&dev->dvbnet);
a611d0ca
IL
943err_disconnect_frontend:
944 dmx->disconnect_frontend(dmx);
945err_remove_mem_frontend:
34d2f9bf 946 dmx->remove_frontend(dmx, &dev->mem_frontend);
a611d0ca 947err_remove_hw_frontend:
34d2f9bf 948 dmx->remove_frontend(dmx, &dev->hw_frontend);
a611d0ca 949err_dvb_dmxdev_release:
34d2f9bf 950 dvb_dmxdev_release(&dev->dmxdev);
a611d0ca
IL
951err_dvb_dmx_release:
952 dvb_dmx_release(dvbdemux);
953err_dvb_unregister_adapter:
954 dvb_unregister_adapter(dvb_adapter);
955err_i2c_del_adapter:
34d2f9bf
IL
956 i2c_del_adapter(&dev->i2c_adap);
957err_dm1105_hw_exit:
958 dm1105_hw_exit(dev);
a611d0ca 959err_pci_iounmap:
34d2f9bf 960 pci_iounmap(pdev, dev->io_mem);
a611d0ca
IL
961err_pci_release_regions:
962 pci_release_regions(pdev);
963err_pci_disable_device:
964 pci_disable_device(pdev);
965err_kfree:
966 pci_set_drvdata(pdev, NULL);
34d2f9bf 967 kfree(dev);
d1498ffc 968 return ret;
a611d0ca
IL
969}
970
971static void __devexit dm1105_remove(struct pci_dev *pdev)
972{
34d2f9bf
IL
973 struct dm1105_dev *dev = pci_get_drvdata(pdev);
974 struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
975 struct dvb_demux *dvbdemux = &dev->demux;
a611d0ca
IL
976 struct dmx_demux *dmx = &dvbdemux->dmx;
977
34d2f9bf 978 dm1105_ir_exit(dev);
a611d0ca 979 dmx->close(dmx);
34d2f9bf
IL
980 dvb_net_release(&dev->dvbnet);
981 if (dev->fe)
982 dvb_unregister_frontend(dev->fe);
a611d0ca
IL
983
984 dmx->disconnect_frontend(dmx);
34d2f9bf
IL
985 dmx->remove_frontend(dmx, &dev->mem_frontend);
986 dmx->remove_frontend(dmx, &dev->hw_frontend);
987 dvb_dmxdev_release(&dev->dmxdev);
a611d0ca
IL
988 dvb_dmx_release(dvbdemux);
989 dvb_unregister_adapter(dvb_adapter);
34d2f9bf
IL
990 if (&dev->i2c_adap)
991 i2c_del_adapter(&dev->i2c_adap);
a611d0ca 992
34d2f9bf 993 dm1105_hw_exit(dev);
a611d0ca 994 synchronize_irq(pdev->irq);
34d2f9bf
IL
995 free_irq(pdev->irq, dev);
996 pci_iounmap(pdev, dev->io_mem);
a611d0ca
IL
997 pci_release_regions(pdev);
998 pci_disable_device(pdev);
999 pci_set_drvdata(pdev, NULL);
d8300df9 1000 dm1105_devcount--;
34d2f9bf 1001 kfree(dev);
a611d0ca
IL
1002}
1003
1004static struct pci_device_id dm1105_id_table[] __devinitdata = {
1005 {
1006 .vendor = PCI_VENDOR_ID_TRIGEM,
1007 .device = PCI_DEVICE_ID_DM1105,
1008 .subvendor = PCI_ANY_ID,
d8300df9 1009 .subdevice = PCI_ANY_ID,
519a4bdc
IL
1010 }, {
1011 .vendor = PCI_VENDOR_ID_AXESS,
1012 .device = PCI_DEVICE_ID_DM05,
d8300df9
IL
1013 .subvendor = PCI_ANY_ID,
1014 .subdevice = PCI_ANY_ID,
a611d0ca
IL
1015 }, {
1016 /* empty */
1017 },
1018};
1019
1020MODULE_DEVICE_TABLE(pci, dm1105_id_table);
1021
1022static struct pci_driver dm1105_driver = {
1023 .name = DRIVER_NAME,
1024 .id_table = dm1105_id_table,
1025 .probe = dm1105_probe,
1026 .remove = __devexit_p(dm1105_remove),
1027};
1028
1029static int __init dm1105_init(void)
1030{
1031 return pci_register_driver(&dm1105_driver);
1032}
1033
1034static void __exit dm1105_exit(void)
1035{
1036 pci_unregister_driver(&dm1105_driver);
1037}
1038
1039module_init(dm1105_init);
1040module_exit(dm1105_exit);
1041
1042MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
1043MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
1044MODULE_LICENSE("GPL");