[PATCH] fix reboot via keyboard controller reset
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / dvb / bt8xx / bt878.h
CommitLineData
43f1a8f8 1/*
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2 bt878.h - Bt878 audio module (register offsets)
3
4 Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@t-online.de>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef _BT878_H_
22#define _BT878_H_
23
24#include <linux/interrupt.h>
25#include <linux/pci.h>
26#include <linux/sched.h>
27#include <linux/spinlock.h>
28#include "bt848.h"
29#include "bttv.h"
30
31#define BT878_VERSION_CODE 0x000000
32
33#define BT878_AINT_STAT 0x100
34#define BT878_ARISCS (0xf<<28)
35#define BT878_ARISC_EN (1<<27)
36#define BT878_ASCERR (1<<19)
37#define BT878_AOCERR (1<<18)
38#define BT878_APABORT (1<<17)
39#define BT878_ARIPERR (1<<16)
40#define BT878_APPERR (1<<15)
41#define BT878_AFDSR (1<<14)
42#define BT878_AFTRGT (1<<13)
43#define BT878_AFBUS (1<<12)
44#define BT878_ARISCI (1<<11)
45#define BT878_AOFLOW (1<<3)
46
47#define BT878_AINT_MASK 0x104
48
49#define BT878_AGPIO_DMA_CTL 0x10c
50#define BT878_A_GAIN (0xf<<28)
51#define BT878_A_G2X (1<<27)
52#define BT878_A_PWRDN (1<<26)
53#define BT878_A_SEL (3<<24)
54#define BT878_DA_SCE (1<<23)
55#define BT878_DA_LRI (1<<22)
56#define BT878_DA_MLB (1<<21)
57#define BT878_DA_LRD (0x1f<<16)
58#define BT878_DA_DPM (1<<15)
59#define BT878_DA_SBR (1<<14)
60#define BT878_DA_ES2 (1<<13)
61#define BT878_DA_LMT (1<<12)
62#define BT878_DA_SDR (0xf<<8)
63#define BT878_DA_IOM (3<<6)
64#define BT878_DA_APP (1<<5)
65#define BT878_ACAP_EN (1<<4)
66#define BT878_PKTP (3<<2)
67#define BT878_RISC_EN (1<<1)
68#define BT878_FIFO_EN 1
69
70#define BT878_APACK_LEN 0x110
71#define BT878_AFP_LEN (0xff<<16)
72#define BT878_ALP_LEN 0xfff
73
74#define BT878_ARISC_START 0x114
75
76#define BT878_ARISC_PC 0x120
77
78/* BT878 FUNCTION 0 REGISTERS */
79#define BT878_GPIO_DMA_CTL 0x10c
80
81/* Interrupt register */
82#define BT878_INT_STAT 0x100
83#define BT878_INT_MASK 0x104
84#define BT878_I2CRACK (1<<25)
85#define BT878_I2CDONE (1<<8)
86
87#define BT878_MAX 4
88
89#define BT878_RISC_SYNC_MASK (1 << 15)
90
91extern int bt878_num;
92
93struct bt878 {
94 struct semaphore gpio_lock;
95 unsigned int nr;
96 unsigned int bttv_nr;
97 struct i2c_adapter *adapter;
98 struct pci_dev *dev;
99 unsigned int id;
100 unsigned int TS_Size;
101 unsigned char revision;
102 unsigned int irq;
103 unsigned long bt878_adr;
104 volatile void __iomem *bt878_mem; /* function 1 */
105
106 volatile u32 finished_block;
107 volatile u32 last_block;
108 u32 block_count;
109 u32 block_bytes;
110 u32 line_bytes;
111 u32 line_count;
112
113 u32 buf_size;
114 u8 *buf_cpu;
115 dma_addr_t buf_dma;
116
117 u32 risc_size;
118 u32 *risc_cpu;
119 dma_addr_t risc_dma;
120 u32 risc_pos;
121
122 struct tasklet_struct tasklet;
43f1a8f8 123 int shutdown;
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124};
125
126extern struct bt878 bt878[BT878_MAX];
127
128void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
129 u32 irq_err_ignore);
43f1a8f8 130void bt878_stop(struct bt878 *bt);
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131
132#if defined(__powerpc__) /* big-endian */
133extern __inline__ void io_st_le32(volatile unsigned __iomem *addr, unsigned val)
134{
135 __asm__ __volatile__("stwbrx %1,0,%2":"=m"(*addr):"r"(val),
136 "r"(addr));
137 __asm__ __volatile__("eieio":::"memory");
138}
139
140#define bmtwrite(dat,adr) io_st_le32((adr),(dat))
141#define bmtread(adr) ld_le32((adr))
142#else
143#define bmtwrite(dat,adr) writel((dat), (adr))
144#define bmtread(adr) readl(adr)
145#endif
146
147#endif