powerpc/4xx: Extended DCR support v2
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / macintosh / via-pmu.c
CommitLineData
1da177e4
LT
1/*
2 * Device driver for the via-pmu on Apple Powermacs.
3 *
4 * The VIA (versatile interface adapter) interfaces to the PMU,
5 * a 6805 microprocessor core whose primary function is to control
6 * battery charging and system power on the PowerBook 3400 and 2400.
7 * The PMU also controls the ADB (Apple Desktop Bus) which connects
8 * to the keyboard and mouse, as well as the non-volatile RAM
9 * and the RTC (real time clock) chip.
10 *
11 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
12 * Copyright (C) 2001-2002 Benjamin Herrenschmidt
f91266ed 13 * Copyright (C) 2006-2007 Johannes Berg
1da177e4
LT
14 *
15 * THIS DRIVER IS BECOMING A TOTAL MESS !
16 * - Cleanup atomically disabling reply to PMU events after
17 * a sleep or a freq. switch
1da177e4
LT
18 *
19 */
20#include <stdarg.h>
ffe83733 21#include <linux/smp_lock.h>
1da177e4
LT
22#include <linux/types.h>
23#include <linux/errno.h>
24#include <linux/kernel.h>
25#include <linux/delay.h>
26#include <linux/sched.h>
27#include <linux/miscdevice.h>
28#include <linux/blkdev.h>
29#include <linux/pci.h>
30#include <linux/slab.h>
31#include <linux/poll.h>
32#include <linux/adb.h>
33#include <linux/pmu.h>
34#include <linux/cuda.h>
1da177e4
LT
35#include <linux/module.h>
36#include <linux/spinlock.h>
37#include <linux/pm.h>
38#include <linux/proc_fs.h>
39#include <linux/init.h>
40#include <linux/interrupt.h>
41#include <linux/device.h>
42#include <linux/sysdev.h>
7dfb7103 43#include <linux/freezer.h>
1da177e4 44#include <linux/syscalls.h>
6002f544 45#include <linux/suspend.h>
1da177e4
LT
46#include <linux/cpu.h>
47#include <asm/prom.h>
48#include <asm/machdep.h>
49#include <asm/io.h>
50#include <asm/pgtable.h>
51#include <asm/system.h>
52#include <asm/sections.h>
53#include <asm/irq.h>
54#include <asm/pmac_feature.h>
5b9ca526
BH
55#include <asm/pmac_pfunc.h>
56#include <asm/pmac_low_i2c.h>
1da177e4
LT
57#include <asm/uaccess.h>
58#include <asm/mmu_context.h>
59#include <asm/cputable.h>
60#include <asm/time.h>
1da177e4 61#include <asm/backlight.h>
1da177e4 62
9e8e30a0
JB
63#include "via-pmu-event.h"
64
1da177e4 65/* Some compile options */
f91266ed 66#undef DEBUG_SLEEP
1da177e4
LT
67
68/* Misc minor number allocated for /dev/pmu */
69#define PMU_MINOR 154
70
71/* How many iterations between battery polls */
72#define BATTERY_POLLING_COUNT 2
73
74static volatile unsigned char __iomem *via;
75
76/* VIA registers - spaced 0x200 bytes apart */
77#define RS 0x200 /* skip between registers */
78#define B 0 /* B-side data */
79#define A RS /* A-side data */
80#define DIRB (2*RS) /* B-side direction (1=output) */
81#define DIRA (3*RS) /* A-side direction (1=output) */
82#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
83#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
84#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
85#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
86#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
87#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
88#define SR (10*RS) /* Shift register */
89#define ACR (11*RS) /* Auxiliary control register */
90#define PCR (12*RS) /* Peripheral control register */
91#define IFR (13*RS) /* Interrupt flag register */
92#define IER (14*RS) /* Interrupt enable register */
93#define ANH (15*RS) /* A-side data, no handshake */
94
95/* Bits in B data register: both active low */
96#define TACK 0x08 /* Transfer acknowledge (input) */
97#define TREQ 0x10 /* Transfer request (output) */
98
99/* Bits in ACR */
100#define SR_CTRL 0x1c /* Shift register control bits */
101#define SR_EXT 0x0c /* Shift on external clock */
102#define SR_OUT 0x10 /* Shift out if 1 */
103
104/* Bits in IFR and IER */
105#define IER_SET 0x80 /* set bits in IER */
106#define IER_CLR 0 /* clear bits in IER */
107#define SR_INT 0x04 /* Shift register full/empty */
108#define CB2_INT 0x08
109#define CB1_INT 0x10 /* transition on CB1 input */
110
111static volatile enum pmu_state {
112 idle,
113 sending,
114 intack,
115 reading,
116 reading_intr,
117 locked,
118} pmu_state;
119
120static volatile enum int_data_state {
121 int_data_empty,
122 int_data_fill,
123 int_data_ready,
124 int_data_flush
125} int_data_state[2] = { int_data_empty, int_data_empty };
126
127static struct adb_request *current_req;
128static struct adb_request *last_req;
129static struct adb_request *req_awaiting_reply;
130static unsigned char interrupt_data[2][32];
131static int interrupt_data_len[2];
132static int int_data_last;
133static unsigned char *reply_ptr;
134static int data_index;
135static int data_len;
136static volatile int adb_int_pending;
137static volatile int disable_poll;
1da177e4
LT
138static struct device_node *vias;
139static int pmu_kind = PMU_UNKNOWN;
87275856 140static int pmu_fully_inited;
1da177e4 141static int pmu_has_adb;
51d3082f 142static struct device_node *gpio_node;
87275856 143static unsigned char __iomem *gpio_reg;
0ebfff14 144static int gpio_irq = NO_IRQ;
1da177e4 145static int gpio_irq_enabled = -1;
87275856 146static volatile int pmu_suspended;
1da177e4
LT
147static spinlock_t pmu_lock;
148static u8 pmu_intr_mask;
149static int pmu_version;
150static int drop_interrupts;
f91266ed 151#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4 152static int option_lid_wakeup = 1;
f91266ed 153#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT
154static unsigned long async_req_locks;
155static unsigned int pmu_irq_stats[11];
156
157static struct proc_dir_entry *proc_pmu_root;
158static struct proc_dir_entry *proc_pmu_info;
159static struct proc_dir_entry *proc_pmu_irqstats;
160static struct proc_dir_entry *proc_pmu_options;
161static int option_server_mode;
162
1da177e4
LT
163int pmu_battery_count;
164int pmu_cur_battery;
a334bdbd 165unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
1da177e4
LT
166struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
167static int query_batt_timer = BATTERY_POLLING_COUNT;
168static struct adb_request batt_req;
169static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
1da177e4 170
1da177e4
LT
171int __fake_sleep;
172int asleep;
1da177e4
LT
173
174#ifdef CONFIG_ADB
87275856 175static int adb_dev_map;
1da177e4
LT
176static int pmu_adb_flags;
177
178static int pmu_probe(void);
179static int pmu_init(void);
180static int pmu_send_request(struct adb_request *req, int sync);
181static int pmu_adb_autopoll(int devs);
182static int pmu_adb_reset_bus(void);
183#endif /* CONFIG_ADB */
184
185static int init_pmu(void);
1da177e4 186static void pmu_start(void);
7d12e780
DH
187static irqreturn_t via_pmu_interrupt(int irq, void *arg);
188static irqreturn_t gpio1_interrupt(int irq, void *arg);
1da177e4
LT
189static int proc_get_info(char *page, char **start, off_t off,
190 int count, int *eof, void *data);
191static int proc_get_irqstats(char *page, char **start, off_t off,
192 int count, int *eof, void *data);
1da177e4
LT
193static void pmu_pass_intr(unsigned char *data, int len);
194static int proc_get_batt(char *page, char **start, off_t off,
195 int count, int *eof, void *data);
1da177e4
LT
196static int proc_read_options(char *page, char **start, off_t off,
197 int count, int *eof, void *data);
198static int proc_write_options(struct file *file, const char __user *buffer,
199 unsigned long count, void *data);
200
201#ifdef CONFIG_ADB
202struct adb_driver via_pmu_driver = {
203 "PMU",
204 pmu_probe,
205 pmu_init,
206 pmu_send_request,
207 pmu_adb_autopoll,
208 pmu_poll_adb,
209 pmu_adb_reset_bus
210};
211#endif /* CONFIG_ADB */
212
213extern void low_sleep_handler(void);
214extern void enable_kernel_altivec(void);
215extern void enable_kernel_fp(void);
216
217#ifdef DEBUG_SLEEP
218int pmu_polled_request(struct adb_request *req);
f91266ed 219void pmu_blink(int n);
1da177e4
LT
220#endif
221
222/*
223 * This table indicates for each PMU opcode:
224 * - the number of data bytes to be sent with the command, or -1
225 * if a length byte should be sent,
226 * - the number of response bytes which the PMU will return, or
227 * -1 if it will send a length byte.
228 */
aacaf9bd 229static const s8 pmu_data_len[256][2] = {
1da177e4
LT
230/* 0 1 2 3 4 5 6 7 */
231/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
232/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
233/*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
234/*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
235/*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
236/*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
237/*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
238/*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
239/*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
240/*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
241/*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
242/*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
243/*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
244/*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
245/*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
246/*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
247/*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
248/*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
249/*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
250/*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
251/*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
252/*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
253/*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
254/*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
255/*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
256/*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
257/*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
258/*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
259/*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
260/*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
261/*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
262/*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
263};
264
265static char *pbook_type[] = {
266 "Unknown PowerBook",
267 "PowerBook 2400/3400/3500(G3)",
268 "PowerBook G3 Series",
269 "1999 PowerBook G3",
270 "Core99"
271};
272
51d3082f 273int __init find_via_pmu(void)
1da177e4 274{
cc5d0189 275 u64 taddr;
018a3d1d 276 const u32 *reg;
51d3082f 277
1da177e4
LT
278 if (via != 0)
279 return 1;
51d3082f
BH
280 vias = of_find_node_by_name(NULL, "via-pmu");
281 if (vias == NULL)
1da177e4 282 return 0;
1da177e4 283
01b2726d 284 reg = of_get_property(vias, "reg", NULL);
51d3082f
BH
285 if (reg == NULL) {
286 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
287 goto fail;
288 }
289 taddr = of_translate_address(vias, reg);
bb6b9b28 290 if (taddr == OF_BAD_ADDR) {
51d3082f
BH
291 printk(KERN_ERR "via-pmu: Can't translate address !\n");
292 goto fail;
1da177e4
LT
293 }
294
295 spin_lock_init(&pmu_lock);
296
297 pmu_has_adb = 1;
298
299 pmu_intr_mask = PMU_INT_PCEJECT |
300 PMU_INT_SNDBRT |
301 PMU_INT_ADB |
302 PMU_INT_TICK;
303
304 if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
55b61fec 305 || of_device_is_compatible(vias->parent, "ohare")))
1da177e4 306 pmu_kind = PMU_OHARE_BASED;
55b61fec 307 else if (of_device_is_compatible(vias->parent, "paddington"))
1da177e4 308 pmu_kind = PMU_PADDINGTON_BASED;
55b61fec 309 else if (of_device_is_compatible(vias->parent, "heathrow"))
1da177e4 310 pmu_kind = PMU_HEATHROW_BASED;
55b61fec
SR
311 else if (of_device_is_compatible(vias->parent, "Keylargo")
312 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
51d3082f 313 struct device_node *gpiop;
1658ab66 314 struct device_node *adbp;
cc5d0189 315 u64 gaddr = OF_BAD_ADDR;
1da177e4
LT
316
317 pmu_kind = PMU_KEYLARGO_BASED;
1658ab66
SR
318 adbp = of_find_node_by_type(NULL, "adb");
319 pmu_has_adb = (adbp != NULL);
320 of_node_put(adbp);
1da177e4
LT
321 pmu_intr_mask = PMU_INT_PCEJECT |
322 PMU_INT_SNDBRT |
323 PMU_INT_ADB |
324 PMU_INT_TICK |
325 PMU_INT_ENVIRONMENT;
326
51d3082f
BH
327 gpiop = of_find_node_by_name(NULL, "gpio");
328 if (gpiop) {
01b2726d 329 reg = of_get_property(gpiop, "reg", NULL);
51d3082f
BH
330 if (reg)
331 gaddr = of_translate_address(gpiop, reg);
cc5d0189 332 if (gaddr != OF_BAD_ADDR)
51d3082f 333 gpio_reg = ioremap(gaddr, 0x10);
1da177e4 334 }
61e37ca2 335 if (gpio_reg == NULL) {
51d3082f 336 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
61e37ca2
OH
337 goto fail_gpio;
338 }
1da177e4
LT
339 } else
340 pmu_kind = PMU_UNKNOWN;
341
51d3082f
BH
342 via = ioremap(taddr, 0x2000);
343 if (via == NULL) {
344 printk(KERN_ERR "via-pmu: Can't map address !\n");
345 goto fail;
346 }
1da177e4
LT
347
348 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
349 out_8(&via[IFR], 0x7f); /* clear IFR */
350
351 pmu_state = idle;
352
353 if (!init_pmu()) {
354 via = NULL;
355 return 0;
356 }
357
bb6b9b28 358 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
1da177e4
LT
359 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
360
361 sys_ctrler = SYS_CTRLER_PMU;
362
363 return 1;
51d3082f
BH
364 fail:
365 of_node_put(vias);
61e37ca2
OH
366 iounmap(gpio_reg);
367 gpio_reg = NULL;
368 fail_gpio:
51d3082f
BH
369 vias = NULL;
370 return 0;
1da177e4
LT
371}
372
373#ifdef CONFIG_ADB
51d3082f 374static int pmu_probe(void)
1da177e4
LT
375{
376 return vias == NULL? -ENODEV: 0;
377}
378
51d3082f 379static int __init pmu_init(void)
1da177e4
LT
380{
381 if (vias == NULL)
382 return -ENODEV;
383 return 0;
384}
385#endif /* CONFIG_ADB */
386
387/*
388 * We can't wait until pmu_init gets called, that happens too late.
389 * It happens after IDE and SCSI initialization, which can take a few
390 * seconds, and by that time the PMU could have given up on us and
391 * turned us off.
392 * Thus this is called with arch_initcall rather than device_initcall.
393 */
394static int __init via_pmu_start(void)
395{
0ebfff14
BH
396 unsigned int irq;
397
1da177e4
LT
398 if (vias == NULL)
399 return -ENODEV;
400
1da177e4 401 batt_req.complete = 1;
1da177e4 402
0ebfff14
BH
403 irq = irq_of_parse_and_map(vias, 0);
404 if (irq == NO_IRQ) {
7b52b440 405 printk(KERN_ERR "via-pmu: can't map interrupt\n");
0ebfff14
BH
406 return -ENODEV;
407 }
408 if (request_irq(irq, via_pmu_interrupt, 0, "VIA-PMU", (void *)0)) {
409 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
410 return -ENODEV;
1da177e4
LT
411 }
412
51d3082f
BH
413 if (pmu_kind == PMU_KEYLARGO_BASED) {
414 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
415 if (gpio_node == NULL)
416 gpio_node = of_find_node_by_name(NULL,
417 "pmu-interrupt");
0ebfff14
BH
418 if (gpio_node)
419 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
51d3082f 420
0ebfff14 421 if (gpio_irq != NO_IRQ) {
51d3082f
BH
422 if (request_irq(gpio_irq, gpio1_interrupt, 0,
423 "GPIO1 ADB", (void *)0))
424 printk(KERN_ERR "pmu: can't get irq %d"
425 " (GPIO1)\n", gpio_irq);
426 else
427 gpio_irq_enabled = 1;
428 }
1da177e4
LT
429 }
430
431 /* Enable interrupts */
432 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
433
434 pmu_fully_inited = 1;
435
436 /* Make sure PMU settle down before continuing. This is _very_ important
437 * since the IDE probe may shut interrupts down for quite a bit of time. If
438 * a PMU communication is pending while this happens, the PMU may timeout
439 * Not that on Core99 machines, the PMU keeps sending us environement
440 * messages, we should find a way to either fix IDE or make it call
441 * pmu_suspend() before masking interrupts. This can also happens while
442 * scolling with some fbdevs.
443 */
444 do {
445 pmu_poll();
446 } while (pmu_state != idle);
447
448 return 0;
449}
450
451arch_initcall(via_pmu_start);
452
453/*
454 * This has to be done after pci_init, which is a subsys_initcall.
455 */
456static int __init via_pmu_dev_init(void)
457{
458 if (vias == NULL)
459 return -ENODEV;
460
1da177e4 461#ifdef CONFIG_PMAC_BACKLIGHT
5474c120 462 /* Initialize backlight */
4b755999 463 pmu_backlight_init();
5474c120 464#endif
1da177e4 465
8c870933 466#ifdef CONFIG_PPC32
1da177e4
LT
467 if (machine_is_compatible("AAPL,3400/2400") ||
468 machine_is_compatible("AAPL,3500")) {
469 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
470 NULL, PMAC_MB_INFO_MODEL, 0);
471 pmu_battery_count = 1;
472 if (mb == PMAC_TYPE_COMET)
473 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
474 else
475 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
476 } else if (machine_is_compatible("AAPL,PowerBook1998") ||
477 machine_is_compatible("PowerBook1,1")) {
478 pmu_battery_count = 2;
479 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
480 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
481 } else {
30686ba6
SR
482 struct device_node* prim =
483 of_find_node_by_name(NULL, "power-mgt");
018a3d1d 484 const u32 *prim_info = NULL;
1da177e4 485 if (prim)
01b2726d 486 prim_info = of_get_property(prim, "prim-info", NULL);
1da177e4
LT
487 if (prim_info) {
488 /* Other stuffs here yet unknown */
489 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
490 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
491 if (pmu_battery_count > 1)
492 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
493 }
30686ba6 494 of_node_put(prim);
1da177e4 495 }
8c870933
BH
496#endif /* CONFIG_PPC32 */
497
1da177e4
LT
498 /* Create /proc/pmu */
499 proc_pmu_root = proc_mkdir("pmu", NULL);
500 if (proc_pmu_root) {
8c870933 501 long i;
1da177e4
LT
502
503 for (i=0; i<pmu_battery_count; i++) {
504 char title[16];
8c870933 505 sprintf(title, "battery_%ld", i);
1da177e4
LT
506 proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root,
507 proc_get_batt, (void *)i);
508 }
1da177e4
LT
509
510 proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root,
511 proc_get_info, NULL);
512 proc_pmu_irqstats = create_proc_read_entry("interrupts", 0, proc_pmu_root,
513 proc_get_irqstats, NULL);
514 proc_pmu_options = create_proc_entry("options", 0600, proc_pmu_root);
515 if (proc_pmu_options) {
1da177e4
LT
516 proc_pmu_options->read_proc = proc_read_options;
517 proc_pmu_options->write_proc = proc_write_options;
518 }
519 }
520 return 0;
521}
522
523device_initcall(via_pmu_dev_init);
524
aacaf9bd 525static int
1da177e4
LT
526init_pmu(void)
527{
528 int timeout;
529 struct adb_request req;
530
531 out_8(&via[B], via[B] | TREQ); /* negate TREQ */
532 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
533
534 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
535 timeout = 100000;
536 while (!req.complete) {
537 if (--timeout < 0) {
538 printk(KERN_ERR "init_pmu: no response from PMU\n");
539 return 0;
540 }
541 udelay(10);
542 pmu_poll();
543 }
544
545 /* ack all pending interrupts */
546 timeout = 100000;
547 interrupt_data[0][0] = 1;
548 while (interrupt_data[0][0] || pmu_state != idle) {
549 if (--timeout < 0) {
550 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
551 return 0;
552 }
553 if (pmu_state == idle)
554 adb_int_pending = 1;
7d12e780 555 via_pmu_interrupt(0, NULL);
1da177e4
LT
556 udelay(10);
557 }
558
559 /* Tell PMU we are ready. */
560 if (pmu_kind == PMU_KEYLARGO_BASED) {
561 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
562 while (!req.complete)
563 pmu_poll();
564 }
565
566 /* Read PMU version */
567 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
568 pmu_wait_complete(&req);
569 if (req.reply_len > 0)
570 pmu_version = req.reply[0];
571
572 /* Read server mode setting */
573 if (pmu_kind == PMU_KEYLARGO_BASED) {
574 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
575 PMU_PWR_GET_POWERUP_EVENTS);
576 pmu_wait_complete(&req);
577 if (req.reply_len == 2) {
578 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
579 option_server_mode = 1;
580 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
581 option_server_mode ? "enabled" : "disabled");
582 }
583 }
584 return 1;
585}
586
587int
588pmu_get_model(void)
589{
590 return pmu_kind;
591}
592
1da177e4
LT
593static void pmu_set_server_mode(int server_mode)
594{
595 struct adb_request req;
596
597 if (pmu_kind != PMU_KEYLARGO_BASED)
598 return;
599
600 option_server_mode = server_mode;
601 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
602 pmu_wait_complete(&req);
603 if (req.reply_len < 2)
604 return;
605 if (server_mode)
606 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
607 PMU_PWR_SET_POWERUP_EVENTS,
608 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
609 else
610 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
611 PMU_PWR_CLR_POWERUP_EVENTS,
612 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
613 pmu_wait_complete(&req);
614}
615
1da177e4
LT
616/* This new version of the code for 2400/3400/3500 powerbooks
617 * is inspired from the implementation in gkrellm-pmu
618 */
aacaf9bd 619static void
1da177e4
LT
620done_battery_state_ohare(struct adb_request* req)
621{
622 /* format:
623 * [0] : flags
624 * 0x01 : AC indicator
625 * 0x02 : charging
626 * 0x04 : battery exist
627 * 0x08 :
628 * 0x10 :
629 * 0x20 : full charged
630 * 0x40 : pcharge reset
631 * 0x80 : battery exist
632 *
633 * [1][2] : battery voltage
634 * [3] : CPU temperature
635 * [4] : battery temperature
636 * [5] : current
637 * [6][7] : pcharge
638 * --tkoba
639 */
640 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
641 long pcharge, charge, vb, vmax, lmax;
642 long vmax_charging, vmax_charged;
643 long amperage, voltage, time, max;
644 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
645 NULL, PMAC_MB_INFO_MODEL, 0);
646
647 if (req->reply[0] & 0x01)
648 pmu_power_flags |= PMU_PWR_AC_PRESENT;
649 else
650 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
651
652 if (mb == PMAC_TYPE_COMET) {
653 vmax_charged = 189;
654 vmax_charging = 213;
655 lmax = 6500;
656 } else {
657 vmax_charged = 330;
658 vmax_charging = 330;
659 lmax = 6500;
660 }
661 vmax = vmax_charged;
662
663 /* If battery installed */
664 if (req->reply[0] & 0x04) {
665 bat_flags |= PMU_BATT_PRESENT;
666 if (req->reply[0] & 0x02)
667 bat_flags |= PMU_BATT_CHARGING;
668 vb = (req->reply[1] << 8) | req->reply[2];
669 voltage = (vb * 265 + 72665) / 10;
670 amperage = req->reply[5];
671 if ((req->reply[0] & 0x01) == 0) {
672 if (amperage > 200)
673 vb += ((amperage - 200) * 15)/100;
674 } else if (req->reply[0] & 0x02) {
675 vb = (vb * 97) / 100;
676 vmax = vmax_charging;
677 }
678 charge = (100 * vb) / vmax;
679 if (req->reply[0] & 0x40) {
680 pcharge = (req->reply[6] << 8) + req->reply[7];
681 if (pcharge > lmax)
682 pcharge = lmax;
683 pcharge *= 100;
684 pcharge = 100 - pcharge / lmax;
685 if (pcharge < charge)
686 charge = pcharge;
687 }
688 if (amperage > 0)
689 time = (charge * 16440) / amperage;
690 else
691 time = 0;
692 max = 100;
693 amperage = -amperage;
694 } else
695 charge = max = amperage = voltage = time = 0;
696
697 pmu_batteries[pmu_cur_battery].flags = bat_flags;
698 pmu_batteries[pmu_cur_battery].charge = charge;
699 pmu_batteries[pmu_cur_battery].max_charge = max;
700 pmu_batteries[pmu_cur_battery].amperage = amperage;
701 pmu_batteries[pmu_cur_battery].voltage = voltage;
702 pmu_batteries[pmu_cur_battery].time_remaining = time;
703
704 clear_bit(0, &async_req_locks);
705}
706
aacaf9bd 707static void
1da177e4
LT
708done_battery_state_smart(struct adb_request* req)
709{
710 /* format:
711 * [0] : format of this structure (known: 3,4,5)
712 * [1] : flags
713 *
714 * format 3 & 4:
715 *
716 * [2] : charge
717 * [3] : max charge
718 * [4] : current
719 * [5] : voltage
720 *
721 * format 5:
722 *
723 * [2][3] : charge
724 * [4][5] : max charge
725 * [6][7] : current
726 * [8][9] : voltage
727 */
728
729 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
730 int amperage;
731 unsigned int capa, max, voltage;
732
733 if (req->reply[1] & 0x01)
734 pmu_power_flags |= PMU_PWR_AC_PRESENT;
735 else
736 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
737
738
739 capa = max = amperage = voltage = 0;
740
741 if (req->reply[1] & 0x04) {
742 bat_flags |= PMU_BATT_PRESENT;
743 switch(req->reply[0]) {
744 case 3:
745 case 4: capa = req->reply[2];
746 max = req->reply[3];
747 amperage = *((signed char *)&req->reply[4]);
748 voltage = req->reply[5];
749 break;
750 case 5: capa = (req->reply[2] << 8) | req->reply[3];
751 max = (req->reply[4] << 8) | req->reply[5];
752 amperage = *((signed short *)&req->reply[6]);
753 voltage = (req->reply[8] << 8) | req->reply[9];
754 break;
755 default:
756 printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n",
757 req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]);
758 break;
759 }
760 }
761
762 if ((req->reply[1] & 0x01) && (amperage > 0))
763 bat_flags |= PMU_BATT_CHARGING;
764
765 pmu_batteries[pmu_cur_battery].flags = bat_flags;
766 pmu_batteries[pmu_cur_battery].charge = capa;
767 pmu_batteries[pmu_cur_battery].max_charge = max;
768 pmu_batteries[pmu_cur_battery].amperage = amperage;
769 pmu_batteries[pmu_cur_battery].voltage = voltage;
770 if (amperage) {
771 if ((req->reply[1] & 0x01) && (amperage > 0))
772 pmu_batteries[pmu_cur_battery].time_remaining
773 = ((max-capa) * 3600) / amperage;
774 else
775 pmu_batteries[pmu_cur_battery].time_remaining
776 = (capa * 3600) / (-amperage);
777 } else
778 pmu_batteries[pmu_cur_battery].time_remaining = 0;
779
780 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
781
782 clear_bit(0, &async_req_locks);
783}
784
aacaf9bd 785static void
1da177e4
LT
786query_battery_state(void)
787{
788 if (test_and_set_bit(0, &async_req_locks))
789 return;
790 if (pmu_kind == PMU_OHARE_BASED)
791 pmu_request(&batt_req, done_battery_state_ohare,
792 1, PMU_BATTERY_STATE);
793 else
794 pmu_request(&batt_req, done_battery_state_smart,
795 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
796}
797
aacaf9bd 798static int
1da177e4
LT
799proc_get_info(char *page, char **start, off_t off,
800 int count, int *eof, void *data)
801{
802 char* p = page;
803
804 p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
805 p += sprintf(p, "PMU firmware version : %02x\n", pmu_version);
1da177e4 806 p += sprintf(p, "AC Power : %d\n",
63e1fd41 807 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
1da177e4 808 p += sprintf(p, "Battery count : %d\n", pmu_battery_count);
1da177e4
LT
809
810 return p - page;
811}
812
aacaf9bd 813static int
1da177e4
LT
814proc_get_irqstats(char *page, char **start, off_t off,
815 int count, int *eof, void *data)
816{
817 int i;
818 char* p = page;
819 static const char *irq_names[] = {
820 "Total CB1 triggered events",
821 "Total GPIO1 triggered events",
822 "PC-Card eject button",
823 "Sound/Brightness button",
824 "ADB message",
825 "Battery state change",
826 "Environment interrupt",
827 "Tick timer",
828 "Ghost interrupt (zero len)",
829 "Empty interrupt (empty mask)",
830 "Max irqs in a row"
831 };
832
833 for (i=0; i<11; i++) {
834 p += sprintf(p, " %2u: %10u (%s)\n",
835 i, pmu_irq_stats[i], irq_names[i]);
836 }
837 return p - page;
838}
839
aacaf9bd 840static int
1da177e4
LT
841proc_get_batt(char *page, char **start, off_t off,
842 int count, int *eof, void *data)
843{
8c870933 844 long batnum = (long)data;
1da177e4
LT
845 char *p = page;
846
847 p += sprintf(p, "\n");
848 p += sprintf(p, "flags : %08x\n",
849 pmu_batteries[batnum].flags);
850 p += sprintf(p, "charge : %d\n",
851 pmu_batteries[batnum].charge);
852 p += sprintf(p, "max_charge : %d\n",
853 pmu_batteries[batnum].max_charge);
854 p += sprintf(p, "current : %d\n",
855 pmu_batteries[batnum].amperage);
856 p += sprintf(p, "voltage : %d\n",
857 pmu_batteries[batnum].voltage);
858 p += sprintf(p, "time rem. : %d\n",
859 pmu_batteries[batnum].time_remaining);
860
861 return p - page;
862}
1da177e4 863
aacaf9bd 864static int
1da177e4
LT
865proc_read_options(char *page, char **start, off_t off,
866 int count, int *eof, void *data)
867{
868 char *p = page;
869
f91266ed 870#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
871 if (pmu_kind == PMU_KEYLARGO_BASED &&
872 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
873 p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup);
8c870933 874#endif
1da177e4
LT
875 if (pmu_kind == PMU_KEYLARGO_BASED)
876 p += sprintf(p, "server_mode=%d\n", option_server_mode);
877
878 return p - page;
879}
880
aacaf9bd 881static int
1da177e4
LT
882proc_write_options(struct file *file, const char __user *buffer,
883 unsigned long count, void *data)
884{
885 char tmp[33];
886 char *label, *val;
887 unsigned long fcount = count;
888
889 if (!count)
890 return -EINVAL;
891 if (count > 32)
892 count = 32;
893 if (copy_from_user(tmp, buffer, count))
894 return -EFAULT;
895 tmp[count] = 0;
896
897 label = tmp;
898 while(*label == ' ')
899 label++;
900 val = label;
901 while(*val && (*val != '=')) {
902 if (*val == ' ')
903 *val = 0;
904 val++;
905 }
906 if ((*val) == 0)
907 return -EINVAL;
908 *(val++) = 0;
909 while(*val == ' ')
910 val++;
f91266ed 911#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
912 if (pmu_kind == PMU_KEYLARGO_BASED &&
913 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
914 if (!strcmp(label, "lid_wakeup"))
915 option_lid_wakeup = ((*val) == '1');
8c870933 916#endif
1da177e4
LT
917 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
918 int new_value;
919 new_value = ((*val) == '1');
920 if (new_value != option_server_mode)
921 pmu_set_server_mode(new_value);
922 }
923 return fcount;
924}
925
926#ifdef CONFIG_ADB
927/* Send an ADB command */
aacaf9bd 928static int
1da177e4
LT
929pmu_send_request(struct adb_request *req, int sync)
930{
931 int i, ret;
932
933 if ((vias == NULL) || (!pmu_fully_inited)) {
934 req->complete = 1;
935 return -ENXIO;
936 }
937
938 ret = -EINVAL;
939
940 switch (req->data[0]) {
941 case PMU_PACKET:
942 for (i = 0; i < req->nbytes - 1; ++i)
943 req->data[i] = req->data[i+1];
944 --req->nbytes;
945 if (pmu_data_len[req->data[0]][1] != 0) {
946 req->reply[0] = ADB_RET_OK;
947 req->reply_len = 1;
948 } else
949 req->reply_len = 0;
950 ret = pmu_queue_request(req);
951 break;
952 case CUDA_PACKET:
953 switch (req->data[1]) {
954 case CUDA_GET_TIME:
955 if (req->nbytes != 2)
956 break;
957 req->data[0] = PMU_READ_RTC;
958 req->nbytes = 1;
959 req->reply_len = 3;
960 req->reply[0] = CUDA_PACKET;
961 req->reply[1] = 0;
962 req->reply[2] = CUDA_GET_TIME;
963 ret = pmu_queue_request(req);
964 break;
965 case CUDA_SET_TIME:
966 if (req->nbytes != 6)
967 break;
968 req->data[0] = PMU_SET_RTC;
969 req->nbytes = 5;
970 for (i = 1; i <= 4; ++i)
971 req->data[i] = req->data[i+1];
972 req->reply_len = 3;
973 req->reply[0] = CUDA_PACKET;
974 req->reply[1] = 0;
975 req->reply[2] = CUDA_SET_TIME;
976 ret = pmu_queue_request(req);
977 break;
978 }
979 break;
980 case ADB_PACKET:
981 if (!pmu_has_adb)
982 return -ENXIO;
983 for (i = req->nbytes - 1; i > 1; --i)
984 req->data[i+2] = req->data[i];
985 req->data[3] = req->nbytes - 2;
986 req->data[2] = pmu_adb_flags;
987 /*req->data[1] = req->data[1];*/
988 req->data[0] = PMU_ADB_CMD;
989 req->nbytes += 2;
990 req->reply_expected = 1;
991 req->reply_len = 0;
992 ret = pmu_queue_request(req);
993 break;
994 }
995 if (ret) {
996 req->complete = 1;
997 return ret;
998 }
999
1000 if (sync)
1001 while (!req->complete)
1002 pmu_poll();
1003
1004 return 0;
1005}
1006
1007/* Enable/disable autopolling */
aacaf9bd 1008static int
1da177e4
LT
1009pmu_adb_autopoll(int devs)
1010{
1011 struct adb_request req;
1012
1013 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1014 return -ENXIO;
1015
1016 if (devs) {
1017 adb_dev_map = devs;
1018 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1019 adb_dev_map >> 8, adb_dev_map);
1020 pmu_adb_flags = 2;
1021 } else {
1022 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1023 pmu_adb_flags = 0;
1024 }
1025 while (!req.complete)
1026 pmu_poll();
1027 return 0;
1028}
1029
1030/* Reset the ADB bus */
aacaf9bd 1031static int
1da177e4
LT
1032pmu_adb_reset_bus(void)
1033{
1034 struct adb_request req;
1035 int save_autopoll = adb_dev_map;
1036
1037 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1038 return -ENXIO;
1039
1040 /* anyone got a better idea?? */
1041 pmu_adb_autopoll(0);
1042
1043 req.nbytes = 5;
1044 req.done = NULL;
1045 req.data[0] = PMU_ADB_CMD;
1046 req.data[1] = 0;
1047 req.data[2] = ADB_BUSRESET;
1048 req.data[3] = 0;
1049 req.data[4] = 0;
1050 req.reply_len = 0;
1051 req.reply_expected = 1;
1052 if (pmu_queue_request(&req) != 0) {
1053 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1054 return -EIO;
1055 }
1056 pmu_wait_complete(&req);
1057
1058 if (save_autopoll != 0)
1059 pmu_adb_autopoll(save_autopoll);
1060
1061 return 0;
1062}
1063#endif /* CONFIG_ADB */
1064
1065/* Construct and send a pmu request */
aacaf9bd 1066int
1da177e4
LT
1067pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1068 int nbytes, ...)
1069{
1070 va_list list;
1071 int i;
1072
1073 if (vias == NULL)
1074 return -ENXIO;
1075
1076 if (nbytes < 0 || nbytes > 32) {
1077 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1078 req->complete = 1;
1079 return -EINVAL;
1080 }
1081 req->nbytes = nbytes;
1082 req->done = done;
1083 va_start(list, nbytes);
1084 for (i = 0; i < nbytes; ++i)
1085 req->data[i] = va_arg(list, int);
1086 va_end(list);
1087 req->reply_len = 0;
1088 req->reply_expected = 0;
1089 return pmu_queue_request(req);
1090}
1091
aacaf9bd 1092int
1da177e4
LT
1093pmu_queue_request(struct adb_request *req)
1094{
1095 unsigned long flags;
1096 int nsend;
1097
1098 if (via == NULL) {
1099 req->complete = 1;
1100 return -ENXIO;
1101 }
1102 if (req->nbytes <= 0) {
1103 req->complete = 1;
1104 return 0;
1105 }
1106 nsend = pmu_data_len[req->data[0]][0];
1107 if (nsend >= 0 && req->nbytes != nsend + 1) {
1108 req->complete = 1;
1109 return -EINVAL;
1110 }
1111
1112 req->next = NULL;
1113 req->sent = 0;
1114 req->complete = 0;
1115
1116 spin_lock_irqsave(&pmu_lock, flags);
1117 if (current_req != 0) {
1118 last_req->next = req;
1119 last_req = req;
1120 } else {
1121 current_req = req;
1122 last_req = req;
1123 if (pmu_state == idle)
1124 pmu_start();
1125 }
1126 spin_unlock_irqrestore(&pmu_lock, flags);
1127
1128 return 0;
1129}
1130
1131static inline void
1132wait_for_ack(void)
1133{
1134 /* Sightly increased the delay, I had one occurrence of the message
1135 * reported
1136 */
1137 int timeout = 4000;
1138 while ((in_8(&via[B]) & TACK) == 0) {
1139 if (--timeout < 0) {
1140 printk(KERN_ERR "PMU not responding (!ack)\n");
1141 return;
1142 }
1143 udelay(10);
1144 }
1145}
1146
1147/* New PMU seems to be very sensitive to those timings, so we make sure
1148 * PCI is flushed immediately */
1149static inline void
1150send_byte(int x)
1151{
1152 volatile unsigned char __iomem *v = via;
1153
1154 out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
1155 out_8(&v[SR], x);
1156 out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
1157 (void)in_8(&v[B]);
1158}
1159
1160static inline void
1161recv_byte(void)
1162{
1163 volatile unsigned char __iomem *v = via;
1164
1165 out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
1166 in_8(&v[SR]); /* resets SR */
1167 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1168 (void)in_8(&v[B]);
1169}
1170
1171static inline void
1172pmu_done(struct adb_request *req)
1173{
1174 void (*done)(struct adb_request *) = req->done;
1175 mb();
1176 req->complete = 1;
1177 /* Here, we assume that if the request has a done member, the
1178 * struct request will survive to setting req->complete to 1
1179 */
1180 if (done)
1181 (*done)(req);
1182}
1183
aacaf9bd 1184static void
1da177e4
LT
1185pmu_start(void)
1186{
1187 struct adb_request *req;
1188
1189 /* assert pmu_state == idle */
1190 /* get the packet to send */
1191 req = current_req;
1192 if (req == 0 || pmu_state != idle
1193 || (/*req->reply_expected && */req_awaiting_reply))
1194 return;
1195
1196 pmu_state = sending;
1197 data_index = 1;
1198 data_len = pmu_data_len[req->data[0]][0];
1199
1200 /* Sounds safer to make sure ACK is high before writing. This helped
1201 * kill a problem with ADB and some iBooks
1202 */
1203 wait_for_ack();
1204 /* set the shift register to shift out and send a byte */
1205 send_byte(req->data[0]);
1206}
1207
aacaf9bd 1208void
1da177e4
LT
1209pmu_poll(void)
1210{
1211 if (!via)
1212 return;
1213 if (disable_poll)
1214 return;
7d12e780 1215 via_pmu_interrupt(0, NULL);
1da177e4
LT
1216}
1217
aacaf9bd 1218void
1da177e4
LT
1219pmu_poll_adb(void)
1220{
1221 if (!via)
1222 return;
1223 if (disable_poll)
1224 return;
1225 /* Kicks ADB read when PMU is suspended */
1226 adb_int_pending = 1;
1227 do {
7d12e780 1228 via_pmu_interrupt(0, NULL);
1da177e4
LT
1229 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1230 || req_awaiting_reply));
1231}
1232
aacaf9bd 1233void
1da177e4
LT
1234pmu_wait_complete(struct adb_request *req)
1235{
1236 if (!via)
1237 return;
1238 while((pmu_state != idle && pmu_state != locked) || !req->complete)
7d12e780 1239 via_pmu_interrupt(0, NULL);
1da177e4
LT
1240}
1241
1242/* This function loops until the PMU is idle and prevents it from
1243 * anwsering to ADB interrupts. pmu_request can still be called.
1244 * This is done to avoid spurrious shutdowns when we know we'll have
1245 * interrupts switched off for a long time
1246 */
aacaf9bd 1247void
1da177e4
LT
1248pmu_suspend(void)
1249{
1250 unsigned long flags;
1b0e9d44 1251
1da177e4
LT
1252 if (!via)
1253 return;
1254
1255 spin_lock_irqsave(&pmu_lock, flags);
1256 pmu_suspended++;
1257 if (pmu_suspended > 1) {
1258 spin_unlock_irqrestore(&pmu_lock, flags);
1259 return;
1260 }
1261
1262 do {
1263 spin_unlock_irqrestore(&pmu_lock, flags);
1264 if (req_awaiting_reply)
1265 adb_int_pending = 1;
7d12e780 1266 via_pmu_interrupt(0, NULL);
1da177e4
LT
1267 spin_lock_irqsave(&pmu_lock, flags);
1268 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1da177e4
LT
1269 if (gpio_irq >= 0)
1270 disable_irq_nosync(gpio_irq);
1271 out_8(&via[IER], CB1_INT | IER_CLR);
1272 spin_unlock_irqrestore(&pmu_lock, flags);
1da177e4
LT
1273 break;
1274 }
1275 } while (1);
1276}
1277
aacaf9bd 1278void
1da177e4
LT
1279pmu_resume(void)
1280{
1281 unsigned long flags;
1282
1283 if (!via || (pmu_suspended < 1))
1284 return;
1285
1286 spin_lock_irqsave(&pmu_lock, flags);
1287 pmu_suspended--;
1288 if (pmu_suspended > 0) {
1289 spin_unlock_irqrestore(&pmu_lock, flags);
1290 return;
1291 }
1292 adb_int_pending = 1;
1da177e4
LT
1293 if (gpio_irq >= 0)
1294 enable_irq(gpio_irq);
1295 out_8(&via[IER], CB1_INT | IER_SET);
1296 spin_unlock_irqrestore(&pmu_lock, flags);
1297 pmu_poll();
1da177e4
LT
1298}
1299
1300/* Interrupt data could be the result data from an ADB cmd */
aacaf9bd 1301static void
7d12e780 1302pmu_handle_data(unsigned char *data, int len)
1da177e4
LT
1303{
1304 unsigned char ints, pirq;
1305 int i = 0;
1306
1307 asleep = 0;
1308 if (drop_interrupts || len < 1) {
1309 adb_int_pending = 0;
1310 pmu_irq_stats[8]++;
1311 return;
1312 }
1313
1314 /* Get PMU interrupt mask */
1315 ints = data[0];
1316
1317 /* Record zero interrupts for stats */
1318 if (ints == 0)
1319 pmu_irq_stats[9]++;
1320
1321 /* Hack to deal with ADB autopoll flag */
1322 if (ints & PMU_INT_ADB)
1323 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1324
1325next:
1326
1327 if (ints == 0) {
1328 if (i > pmu_irq_stats[10])
1329 pmu_irq_stats[10] = i;
1330 return;
1331 }
1332
1333 for (pirq = 0; pirq < 8; pirq++)
1334 if (ints & (1 << pirq))
1335 break;
1336 pmu_irq_stats[pirq]++;
1337 i++;
1338 ints &= ~(1 << pirq);
1339
1340 /* Note: for some reason, we get an interrupt with len=1,
1341 * data[0]==0 after each normal ADB interrupt, at least
1342 * on the Pismo. Still investigating... --BenH
1343 */
1344 if ((1 << pirq) & PMU_INT_ADB) {
1345 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1346 struct adb_request *req = req_awaiting_reply;
1347 if (req == 0) {
1348 printk(KERN_ERR "PMU: extra ADB reply\n");
1349 return;
1350 }
1351 req_awaiting_reply = NULL;
1352 if (len <= 2)
1353 req->reply_len = 0;
1354 else {
1355 memcpy(req->reply, data + 1, len - 1);
1356 req->reply_len = len - 1;
1357 }
1358 pmu_done(req);
1359 } else {
1da177e4
LT
1360 if (len == 4 && data[1] == 0x2c) {
1361 extern int xmon_wants_key, xmon_adb_keycode;
1362 if (xmon_wants_key) {
1363 xmon_adb_keycode = data[2];
1364 return;
1365 }
1366 }
1da177e4
LT
1367#ifdef CONFIG_ADB
1368 /*
1369 * XXX On the [23]400 the PMU gives us an up
1370 * event for keycodes 0x74 or 0x75 when the PC
1371 * card eject buttons are released, so we
1372 * ignore those events.
1373 */
1374 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1375 && data[1] == 0x2c && data[3] == 0xff
1376 && (data[2] & ~1) == 0xf4))
7d12e780 1377 adb_input(data+1, len-1, 1);
1da177e4
LT
1378#endif /* CONFIG_ADB */
1379 }
1380 }
1381 /* Sound/brightness button pressed */
1382 else if ((1 << pirq) & PMU_INT_SNDBRT) {
1383#ifdef CONFIG_PMAC_BACKLIGHT
1384 if (len == 3)
4b755999
MH
1385 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1386#endif
1da177e4
LT
1387 }
1388 /* Tick interrupt */
1389 else if ((1 << pirq) & PMU_INT_TICK) {
1da177e4
LT
1390 /* Environement or tick interrupt, query batteries */
1391 if (pmu_battery_count) {
1392 if ((--query_batt_timer) == 0) {
1393 query_battery_state();
1394 query_batt_timer = BATTERY_POLLING_COUNT;
1395 }
1396 }
1397 }
1398 else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
1399 if (pmu_battery_count)
1400 query_battery_state();
1401 pmu_pass_intr(data, len);
9e8e30a0
JB
1402 /* len == 6 is probably a bad check. But how do I
1403 * know what PMU versions send what events here? */
1404 if (len == 6) {
1405 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1406 via_pmu_event(PMU_EVT_LID, data[1]&1);
1407 }
1da177e4
LT
1408 } else {
1409 pmu_pass_intr(data, len);
1da177e4
LT
1410 }
1411 goto next;
1412}
1413
aacaf9bd 1414static struct adb_request*
7d12e780 1415pmu_sr_intr(void)
1da177e4
LT
1416{
1417 struct adb_request *req;
1418 int bite = 0;
1419
1420 if (via[B] & TREQ) {
1421 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
1422 out_8(&via[IFR], SR_INT);
1423 return NULL;
1424 }
1425 /* The ack may not yet be low when we get the interrupt */
1426 while ((in_8(&via[B]) & TACK) != 0)
1427 ;
1428
1429 /* if reading grab the byte, and reset the interrupt */
1430 if (pmu_state == reading || pmu_state == reading_intr)
1431 bite = in_8(&via[SR]);
1432
1433 /* reset TREQ and wait for TACK to go high */
1434 out_8(&via[B], in_8(&via[B]) | TREQ);
1435 wait_for_ack();
1436
1437 switch (pmu_state) {
1438 case sending:
1439 req = current_req;
1440 if (data_len < 0) {
1441 data_len = req->nbytes - 1;
1442 send_byte(data_len);
1443 break;
1444 }
1445 if (data_index <= data_len) {
1446 send_byte(req->data[data_index++]);
1447 break;
1448 }
1449 req->sent = 1;
1450 data_len = pmu_data_len[req->data[0]][1];
1451 if (data_len == 0) {
1452 pmu_state = idle;
1453 current_req = req->next;
1454 if (req->reply_expected)
1455 req_awaiting_reply = req;
1456 else
1457 return req;
1458 } else {
1459 pmu_state = reading;
1460 data_index = 0;
1461 reply_ptr = req->reply + req->reply_len;
1462 recv_byte();
1463 }
1464 break;
1465
1466 case intack:
1467 data_index = 0;
1468 data_len = -1;
1469 pmu_state = reading_intr;
1470 reply_ptr = interrupt_data[int_data_last];
1471 recv_byte();
1472 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1473 enable_irq(gpio_irq);
1474 gpio_irq_enabled = 1;
1475 }
1476 break;
1477
1478 case reading:
1479 case reading_intr:
1480 if (data_len == -1) {
1481 data_len = bite;
1482 if (bite > 32)
1483 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1484 } else if (data_index < 32) {
1485 reply_ptr[data_index++] = bite;
1486 }
1487 if (data_index < data_len) {
1488 recv_byte();
1489 break;
1490 }
1491
1492 if (pmu_state == reading_intr) {
1493 pmu_state = idle;
1494 int_data_state[int_data_last] = int_data_ready;
1495 interrupt_data_len[int_data_last] = data_len;
1496 } else {
1497 req = current_req;
1498 /*
1499 * For PMU sleep and freq change requests, we lock the
c03983ac 1500 * PMU until it's explicitly unlocked. This avoids any
1da177e4
LT
1501 * spurrious event polling getting in
1502 */
1503 current_req = req->next;
1504 req->reply_len += data_index;
1505 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1506 pmu_state = locked;
1507 else
1508 pmu_state = idle;
1509 return req;
1510 }
1511 break;
1512
1513 default:
1514 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1515 pmu_state);
1516 }
1517 return NULL;
1518}
1519
aacaf9bd 1520static irqreturn_t
7d12e780 1521via_pmu_interrupt(int irq, void *arg)
1da177e4
LT
1522{
1523 unsigned long flags;
1524 int intr;
1525 int nloop = 0;
1526 int int_data = -1;
1527 struct adb_request *req = NULL;
1528 int handled = 0;
1529
1530 /* This is a bit brutal, we can probably do better */
1531 spin_lock_irqsave(&pmu_lock, flags);
1532 ++disable_poll;
1533
1534 for (;;) {
1535 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1536 if (intr == 0)
1537 break;
1538 handled = 1;
1539 if (++nloop > 1000) {
1540 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1541 "intr=%x, ier=%x pmu_state=%d\n",
1542 intr, in_8(&via[IER]), pmu_state);
1543 break;
1544 }
1545 out_8(&via[IFR], intr);
1546 if (intr & CB1_INT) {
1547 adb_int_pending = 1;
1548 pmu_irq_stats[0]++;
1549 }
1550 if (intr & SR_INT) {
7d12e780 1551 req = pmu_sr_intr();
1da177e4
LT
1552 if (req)
1553 break;
1554 }
1555 }
1556
1557recheck:
1558 if (pmu_state == idle) {
1559 if (adb_int_pending) {
1560 if (int_data_state[0] == int_data_empty)
1561 int_data_last = 0;
1562 else if (int_data_state[1] == int_data_empty)
1563 int_data_last = 1;
1564 else
1565 goto no_free_slot;
1566 pmu_state = intack;
1567 int_data_state[int_data_last] = int_data_fill;
1568 /* Sounds safer to make sure ACK is high before writing.
1569 * This helped kill a problem with ADB and some iBooks
1570 */
1571 wait_for_ack();
1572 send_byte(PMU_INT_ACK);
1573 adb_int_pending = 0;
1574 } else if (current_req)
1575 pmu_start();
1576 }
1577no_free_slot:
1578 /* Mark the oldest buffer for flushing */
1579 if (int_data_state[!int_data_last] == int_data_ready) {
1580 int_data_state[!int_data_last] = int_data_flush;
1581 int_data = !int_data_last;
1582 } else if (int_data_state[int_data_last] == int_data_ready) {
1583 int_data_state[int_data_last] = int_data_flush;
1584 int_data = int_data_last;
1585 }
1586 --disable_poll;
1587 spin_unlock_irqrestore(&pmu_lock, flags);
1588
1589 /* Deal with completed PMU requests outside of the lock */
1590 if (req) {
1591 pmu_done(req);
1592 req = NULL;
1593 }
1594
1595 /* Deal with interrupt datas outside of the lock */
1596 if (int_data >= 0) {
7d12e780 1597 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1da177e4
LT
1598 spin_lock_irqsave(&pmu_lock, flags);
1599 ++disable_poll;
1600 int_data_state[int_data] = int_data_empty;
1601 int_data = -1;
1602 goto recheck;
1603 }
1604
1605 return IRQ_RETVAL(handled);
1606}
1607
aacaf9bd 1608void
1da177e4
LT
1609pmu_unlock(void)
1610{
1611 unsigned long flags;
1612
1613 spin_lock_irqsave(&pmu_lock, flags);
1614 if (pmu_state == locked)
1615 pmu_state = idle;
1616 adb_int_pending = 1;
1617 spin_unlock_irqrestore(&pmu_lock, flags);
1618}
1619
1620
aacaf9bd 1621static irqreturn_t
7d12e780 1622gpio1_interrupt(int irq, void *arg)
1da177e4
LT
1623{
1624 unsigned long flags;
1625
1626 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1627 spin_lock_irqsave(&pmu_lock, flags);
1628 if (gpio_irq_enabled > 0) {
1629 disable_irq_nosync(gpio_irq);
1630 gpio_irq_enabled = 0;
1631 }
1632 pmu_irq_stats[1]++;
1633 adb_int_pending = 1;
1634 spin_unlock_irqrestore(&pmu_lock, flags);
7d12e780 1635 via_pmu_interrupt(0, NULL);
1da177e4
LT
1636 return IRQ_HANDLED;
1637 }
1638 return IRQ_NONE;
1639}
1640
aacaf9bd 1641void
1da177e4
LT
1642pmu_enable_irled(int on)
1643{
1644 struct adb_request req;
1645
1646 if (vias == NULL)
1647 return ;
1648 if (pmu_kind == PMU_KEYLARGO_BASED)
1649 return ;
1650
1651 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1652 (on ? PMU_POW_ON : PMU_POW_OFF));
1653 pmu_wait_complete(&req);
1654}
1655
aacaf9bd 1656void
1da177e4
LT
1657pmu_restart(void)
1658{
1659 struct adb_request req;
1660
1661 if (via == NULL)
1662 return;
1663
1664 local_irq_disable();
1665
1666 drop_interrupts = 1;
1667
1668 if (pmu_kind != PMU_KEYLARGO_BASED) {
1669 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1670 PMU_INT_TICK );
1671 while(!req.complete)
1672 pmu_poll();
1673 }
1674
1675 pmu_request(&req, NULL, 1, PMU_RESET);
1676 pmu_wait_complete(&req);
1677 for (;;)
1678 ;
1679}
1680
aacaf9bd 1681void
1da177e4
LT
1682pmu_shutdown(void)
1683{
1684 struct adb_request req;
1685
1686 if (via == NULL)
1687 return;
1688
1689 local_irq_disable();
1690
1691 drop_interrupts = 1;
1692
1693 if (pmu_kind != PMU_KEYLARGO_BASED) {
1694 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1695 PMU_INT_TICK );
1696 pmu_wait_complete(&req);
1697 } else {
1698 /* Disable server mode on shutdown or we'll just
1699 * wake up again
1700 */
1701 pmu_set_server_mode(0);
1702 }
1703
1704 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1705 'M', 'A', 'T', 'T');
1706 pmu_wait_complete(&req);
1707 for (;;)
1708 ;
1709}
1710
1711int
1712pmu_present(void)
1713{
1714 return via != 0;
1715}
1716
f91266ed 1717#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
1718/*
1719 * Put the powerbook to sleep.
1720 */
1721
aacaf9bd 1722static u32 save_via[8];
1da177e4 1723
aacaf9bd 1724static void
1da177e4
LT
1725save_via_state(void)
1726{
1727 save_via[0] = in_8(&via[ANH]);
1728 save_via[1] = in_8(&via[DIRA]);
1729 save_via[2] = in_8(&via[B]);
1730 save_via[3] = in_8(&via[DIRB]);
1731 save_via[4] = in_8(&via[PCR]);
1732 save_via[5] = in_8(&via[ACR]);
1733 save_via[6] = in_8(&via[T1CL]);
1734 save_via[7] = in_8(&via[T1CH]);
1735}
aacaf9bd 1736static void
1da177e4
LT
1737restore_via_state(void)
1738{
1739 out_8(&via[ANH], save_via[0]);
1740 out_8(&via[DIRA], save_via[1]);
1741 out_8(&via[B], save_via[2]);
1742 out_8(&via[DIRB], save_via[3]);
1743 out_8(&via[PCR], save_via[4]);
1744 out_8(&via[ACR], save_via[5]);
1745 out_8(&via[T1CL], save_via[6]);
1746 out_8(&via[T1CH], save_via[7]);
1747 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
1748 out_8(&via[IFR], 0x7f); /* clear IFR */
1749 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1750}
1751
1da177e4
LT
1752#define GRACKLE_PM (1<<7)
1753#define GRACKLE_DOZE (1<<5)
1754#define GRACKLE_NAP (1<<4)
1755#define GRACKLE_SLEEP (1<<3)
1756
3bea6313 1757static int powerbook_sleep_grackle(void)
1da177e4
LT
1758{
1759 unsigned long save_l2cr;
1760 unsigned short pmcr1;
1761 struct adb_request req;
1da177e4
LT
1762 struct pci_dev *grackle;
1763
c78f8305 1764 grackle = pci_get_bus_and_slot(0, 0);
1da177e4
LT
1765 if (!grackle)
1766 return -ENODEV;
1767
1da177e4
LT
1768 /* Turn off various things. Darwin does some retry tests here... */
1769 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1770 pmu_wait_complete(&req);
1771 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1772 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1773 pmu_wait_complete(&req);
1774
1775 /* For 750, save backside cache setting and disable it */
1776 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1777
1778 if (!__fake_sleep) {
1779 /* Ask the PMU to put us to sleep */
1780 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1781 pmu_wait_complete(&req);
1782 }
1783
1784 /* The VIA is supposed not to be restored correctly*/
1785 save_via_state();
1786 /* We shut down some HW */
1787 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1788
1789 pci_read_config_word(grackle, 0x70, &pmcr1);
1790 /* Apparently, MacOS uses NAP mode for Grackle ??? */
1791 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1792 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1793 pci_write_config_word(grackle, 0x70, pmcr1);
1794
1795 /* Call low-level ASM sleep handler */
1796 if (__fake_sleep)
1797 mdelay(5000);
1798 else
1799 low_sleep_handler();
1800
1801 /* We're awake again, stop grackle PM */
1802 pci_read_config_word(grackle, 0x70, &pmcr1);
1803 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1804 pci_write_config_word(grackle, 0x70, pmcr1);
1805
c78f8305
AC
1806 pci_dev_put(grackle);
1807
1da177e4
LT
1808 /* Make sure the PMU is idle */
1809 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1810 restore_via_state();
1811
1812 /* Restore L2 cache */
1813 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1814 _set_L2CR(save_l2cr);
1815
1816 /* Restore userland MMU context */
6218a761 1817 set_context(current->active_mm->context.id, current->active_mm->pgd);
1da177e4
LT
1818
1819 /* Power things up */
1820 pmu_unlock();
1821 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1822 pmu_wait_complete(&req);
1823 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1824 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1825 pmu_wait_complete(&req);
1826 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1827 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1828 pmu_wait_complete(&req);
1829
1da177e4
LT
1830 return 0;
1831}
1832
aacaf9bd 1833static int
1da177e4
LT
1834powerbook_sleep_Core99(void)
1835{
1836 unsigned long save_l2cr;
1837 unsigned long save_l3cr;
1838 struct adb_request req;
1da177e4
LT
1839
1840 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1841 printk(KERN_ERR "Sleep mode not supported on this machine\n");
1842 return -ENOSYS;
1843 }
1844
1845 if (num_online_cpus() > 1 || cpu_is_offline(0))
1846 return -EAGAIN;
1847
b16eeb47
BH
1848 /* Stop environment and ADB interrupts */
1849 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1850 pmu_wait_complete(&req);
1da177e4
LT
1851
1852 /* Tell PMU what events will wake us up */
1853 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1854 0xff, 0xff);
1855 pmu_wait_complete(&req);
1856 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1857 0, PMU_PWR_WAKEUP_KEY |
1858 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1859 pmu_wait_complete(&req);
1860
1861 /* Save the state of the L2 and L3 caches */
1862 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
1863 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1864
1865 if (!__fake_sleep) {
1866 /* Ask the PMU to put us to sleep */
1867 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1868 pmu_wait_complete(&req);
1869 }
1870
1871 /* The VIA is supposed not to be restored correctly*/
1872 save_via_state();
1873
1874 /* Shut down various ASICs. There's a chance that we can no longer
1875 * talk to the PMU after this, so I moved it to _after_ sending the
1876 * sleep command to it. Still need to be checked.
1877 */
1878 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1879
1880 /* Call low-level ASM sleep handler */
1881 if (__fake_sleep)
1882 mdelay(5000);
1883 else
1884 low_sleep_handler();
1885
1886 /* Restore Apple core ASICs state */
1887 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1888
1889 /* Restore VIA */
1890 restore_via_state();
1891
0086b5ec
BH
1892 /* tweak LPJ before cpufreq is there */
1893 loops_per_jiffy *= 2;
1894
1da177e4
LT
1895 /* Restore video */
1896 pmac_call_early_video_resume();
1897
1898 /* Restore L2 cache */
1899 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1900 _set_L2CR(save_l2cr);
1901 /* Restore L3 cache */
1902 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
1903 _set_L3CR(save_l3cr);
1904
1905 /* Restore userland MMU context */
6218a761 1906 set_context(current->active_mm->context.id, current->active_mm->pgd);
1da177e4
LT
1907
1908 /* Tell PMU we are ready */
1909 pmu_unlock();
1910 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
1911 pmu_wait_complete(&req);
1912 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1913 pmu_wait_complete(&req);
1914
0086b5ec
BH
1915 /* Restore LPJ, cpufreq will adjust the cpu frequency */
1916 loops_per_jiffy /= 2;
1917
1da177e4
LT
1918 return 0;
1919}
1920
1921#define PB3400_MEM_CTRL 0xf8000000
1922#define PB3400_MEM_CTRL_SLEEP 0x70
1923
887ef35a
PM
1924static void __iomem *pb3400_mem_ctrl;
1925
1926static void powerbook_sleep_init_3400(void)
1927{
1928 /* map in the memory controller registers */
1929 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
1930 if (pb3400_mem_ctrl == NULL)
1931 printk(KERN_WARNING "ioremap failed: sleep won't be possible");
1932}
1933
1934static int powerbook_sleep_3400(void)
1da177e4 1935{
f91266ed 1936 int i, x;
1da177e4 1937 unsigned int hid0;
887ef35a 1938 unsigned long msr;
1da177e4 1939 struct adb_request sleep_req;
1da177e4
LT
1940 unsigned int __iomem *mem_ctrl_sleep;
1941
887ef35a 1942 if (pb3400_mem_ctrl == NULL)
1da177e4 1943 return -ENOMEM;
887ef35a 1944 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
1da177e4 1945
1da177e4
LT
1946 /* Set the memory controller to keep the memory refreshed
1947 while we're asleep */
1948 for (i = 0x403f; i >= 0x4000; --i) {
1949 out_be32(mem_ctrl_sleep, i);
1950 do {
1951 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
1952 } while (x == 0);
1953 if (x >= 0x100)
1954 break;
1955 }
1956
1957 /* Ask the PMU to put us to sleep */
1958 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
887ef35a
PM
1959 pmu_wait_complete(&sleep_req);
1960 pmu_unlock();
1da177e4 1961
887ef35a 1962 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1da177e4 1963
1da177e4
LT
1964 asleep = 1;
1965
1966 /* Put the CPU into sleep mode */
21fe3301 1967 hid0 = mfspr(SPRN_HID0);
1da177e4 1968 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
21fe3301 1969 mtspr(SPRN_HID0, hid0);
887ef35a
PM
1970 local_irq_enable();
1971 msr = mfmsr() | MSR_POW;
1972 while (asleep) {
1973 mb();
1974 mtmsr(msr);
1975 isync();
1976 }
1977 local_irq_disable();
1da177e4
LT
1978
1979 /* OK, we're awake again, start restoring things */
1980 out_be32(mem_ctrl_sleep, 0x3f);
887ef35a 1981 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1da177e4 1982
1da177e4
LT
1983 return 0;
1984}
1985
f91266ed 1986#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
8c870933 1987
1da177e4
LT
1988/*
1989 * Support for /dev/pmu device
1990 */
1991#define RB_SIZE 0x10
1992struct pmu_private {
1993 struct list_head list;
1994 int rb_get;
1995 int rb_put;
1996 struct rb_entry {
1997 unsigned short len;
1998 unsigned char data[16];
1999 } rb_buf[RB_SIZE];
2000 wait_queue_head_t wait;
2001 spinlock_t lock;
2002#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2003 int backlight_locker;
4b755999 2004#endif
1da177e4
LT
2005};
2006
2007static LIST_HEAD(all_pmu_pvt);
aacaf9bd 2008static DEFINE_SPINLOCK(all_pvt_lock);
1da177e4 2009
aacaf9bd 2010static void
1da177e4
LT
2011pmu_pass_intr(unsigned char *data, int len)
2012{
2013 struct pmu_private *pp;
2014 struct list_head *list;
2015 int i;
2016 unsigned long flags;
2017
2018 if (len > sizeof(pp->rb_buf[0].data))
2019 len = sizeof(pp->rb_buf[0].data);
2020 spin_lock_irqsave(&all_pvt_lock, flags);
2021 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2022 pp = list_entry(list, struct pmu_private, list);
2023 spin_lock(&pp->lock);
2024 i = pp->rb_put + 1;
2025 if (i >= RB_SIZE)
2026 i = 0;
2027 if (i != pp->rb_get) {
2028 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2029 rp->len = len;
2030 memcpy(rp->data, data, len);
2031 pp->rb_put = i;
2032 wake_up_interruptible(&pp->wait);
2033 }
2034 spin_unlock(&pp->lock);
2035 }
2036 spin_unlock_irqrestore(&all_pvt_lock, flags);
2037}
2038
aacaf9bd 2039static int
1da177e4
LT
2040pmu_open(struct inode *inode, struct file *file)
2041{
2042 struct pmu_private *pp;
2043 unsigned long flags;
2044
2045 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
2046 if (pp == 0)
2047 return -ENOMEM;
2048 pp->rb_get = pp->rb_put = 0;
2049 spin_lock_init(&pp->lock);
2050 init_waitqueue_head(&pp->wait);
ffe83733 2051 lock_kernel();
1da177e4
LT
2052 spin_lock_irqsave(&all_pvt_lock, flags);
2053#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2054 pp->backlight_locker = 0;
4b755999 2055#endif
1da177e4
LT
2056 list_add(&pp->list, &all_pmu_pvt);
2057 spin_unlock_irqrestore(&all_pvt_lock, flags);
2058 file->private_data = pp;
ffe83733 2059 unlock_kernel();
1da177e4
LT
2060 return 0;
2061}
2062
aacaf9bd 2063static ssize_t
1da177e4
LT
2064pmu_read(struct file *file, char __user *buf,
2065 size_t count, loff_t *ppos)
2066{
2067 struct pmu_private *pp = file->private_data;
2068 DECLARE_WAITQUEUE(wait, current);
2069 unsigned long flags;
2070 int ret = 0;
2071
2072 if (count < 1 || pp == 0)
2073 return -EINVAL;
2074 if (!access_ok(VERIFY_WRITE, buf, count))
2075 return -EFAULT;
2076
2077 spin_lock_irqsave(&pp->lock, flags);
2078 add_wait_queue(&pp->wait, &wait);
2079 current->state = TASK_INTERRUPTIBLE;
2080
2081 for (;;) {
2082 ret = -EAGAIN;
2083 if (pp->rb_get != pp->rb_put) {
2084 int i = pp->rb_get;
2085 struct rb_entry *rp = &pp->rb_buf[i];
2086 ret = rp->len;
2087 spin_unlock_irqrestore(&pp->lock, flags);
2088 if (ret > count)
2089 ret = count;
2090 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2091 ret = -EFAULT;
2092 if (++i >= RB_SIZE)
2093 i = 0;
2094 spin_lock_irqsave(&pp->lock, flags);
2095 pp->rb_get = i;
2096 }
2097 if (ret >= 0)
2098 break;
2099 if (file->f_flags & O_NONBLOCK)
2100 break;
2101 ret = -ERESTARTSYS;
2102 if (signal_pending(current))
2103 break;
2104 spin_unlock_irqrestore(&pp->lock, flags);
2105 schedule();
2106 spin_lock_irqsave(&pp->lock, flags);
2107 }
2108 current->state = TASK_RUNNING;
2109 remove_wait_queue(&pp->wait, &wait);
2110 spin_unlock_irqrestore(&pp->lock, flags);
2111
2112 return ret;
2113}
2114
aacaf9bd 2115static ssize_t
1da177e4
LT
2116pmu_write(struct file *file, const char __user *buf,
2117 size_t count, loff_t *ppos)
2118{
2119 return 0;
2120}
2121
aacaf9bd 2122static unsigned int
1da177e4
LT
2123pmu_fpoll(struct file *filp, poll_table *wait)
2124{
2125 struct pmu_private *pp = filp->private_data;
2126 unsigned int mask = 0;
2127 unsigned long flags;
2128
2129 if (pp == 0)
2130 return 0;
2131 poll_wait(filp, &pp->wait, wait);
2132 spin_lock_irqsave(&pp->lock, flags);
2133 if (pp->rb_get != pp->rb_put)
2134 mask |= POLLIN;
2135 spin_unlock_irqrestore(&pp->lock, flags);
2136 return mask;
2137}
2138
aacaf9bd 2139static int
1da177e4
LT
2140pmu_release(struct inode *inode, struct file *file)
2141{
2142 struct pmu_private *pp = file->private_data;
2143 unsigned long flags;
2144
1da177e4
LT
2145 if (pp != 0) {
2146 file->private_data = NULL;
2147 spin_lock_irqsave(&all_pvt_lock, flags);
2148 list_del(&pp->list);
2149 spin_unlock_irqrestore(&all_pvt_lock, flags);
4b755999 2150
1da177e4 2151#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
4b755999
MH
2152 if (pp->backlight_locker)
2153 pmac_backlight_enable();
2154#endif
2155
1da177e4
LT
2156 kfree(pp);
2157 }
1da177e4
LT
2158 return 0;
2159}
2160
f91266ed 2161#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
7ac5dde9 2162static void pmac_suspend_disable_irqs(void)
f91266ed 2163{
f91266ed
JB
2164 /* Call platform functions marked "on sleep" */
2165 pmac_pfunc_i2c_suspend();
2166 pmac_pfunc_base_suspend();
f91266ed
JB
2167}
2168
2169static int powerbook_sleep(suspend_state_t state)
2170{
2171 int error = 0;
2172
2173 /* Wait for completion of async requests */
2174 while (!batt_req.complete)
2175 pmu_poll();
2176
2177 /* Giveup the lazy FPU & vec so we don't have to back them
2178 * up from the low level code
2179 */
2180 enable_kernel_fp();
2181
2182#ifdef CONFIG_ALTIVEC
2183 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2184 enable_kernel_altivec();
2185#endif /* CONFIG_ALTIVEC */
2186
2187 switch (pmu_kind) {
2188 case PMU_OHARE_BASED:
2189 error = powerbook_sleep_3400();
2190 break;
2191 case PMU_HEATHROW_BASED:
2192 case PMU_PADDINGTON_BASED:
2193 error = powerbook_sleep_grackle();
2194 break;
2195 case PMU_KEYLARGO_BASED:
2196 error = powerbook_sleep_Core99();
2197 break;
2198 default:
2199 return -ENOSYS;
2200 }
2201
2202 if (error)
2203 return error;
2204
2205 mdelay(100);
2206
f91266ed
JB
2207 return 0;
2208}
2209
7ac5dde9 2210static void pmac_suspend_enable_irqs(void)
f91266ed
JB
2211{
2212 /* Force a poll of ADB interrupts */
2213 adb_int_pending = 1;
2214 via_pmu_interrupt(0, NULL);
2215
f91266ed 2216 mdelay(10);
f91266ed
JB
2217
2218 /* Call platform functions marked "on wake" */
2219 pmac_pfunc_base_resume();
2220 pmac_pfunc_i2c_resume();
2221}
2222
2223static int pmu_sleep_valid(suspend_state_t state)
2224{
2225 return state == PM_SUSPEND_MEM
2226 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2227}
2228
2229static struct platform_suspend_ops pmu_pm_ops = {
2230 .enter = powerbook_sleep,
2231 .valid = pmu_sleep_valid,
2232};
2233
2234static int register_pmu_pm_ops(void)
2235{
7ac5dde9
SW
2236 if (pmu_kind == PMU_OHARE_BASED)
2237 powerbook_sleep_init_3400();
2238 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2239 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
f91266ed
JB
2240 suspend_set_ops(&pmu_pm_ops);
2241
2242 return 0;
2243}
2244
2245device_initcall(register_pmu_pm_ops);
2246#endif
2247
aacaf9bd 2248static int
1da177e4
LT
2249pmu_ioctl(struct inode * inode, struct file *filp,
2250 u_int cmd, u_long arg)
2251{
1da177e4 2252 __u32 __user *argp = (__u32 __user *)arg;
8c870933 2253 int error = -EINVAL;
1da177e4
LT
2254
2255 switch (cmd) {
2256 case PMU_IOC_SLEEP:
2257 if (!capable(CAP_SYS_ADMIN))
2258 return -EACCES;
f91266ed 2259 return pm_suspend(PM_SUSPEND_MEM);
1da177e4 2260 case PMU_IOC_CAN_SLEEP:
f91266ed 2261 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
1da177e4
LT
2262 return put_user(0, argp);
2263 else
2264 return put_user(1, argp);
2265
5474c120
MH
2266#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2267 /* Compatibility ioctl's for backlight */
1da177e4 2268 case PMU_IOC_GET_BACKLIGHT:
5474c120
MH
2269 {
2270 int brightness;
2271
5474c120
MH
2272 brightness = pmac_backlight_get_legacy_brightness();
2273 if (brightness < 0)
2274 return brightness;
2275 else
2276 return put_user(brightness, argp);
2277
2278 }
1da177e4
LT
2279 case PMU_IOC_SET_BACKLIGHT:
2280 {
5474c120
MH
2281 int brightness;
2282
5474c120
MH
2283 error = get_user(brightness, argp);
2284 if (error)
2285 return error;
2286
2287 return pmac_backlight_set_legacy_brightness(brightness);
1da177e4
LT
2288 }
2289#ifdef CONFIG_INPUT_ADBHID
2290 case PMU_IOC_GRAB_BACKLIGHT: {
8c870933 2291 struct pmu_private *pp = filp->private_data;
8c870933 2292
1da177e4
LT
2293 if (pp->backlight_locker)
2294 return 0;
4b755999 2295
1da177e4 2296 pp->backlight_locker = 1;
4b755999
MH
2297 pmac_backlight_disable();
2298
1da177e4
LT
2299 return 0;
2300 }
2301#endif /* CONFIG_INPUT_ADBHID */
5474c120 2302#endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
4b755999 2303
1da177e4
LT
2304 case PMU_IOC_GET_MODEL:
2305 return put_user(pmu_kind, argp);
2306 case PMU_IOC_HAS_ADB:
2307 return put_user(pmu_has_adb, argp);
2308 }
8c870933 2309 return error;
1da177e4
LT
2310}
2311
fa027c2a 2312static const struct file_operations pmu_device_fops = {
1da177e4
LT
2313 .read = pmu_read,
2314 .write = pmu_write,
2315 .poll = pmu_fpoll,
2316 .ioctl = pmu_ioctl,
2317 .open = pmu_open,
2318 .release = pmu_release,
2319};
2320
aacaf9bd 2321static struct miscdevice pmu_device = {
1da177e4
LT
2322 PMU_MINOR, "pmu", &pmu_device_fops
2323};
2324
8c870933 2325static int pmu_device_init(void)
1da177e4
LT
2326{
2327 if (!via)
8c870933 2328 return 0;
1da177e4
LT
2329 if (misc_register(&pmu_device) < 0)
2330 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
8c870933 2331 return 0;
1da177e4 2332}
8c870933
BH
2333device_initcall(pmu_device_init);
2334
1da177e4
LT
2335
2336#ifdef DEBUG_SLEEP
aacaf9bd 2337static inline void
1da177e4
LT
2338polled_handshake(volatile unsigned char __iomem *via)
2339{
2340 via[B] &= ~TREQ; eieio();
2341 while ((via[B] & TACK) != 0)
2342 ;
2343 via[B] |= TREQ; eieio();
2344 while ((via[B] & TACK) == 0)
2345 ;
2346}
2347
aacaf9bd 2348static inline void
1da177e4
LT
2349polled_send_byte(volatile unsigned char __iomem *via, int x)
2350{
2351 via[ACR] |= SR_OUT | SR_EXT; eieio();
2352 via[SR] = x; eieio();
2353 polled_handshake(via);
2354}
2355
aacaf9bd 2356static inline int
1da177e4
LT
2357polled_recv_byte(volatile unsigned char __iomem *via)
2358{
2359 int x;
2360
2361 via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
2362 x = via[SR]; eieio();
2363 polled_handshake(via);
2364 x = via[SR]; eieio();
2365 return x;
2366}
2367
aacaf9bd 2368int
1da177e4
LT
2369pmu_polled_request(struct adb_request *req)
2370{
2371 unsigned long flags;
2372 int i, l, c;
2373 volatile unsigned char __iomem *v = via;
2374
2375 req->complete = 1;
2376 c = req->data[0];
2377 l = pmu_data_len[c][0];
2378 if (l >= 0 && req->nbytes != l + 1)
2379 return -EINVAL;
2380
2381 local_irq_save(flags);
2382 while (pmu_state != idle)
2383 pmu_poll();
2384
2385 while ((via[B] & TACK) == 0)
2386 ;
2387 polled_send_byte(v, c);
2388 if (l < 0) {
2389 l = req->nbytes - 1;
2390 polled_send_byte(v, l);
2391 }
2392 for (i = 1; i <= l; ++i)
2393 polled_send_byte(v, req->data[i]);
2394
2395 l = pmu_data_len[c][1];
2396 if (l < 0)
2397 l = polled_recv_byte(v);
2398 for (i = 0; i < l; ++i)
2399 req->reply[i + req->reply_len] = polled_recv_byte(v);
2400
2401 if (req->done)
2402 (*req->done)(req);
2403
2404 local_irq_restore(flags);
2405 return 0;
2406}
1da177e4 2407
f91266ed
JB
2408/* N.B. This doesn't work on the 3400 */
2409void pmu_blink(int n)
2410{
2411 struct adb_request req;
1da177e4 2412
f91266ed 2413 memset(&req, 0, sizeof(req));
1da177e4 2414
f91266ed
JB
2415 for (; n > 0; --n) {
2416 req.nbytes = 4;
2417 req.done = NULL;
2418 req.data[0] = 0xee;
2419 req.data[1] = 4;
2420 req.data[2] = 0;
2421 req.data[3] = 1;
2422 req.reply[0] = ADB_RET_OK;
2423 req.reply_len = 1;
2424 req.reply_expected = 0;
2425 pmu_polled_request(&req);
2426 mdelay(50);
2427 req.nbytes = 4;
2428 req.done = NULL;
2429 req.data[0] = 0xee;
2430 req.data[1] = 4;
2431 req.data[2] = 0;
2432 req.data[3] = 0;
2433 req.reply[0] = ADB_RET_OK;
2434 req.reply_len = 1;
2435 req.reply_expected = 0;
2436 pmu_polled_request(&req);
2437 mdelay(50);
2438 }
2439 mdelay(50);
2440}
2441#endif /* DEBUG_SLEEP */
1da177e4 2442
f91266ed 2443#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
f596575e 2444int pmu_sys_suspended;
1da177e4 2445
3bfffd97 2446static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state)
1da177e4 2447{
ca078bae 2448 if (state.event != PM_EVENT_SUSPEND || pmu_sys_suspended)
1da177e4
LT
2449 return 0;
2450
0094f2cd 2451 /* Suspend PMU event interrupts */\
1da177e4 2452 pmu_suspend();
1da177e4 2453 pmu_sys_suspended = 1;
0094f2cd
BH
2454
2455#ifdef CONFIG_PMAC_BACKLIGHT
2456 /* Tell backlight code not to muck around with the chip anymore */
2457 pmu_backlight_set_sleep(1);
2458#endif
2459
1da177e4
LT
2460 return 0;
2461}
2462
2463static int pmu_sys_resume(struct sys_device *sysdev)
2464{
2465 struct adb_request req;
2466
2467 if (!pmu_sys_suspended)
2468 return 0;
2469
2470 /* Tell PMU we are ready */
2471 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2472 pmu_wait_complete(&req);
2473
0094f2cd
BH
2474#ifdef CONFIG_PMAC_BACKLIGHT
2475 /* Tell backlight code it can use the chip again */
2476 pmu_backlight_set_sleep(0);
2477#endif
1da177e4
LT
2478 /* Resume PMU event interrupts */
2479 pmu_resume();
1da177e4
LT
2480 pmu_sys_suspended = 0;
2481
2482 return 0;
2483}
2484
f91266ed 2485#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT
2486
2487static struct sysdev_class pmu_sysclass = {
af5ca3f4 2488 .name = "pmu",
1da177e4
LT
2489};
2490
2491static struct sys_device device_pmu = {
1da177e4
LT
2492 .cls = &pmu_sysclass,
2493};
2494
2495static struct sysdev_driver driver_pmu = {
f91266ed 2496#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
2497 .suspend = &pmu_sys_suspend,
2498 .resume = &pmu_sys_resume,
f91266ed 2499#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT
2500};
2501
2502static int __init init_pmu_sysfs(void)
2503{
2504 int rc;
2505
2506 rc = sysdev_class_register(&pmu_sysclass);
2507 if (rc) {
2508 printk(KERN_ERR "Failed registering PMU sys class\n");
2509 return -ENODEV;
2510 }
2511 rc = sysdev_register(&device_pmu);
2512 if (rc) {
2513 printk(KERN_ERR "Failed registering PMU sys device\n");
2514 return -ENODEV;
2515 }
2516 rc = sysdev_driver_register(&pmu_sysclass, &driver_pmu);
2517 if (rc) {
2518 printk(KERN_ERR "Failed registering PMU sys driver\n");
2519 return -ENODEV;
2520 }
2521 return 0;
2522}
2523
2524subsys_initcall(init_pmu_sysfs);
2525
2526EXPORT_SYMBOL(pmu_request);
730745a5 2527EXPORT_SYMBOL(pmu_queue_request);
1da177e4
LT
2528EXPORT_SYMBOL(pmu_poll);
2529EXPORT_SYMBOL(pmu_poll_adb);
2530EXPORT_SYMBOL(pmu_wait_complete);
2531EXPORT_SYMBOL(pmu_suspend);
2532EXPORT_SYMBOL(pmu_resume);
2533EXPORT_SYMBOL(pmu_unlock);
620a2459 2534#if defined(CONFIG_PPC32)
1da177e4
LT
2535EXPORT_SYMBOL(pmu_enable_irled);
2536EXPORT_SYMBOL(pmu_battery_count);
2537EXPORT_SYMBOL(pmu_batteries);
2538EXPORT_SYMBOL(pmu_power_flags);
f91266ed 2539#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4 2540