Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * PowerMac G5 SMU driver | |
3 | * | |
4 | * Copyright 2004 J. Mayer <l_indien@magic.fr> | |
5 | * Copyright 2005 Benjamin Herrenschmidt, IBM Corp. | |
6 | * | |
7 | * Released under the term of the GNU GPL v2. | |
8 | */ | |
9 | ||
10 | /* | |
1da177e4 | 11 | * TODO: |
0365ba7f BH |
12 | * - maybe add timeout to commands ? |
13 | * - blocking version of time functions | |
14 | * - polling version of i2c commands (including timer that works with | |
15 | * interrutps off) | |
16 | * - maybe avoid some data copies with i2c by directly using the smu cmd | |
17 | * buffer and a lower level internal interface | |
18 | * - understand SMU -> CPU events and implement reception of them via | |
19 | * the userland interface | |
1da177e4 LT |
20 | */ |
21 | ||
1da177e4 LT |
22 | #include <linux/types.h> |
23 | #include <linux/kernel.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/dmapool.h> | |
26 | #include <linux/bootmem.h> | |
27 | #include <linux/vmalloc.h> | |
28 | #include <linux/highmem.h> | |
29 | #include <linux/jiffies.h> | |
30 | #include <linux/interrupt.h> | |
31 | #include <linux/rtc.h> | |
0365ba7f BH |
32 | #include <linux/completion.h> |
33 | #include <linux/miscdevice.h> | |
34 | #include <linux/delay.h> | |
35 | #include <linux/sysdev.h> | |
36 | #include <linux/poll.h> | |
14cc3e2b | 37 | #include <linux/mutex.h> |
1da177e4 LT |
38 | |
39 | #include <asm/byteorder.h> | |
40 | #include <asm/io.h> | |
41 | #include <asm/prom.h> | |
42 | #include <asm/machdep.h> | |
43 | #include <asm/pmac_feature.h> | |
44 | #include <asm/smu.h> | |
45 | #include <asm/sections.h> | |
46 | #include <asm/abs_addr.h> | |
0365ba7f BH |
47 | #include <asm/uaccess.h> |
48 | #include <asm/of_device.h> | |
49 | ||
183d0202 | 50 | #define VERSION "0.7" |
0365ba7f | 51 | #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp." |
1da177e4 | 52 | |
0365ba7f | 53 | #undef DEBUG_SMU |
1da177e4 LT |
54 | |
55 | #ifdef DEBUG_SMU | |
1beb6a7d | 56 | #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0) |
1da177e4 LT |
57 | #else |
58 | #define DPRINTK(fmt, args...) do { } while (0) | |
59 | #endif | |
60 | ||
61 | /* | |
62 | * This is the command buffer passed to the SMU hardware | |
63 | */ | |
0365ba7f BH |
64 | #define SMU_MAX_DATA 254 |
65 | ||
1da177e4 LT |
66 | struct smu_cmd_buf { |
67 | u8 cmd; | |
68 | u8 length; | |
0365ba7f | 69 | u8 data[SMU_MAX_DATA]; |
1da177e4 LT |
70 | }; |
71 | ||
72 | struct smu_device { | |
73 | spinlock_t lock; | |
74 | struct device_node *of_node; | |
0365ba7f BH |
75 | struct of_device *of_dev; |
76 | int doorbell; /* doorbell gpio */ | |
1da177e4 | 77 | u32 __iomem *db_buf; /* doorbell buffer */ |
0365ba7f BH |
78 | int db_irq; |
79 | int msg; | |
80 | int msg_irq; | |
1da177e4 LT |
81 | struct smu_cmd_buf *cmd_buf; /* command buffer virtual */ |
82 | u32 cmd_buf_abs; /* command buffer absolute */ | |
0365ba7f BH |
83 | struct list_head cmd_list; |
84 | struct smu_cmd *cmd_cur; /* pending command */ | |
85 | struct list_head cmd_i2c_list; | |
86 | struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */ | |
87 | struct timer_list i2c_timer; | |
1da177e4 LT |
88 | }; |
89 | ||
90 | /* | |
91 | * I don't think there will ever be more than one SMU, so | |
92 | * for now, just hard code that | |
93 | */ | |
94 | static struct smu_device *smu; | |
14cc3e2b | 95 | static DEFINE_MUTEX(smu_part_access); |
0365ba7f | 96 | |
730745a5 BH |
97 | static void smu_i2c_retry(unsigned long data); |
98 | ||
1da177e4 | 99 | /* |
0365ba7f | 100 | * SMU driver low level stuff |
1da177e4 | 101 | */ |
1da177e4 | 102 | |
0365ba7f | 103 | static void smu_start_cmd(void) |
1da177e4 | 104 | { |
0365ba7f BH |
105 | unsigned long faddr, fend; |
106 | struct smu_cmd *cmd; | |
1da177e4 | 107 | |
0365ba7f BH |
108 | if (list_empty(&smu->cmd_list)) |
109 | return; | |
110 | ||
111 | /* Fetch first command in queue */ | |
112 | cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link); | |
113 | smu->cmd_cur = cmd; | |
114 | list_del(&cmd->link); | |
115 | ||
116 | DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd, | |
117 | cmd->data_len); | |
183d0202 | 118 | DPRINTK("SMU: data buffer: %02x %02x %02x %02x %02x %02x %02x %02x\n", |
0365ba7f | 119 | ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1], |
183d0202 BH |
120 | ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3], |
121 | ((u8 *)cmd->data_buf)[4], ((u8 *)cmd->data_buf)[5], | |
122 | ((u8 *)cmd->data_buf)[6], ((u8 *)cmd->data_buf)[7]); | |
0365ba7f BH |
123 | |
124 | /* Fill the SMU command buffer */ | |
125 | smu->cmd_buf->cmd = cmd->cmd; | |
126 | smu->cmd_buf->length = cmd->data_len; | |
127 | memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len); | |
128 | ||
129 | /* Flush command and data to RAM */ | |
130 | faddr = (unsigned long)smu->cmd_buf; | |
131 | fend = faddr + smu->cmd_buf->length + 2; | |
132 | flush_inval_dcache_range(faddr, fend); | |
133 | ||
134 | /* This isn't exactly a DMA mapping here, I suspect | |
1da177e4 LT |
135 | * the SMU is actually communicating with us via i2c to the |
136 | * northbridge or the CPU to access RAM. | |
137 | */ | |
0365ba7f | 138 | writel(smu->cmd_buf_abs, smu->db_buf); |
1da177e4 LT |
139 | |
140 | /* Ring the SMU doorbell */ | |
0365ba7f | 141 | pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4); |
1da177e4 LT |
142 | } |
143 | ||
0365ba7f BH |
144 | |
145 | static irqreturn_t smu_db_intr(int irq, void *arg, struct pt_regs *regs) | |
1da177e4 | 146 | { |
0365ba7f BH |
147 | unsigned long flags; |
148 | struct smu_cmd *cmd; | |
149 | void (*done)(struct smu_cmd *cmd, void *misc) = NULL; | |
150 | void *misc = NULL; | |
151 | u8 gpio; | |
152 | int rc = 0; | |
1da177e4 | 153 | |
0365ba7f BH |
154 | /* SMU completed the command, well, we hope, let's make sure |
155 | * of it | |
156 | */ | |
157 | spin_lock_irqsave(&smu->lock, flags); | |
1da177e4 | 158 | |
0365ba7f | 159 | gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); |
a44fe13e BH |
160 | if ((gpio & 7) != 7) { |
161 | spin_unlock_irqrestore(&smu->lock, flags); | |
0365ba7f | 162 | return IRQ_HANDLED; |
a44fe13e | 163 | } |
0365ba7f BH |
164 | |
165 | cmd = smu->cmd_cur; | |
166 | smu->cmd_cur = NULL; | |
167 | if (cmd == NULL) | |
168 | goto bail; | |
169 | ||
170 | if (rc == 0) { | |
171 | unsigned long faddr; | |
172 | int reply_len; | |
173 | u8 ack; | |
174 | ||
175 | /* CPU might have brought back the cache line, so we need | |
176 | * to flush again before peeking at the SMU response. We | |
177 | * flush the entire buffer for now as we haven't read the | |
178 | * reply lenght (it's only 2 cache lines anyway) | |
179 | */ | |
180 | faddr = (unsigned long)smu->cmd_buf; | |
181 | flush_inval_dcache_range(faddr, faddr + 256); | |
182 | ||
183 | /* Now check ack */ | |
184 | ack = (~cmd->cmd) & 0xff; | |
185 | if (ack != smu->cmd_buf->cmd) { | |
186 | DPRINTK("SMU: incorrect ack, want %x got %x\n", | |
187 | ack, smu->cmd_buf->cmd); | |
188 | rc = -EIO; | |
189 | } | |
190 | reply_len = rc == 0 ? smu->cmd_buf->length : 0; | |
191 | DPRINTK("SMU: reply len: %d\n", reply_len); | |
192 | if (reply_len > cmd->reply_len) { | |
193 | printk(KERN_WARNING "SMU: reply buffer too small," | |
194 | "got %d bytes for a %d bytes buffer\n", | |
195 | reply_len, cmd->reply_len); | |
196 | reply_len = cmd->reply_len; | |
197 | } | |
198 | cmd->reply_len = reply_len; | |
199 | if (cmd->reply_buf && reply_len) | |
200 | memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len); | |
201 | } | |
202 | ||
203 | /* Now complete the command. Write status last in order as we lost | |
204 | * ownership of the command structure as soon as it's no longer -1 | |
205 | */ | |
206 | done = cmd->done; | |
207 | misc = cmd->misc; | |
208 | mb(); | |
209 | cmd->status = rc; | |
210 | bail: | |
211 | /* Start next command if any */ | |
212 | smu_start_cmd(); | |
213 | spin_unlock_irqrestore(&smu->lock, flags); | |
214 | ||
215 | /* Call command completion handler if any */ | |
216 | if (done) | |
217 | done(cmd, misc); | |
218 | ||
219 | /* It's an edge interrupt, nothing to do */ | |
220 | return IRQ_HANDLED; | |
1da177e4 LT |
221 | } |
222 | ||
0365ba7f BH |
223 | |
224 | static irqreturn_t smu_msg_intr(int irq, void *arg, struct pt_regs *regs) | |
1da177e4 | 225 | { |
0365ba7f BH |
226 | /* I don't quite know what to do with this one, we seem to never |
227 | * receive it, so I suspect we have to arm it someway in the SMU | |
228 | * to start getting events that way. | |
229 | */ | |
230 | ||
231 | printk(KERN_INFO "SMU: message interrupt !\n"); | |
1da177e4 | 232 | |
0365ba7f BH |
233 | /* It's an edge interrupt, nothing to do */ |
234 | return IRQ_HANDLED; | |
235 | } | |
1da177e4 | 236 | |
1da177e4 | 237 | |
0365ba7f BH |
238 | /* |
239 | * Queued command management. | |
240 | * | |
241 | */ | |
1da177e4 | 242 | |
0365ba7f BH |
243 | int smu_queue_cmd(struct smu_cmd *cmd) |
244 | { | |
245 | unsigned long flags; | |
1da177e4 | 246 | |
0365ba7f BH |
247 | if (smu == NULL) |
248 | return -ENODEV; | |
249 | if (cmd->data_len > SMU_MAX_DATA || | |
250 | cmd->reply_len > SMU_MAX_DATA) | |
251 | return -EINVAL; | |
252 | ||
253 | cmd->status = 1; | |
254 | spin_lock_irqsave(&smu->lock, flags); | |
255 | list_add_tail(&cmd->link, &smu->cmd_list); | |
256 | if (smu->cmd_cur == NULL) | |
257 | smu_start_cmd(); | |
258 | spin_unlock_irqrestore(&smu->lock, flags); | |
259 | ||
260 | return 0; | |
1da177e4 | 261 | } |
0365ba7f | 262 | EXPORT_SYMBOL(smu_queue_cmd); |
1da177e4 | 263 | |
0365ba7f BH |
264 | |
265 | int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command, | |
266 | unsigned int data_len, | |
267 | void (*done)(struct smu_cmd *cmd, void *misc), | |
268 | void *misc, ...) | |
1da177e4 | 269 | { |
0365ba7f BH |
270 | struct smu_cmd *cmd = &scmd->cmd; |
271 | va_list list; | |
272 | int i; | |
273 | ||
274 | if (data_len > sizeof(scmd->buffer)) | |
275 | return -EINVAL; | |
276 | ||
277 | memset(scmd, 0, sizeof(*scmd)); | |
278 | cmd->cmd = command; | |
279 | cmd->data_len = data_len; | |
280 | cmd->data_buf = scmd->buffer; | |
281 | cmd->reply_len = sizeof(scmd->buffer); | |
282 | cmd->reply_buf = scmd->buffer; | |
283 | cmd->done = done; | |
284 | cmd->misc = misc; | |
285 | ||
286 | va_start(list, misc); | |
287 | for (i = 0; i < data_len; ++i) | |
288 | scmd->buffer[i] = (u8)va_arg(list, int); | |
289 | va_end(list); | |
290 | ||
291 | return smu_queue_cmd(cmd); | |
1da177e4 | 292 | } |
0365ba7f | 293 | EXPORT_SYMBOL(smu_queue_simple); |
1da177e4 | 294 | |
0365ba7f BH |
295 | |
296 | void smu_poll(void) | |
1da177e4 | 297 | { |
0365ba7f BH |
298 | u8 gpio; |
299 | ||
300 | if (smu == NULL) | |
301 | return; | |
302 | ||
303 | gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); | |
304 | if ((gpio & 7) == 7) | |
305 | smu_db_intr(smu->db_irq, smu, NULL); | |
1da177e4 | 306 | } |
0365ba7f BH |
307 | EXPORT_SYMBOL(smu_poll); |
308 | ||
1da177e4 | 309 | |
0365ba7f | 310 | void smu_done_complete(struct smu_cmd *cmd, void *misc) |
1da177e4 | 311 | { |
0365ba7f BH |
312 | struct completion *comp = misc; |
313 | ||
314 | complete(comp); | |
1da177e4 | 315 | } |
0365ba7f BH |
316 | EXPORT_SYMBOL(smu_done_complete); |
317 | ||
1da177e4 | 318 | |
0365ba7f | 319 | void smu_spinwait_cmd(struct smu_cmd *cmd) |
1da177e4 | 320 | { |
0365ba7f BH |
321 | while(cmd->status == 1) |
322 | smu_poll(); | |
323 | } | |
324 | EXPORT_SYMBOL(smu_spinwait_cmd); | |
325 | ||
326 | ||
327 | /* RTC low level commands */ | |
328 | static inline int bcd2hex (int n) | |
329 | { | |
330 | return (((n & 0xf0) >> 4) * 10) + (n & 0xf); | |
1da177e4 LT |
331 | } |
332 | ||
0365ba7f BH |
333 | |
334 | static inline int hex2bcd (int n) | |
1da177e4 | 335 | { |
0365ba7f | 336 | return ((n / 10) << 4) + (n % 10); |
1da177e4 | 337 | } |
0365ba7f | 338 | |
1da177e4 LT |
339 | |
340 | static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf, | |
341 | struct rtc_time *time) | |
342 | { | |
343 | cmd_buf->cmd = 0x8e; | |
344 | cmd_buf->length = 8; | |
345 | cmd_buf->data[0] = 0x80; | |
346 | cmd_buf->data[1] = hex2bcd(time->tm_sec); | |
347 | cmd_buf->data[2] = hex2bcd(time->tm_min); | |
348 | cmd_buf->data[3] = hex2bcd(time->tm_hour); | |
349 | cmd_buf->data[4] = time->tm_wday; | |
350 | cmd_buf->data[5] = hex2bcd(time->tm_mday); | |
351 | cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1; | |
352 | cmd_buf->data[7] = hex2bcd(time->tm_year - 100); | |
353 | } | |
354 | ||
1da177e4 | 355 | |
0365ba7f | 356 | int smu_get_rtc_time(struct rtc_time *time, int spinwait) |
1da177e4 | 357 | { |
0365ba7f | 358 | struct smu_simple_cmd cmd; |
1da177e4 LT |
359 | int rc; |
360 | ||
361 | if (smu == NULL) | |
362 | return -ENODEV; | |
363 | ||
364 | memset(time, 0, sizeof(struct rtc_time)); | |
0365ba7f BH |
365 | rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL, |
366 | SMU_CMD_RTC_GET_DATETIME); | |
367 | if (rc) | |
368 | return rc; | |
369 | smu_spinwait_simple(&cmd); | |
1da177e4 | 370 | |
0365ba7f BH |
371 | time->tm_sec = bcd2hex(cmd.buffer[0]); |
372 | time->tm_min = bcd2hex(cmd.buffer[1]); | |
373 | time->tm_hour = bcd2hex(cmd.buffer[2]); | |
374 | time->tm_wday = bcd2hex(cmd.buffer[3]); | |
375 | time->tm_mday = bcd2hex(cmd.buffer[4]); | |
376 | time->tm_mon = bcd2hex(cmd.buffer[5]) - 1; | |
377 | time->tm_year = bcd2hex(cmd.buffer[6]) + 100; | |
378 | ||
379 | return 0; | |
1da177e4 LT |
380 | } |
381 | ||
0365ba7f BH |
382 | |
383 | int smu_set_rtc_time(struct rtc_time *time, int spinwait) | |
1da177e4 | 384 | { |
0365ba7f | 385 | struct smu_simple_cmd cmd; |
1da177e4 LT |
386 | int rc; |
387 | ||
388 | if (smu == NULL) | |
389 | return -ENODEV; | |
390 | ||
0365ba7f BH |
391 | rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL, |
392 | SMU_CMD_RTC_SET_DATETIME, | |
393 | hex2bcd(time->tm_sec), | |
394 | hex2bcd(time->tm_min), | |
395 | hex2bcd(time->tm_hour), | |
396 | time->tm_wday, | |
397 | hex2bcd(time->tm_mday), | |
398 | hex2bcd(time->tm_mon) + 1, | |
399 | hex2bcd(time->tm_year - 100)); | |
400 | if (rc) | |
401 | return rc; | |
402 | smu_spinwait_simple(&cmd); | |
1da177e4 | 403 | |
0365ba7f | 404 | return 0; |
1da177e4 LT |
405 | } |
406 | ||
0365ba7f | 407 | |
1da177e4 LT |
408 | void smu_shutdown(void) |
409 | { | |
0365ba7f | 410 | struct smu_simple_cmd cmd; |
1da177e4 LT |
411 | |
412 | if (smu == NULL) | |
413 | return; | |
414 | ||
0365ba7f BH |
415 | if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL, |
416 | 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0)) | |
417 | return; | |
418 | smu_spinwait_simple(&cmd); | |
1da177e4 LT |
419 | for (;;) |
420 | ; | |
1da177e4 LT |
421 | } |
422 | ||
0365ba7f | 423 | |
1da177e4 LT |
424 | void smu_restart(void) |
425 | { | |
0365ba7f | 426 | struct smu_simple_cmd cmd; |
1da177e4 LT |
427 | |
428 | if (smu == NULL) | |
429 | return; | |
430 | ||
0365ba7f BH |
431 | if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL, |
432 | 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0)) | |
433 | return; | |
434 | smu_spinwait_simple(&cmd); | |
1da177e4 LT |
435 | for (;;) |
436 | ; | |
1da177e4 LT |
437 | } |
438 | ||
0365ba7f | 439 | |
1da177e4 LT |
440 | int smu_present(void) |
441 | { | |
442 | return smu != NULL; | |
443 | } | |
0365ba7f | 444 | EXPORT_SYMBOL(smu_present); |
1da177e4 LT |
445 | |
446 | ||
183d0202 | 447 | int __init smu_init (void) |
1da177e4 LT |
448 | { |
449 | struct device_node *np; | |
450 | u32 *data; | |
451 | ||
452 | np = of_find_node_by_type(NULL, "smu"); | |
453 | if (np == NULL) | |
454 | return -ENODEV; | |
455 | ||
0365ba7f BH |
456 | printk(KERN_INFO "SMU driver %s %s\n", VERSION, AUTHOR); |
457 | ||
1da177e4 LT |
458 | if (smu_cmdbuf_abs == 0) { |
459 | printk(KERN_ERR "SMU: Command buffer not allocated !\n"); | |
460 | return -EINVAL; | |
461 | } | |
462 | ||
463 | smu = alloc_bootmem(sizeof(struct smu_device)); | |
464 | if (smu == NULL) | |
465 | return -ENOMEM; | |
466 | memset(smu, 0, sizeof(*smu)); | |
467 | ||
468 | spin_lock_init(&smu->lock); | |
0365ba7f BH |
469 | INIT_LIST_HEAD(&smu->cmd_list); |
470 | INIT_LIST_HEAD(&smu->cmd_i2c_list); | |
1da177e4 | 471 | smu->of_node = np; |
0365ba7f BH |
472 | smu->db_irq = NO_IRQ; |
473 | smu->msg_irq = NO_IRQ; | |
0365ba7f | 474 | |
1da177e4 LT |
475 | /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a |
476 | * 32 bits value safely | |
477 | */ | |
478 | smu->cmd_buf_abs = (u32)smu_cmdbuf_abs; | |
479 | smu->cmd_buf = (struct smu_cmd_buf *)abs_to_virt(smu_cmdbuf_abs); | |
480 | ||
481 | np = of_find_node_by_name(NULL, "smu-doorbell"); | |
482 | if (np == NULL) { | |
483 | printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n"); | |
484 | goto fail; | |
485 | } | |
486 | data = (u32 *)get_property(np, "reg", NULL); | |
1da177e4 | 487 | if (data == NULL) { |
0365ba7f | 488 | of_node_put(np); |
1da177e4 LT |
489 | printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n"); |
490 | goto fail; | |
491 | } | |
492 | ||
493 | /* Current setup has one doorbell GPIO that does both doorbell | |
494 | * and ack. GPIOs are at 0x50, best would be to find that out | |
495 | * in the device-tree though. | |
496 | */ | |
0365ba7f BH |
497 | smu->doorbell = *data; |
498 | if (smu->doorbell < 0x50) | |
499 | smu->doorbell += 0x50; | |
0ebfff14 | 500 | smu->db_irq = irq_of_parse_and_map(np, 0); |
0365ba7f BH |
501 | |
502 | of_node_put(np); | |
503 | ||
504 | /* Now look for the smu-interrupt GPIO */ | |
505 | do { | |
506 | np = of_find_node_by_name(NULL, "smu-interrupt"); | |
507 | if (np == NULL) | |
508 | break; | |
509 | data = (u32 *)get_property(np, "reg", NULL); | |
510 | if (data == NULL) { | |
511 | of_node_put(np); | |
512 | break; | |
513 | } | |
514 | smu->msg = *data; | |
515 | if (smu->msg < 0x50) | |
516 | smu->msg += 0x50; | |
0ebfff14 | 517 | smu->msg_irq = irq_of_parse_and_map(np, 0); |
0365ba7f BH |
518 | of_node_put(np); |
519 | } while(0); | |
1da177e4 LT |
520 | |
521 | /* Doorbell buffer is currently hard-coded, I didn't find a proper | |
522 | * device-tree entry giving the address. Best would probably to use | |
523 | * an offset for K2 base though, but let's do it that way for now. | |
524 | */ | |
525 | smu->db_buf = ioremap(0x8000860c, 0x1000); | |
526 | if (smu->db_buf == NULL) { | |
527 | printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n"); | |
528 | goto fail; | |
529 | } | |
530 | ||
531 | sys_ctrler = SYS_CTRLER_SMU; | |
532 | return 0; | |
533 | ||
534 | fail: | |
535 | smu = NULL; | |
536 | return -ENXIO; | |
537 | ||
538 | } | |
0365ba7f BH |
539 | |
540 | ||
541 | static int smu_late_init(void) | |
542 | { | |
543 | if (!smu) | |
544 | return 0; | |
545 | ||
730745a5 BH |
546 | init_timer(&smu->i2c_timer); |
547 | smu->i2c_timer.function = smu_i2c_retry; | |
548 | smu->i2c_timer.data = (unsigned long)smu; | |
549 | ||
0365ba7f BH |
550 | /* |
551 | * Try to request the interrupts | |
552 | */ | |
553 | ||
554 | if (smu->db_irq != NO_IRQ) { | |
555 | if (request_irq(smu->db_irq, smu_db_intr, | |
dace1453 | 556 | IRQF_SHARED, "SMU doorbell", smu) < 0) { |
0365ba7f BH |
557 | printk(KERN_WARNING "SMU: can't " |
558 | "request interrupt %d\n", | |
559 | smu->db_irq); | |
560 | smu->db_irq = NO_IRQ; | |
561 | } | |
562 | } | |
563 | ||
564 | if (smu->msg_irq != NO_IRQ) { | |
565 | if (request_irq(smu->msg_irq, smu_msg_intr, | |
dace1453 | 566 | IRQF_SHARED, "SMU message", smu) < 0) { |
0365ba7f BH |
567 | printk(KERN_WARNING "SMU: can't " |
568 | "request interrupt %d\n", | |
569 | smu->msg_irq); | |
570 | smu->msg_irq = NO_IRQ; | |
571 | } | |
572 | } | |
573 | ||
574 | return 0; | |
575 | } | |
730745a5 BH |
576 | /* This has to be before arch_initcall as the low i2c stuff relies on the |
577 | * above having been done before we reach arch_initcalls | |
578 | */ | |
579 | core_initcall(smu_late_init); | |
0365ba7f BH |
580 | |
581 | /* | |
582 | * sysfs visibility | |
583 | */ | |
584 | ||
585 | static void smu_expose_childs(void *unused) | |
586 | { | |
a28d3af2 BH |
587 | struct device_node *np; |
588 | ||
589 | for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;) | |
75722d39 | 590 | if (device_is_compatible(np, "smu-sensors")) |
730745a5 BH |
591 | of_platform_device_create(np, "smu-sensors", |
592 | &smu->of_dev->dev); | |
0365ba7f BH |
593 | } |
594 | ||
595 | static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs, NULL); | |
596 | ||
597 | static int smu_platform_probe(struct of_device* dev, | |
598 | const struct of_device_id *match) | |
599 | { | |
600 | if (!smu) | |
601 | return -ENODEV; | |
602 | smu->of_dev = dev; | |
603 | ||
604 | /* | |
605 | * Ok, we are matched, now expose all i2c busses. We have to defer | |
606 | * that unfortunately or it would deadlock inside the device model | |
607 | */ | |
608 | schedule_work(&smu_expose_childs_work); | |
609 | ||
610 | return 0; | |
611 | } | |
612 | ||
613 | static struct of_device_id smu_platform_match[] = | |
614 | { | |
615 | { | |
616 | .type = "smu", | |
617 | }, | |
618 | {}, | |
619 | }; | |
620 | ||
621 | static struct of_platform_driver smu_of_platform_driver = | |
622 | { | |
623 | .name = "smu", | |
624 | .match_table = smu_platform_match, | |
625 | .probe = smu_platform_probe, | |
626 | }; | |
627 | ||
628 | static int __init smu_init_sysfs(void) | |
629 | { | |
0365ba7f BH |
630 | /* |
631 | * Due to sysfs bogosity, a sysdev is not a real device, so | |
632 | * we should in fact create both if we want sysdev semantics | |
633 | * for power management. | |
634 | * For now, we don't power manage machines with an SMU chip, | |
635 | * I'm a bit too far from figuring out how that works with those | |
636 | * new chipsets, but that will come back and bite us | |
637 | */ | |
6ea671a1 | 638 | of_register_driver(&smu_of_platform_driver); |
0365ba7f BH |
639 | return 0; |
640 | } | |
641 | ||
642 | device_initcall(smu_init_sysfs); | |
643 | ||
644 | struct of_device *smu_get_ofdev(void) | |
645 | { | |
646 | if (!smu) | |
647 | return NULL; | |
648 | return smu->of_dev; | |
649 | } | |
650 | ||
651 | EXPORT_SYMBOL_GPL(smu_get_ofdev); | |
652 | ||
653 | /* | |
654 | * i2c interface | |
655 | */ | |
656 | ||
657 | static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail) | |
658 | { | |
659 | void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done; | |
660 | void *misc = cmd->misc; | |
661 | unsigned long flags; | |
662 | ||
663 | /* Check for read case */ | |
664 | if (!fail && cmd->read) { | |
665 | if (cmd->pdata[0] < 1) | |
666 | fail = 1; | |
667 | else | |
668 | memcpy(cmd->info.data, &cmd->pdata[1], | |
669 | cmd->info.datalen); | |
670 | } | |
671 | ||
672 | DPRINTK("SMU: completing, success: %d\n", !fail); | |
673 | ||
674 | /* Update status and mark no pending i2c command with lock | |
675 | * held so nobody comes in while we dequeue an eventual | |
676 | * pending next i2c command | |
677 | */ | |
678 | spin_lock_irqsave(&smu->lock, flags); | |
679 | smu->cmd_i2c_cur = NULL; | |
680 | wmb(); | |
681 | cmd->status = fail ? -EIO : 0; | |
682 | ||
683 | /* Is there another i2c command waiting ? */ | |
684 | if (!list_empty(&smu->cmd_i2c_list)) { | |
685 | struct smu_i2c_cmd *newcmd; | |
686 | ||
687 | /* Fetch it, new current, remove from list */ | |
688 | newcmd = list_entry(smu->cmd_i2c_list.next, | |
689 | struct smu_i2c_cmd, link); | |
690 | smu->cmd_i2c_cur = newcmd; | |
691 | list_del(&cmd->link); | |
692 | ||
693 | /* Queue with low level smu */ | |
694 | list_add_tail(&cmd->scmd.link, &smu->cmd_list); | |
695 | if (smu->cmd_cur == NULL) | |
696 | smu_start_cmd(); | |
697 | } | |
698 | spin_unlock_irqrestore(&smu->lock, flags); | |
699 | ||
700 | /* Call command completion handler if any */ | |
701 | if (done) | |
702 | done(cmd, misc); | |
703 | ||
704 | } | |
705 | ||
706 | ||
707 | static void smu_i2c_retry(unsigned long data) | |
708 | { | |
730745a5 | 709 | struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur; |
0365ba7f BH |
710 | |
711 | DPRINTK("SMU: i2c failure, requeuing...\n"); | |
712 | ||
713 | /* requeue command simply by resetting reply_len */ | |
714 | cmd->pdata[0] = 0xff; | |
730745a5 | 715 | cmd->scmd.reply_len = sizeof(cmd->pdata); |
0365ba7f BH |
716 | smu_queue_cmd(&cmd->scmd); |
717 | } | |
718 | ||
719 | ||
720 | static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc) | |
721 | { | |
722 | struct smu_i2c_cmd *cmd = misc; | |
723 | int fail = 0; | |
724 | ||
725 | DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n", | |
726 | cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len); | |
727 | ||
728 | /* Check for possible status */ | |
729 | if (scmd->status < 0) | |
730 | fail = 1; | |
731 | else if (cmd->read) { | |
732 | if (cmd->stage == 0) | |
733 | fail = cmd->pdata[0] != 0; | |
734 | else | |
735 | fail = cmd->pdata[0] >= 0x80; | |
736 | } else { | |
737 | fail = cmd->pdata[0] != 0; | |
738 | } | |
739 | ||
740 | /* Handle failures by requeuing command, after 5ms interval | |
741 | */ | |
742 | if (fail && --cmd->retries > 0) { | |
743 | DPRINTK("SMU: i2c failure, starting timer...\n"); | |
730745a5 BH |
744 | BUG_ON(cmd != smu->cmd_i2c_cur); |
745 | mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5)); | |
0365ba7f BH |
746 | return; |
747 | } | |
748 | ||
749 | /* If failure or stage 1, command is complete */ | |
750 | if (fail || cmd->stage != 0) { | |
751 | smu_i2c_complete_command(cmd, fail); | |
752 | return; | |
753 | } | |
754 | ||
755 | DPRINTK("SMU: going to stage 1\n"); | |
756 | ||
757 | /* Ok, initial command complete, now poll status */ | |
758 | scmd->reply_buf = cmd->pdata; | |
730745a5 | 759 | scmd->reply_len = sizeof(cmd->pdata); |
0365ba7f BH |
760 | scmd->data_buf = cmd->pdata; |
761 | scmd->data_len = 1; | |
762 | cmd->pdata[0] = 0; | |
763 | cmd->stage = 1; | |
764 | cmd->retries = 20; | |
765 | smu_queue_cmd(scmd); | |
766 | } | |
767 | ||
768 | ||
769 | int smu_queue_i2c(struct smu_i2c_cmd *cmd) | |
770 | { | |
771 | unsigned long flags; | |
772 | ||
773 | if (smu == NULL) | |
774 | return -ENODEV; | |
775 | ||
776 | /* Fill most fields of scmd */ | |
777 | cmd->scmd.cmd = SMU_CMD_I2C_COMMAND; | |
778 | cmd->scmd.done = smu_i2c_low_completion; | |
779 | cmd->scmd.misc = cmd; | |
780 | cmd->scmd.reply_buf = cmd->pdata; | |
730745a5 | 781 | cmd->scmd.reply_len = sizeof(cmd->pdata); |
0365ba7f BH |
782 | cmd->scmd.data_buf = (u8 *)(char *)&cmd->info; |
783 | cmd->scmd.status = 1; | |
784 | cmd->stage = 0; | |
785 | cmd->pdata[0] = 0xff; | |
786 | cmd->retries = 20; | |
787 | cmd->status = 1; | |
788 | ||
789 | /* Check transfer type, sanitize some "info" fields | |
790 | * based on transfer type and do more checking | |
791 | */ | |
792 | cmd->info.caddr = cmd->info.devaddr; | |
793 | cmd->read = cmd->info.devaddr & 0x01; | |
794 | switch(cmd->info.type) { | |
795 | case SMU_I2C_TRANSFER_SIMPLE: | |
796 | memset(&cmd->info.sublen, 0, 4); | |
797 | break; | |
798 | case SMU_I2C_TRANSFER_COMBINED: | |
799 | cmd->info.devaddr &= 0xfe; | |
800 | case SMU_I2C_TRANSFER_STDSUB: | |
801 | if (cmd->info.sublen > 3) | |
802 | return -EINVAL; | |
803 | break; | |
804 | default: | |
805 | return -EINVAL; | |
806 | } | |
807 | ||
808 | /* Finish setting up command based on transfer direction | |
809 | */ | |
810 | if (cmd->read) { | |
811 | if (cmd->info.datalen > SMU_I2C_READ_MAX) | |
812 | return -EINVAL; | |
813 | memset(cmd->info.data, 0xff, cmd->info.datalen); | |
814 | cmd->scmd.data_len = 9; | |
815 | } else { | |
816 | if (cmd->info.datalen > SMU_I2C_WRITE_MAX) | |
817 | return -EINVAL; | |
818 | cmd->scmd.data_len = 9 + cmd->info.datalen; | |
819 | } | |
820 | ||
821 | DPRINTK("SMU: i2c enqueuing command\n"); | |
822 | DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n", | |
823 | cmd->read ? "read" : "write", cmd->info.datalen, | |
824 | cmd->info.bus, cmd->info.caddr, | |
825 | cmd->info.subaddr[0], cmd->info.type); | |
826 | ||
827 | ||
828 | /* Enqueue command in i2c list, and if empty, enqueue also in | |
829 | * main command list | |
830 | */ | |
831 | spin_lock_irqsave(&smu->lock, flags); | |
832 | if (smu->cmd_i2c_cur == NULL) { | |
833 | smu->cmd_i2c_cur = cmd; | |
834 | list_add_tail(&cmd->scmd.link, &smu->cmd_list); | |
835 | if (smu->cmd_cur == NULL) | |
836 | smu_start_cmd(); | |
837 | } else | |
838 | list_add_tail(&cmd->link, &smu->cmd_i2c_list); | |
839 | spin_unlock_irqrestore(&smu->lock, flags); | |
840 | ||
841 | return 0; | |
842 | } | |
843 | ||
183d0202 BH |
844 | /* |
845 | * Handling of "partitions" | |
846 | */ | |
847 | ||
848 | static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len) | |
849 | { | |
850 | DECLARE_COMPLETION(comp); | |
851 | unsigned int chunk; | |
852 | struct smu_cmd cmd; | |
853 | int rc; | |
854 | u8 params[8]; | |
855 | ||
856 | /* We currently use a chunk size of 0xe. We could check the | |
857 | * SMU firmware version and use bigger sizes though | |
858 | */ | |
859 | chunk = 0xe; | |
860 | ||
861 | while (len) { | |
862 | unsigned int clen = min(len, chunk); | |
863 | ||
864 | cmd.cmd = SMU_CMD_MISC_ee_COMMAND; | |
865 | cmd.data_len = 7; | |
866 | cmd.data_buf = params; | |
867 | cmd.reply_len = chunk; | |
868 | cmd.reply_buf = dest; | |
869 | cmd.done = smu_done_complete; | |
870 | cmd.misc = ∁ | |
871 | params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC; | |
872 | params[1] = 0x4; | |
873 | *((u32 *)¶ms[2]) = addr; | |
874 | params[6] = clen; | |
875 | ||
876 | rc = smu_queue_cmd(&cmd); | |
877 | if (rc) | |
878 | return rc; | |
879 | wait_for_completion(&comp); | |
880 | if (cmd.status != 0) | |
881 | return rc; | |
882 | if (cmd.reply_len != clen) { | |
883 | printk(KERN_DEBUG "SMU: short read in " | |
884 | "smu_read_datablock, got: %d, want: %d\n", | |
885 | cmd.reply_len, clen); | |
886 | return -EIO; | |
887 | } | |
888 | len -= clen; | |
889 | addr += clen; | |
890 | dest += clen; | |
891 | } | |
892 | return 0; | |
893 | } | |
894 | ||
895 | static struct smu_sdbp_header *smu_create_sdb_partition(int id) | |
896 | { | |
897 | DECLARE_COMPLETION(comp); | |
898 | struct smu_simple_cmd cmd; | |
899 | unsigned int addr, len, tlen; | |
900 | struct smu_sdbp_header *hdr; | |
901 | struct property *prop; | |
902 | ||
903 | /* First query the partition info */ | |
1beb6a7d | 904 | DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq); |
183d0202 BH |
905 | smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2, |
906 | smu_done_complete, &comp, | |
907 | SMU_CMD_PARTITION_LATEST, id); | |
908 | wait_for_completion(&comp); | |
1beb6a7d BH |
909 | DPRINTK("SMU: done, status: %d, reply_len: %d\n", |
910 | cmd.cmd.status, cmd.cmd.reply_len); | |
183d0202 BH |
911 | |
912 | /* Partition doesn't exist (or other error) */ | |
913 | if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6) | |
914 | return NULL; | |
915 | ||
916 | /* Fetch address and length from reply */ | |
917 | addr = *((u16 *)cmd.buffer); | |
918 | len = cmd.buffer[3] << 2; | |
919 | /* Calucluate total length to allocate, including the 17 bytes | |
920 | * for "sdb-partition-XX" that we append at the end of the buffer | |
921 | */ | |
922 | tlen = sizeof(struct property) + len + 18; | |
923 | ||
924 | prop = kcalloc(tlen, 1, GFP_KERNEL); | |
925 | if (prop == NULL) | |
926 | return NULL; | |
927 | hdr = (struct smu_sdbp_header *)(prop + 1); | |
928 | prop->name = ((char *)prop) + tlen - 18; | |
929 | sprintf(prop->name, "sdb-partition-%02x", id); | |
930 | prop->length = len; | |
931 | prop->value = (unsigned char *)hdr; | |
932 | prop->next = NULL; | |
933 | ||
934 | /* Read the datablock */ | |
935 | if (smu_read_datablock((u8 *)hdr, addr, len)) { | |
936 | printk(KERN_DEBUG "SMU: datablock read failed while reading " | |
937 | "partition %02x !\n", id); | |
938 | goto failure; | |
939 | } | |
940 | ||
941 | /* Got it, check a few things and create the property */ | |
942 | if (hdr->id != id) { | |
943 | printk(KERN_DEBUG "SMU: Reading partition %02x and got " | |
944 | "%02x !\n", id, hdr->id); | |
945 | goto failure; | |
946 | } | |
947 | if (prom_add_property(smu->of_node, prop)) { | |
948 | printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x " | |
949 | "property !\n", id); | |
950 | goto failure; | |
951 | } | |
952 | ||
953 | return hdr; | |
954 | failure: | |
955 | kfree(prop); | |
956 | return NULL; | |
957 | } | |
958 | ||
959 | /* Note: Only allowed to return error code in pointers (using ERR_PTR) | |
960 | * when interruptible is 1 | |
961 | */ | |
962 | struct smu_sdbp_header *__smu_get_sdb_partition(int id, unsigned int *size, | |
963 | int interruptible) | |
4350147a BH |
964 | { |
965 | char pname[32]; | |
183d0202 | 966 | struct smu_sdbp_header *part; |
4350147a BH |
967 | |
968 | if (!smu) | |
969 | return NULL; | |
970 | ||
971 | sprintf(pname, "sdb-partition-%02x", id); | |
183d0202 | 972 | |
1beb6a7d BH |
973 | DPRINTK("smu_get_sdb_partition(%02x)\n", id); |
974 | ||
183d0202 BH |
975 | if (interruptible) { |
976 | int rc; | |
14cc3e2b | 977 | rc = mutex_lock_interruptible(&smu_part_access); |
183d0202 BH |
978 | if (rc) |
979 | return ERR_PTR(rc); | |
980 | } else | |
14cc3e2b | 981 | mutex_lock(&smu_part_access); |
183d0202 BH |
982 | |
983 | part = (struct smu_sdbp_header *)get_property(smu->of_node, | |
4350147a | 984 | pname, size); |
183d0202 | 985 | if (part == NULL) { |
1beb6a7d | 986 | DPRINTK("trying to extract from SMU ...\n"); |
183d0202 BH |
987 | part = smu_create_sdb_partition(id); |
988 | if (part != NULL && size) | |
989 | *size = part->len << 2; | |
990 | } | |
14cc3e2b | 991 | mutex_unlock(&smu_part_access); |
183d0202 BH |
992 | return part; |
993 | } | |
994 | ||
995 | struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size) | |
996 | { | |
997 | return __smu_get_sdb_partition(id, size, 0); | |
4350147a BH |
998 | } |
999 | EXPORT_SYMBOL(smu_get_sdb_partition); | |
0365ba7f BH |
1000 | |
1001 | ||
1002 | /* | |
1003 | * Userland driver interface | |
1004 | */ | |
1005 | ||
1006 | ||
1007 | static LIST_HEAD(smu_clist); | |
1008 | static DEFINE_SPINLOCK(smu_clist_lock); | |
1009 | ||
1010 | enum smu_file_mode { | |
1011 | smu_file_commands, | |
1012 | smu_file_events, | |
1013 | smu_file_closing | |
1014 | }; | |
1015 | ||
1016 | struct smu_private | |
1017 | { | |
1018 | struct list_head list; | |
1019 | enum smu_file_mode mode; | |
1020 | int busy; | |
1021 | struct smu_cmd cmd; | |
1022 | spinlock_t lock; | |
1023 | wait_queue_head_t wait; | |
1024 | u8 buffer[SMU_MAX_DATA]; | |
1025 | }; | |
1026 | ||
1027 | ||
1028 | static int smu_open(struct inode *inode, struct file *file) | |
1029 | { | |
1030 | struct smu_private *pp; | |
1031 | unsigned long flags; | |
1032 | ||
1033 | pp = kmalloc(sizeof(struct smu_private), GFP_KERNEL); | |
1034 | if (pp == 0) | |
1035 | return -ENOMEM; | |
1036 | memset(pp, 0, sizeof(struct smu_private)); | |
1037 | spin_lock_init(&pp->lock); | |
1038 | pp->mode = smu_file_commands; | |
1039 | init_waitqueue_head(&pp->wait); | |
1040 | ||
1041 | spin_lock_irqsave(&smu_clist_lock, flags); | |
1042 | list_add(&pp->list, &smu_clist); | |
1043 | spin_unlock_irqrestore(&smu_clist_lock, flags); | |
1044 | file->private_data = pp; | |
1045 | ||
1046 | return 0; | |
1047 | } | |
1048 | ||
1049 | ||
1050 | static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc) | |
1051 | { | |
1052 | struct smu_private *pp = misc; | |
1053 | ||
1054 | wake_up_all(&pp->wait); | |
1055 | } | |
1056 | ||
1057 | ||
1058 | static ssize_t smu_write(struct file *file, const char __user *buf, | |
1059 | size_t count, loff_t *ppos) | |
1060 | { | |
1061 | struct smu_private *pp = file->private_data; | |
1062 | unsigned long flags; | |
1063 | struct smu_user_cmd_hdr hdr; | |
1064 | int rc = 0; | |
1065 | ||
1066 | if (pp->busy) | |
1067 | return -EBUSY; | |
1068 | else if (copy_from_user(&hdr, buf, sizeof(hdr))) | |
1069 | return -EFAULT; | |
1070 | else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) { | |
1071 | pp->mode = smu_file_events; | |
1072 | return 0; | |
183d0202 BH |
1073 | } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) { |
1074 | struct smu_sdbp_header *part; | |
1075 | part = __smu_get_sdb_partition(hdr.cmd, NULL, 1); | |
1076 | if (part == NULL) | |
1077 | return -EINVAL; | |
1078 | else if (IS_ERR(part)) | |
1079 | return PTR_ERR(part); | |
1080 | return 0; | |
0365ba7f BH |
1081 | } else if (hdr.cmdtype != SMU_CMDTYPE_SMU) |
1082 | return -EINVAL; | |
1083 | else if (pp->mode != smu_file_commands) | |
1084 | return -EBADFD; | |
1085 | else if (hdr.data_len > SMU_MAX_DATA) | |
1086 | return -EINVAL; | |
1087 | ||
1088 | spin_lock_irqsave(&pp->lock, flags); | |
1089 | if (pp->busy) { | |
1090 | spin_unlock_irqrestore(&pp->lock, flags); | |
1091 | return -EBUSY; | |
1092 | } | |
1093 | pp->busy = 1; | |
1094 | pp->cmd.status = 1; | |
1095 | spin_unlock_irqrestore(&pp->lock, flags); | |
1096 | ||
1097 | if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) { | |
1098 | pp->busy = 0; | |
1099 | return -EFAULT; | |
1100 | } | |
1101 | ||
1102 | pp->cmd.cmd = hdr.cmd; | |
1103 | pp->cmd.data_len = hdr.data_len; | |
1104 | pp->cmd.reply_len = SMU_MAX_DATA; | |
1105 | pp->cmd.data_buf = pp->buffer; | |
1106 | pp->cmd.reply_buf = pp->buffer; | |
1107 | pp->cmd.done = smu_user_cmd_done; | |
1108 | pp->cmd.misc = pp; | |
1109 | rc = smu_queue_cmd(&pp->cmd); | |
1110 | if (rc < 0) | |
1111 | return rc; | |
1112 | return count; | |
1113 | } | |
1114 | ||
1115 | ||
1116 | static ssize_t smu_read_command(struct file *file, struct smu_private *pp, | |
1117 | char __user *buf, size_t count) | |
1118 | { | |
1119 | DECLARE_WAITQUEUE(wait, current); | |
1120 | struct smu_user_reply_hdr hdr; | |
1121 | unsigned long flags; | |
1122 | int size, rc = 0; | |
1123 | ||
1124 | if (!pp->busy) | |
1125 | return 0; | |
1126 | if (count < sizeof(struct smu_user_reply_hdr)) | |
1127 | return -EOVERFLOW; | |
1128 | spin_lock_irqsave(&pp->lock, flags); | |
1129 | if (pp->cmd.status == 1) { | |
1130 | if (file->f_flags & O_NONBLOCK) | |
1131 | return -EAGAIN; | |
1132 | add_wait_queue(&pp->wait, &wait); | |
1133 | for (;;) { | |
1134 | set_current_state(TASK_INTERRUPTIBLE); | |
1135 | rc = 0; | |
1136 | if (pp->cmd.status != 1) | |
1137 | break; | |
1138 | rc = -ERESTARTSYS; | |
1139 | if (signal_pending(current)) | |
1140 | break; | |
1141 | spin_unlock_irqrestore(&pp->lock, flags); | |
1142 | schedule(); | |
1143 | spin_lock_irqsave(&pp->lock, flags); | |
1144 | } | |
1145 | set_current_state(TASK_RUNNING); | |
1146 | remove_wait_queue(&pp->wait, &wait); | |
1147 | } | |
1148 | spin_unlock_irqrestore(&pp->lock, flags); | |
1149 | if (rc) | |
1150 | return rc; | |
1151 | if (pp->cmd.status != 0) | |
1152 | pp->cmd.reply_len = 0; | |
1153 | size = sizeof(hdr) + pp->cmd.reply_len; | |
1154 | if (count < size) | |
1155 | size = count; | |
1156 | rc = size; | |
1157 | hdr.status = pp->cmd.status; | |
1158 | hdr.reply_len = pp->cmd.reply_len; | |
1159 | if (copy_to_user(buf, &hdr, sizeof(hdr))) | |
1160 | return -EFAULT; | |
1161 | size -= sizeof(hdr); | |
1162 | if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size)) | |
1163 | return -EFAULT; | |
1164 | pp->busy = 0; | |
1165 | ||
1166 | return rc; | |
1167 | } | |
1168 | ||
1169 | ||
1170 | static ssize_t smu_read_events(struct file *file, struct smu_private *pp, | |
1171 | char __user *buf, size_t count) | |
1172 | { | |
1173 | /* Not implemented */ | |
1174 | msleep_interruptible(1000); | |
1175 | return 0; | |
1176 | } | |
1177 | ||
1178 | ||
1179 | static ssize_t smu_read(struct file *file, char __user *buf, | |
1180 | size_t count, loff_t *ppos) | |
1181 | { | |
1182 | struct smu_private *pp = file->private_data; | |
1183 | ||
1184 | if (pp->mode == smu_file_commands) | |
1185 | return smu_read_command(file, pp, buf, count); | |
1186 | if (pp->mode == smu_file_events) | |
1187 | return smu_read_events(file, pp, buf, count); | |
1188 | ||
1189 | return -EBADFD; | |
1190 | } | |
1191 | ||
1192 | static unsigned int smu_fpoll(struct file *file, poll_table *wait) | |
1193 | { | |
1194 | struct smu_private *pp = file->private_data; | |
1195 | unsigned int mask = 0; | |
1196 | unsigned long flags; | |
1197 | ||
1198 | if (pp == 0) | |
1199 | return 0; | |
1200 | ||
1201 | if (pp->mode == smu_file_commands) { | |
1202 | poll_wait(file, &pp->wait, wait); | |
1203 | ||
1204 | spin_lock_irqsave(&pp->lock, flags); | |
1205 | if (pp->busy && pp->cmd.status != 1) | |
1206 | mask |= POLLIN; | |
1207 | spin_unlock_irqrestore(&pp->lock, flags); | |
1208 | } if (pp->mode == smu_file_events) { | |
1209 | /* Not yet implemented */ | |
1210 | } | |
1211 | return mask; | |
1212 | } | |
1213 | ||
1214 | static int smu_release(struct inode *inode, struct file *file) | |
1215 | { | |
1216 | struct smu_private *pp = file->private_data; | |
1217 | unsigned long flags; | |
1218 | unsigned int busy; | |
1219 | ||
1220 | if (pp == 0) | |
1221 | return 0; | |
1222 | ||
1223 | file->private_data = NULL; | |
1224 | ||
1225 | /* Mark file as closing to avoid races with new request */ | |
1226 | spin_lock_irqsave(&pp->lock, flags); | |
1227 | pp->mode = smu_file_closing; | |
1228 | busy = pp->busy; | |
1229 | ||
1230 | /* Wait for any pending request to complete */ | |
1231 | if (busy && pp->cmd.status == 1) { | |
1232 | DECLARE_WAITQUEUE(wait, current); | |
1233 | ||
1234 | add_wait_queue(&pp->wait, &wait); | |
1235 | for (;;) { | |
1236 | set_current_state(TASK_UNINTERRUPTIBLE); | |
1237 | if (pp->cmd.status != 1) | |
1238 | break; | |
1239 | spin_lock_irqsave(&pp->lock, flags); | |
1240 | schedule(); | |
1241 | spin_unlock_irqrestore(&pp->lock, flags); | |
1242 | } | |
1243 | set_current_state(TASK_RUNNING); | |
1244 | remove_wait_queue(&pp->wait, &wait); | |
1245 | } | |
1246 | spin_unlock_irqrestore(&pp->lock, flags); | |
1247 | ||
1248 | spin_lock_irqsave(&smu_clist_lock, flags); | |
1249 | list_del(&pp->list); | |
1250 | spin_unlock_irqrestore(&smu_clist_lock, flags); | |
1251 | kfree(pp); | |
1252 | ||
1253 | return 0; | |
1254 | } | |
1255 | ||
1256 | ||
6b67f62c | 1257 | static struct file_operations smu_device_fops = { |
0365ba7f BH |
1258 | .llseek = no_llseek, |
1259 | .read = smu_read, | |
1260 | .write = smu_write, | |
1261 | .poll = smu_fpoll, | |
1262 | .open = smu_open, | |
1263 | .release = smu_release, | |
1264 | }; | |
1265 | ||
6b67f62c | 1266 | static struct miscdevice pmu_device = { |
0365ba7f BH |
1267 | MISC_DYNAMIC_MINOR, "smu", &smu_device_fops |
1268 | }; | |
1269 | ||
1270 | static int smu_device_init(void) | |
1271 | { | |
1272 | if (!smu) | |
1273 | return -ENODEV; | |
1274 | if (misc_register(&pmu_device) < 0) | |
1275 | printk(KERN_ERR "via-pmu: cannot register misc device.\n"); | |
1276 | return 0; | |
1277 | } | |
1278 | device_initcall(smu_device_init); |