[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / leds / leds-renesas-tpu.c

/*
 * LED control using Renesas TPU
 *
 *  Copyright (C) 2011 Magnus Damm
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/printk.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/leds.h>
#include <linux/platform_data/leds-renesas-tpu.h>
#include <linux/gpio.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/pm_runtime.h>
#include <linux/workqueue.h>

enum r_tpu_pin { R_TPU_PIN_UNUSED, R_TPU_PIN_GPIO, R_TPU_PIN_GPIO_FN };
enum r_tpu_timer { R_TPU_TIMER_UNUSED, R_TPU_TIMER_ON };

struct r_tpu_priv {
	struct led_classdev ldev;
	void __iomem *mapbase;
	struct clk *clk;
	struct platform_device *pdev;
	enum r_tpu_pin pin_state;
	enum r_tpu_timer timer_state;
	unsigned long min_rate;
	unsigned int refresh_rate;
	struct work_struct work;
	enum led_brightness new_brightness;
};

static DEFINE_SPINLOCK(r_tpu_lock);

#define TSTR -1 /* Timer start register (shared register) */
#define TCR  0 /* Timer control register (+0x00) */
#define TMDR 1 /* Timer mode register (+0x04) */
#define TIOR 2 /* Timer I/O control register (+0x08) */
#define TIER 3 /* Timer interrupt enable register (+0x0c) */
#define TSR  4 /* Timer status register (+0x10) */
#define TCNT 5 /* Timer counter (+0x14) */
#define TGRA 6 /* Timer general register A (+0x18) */
#define TGRB 7 /* Timer general register B (+0x1c) */
#define TGRC 8 /* Timer general register C (+0x20) */
#define TGRD 9 /* Timer general register D (+0x24) */

static inline unsigned short r_tpu_read(struct r_tpu_priv *p, int reg_nr)
{
	struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
	void __iomem *base = p->mapbase;
	unsigned long offs = reg_nr << 2;

	if (reg_nr == TSTR)
		return ioread16(base - cfg->channel_offset);

	return ioread16(base + offs);
}

static inline void r_tpu_write(struct r_tpu_priv *p, int reg_nr,
			       unsigned short value)
{
	struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
	void __iomem *base = p->mapbase;
	unsigned long offs = reg_nr << 2;

	if (reg_nr == TSTR) {
		iowrite16(value, base - cfg->channel_offset);
		return;
	}

	iowrite16(value, base + offs);
}

static void r_tpu_start_stop_ch(struct r_tpu_priv *p, int start)
{
	struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
	unsigned long flags, value;

	/* start stop register shared by multiple timer channels */
	spin_lock_irqsave(&r_tpu_lock, flags);
	value = r_tpu_read(p, TSTR);

	if (start)
		value |= 1 << cfg->timer_bit;
	else
		value &= ~(1 << cfg->timer_bit);

	r_tpu_write(p, TSTR, value);
	spin_unlock_irqrestore(&r_tpu_lock, flags);
}

static int r_tpu_enable(struct r_tpu_priv *p, enum led_brightness brightness)
{
	struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
	int prescaler[] = { 1, 4, 16, 64 };
	int k, ret;
	unsigned long rate, tmp;

	if (p->timer_state == R_TPU_TIMER_ON)
		return 0;

	/* wake up device and enable clock */
	pm_runtime_get_sync(&p->pdev->dev);
	ret = clk_enable(p->clk);
	if (ret) {
		dev_err(&p->pdev->dev, "cannot enable clock\n");
		return ret;
	}

	/* make sure channel is disabled */
	r_tpu_start_stop_ch(p, 0);

	/* get clock rate after enabling it */
	rate = clk_get_rate(p->clk);

	/* pick the lowest acceptable rate */
	for (k = 0; k < ARRAY_SIZE(prescaler); k++)
		if ((rate / prescaler[k]) < p->min_rate)
			break;

	if (!k) {
		dev_err(&p->pdev->dev, "clock rate mismatch\n");
		goto err0;
	}
	dev_dbg(&p->pdev->dev, "rate = %lu, prescaler %u\n",
		rate, prescaler[k - 1]);

	/* clear TCNT on TGRB match, count on rising edge, set prescaler */
	r_tpu_write(p, TCR, 0x0040 | (k - 1));

	/* output 0 until TGRA, output 1 until TGRB */
	r_tpu_write(p, TIOR, 0x0002);

	rate /= prescaler[k - 1] * p->refresh_rate;
	r_tpu_write(p, TGRB, rate);
	dev_dbg(&p->pdev->dev, "TRGB = 0x%04lx\n", rate);

	tmp = (cfg->max_brightness - brightness) * rate;
	r_tpu_write(p, TGRA, tmp / cfg->max_brightness);
	dev_dbg(&p->pdev->dev, "TRGA = 0x%04lx\n", tmp / cfg->max_brightness);

	/* PWM mode */
	r_tpu_write(p, TMDR, 0x0002);

	/* enable channel */
	r_tpu_start_stop_ch(p, 1);

	p->timer_state = R_TPU_TIMER_ON;
	return 0;
 err0:
	clk_disable(p->clk);
	pm_runtime_put_sync(&p->pdev->dev);
	return -ENOTSUPP;
}

static void r_tpu_disable(struct r_tpu_priv *p)
{
	if (p->timer_state == R_TPU_TIMER_UNUSED)
		return;

	/* disable channel */
	r_tpu_start_stop_ch(p, 0);

	/* stop clock and mark device as idle */
	clk_disable(p->clk);
	pm_runtime_put_sync(&p->pdev->dev);

	p->timer_state = R_TPU_TIMER_UNUSED;
}

static void r_tpu_set_pin(struct r_tpu_priv *p, enum r_tpu_pin new_state,
			  enum led_brightness brightness)
{
	struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;

	if (p->pin_state == new_state) {
		if (p->pin_state == R_TPU_PIN_GPIO)
			gpio_set_value(cfg->pin_gpio, brightness);
		return;
	}

	if (p->pin_state == R_TPU_PIN_GPIO)
		gpio_free(cfg->pin_gpio);

	if (p->pin_state == R_TPU_PIN_GPIO_FN)
		gpio_free(cfg->pin_gpio_fn);

	if (new_state == R_TPU_PIN_GPIO)
		gpio_request_one(cfg->pin_gpio, GPIOF_DIR_OUT | !!brightness,
				cfg->name);

	if (new_state == R_TPU_PIN_GPIO_FN)
		gpio_request(cfg->pin_gpio_fn, cfg->name);

	p->pin_state = new_state;
}

static void r_tpu_work(struct work_struct *work)
{
	struct r_tpu_priv *p = container_of(work, struct r_tpu_priv, work);
	enum led_brightness brightness = p->new_brightness;

	r_tpu_disable(p);

	/* off and maximum are handled as GPIO pins, in between PWM */
	if ((brightness == 0) || (brightness == p->ldev.max_brightness))
		r_tpu_set_pin(p, R_TPU_PIN_GPIO, brightness);
	else {
		r_tpu_set_pin(p, R_TPU_PIN_GPIO_FN, 0);
		r_tpu_enable(p, brightness);
	}
}

static void r_tpu_set_brightness(struct led_classdev *ldev,
				 enum led_brightness brightness)
{
	struct r_tpu_priv *p = container_of(ldev, struct r_tpu_priv, ldev);
	p->new_brightness = brightness;
	schedule_work(&p->work);
}

static int r_tpu_probe(struct platform_device *pdev)
{
	struct led_renesas_tpu_config *cfg = pdev->dev.platform_data;
	struct r_tpu_priv *p;
	struct resource *res;
	int ret;

	if (!cfg) {
		dev_err(&pdev->dev, "missing platform data\n");
		return -ENODEV;
	}

	p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
	if (p == NULL) {
		dev_err(&pdev->dev, "failed to allocate driver data\n");
		return -ENOMEM;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		dev_err(&pdev->dev, "failed to get I/O memory\n");
		return -ENXIO;
	}

	/* map memory, let mapbase point to our channel */
	p->mapbase = devm_ioremap_nocache(&pdev->dev, res->start,
					resource_size(res));
	if (p->mapbase == NULL) {
		dev_err(&pdev->dev, "failed to remap I/O memory\n");
		return -ENXIO;
	}

	/* get hold of clock */
	p->clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(p->clk)) {
		dev_err(&pdev->dev, "cannot get clock\n");
		return PTR_ERR(p->clk);
	}

	p->pdev = pdev;
	p->pin_state = R_TPU_PIN_UNUSED;
	p->timer_state = R_TPU_TIMER_UNUSED;
	p->refresh_rate = cfg->refresh_rate ? cfg->refresh_rate : 100;
	r_tpu_set_pin(p, R_TPU_PIN_GPIO, LED_OFF);
	platform_set_drvdata(pdev, p);

	INIT_WORK(&p->work, r_tpu_work);

	p->ldev.name = cfg->name;
	p->ldev.brightness = LED_OFF;
	p->ldev.max_brightness = cfg->max_brightness;
	p->ldev.brightness_set = r_tpu_set_brightness;
	p->ldev.flags |= LED_CORE_SUSPENDRESUME;
	ret = led_classdev_register(&pdev->dev, &p->ldev);
	if (ret < 0)
		goto err0;

	/* max_brightness may be updated by the LED core code */
	p->min_rate = p->ldev.max_brightness * p->refresh_rate;

	pm_runtime_enable(&pdev->dev);
	return 0;

 err0:
	r_tpu_set_pin(p, R_TPU_PIN_UNUSED, LED_OFF);
	return ret;
}

static int r_tpu_remove(struct platform_device *pdev)
{
	struct r_tpu_priv *p = platform_get_drvdata(pdev);

	r_tpu_set_brightness(&p->ldev, LED_OFF);
	led_classdev_unregister(&p->ldev);
	cancel_work_sync(&p->work);
	r_tpu_disable(p);
	r_tpu_set_pin(p, R_TPU_PIN_UNUSED, LED_OFF);

	pm_runtime_disable(&pdev->dev);

	return 0;
}

static struct platform_driver r_tpu_device_driver = {
	.probe		= r_tpu_probe,
	.remove		= r_tpu_remove,
	.driver		= {
		.name	= "leds-renesas-tpu",
	}
};

module_platform_driver(r_tpu_device_driver);

MODULE_AUTHOR("Magnus Damm");
MODULE_DESCRIPTION("Renesas TPU LED Driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
f59b6f9f MD	1	/*
	2	* LED control using Renesas TPU
	3	*
	4	* Copyright (C) 2011 Magnus Damm
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	18	*/
	19
	20	#include <linux/module.h>
	21	#include <linux/init.h>
	22	#include <linux/platform_device.h>
	23	#include <linux/spinlock.h>
	24	#include <linux/printk.h>
	25	#include <linux/ioport.h>
	26	#include <linux/io.h>
	27	#include <linux/clk.h>
	28	#include <linux/leds.h>
2b67c95b	29	#include <linux/platform_data/leds-renesas-tpu.h>
f59b6f9f MD	30	#include <linux/gpio.h>
	31	#include <linux/err.h>
	32	#include <linux/slab.h>
	33	#include <linux/pm_runtime.h>
02c32941	34	#include <linux/workqueue.h>
f59b6f9f MD	35
	36	enum r_tpu_pin { R_TPU_PIN_UNUSED, R_TPU_PIN_GPIO, R_TPU_PIN_GPIO_FN };
	37	enum r_tpu_timer { R_TPU_TIMER_UNUSED, R_TPU_TIMER_ON };
	38
	39	struct r_tpu_priv {
	40	struct led_classdev ldev;
	41	void __iomem *mapbase;
	42	struct clk *clk;
	43	struct platform_device *pdev;
	44	enum r_tpu_pin pin_state;
	45	enum r_tpu_timer timer_state;
	46	unsigned long min_rate;
	47	unsigned int refresh_rate;
02c32941 MD	48	struct work_struct work;
02c32941 MD	49	enum led_brightness new_brightness;
f59b6f9f MD	50	};
	51
	52	static DEFINE_SPINLOCK(r_tpu_lock);
	53
	54	#define TSTR -1 /* Timer start register (shared register) */
	55	#define TCR 0 /* Timer control register (+0x00) */
	56	#define TMDR 1 /* Timer mode register (+0x04) */
	57	#define TIOR 2 /* Timer I/O control register (+0x08) */
	58	#define TIER 3 /* Timer interrupt enable register (+0x0c) */
	59	#define TSR 4 /* Timer status register (+0x10) */
	60	#define TCNT 5 /* Timer counter (+0x14) */
	61	#define TGRA 6 /* Timer general register A (+0x18) */
	62	#define TGRB 7 /* Timer general register B (+0x1c) */
	63	#define TGRC 8 /* Timer general register C (+0x20) */
	64	#define TGRD 9 /* Timer general register D (+0x24) */
	65
	66	static inline unsigned short r_tpu_read(struct r_tpu_priv *p, int reg_nr)
	67	{
	68	struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
	69	void __iomem *base = p->mapbase;
	70	unsigned long offs = reg_nr << 2;
	71
	72	if (reg_nr == TSTR)
	73	return ioread16(base - cfg->channel_offset);
	74
	75	return ioread16(base + offs);
	76	}
	77
	78	static inline void r_tpu_write(struct r_tpu_priv *p, int reg_nr,
	79	unsigned short value)
	80	{
	81	struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
	82	void __iomem *base = p->mapbase;
	83	unsigned long offs = reg_nr << 2;
	84
	85	if (reg_nr == TSTR) {
	86	iowrite16(value, base - cfg->channel_offset);
	87	return;
	88	}
	89
	90	iowrite16(value, base + offs);
	91	}
	92
	93	static void r_tpu_start_stop_ch(struct r_tpu_priv *p, int start)
	94	{
	95	struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
	96	unsigned long flags, value;
	97
	98	/* start stop register shared by multiple timer channels */
	99	spin_lock_irqsave(&r_tpu_lock, flags);
	100	value = r_tpu_read(p, TSTR);
	101
	102	if (start)
	103	value \|= 1 << cfg->timer_bit;
	104	else
	105	value &= ~(1 << cfg->timer_bit);
	106
	107	r_tpu_write(p, TSTR, value);
	108	spin_unlock_irqrestore(&r_tpu_lock, flags);
	109	}
	110
	111	static int r_tpu_enable(struct r_tpu_priv *p, enum led_brightness brightness)
	112	{
	113	struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
114	int prescaler[] = { 1, 4, 16, 64 };
115	int k, ret;
116	unsigned long rate, tmp;
117
118	if (p->timer_state == R_TPU_TIMER_ON)
119	return 0;
120
121	/* wake up device and enable clock */
122	pm_runtime_get_sync(&p->pdev->dev);
123	ret = clk_enable(p->clk);
124	if (ret) {
125	dev_err(&p->pdev->dev, "cannot enable clock\n");
126	return ret;
127	}
128
129	/* make sure channel is disabled */
130	r_tpu_start_stop_ch(p, 0);
131
132	/* get clock rate after enabling it */
133	rate = clk_get_rate(p->clk);
134
135	/* pick the lowest acceptable rate */
136	for (k = 0; k < ARRAY_SIZE(prescaler); k++)
137	if ((rate / prescaler[k]) < p->min_rate)
138	break;
139
140	if (!k) {
141	dev_err(&p->pdev->dev, "clock rate mismatch\n");
142	goto err0;
143	}
144	dev_dbg(&p->pdev->dev, "rate = %lu, prescaler %u\n",
145	rate, prescaler[k - 1]);
146
147	/* clear TCNT on TGRB match, count on rising edge, set prescaler */
148	r_tpu_write(p, TCR, 0x0040 \| (k - 1));
149
150	/* output 0 until TGRA, output 1 until TGRB */
151	r_tpu_write(p, TIOR, 0x0002);
152
153	rate /= prescaler[k - 1] * p->refresh_rate;
154	r_tpu_write(p, TGRB, rate);
155	dev_dbg(&p->pdev->dev, "TRGB = 0x%04lx\n", rate);
156
157	tmp = (cfg->max_brightness - brightness) * rate;
158	r_tpu_write(p, TGRA, tmp / cfg->max_brightness);
159	dev_dbg(&p->pdev->dev, "TRGA = 0x%04lx\n", tmp / cfg->max_brightness);
160
161	/* PWM mode */
162	r_tpu_write(p, TMDR, 0x0002);
163
164	/* enable channel */
165	r_tpu_start_stop_ch(p, 1);
166
167	p->timer_state = R_TPU_TIMER_ON;
168	return 0;
169	err0:
170	clk_disable(p->clk);
171	pm_runtime_put_sync(&p->pdev->dev);
172	return -ENOTSUPP;
173	}
174
175	static void r_tpu_disable(struct r_tpu_priv *p)
176	{
177	if (p->timer_state == R_TPU_TIMER_UNUSED)
178	return;
179
180	/* disable channel */
181	r_tpu_start_stop_ch(p, 0);
182
183	/* stop clock and mark device as idle */
184	clk_disable(p->clk);
185	pm_runtime_put_sync(&p->pdev->dev);
186
187	p->timer_state = R_TPU_TIMER_UNUSED;
188	}
189
190	static void r_tpu_set_pin(struct r_tpu_priv *p, enum r_tpu_pin new_state,
191	enum led_brightness brightness)
192	{
193	struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
194
195	if (p->pin_state == new_state) {
196	if (p->pin_state == R_TPU_PIN_GPIO)
197	gpio_set_value(cfg->pin_gpio, brightness);
198	return;
199	}
200
201	if (p->pin_state == R_TPU_PIN_GPIO)
202	gpio_free(cfg->pin_gpio);
203
204	if (p->pin_state == R_TPU_PIN_GPIO_FN)
205	gpio_free(cfg->pin_gpio_fn);
206
b0053aaa JH	207	if (new_state == R_TPU_PIN_GPIO)
	208	gpio_request_one(cfg->pin_gpio, GPIOF_DIR_OUT \| !!brightness,
	209	cfg->name);
	210
f59b6f9f MD	211	if (new_state == R_TPU_PIN_GPIO_FN)
	212	gpio_request(cfg->pin_gpio_fn, cfg->name);
	213
	214	p->pin_state = new_state;
	215	}
	216
02c32941	217	static void r_tpu_work(struct work_struct *work)
f59b6f9f	218	{
02c32941 MD	219	struct r_tpu_priv *p = container_of(work, struct r_tpu_priv, work);
02c32941 MD	220	enum led_brightness brightness = p->new_brightness;
f59b6f9f MD	221
	222	r_tpu_disable(p);
	223
	224	/* off and maximum are handled as GPIO pins, in between PWM */
02c32941	225	if ((brightness == 0) \|\| (brightness == p->ldev.max_brightness))
f59b6f9f MD	226	r_tpu_set_pin(p, R_TPU_PIN_GPIO, brightness);
	227	else {
	228	r_tpu_set_pin(p, R_TPU_PIN_GPIO_FN, 0);
	229	r_tpu_enable(p, brightness);
	230	}
	231	}
	232
02c32941 MD	233	static void r_tpu_set_brightness(struct led_classdev *ldev,
	234	enum led_brightness brightness)
	235	{
	236	struct r_tpu_priv *p = container_of(ldev, struct r_tpu_priv, ldev);
	237	p->new_brightness = brightness;
	238	schedule_work(&p->work);
	239	}
	240
98ea1ea2	241	static int r_tpu_probe(struct platform_device *pdev)
f59b6f9f MD	242	{
	243	struct led_renesas_tpu_config *cfg = pdev->dev.platform_data;
	244	struct r_tpu_priv *p;
	245	struct resource *res;
bfe4c041	246	int ret;
f59b6f9f MD	247
	248	if (!cfg) {
	249	dev_err(&pdev->dev, "missing platform data\n");
4a5a4184	250	return -ENODEV;
f59b6f9f MD	251	}
f59b6f9f MD	252
bfe4c041	253	p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
f59b6f9f MD	254	if (p == NULL) {
f59b6f9f MD	255	dev_err(&pdev->dev, "failed to allocate driver data\n");
bfe4c041	256	return -ENOMEM;
f59b6f9f MD	257	}
	258
	259	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	260	if (!res) {
	261	dev_err(&pdev->dev, "failed to get I/O memory\n");
bfe4c041	262	return -ENXIO;
f59b6f9f MD	263	}
	264
	265	/* map memory, let mapbase point to our channel */
f9e007ff JH	266	p->mapbase = devm_ioremap_nocache(&pdev->dev, res->start,
f9e007ff JH	267	resource_size(res));
f59b6f9f MD	268	if (p->mapbase == NULL) {
f59b6f9f MD	269	dev_err(&pdev->dev, "failed to remap I/O memory\n");
bfe4c041	270	return -ENXIO;
f59b6f9f MD	271	}
	272
	273	/* get hold of clock */
f9e007ff	274	p->clk = devm_clk_get(&pdev->dev, NULL);
f59b6f9f MD	275	if (IS_ERR(p->clk)) {
f59b6f9f MD	276	dev_err(&pdev->dev, "cannot get clock\n");
f9e007ff	277	return PTR_ERR(p->clk);
f59b6f9f MD	278	}
	279
	280	p->pdev = pdev;
	281	p->pin_state = R_TPU_PIN_UNUSED;
	282	p->timer_state = R_TPU_TIMER_UNUSED;
	283	p->refresh_rate = cfg->refresh_rate ? cfg->refresh_rate : 100;
	284	r_tpu_set_pin(p, R_TPU_PIN_GPIO, LED_OFF);
	285	platform_set_drvdata(pdev, p);
	286
02c32941	287	INIT_WORK(&p->work, r_tpu_work);
f59b6f9f MD	288
	289	p->ldev.name = cfg->name;
	290	p->ldev.brightness = LED_OFF;
	291	p->ldev.max_brightness = cfg->max_brightness;
	292	p->ldev.brightness_set = r_tpu_set_brightness;
	293	p->ldev.flags \|= LED_CORE_SUSPENDRESUME;
	294	ret = led_classdev_register(&pdev->dev, &p->ldev);
	295	if (ret < 0)
f9e007ff	296	goto err0;
f59b6f9f MD	297
	298	/* max_brightness may be updated by the LED core code */
	299	p->min_rate = p->ldev.max_brightness * p->refresh_rate;
	300
	301	pm_runtime_enable(&pdev->dev);
	302	return 0;
	303
f59b6f9f	304	err0:
f9e007ff	305	r_tpu_set_pin(p, R_TPU_PIN_UNUSED, LED_OFF);
f59b6f9f MD	306	return ret;
	307	}
	308
678e8a6b	309	static int r_tpu_remove(struct platform_device *pdev)
f59b6f9f MD	310	{
	311	struct r_tpu_priv *p = platform_get_drvdata(pdev);
	312
	313	r_tpu_set_brightness(&p->ldev, LED_OFF);
	314	led_classdev_unregister(&p->ldev);
02c32941	315	cancel_work_sync(&p->work);
f59b6f9f MD	316	r_tpu_disable(p);
	317	r_tpu_set_pin(p, R_TPU_PIN_UNUSED, LED_OFF);
	318
	319	pm_runtime_disable(&pdev->dev);
f59b6f9f	320
f59b6f9f MD	321	return 0;
	322	}
	323
	324	static struct platform_driver r_tpu_device_driver = {
	325	.probe = r_tpu_probe,
df07cf81	326	.remove = r_tpu_remove,
f59b6f9f MD	327	.driver = {
	328	.name = "leds-renesas-tpu",
	329	}
	330	};
	331
892a8843	332	module_platform_driver(r_tpu_device_driver);
f59b6f9f MD	333
	334	MODULE_AUTHOR("Magnus Damm");
	335	MODULE_DESCRIPTION("Renesas TPU LED Driver");
	336	MODULE_LICENSE("GPL v2");