leds-lp5521/5523: use new lp55xx common header
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / leds / leds-lp5521.c
CommitLineData
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1/*
2 * LP5521 LED chip driver.
3 *
4 * Copyright (C) 2010 Nokia Corporation
5 *
6 * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 */
22
500fe141 23#include <linux/delay.h>
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24#include <linux/firmware.h>
25#include <linux/i2c.h>
26#include <linux/init.h>
500fe141 27#include <linux/leds.h>
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28#include <linux/module.h>
29#include <linux/mutex.h>
6a0c9a47 30#include <linux/platform_data/leds-lp55xx.h>
79bcc10b 31#include <linux/slab.h>
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32
33#include "leds-lp55xx-common.h"
500fe141 34
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35#define LP5521_PROGRAM_LENGTH 32
36#define LP5521_MAX_LEDS 3
37#define LP5521_CMD_DIRECT 0x3F
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38
39/* Registers */
40#define LP5521_REG_ENABLE 0x00
41#define LP5521_REG_OP_MODE 0x01
42#define LP5521_REG_R_PWM 0x02
43#define LP5521_REG_G_PWM 0x03
44#define LP5521_REG_B_PWM 0x04
45#define LP5521_REG_R_CURRENT 0x05
46#define LP5521_REG_G_CURRENT 0x06
47#define LP5521_REG_B_CURRENT 0x07
48#define LP5521_REG_CONFIG 0x08
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49#define LP5521_REG_STATUS 0x0C
50#define LP5521_REG_RESET 0x0D
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51#define LP5521_REG_R_PROG_MEM 0x10
52#define LP5521_REG_G_PROG_MEM 0x30
53#define LP5521_REG_B_PROG_MEM 0x50
54
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55/* Base register to set LED current */
56#define LP5521_REG_LED_CURRENT_BASE LP5521_REG_R_CURRENT
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57/* Base register to set the brightness */
58#define LP5521_REG_LED_PWM_BASE LP5521_REG_R_PWM
59
60/* Bits in ENABLE register */
61#define LP5521_MASTER_ENABLE 0x40 /* Chip master enable */
62#define LP5521_LOGARITHMIC_PWM 0x80 /* Logarithmic PWM adjustment */
63#define LP5521_EXEC_RUN 0x2A
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64#define LP5521_ENABLE_DEFAULT \
65 (LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM)
66#define LP5521_ENABLE_RUN_PROGRAM \
67 (LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN)
500fe141 68
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69/* Status */
70#define LP5521_EXT_CLK_USED 0x08
71
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72/* default R channel current register value */
73#define LP5521_REG_R_CURR_DEFAULT 0xAF
74
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75/* Reset register value */
76#define LP5521_RESET 0xFF
77
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78/* Program Memory Operations */
79#define LP5521_MODE_R_M 0x30 /* Operation Mode Register */
80#define LP5521_MODE_G_M 0x0C
81#define LP5521_MODE_B_M 0x03
82#define LP5521_LOAD_R 0x10
83#define LP5521_LOAD_G 0x04
84#define LP5521_LOAD_B 0x01
85
86#define LP5521_R_IS_LOADING(mode) \
87 ((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
88#define LP5521_G_IS_LOADING(mode) \
89 ((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
90#define LP5521_B_IS_LOADING(mode) \
91 ((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)
92
93#define LP5521_EXEC_R_M 0x30 /* Enable Register */
94#define LP5521_EXEC_G_M 0x0C
95#define LP5521_EXEC_B_M 0x03
96#define LP5521_EXEC_M 0x3F
97#define LP5521_RUN_R 0x20
98#define LP5521_RUN_G 0x08
99#define LP5521_RUN_B 0x02
500fe141 100
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101static inline void lp5521_wait_opmode_done(void)
102{
103 /* operation mode change needs to be longer than 153 us */
104 usleep_range(200, 300);
105}
106
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107static inline void lp5521_wait_enable_done(void)
108{
109 /* it takes more 488 us to update ENABLE register */
110 usleep_range(500, 600);
111}
112
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113static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
114{
115 led->led_current = led_current;
116 lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
117 led_current);
118}
119
9ce7cb17 120static void lp5521_load_engine(struct lp55xx_chip *chip)
500fe141 121{
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122 enum lp55xx_engine_index idx = chip->engine_idx;
123 u8 mask[] = {
124 [LP55XX_ENGINE_1] = LP5521_MODE_R_M,
125 [LP55XX_ENGINE_2] = LP5521_MODE_G_M,
126 [LP55XX_ENGINE_3] = LP5521_MODE_B_M,
127 };
500fe141 128
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129 u8 val[] = {
130 [LP55XX_ENGINE_1] = LP5521_LOAD_R,
131 [LP55XX_ENGINE_2] = LP5521_LOAD_G,
132 [LP55XX_ENGINE_3] = LP5521_LOAD_B,
133 };
500fe141 134
9ce7cb17 135 lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);
500fe141 136
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137 lp5521_wait_opmode_done();
138}
500fe141 139
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140static void lp5521_stop_engine(struct lp55xx_chip *chip)
141{
142 lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
143 lp5521_wait_opmode_done();
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144}
145
9ce7cb17 146static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
500fe141 147{
500fe141 148 int ret;
500fe141 149 u8 mode;
9ce7cb17 150 u8 exec;
500fe141 151
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152 /* stop engine */
153 if (!start) {
154 lp5521_stop_engine(chip);
155 lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
156 lp5521_wait_opmode_done();
157 return;
158 }
159
160 /*
161 * To run the engine,
162 * operation mode and enable register should updated at the same time
163 */
164
165 ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
5bc9ad77 166 if (ret)
9ce7cb17 167 return;
5bc9ad77 168
9ce7cb17 169 ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
5bc9ad77 170 if (ret)
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171 return;
172
173 /* change operation mode to RUN only when each engine is loading */
174 if (LP5521_R_IS_LOADING(mode)) {
175 mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R;
176 exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R;
177 }
178
179 if (LP5521_G_IS_LOADING(mode)) {
180 mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G;
181 exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G;
182 }
183
184 if (LP5521_B_IS_LOADING(mode)) {
185 mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B;
186 exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B;
187 }
188
189 lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
190 lp5521_wait_opmode_done();
191
192 lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
193 lp5521_wait_enable_done();
194}
195
196static int lp5521_update_program_memory(struct lp55xx_chip *chip,
197 const u8 *data, size_t size)
198{
199 enum lp55xx_engine_index idx = chip->engine_idx;
200 u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
201 u8 addr[] = {
202 [LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
203 [LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
204 [LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
205 };
206 unsigned cmd;
207 char c[3];
208 int program_size;
209 int nrchars;
210 int offset = 0;
211 int ret;
212 int i;
213
214 /* clear program memory before updating */
215 for (i = 0; i < LP5521_PROGRAM_LENGTH; i++)
216 lp55xx_write(chip, addr[idx] + i, 0);
217
218 i = 0;
219 while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
220 /* separate sscanfs because length is working only for %s */
221 ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
222 if (ret != 1)
223 goto err;
224
225 ret = sscanf(c, "%2x", &cmd);
226 if (ret != 1)
227 goto err;
228
229 pattern[i] = (u8)cmd;
230 offset += nrchars;
231 i++;
232 }
233
234 /* Each instruction is 16bit long. Check that length is even */
235 if (i % 2)
236 goto err;
237
238 program_size = i;
239 for (i = 0; i < program_size; i++)
240 lp55xx_write(chip, addr[idx] + i, pattern[i]);
241
242 return 0;
243
244err:
245 dev_err(&chip->cl->dev, "wrong pattern format\n");
246 return -EINVAL;
247}
248
249static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
250{
251 const struct firmware *fw = chip->fw;
252
253 if (fw->size > LP5521_PROGRAM_LENGTH) {
254 dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
255 fw->size);
256 return;
257 }
500fe141 258
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259 /*
260 * Program momery sequence
261 * 1) set engine mode to "LOAD"
262 * 2) write firmware data into program memory
263 */
264
265 lp5521_load_engine(chip);
266 lp5521_update_program_memory(chip, fw->data, fw->size);
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267}
268
ffbdccdb 269static int lp5521_post_init_device(struct lp55xx_chip *chip)
500fe141 270{
500fe141 271 int ret;
94482174 272 u8 val;
500fe141 273
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274 /*
275 * Make sure that the chip is reset by reading back the r channel
276 * current reg. This is dummy read is required on some platforms -
277 * otherwise further access to the R G B channels in the
278 * LP5521_REG_ENABLE register will not have any effect - strange!
279 */
ffbdccdb 280 ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
94482174 281 if (ret) {
ffbdccdb 282 dev_err(&chip->cl->dev, "error in resetting chip\n");
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283 return ret;
284 }
285 if (val != LP5521_REG_R_CURR_DEFAULT) {
ffbdccdb 286 dev_err(&chip->cl->dev,
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287 "unexpected data in register (expected 0x%x got 0x%x)\n",
288 LP5521_REG_R_CURR_DEFAULT, val);
289 ret = -EINVAL;
290 return ret;
291 }
292 usleep_range(10000, 20000);
500fe141 293
500fe141 294 /* Set all PWMs to direct control mode */
ffbdccdb 295 ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
500fe141 296
ffbdccdb 297 val = chip->pdata->update_config ?
3b49aacd 298 : (LP5521_PWRSAVE_EN | LP5521_CP_MODE_AUTO | LP5521_R_TO_BATT);
ffbdccdb 299 ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
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300 if (ret)
301 return ret;
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302
303 /* Initialize all channels PWM to zero -> leds off */
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304 lp55xx_write(chip, LP5521_REG_R_PWM, 0);
305 lp55xx_write(chip, LP5521_REG_G_PWM, 0);
306 lp55xx_write(chip, LP5521_REG_B_PWM, 0);
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307
308 /* Set engines are set to run state when OP_MODE enables engines */
ffbdccdb 309 ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
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310 if (ret)
311 return ret;
500fe141 312
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313 lp5521_wait_enable_done();
314
315 return 0;
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316}
317
9ca3bd80 318static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf)
500fe141 319{
9ca3bd80 320 struct lp55xx_platform_data *pdata = chip->pdata;
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321 int ret;
322 u8 status;
323
9ca3bd80 324 ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
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325 if (ret < 0)
326 return ret;
327
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328 if (pdata->clock_mode != LP55XX_CLOCK_EXT)
329 return 0;
330
500fe141 331 /* Check that ext clock is really in use if requested */
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332 if ((status & LP5521_EXT_CLK_USED) == 0)
333 return -EIO;
334
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335 return 0;
336}
337
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338static void lp5521_led_brightness_work(struct work_struct *work)
339{
a6e4679a 340 struct lp55xx_led *led = container_of(work, struct lp55xx_led,
500fe141 341 brightness_work);
a6e4679a 342 struct lp55xx_chip *chip = led->chip;
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343
344 mutex_lock(&chip->lock);
a6e4679a 345 lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
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346 led->brightness);
347 mutex_unlock(&chip->lock);
348}
349
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350static ssize_t lp5521_selftest(struct device *dev,
351 struct device_attribute *attr,
352 char *buf)
353{
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354 struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
355 struct lp55xx_chip *chip = led->chip;
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356 int ret;
357
358 mutex_lock(&chip->lock);
359 ret = lp5521_run_selftest(chip, buf);
360 mutex_unlock(&chip->lock);
361 return sprintf(buf, "%s\n", ret ? "FAIL" : "OK");
362}
363
500fe141 364/* device attributes */
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365static DEVICE_ATTR(selftest, S_IRUGO, lp5521_selftest, NULL);
366
367static struct attribute *lp5521_attributes[] = {
500fe141 368 &dev_attr_selftest.attr,
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369 NULL
370};
371
372static const struct attribute_group lp5521_group = {
373 .attrs = lp5521_attributes,
374};
375
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376/* Chip specific configurations */
377static struct lp55xx_device_config lp5521_cfg = {
378 .reset = {
379 .addr = LP5521_REG_RESET,
380 .val = LP5521_RESET,
381 },
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382 .enable = {
383 .addr = LP5521_REG_ENABLE,
384 .val = LP5521_ENABLE_DEFAULT,
385 },
0e202346 386 .max_channel = LP5521_MAX_LEDS,
ffbdccdb 387 .post_init_device = lp5521_post_init_device,
a6e4679a 388 .brightness_work_fn = lp5521_led_brightness_work,
a96bfa13 389 .set_led_current = lp5521_set_led_current,
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390 .firmware_cb = lp5521_firmware_loaded,
391 .run_engine = lp5521_run_engine,
e73c0ce6 392 .dev_attr_group = &lp5521_group,
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393};
394
98ea1ea2 395static int lp5521_probe(struct i2c_client *client,
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396 const struct i2c_device_id *id)
397{
1904f83d 398 int ret;
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399 struct lp55xx_chip *chip;
400 struct lp55xx_led *led;
401 struct lp55xx_platform_data *pdata = client->dev.platform_data;
500fe141 402
6a0c9a47 403 if (!pdata) {
500fe141 404 dev_err(&client->dev, "no platform data\n");
e430dc00 405 return -EINVAL;
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406 }
407
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408 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
409 if (!chip)
410 return -ENOMEM;
411
412 led = devm_kzalloc(&client->dev,
413 sizeof(*led) * pdata->num_channels, GFP_KERNEL);
414 if (!led)
415 return -ENOMEM;
416
417 chip->cl = client;
418 chip->pdata = pdata;
48068d5d 419 chip->cfg = &lp5521_cfg;
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420
421 mutex_init(&chip->lock);
500fe141 422
6a0c9a47 423 i2c_set_clientdata(client, led);
500fe141 424
22ebeb48 425 ret = lp55xx_init_device(chip);
944f7b1d 426 if (ret)
f6c64c6f 427 goto err_init;
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428
429 dev_info(&client->dev, "%s programmable led chip found\n", id->name);
430
9e9b3db1 431 ret = lp55xx_register_leds(led, chip);
f6524808 432 if (ret)
9e9b3db1 433 goto err_register_leds;
500fe141 434
e73c0ce6 435 ret = lp55xx_register_sysfs(chip);
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436 if (ret) {
437 dev_err(&client->dev, "registering sysfs failed\n");
e73c0ce6 438 goto err_register_sysfs;
500fe141 439 }
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440
441 return 0;
442
443err_register_sysfs:
c3a68ebf 444 lp55xx_unregister_leds(led, chip);
9e9b3db1 445err_register_leds:
6ce61762 446 lp55xx_deinit_device(chip);
f6c64c6f 447err_init:
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448 return ret;
449}
450
678e8a6b 451static int lp5521_remove(struct i2c_client *client)
500fe141 452{
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453 struct lp55xx_led *led = i2c_get_clientdata(client);
454 struct lp55xx_chip *chip = led->chip;
500fe141 455
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456 lp5521_stop_engine(chip);
457 lp55xx_unregister_sysfs(chip);
c3a68ebf 458 lp55xx_unregister_leds(led, chip);
6ce61762 459 lp55xx_deinit_device(chip);
500fe141 460
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461 return 0;
462}
463
464static const struct i2c_device_id lp5521_id[] = {
465 { "lp5521", 0 }, /* Three channel chip */
466 { }
467};
468MODULE_DEVICE_TABLE(i2c, lp5521_id);
469
470static struct i2c_driver lp5521_driver = {
471 .driver = {
472 .name = "lp5521",
473 },
474 .probe = lp5521_probe,
df07cf81 475 .remove = lp5521_remove,
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476 .id_table = lp5521_id,
477};
478
09a0d183 479module_i2c_driver(lp5521_driver);
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480
481MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
482MODULE_DESCRIPTION("LP5521 LED engine");
483MODULE_LICENSE("GPL v2");