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KVM: MMU: Selectively set PageDirty when releasing guest memory
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
313a3dc7 17#include "kvm.h"
043405e1 18#include "x86.h"
d825ed0a 19#include "x86_emulate.h"
5fb76f9b 20#include "segment_descriptor.h"
313a3dc7
CO		 21#include "irq.h"
22
23#include <linux/kvm.h>
24#include <linux/fs.h>
25#include <linux/vmalloc.h>
5fb76f9b 26#include <linux/module.h>
043405e1
CO		 27
28#include <asm/uaccess.h>
d825ed0a 29#include <asm/msr.h>
043405e1 30
313a3dc7 31#define MAX_IO_MSRS 256
a03490ed
CO		 32#define CR0_RESERVED_BITS \
33 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
34 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
35 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
36#define CR4_RESERVED_BITS \
37 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
38 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
39 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
40 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
41
42#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
15c4a640 43#define EFER_RESERVED_BITS 0xfffffffffffff2fe
313a3dc7 44
ba1389b7
AK		 45#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
46#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 47
97896d04
ZX		 48struct kvm_x86_ops *kvm_x86_ops;
49
417bc304 50struct kvm_stats_debugfs_item debugfs_entries[] = {
ba1389b7
AK		 51 { "pf_fixed", VCPU_STAT(pf_fixed) },
52 { "pf_guest", VCPU_STAT(pf_guest) },
53 { "tlb_flush", VCPU_STAT(tlb_flush) },
54 { "invlpg", VCPU_STAT(invlpg) },
55 { "exits", VCPU_STAT(exits) },
56 { "io_exits", VCPU_STAT(io_exits) },
57 { "mmio_exits", VCPU_STAT(mmio_exits) },
58 { "signal_exits", VCPU_STAT(signal_exits) },
59 { "irq_window", VCPU_STAT(irq_window_exits) },
60 { "halt_exits", VCPU_STAT(halt_exits) },
61 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
62 { "request_irq", VCPU_STAT(request_irq_exits) },
63 { "irq_exits", VCPU_STAT(irq_exits) },
64 { "host_state_reload", VCPU_STAT(host_state_reload) },
65 { "efer_reload", VCPU_STAT(efer_reload) },
66 { "fpu_reload", VCPU_STAT(fpu_reload) },
67 { "insn_emulation", VCPU_STAT(insn_emulation) },
68 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
4cee5764
AK		 69 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
70 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
71 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
72 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
73 { "mmu_flooded", VM_STAT(mmu_flooded) },
74 { "mmu_recycled", VM_STAT(mmu_recycled) },
417bc304
HB		 75 { NULL }
76};
77
78
5fb76f9b
CO		 79unsigned long segment_base(u16 selector)
80{
81 struct descriptor_table gdt;
82 struct segment_descriptor *d;
83 unsigned long table_base;
84 unsigned long v;
85
86 if (selector == 0)
87 return 0;
88
89 asm("sgdt %0" : "=m"(gdt));
90 table_base = gdt.base;
91
92 if (selector & 4) { /* from ldt */
93 u16 ldt_selector;
94
95 asm("sldt %0" : "=g"(ldt_selector));
96 table_base = segment_base(ldt_selector);
97 }
98 d = (struct segment_descriptor *)(table_base + (selector & ~7));
99 v = d->base_low | ((unsigned long)d->base_mid << 16) |
100 ((unsigned long)d->base_high << 24);
101#ifdef CONFIG_X86_64
102 if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
103 v |= ((unsigned long) \
104 ((struct segment_descriptor_64 *)d)->base_higher) << 32;
105#endif
106 return v;
107}
108EXPORT_SYMBOL_GPL(segment_base);
109
6866b83e
CO		 110u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
111{
112 if (irqchip_in_kernel(vcpu->kvm))
113 return vcpu->apic_base;
114 else
115 return vcpu->apic_base;
116}
117EXPORT_SYMBOL_GPL(kvm_get_apic_base);
118
119void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
120{
121 /* TODO: reserve bits check */
122 if (irqchip_in_kernel(vcpu->kvm))
123 kvm_lapic_set_base(vcpu, data);
124 else
125 vcpu->apic_base = data;
126}
127EXPORT_SYMBOL_GPL(kvm_set_apic_base);
128
a03490ed
CO		 129static void inject_gp(struct kvm_vcpu *vcpu)
130{
131 kvm_x86_ops->inject_gp(vcpu, 0);
132}
133
134/*
135 * Load the pae pdptrs. Return true is they are all valid.
136 */
137int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
138{
139 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
140 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
141 int i;
142 int ret;
143 u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
144
145 mutex_lock(&vcpu->kvm->lock);
146 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
147 offset * sizeof(u64), sizeof(pdpte));
148 if (ret < 0) {
149 ret = 0;
150 goto out;
151 }
152 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
153 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
154 ret = 0;
155 goto out;
156 }
157 }
158 ret = 1;
159
160 memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
161out:
162 mutex_unlock(&vcpu->kvm->lock);
163
164 return ret;
165}
166
167void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
168{
169 if (cr0 & CR0_RESERVED_BITS) {
170 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
171 cr0, vcpu->cr0);
172 inject_gp(vcpu);
173 return;
174 }
175
176 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
177 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
178 inject_gp(vcpu);
179 return;
180 }
181
182 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
183 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
184 "and a clear PE flag\n");
185 inject_gp(vcpu);
186 return;
187 }
188
189 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
190#ifdef CONFIG_X86_64
191 if ((vcpu->shadow_efer & EFER_LME)) {
192 int cs_db, cs_l;
193
194 if (!is_pae(vcpu)) {
195 printk(KERN_DEBUG "set_cr0: #GP, start paging "
196 "in long mode while PAE is disabled\n");
197 inject_gp(vcpu);
198 return;
199 }
200 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
201 if (cs_l) {
202 printk(KERN_DEBUG "set_cr0: #GP, start paging "
203 "in long mode while CS.L == 1\n");
204 inject_gp(vcpu);
205 return;
206
207 }
208 } else
209#endif
210 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
211 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
212 "reserved bits\n");
213 inject_gp(vcpu);
214 return;
215 }
216
217 }
218
219 kvm_x86_ops->set_cr0(vcpu, cr0);
220 vcpu->cr0 = cr0;
221
222 mutex_lock(&vcpu->kvm->lock);
223 kvm_mmu_reset_context(vcpu);
224 mutex_unlock(&vcpu->kvm->lock);
225 return;
226}
227EXPORT_SYMBOL_GPL(set_cr0);
228
229void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
230{
231 set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
232}
233EXPORT_SYMBOL_GPL(lmsw);
234
235void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
236{
237 if (cr4 & CR4_RESERVED_BITS) {
238 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
239 inject_gp(vcpu);
240 return;
241 }
242
243 if (is_long_mode(vcpu)) {
244 if (!(cr4 & X86_CR4_PAE)) {
245 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
246 "in long mode\n");
247 inject_gp(vcpu);
248 return;
249 }
250 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
251 && !load_pdptrs(vcpu, vcpu->cr3)) {
252 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
253 inject_gp(vcpu);
254 return;
255 }
256
257 if (cr4 & X86_CR4_VMXE) {
258 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
259 inject_gp(vcpu);
260 return;
261 }
262 kvm_x86_ops->set_cr4(vcpu, cr4);
263 vcpu->cr4 = cr4;
264 mutex_lock(&vcpu->kvm->lock);
265 kvm_mmu_reset_context(vcpu);
266 mutex_unlock(&vcpu->kvm->lock);
267}
268EXPORT_SYMBOL_GPL(set_cr4);
269
270void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
271{
272 if (is_long_mode(vcpu)) {
273 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
274 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
275 inject_gp(vcpu);
276 return;
277 }
278 } else {
279 if (is_pae(vcpu)) {
280 if (cr3 & CR3_PAE_RESERVED_BITS) {
281 printk(KERN_DEBUG
282 "set_cr3: #GP, reserved bits\n");
283 inject_gp(vcpu);
284 return;
285 }
286 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
287 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
288 "reserved bits\n");
289 inject_gp(vcpu);
290 return;
291 }
292 }
293 /*
294 * We don't check reserved bits in nonpae mode, because
295 * this isn't enforced, and VMware depends on this.
296 */
297 }
298
299 mutex_lock(&vcpu->kvm->lock);
300 /*
301 * Does the new cr3 value map to physical memory? (Note, we
302 * catch an invalid cr3 even in real-mode, because it would
303 * cause trouble later on when we turn on paging anyway.)
304 *
305 * A real CPU would silently accept an invalid cr3 and would
306 * attempt to use it - with largely undefined (and often hard
307 * to debug) behavior on the guest side.
308 */
309 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
310 inject_gp(vcpu);
311 else {
312 vcpu->cr3 = cr3;
313 vcpu->mmu.new_cr3(vcpu);
314 }
315 mutex_unlock(&vcpu->kvm->lock);
316}
317EXPORT_SYMBOL_GPL(set_cr3);
318
319void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
320{
321 if (cr8 & CR8_RESERVED_BITS) {
322 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
323 inject_gp(vcpu);
324 return;
325 }
326 if (irqchip_in_kernel(vcpu->kvm))
327 kvm_lapic_set_tpr(vcpu, cr8);
328 else
329 vcpu->cr8 = cr8;
330}
331EXPORT_SYMBOL_GPL(set_cr8);
332
333unsigned long get_cr8(struct kvm_vcpu *vcpu)
334{
335 if (irqchip_in_kernel(vcpu->kvm))
336 return kvm_lapic_get_cr8(vcpu);
337 else
338 return vcpu->cr8;
339}
340EXPORT_SYMBOL_GPL(get_cr8);
341
043405e1
CO		 342/*
343 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
344 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
345 *
346 * This list is modified at module load time to reflect the
347 * capabilities of the host cpu.
348 */
349static u32 msrs_to_save[] = {
350 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
351 MSR_K6_STAR,
352#ifdef CONFIG_X86_64
353 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
354#endif
355 MSR_IA32_TIME_STAMP_COUNTER,
356};
357
358static unsigned num_msrs_to_save;
359
360static u32 emulated_msrs[] = {
361 MSR_IA32_MISC_ENABLE,
362};
363
15c4a640
CO		 364#ifdef CONFIG_X86_64
365
366static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
367{
368 if (efer & EFER_RESERVED_BITS) {
369 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
370 efer);
371 inject_gp(vcpu);
372 return;
373 }
374
375 if (is_paging(vcpu)
376 && (vcpu->shadow_efer & EFER_LME) != (efer & EFER_LME)) {
377 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
378 inject_gp(vcpu);
379 return;
380 }
381
382 kvm_x86_ops->set_efer(vcpu, efer);
383
384 efer &= ~EFER_LMA;
385 efer |= vcpu->shadow_efer & EFER_LMA;
386
387 vcpu->shadow_efer = efer;
388}
389
390#endif
391
392/*
393 * Writes msr value into into the appropriate "register".
394 * Returns 0 on success, non-0 otherwise.
395 * Assumes vcpu_load() was already called.
396 */
397int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
398{
399 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
400}
401
313a3dc7
CO		 402/*
403 * Adapt set_msr() to msr_io()'s calling convention
404 */
405static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
406{
407 return kvm_set_msr(vcpu, index, *data);
408}
409
15c4a640
CO		 410
411int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
412{
413 switch (msr) {
414#ifdef CONFIG_X86_64
415 case MSR_EFER:
416 set_efer(vcpu, data);
417 break;
418#endif
419 case MSR_IA32_MC0_STATUS:
420 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
421 __FUNCTION__, data);
422 break;
423 case MSR_IA32_MCG_STATUS:
424 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
425 __FUNCTION__, data);
426 break;
427 case MSR_IA32_UCODE_REV:
428 case MSR_IA32_UCODE_WRITE:
429 case 0x200 ... 0x2ff: /* MTRRs */
430 break;
431 case MSR_IA32_APICBASE:
432 kvm_set_apic_base(vcpu, data);
433 break;
434 case MSR_IA32_MISC_ENABLE:
435 vcpu->ia32_misc_enable_msr = data;
436 break;
437 default:
438 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x\n", msr);
439 return 1;
440 }
441 return 0;
442}
443EXPORT_SYMBOL_GPL(kvm_set_msr_common);
444
445
446/*
447 * Reads an msr value (of 'msr_index') into 'pdata'.
448 * Returns 0 on success, non-0 otherwise.
449 * Assumes vcpu_load() was already called.
450 */
451int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
452{
453 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
454}
455
456int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
457{
458 u64 data;
459
460 switch (msr) {
461 case 0xc0010010: /* SYSCFG */
462 case 0xc0010015: /* HWCR */
463 case MSR_IA32_PLATFORM_ID:
464 case MSR_IA32_P5_MC_ADDR:
465 case MSR_IA32_P5_MC_TYPE:
466 case MSR_IA32_MC0_CTL:
467 case MSR_IA32_MCG_STATUS:
468 case MSR_IA32_MCG_CAP:
469 case MSR_IA32_MC0_MISC:
470 case MSR_IA32_MC0_MISC+4:
471 case MSR_IA32_MC0_MISC+8:
472 case MSR_IA32_MC0_MISC+12:
473 case MSR_IA32_MC0_MISC+16:
474 case MSR_IA32_UCODE_REV:
475 case MSR_IA32_PERF_STATUS:
476 case MSR_IA32_EBL_CR_POWERON:
477 /* MTRR registers */
478 case 0xfe:
479 case 0x200 ... 0x2ff:
480 data = 0;
481 break;
482 case 0xcd: /* fsb frequency */
483 data = 3;
484 break;
485 case MSR_IA32_APICBASE:
486 data = kvm_get_apic_base(vcpu);
487 break;
488 case MSR_IA32_MISC_ENABLE:
489 data = vcpu->ia32_misc_enable_msr;
490 break;
491#ifdef CONFIG_X86_64
492 case MSR_EFER:
493 data = vcpu->shadow_efer;
494 break;
495#endif
496 default:
497 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
498 return 1;
499 }
500 *pdata = data;
501 return 0;
502}
503EXPORT_SYMBOL_GPL(kvm_get_msr_common);
504
313a3dc7
CO		 505/*
506 * Read or write a bunch of msrs. All parameters are kernel addresses.
507 *
508 * @return number of msrs set successfully.
509 */
510static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
511 struct kvm_msr_entry *entries,
512 int (*do_msr)(struct kvm_vcpu *vcpu,
513 unsigned index, u64 *data))
514{
515 int i;
516
517 vcpu_load(vcpu);
518
519 for (i = 0; i < msrs->nmsrs; ++i)
520 if (do_msr(vcpu, entries[i].index, &entries[i].data))
521 break;
522
523 vcpu_put(vcpu);
524
525 return i;
526}
527
528/*
529 * Read or write a bunch of msrs. Parameters are user addresses.
530 *
531 * @return number of msrs set successfully.
532 */
533static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
534 int (*do_msr)(struct kvm_vcpu *vcpu,
535 unsigned index, u64 *data),
536 int writeback)
537{
538 struct kvm_msrs msrs;
539 struct kvm_msr_entry *entries;
540 int r, n;
541 unsigned size;
542
543 r = -EFAULT;
544 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
545 goto out;
546
547 r = -E2BIG;
548 if (msrs.nmsrs >= MAX_IO_MSRS)
549 goto out;
550
551 r = -ENOMEM;
552 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
553 entries = vmalloc(size);
554 if (!entries)
555 goto out;
556
557 r = -EFAULT;
558 if (copy_from_user(entries, user_msrs->entries, size))
559 goto out_free;
560
561 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
562 if (r < 0)
563 goto out_free;
564
565 r = -EFAULT;
566 if (writeback && copy_to_user(user_msrs->entries, entries, size))
567 goto out_free;
568
569 r = n;
570
571out_free:
572 vfree(entries);
573out:
574 return r;
575}
576
e9b11c17
ZX		 577/*
578 * Make sure that a cpu that is being hot-unplugged does not have any vcpus
579 * cached on it.
580 */
581void decache_vcpus_on_cpu(int cpu)
582{
583 struct kvm *vm;
584 struct kvm_vcpu *vcpu;
585 int i;
586
587 spin_lock(&kvm_lock);
588 list_for_each_entry(vm, &vm_list, vm_list)
589 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
590 vcpu = vm->vcpus[i];
591 if (!vcpu)
592 continue;
593 /*
594 * If the vcpu is locked, then it is running on some
595 * other cpu and therefore it is not cached on the
596 * cpu in question.
597 *
598 * If it's not locked, check the last cpu it executed
599 * on.
600 */
601 if (mutex_trylock(&vcpu->mutex)) {
602 if (vcpu->cpu == cpu) {
603 kvm_x86_ops->vcpu_decache(vcpu);
604 vcpu->cpu = -1;
605 }
606 mutex_unlock(&vcpu->mutex);
607 }
608 }
609 spin_unlock(&kvm_lock);
610}
611
018d00d2
ZX		 612int kvm_dev_ioctl_check_extension(long ext)
613{
614 int r;
615
616 switch (ext) {
617 case KVM_CAP_IRQCHIP:
618 case KVM_CAP_HLT:
619 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
620 case KVM_CAP_USER_MEMORY:
621 case KVM_CAP_SET_TSS_ADDR:
622 r = 1;
623 break;
624 default:
625 r = 0;
626 break;
627 }
628 return r;
629
630}
631
043405e1
CO		 632long kvm_arch_dev_ioctl(struct file *filp,
633 unsigned int ioctl, unsigned long arg)
634{
635 void __user *argp = (void __user *)arg;
636 long r;
637
638 switch (ioctl) {
639 case KVM_GET_MSR_INDEX_LIST: {
640 struct kvm_msr_list __user *user_msr_list = argp;
641 struct kvm_msr_list msr_list;
642 unsigned n;
643
644 r = -EFAULT;
645 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
646 goto out;
647 n = msr_list.nmsrs;
648 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
649 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
650 goto out;
651 r = -E2BIG;
652 if (n < num_msrs_to_save)
653 goto out;
654 r = -EFAULT;
655 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
656 num_msrs_to_save * sizeof(u32)))
657 goto out;
658 if (copy_to_user(user_msr_list->indices
659 + num_msrs_to_save * sizeof(u32),
660 &emulated_msrs,
661 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
662 goto out;
663 r = 0;
664 break;
665 }
666 default:
667 r = -EINVAL;
668 }
669out:
670 return r;
671}
672
313a3dc7
CO		 673void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
674{
675 kvm_x86_ops->vcpu_load(vcpu, cpu);
676}
677
678void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
679{
680 kvm_x86_ops->vcpu_put(vcpu);
9327fd11 681 kvm_put_guest_fpu(vcpu);
313a3dc7
CO		 682}
683
684static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
685{
686 u64 efer;
687 int i;
688 struct kvm_cpuid_entry *e, *entry;
689
690 rdmsrl(MSR_EFER, efer);
691 entry = NULL;
692 for (i = 0; i < vcpu->cpuid_nent; ++i) {
693 e = &vcpu->cpuid_entries[i];
694 if (e->function == 0x80000001) {
695 entry = e;
696 break;
697 }
698 }
699 if (entry && (entry->edx & (1 << 20)) && !(efer & EFER_NX)) {
700 entry->edx &= ~(1 << 20);
701 printk(KERN_INFO "kvm: guest NX capability removed\n");
702 }
703}
704
705static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
706 struct kvm_cpuid *cpuid,
707 struct kvm_cpuid_entry __user *entries)
708{
709 int r;
710
711 r = -E2BIG;
712 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
713 goto out;
714 r = -EFAULT;
715 if (copy_from_user(&vcpu->cpuid_entries, entries,
716 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
717 goto out;
718 vcpu->cpuid_nent = cpuid->nent;
719 cpuid_fix_nx_cap(vcpu);
720 return 0;
721
722out:
723 return r;
724}
725
726static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
727 struct kvm_lapic_state *s)
728{
729 vcpu_load(vcpu);
730 memcpy(s->regs, vcpu->apic->regs, sizeof *s);
731 vcpu_put(vcpu);
732
733 return 0;
734}
735
736static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
737 struct kvm_lapic_state *s)
738{
739 vcpu_load(vcpu);
740 memcpy(vcpu->apic->regs, s->regs, sizeof *s);
741 kvm_apic_post_state_restore(vcpu);
742 vcpu_put(vcpu);
743
744 return 0;
745}
746
747long kvm_arch_vcpu_ioctl(struct file *filp,
748 unsigned int ioctl, unsigned long arg)
749{
750 struct kvm_vcpu *vcpu = filp->private_data;
751 void __user *argp = (void __user *)arg;
752 int r;
753
754 switch (ioctl) {
755 case KVM_GET_LAPIC: {
756 struct kvm_lapic_state lapic;
757
758 memset(&lapic, 0, sizeof lapic);
759 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
760 if (r)
761 goto out;
762 r = -EFAULT;
763 if (copy_to_user(argp, &lapic, sizeof lapic))
764 goto out;
765 r = 0;
766 break;
767 }
768 case KVM_SET_LAPIC: {
769 struct kvm_lapic_state lapic;
770
771 r = -EFAULT;
772 if (copy_from_user(&lapic, argp, sizeof lapic))
773 goto out;
774 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
775 if (r)
776 goto out;
777 r = 0;
778 break;
779 }
780 case KVM_SET_CPUID: {
781 struct kvm_cpuid __user *cpuid_arg = argp;
782 struct kvm_cpuid cpuid;
783
784 r = -EFAULT;
785 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
786 goto out;
787 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
788 if (r)
789 goto out;
790 break;
791 }
792 case KVM_GET_MSRS:
793 r = msr_io(vcpu, argp, kvm_get_msr, 1);
794 break;
795 case KVM_SET_MSRS:
796 r = msr_io(vcpu, argp, do_set_msr, 0);
797 break;
798 default:
799 r = -EINVAL;
800 }
801out:
802 return r;
803}
804
1fe779f8
CO		 805static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
806{
807 int ret;
808
809 if (addr > (unsigned int)(-3 * PAGE_SIZE))
810 return -1;
811 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
812 return ret;
813}
814
815static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
816 u32 kvm_nr_mmu_pages)
817{
818 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
819 return -EINVAL;
820
821 mutex_lock(&kvm->lock);
822
823 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
824 kvm->n_requested_mmu_pages = kvm_nr_mmu_pages;
825
826 mutex_unlock(&kvm->lock);
827 return 0;
828}
829
830static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
831{
832 return kvm->n_alloc_mmu_pages;
833}
834
835/*
836 * Set a new alias region. Aliases map a portion of physical memory into
837 * another portion. This is useful for memory windows, for example the PC
838 * VGA region.
839 */
840static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
841 struct kvm_memory_alias *alias)
842{
843 int r, n;
844 struct kvm_mem_alias *p;
845
846 r = -EINVAL;
847 /* General sanity checks */
848 if (alias->memory_size & (PAGE_SIZE - 1))
849 goto out;
850 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
851 goto out;
852 if (alias->slot >= KVM_ALIAS_SLOTS)
853 goto out;
854 if (alias->guest_phys_addr + alias->memory_size
855 < alias->guest_phys_addr)
856 goto out;
857 if (alias->target_phys_addr + alias->memory_size
858 < alias->target_phys_addr)
859 goto out;
860
861 mutex_lock(&kvm->lock);
862
863 p = &kvm->aliases[alias->slot];
864 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
865 p->npages = alias->memory_size >> PAGE_SHIFT;
866 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
867
868 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
869 if (kvm->aliases[n - 1].npages)
870 break;
871 kvm->naliases = n;
872
873 kvm_mmu_zap_all(kvm);
874
875 mutex_unlock(&kvm->lock);
876
877 return 0;
878
879out:
880 return r;
881}
882
883static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
884{
885 int r;
886
887 r = 0;
888 switch (chip->chip_id) {
889 case KVM_IRQCHIP_PIC_MASTER:
890 memcpy(&chip->chip.pic,
891 &pic_irqchip(kvm)->pics[0],
892 sizeof(struct kvm_pic_state));
893 break;
894 case KVM_IRQCHIP_PIC_SLAVE:
895 memcpy(&chip->chip.pic,
896 &pic_irqchip(kvm)->pics[1],
897 sizeof(struct kvm_pic_state));
898 break;
899 case KVM_IRQCHIP_IOAPIC:
900 memcpy(&chip->chip.ioapic,
901 ioapic_irqchip(kvm),
902 sizeof(struct kvm_ioapic_state));
903 break;
904 default:
905 r = -EINVAL;
906 break;
907 }
908 return r;
909}
910
911static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
912{
913 int r;
914
915 r = 0;
916 switch (chip->chip_id) {
917 case KVM_IRQCHIP_PIC_MASTER:
918 memcpy(&pic_irqchip(kvm)->pics[0],
919 &chip->chip.pic,
920 sizeof(struct kvm_pic_state));
921 break;
922 case KVM_IRQCHIP_PIC_SLAVE:
923 memcpy(&pic_irqchip(kvm)->pics[1],
924 &chip->chip.pic,
925 sizeof(struct kvm_pic_state));
926 break;
927 case KVM_IRQCHIP_IOAPIC:
928 memcpy(ioapic_irqchip(kvm),
929 &chip->chip.ioapic,
930 sizeof(struct kvm_ioapic_state));
931 break;
932 default:
933 r = -EINVAL;
934 break;
935 }
936 kvm_pic_update_irq(pic_irqchip(kvm));
937 return r;
938}
939
5bb064dc
ZX		 940/*
941 * Get (and clear) the dirty memory log for a memory slot.
942 */
943int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
944 struct kvm_dirty_log *log)
945{
946 int r;
947 int n;
948 struct kvm_memory_slot *memslot;
949 int is_dirty = 0;
950
951 mutex_lock(&kvm->lock);
952
953 r = kvm_get_dirty_log(kvm, log, &is_dirty);
954 if (r)
955 goto out;
956
957 /* If nothing is dirty, don't bother messing with page tables. */
958 if (is_dirty) {
959 kvm_mmu_slot_remove_write_access(kvm, log->slot);
960 kvm_flush_remote_tlbs(kvm);
961 memslot = &kvm->memslots[log->slot];
962 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
963 memset(memslot->dirty_bitmap, 0, n);
964 }
965 r = 0;
966out:
967 mutex_unlock(&kvm->lock);
968 return r;
969}
970
1fe779f8
CO		 971long kvm_arch_vm_ioctl(struct file *filp,
972 unsigned int ioctl, unsigned long arg)
973{
974 struct kvm *kvm = filp->private_data;
975 void __user *argp = (void __user *)arg;
976 int r = -EINVAL;
977
978 switch (ioctl) {
979 case KVM_SET_TSS_ADDR:
980 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
981 if (r < 0)
982 goto out;
983 break;
984 case KVM_SET_MEMORY_REGION: {
985 struct kvm_memory_region kvm_mem;
986 struct kvm_userspace_memory_region kvm_userspace_mem;
987
988 r = -EFAULT;
989 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
990 goto out;
991 kvm_userspace_mem.slot = kvm_mem.slot;
992 kvm_userspace_mem.flags = kvm_mem.flags;
993 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
994 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
995 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
996 if (r)
997 goto out;
998 break;
999 }
1000 case KVM_SET_NR_MMU_PAGES:
1001 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1002 if (r)
1003 goto out;
1004 break;
1005 case KVM_GET_NR_MMU_PAGES:
1006 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1007 break;
1008 case KVM_SET_MEMORY_ALIAS: {
1009 struct kvm_memory_alias alias;
1010
1011 r = -EFAULT;
1012 if (copy_from_user(&alias, argp, sizeof alias))
1013 goto out;
1014 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
1015 if (r)
1016 goto out;
1017 break;
1018 }
1019 case KVM_CREATE_IRQCHIP:
1020 r = -ENOMEM;
1021 kvm->vpic = kvm_create_pic(kvm);
1022 if (kvm->vpic) {
1023 r = kvm_ioapic_init(kvm);
1024 if (r) {
1025 kfree(kvm->vpic);
1026 kvm->vpic = NULL;
1027 goto out;
1028 }
1029 } else
1030 goto out;
1031 break;
1032 case KVM_IRQ_LINE: {
1033 struct kvm_irq_level irq_event;
1034
1035 r = -EFAULT;
1036 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1037 goto out;
1038 if (irqchip_in_kernel(kvm)) {
1039 mutex_lock(&kvm->lock);
1040 if (irq_event.irq < 16)
1041 kvm_pic_set_irq(pic_irqchip(kvm),
1042 irq_event.irq,
1043 irq_event.level);
1044 kvm_ioapic_set_irq(kvm->vioapic,
1045 irq_event.irq,
1046 irq_event.level);
1047 mutex_unlock(&kvm->lock);
1048 r = 0;
1049 }
1050 break;
1051 }
1052 case KVM_GET_IRQCHIP: {
1053 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1054 struct kvm_irqchip chip;
1055
1056 r = -EFAULT;
1057 if (copy_from_user(&chip, argp, sizeof chip))
1058 goto out;
1059 r = -ENXIO;
1060 if (!irqchip_in_kernel(kvm))
1061 goto out;
1062 r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
1063 if (r)
1064 goto out;
1065 r = -EFAULT;
1066 if (copy_to_user(argp, &chip, sizeof chip))
1067 goto out;
1068 r = 0;
1069 break;
1070 }
1071 case KVM_SET_IRQCHIP: {
1072 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1073 struct kvm_irqchip chip;
1074
1075 r = -EFAULT;
1076 if (copy_from_user(&chip, argp, sizeof chip))
1077 goto out;
1078 r = -ENXIO;
1079 if (!irqchip_in_kernel(kvm))
1080 goto out;
1081 r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
1082 if (r)
1083 goto out;
1084 r = 0;
1085 break;
1086 }
1087 default:
1088 ;
1089 }
1090out:
1091 return r;
1092}
1093
a16b043c 1094static void kvm_init_msr_list(void)
043405e1
CO		 1095{
1096 u32 dummy[2];
1097 unsigned i, j;
1098
1099 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1100 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1101 continue;
1102 if (j < i)
1103 msrs_to_save[j] = msrs_to_save[i];
1104 j++;
1105 }
1106 num_msrs_to_save = j;
1107}
1108
bbd9b64e
CO		 1109/*
1110 * Only apic need an MMIO device hook, so shortcut now..
1111 */
1112static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1113 gpa_t addr)
1114{
1115 struct kvm_io_device *dev;
1116
1117 if (vcpu->apic) {
1118 dev = &vcpu->apic->dev;
1119 if (dev->in_range(dev, addr))
1120 return dev;
1121 }
1122 return NULL;
1123}
1124
1125
1126static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1127 gpa_t addr)
1128{
1129 struct kvm_io_device *dev;
1130
1131 dev = vcpu_find_pervcpu_dev(vcpu, addr);
1132 if (dev == NULL)
1133 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
1134 return dev;
1135}
1136
1137int emulator_read_std(unsigned long addr,
1138 void *val,
1139 unsigned int bytes,
1140 struct kvm_vcpu *vcpu)
1141{
1142 void *data = val;
1143
1144 while (bytes) {
1145 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1146 unsigned offset = addr & (PAGE_SIZE-1);
1147 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1148 int ret;
1149
1150 if (gpa == UNMAPPED_GVA)
1151 return X86EMUL_PROPAGATE_FAULT;
1152 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
1153 if (ret < 0)
1154 return X86EMUL_UNHANDLEABLE;
1155
1156 bytes -= tocopy;
1157 data += tocopy;
1158 addr += tocopy;
1159 }
1160
1161 return X86EMUL_CONTINUE;
1162}
1163EXPORT_SYMBOL_GPL(emulator_read_std);
1164
1165static int emulator_write_std(unsigned long addr,
1166 const void *val,
1167 unsigned int bytes,
1168 struct kvm_vcpu *vcpu)
1169{
1170 pr_unimpl(vcpu, "emulator_write_std: addr %lx n %d\n", addr, bytes);
1171 return X86EMUL_UNHANDLEABLE;
1172}
1173
1174static int emulator_read_emulated(unsigned long addr,
1175 void *val,
1176 unsigned int bytes,
1177 struct kvm_vcpu *vcpu)
1178{
1179 struct kvm_io_device *mmio_dev;
1180 gpa_t gpa;
1181
1182 if (vcpu->mmio_read_completed) {
1183 memcpy(val, vcpu->mmio_data, bytes);
1184 vcpu->mmio_read_completed = 0;
1185 return X86EMUL_CONTINUE;
1186 }
1187
1188 gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1189
1190 /* For APIC access vmexit */
1191 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1192 goto mmio;
1193
1194 if (emulator_read_std(addr, val, bytes, vcpu)
1195 == X86EMUL_CONTINUE)
1196 return X86EMUL_CONTINUE;
1197 if (gpa == UNMAPPED_GVA)
1198 return X86EMUL_PROPAGATE_FAULT;
1199
1200mmio:
1201 /*
1202 * Is this MMIO handled locally?
1203 */
1204 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1205 if (mmio_dev) {
1206 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
1207 return X86EMUL_CONTINUE;
1208 }
1209
1210 vcpu->mmio_needed = 1;
1211 vcpu->mmio_phys_addr = gpa;
1212 vcpu->mmio_size = bytes;
1213 vcpu->mmio_is_write = 0;
1214
1215 return X86EMUL_UNHANDLEABLE;
1216}
1217
1218static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1219 const void *val, int bytes)
1220{
1221 int ret;
1222
1223 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
1224 if (ret < 0)
1225 return 0;
1226 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
1227 return 1;
1228}
1229
1230static int emulator_write_emulated_onepage(unsigned long addr,
1231 const void *val,
1232 unsigned int bytes,
1233 struct kvm_vcpu *vcpu)
1234{
1235 struct kvm_io_device *mmio_dev;
1236 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1237
1238 if (gpa == UNMAPPED_GVA) {
1239 kvm_x86_ops->inject_page_fault(vcpu, addr, 2);
1240 return X86EMUL_PROPAGATE_FAULT;
1241 }
1242
1243 /* For APIC access vmexit */
1244 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1245 goto mmio;
1246
1247 if (emulator_write_phys(vcpu, gpa, val, bytes))
1248 return X86EMUL_CONTINUE;
1249
1250mmio:
1251 /*
1252 * Is this MMIO handled locally?
1253 */
1254 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1255 if (mmio_dev) {
1256 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
1257 return X86EMUL_CONTINUE;
1258 }
1259
1260 vcpu->mmio_needed = 1;
1261 vcpu->mmio_phys_addr = gpa;
1262 vcpu->mmio_size = bytes;
1263 vcpu->mmio_is_write = 1;
1264 memcpy(vcpu->mmio_data, val, bytes);
1265
1266 return X86EMUL_CONTINUE;
1267}
1268
1269int emulator_write_emulated(unsigned long addr,
1270 const void *val,
1271 unsigned int bytes,
1272 struct kvm_vcpu *vcpu)
1273{
1274 /* Crossing a page boundary? */
1275 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
1276 int rc, now;
1277
1278 now = -addr & ~PAGE_MASK;
1279 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
1280 if (rc != X86EMUL_CONTINUE)
1281 return rc;
1282 addr += now;
1283 val += now;
1284 bytes -= now;
1285 }
1286 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
1287}
1288EXPORT_SYMBOL_GPL(emulator_write_emulated);
1289
1290static int emulator_cmpxchg_emulated(unsigned long addr,
1291 const void *old,
1292 const void *new,
1293 unsigned int bytes,
1294 struct kvm_vcpu *vcpu)
1295{
1296 static int reported;
1297
1298 if (!reported) {
1299 reported = 1;
1300 printk(KERN_WARNING "kvm: emulating exchange as write\n");
1301 }
1302 return emulator_write_emulated(addr, new, bytes, vcpu);
1303}
1304
1305static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
1306{
1307 return kvm_x86_ops->get_segment_base(vcpu, seg);
1308}
1309
1310int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
1311{
1312 return X86EMUL_CONTINUE;
1313}
1314
1315int emulate_clts(struct kvm_vcpu *vcpu)
1316{
1317 kvm_x86_ops->set_cr0(vcpu, vcpu->cr0 & ~X86_CR0_TS);
1318 return X86EMUL_CONTINUE;
1319}
1320
1321int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
1322{
1323 struct kvm_vcpu *vcpu = ctxt->vcpu;
1324
1325 switch (dr) {
1326 case 0 ... 3:
1327 *dest = kvm_x86_ops->get_dr(vcpu, dr);
1328 return X86EMUL_CONTINUE;
1329 default:
1330 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
1331 return X86EMUL_UNHANDLEABLE;
1332 }
1333}
1334
1335int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
1336{
1337 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
1338 int exception;
1339
1340 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
1341 if (exception) {
1342 /* FIXME: better handling */
1343 return X86EMUL_UNHANDLEABLE;
1344 }
1345 return X86EMUL_CONTINUE;
1346}
1347
1348void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
1349{
1350 static int reported;
1351 u8 opcodes[4];
1352 unsigned long rip = vcpu->rip;
1353 unsigned long rip_linear;
1354
1355 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
1356
1357 if (reported)
1358 return;
1359
1360 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
1361
1362 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
1363 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
1364 reported = 1;
1365}
1366EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
1367
1368struct x86_emulate_ops emulate_ops = {
1369 .read_std = emulator_read_std,
1370 .write_std = emulator_write_std,
1371 .read_emulated = emulator_read_emulated,
1372 .write_emulated = emulator_write_emulated,
1373 .cmpxchg_emulated = emulator_cmpxchg_emulated,
1374};
1375
1376int emulate_instruction(struct kvm_vcpu *vcpu,
1377 struct kvm_run *run,
1378 unsigned long cr2,
1379 u16 error_code,
1380 int no_decode)
1381{
1382 int r;
1383
1384 vcpu->mmio_fault_cr2 = cr2;
1385 kvm_x86_ops->cache_regs(vcpu);
1386
1387 vcpu->mmio_is_write = 0;
1388 vcpu->pio.string = 0;
1389
1390 if (!no_decode) {
1391 int cs_db, cs_l;
1392 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
1393
1394 vcpu->emulate_ctxt.vcpu = vcpu;
1395 vcpu->emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
1396 vcpu->emulate_ctxt.cr2 = cr2;
1397 vcpu->emulate_ctxt.mode =
1398 (vcpu->emulate_ctxt.eflags & X86_EFLAGS_VM)
1399 ? X86EMUL_MODE_REAL : cs_l
1400 ? X86EMUL_MODE_PROT64 : cs_db
1401 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
1402
1403 if (vcpu->emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
1404 vcpu->emulate_ctxt.cs_base = 0;
1405 vcpu->emulate_ctxt.ds_base = 0;
1406 vcpu->emulate_ctxt.es_base = 0;
1407 vcpu->emulate_ctxt.ss_base = 0;
1408 } else {
1409 vcpu->emulate_ctxt.cs_base =
1410 get_segment_base(vcpu, VCPU_SREG_CS);
1411 vcpu->emulate_ctxt.ds_base =
1412 get_segment_base(vcpu, VCPU_SREG_DS);
1413 vcpu->emulate_ctxt.es_base =
1414 get_segment_base(vcpu, VCPU_SREG_ES);
1415 vcpu->emulate_ctxt.ss_base =
1416 get_segment_base(vcpu, VCPU_SREG_SS);
1417 }
1418
1419 vcpu->emulate_ctxt.gs_base =
1420 get_segment_base(vcpu, VCPU_SREG_GS);
1421 vcpu->emulate_ctxt.fs_base =
1422 get_segment_base(vcpu, VCPU_SREG_FS);
1423
1424 r = x86_decode_insn(&vcpu->emulate_ctxt, &emulate_ops);
f2b5756b 1425 ++vcpu->stat.insn_emulation;
bbd9b64e 1426 if (r) {
f2b5756b 1427 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO		 1428 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1429 return EMULATE_DONE;
1430 return EMULATE_FAIL;
1431 }
1432 }
1433
1434 r = x86_emulate_insn(&vcpu->emulate_ctxt, &emulate_ops);
1435
1436 if (vcpu->pio.string)
1437 return EMULATE_DO_MMIO;
1438
1439 if ((r || vcpu->mmio_is_write) && run) {
1440 run->exit_reason = KVM_EXIT_MMIO;
1441 run->mmio.phys_addr = vcpu->mmio_phys_addr;
1442 memcpy(run->mmio.data, vcpu->mmio_data, 8);
1443 run->mmio.len = vcpu->mmio_size;
1444 run->mmio.is_write = vcpu->mmio_is_write;
1445 }
1446
1447 if (r) {
1448 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1449 return EMULATE_DONE;
1450 if (!vcpu->mmio_needed) {
1451 kvm_report_emulation_failure(vcpu, "mmio");
1452 return EMULATE_FAIL;
1453 }
1454 return EMULATE_DO_MMIO;
1455 }
1456
1457 kvm_x86_ops->decache_regs(vcpu);
1458 kvm_x86_ops->set_rflags(vcpu, vcpu->emulate_ctxt.eflags);
1459
1460 if (vcpu->mmio_is_write) {
1461 vcpu->mmio_needed = 0;
1462 return EMULATE_DO_MMIO;
1463 }
1464
1465 return EMULATE_DONE;
1466}
1467EXPORT_SYMBOL_GPL(emulate_instruction);
1468
de7d789a
CO		 1469static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
1470{
1471 int i;
1472
1473 for (i = 0; i < ARRAY_SIZE(vcpu->pio.guest_pages); ++i)
1474 if (vcpu->pio.guest_pages[i]) {
b4231d61 1475 kvm_release_page_dirty(vcpu->pio.guest_pages[i]);
de7d789a
CO		 1476 vcpu->pio.guest_pages[i] = NULL;
1477 }
1478}
1479
1480static int pio_copy_data(struct kvm_vcpu *vcpu)
1481{
1482 void *p = vcpu->pio_data;
1483 void *q;
1484 unsigned bytes;
1485 int nr_pages = vcpu->pio.guest_pages[1] ? 2 : 1;
1486
1487 q = vmap(vcpu->pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
1488 PAGE_KERNEL);
1489 if (!q) {
1490 free_pio_guest_pages(vcpu);
1491 return -ENOMEM;
1492 }
1493 q += vcpu->pio.guest_page_offset;
1494 bytes = vcpu->pio.size * vcpu->pio.cur_count;
1495 if (vcpu->pio.in)
1496 memcpy(q, p, bytes);
1497 else
1498 memcpy(p, q, bytes);
1499 q -= vcpu->pio.guest_page_offset;
1500 vunmap(q);
1501 free_pio_guest_pages(vcpu);
1502 return 0;
1503}
1504
1505int complete_pio(struct kvm_vcpu *vcpu)
1506{
1507 struct kvm_pio_request *io = &vcpu->pio;
1508 long delta;
1509 int r;
1510
1511 kvm_x86_ops->cache_regs(vcpu);
1512
1513 if (!io->string) {
1514 if (io->in)
1515 memcpy(&vcpu->regs[VCPU_REGS_RAX], vcpu->pio_data,
1516 io->size);
1517 } else {
1518 if (io->in) {
1519 r = pio_copy_data(vcpu);
1520 if (r) {
1521 kvm_x86_ops->cache_regs(vcpu);
1522 return r;
1523 }
1524 }
1525
1526 delta = 1;
1527 if (io->rep) {
1528 delta *= io->cur_count;
1529 /*
1530 * The size of the register should really depend on
1531 * current address size.
1532 */
1533 vcpu->regs[VCPU_REGS_RCX] -= delta;
1534 }
1535 if (io->down)
1536 delta = -delta;
1537 delta *= io->size;
1538 if (io->in)
1539 vcpu->regs[VCPU_REGS_RDI] += delta;
1540 else
1541 vcpu->regs[VCPU_REGS_RSI] += delta;
1542 }
1543
1544 kvm_x86_ops->decache_regs(vcpu);
1545
1546 io->count -= io->cur_count;
1547 io->cur_count = 0;
1548
1549 return 0;
1550}
1551
1552static void kernel_pio(struct kvm_io_device *pio_dev,
1553 struct kvm_vcpu *vcpu,
1554 void *pd)
1555{
1556 /* TODO: String I/O for in kernel device */
1557
1558 mutex_lock(&vcpu->kvm->lock);
1559 if (vcpu->pio.in)
1560 kvm_iodevice_read(pio_dev, vcpu->pio.port,
1561 vcpu->pio.size,
1562 pd);
1563 else
1564 kvm_iodevice_write(pio_dev, vcpu->pio.port,
1565 vcpu->pio.size,
1566 pd);
1567 mutex_unlock(&vcpu->kvm->lock);
1568}
1569
1570static void pio_string_write(struct kvm_io_device *pio_dev,
1571 struct kvm_vcpu *vcpu)
1572{
1573 struct kvm_pio_request *io = &vcpu->pio;
1574 void *pd = vcpu->pio_data;
1575 int i;
1576
1577 mutex_lock(&vcpu->kvm->lock);
1578 for (i = 0; i < io->cur_count; i++) {
1579 kvm_iodevice_write(pio_dev, io->port,
1580 io->size,
1581 pd);
1582 pd += io->size;
1583 }
1584 mutex_unlock(&vcpu->kvm->lock);
1585}
1586
1587static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
1588 gpa_t addr)
1589{
1590 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
1591}
1592
1593int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
1594 int size, unsigned port)
1595{
1596 struct kvm_io_device *pio_dev;
1597
1598 vcpu->run->exit_reason = KVM_EXIT_IO;
1599 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1600 vcpu->run->io.size = vcpu->pio.size = size;
1601 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
1602 vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = 1;
1603 vcpu->run->io.port = vcpu->pio.port = port;
1604 vcpu->pio.in = in;
1605 vcpu->pio.string = 0;
1606 vcpu->pio.down = 0;
1607 vcpu->pio.guest_page_offset = 0;
1608 vcpu->pio.rep = 0;
1609
1610 kvm_x86_ops->cache_regs(vcpu);
1611 memcpy(vcpu->pio_data, &vcpu->regs[VCPU_REGS_RAX], 4);
1612 kvm_x86_ops->decache_regs(vcpu);
1613
1614 kvm_x86_ops->skip_emulated_instruction(vcpu);
1615
1616 pio_dev = vcpu_find_pio_dev(vcpu, port);
1617 if (pio_dev) {
1618 kernel_pio(pio_dev, vcpu, vcpu->pio_data);
1619 complete_pio(vcpu);
1620 return 1;
1621 }
1622 return 0;
1623}
1624EXPORT_SYMBOL_GPL(kvm_emulate_pio);
1625
1626int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
1627 int size, unsigned long count, int down,
1628 gva_t address, int rep, unsigned port)
1629{
1630 unsigned now, in_page;
1631 int i, ret = 0;
1632 int nr_pages = 1;
1633 struct page *page;
1634 struct kvm_io_device *pio_dev;
1635
1636 vcpu->run->exit_reason = KVM_EXIT_IO;
1637 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1638 vcpu->run->io.size = vcpu->pio.size = size;
1639 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
1640 vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = count;
1641 vcpu->run->io.port = vcpu->pio.port = port;
1642 vcpu->pio.in = in;
1643 vcpu->pio.string = 1;
1644 vcpu->pio.down = down;
1645 vcpu->pio.guest_page_offset = offset_in_page(address);
1646 vcpu->pio.rep = rep;
1647
1648 if (!count) {
1649 kvm_x86_ops->skip_emulated_instruction(vcpu);
1650 return 1;
1651 }
1652
1653 if (!down)
1654 in_page = PAGE_SIZE - offset_in_page(address);
1655 else
1656 in_page = offset_in_page(address) + size;
1657 now = min(count, (unsigned long)in_page / size);
1658 if (!now) {
1659 /*
1660 * String I/O straddles page boundary. Pin two guest pages
1661 * so that we satisfy atomicity constraints. Do just one
1662 * transaction to avoid complexity.
1663 */
1664 nr_pages = 2;
1665 now = 1;
1666 }
1667 if (down) {
1668 /*
1669 * String I/O in reverse. Yuck. Kill the guest, fix later.
1670 */
1671 pr_unimpl(vcpu, "guest string pio down\n");
1672 inject_gp(vcpu);
1673 return 1;
1674 }
1675 vcpu->run->io.count = now;
1676 vcpu->pio.cur_count = now;
1677
1678 if (vcpu->pio.cur_count == vcpu->pio.count)
1679 kvm_x86_ops->skip_emulated_instruction(vcpu);
1680
1681 for (i = 0; i < nr_pages; ++i) {
1682 mutex_lock(&vcpu->kvm->lock);
1683 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
1684 vcpu->pio.guest_pages[i] = page;
1685 mutex_unlock(&vcpu->kvm->lock);
1686 if (!page) {
1687 inject_gp(vcpu);
1688 free_pio_guest_pages(vcpu);
1689 return 1;
1690 }
1691 }
1692
1693 pio_dev = vcpu_find_pio_dev(vcpu, port);
1694 if (!vcpu->pio.in) {
1695 /* string PIO write */
1696 ret = pio_copy_data(vcpu);
1697 if (ret >= 0 && pio_dev) {
1698 pio_string_write(pio_dev, vcpu);
1699 complete_pio(vcpu);
1700 if (vcpu->pio.count == 0)
1701 ret = 1;
1702 }
1703 } else if (pio_dev)
1704 pr_unimpl(vcpu, "no string pio read support yet, "
1705 "port %x size %d count %ld\n",
1706 port, size, count);
1707
1708 return ret;
1709}
1710EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
1711
f8c16bba 1712int kvm_arch_init(void *opaque)
043405e1 1713{
56c6d28a 1714 int r;
f8c16bba
ZX		 1715 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
1716
56c6d28a
ZX		 1717 r = kvm_mmu_module_init();
1718 if (r)
1719 goto out_fail;
1720
043405e1 1721 kvm_init_msr_list();
f8c16bba
ZX		 1722
1723 if (kvm_x86_ops) {
1724 printk(KERN_ERR "kvm: already loaded the other module\n");
56c6d28a
ZX		 1725 r = -EEXIST;
1726 goto out;
f8c16bba
ZX		 1727 }
1728
1729 if (!ops->cpu_has_kvm_support()) {
1730 printk(KERN_ERR "kvm: no hardware support\n");
56c6d28a
ZX		 1731 r = -EOPNOTSUPP;
1732 goto out;
f8c16bba
ZX		 1733 }
1734 if (ops->disabled_by_bios()) {
1735 printk(KERN_ERR "kvm: disabled by bios\n");
56c6d28a
ZX		 1736 r = -EOPNOTSUPP;
1737 goto out;
f8c16bba
ZX		 1738 }
1739
1740 kvm_x86_ops = ops;
56c6d28a 1741 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
f8c16bba 1742 return 0;
56c6d28a
ZX		 1743
1744out:
1745 kvm_mmu_module_exit();
1746out_fail:
1747 return r;
043405e1 1748}
8776e519 1749
f8c16bba
ZX		 1750void kvm_arch_exit(void)
1751{
1752 kvm_x86_ops = NULL;
56c6d28a
ZX		 1753 kvm_mmu_module_exit();
1754}
f8c16bba 1755
8776e519
HB		 1756int kvm_emulate_halt(struct kvm_vcpu *vcpu)
1757{
1758 ++vcpu->stat.halt_exits;
1759 if (irqchip_in_kernel(vcpu->kvm)) {
1760 vcpu->mp_state = VCPU_MP_STATE_HALTED;
1761 kvm_vcpu_block(vcpu);
1762 if (vcpu->mp_state != VCPU_MP_STATE_RUNNABLE)
1763 return -EINTR;
1764 return 1;
1765 } else {
1766 vcpu->run->exit_reason = KVM_EXIT_HLT;
1767 return 0;
1768 }
1769}
1770EXPORT_SYMBOL_GPL(kvm_emulate_halt);
1771
1772int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
1773{
1774 unsigned long nr, a0, a1, a2, a3, ret;
1775
1776 kvm_x86_ops->cache_regs(vcpu);
1777
1778 nr = vcpu->regs[VCPU_REGS_RAX];
1779 a0 = vcpu->regs[VCPU_REGS_RBX];
1780 a1 = vcpu->regs[VCPU_REGS_RCX];
1781 a2 = vcpu->regs[VCPU_REGS_RDX];
1782 a3 = vcpu->regs[VCPU_REGS_RSI];
1783
1784 if (!is_long_mode(vcpu)) {
1785 nr &= 0xFFFFFFFF;
1786 a0 &= 0xFFFFFFFF;
1787 a1 &= 0xFFFFFFFF;
1788 a2 &= 0xFFFFFFFF;
1789 a3 &= 0xFFFFFFFF;
1790 }
1791
1792 switch (nr) {
1793 default:
1794 ret = -KVM_ENOSYS;
1795 break;
1796 }
1797 vcpu->regs[VCPU_REGS_RAX] = ret;
1798 kvm_x86_ops->decache_regs(vcpu);
1799 return 0;
1800}
1801EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
1802
1803int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
1804{
1805 char instruction[3];
1806 int ret = 0;
1807
1808 mutex_lock(&vcpu->kvm->lock);
1809
1810 /*
1811 * Blow out the MMU to ensure that no other VCPU has an active mapping
1812 * to ensure that the updated hypercall appears atomically across all
1813 * VCPUs.
1814 */
1815 kvm_mmu_zap_all(vcpu->kvm);
1816
1817 kvm_x86_ops->cache_regs(vcpu);
1818 kvm_x86_ops->patch_hypercall(vcpu, instruction);
1819 if (emulator_write_emulated(vcpu->rip, instruction, 3, vcpu)
1820 != X86EMUL_CONTINUE)
1821 ret = -EFAULT;
1822
1823 mutex_unlock(&vcpu->kvm->lock);
1824
1825 return ret;
1826}
1827
1828static u64 mk_cr_64(u64 curr_cr, u32 new_val)
1829{
1830 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
1831}
1832
1833void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
1834{
1835 struct descriptor_table dt = { limit, base };
1836
1837 kvm_x86_ops->set_gdt(vcpu, &dt);
1838}
1839
1840void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
1841{
1842 struct descriptor_table dt = { limit, base };
1843
1844 kvm_x86_ops->set_idt(vcpu, &dt);
1845}
1846
1847void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
1848 unsigned long *rflags)
1849{
1850 lmsw(vcpu, msw);
1851 *rflags = kvm_x86_ops->get_rflags(vcpu);
1852}
1853
1854unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
1855{
1856 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
1857 switch (cr) {
1858 case 0:
1859 return vcpu->cr0;
1860 case 2:
1861 return vcpu->cr2;
1862 case 3:
1863 return vcpu->cr3;
1864 case 4:
1865 return vcpu->cr4;
1866 default:
1867 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
1868 return 0;
1869 }
1870}
1871
1872void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
1873 unsigned long *rflags)
1874{
1875 switch (cr) {
1876 case 0:
1877 set_cr0(vcpu, mk_cr_64(vcpu->cr0, val));
1878 *rflags = kvm_x86_ops->get_rflags(vcpu);
1879 break;
1880 case 2:
1881 vcpu->cr2 = val;
1882 break;
1883 case 3:
1884 set_cr3(vcpu, val);
1885 break;
1886 case 4:
1887 set_cr4(vcpu, mk_cr_64(vcpu->cr4, val));
1888 break;
1889 default:
1890 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
1891 }
1892}
1893
1894void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
1895{
1896 int i;
1897 u32 function;
1898 struct kvm_cpuid_entry *e, *best;
1899
1900 kvm_x86_ops->cache_regs(vcpu);
1901 function = vcpu->regs[VCPU_REGS_RAX];
1902 vcpu->regs[VCPU_REGS_RAX] = 0;
1903 vcpu->regs[VCPU_REGS_RBX] = 0;
1904 vcpu->regs[VCPU_REGS_RCX] = 0;
1905 vcpu->regs[VCPU_REGS_RDX] = 0;
1906 best = NULL;
1907 for (i = 0; i < vcpu->cpuid_nent; ++i) {
1908 e = &vcpu->cpuid_entries[i];
1909 if (e->function == function) {
1910 best = e;
1911 break;
1912 }
1913 /*
1914 * Both basic or both extended?
1915 */
1916 if (((e->function ^ function) & 0x80000000) == 0)
1917 if (!best || e->function > best->function)
1918 best = e;
1919 }
1920 if (best) {
1921 vcpu->regs[VCPU_REGS_RAX] = best->eax;
1922 vcpu->regs[VCPU_REGS_RBX] = best->ebx;
1923 vcpu->regs[VCPU_REGS_RCX] = best->ecx;
1924 vcpu->regs[VCPU_REGS_RDX] = best->edx;
1925 }
1926 kvm_x86_ops->decache_regs(vcpu);
1927 kvm_x86_ops->skip_emulated_instruction(vcpu);
1928}
1929EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 1930
b6c7a5dc
HB		 1931/*
1932 * Check if userspace requested an interrupt window, and that the
1933 * interrupt window is open.
1934 *
1935 * No need to exit to userspace if we already have an interrupt queued.
1936 */
1937static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1938 struct kvm_run *kvm_run)
1939{
1940 return (!vcpu->irq_summary &&
1941 kvm_run->request_interrupt_window &&
1942 vcpu->interrupt_window_open &&
1943 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
1944}
1945
1946static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1947 struct kvm_run *kvm_run)
1948{
1949 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
1950 kvm_run->cr8 = get_cr8(vcpu);
1951 kvm_run->apic_base = kvm_get_apic_base(vcpu);
1952 if (irqchip_in_kernel(vcpu->kvm))
1953 kvm_run->ready_for_interrupt_injection = 1;
1954 else
1955 kvm_run->ready_for_interrupt_injection =
1956 (vcpu->interrupt_window_open &&
1957 vcpu->irq_summary == 0);
1958}
1959
1960static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1961{
1962 int r;
1963
1964 if (unlikely(vcpu->mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
1965 pr_debug("vcpu %d received sipi with vector # %x\n",
1966 vcpu->vcpu_id, vcpu->sipi_vector);
1967 kvm_lapic_reset(vcpu);
1968 r = kvm_x86_ops->vcpu_reset(vcpu);
1969 if (r)
1970 return r;
1971 vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
1972 }
1973
1974preempted:
1975 if (vcpu->guest_debug.enabled)
1976 kvm_x86_ops->guest_debug_pre(vcpu);
1977
1978again:
1979 r = kvm_mmu_reload(vcpu);
1980 if (unlikely(r))
1981 goto out;
1982
1983 kvm_inject_pending_timer_irqs(vcpu);
1984
1985 preempt_disable();
1986
1987 kvm_x86_ops->prepare_guest_switch(vcpu);
1988 kvm_load_guest_fpu(vcpu);
1989
1990 local_irq_disable();
1991
1992 if (signal_pending(current)) {
1993 local_irq_enable();
1994 preempt_enable();
1995 r = -EINTR;
1996 kvm_run->exit_reason = KVM_EXIT_INTR;
1997 ++vcpu->stat.signal_exits;
1998 goto out;
1999 }
2000
2001 if (irqchip_in_kernel(vcpu->kvm))
2002 kvm_x86_ops->inject_pending_irq(vcpu);
2003 else if (!vcpu->mmio_read_completed)
2004 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
2005
2006 vcpu->guest_mode = 1;
2007 kvm_guest_enter();
2008
2009 if (vcpu->requests)
2010 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2011 kvm_x86_ops->tlb_flush(vcpu);
2012
2013 kvm_x86_ops->run(vcpu, kvm_run);
2014
2015 vcpu->guest_mode = 0;
2016 local_irq_enable();
2017
2018 ++vcpu->stat.exits;
2019
2020 /*
2021 * We must have an instruction between local_irq_enable() and
2022 * kvm_guest_exit(), so the timer interrupt isn't delayed by
2023 * the interrupt shadow. The stat.exits increment will do nicely.
2024 * But we need to prevent reordering, hence this barrier():
2025 */
2026 barrier();
2027
2028 kvm_guest_exit();
2029
2030 preempt_enable();
2031
2032 /*
2033 * Profile KVM exit RIPs:
2034 */
2035 if (unlikely(prof_on == KVM_PROFILING)) {
2036 kvm_x86_ops->cache_regs(vcpu);
2037 profile_hit(KVM_PROFILING, (void *)vcpu->rip);
2038 }
2039
2040 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
2041
2042 if (r > 0) {
2043 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2044 r = -EINTR;
2045 kvm_run->exit_reason = KVM_EXIT_INTR;
2046 ++vcpu->stat.request_irq_exits;
2047 goto out;
2048 }
e1beb1d3 2049 if (!need_resched())
b6c7a5dc 2050 goto again;
b6c7a5dc
HB		 2051 }
2052
2053out:
2054 if (r > 0) {
2055 kvm_resched(vcpu);
2056 goto preempted;
2057 }
2058
2059 post_kvm_run_save(vcpu, kvm_run);
2060
2061 return r;
2062}
2063
2064int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2065{
2066 int r;
2067 sigset_t sigsaved;
2068
2069 vcpu_load(vcpu);
2070
2071 if (unlikely(vcpu->mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
2072 kvm_vcpu_block(vcpu);
2073 vcpu_put(vcpu);
2074 return -EAGAIN;
2075 }
2076
2077 if (vcpu->sigset_active)
2078 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
2079
2080 /* re-sync apic's tpr */
2081 if (!irqchip_in_kernel(vcpu->kvm))
2082 set_cr8(vcpu, kvm_run->cr8);
2083
2084 if (vcpu->pio.cur_count) {
2085 r = complete_pio(vcpu);
2086 if (r)
2087 goto out;
2088 }
2089#if CONFIG_HAS_IOMEM
2090 if (vcpu->mmio_needed) {
2091 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
2092 vcpu->mmio_read_completed = 1;
2093 vcpu->mmio_needed = 0;
2094 r = emulate_instruction(vcpu, kvm_run,
2095 vcpu->mmio_fault_cr2, 0, 1);
2096 if (r == EMULATE_DO_MMIO) {
2097 /*
2098 * Read-modify-write. Back to userspace.
2099 */
2100 r = 0;
2101 goto out;
2102 }
2103 }
2104#endif
2105 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
2106 kvm_x86_ops->cache_regs(vcpu);
2107 vcpu->regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
2108 kvm_x86_ops->decache_regs(vcpu);
2109 }
2110
2111 r = __vcpu_run(vcpu, kvm_run);
2112
2113out:
2114 if (vcpu->sigset_active)
2115 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
2116
2117 vcpu_put(vcpu);
2118 return r;
2119}
2120
2121int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2122{
2123 vcpu_load(vcpu);
2124
2125 kvm_x86_ops->cache_regs(vcpu);
2126
2127 regs->rax = vcpu->regs[VCPU_REGS_RAX];
2128 regs->rbx = vcpu->regs[VCPU_REGS_RBX];
2129 regs->rcx = vcpu->regs[VCPU_REGS_RCX];
2130 regs->rdx = vcpu->regs[VCPU_REGS_RDX];
2131 regs->rsi = vcpu->regs[VCPU_REGS_RSI];
2132 regs->rdi = vcpu->regs[VCPU_REGS_RDI];
2133 regs->rsp = vcpu->regs[VCPU_REGS_RSP];
2134 regs->rbp = vcpu->regs[VCPU_REGS_RBP];
2135#ifdef CONFIG_X86_64
2136 regs->r8 = vcpu->regs[VCPU_REGS_R8];
2137 regs->r9 = vcpu->regs[VCPU_REGS_R9];
2138 regs->r10 = vcpu->regs[VCPU_REGS_R10];
2139 regs->r11 = vcpu->regs[VCPU_REGS_R11];
2140 regs->r12 = vcpu->regs[VCPU_REGS_R12];
2141 regs->r13 = vcpu->regs[VCPU_REGS_R13];
2142 regs->r14 = vcpu->regs[VCPU_REGS_R14];
2143 regs->r15 = vcpu->regs[VCPU_REGS_R15];
2144#endif
2145
2146 regs->rip = vcpu->rip;
2147 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
2148
2149 /*
2150 * Don't leak debug flags in case they were set for guest debugging
2151 */
2152 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
2153 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
2154
2155 vcpu_put(vcpu);
2156
2157 return 0;
2158}
2159
2160int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2161{
2162 vcpu_load(vcpu);
2163
2164 vcpu->regs[VCPU_REGS_RAX] = regs->rax;
2165 vcpu->regs[VCPU_REGS_RBX] = regs->rbx;
2166 vcpu->regs[VCPU_REGS_RCX] = regs->rcx;
2167 vcpu->regs[VCPU_REGS_RDX] = regs->rdx;
2168 vcpu->regs[VCPU_REGS_RSI] = regs->rsi;
2169 vcpu->regs[VCPU_REGS_RDI] = regs->rdi;
2170 vcpu->regs[VCPU_REGS_RSP] = regs->rsp;
2171 vcpu->regs[VCPU_REGS_RBP] = regs->rbp;
2172#ifdef CONFIG_X86_64
2173 vcpu->regs[VCPU_REGS_R8] = regs->r8;
2174 vcpu->regs[VCPU_REGS_R9] = regs->r9;
2175 vcpu->regs[VCPU_REGS_R10] = regs->r10;
2176 vcpu->regs[VCPU_REGS_R11] = regs->r11;
2177 vcpu->regs[VCPU_REGS_R12] = regs->r12;
2178 vcpu->regs[VCPU_REGS_R13] = regs->r13;
2179 vcpu->regs[VCPU_REGS_R14] = regs->r14;
2180 vcpu->regs[VCPU_REGS_R15] = regs->r15;
2181#endif
2182
2183 vcpu->rip = regs->rip;
2184 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
2185
2186 kvm_x86_ops->decache_regs(vcpu);
2187
2188 vcpu_put(vcpu);
2189
2190 return 0;
2191}
2192
2193static void get_segment(struct kvm_vcpu *vcpu,
2194 struct kvm_segment *var, int seg)
2195{
2196 return kvm_x86_ops->get_segment(vcpu, var, seg);
2197}
2198
2199void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
2200{
2201 struct kvm_segment cs;
2202
2203 get_segment(vcpu, &cs, VCPU_SREG_CS);
2204 *db = cs.db;
2205 *l = cs.l;
2206}
2207EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
2208
2209int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
2210 struct kvm_sregs *sregs)
2211{
2212 struct descriptor_table dt;
2213 int pending_vec;
2214
2215 vcpu_load(vcpu);
2216
2217 get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2218 get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2219 get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2220 get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2221 get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2222 get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2223
2224 get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2225 get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2226
2227 kvm_x86_ops->get_idt(vcpu, &dt);
2228 sregs->idt.limit = dt.limit;
2229 sregs->idt.base = dt.base;
2230 kvm_x86_ops->get_gdt(vcpu, &dt);
2231 sregs->gdt.limit = dt.limit;
2232 sregs->gdt.base = dt.base;
2233
2234 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2235 sregs->cr0 = vcpu->cr0;
2236 sregs->cr2 = vcpu->cr2;
2237 sregs->cr3 = vcpu->cr3;
2238 sregs->cr4 = vcpu->cr4;
2239 sregs->cr8 = get_cr8(vcpu);
2240 sregs->efer = vcpu->shadow_efer;
2241 sregs->apic_base = kvm_get_apic_base(vcpu);
2242
2243 if (irqchip_in_kernel(vcpu->kvm)) {
2244 memset(sregs->interrupt_bitmap, 0,
2245 sizeof sregs->interrupt_bitmap);
2246 pending_vec = kvm_x86_ops->get_irq(vcpu);
2247 if (pending_vec >= 0)
2248 set_bit(pending_vec,
2249 (unsigned long *)sregs->interrupt_bitmap);
2250 } else
2251 memcpy(sregs->interrupt_bitmap, vcpu->irq_pending,
2252 sizeof sregs->interrupt_bitmap);
2253
2254 vcpu_put(vcpu);
2255
2256 return 0;
2257}
2258
2259static void set_segment(struct kvm_vcpu *vcpu,
2260 struct kvm_segment *var, int seg)
2261{
2262 return kvm_x86_ops->set_segment(vcpu, var, seg);
2263}
2264
2265int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
2266 struct kvm_sregs *sregs)
2267{
2268 int mmu_reset_needed = 0;
2269 int i, pending_vec, max_bits;
2270 struct descriptor_table dt;
2271
2272 vcpu_load(vcpu);
2273
2274 dt.limit = sregs->idt.limit;
2275 dt.base = sregs->idt.base;
2276 kvm_x86_ops->set_idt(vcpu, &dt);
2277 dt.limit = sregs->gdt.limit;
2278 dt.base = sregs->gdt.base;
2279 kvm_x86_ops->set_gdt(vcpu, &dt);
2280
2281 vcpu->cr2 = sregs->cr2;
2282 mmu_reset_needed |= vcpu->cr3 != sregs->cr3;
2283 vcpu->cr3 = sregs->cr3;
2284
2285 set_cr8(vcpu, sregs->cr8);
2286
2287 mmu_reset_needed |= vcpu->shadow_efer != sregs->efer;
2288#ifdef CONFIG_X86_64
2289 kvm_x86_ops->set_efer(vcpu, sregs->efer);
2290#endif
2291 kvm_set_apic_base(vcpu, sregs->apic_base);
2292
2293 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2294
2295 mmu_reset_needed |= vcpu->cr0 != sregs->cr0;
2296 vcpu->cr0 = sregs->cr0;
2297 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
2298
2299 mmu_reset_needed |= vcpu->cr4 != sregs->cr4;
2300 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
2301 if (!is_long_mode(vcpu) && is_pae(vcpu))
2302 load_pdptrs(vcpu, vcpu->cr3);
2303
2304 if (mmu_reset_needed)
2305 kvm_mmu_reset_context(vcpu);
2306
2307 if (!irqchip_in_kernel(vcpu->kvm)) {
2308 memcpy(vcpu->irq_pending, sregs->interrupt_bitmap,
2309 sizeof vcpu->irq_pending);
2310 vcpu->irq_summary = 0;
2311 for (i = 0; i < ARRAY_SIZE(vcpu->irq_pending); ++i)
2312 if (vcpu->irq_pending[i])
2313 __set_bit(i, &vcpu->irq_summary);
2314 } else {
2315 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
2316 pending_vec = find_first_bit(
2317 (const unsigned long *)sregs->interrupt_bitmap,
2318 max_bits);
2319 /* Only pending external irq is handled here */
2320 if (pending_vec < max_bits) {
2321 kvm_x86_ops->set_irq(vcpu, pending_vec);
2322 pr_debug("Set back pending irq %d\n",
2323 pending_vec);
2324 }
2325 }
2326
2327 set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2328 set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2329 set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2330 set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2331 set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2332 set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2333
2334 set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2335 set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2336
2337 vcpu_put(vcpu);
2338
2339 return 0;
2340}
2341
2342int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
2343 struct kvm_debug_guest *dbg)
2344{
2345 int r;
2346
2347 vcpu_load(vcpu);
2348
2349 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
2350
2351 vcpu_put(vcpu);
2352
2353 return r;
2354}
2355
d0752060
HB		 2356/*
2357 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
2358 * we have asm/x86/processor.h
2359 */
2360struct fxsave {
2361 u16 cwd;
2362 u16 swd;
2363 u16 twd;
2364 u16 fop;
2365 u64 rip;
2366 u64 rdp;
2367 u32 mxcsr;
2368 u32 mxcsr_mask;
2369 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
2370#ifdef CONFIG_X86_64
2371 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
2372#else
2373 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
2374#endif
2375};
2376
8b006791
ZX		 2377/*
2378 * Translate a guest virtual address to a guest physical address.
2379 */
2380int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
2381 struct kvm_translation *tr)
2382{
2383 unsigned long vaddr = tr->linear_address;
2384 gpa_t gpa;
2385
2386 vcpu_load(vcpu);
2387 mutex_lock(&vcpu->kvm->lock);
2388 gpa = vcpu->mmu.gva_to_gpa(vcpu, vaddr);
2389 tr->physical_address = gpa;
2390 tr->valid = gpa != UNMAPPED_GVA;
2391 tr->writeable = 1;
2392 tr->usermode = 0;
2393 mutex_unlock(&vcpu->kvm->lock);
2394 vcpu_put(vcpu);
2395
2396 return 0;
2397}
2398
d0752060
HB		 2399int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2400{
2401 struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
2402
2403 vcpu_load(vcpu);
2404
2405 memcpy(fpu->fpr, fxsave->st_space, 128);
2406 fpu->fcw = fxsave->cwd;
2407 fpu->fsw = fxsave->swd;
2408 fpu->ftwx = fxsave->twd;
2409 fpu->last_opcode = fxsave->fop;
2410 fpu->last_ip = fxsave->rip;
2411 fpu->last_dp = fxsave->rdp;
2412 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
2413
2414 vcpu_put(vcpu);
2415
2416 return 0;
2417}
2418
2419int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2420{
2421 struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
2422
2423 vcpu_load(vcpu);
2424
2425 memcpy(fxsave->st_space, fpu->fpr, 128);
2426 fxsave->cwd = fpu->fcw;
2427 fxsave->swd = fpu->fsw;
2428 fxsave->twd = fpu->ftwx;
2429 fxsave->fop = fpu->last_opcode;
2430 fxsave->rip = fpu->last_ip;
2431 fxsave->rdp = fpu->last_dp;
2432 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
2433
2434 vcpu_put(vcpu);
2435
2436 return 0;
2437}
2438
2439void fx_init(struct kvm_vcpu *vcpu)
2440{
2441 unsigned after_mxcsr_mask;
2442
2443 /* Initialize guest FPU by resetting ours and saving into guest's */
2444 preempt_disable();
2445 fx_save(&vcpu->host_fx_image);
2446 fpu_init();
2447 fx_save(&vcpu->guest_fx_image);
2448 fx_restore(&vcpu->host_fx_image);
2449 preempt_enable();
2450
2451 vcpu->cr0 |= X86_CR0_ET;
2452 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
2453 vcpu->guest_fx_image.mxcsr = 0x1f80;
2454 memset((void *)&vcpu->guest_fx_image + after_mxcsr_mask,
2455 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
2456}
2457EXPORT_SYMBOL_GPL(fx_init);
2458
2459void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
2460{
2461 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
2462 return;
2463
2464 vcpu->guest_fpu_loaded = 1;
2465 fx_save(&vcpu->host_fx_image);
2466 fx_restore(&vcpu->guest_fx_image);
2467}
2468EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
2469
2470void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
2471{
2472 if (!vcpu->guest_fpu_loaded)
2473 return;
2474
2475 vcpu->guest_fpu_loaded = 0;
2476 fx_save(&vcpu->guest_fx_image);
2477 fx_restore(&vcpu->host_fx_image);
f096ed85 2478 ++vcpu->stat.fpu_reload;
d0752060
HB		 2479}
2480EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX		 2481
2482void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
2483{
2484 kvm_x86_ops->vcpu_free(vcpu);
2485}
2486
2487struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
2488 unsigned int id)
2489{
2490 int r;
2491 struct kvm_vcpu *vcpu = kvm_x86_ops->vcpu_create(kvm, id);
2492
2493 if (IS_ERR(vcpu)) {
2494 r = -ENOMEM;
2495 goto fail;
2496 }
2497
2498 /* We do fxsave: this must be aligned. */
2499 BUG_ON((unsigned long)&vcpu->host_fx_image & 0xF);
2500
2501 vcpu_load(vcpu);
2502 r = kvm_arch_vcpu_reset(vcpu);
2503 if (r == 0)
2504 r = kvm_mmu_setup(vcpu);
2505 vcpu_put(vcpu);
2506 if (r < 0)
2507 goto free_vcpu;
2508
2509 return vcpu;
2510free_vcpu:
2511 kvm_x86_ops->vcpu_free(vcpu);
2512fail:
2513 return ERR_PTR(r);
2514}
2515
d40ccc62 2516void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
e9b11c17
ZX		 2517{
2518 vcpu_load(vcpu);
2519 kvm_mmu_unload(vcpu);
2520 vcpu_put(vcpu);
2521
2522 kvm_x86_ops->vcpu_free(vcpu);
2523}
2524
2525int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
2526{
2527 return kvm_x86_ops->vcpu_reset(vcpu);
2528}
2529
2530void kvm_arch_hardware_enable(void *garbage)
2531{
2532 kvm_x86_ops->hardware_enable(garbage);
2533}
2534
2535void kvm_arch_hardware_disable(void *garbage)
2536{
2537 kvm_x86_ops->hardware_disable(garbage);
2538}
2539
2540int kvm_arch_hardware_setup(void)
2541{
2542 return kvm_x86_ops->hardware_setup();
2543}
2544
2545void kvm_arch_hardware_unsetup(void)
2546{
2547 kvm_x86_ops->hardware_unsetup();
2548}
2549
2550void kvm_arch_check_processor_compat(void *rtn)
2551{
2552 kvm_x86_ops->check_processor_compatibility(rtn);
2553}
2554
2555int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
2556{
2557 struct page *page;
2558 struct kvm *kvm;
2559 int r;
2560
2561 BUG_ON(vcpu->kvm == NULL);
2562 kvm = vcpu->kvm;
2563
2564 vcpu->mmu.root_hpa = INVALID_PAGE;
2565 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
2566 vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
2567 else
2568 vcpu->mp_state = VCPU_MP_STATE_UNINITIALIZED;
2569
2570 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
2571 if (!page) {
2572 r = -ENOMEM;
2573 goto fail;
2574 }
2575 vcpu->pio_data = page_address(page);
2576
2577 r = kvm_mmu_create(vcpu);
2578 if (r < 0)
2579 goto fail_free_pio_data;
2580
2581 if (irqchip_in_kernel(kvm)) {
2582 r = kvm_create_lapic(vcpu);
2583 if (r < 0)
2584 goto fail_mmu_destroy;
2585 }
2586
2587 return 0;
2588
2589fail_mmu_destroy:
2590 kvm_mmu_destroy(vcpu);
2591fail_free_pio_data:
2592 free_page((unsigned long)vcpu->pio_data);
2593fail:
2594 return r;
2595}
2596
2597void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
2598{
2599 kvm_free_lapic(vcpu);
2600 kvm_mmu_destroy(vcpu);
2601 free_page((unsigned long)vcpu->pio_data);
2602}
d19a9cd2
ZX		 2603
2604struct kvm *kvm_arch_create_vm(void)
2605{
2606 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
2607
2608 if (!kvm)
2609 return ERR_PTR(-ENOMEM);
2610
2611 INIT_LIST_HEAD(&kvm->active_mmu_pages);
2612
2613 return kvm;
2614}
2615
2616static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
2617{
2618 vcpu_load(vcpu);
2619 kvm_mmu_unload(vcpu);
2620 vcpu_put(vcpu);
2621}
2622
2623static void kvm_free_vcpus(struct kvm *kvm)
2624{
2625 unsigned int i;
2626
2627 /*
2628 * Unpin any mmu pages first.
2629 */
2630 for (i = 0; i < KVM_MAX_VCPUS; ++i)
2631 if (kvm->vcpus[i])
2632 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
2633 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2634 if (kvm->vcpus[i]) {
2635 kvm_arch_vcpu_free(kvm->vcpus[i]);
2636 kvm->vcpus[i] = NULL;
2637 }
2638 }
2639
2640}
2641
2642void kvm_arch_destroy_vm(struct kvm *kvm)
2643{
2644 kfree(kvm->vpic);
2645 kfree(kvm->vioapic);
2646 kvm_free_vcpus(kvm);
2647 kvm_free_physmem(kvm);
2648 kfree(kvm);
2649}
kernel source for telekom puls (alcatel/mediatek)